Rob Meades
IAP support library, used to provide non-volatile storage on the C027 board.
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IapApi.h
00001 /** IAP provides support for read/write to FLASh on the LPC1768 platform. The code here is taken from: 00002 * 00003 * http://developer.mbed.org/users/okano/code/IAP/ 00004 * 00005 * All rights remain with Tedd OKANO, etc. 00006 */ 00007 00008 /** IAP : internal Flash memory access library 00009 * 00010 * The internal Flash memory access is described in the LPC1768 and LPC11U24 usermanual. 00011 * http://www.nxp.com/documents/user_manual/UM10360.pdf 00012 * http://www.nxp.com/documents/user_manual/UM10462.pdf 00013 * 00014 * LPC1768 -- 00015 * Chapter 2: "LPC17xx Memory map" 00016 * Chapter 32: "LPC17xx Flash memory interface and programming" 00017 * refering Rev. 01 - 4 January 2010 00018 * 00019 * LPC11U24 -- 00020 * Chapter 2: "LPC11Uxx Memory mapping" 00021 * Chapter 20: "LPC11Uxx Flash programming firmware" 00022 * refering Rev. 03 - 16 July 2012 00023 * 00024 * Released under the MIT License: http://mbed.org/license/mit 00025 * 00026 * revision 1.0 09-Mar-2010 1st release 00027 * revision 1.1 12-Mar-2010 chaged: to make possible to reserve flash area for user 00028 * it can be set by USER_FLASH_AREA_START and USER_FLASH_AREA_SIZE in IAP.h 00029 * revision 2.0 26-Nov-2012 LPC11U24 code added 00030 * revision 2.1 26-Nov-2012 EEPROM access code imported from Suga koubou san's (http://mbed.org/users/okini3939/) library 00031 * http://mbed.org/users/okini3939/code/M0_EEPROM_test/ 00032 * revision 3.0 09-Jan-2015 LPC812 and LPC824 support added 00033 * revision 3.1 13-Jan-2015 LPC1114 support added 00034 * revision 3.1.1 16-Jan-2015 Target MCU name changed for better compatibility across the platforms 00035 */ 00036 00037 00038 #ifndef MBED_IAP 00039 #define MBED_IAP 00040 00041 #include "mbed.h" 00042 00043 #if defined(TARGET_LPC176X) 00044 00045 #define FLASH_SECTOR(startAddress) (((startAddress) <= FLASH_SECTOR_15 ? \ 00046 ((startAddress) / FLASH_SECTOR_SIZE_0_TO_15) : \ 00047 (((startAddress) - FLASH_SECTOR_16) / FLASH_SECTOR_SIZE_16_TO_29) + 16)) 00048 00049 #define USER_FLASH_AREA_START FLASH_SECTOR_29 00050 #define USER_FLASH_AREA_SIZE (FLASH_SECTOR_SIZE_16_TO_29 * 1) 00051 00052 /* 00053 * memory map information is available in next URL also. 00054 * http://mbed.org/projects/libraries/svn/mbed/trunk/LPC1768/LPC17xx.h 00055 */ 00056 00057 /** Table for start adress of sectors 00058 * 00059 * LPC1768 internal flash memory sector numbers and addresses 00060 * 00061 * LPC1768 flash memory are and sector number/size 00062 * Table 568 "Sectors in a LPC17xx device", Section 5. "Sector numbers", usermanual 00063 * 00064 * 0x00000000 - 0x0007FFFF flash (29 sectors) 00065 * 00066 * Sector0: 0x00000000 - 0x00000FFF 4K 00067 * Sector1: 0x00001000 - 0x00001FFF 4K 00068 * Sector2: 0x00002000 - 0x00002FFF 4K 00069 * Sector3: 0x00003000 - 0x00003FFF 4K 00070 * Sector4: 0x00004000 - 0x00004FFF 4K 00071 * Sector5: 0x00005000 - 0x00005FFF 4K 00072 * Sector6: 0x00006000 - 0x00006FFF 4K 00073 * Sector7: 0x00007000 - 0x00007FFF 4K 00074 * Sector8: 0x00008000 - 0x00008FFF 4K 00075 * Sector9: 0x00009000 - 0x00009FFF 4K 00076 * Sector10: 0x0000A000 - 0x0000AFFF 4K 00077 * Sector11: 0x0000B000 - 0x0000BFFF 4K 00078 * Sector12: 0x0000C000 - 0x0000CFFF 4K 00079 * Sector13: 0x0000D000 - 0x0000DFFF 4K 00080 * Sector14: 0x0000E000 - 0x0000EFFF 4K 00081 * Sector15: 0x0000F000 - 0x0000FFFF 4K 00082 * 00083 * Sector16: 0x00010000 - 0x00017FFF 32K 00084 * Sector17: 0x00018000 - 0x0001FFFF 32K 00085 * Sector18: 0x00020000 - 0x00027FFF 32K 00086 * Sector19: 0x00028000 - 0x0002FFFF 32K 00087 * Sector20: 0x00030000 - 0x00037FFF 32K 00088 * Sector21: 0x00038000 - 0x0003FFFF 32K 00089 * Sector22: 0x00040000 - 0x00047FFF 32K 00090 * Sector23: 0x00048000 - 0x0004FFFF 32K 00091 * Sector24: 0x00050000 - 0x00057FFF 32K 00092 * Sector25: 0x00058000 - 0x0005FFFF 32K 00093 * Sector26: 0x00060000 - 0x00067FFF 32K 00094 * Sector27: 0x00068000 - 0x0006FFFF 32K 00095 * Sector28: 0x00070000 - 0x00077FFF 32K 00096 * Sector29: 0x00078000 - 0x0007FFFF 32K 00097 */ 00098 00099 #define FLASH_SECTOR_0 0x00000000 00100 #define FLASH_SECTOR_1 0x00001000 00101 #define FLASH_SECTOR_2 0x00002000 00102 #define FLASH_SECTOR_3 0x00003000 00103 #define FLASH_SECTOR_4 0x00004000 00104 #define FLASH_SECTOR_5 0x00005000 00105 #define FLASH_SECTOR_6 0x00006000 00106 #define FLASH_SECTOR_7 0x00007000 00107 #define FLASH_SECTOR_8 0x00008000 00108 #define FLASH_SECTOR_9 0x00009000 00109 #define FLASH_SECTOR_10 0x0000A000 00110 #define FLASH_SECTOR_11 0x0000B000 00111 #define FLASH_SECTOR_12 0x0000C000 00112 #define FLASH_SECTOR_13 0x0000D000 00113 #define FLASH_SECTOR_14 0x0000E000 00114 #define FLASH_SECTOR_15 0x0000F000 00115 #define FLASH_SECTOR_16 0x00010000 00116 #define FLASH_SECTOR_17 0x00018000 00117 #define FLASH_SECTOR_18 0x00020000 00118 #define FLASH_SECTOR_19 0x00028000 00119 #define FLASH_SECTOR_20 0x00030000 00120 #define FLASH_SECTOR_21 0x00038000 00121 #define FLASH_SECTOR_22 0x00040000 00122 #define FLASH_SECTOR_23 0x00048000 00123 #define FLASH_SECTOR_24 0x00050000 00124 #define FLASH_SECTOR_25 0x00058000 00125 #define FLASH_SECTOR_26 0x00060000 00126 #define FLASH_SECTOR_27 0x00068000 00127 #define FLASH_SECTOR_28 0x00070000 00128 #define FLASH_SECTOR_29 0x00078000 00129 #define FLASH_SECTOR_SIZE_0_TO_15 ( 4 * 1024) 00130 #define FLASH_SECTOR_SIZE_16_TO_29 (32 * 1024) 00131 00132 static char * sector_start_adress[] = { 00133 (char *)FLASH_SECTOR_0, 00134 (char *)FLASH_SECTOR_1, 00135 (char *)FLASH_SECTOR_2, 00136 (char *)FLASH_SECTOR_3, 00137 (char *)FLASH_SECTOR_4, 00138 (char *)FLASH_SECTOR_5, 00139 (char *)FLASH_SECTOR_6, 00140 (char *)FLASH_SECTOR_7, 00141 (char *)FLASH_SECTOR_8, 00142 (char *)FLASH_SECTOR_9, 00143 (char *)FLASH_SECTOR_10, 00144 (char *)FLASH_SECTOR_11, 00145 (char *)FLASH_SECTOR_12, 00146 (char *)FLASH_SECTOR_13, 00147 (char *)FLASH_SECTOR_14, 00148 (char *)FLASH_SECTOR_15, 00149 (char *)FLASH_SECTOR_16, 00150 (char *)FLASH_SECTOR_17, 00151 (char *)FLASH_SECTOR_18, 00152 (char *)FLASH_SECTOR_19, 00153 (char *)FLASH_SECTOR_20, 00154 (char *)FLASH_SECTOR_21, 00155 (char *)FLASH_SECTOR_22, 00156 (char *)FLASH_SECTOR_23, 00157 (char *)FLASH_SECTOR_24, 00158 (char *)FLASH_SECTOR_25, 00159 (char *)FLASH_SECTOR_26, 00160 (char *)FLASH_SECTOR_27, 00161 (char *)FLASH_SECTOR_28, 00162 (char *)FLASH_SECTOR_29 00163 }; 00164 00165 #elif defined(TARGET_LPC11UXX) || defined(TARGET_LPC11XX) 00166 00167 #define USER_FLASH_AREA_START FLASH_SECTOR_7 00168 #define USER_FLASH_AREA_SIZE (FLASH_SECTOR_SIZE * 1) 00169 00170 /** Table for start adress of sectors 00171 * 00172 * LPC11U24 internal flash memory sector numbers and addresses 00173 * 00174 * LPC11U24 flash memory are and sector number/size 00175 * Table 334 "LPC11U1x/2x flash sectors", Section 20. "Sector numbers", usermanual 00176 * 00177 * 0x00000000 - 0x00007FFF flash (8 sectors) 00178 * 00179 * Sector0: 0x00000000 - 0x00000FFF 4K 00180 * Sector1: 0x00001000 - 0x00001FFF 4K 00181 * Sector2: 0x00002000 - 0x00002FFF 4K 00182 * Sector3: 0x00003000 - 0x00003FFF 4K 00183 * Sector4: 0x00004000 - 0x00004FFF 4K 00184 * Sector5: 0x00005000 - 0x00005FFF 4K 00185 * Sector6: 0x00006000 - 0x00006FFF 4K 00186 * Sector7: 0x00007000 - 0x00007FFF 4K 00187 */ 00188 00189 #define FLASH_SECTOR_0 0x00000000 00190 #define FLASH_SECTOR_1 0x00001000 00191 #define FLASH_SECTOR_2 0x00002000 00192 #define FLASH_SECTOR_3 0x00003000 00193 #define FLASH_SECTOR_4 0x00004000 00194 #define FLASH_SECTOR_5 0x00005000 00195 #define FLASH_SECTOR_6 0x00006000 00196 #define FLASH_SECTOR_7 0x00007000 00197 #define FLASH_SECTOR_SIZE (4 * 1024) 00198 00199 static char * sector_start_adress[] = { 00200 (char *)FLASH_SECTOR_0, 00201 (char *)FLASH_SECTOR_1, 00202 (char *)FLASH_SECTOR_2, 00203 (char *)FLASH_SECTOR_3, 00204 (char *)FLASH_SECTOR_4, 00205 (char *)FLASH_SECTOR_5, 00206 (char *)FLASH_SECTOR_6, 00207 (char *)FLASH_SECTOR_7, 00208 }; 00209 00210 #elif defined(TARGET_LPC81X) || defined(TARGET_LPC82X) 00211 00212 #define USER_FLASH_AREA_START FLASH_SECTOR_15 00213 #define USER_FLASH_AREA_SIZE (FLASH_SECTOR_SIZE * 1) 00214 00215 /** Table for start adress of sectors 00216 * 00217 * LPC812/LPC824 internal flash memory sector numbers and addresses 00218 * 00219 * 0x00000000 - 0x00003FFF flash (16 sectors for LPC812) 00220 * 0x00000000 - 0x00007FFF flash (32 sectors for LPC824) 00221 * 00222 * Sector0: 0x00000000 - 0x000003FF 1K 00223 * Sector1: 0x00000400 - 0x000007FF 1K 00224 * Sector2: 0x00000800 - 0x00000BFF 1K 00225 * Sector3: 0x00000C00 - 0x00000FFF 1K 00226 * Sector4: 0x00001000 - 0x000013FF 1K 00227 * Sector5: 0x00001400 - 0x000017FF 1K 00228 * Sector6: 0x00001800 - 0x00001BFF 1K 00229 * Sector7: 0x00001C00 - 0x00001FFF 1K 00230 * Sector8: 0x00002000 - 0x000023FF 1K 00231 * Sector9: 0x00002400 - 0x000027FF 1K 00232 * Sector10: 0x00002800 - 0x00002BFF 1K 00233 * Sector11: 0x00002C00 - 0x00002FFF 1K 00234 * Sector12: 0x00003000 - 0x000033FF 1K 00235 * Sector13: 0x00003400 - 0x000037FF 1K 00236 * Sector14: 0x00003800 - 0x00003BFF 1K 00237 * Sector15: 0x00003C00 - 0x00003FFF 1K 00238 * Sector16: 0x00004000 - 0x000043FF 1K (LPC824 only) 00239 * Sector17: 0x00004400 - 0x000047FF 1K (LPC824 only) 00240 * Sector18: 0x00004800 - 0x00004BFF 1K (LPC824 only) 00241 * Sector19: 0x00004C00 - 0x00004FFF 1K (LPC824 only) 00242 * Sector20: 0x00005000 - 0x000053FF 1K (LPC824 only) 00243 * Sector21: 0x00005400 - 0x000057FF 1K (LPC824 only) 00244 * Sector22: 0x00005800 - 0x00005BFF 1K (LPC824 only) 00245 * Sector23: 0x00005C00 - 0x00005FFF 1K (LPC824 only) 00246 * Sector24: 0x00006000 - 0x000063FF 1K (LPC824 only) 00247 * Sector25: 0x00006400 - 0x000067FF 1K (LPC824 only) 00248 * Sector26: 0x00006800 - 0x00006BFF 1K (LPC824 only) 00249 * Sector27: 0x00006C00 - 0x00006FFF 1K (LPC824 only) 00250 * Sector28: 0x00007000 - 0x000073FF 1K (LPC824 only) 00251 * Sector29: 0x00007400 - 0x000077FF 1K (LPC824 only) 00252 * Sector30: 0x00007800 - 0x00007BFF 1K (LPC824 only) 00253 * Sector31: 0x00007C00 - 0x00007FFF 1K (LPC824 only) 00254 */ 00255 00256 #define FLASH_SECTOR_0 0x00000000 00257 #define FLASH_SECTOR_1 0x00000400 00258 #define FLASH_SECTOR_2 0x00000800 00259 #define FLASH_SECTOR_3 0x00000C00 00260 #define FLASH_SECTOR_4 0x00001000 00261 #define FLASH_SECTOR_5 0x00001400 00262 #define FLASH_SECTOR_6 0x00001800 00263 #define FLASH_SECTOR_7 0x00001C00 00264 #define FLASH_SECTOR_8 0x00002000 00265 #define FLASH_SECTOR_9 0x00002400 00266 #define FLASH_SECTOR_10 0x00002800 00267 #define FLASH_SECTOR_11 0x00002C00 00268 #define FLASH_SECTOR_12 0x00003000 00269 #define FLASH_SECTOR_13 0x00003400 00270 #define FLASH_SECTOR_14 0x00003800 00271 #define FLASH_SECTOR_15 0x00003C00 00272 #define FLASH_SECTOR_16 0x00004000 // for LPC824 only 00273 #define FLASH_SECTOR_17 0x00004400 // for LPC824 only 00274 #define FLASH_SECTOR_18 0x00004800 // for LPC824 only 00275 #define FLASH_SECTOR_19 0x00004C00 // for LPC824 only 00276 #define FLASH_SECTOR_20 0x00005000 // for LPC824 only 00277 #define FLASH_SECTOR_21 0x00005400 // for LPC824 only 00278 #define FLASH_SECTOR_22 0x00005800 // for LPC824 only 00279 #define FLASH_SECTOR_23 0x00005C00 // for LPC824 only 00280 #define FLASH_SECTOR_24 0x00006000 // for LPC824 only 00281 #define FLASH_SECTOR_25 0x00006400 // for LPC824 only 00282 #define FLASH_SECTOR_26 0x00006800 // for LPC824 only 00283 #define FLASH_SECTOR_27 0x00006C00 // for LPC824 only 00284 #define FLASH_SECTOR_28 0x00007000 // for LPC824 only 00285 #define FLASH_SECTOR_29 0x00007400 // for LPC824 only 00286 #define FLASH_SECTOR_30 0x00007800 // for LPC824 only 00287 #define FLASH_SECTOR_31 0x00007C00 // for LPC824 only 00288 #define FLASH_SECTOR_SIZE (1 * 1024) 00289 00290 static char * sector_start_adress[] = { 00291 (char *)FLASH_SECTOR_0, 00292 (char *)FLASH_SECTOR_1, 00293 (char *)FLASH_SECTOR_2, 00294 (char *)FLASH_SECTOR_3, 00295 (char *)FLASH_SECTOR_4, 00296 (char *)FLASH_SECTOR_5, 00297 (char *)FLASH_SECTOR_6, 00298 (char *)FLASH_SECTOR_7, 00299 (char *)FLASH_SECTOR_8, 00300 (char *)FLASH_SECTOR_9, 00301 (char *)FLASH_SECTOR_10, 00302 (char *)FLASH_SECTOR_11, 00303 (char *)FLASH_SECTOR_12, 00304 (char *)FLASH_SECTOR_13, 00305 (char *)FLASH_SECTOR_14, 00306 (char *)FLASH_SECTOR_15, 00307 (char *)FLASH_SECTOR_16, // for LPC824 only 00308 (char *)FLASH_SECTOR_17, // for LPC824 only 00309 (char *)FLASH_SECTOR_18, // for LPC824 only 00310 (char *)FLASH_SECTOR_19, // for LPC824 only 00311 (char *)FLASH_SECTOR_20, // for LPC824 only 00312 (char *)FLASH_SECTOR_21, // for LPC824 only 00313 (char *)FLASH_SECTOR_22, // for LPC824 only 00314 (char *)FLASH_SECTOR_23, // for LPC824 only 00315 (char *)FLASH_SECTOR_24, // for LPC824 only 00316 (char *)FLASH_SECTOR_25, // for LPC824 only 00317 (char *)FLASH_SECTOR_26, // for LPC824 only 00318 (char *)FLASH_SECTOR_27, // for LPC824 only 00319 (char *)FLASH_SECTOR_28, // for LPC824 only 00320 (char *)FLASH_SECTOR_29, // for LPC824 only 00321 (char *)FLASH_SECTOR_30, // for LPC824 only 00322 (char *)FLASH_SECTOR_31 // for LPC824 only 00323 }; 00324 00325 #endif 00326 00327 /** Error code by IAP routine 00328 * 00329 * Table 588 "ISP Return Codes Summary", Section 7.15 "ISP Return Codes", usermanual 00330 */ 00331 00332 enum error_code { 00333 CMD_SUCCESS, 00334 INVALID_COMMAND, 00335 SRC_ADDR_ERROR, 00336 DST_ADDR_ERROR, 00337 SRC_ADDR_NOT_MAPPED, 00338 DST_ADDR_NOT_MAPPED, 00339 COUNT_ERROR, 00340 INVALID_SECTOR, 00341 SECTOR_NOT_BLANK, 00342 SECTOR_NOT_PREPARED_FOR_WRITE_OPERATION, 00343 COMPARE_ERROR, 00344 BUSY, 00345 PARAM_ERROR, 00346 ADDR_ERROR, 00347 ADDR_NOT_MAPPED, 00348 CMD_LOCKED, 00349 INVALID_CODE, 00350 INVALID_BAUD_RATE, 00351 INVALID_STOP_BIT, 00352 CODE_READ_PROTECTION_ENABLED 00353 }; 00354 00355 00356 00357 /* 00358 * IAP routine entry 00359 * 00360 * "IAP commands" 00361 */ 00362 00363 #define IAP_LOCATION 0x1fff1ff1 00364 typedef void (*IAP_call)(unsigned int [], unsigned int []); 00365 00366 00367 /** IAP class 00368 * 00369 * Interface for internal flash memory access 00370 */ 00371 00372 class IAP 00373 { 00374 public: 00375 00376 /** Constructor for IAP 00377 * 00378 */ 00379 IAP() : iap_entry( reinterpret_cast<IAP_call>(IAP_LOCATION) ), cclk_kHz( SystemCoreClock / 1000 ) {} 00380 00381 /** Read part identification number 00382 * 00383 * @return device ID 00384 * @see read_serial() 00385 */ 00386 int read_ID( void ); 00387 00388 /** Read device serial number 00389 * 00390 * @return device serial number 00391 * @see read_ID() 00392 */ 00393 int read_serial( void ); 00394 00395 /** Blank check sector(s) 00396 * 00397 * @param start a Start Sector Number 00398 * @param end an End Sector Number (should be greater than or equal to start sector number). 00399 * @return error code: CMD_SUCCESS | BUSY | SECTOR_NOT_BLANK | INVALID_SECTOR 00400 */ 00401 int blank_check( int start, int end ); 00402 00403 /** Erase Sector(s) 00404 * 00405 * @param start a Start Sector Number 00406 * @param end an End Sector Number (should be greater than or equal to start sector number). 00407 * @return error code: CMD_SUCCESS | BUSY | SECTOR_NOT_PREPARED_FOR_WRITE_OPERATION | INVALID_SECTOR 00408 */ 00409 int erase( int start, int end ); 00410 00411 /** Prepare sector(s) for write operation 00412 * 00413 * @param start a Start Sector Number 00414 * @param end an End Sector Number (should be greater than or equal to start sector number). 00415 * @return error code: CMD_SUCCESS | BUSY | INVALID_SECTOR 00416 */ 00417 int prepare( int start, int end ); 00418 00419 /** Copy RAM to Flash 00420 * 00421 * @param source_addr Source RAM address from which data bytes are to be read. This address should be a word boundary. 00422 * @param target_addr Destination flash address where data bytes are to be written. This address should be a 256 byte boundary. 00423 * @param size Number of bytes to be written. Should be 256 | 512 | 1024 | 4096. 00424 * @return error code: CMD_SUCCESS | SRC_ADDR_ERROR (Address not a word boundary) | DST_ADDR_ERROR (Address not on correct boundary) | SRC_ADDR_NOT_MAPPED | DST_ADDR_NOT_MAPPED | COUNT_ERROR (Byte count is not 256 | 512 | 1024 | 4096) | SECTOR_NOT_PREPARED_FOR_WRITE_OPERATION | BUSY 00425 */ 00426 int write( char *source_addr, char *target_addr, int size ); 00427 00428 /** Compare <address1> <address2> <no of bytes> 00429 * 00430 * @param source_addr Starting flash or RAM address of data bytes to be compared. This address should be a word boundary. 00431 * @param target_addr Starting flash or RAM address of data bytes to be compared. This address should be a word boundary. 00432 * @param size Number of bytes to be compared; should be a multiple of 4. 00433 * @return error code: CMD_SUCCESS | COMPARE_ERROR | COUNT_ERROR (Byte count is not a multiple of 4) | ADDR_ERROR | ADDR_NOT_MAPPED 00434 */ 00435 int compare( char *source_addr, char *target_addr, int size ); 00436 00437 /** Read Boot code version number 00438 * 00439 * @return 2 bytes of boot code version number 00440 */ 00441 int read_BootVer( void ); 00442 00443 /** Get user reserved flash start address 00444 * 00445 * @return start address of user reserved flash memory 00446 * @see reserved_flash_area_size() 00447 */ 00448 00449 char *reserved_flash_area_start( void ); 00450 00451 /** Get user reserved flash size 00452 * 00453 * @return size of user reserved flash memory 00454 * @see reserved_flash_area_start() 00455 */ 00456 int reserved_flash_area_size( void ); 00457 00458 #if defined(TARGET_LPC11UXX) 00459 00460 /** Copy RAM to EEPROM (LPC11U24) 00461 * 00462 * @param source_addr Source RAM address from which data bytes are to be read. 00463 * @param target_addr Destination EEPROM address where data bytes are to be written. 00464 * @param size Number of bytes to be written. 00465 * @return error code: CMD_SUCCESS | SRC_ADDR_NOT_MAPPED | DST_ADDR_NOT_MAPPED 00466 * Remark: The top 64 bytes of the EEPROM memory are reserved and cannot be written to. 00467 */ 00468 int write_eeprom( char *source_addr, char *target_addr, int size ); 00469 00470 /** Copy EEPROM to RAM (LPC11U24) 00471 * 00472 * @param source_addr Source EEPROM address from which data bytes are to be read. 00473 * @param target_addr Destination RAM address where data bytes are to be written. 00474 * @param size Number of bytes to be written. 00475 * @return error code: CMD_SUCCESS | SRC_ADDR_NOT_MAPPED | DST_ADDR_NOT_MAPPED 00476 * Remark: The top 64 bytes of the EEPROM memory are reserved and cannot be written to. 00477 */ 00478 int read_eeprom( char *source_addr, char *target_addr, int size ); 00479 00480 #elif defined(TARGET_LPC81X) || defined(TARGET_LPC82X) 00481 00482 /** Erase page(s) (LPC812, LPC824) 00483 * 00484 * @param start Start page number. 00485 * @param end End page number (should be greater than or equal to start page). 00486 * @return error code: CMD_SUCCESS | BUSY | SECTOR_NOT_PREPARED_FOR_WRITE_OPERATION | INVALID_SECTOR 00487 */ 00488 int erase_page( int start, int end ); 00489 00490 #endif 00491 00492 private: 00493 IAP_call iap_entry; 00494 unsigned int IAP_command[ 5 ]; 00495 unsigned int IAP_result[ 5 ]; 00496 int cclk_kHz; 00497 } 00498 ; 00499 00500 #endif // #ifndef MBED_IAP
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