Rizky Ardi Maulana / mbed-os

Important changes to repositories hosted on mbed.com

Mbed hosted mercurial repositories are deprecated and are due to be permanently deleted in July 2026.

To keep a copy of this software download the repository Zip archive or clone locally using Mercurial.

It is also possible to export all your personal repositories from the account settings page.

targets/TARGET_Freescale/TARGET_KSDK2_MCUS/TARGET_KL27Z/drivers/fsl_adc16.c@0:f269e3021894, 2016-10-23 (annotated)

Committer:
elessair
Date:
Sun Oct 23 15:10:02 2016 +0000
Revision:
0:f269e3021894
Initial commit

Who changed what in which revision?

UserRevisionLine numberNew contents of line
elessair 0:f269e3021894 1 /*
elessair 0:f269e3021894 2 * Copyright (c) 2015, Freescale Semiconductor, Inc.
elessair 0:f269e3021894 3 * All rights reserved.
elessair 0:f269e3021894 4 *
elessair 0:f269e3021894 5 * Redistribution and use in source and binary forms, with or without modification,
elessair 0:f269e3021894 6 * are permitted provided that the following conditions are met:
elessair 0:f269e3021894 7 *
elessair 0:f269e3021894 8 * o Redistributions of source code must retain the above copyright notice, this list
elessair 0:f269e3021894 9 * of conditions and the following disclaimer.
elessair 0:f269e3021894 10 *
elessair 0:f269e3021894 11 * o Redistributions in binary form must reproduce the above copyright notice, this
elessair 0:f269e3021894 12 * list of conditions and the following disclaimer in the documentation and/or
elessair 0:f269e3021894 13 * other materials provided with the distribution.
elessair 0:f269e3021894 14 *
elessair 0:f269e3021894 15 * o Neither the name of Freescale Semiconductor, Inc. nor the names of its
elessair 0:f269e3021894 16 * contributors may be used to endorse or promote products derived from this
elessair 0:f269e3021894 17 * software without specific prior written permission.
elessair 0:f269e3021894 18 *
elessair 0:f269e3021894 19 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
elessair 0:f269e3021894 20 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
elessair 0:f269e3021894 21 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
elessair 0:f269e3021894 22 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
elessair 0:f269e3021894 23 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
elessair 0:f269e3021894 24 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
elessair 0:f269e3021894 25 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
elessair 0:f269e3021894 26 * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
elessair 0:f269e3021894 27 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
elessair 0:f269e3021894 28 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
elessair 0:f269e3021894 29 */
elessair 0:f269e3021894 30
elessair 0:f269e3021894 31 #include "fsl_adc16.h"
elessair 0:f269e3021894 32
elessair 0:f269e3021894 33 /*******************************************************************************
elessair 0:f269e3021894 34 * Prototypes
elessair 0:f269e3021894 35 ******************************************************************************/
elessair 0:f269e3021894 36 /*!
elessair 0:f269e3021894 37 * @brief Get instance number for ADC16 module.
elessair 0:f269e3021894 38 *
elessair 0:f269e3021894 39 * @param base ADC16 peripheral base address
elessair 0:f269e3021894 40 */
elessair 0:f269e3021894 41 static uint32_t ADC16_GetInstance(ADC_Type *base);
elessair 0:f269e3021894 42
elessair 0:f269e3021894 43 /*******************************************************************************
elessair 0:f269e3021894 44 * Variables
elessair 0:f269e3021894 45 ******************************************************************************/
elessair 0:f269e3021894 46 /*! @brief Pointers to ADC16 bases for each instance. */
elessair 0:f269e3021894 47 static ADC_Type *const s_adc16Bases[] = ADC_BASE_PTRS;
elessair 0:f269e3021894 48
elessair 0:f269e3021894 49 /*! @brief Pointers to ADC16 clocks for each instance. */
elessair 0:f269e3021894 50 const clock_ip_name_t s_adc16Clocks[] = ADC16_CLOCKS;
elessair 0:f269e3021894 51
elessair 0:f269e3021894 52 /*******************************************************************************
elessair 0:f269e3021894 53 * Code
elessair 0:f269e3021894 54 ******************************************************************************/
elessair 0:f269e3021894 55 static uint32_t ADC16_GetInstance(ADC_Type *base)
elessair 0:f269e3021894 56 {
elessair 0:f269e3021894 57 uint32_t instance;
elessair 0:f269e3021894 58
elessair 0:f269e3021894 59 /* Find the instance index from base address mappings. */
elessair 0:f269e3021894 60 for (instance = 0; instance < FSL_FEATURE_SOC_ADC16_COUNT; instance++)
elessair 0:f269e3021894 61 {
elessair 0:f269e3021894 62 if (s_adc16Bases[instance] == base)
elessair 0:f269e3021894 63 {
elessair 0:f269e3021894 64 break;
elessair 0:f269e3021894 65 }
elessair 0:f269e3021894 66 }
elessair 0:f269e3021894 67
elessair 0:f269e3021894 68 assert(instance < FSL_FEATURE_SOC_ADC16_COUNT);
elessair 0:f269e3021894 69
elessair 0:f269e3021894 70 return instance;
elessair 0:f269e3021894 71 }
elessair 0:f269e3021894 72
elessair 0:f269e3021894 73 void ADC16_Init(ADC_Type *base, const adc16_config_t *config)
elessair 0:f269e3021894 74 {
elessair 0:f269e3021894 75 assert(NULL != config);
elessair 0:f269e3021894 76
elessair 0:f269e3021894 77 uint32_t tmp32;
elessair 0:f269e3021894 78
elessair 0:f269e3021894 79 /* Enable the clock. */
elessair 0:f269e3021894 80 CLOCK_EnableClock(s_adc16Clocks[ADC16_GetInstance(base)]);
elessair 0:f269e3021894 81
elessair 0:f269e3021894 82 /* ADCx_CFG1. */
elessair 0:f269e3021894 83 tmp32 = ADC_CFG1_ADICLK(config->clockSource) | ADC_CFG1_MODE(config->resolution);
elessair 0:f269e3021894 84 if (kADC16_LongSampleDisabled != config->longSampleMode)
elessair 0:f269e3021894 85 {
elessair 0:f269e3021894 86 tmp32 |= ADC_CFG1_ADLSMP_MASK;
elessair 0:f269e3021894 87 }
elessair 0:f269e3021894 88 tmp32 |= ADC_CFG1_ADIV(config->clockDivider);
elessair 0:f269e3021894 89 if (config->enableLowPower)
elessair 0:f269e3021894 90 {
elessair 0:f269e3021894 91 tmp32 |= ADC_CFG1_ADLPC_MASK;
elessair 0:f269e3021894 92 }
elessair 0:f269e3021894 93 base->CFG1 = tmp32;
elessair 0:f269e3021894 94
elessair 0:f269e3021894 95 /* ADCx_CFG2. */
elessair 0:f269e3021894 96 tmp32 = base->CFG2 & ~(ADC_CFG2_ADACKEN_MASK | ADC_CFG2_ADHSC_MASK | ADC_CFG2_ADLSTS_MASK);
elessair 0:f269e3021894 97 if (kADC16_LongSampleDisabled != config->longSampleMode)
elessair 0:f269e3021894 98 {
elessair 0:f269e3021894 99 tmp32 |= ADC_CFG2_ADLSTS(config->longSampleMode);
elessair 0:f269e3021894 100 }
elessair 0:f269e3021894 101 if (config->enableHighSpeed)
elessair 0:f269e3021894 102 {
elessair 0:f269e3021894 103 tmp32 |= ADC_CFG2_ADHSC_MASK;
elessair 0:f269e3021894 104 }
elessair 0:f269e3021894 105 if (config->enableAsynchronousClock)
elessair 0:f269e3021894 106 {
elessair 0:f269e3021894 107 tmp32 |= ADC_CFG2_ADACKEN_MASK;
elessair 0:f269e3021894 108 }
elessair 0:f269e3021894 109 base->CFG2 = tmp32;
elessair 0:f269e3021894 110
elessair 0:f269e3021894 111 /* ADCx_SC2. */
elessair 0:f269e3021894 112 tmp32 = base->SC2 & ~(ADC_SC2_REFSEL_MASK);
elessair 0:f269e3021894 113 tmp32 |= ADC_SC2_REFSEL(config->referenceVoltageSource);
elessair 0:f269e3021894 114 base->SC2 = tmp32;
elessair 0:f269e3021894 115
elessair 0:f269e3021894 116 /* ADCx_SC3. */
elessair 0:f269e3021894 117 if (config->enableContinuousConversion)
elessair 0:f269e3021894 118 {
elessair 0:f269e3021894 119 base->SC3 |= ADC_SC3_ADCO_MASK;
elessair 0:f269e3021894 120 }
elessair 0:f269e3021894 121 else
elessair 0:f269e3021894 122 {
elessair 0:f269e3021894 123 base->SC3 &= ~ADC_SC3_ADCO_MASK;
elessair 0:f269e3021894 124 }
elessair 0:f269e3021894 125 }
elessair 0:f269e3021894 126
elessair 0:f269e3021894 127 void ADC16_Deinit(ADC_Type *base)
elessair 0:f269e3021894 128 {
elessair 0:f269e3021894 129 /* Disable the clock. */
elessair 0:f269e3021894 130 CLOCK_DisableClock(s_adc16Clocks[ADC16_GetInstance(base)]);
elessair 0:f269e3021894 131 }
elessair 0:f269e3021894 132
elessair 0:f269e3021894 133 void ADC16_GetDefaultConfig(adc16_config_t *config)
elessair 0:f269e3021894 134 {
elessair 0:f269e3021894 135 assert(NULL != config);
elessair 0:f269e3021894 136
elessair 0:f269e3021894 137 config->referenceVoltageSource = kADC16_ReferenceVoltageSourceVref;
elessair 0:f269e3021894 138 config->clockSource = kADC16_ClockSourceAsynchronousClock;
elessair 0:f269e3021894 139 config->enableAsynchronousClock = true;
elessair 0:f269e3021894 140 config->clockDivider = kADC16_ClockDivider8;
elessair 0:f269e3021894 141 config->resolution = kADC16_ResolutionSE12Bit;
elessair 0:f269e3021894 142 config->longSampleMode = kADC16_LongSampleDisabled;
elessair 0:f269e3021894 143 config->enableHighSpeed = false;
elessair 0:f269e3021894 144 config->enableLowPower = false;
elessair 0:f269e3021894 145 config->enableContinuousConversion = false;
elessair 0:f269e3021894 146 }
elessair 0:f269e3021894 147
elessair 0:f269e3021894 148 #if defined(FSL_FEATURE_ADC16_HAS_CALIBRATION) && FSL_FEATURE_ADC16_HAS_CALIBRATION
elessair 0:f269e3021894 149 status_t ADC16_DoAutoCalibration(ADC_Type *base)
elessair 0:f269e3021894 150 {
elessair 0:f269e3021894 151 bool bHWTrigger = false;
elessair 0:f269e3021894 152 uint32_t tmp32;
elessair 0:f269e3021894 153 status_t status = kStatus_Success;
elessair 0:f269e3021894 154
elessair 0:f269e3021894 155 /* The calibration would be failed when in hardwar mode.
elessair 0:f269e3021894 156 * Remember the hardware trigger state here and restore it later if the hardware trigger is enabled.*/
elessair 0:f269e3021894 157 if (0U != (ADC_SC2_ADTRG_MASK & base->SC2))
elessair 0:f269e3021894 158 {
elessair 0:f269e3021894 159 bHWTrigger = true;
elessair 0:f269e3021894 160 base->SC2 &= ~ADC_SC2_ADTRG_MASK;
elessair 0:f269e3021894 161 }
elessair 0:f269e3021894 162
elessair 0:f269e3021894 163 /* Clear the CALF and launch the calibration. */
elessair 0:f269e3021894 164 base->SC3 |= ADC_SC3_CAL_MASK | ADC_SC3_CALF_MASK;
elessair 0:f269e3021894 165 while (0U == (kADC16_ChannelConversionDoneFlag & ADC16_GetChannelStatusFlags(base, 0U)))
elessair 0:f269e3021894 166 {
elessair 0:f269e3021894 167 /* Check the CALF when the calibration is active. */
elessair 0:f269e3021894 168 if (0U != (kADC16_CalibrationFailedFlag & ADC16_GetStatusFlags(base)))
elessair 0:f269e3021894 169 {
elessair 0:f269e3021894 170 status = kStatus_Fail;
elessair 0:f269e3021894 171 break;
elessair 0:f269e3021894 172 }
elessair 0:f269e3021894 173 }
elessair 0:f269e3021894 174
elessair 0:f269e3021894 175 /* Restore the hardware trigger setting if it was enabled before. */
elessair 0:f269e3021894 176 if (bHWTrigger)
elessair 0:f269e3021894 177 {
elessair 0:f269e3021894 178 base->SC2 |= ADC_SC2_ADTRG_MASK;
elessair 0:f269e3021894 179 }
elessair 0:f269e3021894 180 /* Check the CALF at the end of calibration. */
elessair 0:f269e3021894 181 if (0U != (kADC16_CalibrationFailedFlag & ADC16_GetStatusFlags(base)))
elessair 0:f269e3021894 182 {
elessair 0:f269e3021894 183 status = kStatus_Fail;
elessair 0:f269e3021894 184 }
elessair 0:f269e3021894 185 if (kStatus_Success != status) /* Check if the calibration process is succeed. */
elessair 0:f269e3021894 186 {
elessair 0:f269e3021894 187 return status;
elessair 0:f269e3021894 188 }
elessair 0:f269e3021894 189
elessair 0:f269e3021894 190 /* Calculate the calibration values. */
elessair 0:f269e3021894 191 tmp32 = base->CLP0 + base->CLP1 + base->CLP2 + base->CLP3 + base->CLP4 + base->CLPS;
elessair 0:f269e3021894 192 tmp32 = 0x8000U | (tmp32 >> 1U);
elessair 0:f269e3021894 193 base->PG = tmp32;
elessair 0:f269e3021894 194
elessair 0:f269e3021894 195 #if defined(FSL_FEATURE_ADC16_HAS_DIFF_MODE) && FSL_FEATURE_ADC16_HAS_DIFF_MODE
elessair 0:f269e3021894 196 tmp32 = base->CLM0 + base->CLM1 + base->CLM2 + base->CLM3 + base->CLM4 + base->CLMS;
elessair 0:f269e3021894 197 tmp32 = 0x8000U | (tmp32 >> 1U);
elessair 0:f269e3021894 198 base->MG = tmp32;
elessair 0:f269e3021894 199 #endif /* FSL_FEATURE_ADC16_HAS_DIFF_MODE */
elessair 0:f269e3021894 200
elessair 0:f269e3021894 201 return kStatus_Success;
elessair 0:f269e3021894 202 }
elessair 0:f269e3021894 203 #endif /* FSL_FEATURE_ADC16_HAS_CALIBRATION */
elessair 0:f269e3021894 204
elessair 0:f269e3021894 205 #if defined(FSL_FEATURE_ADC16_HAS_MUX_SELECT) && FSL_FEATURE_ADC16_HAS_MUX_SELECT
elessair 0:f269e3021894 206 void ADC16_SetChannelMuxMode(ADC_Type *base, adc16_channel_mux_mode_t mode)
elessair 0:f269e3021894 207 {
elessair 0:f269e3021894 208 if (kADC16_ChannelMuxA == mode)
elessair 0:f269e3021894 209 {
elessair 0:f269e3021894 210 base->CFG2 &= ~ADC_CFG2_MUXSEL_MASK;
elessair 0:f269e3021894 211 }
elessair 0:f269e3021894 212 else /* kADC16_ChannelMuxB. */
elessair 0:f269e3021894 213 {
elessair 0:f269e3021894 214 base->CFG2 |= ADC_CFG2_MUXSEL_MASK;
elessair 0:f269e3021894 215 }
elessair 0:f269e3021894 216 }
elessair 0:f269e3021894 217 #endif /* FSL_FEATURE_ADC16_HAS_MUX_SELECT */
elessair 0:f269e3021894 218
elessair 0:f269e3021894 219 void ADC16_SetHardwareCompareConfig(ADC_Type *base, const adc16_hardware_compare_config_t *config)
elessair 0:f269e3021894 220 {
elessair 0:f269e3021894 221 uint32_t tmp32 = base->SC2 & ~(ADC_SC2_ACFE_MASK | ADC_SC2_ACFGT_MASK | ADC_SC2_ACREN_MASK);
elessair 0:f269e3021894 222
elessair 0:f269e3021894 223 if (!config) /* Pass "NULL" to disable the feature. */
elessair 0:f269e3021894 224 {
elessair 0:f269e3021894 225 base->SC2 = tmp32;
elessair 0:f269e3021894 226 return;
elessair 0:f269e3021894 227 }
elessair 0:f269e3021894 228 /* Enable the feature. */
elessair 0:f269e3021894 229 tmp32 |= ADC_SC2_ACFE_MASK;
elessair 0:f269e3021894 230
elessair 0:f269e3021894 231 /* Select the hardware compare working mode. */
elessair 0:f269e3021894 232 switch (config->hardwareCompareMode)
elessair 0:f269e3021894 233 {
elessair 0:f269e3021894 234 case kADC16_HardwareCompareMode0:
elessair 0:f269e3021894 235 break;
elessair 0:f269e3021894 236 case kADC16_HardwareCompareMode1:
elessair 0:f269e3021894 237 tmp32 |= ADC_SC2_ACFGT_MASK;
elessair 0:f269e3021894 238 break;
elessair 0:f269e3021894 239 case kADC16_HardwareCompareMode2:
elessair 0:f269e3021894 240 tmp32 |= ADC_SC2_ACREN_MASK;
elessair 0:f269e3021894 241 break;
elessair 0:f269e3021894 242 case kADC16_HardwareCompareMode3:
elessair 0:f269e3021894 243 tmp32 |= ADC_SC2_ACFGT_MASK | ADC_SC2_ACREN_MASK;
elessair 0:f269e3021894 244 break;
elessair 0:f269e3021894 245 default:
elessair 0:f269e3021894 246 break;
elessair 0:f269e3021894 247 }
elessair 0:f269e3021894 248 base->SC2 = tmp32;
elessair 0:f269e3021894 249
elessair 0:f269e3021894 250 /* Load the compare values. */
elessair 0:f269e3021894 251 base->CV1 = ADC_CV1_CV(config->value1);
elessair 0:f269e3021894 252 base->CV2 = ADC_CV2_CV(config->value2);
elessair 0:f269e3021894 253 }
elessair 0:f269e3021894 254
elessair 0:f269e3021894 255 #if defined(FSL_FEATURE_ADC16_HAS_HW_AVERAGE) && FSL_FEATURE_ADC16_HAS_HW_AVERAGE
elessair 0:f269e3021894 256 void ADC16_SetHardwareAverage(ADC_Type *base, adc16_hardware_average_mode_t mode)
elessair 0:f269e3021894 257 {
elessair 0:f269e3021894 258 uint32_t tmp32 = base->SC3 & ~(ADC_SC3_AVGE_MASK | ADC_SC3_AVGS_MASK);
elessair 0:f269e3021894 259
elessair 0:f269e3021894 260 if (kADC16_HardwareAverageDisabled != mode)
elessair 0:f269e3021894 261 {
elessair 0:f269e3021894 262 tmp32 |= ADC_SC3_AVGE_MASK | ADC_SC3_AVGS(mode);
elessair 0:f269e3021894 263 }
elessair 0:f269e3021894 264 base->SC3 = tmp32;
elessair 0:f269e3021894 265 }
elessair 0:f269e3021894 266 #endif /* FSL_FEATURE_ADC16_HAS_HW_AVERAGE */
elessair 0:f269e3021894 267
elessair 0:f269e3021894 268 #if defined(FSL_FEATURE_ADC16_HAS_PGA) && FSL_FEATURE_ADC16_HAS_PGA
elessair 0:f269e3021894 269 void ADC16_SetPGAConfig(ADC_Type *base, const adc16_pga_config_t *config)
elessair 0:f269e3021894 270 {
elessair 0:f269e3021894 271 uint32_t tmp32;
elessair 0:f269e3021894 272
elessair 0:f269e3021894 273 if (!config) /* Passing "NULL" is to disable the feature. */
elessair 0:f269e3021894 274 {
elessair 0:f269e3021894 275 base->PGA = 0U;
elessair 0:f269e3021894 276 return;
elessair 0:f269e3021894 277 }
elessair 0:f269e3021894 278
elessair 0:f269e3021894 279 /* Enable the PGA and set the gain value. */
elessair 0:f269e3021894 280 tmp32 = ADC_PGA_PGAEN_MASK | ADC_PGA_PGAG(config->pgaGain);
elessair 0:f269e3021894 281
elessair 0:f269e3021894 282 /* Configure the misc features for PGA. */
elessair 0:f269e3021894 283 if (config->enableRunInNormalMode)
elessair 0:f269e3021894 284 {
elessair 0:f269e3021894 285 tmp32 |= ADC_PGA_PGALPb_MASK;
elessair 0:f269e3021894 286 }
elessair 0:f269e3021894 287 #if defined(FSL_FEATURE_ADC16_HAS_PGA_CHOPPING) && FSL_FEATURE_ADC16_HAS_PGA_CHOPPING
elessair 0:f269e3021894 288 if (config->disablePgaChopping)
elessair 0:f269e3021894 289 {
elessair 0:f269e3021894 290 tmp32 |= ADC_PGA_PGACHPb_MASK;
elessair 0:f269e3021894 291 }
elessair 0:f269e3021894 292 #endif /* FSL_FEATURE_ADC16_HAS_PGA_CHOPPING */
elessair 0:f269e3021894 293 #if defined(FSL_FEATURE_ADC16_HAS_PGA_OFFSET_MEASUREMENT) && FSL_FEATURE_ADC16_HAS_PGA_OFFSET_MEASUREMENT
elessair 0:f269e3021894 294 if (config->enableRunInOffsetMeasurement)
elessair 0:f269e3021894 295 {
elessair 0:f269e3021894 296 tmp32 |= ADC_PGA_PGAOFSM_MASK;
elessair 0:f269e3021894 297 }
elessair 0:f269e3021894 298 #endif /* FSL_FEATURE_ADC16_HAS_PGA_OFFSET_MEASUREMENT */
elessair 0:f269e3021894 299 base->PGA = tmp32;
elessair 0:f269e3021894 300 }
elessair 0:f269e3021894 301 #endif /* FSL_FEATURE_ADC16_HAS_PGA */
elessair 0:f269e3021894 302
elessair 0:f269e3021894 303 uint32_t ADC16_GetStatusFlags(ADC_Type *base)
elessair 0:f269e3021894 304 {
elessair 0:f269e3021894 305 uint32_t ret = 0;
elessair 0:f269e3021894 306
elessair 0:f269e3021894 307 if (0U != (base->SC2 & ADC_SC2_ADACT_MASK))
elessair 0:f269e3021894 308 {
elessair 0:f269e3021894 309 ret |= kADC16_ActiveFlag;
elessair 0:f269e3021894 310 }
elessair 0:f269e3021894 311 #if defined(FSL_FEATURE_ADC16_HAS_CALIBRATION) && FSL_FEATURE_ADC16_HAS_CALIBRATION
elessair 0:f269e3021894 312 if (0U != (base->SC3 & ADC_SC3_CALF_MASK))
elessair 0:f269e3021894 313 {
elessair 0:f269e3021894 314 ret |= kADC16_CalibrationFailedFlag;
elessair 0:f269e3021894 315 }
elessair 0:f269e3021894 316 #endif /* FSL_FEATURE_ADC16_HAS_CALIBRATION */
elessair 0:f269e3021894 317 return ret;
elessair 0:f269e3021894 318 }
elessair 0:f269e3021894 319
elessair 0:f269e3021894 320 void ADC16_ClearStatusFlags(ADC_Type *base, uint32_t mask)
elessair 0:f269e3021894 321 {
elessair 0:f269e3021894 322 #if defined(FSL_FEATURE_ADC16_HAS_CALIBRATION) && FSL_FEATURE_ADC16_HAS_CALIBRATION
elessair 0:f269e3021894 323 if (0U != (mask & kADC16_CalibrationFailedFlag))
elessair 0:f269e3021894 324 {
elessair 0:f269e3021894 325 base->SC3 |= ADC_SC3_CALF_MASK;
elessair 0:f269e3021894 326 }
elessair 0:f269e3021894 327 #endif /* FSL_FEATURE_ADC16_HAS_CALIBRATION */
elessair 0:f269e3021894 328 }
elessair 0:f269e3021894 329
elessair 0:f269e3021894 330 void ADC16_SetChannelConfig(ADC_Type *base, uint32_t channelGroup, const adc16_channel_config_t *config)
elessair 0:f269e3021894 331 {
elessair 0:f269e3021894 332 assert(channelGroup < ADC_SC1_COUNT);
elessair 0:f269e3021894 333 assert(NULL != config);
elessair 0:f269e3021894 334
elessair 0:f269e3021894 335 uint32_t sc1 = ADC_SC1_ADCH(config->channelNumber); /* Set the channel number. */
elessair 0:f269e3021894 336
elessair 0:f269e3021894 337 #if defined(FSL_FEATURE_ADC16_HAS_DIFF_MODE) && FSL_FEATURE_ADC16_HAS_DIFF_MODE
elessair 0:f269e3021894 338 /* Enable the differential conversion. */
elessair 0:f269e3021894 339 if (config->enableDifferentialConversion)
elessair 0:f269e3021894 340 {
elessair 0:f269e3021894 341 sc1 |= ADC_SC1_DIFF_MASK;
elessair 0:f269e3021894 342 }
elessair 0:f269e3021894 343 #endif /* FSL_FEATURE_ADC16_HAS_DIFF_MODE */
elessair 0:f269e3021894 344 /* Enable the interrupt when the conversion is done. */
elessair 0:f269e3021894 345 if (config->enableInterruptOnConversionCompleted)
elessair 0:f269e3021894 346 {
elessair 0:f269e3021894 347 sc1 |= ADC_SC1_AIEN_MASK;
elessair 0:f269e3021894 348 }
elessair 0:f269e3021894 349 base->SC1[channelGroup] = sc1;
elessair 0:f269e3021894 350 }
elessair 0:f269e3021894 351
elessair 0:f269e3021894 352 uint32_t ADC16_GetChannelStatusFlags(ADC_Type *base, uint32_t channelGroup)
elessair 0:f269e3021894 353 {
elessair 0:f269e3021894 354 assert(channelGroup < ADC_SC1_COUNT);
elessair 0:f269e3021894 355
elessair 0:f269e3021894 356 uint32_t ret = 0U;
elessair 0:f269e3021894 357
elessair 0:f269e3021894 358 if (0U != (base->SC1[channelGroup] & ADC_SC1_COCO_MASK))
elessair 0:f269e3021894 359 {
elessair 0:f269e3021894 360 ret |= kADC16_ChannelConversionDoneFlag;
elessair 0:f269e3021894 361 }
elessair 0:f269e3021894 362 return ret;
elessair 0:f269e3021894 363 }