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targets/TARGET_Freescale/TARGET_KSDK2_MCUS/TARGET_K22F/drivers/fsl_llwu.c@0:f269e3021894, 2016-10-23 (annotated)

Committer:
elessair
Date:
Sun Oct 23 15:10:02 2016 +0000
Revision:
0:f269e3021894
Initial commit

Who changed what in which revision?

UserRevisionLine numberNew contents of line
elessair 0:f269e3021894 1 /*
elessair 0:f269e3021894 2 * Copyright (c) 2015, Freescale Semiconductor, Inc.
elessair 0:f269e3021894 3 * All rights reserved.
elessair 0:f269e3021894 4 *
elessair 0:f269e3021894 5 * Redistribution and use in source and binary forms, with or without modification,
elessair 0:f269e3021894 6 * are permitted provided that the following conditions are met:
elessair 0:f269e3021894 7 *
elessair 0:f269e3021894 8 * o Redistributions of source code must retain the above copyright notice, this list
elessair 0:f269e3021894 9 * of conditions and the following disclaimer.
elessair 0:f269e3021894 10 *
elessair 0:f269e3021894 11 * o Redistributions in binary form must reproduce the above copyright notice, this
elessair 0:f269e3021894 12 * list of conditions and the following disclaimer in the documentation and/or
elessair 0:f269e3021894 13 * other materials provided with the distribution.
elessair 0:f269e3021894 14 *
elessair 0:f269e3021894 15 * o Neither the name of Freescale Semiconductor, Inc. nor the names of its
elessair 0:f269e3021894 16 * contributors may be used to endorse or promote products derived from this
elessair 0:f269e3021894 17 * software without specific prior written permission.
elessair 0:f269e3021894 18 *
elessair 0:f269e3021894 19 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
elessair 0:f269e3021894 20 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
elessair 0:f269e3021894 21 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
elessair 0:f269e3021894 22 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
elessair 0:f269e3021894 23 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
elessair 0:f269e3021894 24 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
elessair 0:f269e3021894 25 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
elessair 0:f269e3021894 26 * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
elessair 0:f269e3021894 27 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
elessair 0:f269e3021894 28 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
elessair 0:f269e3021894 29 */
elessair 0:f269e3021894 30
elessair 0:f269e3021894 31 #include "fsl_llwu.h"
elessair 0:f269e3021894 32
elessair 0:f269e3021894 33 #if (defined(FSL_FEATURE_LLWU_HAS_EXTERNAL_PIN) && FSL_FEATURE_LLWU_HAS_EXTERNAL_PIN)
elessair 0:f269e3021894 34 void LLWU_SetExternalWakeupPinMode(LLWU_Type *base, uint32_t pinIndex, llwu_external_pin_mode_t pinMode)
elessair 0:f269e3021894 35 {
elessair 0:f269e3021894 36 #if (defined(FSL_FEATURE_LLWU_REG_BITWIDTH) && (FSL_FEATURE_LLWU_REG_BITWIDTH == 32))
elessair 0:f269e3021894 37 volatile uint32_t *regBase;
elessair 0:f269e3021894 38 uint32_t regOffset;
elessair 0:f269e3021894 39 uint32_t reg;
elessair 0:f269e3021894 40
elessair 0:f269e3021894 41 switch (pinIndex >> 4U)
elessair 0:f269e3021894 42 {
elessair 0:f269e3021894 43 case 0U:
elessair 0:f269e3021894 44 regBase = &base->PE1;
elessair 0:f269e3021894 45 break;
elessair 0:f269e3021894 46 #if (defined(FSL_FEATURE_LLWU_HAS_EXTERNAL_PIN) && (FSL_FEATURE_LLWU_HAS_EXTERNAL_PIN > 16))
elessair 0:f269e3021894 47 case 1U:
elessair 0:f269e3021894 48 regBase = &base->PE2;
elessair 0:f269e3021894 49 break;
elessair 0:f269e3021894 50 #endif
elessair 0:f269e3021894 51 default:
elessair 0:f269e3021894 52 regBase = NULL;
elessair 0:f269e3021894 53 break;
elessair 0:f269e3021894 54 }
elessair 0:f269e3021894 55 #else
elessair 0:f269e3021894 56 volatile uint8_t *regBase;
elessair 0:f269e3021894 57 uint8_t regOffset;
elessair 0:f269e3021894 58 uint8_t reg;
elessair 0:f269e3021894 59 switch (pinIndex >> 2U)
elessair 0:f269e3021894 60 {
elessair 0:f269e3021894 61 case 0U:
elessair 0:f269e3021894 62 regBase = &base->PE1;
elessair 0:f269e3021894 63 break;
elessair 0:f269e3021894 64 case 1U:
elessair 0:f269e3021894 65 regBase = &base->PE2;
elessair 0:f269e3021894 66 break;
elessair 0:f269e3021894 67 #if (defined(FSL_FEATURE_LLWU_HAS_EXTERNAL_PIN) && (FSL_FEATURE_LLWU_HAS_EXTERNAL_PIN > 8))
elessair 0:f269e3021894 68 case 2U:
elessair 0:f269e3021894 69 regBase = &base->PE3;
elessair 0:f269e3021894 70 break;
elessair 0:f269e3021894 71 #endif
elessair 0:f269e3021894 72 #if (defined(FSL_FEATURE_LLWU_HAS_EXTERNAL_PIN) && (FSL_FEATURE_LLWU_HAS_EXTERNAL_PIN > 12))
elessair 0:f269e3021894 73 case 3U:
elessair 0:f269e3021894 74 regBase = &base->PE4;
elessair 0:f269e3021894 75 break;
elessair 0:f269e3021894 76 #endif
elessair 0:f269e3021894 77 #if (defined(FSL_FEATURE_LLWU_HAS_EXTERNAL_PIN) && (FSL_FEATURE_LLWU_HAS_EXTERNAL_PIN > 16))
elessair 0:f269e3021894 78 case 4U:
elessair 0:f269e3021894 79 regBase = &base->PE5;
elessair 0:f269e3021894 80 break;
elessair 0:f269e3021894 81 #endif
elessair 0:f269e3021894 82 #if (defined(FSL_FEATURE_LLWU_HAS_EXTERNAL_PIN) && (FSL_FEATURE_LLWU_HAS_EXTERNAL_PIN > 20))
elessair 0:f269e3021894 83 case 5U:
elessair 0:f269e3021894 84 regBase = &base->PE6;
elessair 0:f269e3021894 85 break;
elessair 0:f269e3021894 86 #endif
elessair 0:f269e3021894 87 #if (defined(FSL_FEATURE_LLWU_HAS_EXTERNAL_PIN) && (FSL_FEATURE_LLWU_HAS_EXTERNAL_PIN > 24))
elessair 0:f269e3021894 88 case 6U:
elessair 0:f269e3021894 89 regBase = &base->PE7;
elessair 0:f269e3021894 90 break;
elessair 0:f269e3021894 91 #endif
elessair 0:f269e3021894 92 #if (defined(FSL_FEATURE_LLWU_HAS_EXTERNAL_PIN) && (FSL_FEATURE_LLWU_HAS_EXTERNAL_PIN > 28))
elessair 0:f269e3021894 93 case 7U:
elessair 0:f269e3021894 94 regBase = &base->PE8;
elessair 0:f269e3021894 95 break;
elessair 0:f269e3021894 96 #endif
elessair 0:f269e3021894 97 default:
elessair 0:f269e3021894 98 regBase = NULL;
elessair 0:f269e3021894 99 break;
elessair 0:f269e3021894 100 }
elessair 0:f269e3021894 101 #endif /* FSL_FEATURE_LLWU_REG_BITWIDTH == 32 */
elessair 0:f269e3021894 102
elessair 0:f269e3021894 103 if (regBase)
elessair 0:f269e3021894 104 {
elessair 0:f269e3021894 105 reg = *regBase;
elessair 0:f269e3021894 106 #if (defined(FSL_FEATURE_LLWU_REG_BITWIDTH) && (FSL_FEATURE_LLWU_REG_BITWIDTH == 32))
elessair 0:f269e3021894 107 regOffset = ((pinIndex & 0x0FU) << 1U);
elessair 0:f269e3021894 108 #else
elessair 0:f269e3021894 109 regOffset = ((pinIndex & 0x03U) << 1U);
elessair 0:f269e3021894 110 #endif
elessair 0:f269e3021894 111 reg &= ~(0x3U << regOffset);
elessair 0:f269e3021894 112 reg |= ((uint32_t)pinMode << regOffset);
elessair 0:f269e3021894 113 *regBase = reg;
elessair 0:f269e3021894 114 }
elessair 0:f269e3021894 115 }
elessair 0:f269e3021894 116
elessair 0:f269e3021894 117 bool LLWU_GetExternalWakeupPinFlag(LLWU_Type *base, uint32_t pinIndex)
elessair 0:f269e3021894 118 {
elessair 0:f269e3021894 119 #if (defined(FSL_FEATURE_LLWU_REG_BITWIDTH) && (FSL_FEATURE_LLWU_REG_BITWIDTH == 32))
elessair 0:f269e3021894 120 return (bool)(base->PF & (1U << pinIndex));
elessair 0:f269e3021894 121 #else
elessair 0:f269e3021894 122 volatile uint8_t *regBase;
elessair 0:f269e3021894 123
elessair 0:f269e3021894 124 switch (pinIndex >> 3U)
elessair 0:f269e3021894 125 {
elessair 0:f269e3021894 126 #if (defined(FSL_FEATURE_LLWU_HAS_PF) && FSL_FEATURE_LLWU_HAS_PF)
elessair 0:f269e3021894 127 case 0U:
elessair 0:f269e3021894 128 regBase = &base->PF1;
elessair 0:f269e3021894 129 break;
elessair 0:f269e3021894 130 #if (defined(FSL_FEATURE_LLWU_HAS_EXTERNAL_PIN) && (FSL_FEATURE_LLWU_HAS_EXTERNAL_PIN > 8))
elessair 0:f269e3021894 131 case 1U:
elessair 0:f269e3021894 132 regBase = &base->PF2;
elessair 0:f269e3021894 133 break;
elessair 0:f269e3021894 134 #endif /* FSL_FEATURE_LLWU_HAS_EXTERNAL_PIN */
elessair 0:f269e3021894 135 #if (defined(FSL_FEATURE_LLWU_HAS_EXTERNAL_PIN) && (FSL_FEATURE_LLWU_HAS_EXTERNAL_PIN > 16))
elessair 0:f269e3021894 136 case 2U:
elessair 0:f269e3021894 137 regBase = &base->PF3;
elessair 0:f269e3021894 138 break;
elessair 0:f269e3021894 139 #endif /* FSL_FEATURE_LLWU_HAS_EXTERNAL_PIN */
elessair 0:f269e3021894 140 #if (defined(FSL_FEATURE_LLWU_HAS_EXTERNAL_PIN) && (FSL_FEATURE_LLWU_HAS_EXTERNAL_PIN > 24))
elessair 0:f269e3021894 141 case 3U:
elessair 0:f269e3021894 142 regBase = &base->PF4;
elessair 0:f269e3021894 143 break;
elessair 0:f269e3021894 144 #endif /* FSL_FEATURE_LLWU_HAS_EXTERNAL_PIN */
elessair 0:f269e3021894 145 #else
elessair 0:f269e3021894 146 case 0U:
elessair 0:f269e3021894 147 regBase = &base->F1;
elessair 0:f269e3021894 148 break;
elessair 0:f269e3021894 149 #if (defined(FSL_FEATURE_LLWU_HAS_EXTERNAL_PIN) && (FSL_FEATURE_LLWU_HAS_EXTERNAL_PIN > 8))
elessair 0:f269e3021894 150 case 1U:
elessair 0:f269e3021894 151 regBase = &base->F2;
elessair 0:f269e3021894 152 break;
elessair 0:f269e3021894 153 #endif /* FSL_FEATURE_LLWU_HAS_EXTERNAL_PIN */
elessair 0:f269e3021894 154 #if (defined(FSL_FEATURE_LLWU_HAS_EXTERNAL_PIN) && (FSL_FEATURE_LLWU_HAS_EXTERNAL_PIN > 16))
elessair 0:f269e3021894 155 case 2U:
elessair 0:f269e3021894 156 regBase = &base->F3;
elessair 0:f269e3021894 157 break;
elessair 0:f269e3021894 158 #endif /* FSL_FEATURE_LLWU_HAS_EXTERNAL_PIN */
elessair 0:f269e3021894 159 #if (defined(FSL_FEATURE_LLWU_HAS_EXTERNAL_PIN) && (FSL_FEATURE_LLWU_HAS_EXTERNAL_PIN > 24))
elessair 0:f269e3021894 160 case 3U:
elessair 0:f269e3021894 161 regBase = &base->F4;
elessair 0:f269e3021894 162 break;
elessair 0:f269e3021894 163 #endif /* FSL_FEATURE_LLWU_HAS_EXTERNAL_PIN */
elessair 0:f269e3021894 164 #endif /* FSL_FEATURE_LLWU_HAS_PF */
elessair 0:f269e3021894 165 default:
elessair 0:f269e3021894 166 regBase = NULL;
elessair 0:f269e3021894 167 break;
elessair 0:f269e3021894 168 }
elessair 0:f269e3021894 169
elessair 0:f269e3021894 170 if (regBase)
elessair 0:f269e3021894 171 {
elessair 0:f269e3021894 172 return (bool)(*regBase & (1U << pinIndex % 8));
elessair 0:f269e3021894 173 }
elessair 0:f269e3021894 174 else
elessair 0:f269e3021894 175 {
elessair 0:f269e3021894 176 return false;
elessair 0:f269e3021894 177 }
elessair 0:f269e3021894 178 #endif /* FSL_FEATURE_LLWU_REG_BITWIDTH */
elessair 0:f269e3021894 179 }
elessair 0:f269e3021894 180
elessair 0:f269e3021894 181 void LLWU_ClearExternalWakeupPinFlag(LLWU_Type *base, uint32_t pinIndex)
elessair 0:f269e3021894 182 {
elessair 0:f269e3021894 183 #if (defined(FSL_FEATURE_LLWU_REG_BITWIDTH) && (FSL_FEATURE_LLWU_REG_BITWIDTH == 32))
elessair 0:f269e3021894 184 base->PF = (1U << pinIndex);
elessair 0:f269e3021894 185 #else
elessair 0:f269e3021894 186 volatile uint8_t *regBase;
elessair 0:f269e3021894 187 switch (pinIndex >> 3U)
elessair 0:f269e3021894 188 {
elessair 0:f269e3021894 189 #if (defined(FSL_FEATURE_LLWU_HAS_PF) && FSL_FEATURE_LLWU_HAS_PF)
elessair 0:f269e3021894 190 case 0U:
elessair 0:f269e3021894 191 regBase = &base->PF1;
elessair 0:f269e3021894 192 break;
elessair 0:f269e3021894 193 #if (defined(FSL_FEATURE_LLWU_HAS_EXTERNAL_PIN) && (FSL_FEATURE_LLWU_HAS_EXTERNAL_PIN > 8))
elessair 0:f269e3021894 194 case 1U:
elessair 0:f269e3021894 195 regBase = &base->PF2;
elessair 0:f269e3021894 196 break;
elessair 0:f269e3021894 197 #endif /* FSL_FEATURE_LLWU_HAS_EXTERNAL_PIN */
elessair 0:f269e3021894 198 #if (defined(FSL_FEATURE_LLWU_HAS_EXTERNAL_PIN) && (FSL_FEATURE_LLWU_HAS_EXTERNAL_PIN > 16))
elessair 0:f269e3021894 199 case 2U:
elessair 0:f269e3021894 200 regBase = &base->PF3;
elessair 0:f269e3021894 201 break;
elessair 0:f269e3021894 202 #endif /* FSL_FEATURE_LLWU_HAS_EXTERNAL_PIN */
elessair 0:f269e3021894 203 #if (defined(FSL_FEATURE_LLWU_HAS_EXTERNAL_PIN) && (FSL_FEATURE_LLWU_HAS_EXTERNAL_PIN > 24))
elessair 0:f269e3021894 204 case 3U:
elessair 0:f269e3021894 205 regBase = &base->PF4;
elessair 0:f269e3021894 206 break;
elessair 0:f269e3021894 207 #endif /* FSL_FEATURE_LLWU_HAS_EXTERNAL_PIN */
elessair 0:f269e3021894 208 #else
elessair 0:f269e3021894 209 case 0U:
elessair 0:f269e3021894 210 regBase = &base->F1;
elessair 0:f269e3021894 211 break;
elessair 0:f269e3021894 212 #if (defined(FSL_FEATURE_LLWU_HAS_EXTERNAL_PIN) && (FSL_FEATURE_LLWU_HAS_EXTERNAL_PIN > 8))
elessair 0:f269e3021894 213 case 1U:
elessair 0:f269e3021894 214 regBase = &base->F2;
elessair 0:f269e3021894 215 break;
elessair 0:f269e3021894 216 #endif /* FSL_FEATURE_LLWU_HAS_EXTERNAL_PIN */
elessair 0:f269e3021894 217 #if (defined(FSL_FEATURE_LLWU_HAS_EXTERNAL_PIN) && (FSL_FEATURE_LLWU_HAS_EXTERNAL_PIN > 16))
elessair 0:f269e3021894 218 case 2U:
elessair 0:f269e3021894 219 regBase = &base->F3;
elessair 0:f269e3021894 220 break;
elessair 0:f269e3021894 221 #endif /* FSL_FEATURE_LLWU_HAS_EXTERNAL_PIN */
elessair 0:f269e3021894 222 #if (defined(FSL_FEATURE_LLWU_HAS_EXTERNAL_PIN) && (FSL_FEATURE_LLWU_HAS_EXTERNAL_PIN > 24))
elessair 0:f269e3021894 223 case 3U:
elessair 0:f269e3021894 224 regBase = &base->F4;
elessair 0:f269e3021894 225 break;
elessair 0:f269e3021894 226 #endif /* FSL_FEATURE_LLWU_HAS_EXTERNAL_PIN */
elessair 0:f269e3021894 227 #endif /* FSL_FEATURE_LLWU_HAS_PF */
elessair 0:f269e3021894 228 default:
elessair 0:f269e3021894 229 regBase = NULL;
elessair 0:f269e3021894 230 break;
elessair 0:f269e3021894 231 }
elessair 0:f269e3021894 232 if (regBase)
elessair 0:f269e3021894 233 {
elessair 0:f269e3021894 234 *regBase = (1U << pinIndex % 8U);
elessair 0:f269e3021894 235 }
elessair 0:f269e3021894 236 #endif /* FSL_FEATURE_LLWU_REG_BITWIDTH */
elessair 0:f269e3021894 237 }
elessair 0:f269e3021894 238 #endif /* FSL_FEATURE_LLWU_HAS_EXTERNAL_PIN */
elessair 0:f269e3021894 239
elessair 0:f269e3021894 240 #if (defined(FSL_FEATURE_LLWU_HAS_PIN_FILTER) && FSL_FEATURE_LLWU_HAS_PIN_FILTER)
elessair 0:f269e3021894 241 void LLWU_SetPinFilterMode(LLWU_Type *base, uint32_t filterIndex, llwu_external_pin_filter_mode_t filterMode)
elessair 0:f269e3021894 242 {
elessair 0:f269e3021894 243 #if (defined(FSL_FEATURE_LLWU_REG_BITWIDTH) && (FSL_FEATURE_LLWU_REG_BITWIDTH == 32))
elessair 0:f269e3021894 244 uint32_t reg;
elessair 0:f269e3021894 245
elessair 0:f269e3021894 246 reg = base->FILT;
elessair 0:f269e3021894 247 reg &= ~((LLWU_FILT_FILTSEL1_MASK | LLWU_FILT_FILTE1_MASK) << (filterIndex * 8U - 1U));
elessair 0:f269e3021894 248 reg |= (((filterMode.pinIndex << LLWU_FILT_FILTSEL1_SHIFT) | (filterMode.filterMode << LLWU_FILT_FILTE1_SHIFT)
elessair 0:f269e3021894 249 /* Clear the Filter Detect Flag */
elessair 0:f269e3021894 250 | LLWU_FILT_FILTF1_MASK)
elessair 0:f269e3021894 251 << (filterIndex * 8U - 1U));
elessair 0:f269e3021894 252 base->FILT = reg;
elessair 0:f269e3021894 253 #else
elessair 0:f269e3021894 254 volatile uint8_t *regBase;
elessair 0:f269e3021894 255 uint8_t reg;
elessair 0:f269e3021894 256
elessair 0:f269e3021894 257 switch (filterIndex)
elessair 0:f269e3021894 258 {
elessair 0:f269e3021894 259 case 1:
elessair 0:f269e3021894 260 regBase = &base->FILT1;
elessair 0:f269e3021894 261 break;
elessair 0:f269e3021894 262 #if (defined(FSL_FEATURE_LLWU_HAS_PIN_FILTER) && (FSL_FEATURE_LLWU_HAS_PIN_FILTER > 1))
elessair 0:f269e3021894 263 case 2:
elessair 0:f269e3021894 264 regBase = &base->FILT2;
elessair 0:f269e3021894 265 break;
elessair 0:f269e3021894 266 #endif /* FSL_FEATURE_LLWU_HAS_PIN_FILTER */
elessair 0:f269e3021894 267 #if (defined(FSL_FEATURE_LLWU_HAS_PIN_FILTER) && (FSL_FEATURE_LLWU_HAS_PIN_FILTER > 2))
elessair 0:f269e3021894 268 case 3:
elessair 0:f269e3021894 269 regBase = &base->FILT3;
elessair 0:f269e3021894 270 break;
elessair 0:f269e3021894 271 #endif /* FSL_FEATURE_LLWU_HAS_PIN_FILTER */
elessair 0:f269e3021894 272 #if (defined(FSL_FEATURE_LLWU_HAS_PIN_FILTER) && (FSL_FEATURE_LLWU_HAS_PIN_FILTER > 3))
elessair 0:f269e3021894 273 case 4:
elessair 0:f269e3021894 274 regBase = &base->FILT4;
elessair 0:f269e3021894 275 break;
elessair 0:f269e3021894 276 #endif /* FSL_FEATURE_LLWU_HAS_PIN_FILTER */
elessair 0:f269e3021894 277 default:
elessair 0:f269e3021894 278 regBase = NULL;
elessair 0:f269e3021894 279 break;
elessair 0:f269e3021894 280 }
elessair 0:f269e3021894 281
elessair 0:f269e3021894 282 if (regBase)
elessair 0:f269e3021894 283 {
elessair 0:f269e3021894 284 reg = *regBase;
elessair 0:f269e3021894 285 reg &= ~(LLWU_FILT1_FILTSEL_MASK | LLWU_FILT1_FILTE_MASK);
elessair 0:f269e3021894 286 reg |= ((uint32_t)filterMode.pinIndex << LLWU_FILT1_FILTSEL_SHIFT);
elessair 0:f269e3021894 287 reg |= ((uint32_t)filterMode.filterMode << LLWU_FILT1_FILTE_SHIFT);
elessair 0:f269e3021894 288 /* Clear the Filter Detect Flag */
elessair 0:f269e3021894 289 reg |= LLWU_FILT1_FILTF_MASK;
elessair 0:f269e3021894 290 *regBase = reg;
elessair 0:f269e3021894 291 }
elessair 0:f269e3021894 292 #endif /* FSL_FEATURE_LLWU_REG_BITWIDTH */
elessair 0:f269e3021894 293 }
elessair 0:f269e3021894 294
elessair 0:f269e3021894 295 bool LLWU_GetPinFilterFlag(LLWU_Type *base, uint32_t filterIndex)
elessair 0:f269e3021894 296 {
elessair 0:f269e3021894 297 #if (defined(FSL_FEATURE_LLWU_REG_BITWIDTH) && (FSL_FEATURE_LLWU_REG_BITWIDTH == 32))
elessair 0:f269e3021894 298 return (bool)(base->FILT & (1U << (filterIndex * 8U - 1)));
elessair 0:f269e3021894 299 #else
elessair 0:f269e3021894 300 bool status = false;
elessair 0:f269e3021894 301
elessair 0:f269e3021894 302 switch (filterIndex)
elessair 0:f269e3021894 303 {
elessair 0:f269e3021894 304 case 1:
elessair 0:f269e3021894 305 status = (base->FILT1 & LLWU_FILT1_FILTF_MASK);
elessair 0:f269e3021894 306 break;
elessair 0:f269e3021894 307 #if (defined(FSL_FEATURE_LLWU_HAS_PIN_FILTER) && (FSL_FEATURE_LLWU_HAS_PIN_FILTER > 1))
elessair 0:f269e3021894 308 case 2:
elessair 0:f269e3021894 309 status = (base->FILT2 & LLWU_FILT2_FILTF_MASK);
elessair 0:f269e3021894 310 break;
elessair 0:f269e3021894 311 #endif /* FSL_FEATURE_LLWU_HAS_PIN_FILTER */
elessair 0:f269e3021894 312 #if (defined(FSL_FEATURE_LLWU_HAS_PIN_FILTER) && (FSL_FEATURE_LLWU_HAS_PIN_FILTER > 2))
elessair 0:f269e3021894 313 case 3:
elessair 0:f269e3021894 314 status = (base->FILT3 & LLWU_FILT3_FILTF_MASK);
elessair 0:f269e3021894 315 break;
elessair 0:f269e3021894 316 #endif /* FSL_FEATURE_LLWU_HAS_PIN_FILTER */
elessair 0:f269e3021894 317 #if (defined(FSL_FEATURE_LLWU_HAS_PIN_FILTER) && (FSL_FEATURE_LLWU_HAS_PIN_FILTER > 3))
elessair 0:f269e3021894 318 case 4:
elessair 0:f269e3021894 319 status = (base->FILT4 & LLWU_FILT4_FILTF_MASK);
elessair 0:f269e3021894 320 break;
elessair 0:f269e3021894 321 #endif /* FSL_FEATURE_LLWU_HAS_PIN_FILTER */
elessair 0:f269e3021894 322 default:
elessair 0:f269e3021894 323 break;
elessair 0:f269e3021894 324 }
elessair 0:f269e3021894 325
elessair 0:f269e3021894 326 return status;
elessair 0:f269e3021894 327 #endif /* FSL_FEATURE_LLWU_REG_BITWIDTH */
elessair 0:f269e3021894 328 }
elessair 0:f269e3021894 329
elessair 0:f269e3021894 330 void LLWU_ClearPinFilterFlag(LLWU_Type *base, uint32_t filterIndex)
elessair 0:f269e3021894 331 {
elessair 0:f269e3021894 332 #if (defined(FSL_FEATURE_LLWU_REG_BITWIDTH) && (FSL_FEATURE_LLWU_REG_BITWIDTH == 32))
elessair 0:f269e3021894 333 uint32_t reg;
elessair 0:f269e3021894 334
elessair 0:f269e3021894 335 reg = base->FILT;
elessair 0:f269e3021894 336 switch (filterIndex)
elessair 0:f269e3021894 337 {
elessair 0:f269e3021894 338 case 1:
elessair 0:f269e3021894 339 reg |= LLWU_FILT_FILTF1_MASK;
elessair 0:f269e3021894 340 break;
elessair 0:f269e3021894 341 case 2:
elessair 0:f269e3021894 342 reg |= LLWU_FILT_FILTF2_MASK;
elessair 0:f269e3021894 343 break;
elessair 0:f269e3021894 344 case 3:
elessair 0:f269e3021894 345 reg |= LLWU_FILT_FILTF3_MASK;
elessair 0:f269e3021894 346 break;
elessair 0:f269e3021894 347 case 4:
elessair 0:f269e3021894 348 reg |= LLWU_FILT_FILTF4_MASK;
elessair 0:f269e3021894 349 break;
elessair 0:f269e3021894 350 default:
elessair 0:f269e3021894 351 break;
elessair 0:f269e3021894 352 }
elessair 0:f269e3021894 353 base->FILT = reg;
elessair 0:f269e3021894 354 #else
elessair 0:f269e3021894 355 volatile uint8_t *regBase;
elessair 0:f269e3021894 356 uint8_t reg;
elessair 0:f269e3021894 357
elessair 0:f269e3021894 358 switch (filterIndex)
elessair 0:f269e3021894 359 {
elessair 0:f269e3021894 360 case 1:
elessair 0:f269e3021894 361 regBase = &base->FILT1;
elessair 0:f269e3021894 362 break;
elessair 0:f269e3021894 363 #if (defined(FSL_FEATURE_LLWU_HAS_PIN_FILTER) && (FSL_FEATURE_LLWU_HAS_PIN_FILTER > 1))
elessair 0:f269e3021894 364 case 2:
elessair 0:f269e3021894 365 regBase = &base->FILT2;
elessair 0:f269e3021894 366 break;
elessair 0:f269e3021894 367 #endif /* FSL_FEATURE_LLWU_HAS_PIN_FILTER */
elessair 0:f269e3021894 368 #if (defined(FSL_FEATURE_LLWU_HAS_PIN_FILTER) && (FSL_FEATURE_LLWU_HAS_PIN_FILTER > 2))
elessair 0:f269e3021894 369 case 3:
elessair 0:f269e3021894 370 regBase = &base->FILT3;
elessair 0:f269e3021894 371 break;
elessair 0:f269e3021894 372 #endif /* FSL_FEATURE_LLWU_HAS_PIN_FILTER */
elessair 0:f269e3021894 373 #if (defined(FSL_FEATURE_LLWU_HAS_PIN_FILTER) && (FSL_FEATURE_LLWU_HAS_PIN_FILTER > 3))
elessair 0:f269e3021894 374 case 4:
elessair 0:f269e3021894 375 regBase = &base->FILT4;
elessair 0:f269e3021894 376 break;
elessair 0:f269e3021894 377 #endif /* FSL_FEATURE_LLWU_HAS_PIN_FILTER */
elessair 0:f269e3021894 378 default:
elessair 0:f269e3021894 379 regBase = NULL;
elessair 0:f269e3021894 380 break;
elessair 0:f269e3021894 381 }
elessair 0:f269e3021894 382
elessair 0:f269e3021894 383 if (regBase)
elessair 0:f269e3021894 384 {
elessair 0:f269e3021894 385 reg = *regBase;
elessair 0:f269e3021894 386 reg |= LLWU_FILT1_FILTF_MASK;
elessair 0:f269e3021894 387 *regBase = reg;
elessair 0:f269e3021894 388 }
elessair 0:f269e3021894 389 #endif /* FSL_FEATURE_LLWU_REG_BITWIDTH */
elessair 0:f269e3021894 390 }
elessair 0:f269e3021894 391 #endif /* FSL_FEATURE_LLWU_HAS_PIN_FILTER */
elessair 0:f269e3021894 392
elessair 0:f269e3021894 393 #if (defined(FSL_FEATURE_LLWU_HAS_RESET_ENABLE) && FSL_FEATURE_LLWU_HAS_RESET_ENABLE)
elessair 0:f269e3021894 394 void LLWU_SetResetPinMode(LLWU_Type *base, bool pinEnable, bool enableInLowLeakageMode)
elessair 0:f269e3021894 395 {
elessair 0:f269e3021894 396 uint8_t reg;
elessair 0:f269e3021894 397
elessair 0:f269e3021894 398 reg = base->RST;
elessair 0:f269e3021894 399 reg &= ~(LLWU_RST_LLRSTE_MASK | LLWU_RST_RSTFILT_MASK);
elessair 0:f269e3021894 400 reg |=
elessair 0:f269e3021894 401 (((uint32_t)pinEnable << LLWU_RST_LLRSTE_SHIFT) | ((uint32_t)enableInLowLeakageMode << LLWU_RST_RSTFILT_SHIFT));
elessair 0:f269e3021894 402 base->RST = reg;
elessair 0:f269e3021894 403 }
elessair 0:f269e3021894 404 #endif /* FSL_FEATURE_LLWU_HAS_RESET_ENABLE */