Motoo Tanaka / BMI160

My implementation of Bosh BMI160 Only I2C is tested so far.

Dependents:   test_BMI160 TFT_test_MAX32630FTHR

BMI160.cpp@1:d56df81c389b, 2017-08-25 (annotated)

Committer:
Rhyme
Date:
Fri Aug 25 08:23:39 2017 +0000
Revision:
1:d56df81c389b
Parent:
0:9aed6f5a35c0
Child:
3:9d3079170b35
Minimum data acquisition functions are in place.; Still needs some more work though.

Who changed what in which revision?

UserRevisionLine numberNew contents of line
Rhyme 0:9aed6f5a35c0 1 #include "mbed.h"
Rhyme 0:9aed6f5a35c0 2 #include "BMI160.h"
Rhyme 0:9aed6f5a35c0 3
Rhyme 0:9aed6f5a35c0 4 /* register address defintions */
Rhyme 0:9aed6f5a35c0 5 #define REG_CHIP_ID 0x00 /* chip id */
Rhyme 0:9aed6f5a35c0 6 #define REG_ERR_REG 0x02
Rhyme 0:9aed6f5a35c0 7 #define REG_PMU_STATUS 0x03
Rhyme 0:9aed6f5a35c0 8 #define REG_DATA_0 0x04 /* MAG_X_LSB */
Rhyme 0:9aed6f5a35c0 9 #define REG_DATA_1 0x05 /* MAG_X_MSB */
Rhyme 0:9aed6f5a35c0 10 #define REG_DATA_2 0x06 /* MAG_Y_LSB */
Rhyme 0:9aed6f5a35c0 11 #define REG_DATA_3 0x07 /* MAG_Y_MSB */
Rhyme 0:9aed6f5a35c0 12 #define REG_DATA_4 0x08 /* MAG_Z_LSB */
Rhyme 0:9aed6f5a35c0 13 #define REG_DATA_5 0x09 /* MAG_Z_MSB */
Rhyme 0:9aed6f5a35c0 14 #define REG_DATA_6 0x0A /* RHALL_LSB */
Rhyme 0:9aed6f5a35c0 15 #define REG_DATA_7 0x0B /* RHALL_MSB */
Rhyme 0:9aed6f5a35c0 16 #define REG_DATA_8 0x0C /* GRY_X_LSB */
Rhyme 0:9aed6f5a35c0 17 #define REG_DATA_9 0x0D /* GRY_X_MSB */
Rhyme 0:9aed6f5a35c0 18 #define REG_DATA_10 0x0E /* GRY_Y_LSB */
Rhyme 0:9aed6f5a35c0 19 #define REG_DATA_11 0x0F /* GRY_Y_MSB */
Rhyme 0:9aed6f5a35c0 20 #define REG_DATA_12 0x10 /* GRY_Z_LSB */
Rhyme 0:9aed6f5a35c0 21 #define REG_DATA_13 0x11 /* GRY_Z_MSB */
Rhyme 0:9aed6f5a35c0 22 #define REG_DATA_14 0x12 /* ACC_X_LSB */
Rhyme 0:9aed6f5a35c0 23 #define REG_DATA_15 0x13 /* ACC_X_MSB */
Rhyme 0:9aed6f5a35c0 24 #define REG_DATA_16 0x14 /* ACC_Y_LSB */
Rhyme 0:9aed6f5a35c0 25 #define REG_DATA_17 0x15 /* ACC_Y_MSB */
Rhyme 0:9aed6f5a35c0 26 #define REG_DATA_18 0x16 /* ACC_Z_LSB */
Rhyme 0:9aed6f5a35c0 27 #define REG_DATA_19 0x17 /* ACC_Z_MSB */
Rhyme 0:9aed6f5a35c0 28 #define REG_SENSORTIME_0 0x18 /* SENSOR_TIME_LSB */
Rhyme 0:9aed6f5a35c0 29 #define REG_SENSORTIME_1 0x19 /* SENSOR_TIME_CSB */
Rhyme 0:9aed6f5a35c0 30 #define REG_SENSORTIME_2 0x1A /* SENSOR_TIME_MSB */
Rhyme 0:9aed6f5a35c0 31 #define REG_STATUS 0x1B
Rhyme 0:9aed6f5a35c0 32 #define REG_INT_STATUS_0 0x1C
Rhyme 0:9aed6f5a35c0 33 #define REG_INT_STATUS_1 0x1D
Rhyme 0:9aed6f5a35c0 34 #define REG_INT_STATUS_2 0x1E
Rhyme 0:9aed6f5a35c0 35 #define REG_INT_STATUS_3 0x1F
Rhyme 0:9aed6f5a35c0 36 #define REG_TEMPERATURE_0 0x20
Rhyme 0:9aed6f5a35c0 37 #define REG_TEMPERATURE_1 0x21
Rhyme 0:9aed6f5a35c0 38 #define REG_FIFO_LENGTH_0 0x22
Rhyme 0:9aed6f5a35c0 39 #define REG_FIFO_LENGTH_1 0x23
Rhyme 0:9aed6f5a35c0 40 #define REG_FIFO_DATA 0x24
Rhyme 0:9aed6f5a35c0 41 #define REG_ACC_CONF 0x40
Rhyme 0:9aed6f5a35c0 42 #define REG_ACC_RANGE 0x41
Rhyme 0:9aed6f5a35c0 43 #define REG_GYR_CONF 0x42
Rhyme 0:9aed6f5a35c0 44 #define REG_GYR_RANGE 0x43
Rhyme 0:9aed6f5a35c0 45 #define REG_MAG_CONF 0x44
Rhyme 0:9aed6f5a35c0 46 #define REG_FIFO_DOWNS 0x45
Rhyme 0:9aed6f5a35c0 47 #define REG_FIFO_CONFIG_0 0x46
Rhyme 0:9aed6f5a35c0 48 #define REG_FIFO_CONFIG_1 0x47
Rhyme 0:9aed6f5a35c0 49 #define REG_MAG_IF_0 0x4B
Rhyme 0:9aed6f5a35c0 50 #define REG_MAG_IF_1 0x4C
Rhyme 0:9aed6f5a35c0 51 #define REG_MAG_IF_2 0x4D
Rhyme 0:9aed6f5a35c0 52 #define REG_MAG_IF_3 0x4E
Rhyme 0:9aed6f5a35c0 53 #define REG_MAG_IF_4 0x4F
Rhyme 0:9aed6f5a35c0 54 #define REG_INT_EN_0 0x50
Rhyme 0:9aed6f5a35c0 55 #define REG_INT_EN_1 0x51
Rhyme 0:9aed6f5a35c0 56 #define REG_INT_EN_2 0x52
Rhyme 0:9aed6f5a35c0 57 #define REG_INT_OUT_CTRL 0x53
Rhyme 0:9aed6f5a35c0 58 #define REG_INT_LATCH 0x54
Rhyme 0:9aed6f5a35c0 59 #define REG_INT_MAP_0 0x55
Rhyme 0:9aed6f5a35c0 60 #define REG_INT_MAP_1 0x56
Rhyme 0:9aed6f5a35c0 61 #define REG_INT_MAP_2 0x57
Rhyme 0:9aed6f5a35c0 62 #define REG_INT_DATA_0 0x58
Rhyme 0:9aed6f5a35c0 63 #define REG_INT_DATA_1 0x59
Rhyme 0:9aed6f5a35c0 64 #define REG_LOWHIGHT_0 0x5A
Rhyme 0:9aed6f5a35c0 65 #define REG_LOWHIGHT_1 0x5B
Rhyme 0:9aed6f5a35c0 66 #define REG_LOWHIGHT_2 0x5C
Rhyme 0:9aed6f5a35c0 67 #define REG_LOWHIGHT_3 0x5D
Rhyme 0:9aed6f5a35c0 68 #define REG_LOWHIGHT_4 0x5E
Rhyme 0:9aed6f5a35c0 69 #define REG_INT_MOTION_0 0x5F
Rhyme 0:9aed6f5a35c0 70 #define REG_INT_MOTION_1 0x60
Rhyme 0:9aed6f5a35c0 71 #define REG_INT_MOTION_2 0x61
Rhyme 0:9aed6f5a35c0 72 #define REG_INT_MOTION_3 0x62
Rhyme 0:9aed6f5a35c0 73 #define REG_INT_TAP_0 0x63
Rhyme 0:9aed6f5a35c0 74 #define REG_INT_TAP_1 0x64
Rhyme 0:9aed6f5a35c0 75 #define REG_INT_ORIENT_0 0x65
Rhyme 0:9aed6f5a35c0 76 #define REG_INT_ORIENT_1 0x66
Rhyme 0:9aed6f5a35c0 77 #define REG_INT_FLAT_0 0x67
Rhyme 0:9aed6f5a35c0 78 #define REG_INT_FLAT_1 0x68
Rhyme 0:9aed6f5a35c0 79 #define REG_FOC_CONF 0x69
Rhyme 0:9aed6f5a35c0 80 #define REG_CONF 0x6A
Rhyme 0:9aed6f5a35c0 81 #define REG_IF_CONF 0x6B
Rhyme 0:9aed6f5a35c0 82 #define REG_PMU_TRIGGER 0x6C
Rhyme 0:9aed6f5a35c0 83 #define REG_SELF_TEST 0x6D
Rhyme 0:9aed6f5a35c0 84 #define REG_NV_CONF 0x70
Rhyme 0:9aed6f5a35c0 85 #define REG_OFFSET_0 0x71
Rhyme 0:9aed6f5a35c0 86 #define REG_OFFSET_1 0x72
Rhyme 0:9aed6f5a35c0 87 #define REG_OFFSET_2 0x73
Rhyme 0:9aed6f5a35c0 88 #define REG_OFFSET_3 0x74
Rhyme 0:9aed6f5a35c0 89 #define REG_OFFSET_4 0x75
Rhyme 0:9aed6f5a35c0 90 #define REG_OFFSET_5 0x76
Rhyme 0:9aed6f5a35c0 91 #define REG_OFFSET_6 0x77
Rhyme 0:9aed6f5a35c0 92 #define REG_STEP_CNT_0 0x78
Rhyme 0:9aed6f5a35c0 93 #define REG_STEP_CNT_1 0x79
Rhyme 0:9aed6f5a35c0 94 #define REG_STEP_CONF_0 0x7A
Rhyme 0:9aed6f5a35c0 95 #define REG_STEP_CONF_1 0x7B
Rhyme 0:9aed6f5a35c0 96 #define REG_CMD 0x7E
Rhyme 0:9aed6f5a35c0 97
Rhyme 0:9aed6f5a35c0 98 /* 0x00 CHIP_ID reset value = 0xD1 */
Rhyme 1:d56df81c389b 99 /* 0x02 ERR_REG Reports sensor error flags. Flags are cleared when read.
Rhyme 0:9aed6f5a35c0 100 * bit[7] mag_drdy_err
Rhyme 1:d56df81c389b 101 * bit[6] drop_cmd_err Dropped command to Register
Rhyme 0:9aed6f5a35c0 102 * bit[5] i2c_fail_err
Rhyme 1:d56df81c389b 103 * bit[4:1] err_code error code
Rhyme 1:d56df81c389b 104 * 0000: no error
Rhyme 1:d56df81c389b 105 * 0001: error
Rhyme 1:d56df81c389b 106 * 0010: error
Rhyme 1:d56df81c389b 107 * 0011: low-power mode and interrupt uses pre-filtered data
Rhyme 1:d56df81c389b 108 * 0100-0101: reserved
Rhyme 1:d56df81c389b 109 * 0110: ODRs of enabled sensors in headerless mode do not match
Rhyme 1:d56df81c389b 110 * 0111: pre-filtered data are used in low power mode
Rhyme 1:d56df81c389b 111 * 1000-1111: reserved
Rhyme 1:d56df81c389b 112 * The first reported error will be shown in the error code
Rhyme 1:d56df81c389b 113 * bit[0] fatal_err : Chip not operatable
Rhyme 0:9aed6f5a35c0 114 */
Rhyme 0:9aed6f5a35c0 115 /* 0x03 PMU_STATUS
Rhyme 0:9aed6f5a35c0 116 * bit[7:6] (reserved)
Rhyme 0:9aed6f5a35c0 117 * bit[5:4] acc_pmu_status
Rhyme 0:9aed6f5a35c0 118 * bit[3:2] gyr_pmu_status
Rhyme 0:9aed6f5a35c0 119 * bit[1:0] mag_pmu_status
Rhyme 0:9aed6f5a35c0 120 */
Rhyme 0:9aed6f5a35c0 121 /* 0x04 DATA_0 : MAG_X[7:0] */
Rhyme 0:9aed6f5a35c0 122 /* 0x05 DATA_1 : MAG_X[15:8] */
Rhyme 0:9aed6f5a35c0 123 /* 0x06 DATA_2 : MAG_Y[7:0] */
Rhyme 0:9aed6f5a35c0 124 /* 0x07 DATA_3 : MAG_Y[15:8] */
Rhyme 0:9aed6f5a35c0 125 /* 0x08 DATA_4 : MAG_Z[7:0] */
Rhyme 0:9aed6f5a35c0 126 /* 0x09 DATA_5 : MAG_Z[15:8] */
Rhyme 0:9aed6f5a35c0 127 /* 0x0A DATA_6 : RHALL[7:0] */
Rhyme 0:9aed6f5a35c0 128 /* 0x0B DATA_7 : RHALL[15:8] */
Rhyme 0:9aed6f5a35c0 129 /* 0x0C DATA_8 : GYR_X[7:0] */
Rhyme 0:9aed6f5a35c0 130 /* 0x0D DATA_9 : GYR_X[15:8] */
Rhyme 0:9aed6f5a35c0 131 /* 0x0E DATA_10 : GYR_Y[7:0] */
Rhyme 0:9aed6f5a35c0 132 /* 0x0F DATA_11 : GYR_Y[15:8] */
Rhyme 0:9aed6f5a35c0 133 /* 0x10 DATA_12 : GYR_Z[7:0] */
Rhyme 0:9aed6f5a35c0 134 /* 0x11 DATA_13 : GYR_Z[15:8] */
Rhyme 0:9aed6f5a35c0 135 /* 0x12 DATA_14 : ACC_X[7:0] */
Rhyme 0:9aed6f5a35c0 136 /* 0x13 DATA_15 : ACC_X[15:8] */
Rhyme 0:9aed6f5a35c0 137 /* 0x14 DATA_16 : ACC_Y[7:0] */
Rhyme 0:9aed6f5a35c0 138 /* 0x15 DATA_17 : ACC_Y[15:8] */
Rhyme 0:9aed6f5a35c0 139 /* 0x16 DATA_18 : ACC_Z[7:0] */
Rhyme 0:9aed6f5a35c0 140 /* 0x17 DATA_19 : ACC_Z[15:8] */
Rhyme 0:9aed6f5a35c0 141 /* 0x18 SENSORTIME_0 : sensor_time[7:0] */
Rhyme 0:9aed6f5a35c0 142 /* 0x19 SENSORTIME_1 : sensor_time[15:8] */
Rhyme 0:9aed6f5a35c0 143 /* 0x1A SENSORTIME_2 : sensor_time[23:16] */
Rhyme 0:9aed6f5a35c0 144 /* 0x1B STATUS
Rhyme 0:9aed6f5a35c0 145 * bit[7] drdy_acc
Rhyme 0:9aed6f5a35c0 146 * bit[6] drdy_gyr
Rhyme 0:9aed6f5a35c0 147 * bit[5] drfy_mag
Rhyme 0:9aed6f5a35c0 148 * bit[4] nvm_rdy
Rhyme 0:9aed6f5a35c0 149 * bit[3] foc_rdy
Rhyme 0:9aed6f5a35c0 150 * bit[2] mag_man_op
Rhyme 0:9aed6f5a35c0 151 * bit[1] gry_self_test_of
Rhyme 0:9aed6f5a35c0 152 * bit[0] (reserved)
Rhyme 0:9aed6f5a35c0 153 */
Rhyme 0:9aed6f5a35c0 154 /* 0x1C INT_STATUS_0
Rhyme 0:9aed6f5a35c0 155 * bit[7] flat_int
Rhyme 0:9aed6f5a35c0 156 * bit[6] orient_int
Rhyme 0:9aed6f5a35c0 157 * bit[5] s_tap_int
Rhyme 0:9aed6f5a35c0 158 * bit[4] d_tap_int
Rhyme 0:9aed6f5a35c0 159 * bit[3] pmu_trigger_int
Rhyme 0:9aed6f5a35c0 160 * bit[2] anym_int
Rhyme 0:9aed6f5a35c0 161 * bit[1] sigmot_int
Rhyme 0:9aed6f5a35c0 162 * bit[0] step_int
Rhyme 0:9aed6f5a35c0 163 */
Rhyme 0:9aed6f5a35c0 164 /* 0x1D INT_STATUS_1
Rhyme 0:9aed6f5a35c0 165 * bit[7] nomo_int
Rhyme 0:9aed6f5a35c0 166 * bit[6] fwm_int
Rhyme 0:9aed6f5a35c0 167 * bit[5] ffull_int
Rhyme 0:9aed6f5a35c0 168 * bit[4] drdy_int
Rhyme 0:9aed6f5a35c0 169 * bit[3] lowg_int
Rhyme 0:9aed6f5a35c0 170 * bit[2] highg_int
Rhyme 0:9aed6f5a35c0 171 * bit[1:0] (reserved)
Rhyme 0:9aed6f5a35c0 172 */
Rhyme 0:9aed6f5a35c0 173 /* 0x1E INT_STATUS_2
Rhyme 0:9aed6f5a35c0 174 * bit[7] tap_sign
Rhyme 0:9aed6f5a35c0 175 * bit[6] tap_first_z
Rhyme 0:9aed6f5a35c0 176 * bit[5] tap_first_y
Rhyme 0:9aed6f5a35c0 177 * bit[4] tap_first_x
Rhyme 0:9aed6f5a35c0 178 * bit[3] anym_sign
Rhyme 0:9aed6f5a35c0 179 * bit[2] anym_first_z
Rhyme 0:9aed6f5a35c0 180 * bit[1] anym_first_y
Rhyme 0:9aed6f5a35c0 181 * bit[0] anym_first_x
Rhyme 0:9aed6f5a35c0 182 */
Rhyme 0:9aed6f5a35c0 183 /* 0x1F INT_STATUS_3
Rhyme 0:9aed6f5a35c0 184 * bit[7] flat
Rhyme 0:9aed6f5a35c0 185 * bit[6] orient_2
Rhyme 0:9aed6f5a35c0 186 * bit[5] orient_1
Rhyme 0:9aed6f5a35c0 187 * bit[4] orient_0
Rhyme 0:9aed6f5a35c0 188 * bit[3] high_sign
Rhyme 0:9aed6f5a35c0 189 * bit[2] high_first_z
Rhyme 0:9aed6f5a35c0 190 * bit[1] high_first_y
Rhyme 0:9aed6f5a35c0 191 * bit[0] high_first_x
Rhyme 0:9aed6f5a35c0 192 */
Rhyme 0:9aed6f5a35c0 193 /* 0x20 TEMPERATURE_0 temperature[7:0] */
Rhyme 0:9aed6f5a35c0 194 /* 0x21 TEMPERATURE_1 reset value = 0x80 temperature[15:8] */
Rhyme 0:9aed6f5a35c0 195 /* 0x22 FIFO_LENGTH_0 fifo_byte_counter[7:0] */
Rhyme 0:9aed6f5a35c0 196 /* 0x23 FIFO_LENGTH_1
Rhyme 0:9aed6f5a35c0 197 * bit[7:3] (reserved)
Rhyme 0:9aed6f5a35c0 198 * bit[2:0] fifo_byte_counter[10:8]
Rhyme 0:9aed6f5a35c0 199 */
Rhyme 0:9aed6f5a35c0 200 /* 0x40 ACC_CONF reset value 0x28
Rhyme 0:9aed6f5a35c0 201 * bit[7] acc_us
Rhyme 0:9aed6f5a35c0 202 * bit[6:4] acc_bwp
Rhyme 0:9aed6f5a35c0 203 * bit[3:0] acc_odr
Rhyme 0:9aed6f5a35c0 204 */
Rhyme 0:9aed6f5a35c0 205 /* 0x41 ACC_RANGE reset value = 0x03
Rhyme 0:9aed6f5a35c0 206 * bit[7:4] (reserved)
Rhyme 0:9aed6f5a35c0 207 * bit[3:0] acc_range
Rhyme 0:9aed6f5a35c0 208 */
Rhyme 0:9aed6f5a35c0 209 /* 0x42 GYR_CONF reset value = 0x28
Rhyme 0:9aed6f5a35c0 210 * bit[7:6] (reserved)
Rhyme 0:9aed6f5a35c0 211 * bit[5:4] gyr_bwp
Rhyme 0:9aed6f5a35c0 212 * bit[3:0] gyr_odr
Rhyme 0:9aed6f5a35c0 213 */
Rhyme 0:9aed6f5a35c0 214 /* 0x43 GYR_RANGE
Rhyme 0:9aed6f5a35c0 215 * bit[7:3] (reserved)
Rhyme 0:9aed6f5a35c0 216 * bit[2:0] gyr_range
Rhyme 0:9aed6f5a35c0 217 */
Rhyme 0:9aed6f5a35c0 218 /* 0x44 MAG_CONF reset value = 0x0B
Rhyme 0:9aed6f5a35c0 219 * bit[7:4] (reserved)
Rhyme 0:9aed6f5a35c0 220 * bit[3:0] mag_odr
Rhyme 0:9aed6f5a35c0 221 */
Rhyme 0:9aed6f5a35c0 222 /* 0x45 FIFO_DOWNS reset value = 0x88
Rhyme 0:9aed6f5a35c0 223 * bit[7] acc_fifo_filt_data
Rhyme 0:9aed6f5a35c0 224 * bit[6:4] acc_fifo_downs
Rhyme 0:9aed6f5a35c0 225 * bit[3] gyr_fifo_filt_data
Rhyme 0:9aed6f5a35c0 226 * bit[2:0] gyr_fifo_downs
Rhyme 0:9aed6f5a35c0 227 */
Rhyme 0:9aed6f5a35c0 228 /* 0x46 FIFO_CONFIG_0 reset value = 0x80
Rhyme 0:9aed6f5a35c0 229 * bit[7:0] fifo_water_mark
Rhyme 0:9aed6f5a35c0 230 */
Rhyme 0:9aed6f5a35c0 231 /* 0x47 FIFO_CONFIG_1 reset value = 0x10
Rhyme 0:9aed6f5a35c0 232 * bit[7] fifo_gyr_en
Rhyme 0:9aed6f5a35c0 233 * bit[6] fifo_acc_en
Rhyme 0:9aed6f5a35c0 234 * bit[5] fifo_mag_en
Rhyme 0:9aed6f5a35c0 235 * bit[4] fifo_header_en
Rhyme 0:9aed6f5a35c0 236 * bit[3] fifo_tag_int1_en
Rhyme 0:9aed6f5a35c0 237 * bit[2] fifo_tag_int2_en
Rhyme 0:9aed6f5a35c0 238 * bit[1] fifo_time_en
Rhyme 0:9aed6f5a35c0 239 * bit[0] (reserved)
Rhyme 0:9aed6f5a35c0 240 */
Rhyme 0:9aed6f5a35c0 241 /* 0x4B MAG_IF_0 reset value = 0x20
Rhyme 0:9aed6f5a35c0 242 * bit[7:1] i2c_device_addr
Rhyme 0:9aed6f5a35c0 243 */
Rhyme 0:9aed6f5a35c0 244 /* 0x4C MAG_IF_1 reset value = 0x80
Rhyme 0:9aed6f5a35c0 245 * bit[7] mag_manual_en
Rhyme 0:9aed6f5a35c0 246 * bit[6] (reserved)
Rhyme 0:9aed6f5a35c0 247 * bit[5:2] mag_offset
Rhyme 0:9aed6f5a35c0 248 * bit[1:0] mag_rd_burst
Rhyme 0:9aed6f5a35c0 249 */
Rhyme 0:9aed6f5a35c0 250 /* 0x4D MAG_IF_2 reset value = 0x42
Rhyme 0:9aed6f5a35c0 251 * bit[7:0] read_addr
Rhyme 0:9aed6f5a35c0 252 */
Rhyme 0:9aed6f5a35c0 253 /* 0x4E MAG_IF_3 reset value = 0x4C
Rhyme 0:9aed6f5a35c0 254 * bit[7:0] write_addr
Rhyme 0:9aed6f5a35c0 255 */
Rhyme 0:9aed6f5a35c0 256 /* 0x4F MAG_IF_4 bit[7:0] write data */
Rhyme 0:9aed6f5a35c0 257 /* 0x50 INT_EN_0
Rhyme 0:9aed6f5a35c0 258 * bit[7] int_flat_en
Rhyme 0:9aed6f5a35c0 259 * bit[6] int_orient_en
Rhyme 0:9aed6f5a35c0 260 * bit[5] int_s_tap_en
Rhyme 0:9aed6f5a35c0 261 * bit[4] int_d_tap_en
Rhyme 0:9aed6f5a35c0 262 * bit[3] (reserved)
Rhyme 0:9aed6f5a35c0 263 * bit[2] int_anymo_z_en
Rhyme 0:9aed6f5a35c0 264 * bit[1] int_anymo_y_en
Rhyme 0:9aed6f5a35c0 265 * bit[0] int_anymo_x_en
Rhyme 0:9aed6f5a35c0 266 */
Rhyme 0:9aed6f5a35c0 267 /* 0x51 INT_EN_1
Rhyme 0:9aed6f5a35c0 268 * bit[7] (reserved)
Rhyme 0:9aed6f5a35c0 269 * bit[6] int_fwm_en
Rhyme 0:9aed6f5a35c0 270 * bit[5] int_ffull_en
Rhyme 0:9aed6f5a35c0 271 * bit[4] int_drdy_en
Rhyme 0:9aed6f5a35c0 272 * bit[3] int_low_en
Rhyme 0:9aed6f5a35c0 273 * bit[2] int_highg_z_en
Rhyme 0:9aed6f5a35c0 274 * bit[1] int_highg_y_en
Rhyme 0:9aed6f5a35c0 275 * bit[0] int_highg_x_en
Rhyme 0:9aed6f5a35c0 276 */
Rhyme 0:9aed6f5a35c0 277 /* 0x52 INT_EN_2
Rhyme 0:9aed6f5a35c0 278 * bit[7:4] (reserved)
Rhyme 0:9aed6f5a35c0 279 * bit[3] int_step_det_en
Rhyme 0:9aed6f5a35c0 280 * bit[2] int_nomoz_en
Rhyme 0:9aed6f5a35c0 281 * bit[1] int_nomoy_en
Rhyme 0:9aed6f5a35c0 282 * bit[0] int_nomox_en
Rhyme 0:9aed6f5a35c0 283 */
Rhyme 0:9aed6f5a35c0 284 /* 0x53 INT_OUT_CTRL
Rhyme 0:9aed6f5a35c0 285 * bit[7] int2_output_en
Rhyme 0:9aed6f5a35c0 286 * bit[6] int2_od
Rhyme 0:9aed6f5a35c0 287 * bit[5] int2_lvl
Rhyme 0:9aed6f5a35c0 288 * bit[4] int2_edge_ctrl
Rhyme 0:9aed6f5a35c0 289 * bit[3] int1_output_en
Rhyme 0:9aed6f5a35c0 290 * bit[2] int1_od
Rhyme 0:9aed6f5a35c0 291 * bit[1] int1_lvl
Rhyme 0:9aed6f5a35c0 292 * bit[0] itn1_edge_ctrl
Rhyme 0:9aed6f5a35c0 293 */
Rhyme 0:9aed6f5a35c0 294 /* 0x54 INT_LATCH
Rhyme 0:9aed6f5a35c0 295 * bit[7:6] (reserved)
Rhyme 0:9aed6f5a35c0 296 * bit[5] int2_input_en
Rhyme 0:9aed6f5a35c0 297 * bit[4] int1_input_en
Rhyme 0:9aed6f5a35c0 298 * bit[3:0] int_latch
Rhyme 0:9aed6f5a35c0 299 */
Rhyme 0:9aed6f5a35c0 300 /* 0x55 INT_MAP_0
Rhyme 0:9aed6f5a35c0 301 * bit[7] int1_flat
Rhyme 0:9aed6f5a35c0 302 * bit[6] int1_orient
Rhyme 0:9aed6f5a35c0 303 * bit[5] int1_s_tap
Rhyme 0:9aed6f5a35c0 304 * bit[4] int1_d_tap
Rhyme 0:9aed6f5a35c0 305 * bit[3] int1_nomotion
Rhyme 0:9aed6f5a35c0 306 * bit[2] int1_anymotion
Rhyme 0:9aed6f5a35c0 307 * bit[1] int1_highg
Rhyme 0:9aed6f5a35c0 308 * bit[0] int1_lowg_step
Rhyme 0:9aed6f5a35c0 309 */
Rhyme 0:9aed6f5a35c0 310 /* 0x56 INT_MAP_1
Rhyme 0:9aed6f5a35c0 311 * bit[7] int1_drdy
Rhyme 0:9aed6f5a35c0 312 * bit[6] int1_fwm
Rhyme 0:9aed6f5a35c0 313 * bit[5] int1_ffull
Rhyme 0:9aed6f5a35c0 314 * bit[4] int1_pmu_trig
Rhyme 0:9aed6f5a35c0 315 * bit[3] int2_drdy
Rhyme 0:9aed6f5a35c0 316 * bit[2] itn2_fwm
Rhyme 0:9aed6f5a35c0 317 * bit[1] int2_ffull
Rhyme 0:9aed6f5a35c0 318 * bit[0] int2_pmu_trig
Rhyme 0:9aed6f5a35c0 319 */
Rhyme 0:9aed6f5a35c0 320 /* 0x57 INT_MAP_2
Rhyme 0:9aed6f5a35c0 321 * bit[7] int2_flat
Rhyme 0:9aed6f5a35c0 322 * bit[6] int2_orient
Rhyme 0:9aed6f5a35c0 323 * bit[5] int2_s_tap
Rhyme 0:9aed6f5a35c0 324 * bit[4] int2_d_tap
Rhyme 0:9aed6f5a35c0 325 * bit[3] int2_nomotion
Rhyme 0:9aed6f5a35c0 326 * bit[2] int2_anymotion
Rhyme 0:9aed6f5a35c0 327 * bit[1] int2_highg
Rhyme 0:9aed6f5a35c0 328 * bit[0] int2_lowg_steop
Rhyme 0:9aed6f5a35c0 329 */
Rhyme 0:9aed6f5a35c0 330 /* 0x58 INT_DATA_0
Rhyme 0:9aed6f5a35c0 331 * bit[7] int_low_high_src
Rhyme 0:9aed6f5a35c0 332 * bit[6:4] (reserved)
Rhyme 0:9aed6f5a35c0 333 * bit[3] int_tap_src
Rhyme 0:9aed6f5a35c0 334 * bit[2:0] (reserved)
Rhyme 0:9aed6f5a35c0 335 */
Rhyme 0:9aed6f5a35c0 336 /* 0x59 INT_DATA_1
Rhyme 0:9aed6f5a35c0 337 * bit[7] int_motion_src
Rhyme 0:9aed6f5a35c0 338 * bit[6:0] (reseved)
Rhyme 0:9aed6f5a35c0 339 */
Rhyme 0:9aed6f5a35c0 340 /* 0x5A INT_LOWHIGH_0 reset value = 0x07
Rhyme 0:9aed6f5a35c0 341 * bit[7:0] int_low_dur
Rhyme 0:9aed6f5a35c0 342 */
Rhyme 0:9aed6f5a35c0 343 /* 0x5B INT_LOWHIGH_1 reset value = 0x30
Rhyme 0:9aed6f5a35c0 344 * bit[7:0] int_low_th
Rhyme 0:9aed6f5a35c0 345 */
Rhyme 0:9aed6f5a35c0 346 /* 0x5C INT_LOWHIGH_2 reset value = 0x81
Rhyme 0:9aed6f5a35c0 347 * bit[7:6] int_high_hy
Rhyme 0:9aed6f5a35c0 348 * bit[5:3] (reserved)
Rhyme 0:9aed6f5a35c0 349 * bit[2] int_low_mode
Rhyme 0:9aed6f5a35c0 350 * bit[1:0] int_low_hy
Rhyme 0:9aed6f5a35c0 351 */
Rhyme 0:9aed6f5a35c0 352 /* 0x5D INT_LOWHIGH_3 reset value = 0x0B
Rhyme 0:9aed6f5a35c0 353 * bit[7:0] int_high_dur
Rhyme 0:9aed6f5a35c0 354 */
Rhyme 0:9aed6f5a35c0 355 /* 0x5E INT_LOWHIGH_4 reset value = 0xC0
Rhyme 0:9aed6f5a35c0 356 * bit[7:0] int_high_th
Rhyme 0:9aed6f5a35c0 357 */
Rhyme 0:9aed6f5a35c0 358 /* 0x5F INT_MOTION_0
Rhyme 0:9aed6f5a35c0 359 * bit[7:2] int_slo_nomo_dur
Rhyme 0:9aed6f5a35c0 360 * bit[1:0] int_anym_dur
Rhyme 0:9aed6f5a35c0 361 */
Rhyme 0:9aed6f5a35c0 362 /* 0x60 INT_MOTION_1 reset value = 0x14
Rhyme 0:9aed6f5a35c0 363 * bit[7:0] int_anymo_th
Rhyme 0:9aed6f5a35c0 364 */
Rhyme 0:9aed6f5a35c0 365 /* 0x61 INT_MOTION_2 reset value = 0x14
Rhyme 0:9aed6f5a35c0 366 * bit[7:0] int_slo_nomo_th
Rhyme 0:9aed6f5a35c0 367 */
Rhyme 0:9aed6f5a35c0 368 /* 0x62 INT_MOTION_3 reset value = 0x24
Rhyme 0:9aed6f5a35c0 369 * bit[7:6] (reserved)
Rhyme 0:9aed6f5a35c0 370 * bit[5:4] int_sig_mot_proof
Rhyme 0:9aed6f5a35c0 371 */
Rhyme 0:9aed6f5a35c0 372 /* 0x63 INT_TAP_0 reset value = 0x04
Rhyme 0:9aed6f5a35c0 373 * bit[7] int_tap_quiet
Rhyme 0:9aed6f5a35c0 374 * bit[6] int_tap_shock
Rhyme 0:9aed6f5a35c0 375 * bit[5:3] (reserved)
Rhyme 0:9aed6f5a35c0 376 * bit[2:0] int_tap_dur
Rhyme 0:9aed6f5a35c0 377 */
Rhyme 0:9aed6f5a35c0 378 /* 0x64 INT_TAP_1 reset value = 0x0A
Rhyme 0:9aed6f5a35c0 379 * bit[7:5] (reserved)
Rhyme 0:9aed6f5a35c0 380 * bit[4:0] int_tap_th
Rhyme 0:9aed6f5a35c0 381 */
Rhyme 0:9aed6f5a35c0 382 /* 0x65 INT_ORIENT_0 reset value = 0x18
Rhyme 0:9aed6f5a35c0 383 * bit[7:4] int_orient_hy
Rhyme 0:9aed6f5a35c0 384 * bit[3:2] int_orient_blocking
Rhyme 0:9aed6f5a35c0 385 * bit[1:0] int_orient_mode
Rhyme 0:9aed6f5a35c0 386 */
Rhyme 0:9aed6f5a35c0 387 /* 0x66 INT_ORIENT_1 reset value = 0x48
Rhyme 0:9aed6f5a35c0 388 * bit[7] int_orient_axes_ex
Rhyme 0:9aed6f5a35c0 389 * bit[6] int_orient_ud_en
Rhyme 0:9aed6f5a35c0 390 * bit[5:0] int_orient_theta
Rhyme 0:9aed6f5a35c0 391 */
Rhyme 0:9aed6f5a35c0 392 /* 0x67 INT_FLAT_0 reset value = 0x08
Rhyme 0:9aed6f5a35c0 393 * bit[7:6] (reserved)
Rhyme 0:9aed6f5a35c0 394 * bit[5:0] int_flat_theta
Rhyme 0:9aed6f5a35c0 395 */
Rhyme 0:9aed6f5a35c0 396 /* 0x68 INT_FLAT_1 reset value = 0x11
Rhyme 0:9aed6f5a35c0 397 * bit[7:6] (reserved)
Rhyme 0:9aed6f5a35c0 398 * bit[5:4] int_flat_hold
Rhyme 0:9aed6f5a35c0 399 * bit[3:0] int_flat_hy
Rhyme 0:9aed6f5a35c0 400 */
Rhyme 0:9aed6f5a35c0 401 /* 0x69 FOC_CONF
Rhyme 0:9aed6f5a35c0 402 * bit[7] (reserved)
Rhyme 0:9aed6f5a35c0 403 * bit[6] foc_gyr_en
Rhyme 0:9aed6f5a35c0 404 * bit[5:4] foc_acc_x
Rhyme 0:9aed6f5a35c0 405 * bit[3:2] foc_acc_y
Rhyme 0:9aed6f5a35c0 406 * bit[1:0] foc_acc_z
Rhyme 0:9aed6f5a35c0 407 */
Rhyme 0:9aed6f5a35c0 408 /* 0x6A CONF
Rhyme 0:9aed6f5a35c0 409 * bit[7:2] (reserved)
Rhyme 0:9aed6f5a35c0 410 * bit[1] nvm_prog_en
Rhyme 0:9aed6f5a35c0 411 * bit[0] (reserved)
Rhyme 0:9aed6f5a35c0 412 */
Rhyme 0:9aed6f5a35c0 413 /* 0x6B IF_CONF
Rhyme 0:9aed6f5a35c0 414 * bit[7:6] (reserved)
Rhyme 0:9aed6f5a35c0 415 * bit[5:4] if_mode
Rhyme 0:9aed6f5a35c0 416 * bit[3:1] (reserved)
Rhyme 0:9aed6f5a35c0 417 * bit[0] spi3
Rhyme 0:9aed6f5a35c0 418 */
Rhyme 0:9aed6f5a35c0 419 /* 0x6C PMU_TRIGGER
Rhyme 0:9aed6f5a35c0 420 * bit[7] (reserved)
Rhyme 0:9aed6f5a35c0 421 * bit[6] wakeup_int
Rhyme 0:9aed6f5a35c0 422 * bit[5] gyr_sleep_state
Rhyme 0:9aed6f5a35c0 423 * bit[4:3] gyr_wakeup_trigger
Rhyme 0:9aed6f5a35c0 424 * bit[2:0] gyr_sleep_trigger
Rhyme 0:9aed6f5a35c0 425 */
Rhyme 0:9aed6f5a35c0 426 /* 0x6D SELF_TEST
Rhyme 0:9aed6f5a35c0 427 * bit[7:5] (reserved)
Rhyme 0:9aed6f5a35c0 428 * bit[4] gyr_self_test_enable
Rhyme 0:9aed6f5a35c0 429 * bit[3] acc_self_test_amp
Rhyme 0:9aed6f5a35c0 430 * bit[2] acc_self_test_sign
Rhyme 0:9aed6f5a35c0 431 * bit[1:0] acc_self_test_enable
Rhyme 0:9aed6f5a35c0 432 */
Rhyme 0:9aed6f5a35c0 433 /* 0x70 NV_CONF
Rhyme 0:9aed6f5a35c0 434 * bit[7:4] (reserved)
Rhyme 0:9aed6f5a35c0 435 * bit[3] u_spare_0
Rhyme 0:9aed6f5a35c0 436 * bit[2] i2c_wdt_en
Rhyme 0:9aed6f5a35c0 437 * bit[1] i2c_wdt_sel
Rhyme 0:9aed6f5a35c0 438 * bit[0] i2c_spi_en
Rhyme 0:9aed6f5a35c0 439 */
Rhyme 0:9aed6f5a35c0 440 /* 0x71 OFFSET_0 bit[7:0] off_acc_x */
Rhyme 0:9aed6f5a35c0 441 /* 0x72 OFFSET_1 bit[7:0] off_acc_y */
Rhyme 0:9aed6f5a35c0 442 /* 0x73 OFFSET_2 bit[7:0] off_acc_z */
Rhyme 0:9aed6f5a35c0 443 /* 0x74 OFFSET_3 bit[7:0] off_gyr_x_7_0 */
Rhyme 0:9aed6f5a35c0 444 /* 0x75 OFFSET_4 bit[7:0] off_gyr_y_7_0 */
Rhyme 0:9aed6f5a35c0 445 /* 0x76 OFFSET_5 bit[7:0] off_gyr_z_7_0 */
Rhyme 0:9aed6f5a35c0 446 /* 0x77 OFFSET_6
Rhyme 0:9aed6f5a35c0 447 * bit[7] gyr_off_en
Rhyme 0:9aed6f5a35c0 448 * bit[6] acc_off_en
Rhyme 0:9aed6f5a35c0 449 * bit[5:4] off_gyr_Z_9_8
Rhyme 0:9aed6f5a35c0 450 * bit[3:2] off_gyr_y_9_8
Rhyme 0:9aed6f5a35c0 451 * bit[1:0] off_gyr_x_9_8
Rhyme 0:9aed6f5a35c0 452 */
Rhyme 0:9aed6f5a35c0 453 /* 0x78 STEP_CNT_0 bit[7:0] step_cnt_7_0 */
Rhyme 0:9aed6f5a35c0 454 /* 0x79 STEP_CNT_1 bit[7:0] step_cnt_15_8 */
Rhyme 0:9aed6f5a35c0 455 /* 0x7A STEP_CONF_0 reset value = 0x15
Rhyme 0:9aed6f5a35c0 456 * bit[7:5] (alpha)
Rhyme 0:9aed6f5a35c0 457 * bit[4:3] min_threshold
Rhyme 0:9aed6f5a35c0 458 * bit[2:0] steptime_min
Rhyme 0:9aed6f5a35c0 459 */
Rhyme 0:9aed6f5a35c0 460 /* 0x7B STEP_CONF_1 reset value = 0x03
Rhyme 0:9aed6f5a35c0 461 * bit[7:4] (reserved)
Rhyme 0:9aed6f5a35c0 462 * bit[3] step_cnt_en
Rhyme 0:9aed6f5a35c0 463 * bit[2:0] min_step_buf
Rhyme 0:9aed6f5a35c0 464 */
Rhyme 0:9aed6f5a35c0 465 /* 0x7E CMD bit[7:0] cmd */
Rhyme 0:9aed6f5a35c0 466
Rhyme 0:9aed6f5a35c0 467
Rhyme 0:9aed6f5a35c0 468
Rhyme 0:9aed6f5a35c0 469
Rhyme 0:9aed6f5a35c0 470 BMI160::BMI160(PinName sda, PinName scl, int addr)
Rhyme 0:9aed6f5a35c0 471 {
Rhyme 0:9aed6f5a35c0 472 m_i2c = new I2C(sda, scl) ;
Rhyme 0:9aed6f5a35c0 473 m_addr = (addr << 1) ;
Rhyme 0:9aed6f5a35c0 474 m_spi = 0 ;
Rhyme 0:9aed6f5a35c0 475 m_cs = 0 ;
Rhyme 0:9aed6f5a35c0 476 init() ;
Rhyme 0:9aed6f5a35c0 477 }
Rhyme 0:9aed6f5a35c0 478
Rhyme 0:9aed6f5a35c0 479 BMI160::BMI160(PinName sck, PinName miso, PinName mosi, PinName cs)
Rhyme 0:9aed6f5a35c0 480 {
Rhyme 0:9aed6f5a35c0 481 m_cs = new DigitalOut(cs, 1) ;
Rhyme 0:9aed6f5a35c0 482 m_spi = new SPI(mosi, miso, sck) ;
Rhyme 0:9aed6f5a35c0 483 m_spi->format(8, 3) ;
Rhyme 0:9aed6f5a35c0 484 m_i2c = 0 ;
Rhyme 0:9aed6f5a35c0 485 m_addr = 0 ;
Rhyme 0:9aed6f5a35c0 486 init() ;
Rhyme 0:9aed6f5a35c0 487 }
Rhyme 0:9aed6f5a35c0 488
Rhyme 0:9aed6f5a35c0 489 BMI160::~BMI160()
Rhyme 0:9aed6f5a35c0 490 {
Rhyme 0:9aed6f5a35c0 491 if (m_spi) {
Rhyme 0:9aed6f5a35c0 492 delete m_spi ;
Rhyme 0:9aed6f5a35c0 493 delete m_cs ;
Rhyme 0:9aed6f5a35c0 494 }
Rhyme 0:9aed6f5a35c0 495 if (m_i2c) {
Rhyme 0:9aed6f5a35c0 496 delete m_i2c ;
Rhyme 0:9aed6f5a35c0 497 m_addr = 0 ;
Rhyme 0:9aed6f5a35c0 498 }
Rhyme 0:9aed6f5a35c0 499 }
Rhyme 0:9aed6f5a35c0 500
Rhyme 0:9aed6f5a35c0 501 void BMI160::i2c_readRegs(int addr, uint8_t *data, int len)
Rhyme 0:9aed6f5a35c0 502 {
Rhyme 0:9aed6f5a35c0 503 char t[1] = {addr} ;
Rhyme 0:9aed6f5a35c0 504 m_i2c->write(m_addr, t, 1, true) ;
Rhyme 0:9aed6f5a35c0 505 m_i2c->read(m_addr, (char*)data, len) ;
Rhyme 0:9aed6f5a35c0 506 }
Rhyme 0:9aed6f5a35c0 507
Rhyme 0:9aed6f5a35c0 508 void BMI160::i2c_writeRegs(uint8_t *data, int len)
Rhyme 0:9aed6f5a35c0 509 {
Rhyme 0:9aed6f5a35c0 510 m_i2c->write(m_addr, (char *)data, len) ;
Rhyme 0:9aed6f5a35c0 511 }
Rhyme 0:9aed6f5a35c0 512
Rhyme 0:9aed6f5a35c0 513 void BMI160::spi_readRegs(int addr, uint8_t *data, int len)
Rhyme 0:9aed6f5a35c0 514 {
Rhyme 0:9aed6f5a35c0 515 *m_cs = 0 ;
Rhyme 0:9aed6f5a35c0 516 m_spi->write(addr | 0x80) ;
Rhyme 0:9aed6f5a35c0 517 for (int i = 0 ; i < len ; i++ ) {
Rhyme 0:9aed6f5a35c0 518 data[i] = m_spi->write((addr+i)|0x80) ;
Rhyme 0:9aed6f5a35c0 519 }
Rhyme 0:9aed6f5a35c0 520 m_spi->write(0x00) ; // to terminate read mode
Rhyme 0:9aed6f5a35c0 521 *m_cs = 1 ;
Rhyme 0:9aed6f5a35c0 522 }
Rhyme 0:9aed6f5a35c0 523
Rhyme 0:9aed6f5a35c0 524 void BMI160::spi_writeRegs(uint8_t *data, int len)
Rhyme 0:9aed6f5a35c0 525 {
Rhyme 0:9aed6f5a35c0 526 *m_cs = 0 ;
Rhyme 0:9aed6f5a35c0 527 for (int i = 0 ; i < len-1 ; i++ ) {
Rhyme 0:9aed6f5a35c0 528 m_spi->write((data[0]+i)^0x80) ; /* register address */
Rhyme 0:9aed6f5a35c0 529 m_spi->write(data[i+1]) ; /* data to write */
Rhyme 0:9aed6f5a35c0 530
Rhyme 0:9aed6f5a35c0 531 }
Rhyme 0:9aed6f5a35c0 532 *m_cs = 1 ;
Rhyme 0:9aed6f5a35c0 533 }
Rhyme 0:9aed6f5a35c0 534
Rhyme 0:9aed6f5a35c0 535 void BMI160::readRegs(int addr, uint8_t *data, int len)
Rhyme 0:9aed6f5a35c0 536 {
Rhyme 0:9aed6f5a35c0 537 if (m_spi) {
Rhyme 0:9aed6f5a35c0 538 spi_readRegs(addr, data, len) ;
Rhyme 0:9aed6f5a35c0 539 } else if (m_i2c) {
Rhyme 0:9aed6f5a35c0 540 i2c_readRegs(addr, data, len) ;
Rhyme 0:9aed6f5a35c0 541 }
Rhyme 0:9aed6f5a35c0 542 }
Rhyme 0:9aed6f5a35c0 543
Rhyme 0:9aed6f5a35c0 544 void BMI160::writeRegs(uint8_t *data, int len)
Rhyme 0:9aed6f5a35c0 545 {
Rhyme 0:9aed6f5a35c0 546 if (m_spi) {
Rhyme 0:9aed6f5a35c0 547 spi_writeRegs(data, len) ;
Rhyme 0:9aed6f5a35c0 548 } else if (m_i2c) {
Rhyme 0:9aed6f5a35c0 549 i2c_writeRegs(data, len) ;
Rhyme 0:9aed6f5a35c0 550 }
Rhyme 0:9aed6f5a35c0 551 }
Rhyme 0:9aed6f5a35c0 552
Rhyme 0:9aed6f5a35c0 553 void BMI160::init(void)
Rhyme 0:9aed6f5a35c0 554 {
Rhyme 0:9aed6f5a35c0 555 }
Rhyme 0:9aed6f5a35c0 556
Rhyme 1:d56df81c389b 557 void BMI160::setCMD(uint8_t cmd)
Rhyme 1:d56df81c389b 558 {
Rhyme 1:d56df81c389b 559 uint8_t data[2] ;
Rhyme 1:d56df81c389b 560 data[0] = REG_CMD ;
Rhyme 1:d56df81c389b 561 data[1] = cmd ;
Rhyme 1:d56df81c389b 562 writeRegs(data, 2) ;
Rhyme 1:d56df81c389b 563 }
Rhyme 1:d56df81c389b 564
Rhyme 1:d56df81c389b 565 uint8_t BMI160::getStatus(void)
Rhyme 1:d56df81c389b 566 {
Rhyme 1:d56df81c389b 567 uint8_t status ;
Rhyme 1:d56df81c389b 568 readRegs(REG_STATUS, &status, 1) ;
Rhyme 1:d56df81c389b 569 return(status) ;
Rhyme 1:d56df81c389b 570 }
Rhyme 1:d56df81c389b 571
Rhyme 0:9aed6f5a35c0 572 uint8_t BMI160::getChipID(void)
Rhyme 0:9aed6f5a35c0 573 {
Rhyme 0:9aed6f5a35c0 574 uint8_t data ;
Rhyme 0:9aed6f5a35c0 575 readRegs(REG_CHIP_ID, &data, 1) ;
Rhyme 0:9aed6f5a35c0 576 return( data ) ;
Rhyme 1:d56df81c389b 577 }
Rhyme 1:d56df81c389b 578
Rhyme 1:d56df81c389b 579 uint8_t BMI160::getAccRange(void)
Rhyme 1:d56df81c389b 580 {
Rhyme 1:d56df81c389b 581 uint8_t data = 0 ;
Rhyme 1:d56df81c389b 582 uint8_t range = 0 ;
Rhyme 1:d56df81c389b 583 readRegs(REG_ACC_RANGE, &data, 1) ;
Rhyme 1:d56df81c389b 584 switch(data & 0x0F) {
Rhyme 1:d56df81c389b 585 case 3: /* +/- 2g */
Rhyme 1:d56df81c389b 586 range = 2 ;
Rhyme 1:d56df81c389b 587 break ;
Rhyme 1:d56df81c389b 588 case 5: /* +/- 4g */
Rhyme 1:d56df81c389b 589 range = 4 ;
Rhyme 1:d56df81c389b 590 break ;
Rhyme 1:d56df81c389b 591 case 8: /* +/- 8g */
Rhyme 1:d56df81c389b 592 range = 8 ;
Rhyme 1:d56df81c389b 593 break ;
Rhyme 1:d56df81c389b 594 default:
Rhyme 1:d56df81c389b 595 printf("illegal Acc Range %X detected\n", data & 0x0F) ;
Rhyme 1:d56df81c389b 596 break ;
Rhyme 1:d56df81c389b 597 }
Rhyme 1:d56df81c389b 598 return(range) ;
Rhyme 1:d56df81c389b 599 }
Rhyme 1:d56df81c389b 600
Rhyme 1:d56df81c389b 601 int16_t BMI160::getGyrRange(void)
Rhyme 1:d56df81c389b 602 {
Rhyme 1:d56df81c389b 603 uint8_t data = 0 ;
Rhyme 1:d56df81c389b 604 int16_t range = 0 ;
Rhyme 1:d56df81c389b 605 readRegs(REG_GYR_RANGE, &data, 1) ;
Rhyme 1:d56df81c389b 606 switch(data & 0x07) {
Rhyme 1:d56df81c389b 607 case 0:
Rhyme 1:d56df81c389b 608 range = 2000 ;
Rhyme 1:d56df81c389b 609 break ;
Rhyme 1:d56df81c389b 610 case 1:
Rhyme 1:d56df81c389b 611 range = 1000 ;
Rhyme 1:d56df81c389b 612 break ;
Rhyme 1:d56df81c389b 613 case 2:
Rhyme 1:d56df81c389b 614 range = 500 ;
Rhyme 1:d56df81c389b 615 break ;
Rhyme 1:d56df81c389b 616 case 3:
Rhyme 1:d56df81c389b 617 range = 250 ;
Rhyme 1:d56df81c389b 618 break ;
Rhyme 1:d56df81c389b 619 case 4:
Rhyme 1:d56df81c389b 620 range = 125 ;
Rhyme 1:d56df81c389b 621 break ;
Rhyme 1:d56df81c389b 622 default:
Rhyme 1:d56df81c389b 623 printf("illegal Gyr Range %d detected\n", data & 0x07) ;
Rhyme 1:d56df81c389b 624 break ;
Rhyme 1:d56df81c389b 625 }
Rhyme 1:d56df81c389b 626 return(range) ;
Rhyme 1:d56df81c389b 627 }
Rhyme 1:d56df81c389b 628
Rhyme 1:d56df81c389b 629 int16_t BMI160::getAccX(void)
Rhyme 1:d56df81c389b 630 {
Rhyme 1:d56df81c389b 631 uint8_t data[2] ;
Rhyme 1:d56df81c389b 632 int16_t value = 0 ;
Rhyme 1:d56df81c389b 633 readRegs(REG_DATA_14, data, 2) ;
Rhyme 1:d56df81c389b 634 value = (data[1] << 8) | data[0] ;
Rhyme 1:d56df81c389b 635 return( value ) ;
Rhyme 1:d56df81c389b 636 }
Rhyme 1:d56df81c389b 637
Rhyme 1:d56df81c389b 638 int16_t BMI160::getAccY(void)
Rhyme 1:d56df81c389b 639 {
Rhyme 1:d56df81c389b 640 uint8_t data[2] ;
Rhyme 1:d56df81c389b 641 int16_t value = 0 ;
Rhyme 1:d56df81c389b 642 readRegs(REG_DATA_16, data, 2) ;
Rhyme 1:d56df81c389b 643 value = (data[1] << 8) | data[0] ;
Rhyme 1:d56df81c389b 644 return( value ) ;
Rhyme 1:d56df81c389b 645 }
Rhyme 1:d56df81c389b 646
Rhyme 1:d56df81c389b 647 int16_t BMI160::getAccZ(void)
Rhyme 1:d56df81c389b 648 {
Rhyme 1:d56df81c389b 649 uint8_t data[2] ;
Rhyme 1:d56df81c389b 650 int16_t value = 0 ;
Rhyme 1:d56df81c389b 651 readRegs(REG_DATA_18, data, 2) ;
Rhyme 1:d56df81c389b 652 value = (data[1] << 8) | data[0] ;
Rhyme 1:d56df81c389b 653 return( value ) ;
Rhyme 1:d56df81c389b 654 }
Rhyme 1:d56df81c389b 655
Rhyme 1:d56df81c389b 656 void BMI160::getAcc(int16_t *value)
Rhyme 1:d56df81c389b 657 {
Rhyme 1:d56df81c389b 658 uint8_t data[6] ;
Rhyme 1:d56df81c389b 659 readRegs(REG_DATA_14, data, 6) ;
Rhyme 1:d56df81c389b 660 value[0] = (data[1] << 8) | data[0] ;
Rhyme 1:d56df81c389b 661 value[1] = (data[3] << 8) | data[2] ;
Rhyme 1:d56df81c389b 662 value[2] = (data[5] << 8) | data[4] ;
Rhyme 1:d56df81c389b 663 }
Rhyme 1:d56df81c389b 664
Rhyme 1:d56df81c389b 665 int16_t BMI160::getGyrX(void)
Rhyme 1:d56df81c389b 666 {
Rhyme 1:d56df81c389b 667 uint8_t data[2] ;
Rhyme 1:d56df81c389b 668 int16_t value = 0 ;
Rhyme 1:d56df81c389b 669 readRegs(REG_DATA_8, data, 2) ;
Rhyme 1:d56df81c389b 670 value = (data[1] << 8) | data[0] ;
Rhyme 1:d56df81c389b 671 return( value ) ;
Rhyme 1:d56df81c389b 672 }
Rhyme 1:d56df81c389b 673
Rhyme 1:d56df81c389b 674 int16_t BMI160::getGyrY(void)
Rhyme 1:d56df81c389b 675 {
Rhyme 1:d56df81c389b 676 uint8_t data[2] ;
Rhyme 1:d56df81c389b 677 int16_t value = 0 ;
Rhyme 1:d56df81c389b 678 readRegs(REG_DATA_10, data, 2) ;
Rhyme 1:d56df81c389b 679 value = (data[1] << 8) | data[0] ;
Rhyme 1:d56df81c389b 680 return( value ) ;
Rhyme 1:d56df81c389b 681 }
Rhyme 1:d56df81c389b 682
Rhyme 1:d56df81c389b 683 int16_t BMI160::getGyrZ(void)
Rhyme 1:d56df81c389b 684 {
Rhyme 1:d56df81c389b 685 uint8_t data[2] ;
Rhyme 1:d56df81c389b 686 int16_t value = 0 ;
Rhyme 1:d56df81c389b 687 readRegs(REG_DATA_12, data, 2) ;
Rhyme 1:d56df81c389b 688 value = (data[1] << 8) | data[0] ;
Rhyme 1:d56df81c389b 689 return( value ) ;
Rhyme 1:d56df81c389b 690 }
Rhyme 1:d56df81c389b 691
Rhyme 1:d56df81c389b 692 void BMI160::getGyr(int16_t *value)
Rhyme 1:d56df81c389b 693 {
Rhyme 1:d56df81c389b 694 uint8_t data[6] ;
Rhyme 1:d56df81c389b 695 readRegs(REG_DATA_8, data, 6) ;
Rhyme 1:d56df81c389b 696 value[0] = (data[1] << 8) | data[0] ;
Rhyme 1:d56df81c389b 697 value[1] = (data[3] << 8) | data[2] ;
Rhyme 1:d56df81c389b 698 value[2] = (data[5] << 8) | data[4] ;
Rhyme 1:d56df81c389b 699 }