Based on https://os.mbed.com/users/Airium/code/module_LSM303DLHC/ Main difference is the usage of the I2C - now it is passed as parameter making cooperative use easier. LSM303DLHC Full Driver: Readings For Acc, Mag and Temp; Class Method for frequently-used 13 sensor parameters; Class Method to direct modify registers; Support Calibration (offset scale);
LSM303DLHC_REG.h@1:4ee6df2df73a, 2020-02-03 (annotated)
- Committer:
- Pythia
- Date:
- Mon Feb 03 07:43:48 2020 +0000
- Revision:
- 1:4ee6df2df73a
- Parent:
- 0:a4131de4bddd
Version working. Temperature sensor provide strange results. Is to be extended with orientation measurement.
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
Pythia | 0:a4131de4bddd | 1 | #ifndef LSM303DLHC_REG_H |
Pythia | 0:a4131de4bddd | 2 | #define LSM303DLHC_REG_H |
Pythia | 0:a4131de4bddd | 3 | |
Pythia | 0:a4131de4bddd | 4 | // ACC SAD |
Pythia | 0:a4131de4bddd | 5 | #define ACC_ADDRESS 0x32 |
Pythia | 0:a4131de4bddd | 6 | // ACC CTRL SUB |
Pythia | 0:a4131de4bddd | 7 | #define CTRL_REG1_A 0x20 //RW ODR(4) LPen Zen Yen Xen |
Pythia | 0:a4131de4bddd | 8 | #define CTRL_REG2_A 0x21 //RW HPM(2) HPCF(2) FDS HPCLICK HPIS2 HPIS1 |
Pythia | 0:a4131de4bddd | 9 | #define CTRL_REG3_A 0x22 //RW I1_CLICK I1_AOI1 I1_AOI2 I1_DRDY1 I1_DRDY2 I1_WTM I1_OVERRUN - |
Pythia | 0:a4131de4bddd | 10 | #define CTRL_REG4_A 0x23 //RW BDU BLE FS1 FS0 HR 0(2) SIM |
Pythia | 0:a4131de4bddd | 11 | #define CTRL_REG5_A 0x24 //RW BOOT FIFO_EN - - LIR_INT1 D4D_INT1 LIR_INT2 D4D_INT2 |
Pythia | 0:a4131de4bddd | 12 | #define CTRL_REG6_A 0x25 //RW I2_CLICKen I2_INT1 I2_INT2 BOOT_I1 P2_ACT - H_LACTIVE - |
Pythia | 0:a4131de4bddd | 13 | #define REFERENCE_A 0x26 //RW Ref7 Ref6 Ref5 Ref4 Ref3 Ref2 Ref1 Ref0 |
Pythia | 0:a4131de4bddd | 14 | #define STATUS_REG_A 0x27 //R ZYXOR ZOR YOR XOR ZYXDA ZDA YDA XDA |
Pythia | 0:a4131de4bddd | 15 | // ACC OUT SUB |
Pythia | 0:a4131de4bddd | 16 | #define OUT_X_L_A 0x28 //R MSB(8) |
Pythia | 0:a4131de4bddd | 17 | #define OUT_X_H_A 0x29 //R LSB(4) 0(4) |
Pythia | 0:a4131de4bddd | 18 | #define OUT_Y_L_A 0x2A //R ditto |
Pythia | 0:a4131de4bddd | 19 | #define OUT_Y_H_A 0x2B //R ditto |
Pythia | 0:a4131de4bddd | 20 | #define OUT_Z_L_A 0x2C //R ditto |
Pythia | 0:a4131de4bddd | 21 | #define OUT_Z_H_A 0x2D //R ditto |
Pythia | 0:a4131de4bddd | 22 | // ACC INT SUB |
Pythia | 0:a4131de4bddd | 23 | #define INT1_CFG_A 0x30 |
Pythia | 0:a4131de4bddd | 24 | #define INT1_SRC_A 0x31 |
Pythia | 0:a4131de4bddd | 25 | #define INT1_THS_A 0x32 |
Pythia | 0:a4131de4bddd | 26 | #define INT1_DURATION_A 0x33 |
Pythia | 0:a4131de4bddd | 27 | #define INT2_CFG_A 0x34 |
Pythia | 0:a4131de4bddd | 28 | #define INT2_SRC_A 0x35 |
Pythia | 0:a4131de4bddd | 29 | #define INT2_THS_A 0x36 |
Pythia | 0:a4131de4bddd | 30 | #define INT2_DURATION_A 0x37 |
Pythia | 0:a4131de4bddd | 31 | // ACC CLICK SUB |
Pythia | 0:a4131de4bddd | 32 | #define CLICK_CFG_A 0x38 |
Pythia | 0:a4131de4bddd | 33 | #define CLICK_SRC_A 0x39 |
Pythia | 0:a4131de4bddd | 34 | #define CLICK_THS_A 0x3A |
Pythia | 0:a4131de4bddd | 35 | #define TIME_LIMIT_A 0x3B |
Pythia | 0:a4131de4bddd | 36 | #define TIME_LATENCY_A 0x3C |
Pythia | 0:a4131de4bddd | 37 | #define TIME_WINDOW_A 0x3D |
Pythia | 0:a4131de4bddd | 38 | |
Pythia | 0:a4131de4bddd | 39 | // MAG SAD |
Pythia | 0:a4131de4bddd | 40 | #define MAG_ADDRESS 0x3C |
Pythia | 0:a4131de4bddd | 41 | // MAG CTRL SUB |
Pythia | 0:a4131de4bddd | 42 | #define CRA_REG_M 0x00 //RW TEMP_EN 0(2) DR(3) 0(2) |
Pythia | 0:a4131de4bddd | 43 | #define CRB_REG_M 0x01 //RW GN(3) 0(5) |
Pythia | 0:a4131de4bddd | 44 | #define MR_REG_M 0x02 //RW 0(6) MD(2) |
Pythia | 0:a4131de4bddd | 45 | // MAG OUT SUB |
Pythia | 0:a4131de4bddd | 46 | #define OUT_X_H_M 0x03 //R LSB(8) |
Pythia | 0:a4131de4bddd | 47 | #define OUT_X_L_M 0x04 //R 0(4) MSB(4) |
Pythia | 0:a4131de4bddd | 48 | #define OUT_Z_H_M 0x05 //R ditto |
Pythia | 0:a4131de4bddd | 49 | #define OUT_Z_L_M 0x06 //R ditto |
Pythia | 0:a4131de4bddd | 50 | #define OUT_Y_H_M 0x07 //R ditto |
Pythia | 0:a4131de4bddd | 51 | #define OUT_Y_L_M 0x08 //R ditto |
Pythia | 0:a4131de4bddd | 52 | #define SR_REG_M 0x09 //R -(6) LOCK DRDY |
Pythia | 0:a4131de4bddd | 53 | #define IRA_REG_M 0x0A //R |
Pythia | 0:a4131de4bddd | 54 | #define IRB_REG_M 0x0B //R |
Pythia | 0:a4131de4bddd | 55 | #define IRC_REG_M 0x0C //R |
Pythia | 0:a4131de4bddd | 56 | // Temprature OUT SUB |
Pythia | 0:a4131de4bddd | 57 | #define TEMP_OUT_H_M 0x31 //R MSB(8) |
Pythia | 0:a4131de4bddd | 58 | #define TEMP_OUT_L_M 0x32 //R LSB(4) 0(4) |
Pythia | 0:a4131de4bddd | 59 | |
Pythia | 0:a4131de4bddd | 60 | #endif |