Sidharth Mohla / Mbed 2 deprecated PowerControRTCFail

Made using MichaelWei's PowerControl library and RTC timer library. This fails to wake up for some unknown reason

Dependencies:   RTC mbed

Fork of PowerControl by Michael Wei

PowerControl/PowerControl.h@1:9ec2b510c2b1, 2018-02-14 (annotated)

Committer:
Pointer_reference
Date:
Wed Feb 14 08:53:47 2018 +0000
Revision:
1:9ec2b510c2b1
Parent:
0:9bd5f1bdb845 
This RTC interrupt fails for some unknown reason;

Who changed what in which revision?

UserRevisionLine numberNew contents of line
no2chem 0:9bd5f1bdb845 1 /* mbed PowerControl Library
no2chem 0:9bd5f1bdb845 2 * Copyright (c) 2010 Michael Wei
no2chem 0:9bd5f1bdb845 3 */
no2chem 0:9bd5f1bdb845 4
no2chem 0:9bd5f1bdb845 5 #ifndef MBED_POWERCONTROL_H
no2chem 0:9bd5f1bdb845 6 #define MBED_POWERCONTROL_H
no2chem 0:9bd5f1bdb845 7
no2chem 0:9bd5f1bdb845 8 //shouldn't have to include, but fixes weird problems with defines
no2chem 0:9bd5f1bdb845 9 #include "LPC1768/LPC17xx.h"
no2chem 0:9bd5f1bdb845 10
no2chem 0:9bd5f1bdb845 11 //System Control Register
no2chem 0:9bd5f1bdb845 12 // bit 0: Reserved
no2chem 0:9bd5f1bdb845 13 // bit 1: Sleep on Exit
no2chem 0:9bd5f1bdb845 14 #define LPC1768_SCR_SLEEPONEXIT 0x2
no2chem 0:9bd5f1bdb845 15 // bit 2: Deep Sleep
no2chem 0:9bd5f1bdb845 16 #define LPC1768_SCR_SLEEPDEEP 0x4
no2chem 0:9bd5f1bdb845 17 // bit 3: Resereved
no2chem 0:9bd5f1bdb845 18 // bit 4: Send on Pending
no2chem 0:9bd5f1bdb845 19 #define LPC1768_SCR_SEVONPEND 0x10
no2chem 0:9bd5f1bdb845 20 // bit 5-31: Reserved
no2chem 0:9bd5f1bdb845 21
no2chem 0:9bd5f1bdb845 22 //Power Control Register
no2chem 0:9bd5f1bdb845 23 // bit 0: Power mode control bit 0 (power-down mode)
no2chem 0:9bd5f1bdb845 24 #define LPC1768_PCON_PM0 0x1
no2chem 0:9bd5f1bdb845 25 // bit 1: Power mode control bit 1 (deep power-down mode)
no2chem 0:9bd5f1bdb845 26 #define LPC1768_PCON_PM1 0x2
no2chem 0:9bd5f1bdb845 27 // bit 2: Brown-out reduced power mode
no2chem 0:9bd5f1bdb845 28 #define LPC1768_PCON_BODRPM 0x4
no2chem 0:9bd5f1bdb845 29 // bit 3: Brown-out global disable
no2chem 0:9bd5f1bdb845 30 #define LPC1768_PCON_BOGD 0x8
no2chem 0:9bd5f1bdb845 31 // bit 4: Brown-out reset disable
no2chem 0:9bd5f1bdb845 32 #define LPC1768_PCON_BORD 0x10
no2chem 0:9bd5f1bdb845 33 // bit 5-7 : Reserved
no2chem 0:9bd5f1bdb845 34 // bit 8: Sleep Mode Entry Flag
no2chem 0:9bd5f1bdb845 35 #define LPC1768_PCON_SMFLAG 0x100
no2chem 0:9bd5f1bdb845 36 // bit 9: Deep Sleep Entry Flag
no2chem 0:9bd5f1bdb845 37 #define LPC1768_PCON_DSFLAG 0x200
no2chem 0:9bd5f1bdb845 38 // bit 10: Power Down Entry Flag
no2chem 0:9bd5f1bdb845 39 #define LPC1768_PCON_PDFLAG 0x400
no2chem 0:9bd5f1bdb845 40 // bit 11: Deep Power Down Entry Flag
no2chem 0:9bd5f1bdb845 41 #define LPC1768_PCON_DPDFLAG 0x800
no2chem 0:9bd5f1bdb845 42 // bit 12-31: Reserved
no2chem 0:9bd5f1bdb845 43
no2chem 0:9bd5f1bdb845 44 //"Sleep Mode" (WFI).
no2chem 0:9bd5f1bdb845 45 inline void Sleep(void)
no2chem 0:9bd5f1bdb845 46 {
no2chem 0:9bd5f1bdb845 47 __WFI();
no2chem 0:9bd5f1bdb845 48 }
no2chem 0:9bd5f1bdb845 49
no2chem 0:9bd5f1bdb845 50 //"Deep Sleep" Mode
no2chem 0:9bd5f1bdb845 51 inline void DeepSleep(void)
no2chem 0:9bd5f1bdb845 52 {
no2chem 0:9bd5f1bdb845 53 SCB->SCR |= LPC1768_SCR_SLEEPDEEP;
no2chem 0:9bd5f1bdb845 54 __WFI();
no2chem 0:9bd5f1bdb845 55 }
no2chem 0:9bd5f1bdb845 56
no2chem 0:9bd5f1bdb845 57 //"Power-Down" Mode
no2chem 0:9bd5f1bdb845 58 inline void PowerDown(void)
no2chem 0:9bd5f1bdb845 59 {
no2chem 0:9bd5f1bdb845 60 SCB->SCR |= LPC1768_SCR_SLEEPDEEP;
no2chem 0:9bd5f1bdb845 61 LPC_SC->PCON &= ~LPC1768_PCON_PM1;
no2chem 0:9bd5f1bdb845 62 LPC_SC->PCON |= LPC1768_PCON_PM0;
no2chem 0:9bd5f1bdb845 63 __WFI();
no2chem 0:9bd5f1bdb845 64 //reset back to normal
no2chem 0:9bd5f1bdb845 65 LPC_SC->PCON &= ~(LPC1768_PCON_PM1 | LPC1768_PCON_PM0);
no2chem 0:9bd5f1bdb845 66 }
no2chem 0:9bd5f1bdb845 67
no2chem 0:9bd5f1bdb845 68 //"Deep Power-Down" Mode
no2chem 0:9bd5f1bdb845 69 inline void DeepPowerDown(void)
no2chem 0:9bd5f1bdb845 70 {
no2chem 0:9bd5f1bdb845 71 SCB->SCR |= LPC1768_SCR_SLEEPDEEP;
no2chem 0:9bd5f1bdb845 72 LPC_SC->PCON |= LPC1768_PCON_PM1 | LPC1768_PCON_PM0;
no2chem 0:9bd5f1bdb845 73 __WFI();
no2chem 0:9bd5f1bdb845 74 //reset back to normal
no2chem 0:9bd5f1bdb845 75 LPC_SC->PCON &= ~(LPC1768_PCON_PM1 | LPC1768_PCON_PM0);
no2chem 0:9bd5f1bdb845 76 }
no2chem 0:9bd5f1bdb845 77
no2chem 0:9bd5f1bdb845 78 //shut down BOD during power-down/deep sleep
no2chem 0:9bd5f1bdb845 79 inline void BrownOut_ReducedPowerMode_Enable(void)
no2chem 0:9bd5f1bdb845 80 {
no2chem 0:9bd5f1bdb845 81 LPC_SC->PCON |= LPC1768_PCON_BODRPM;
no2chem 0:9bd5f1bdb845 82 }
no2chem 0:9bd5f1bdb845 83
no2chem 0:9bd5f1bdb845 84 //turn on BOD during power-down/deep sleep
no2chem 0:9bd5f1bdb845 85 inline void BrownOut_ReducedPowerMode_Disable(void)
no2chem 0:9bd5f1bdb845 86 {
no2chem 0:9bd5f1bdb845 87 LPC_SC->PCON &= ~LPC1768_PCON_BODRPM;
no2chem 0:9bd5f1bdb845 88 }
no2chem 0:9bd5f1bdb845 89
no2chem 0:9bd5f1bdb845 90 //turn off brown out circutry
no2chem 0:9bd5f1bdb845 91 inline void BrownOut_Global_Disable(void)
no2chem 0:9bd5f1bdb845 92 {
no2chem 0:9bd5f1bdb845 93 LPC_SC->PCON |= LPC1768_PCON_BOGD;
no2chem 0:9bd5f1bdb845 94 }
no2chem 0:9bd5f1bdb845 95
no2chem 0:9bd5f1bdb845 96 //turn on brown out circutry
no2chem 0:9bd5f1bdb845 97 inline void BrownOut_Global_Enable(void)
no2chem 0:9bd5f1bdb845 98 {
no2chem 0:9bd5f1bdb845 99 LPC_SC->PCON &= !LPC1768_PCON_BOGD;
no2chem 0:9bd5f1bdb845 100 }
no2chem 0:9bd5f1bdb845 101
no2chem 0:9bd5f1bdb845 102 //turn off brown out reset circutry
no2chem 0:9bd5f1bdb845 103 inline void BrownOut_Reset_Disable(void)
no2chem 0:9bd5f1bdb845 104 {
no2chem 0:9bd5f1bdb845 105 LPC_SC->PCON |= LPC1768_PCON_BORD;
no2chem 0:9bd5f1bdb845 106 }
no2chem 0:9bd5f1bdb845 107
no2chem 0:9bd5f1bdb845 108 //turn on brown outreset circutry
no2chem 0:9bd5f1bdb845 109 inline void BrownOut_Reset_Enable(void)
no2chem 0:9bd5f1bdb845 110 {
no2chem 0:9bd5f1bdb845 111 LPC_SC->PCON &= ~LPC1768_PCON_BORD;
no2chem 0:9bd5f1bdb845 112 }
no2chem 0:9bd5f1bdb845 113 //Peripheral Control Register
no2chem 0:9bd5f1bdb845 114 // bit 0: Reserved
no2chem 0:9bd5f1bdb845 115 // bit 1: PCTIM0: Timer/Counter 0 power/clock enable
no2chem 0:9bd5f1bdb845 116 #define LPC1768_PCONP_PCTIM0 0x2
no2chem 0:9bd5f1bdb845 117 // bit 2: PCTIM1: Timer/Counter 1 power/clock enable
no2chem 0:9bd5f1bdb845 118 #define LPC1768_PCONP_PCTIM1 0x4
no2chem 0:9bd5f1bdb845 119 // bit 3: PCUART0: UART 0 power/clock enable
no2chem 0:9bd5f1bdb845 120 #define LPC1768_PCONP_PCUART0 0x8
no2chem 0:9bd5f1bdb845 121 // bit 4: PCUART1: UART 1 power/clock enable
no2chem 0:9bd5f1bdb845 122 #define LPC1768_PCONP_PCUART1 0x10
no2chem 0:9bd5f1bdb845 123 // bit 5: Reserved
no2chem 0:9bd5f1bdb845 124 // bit 6: PCPWM1: PWM 1 power/clock enable
no2chem 0:9bd5f1bdb845 125 #define LPC1768_PCONP_PCPWM1 0x40
no2chem 0:9bd5f1bdb845 126 // bit 7: PCI2C0: I2C interface 0 power/clock enable
no2chem 0:9bd5f1bdb845 127 #define LPC1768_PCONP_PCI2C0 0x80
no2chem 0:9bd5f1bdb845 128 // bit 8: PCSPI: SPI interface power/clock enable
no2chem 0:9bd5f1bdb845 129 #define LPC1768_PCONP_PCSPI 0x100
no2chem 0:9bd5f1bdb845 130 // bit 9: PCRTC: RTC power/clock enable
no2chem 0:9bd5f1bdb845 131 #define LPC1768_PCONP_PCRTC 0x200
no2chem 0:9bd5f1bdb845 132 // bit 10: PCSSP1: SSP interface 1 power/clock enable
no2chem 0:9bd5f1bdb845 133 #define LPC1768_PCONP_PCSSP1 0x400
no2chem 0:9bd5f1bdb845 134 // bit 11: Reserved
no2chem 0:9bd5f1bdb845 135 // bit 12: PCADC: A/D converter power/clock enable
no2chem 0:9bd5f1bdb845 136 #define LPC1768_PCONP_PCADC 0x1000
no2chem 0:9bd5f1bdb845 137 // bit 13: PCCAN1: CAN controller 1 power/clock enable
no2chem 0:9bd5f1bdb845 138 #define LPC1768_PCONP_PCCAN1 0x2000
no2chem 0:9bd5f1bdb845 139 // bit 14: PCCAN2: CAN controller 2 power/clock enable
no2chem 0:9bd5f1bdb845 140 #define LPC1768_PCONP_PCCAN2 0x4000
no2chem 0:9bd5f1bdb845 141 // bit 15: PCGPIO: GPIOs power/clock enable
no2chem 0:9bd5f1bdb845 142 #define LPC1768_PCONP_PCGPIO 0x8000
no2chem 0:9bd5f1bdb845 143 // bit 16: PCRIT: Repetitive interrupt timer power/clock enable
no2chem 0:9bd5f1bdb845 144 #define LPC1768_PCONP_PCRIT 0x10000
no2chem 0:9bd5f1bdb845 145 // bit 17: PCMCPWM: Motor control PWM power/clock enable
no2chem 0:9bd5f1bdb845 146 #define LPC1768_PCONP_PCMCPWM 0x20000
no2chem 0:9bd5f1bdb845 147 // bit 18: PCQEI: Quadrature encoder interface power/clock enable
no2chem 0:9bd5f1bdb845 148 #define LPC1768_PCONP_PCQEI 0x40000
no2chem 0:9bd5f1bdb845 149 // bit 19: PCI2C1: I2C interface 1 power/clock enable
no2chem 0:9bd5f1bdb845 150 #define LPC1768_PCONP_PCI2C1 0x80000
no2chem 0:9bd5f1bdb845 151 // bit 20: Reserved
no2chem 0:9bd5f1bdb845 152 // bit 21: PCSSP0: SSP interface 0 power/clock enable
no2chem 0:9bd5f1bdb845 153 #define LPC1768_PCONP_PCSSP0 0x200000
no2chem 0:9bd5f1bdb845 154 // bit 22: PCTIM2: Timer 2 power/clock enable
no2chem 0:9bd5f1bdb845 155 #define LPC1768_PCONP_PCTIM2 0x400000
no2chem 0:9bd5f1bdb845 156 // bit 23: PCTIM3: Timer 3 power/clock enable
no2chem 0:9bd5f1bdb845 157 #define LPC1768_PCONP_PCQTIM3 0x800000
no2chem 0:9bd5f1bdb845 158 // bit 24: PCUART2: UART 2 power/clock enable
no2chem 0:9bd5f1bdb845 159 #define LPC1768_PCONP_PCUART2 0x1000000
no2chem 0:9bd5f1bdb845 160 // bit 25: PCUART3: UART 3 power/clock enable
no2chem 0:9bd5f1bdb845 161 #define LPC1768_PCONP_PCUART3 0x2000000
no2chem 0:9bd5f1bdb845 162 // bit 26: PCI2C2: I2C interface 2 power/clock enable
no2chem 0:9bd5f1bdb845 163 #define LPC1768_PCONP_PCI2C2 0x4000000
no2chem 0:9bd5f1bdb845 164 // bit 27: PCI2S: I2S interface power/clock enable
no2chem 0:9bd5f1bdb845 165 #define LPC1768_PCONP_PCI2S 0x8000000
no2chem 0:9bd5f1bdb845 166 // bit 28: Reserved
no2chem 0:9bd5f1bdb845 167 // bit 29: PCGPDMA: GP DMA function power/clock enable
no2chem 0:9bd5f1bdb845 168 #define LPC1768_PCONP_PCGPDMA 0x20000000
no2chem 0:9bd5f1bdb845 169 // bit 30: PCENET: Ethernet block power/clock enable
no2chem 0:9bd5f1bdb845 170 #define LPC1768_PCONP_PCENET 0x40000000
no2chem 0:9bd5f1bdb845 171 // bit 31: PCUSB: USB interface power/clock enable
no2chem 0:9bd5f1bdb845 172 #define LPC1768_PCONP_PCUSB 0x80000000
no2chem 0:9bd5f1bdb845 173
no2chem 0:9bd5f1bdb845 174 //Powers Up specified Peripheral(s)
no2chem 0:9bd5f1bdb845 175 inline unsigned int Peripheral_PowerUp(unsigned int bitMask)
no2chem 0:9bd5f1bdb845 176 {
no2chem 0:9bd5f1bdb845 177 return LPC_SC->PCONP |= bitMask;
no2chem 0:9bd5f1bdb845 178 }
no2chem 0:9bd5f1bdb845 179
no2chem 0:9bd5f1bdb845 180 //Powers Down specified Peripheral(s)
no2chem 0:9bd5f1bdb845 181 inline unsigned int Peripheral_PowerDown(unsigned int bitMask)
no2chem 0:9bd5f1bdb845 182 {
no2chem 0:9bd5f1bdb845 183 return LPC_SC->PCONP &= ~bitMask;
no2chem 0:9bd5f1bdb845 184 }
no2chem 0:9bd5f1bdb845 185
no2chem 0:9bd5f1bdb845 186 //returns if the peripheral is on or off
no2chem 0:9bd5f1bdb845 187 inline bool Peripheral_GetStatus(unsigned int peripheral)
no2chem 0:9bd5f1bdb845 188 {
no2chem 0:9bd5f1bdb845 189 return (LPC_SC->PCONP & peripheral) ? true : false;
no2chem 0:9bd5f1bdb845 190 }
no2chem 0:9bd5f1bdb845 191
no2chem 0:9bd5f1bdb845 192 #endif