Pinmanee Truz
get an input from RFID to control the LCD
Fork of
LCD4884
by 
Dan Ghiciulescu
MFRC522.cpp@4:5977fe753a55, 2017-12-11 (annotated)
- Committer:
- Pinmanee
- Date:
- Mon Dec 11 15:10:01 2017 +0000
- Revision:
- 4:5977fe753a55
- Parent:
- 1:baf91b6482eb
LCD that can show graph
Who changed what in which revision?
| User | Revision | Line number | New contents of line |
|---|---|---|---|
| Pinmanee | 1:baf91b6482eb | 1 | /* |
| Pinmanee | 1:baf91b6482eb | 2 | * MFRC522.cpp - Library to use ARDUINO RFID MODULE KIT 13.56 MHZ WITH TAGS SPI W AND R BY COOQROBOT. |
| Pinmanee | 1:baf91b6482eb | 3 | * _Please_ see the comments in MFRC522.h - they give useful hints and background. |
| Pinmanee | 1:baf91b6482eb | 4 | * Released into the public domain. |
| Pinmanee | 1:baf91b6482eb | 5 | */ |
| Pinmanee | 1:baf91b6482eb | 6 | |
| Pinmanee | 1:baf91b6482eb | 7 | #include "MFRC522.h" |
| Pinmanee | 1:baf91b6482eb | 8 | |
| Pinmanee | 1:baf91b6482eb | 9 | static const char* const _TypeNamePICC[] = |
| Pinmanee | 1:baf91b6482eb | 10 | { |
| Pinmanee | 1:baf91b6482eb | 11 | "Unknown type", |
| Pinmanee | 1:baf91b6482eb | 12 | "PICC compliant with ISO/IEC 14443-4", |
| Pinmanee | 1:baf91b6482eb | 13 | "PICC compliant with ISO/IEC 18092 (NFC)", |
| Pinmanee | 1:baf91b6482eb | 14 | "MIFARE Mini, 320 bytes", |
| Pinmanee | 1:baf91b6482eb | 15 | "MIFARE 1KB", |
| Pinmanee | 1:baf91b6482eb | 16 | "MIFARE 4KB", |
| Pinmanee | 1:baf91b6482eb | 17 | "MIFARE Ultralight or Ultralight C", |
| Pinmanee | 1:baf91b6482eb | 18 | "MIFARE Plus", |
| Pinmanee | 1:baf91b6482eb | 19 | "MIFARE TNP3XXX", |
| Pinmanee | 1:baf91b6482eb | 20 | |
| Pinmanee | 1:baf91b6482eb | 21 | /* not complete UID */ |
| Pinmanee | 1:baf91b6482eb | 22 | "SAK indicates UID is not complete" |
| Pinmanee | 1:baf91b6482eb | 23 | }; |
| Pinmanee | 1:baf91b6482eb | 24 | |
| Pinmanee | 1:baf91b6482eb | 25 | static const char* const _ErrorMessage[] = |
| Pinmanee | 1:baf91b6482eb | 26 | { |
| Pinmanee | 1:baf91b6482eb | 27 | "Unknown error", |
| Pinmanee | 1:baf91b6482eb | 28 | "Success", |
| Pinmanee | 1:baf91b6482eb | 29 | "Error in communication", |
| Pinmanee | 1:baf91b6482eb | 30 | "Collision detected", |
| Pinmanee | 1:baf91b6482eb | 31 | "Timeout in communication", |
| Pinmanee | 1:baf91b6482eb | 32 | "A buffer is not big enough", |
| Pinmanee | 1:baf91b6482eb | 33 | "Internal error in the code, should not happen", |
| Pinmanee | 1:baf91b6482eb | 34 | "Invalid argument", |
| Pinmanee | 1:baf91b6482eb | 35 | "The CRC_A does not match", |
| Pinmanee | 1:baf91b6482eb | 36 | "A MIFARE PICC responded with NAK" |
| Pinmanee | 1:baf91b6482eb | 37 | }; |
| Pinmanee | 1:baf91b6482eb | 38 | |
| Pinmanee | 1:baf91b6482eb | 39 | #define MFRC522_MaxPICCs (sizeof(_TypeNamePICC)/sizeof(_TypeNamePICC[0])) |
| Pinmanee | 1:baf91b6482eb | 40 | #define MFRC522_MaxError (sizeof(_ErrorMessage)/sizeof(_ErrorMessage[0])) |
| Pinmanee | 1:baf91b6482eb | 41 | |
| Pinmanee | 1:baf91b6482eb | 42 | ///////////////////////////////////////////////////////////////////////////////////// |
| Pinmanee | 1:baf91b6482eb | 43 | // Functions for setting up the driver |
| Pinmanee | 1:baf91b6482eb | 44 | ///////////////////////////////////////////////////////////////////////////////////// |
| Pinmanee | 1:baf91b6482eb | 45 | |
| Pinmanee | 1:baf91b6482eb | 46 | /** |
| Pinmanee | 1:baf91b6482eb | 47 | * Constructor. |
| Pinmanee | 1:baf91b6482eb | 48 | * Prepares the output pins. |
| Pinmanee | 1:baf91b6482eb | 49 | */ |
| Pinmanee | 1:baf91b6482eb | 50 | MFRC522::MFRC522(PinName mosi, |
| Pinmanee | 1:baf91b6482eb | 51 | PinName miso, |
| Pinmanee | 1:baf91b6482eb | 52 | PinName sclk, |
| Pinmanee | 1:baf91b6482eb | 53 | PinName cs, |
| Pinmanee | 1:baf91b6482eb | 54 | PinName reset) : m_SPI(mosi, miso, sclk), m_CS(cs), m_RESET(reset) |
| Pinmanee | 1:baf91b6482eb | 55 | { |
| Pinmanee | 1:baf91b6482eb | 56 | /* Configure SPI bus */ |
| Pinmanee | 1:baf91b6482eb | 57 | m_SPI.format(8, 0); |
| Pinmanee | 1:baf91b6482eb | 58 | m_SPI.frequency(8000000); |
| Pinmanee | 1:baf91b6482eb | 59 | |
| Pinmanee | 1:baf91b6482eb | 60 | /* Release SPI-CS pin */ |
| Pinmanee | 1:baf91b6482eb | 61 | m_CS = 1; |
| Pinmanee | 1:baf91b6482eb | 62 | |
| Pinmanee | 1:baf91b6482eb | 63 | /* Release RESET pin */ |
| Pinmanee | 1:baf91b6482eb | 64 | m_RESET = 1; |
| Pinmanee | 1:baf91b6482eb | 65 | } // End constructor |
| Pinmanee | 1:baf91b6482eb | 66 | |
| Pinmanee | 1:baf91b6482eb | 67 | |
| Pinmanee | 1:baf91b6482eb | 68 | /** |
| Pinmanee | 1:baf91b6482eb | 69 | * Destructor. |
| Pinmanee | 1:baf91b6482eb | 70 | */ |
| Pinmanee | 1:baf91b6482eb | 71 | MFRC522::~MFRC522() |
| Pinmanee | 1:baf91b6482eb | 72 | { |
| Pinmanee | 1:baf91b6482eb | 73 | |
| Pinmanee | 1:baf91b6482eb | 74 | } |
| Pinmanee | 1:baf91b6482eb | 75 | |
| Pinmanee | 1:baf91b6482eb | 76 | |
| Pinmanee | 1:baf91b6482eb | 77 | ///////////////////////////////////////////////////////////////////////////////////// |
| Pinmanee | 1:baf91b6482eb | 78 | // Basic interface functions for communicating with the MFRC522 |
| Pinmanee | 1:baf91b6482eb | 79 | ///////////////////////////////////////////////////////////////////////////////////// |
| Pinmanee | 1:baf91b6482eb | 80 | |
| Pinmanee | 1:baf91b6482eb | 81 | /** |
| Pinmanee | 1:baf91b6482eb | 82 | * Writes a byte to the specified register in the MFRC522 chip. |
| Pinmanee | 1:baf91b6482eb | 83 | * The interface is described in the datasheet section 8.1.2. |
| Pinmanee | 1:baf91b6482eb | 84 | */ |
| Pinmanee | 1:baf91b6482eb | 85 | void MFRC522::PCD_WriteRegister(uint8_t reg, uint8_t value) |
| Pinmanee | 1:baf91b6482eb | 86 | { |
| Pinmanee | 1:baf91b6482eb | 87 | m_CS = 0; /* Select SPI Chip MFRC522 */ |
| Pinmanee | 1:baf91b6482eb | 88 | |
| Pinmanee | 1:baf91b6482eb | 89 | // MSB == 0 is for writing. LSB is not used in address. Datasheet section 8.1.2.3. |
| Pinmanee | 1:baf91b6482eb | 90 | (void) m_SPI.write(reg & 0x7E); |
| Pinmanee | 1:baf91b6482eb | 91 | (void) m_SPI.write(value); |
| Pinmanee | 1:baf91b6482eb | 92 | |
| Pinmanee | 1:baf91b6482eb | 93 | m_CS = 1; /* Release SPI Chip MFRC522 */ |
| Pinmanee | 1:baf91b6482eb | 94 | } // End PCD_WriteRegister() |
| Pinmanee | 1:baf91b6482eb | 95 | |
| Pinmanee | 1:baf91b6482eb | 96 | /** |
| Pinmanee | 1:baf91b6482eb | 97 | * Writes a number of bytes to the specified register in the MFRC522 chip. |
| Pinmanee | 1:baf91b6482eb | 98 | * The interface is described in the datasheet section 8.1.2. |
| Pinmanee | 1:baf91b6482eb | 99 | */ |
| Pinmanee | 1:baf91b6482eb | 100 | void MFRC522::PCD_WriteRegister(uint8_t reg, uint8_t count, uint8_t *values) |
| Pinmanee | 1:baf91b6482eb | 101 | { |
| Pinmanee | 1:baf91b6482eb | 102 | m_CS = 0; /* Select SPI Chip MFRC522 */ |
| Pinmanee | 1:baf91b6482eb | 103 | |
| Pinmanee | 1:baf91b6482eb | 104 | // MSB == 0 is for writing. LSB is not used in address. Datasheet section 8.1.2.3. |
| Pinmanee | 1:baf91b6482eb | 105 | (void) m_SPI.write(reg & 0x7E); |
| Pinmanee | 1:baf91b6482eb | 106 | for (uint8_t index = 0; index < count; index++) |
| Pinmanee | 1:baf91b6482eb | 107 | { |
| Pinmanee | 1:baf91b6482eb | 108 | (void) m_SPI.write(values[index]); |
| Pinmanee | 1:baf91b6482eb | 109 | } |
| Pinmanee | 1:baf91b6482eb | 110 | |
| Pinmanee | 1:baf91b6482eb | 111 | m_CS = 1; /* Release SPI Chip MFRC522 */ |
| Pinmanee | 1:baf91b6482eb | 112 | } // End PCD_WriteRegister() |
| Pinmanee | 1:baf91b6482eb | 113 | |
| Pinmanee | 1:baf91b6482eb | 114 | /** |
| Pinmanee | 1:baf91b6482eb | 115 | * Reads a byte from the specified register in the MFRC522 chip. |
| Pinmanee | 1:baf91b6482eb | 116 | * The interface is described in the datasheet section 8.1.2. |
| Pinmanee | 1:baf91b6482eb | 117 | */ |
| Pinmanee | 1:baf91b6482eb | 118 | uint8_t MFRC522::PCD_ReadRegister(uint8_t reg) |
| Pinmanee | 1:baf91b6482eb | 119 | { |
| Pinmanee | 1:baf91b6482eb | 120 | uint8_t value; |
| Pinmanee | 1:baf91b6482eb | 121 | m_CS = 0; /* Select SPI Chip MFRC522 */ |
| Pinmanee | 1:baf91b6482eb | 122 | |
| Pinmanee | 1:baf91b6482eb | 123 | // MSB == 1 is for reading. LSB is not used in address. Datasheet section 8.1.2.3. |
| Pinmanee | 1:baf91b6482eb | 124 | (void) m_SPI.write(0x80 | reg); |
| Pinmanee | 1:baf91b6482eb | 125 | |
| Pinmanee | 1:baf91b6482eb | 126 | // Read the value back. Send 0 to stop reading. |
| Pinmanee | 1:baf91b6482eb | 127 | value = m_SPI.write(0); |
| Pinmanee | 1:baf91b6482eb | 128 | |
| Pinmanee | 1:baf91b6482eb | 129 | m_CS = 1; /* Release SPI Chip MFRC522 */ |
| Pinmanee | 1:baf91b6482eb | 130 | |
| Pinmanee | 1:baf91b6482eb | 131 | return value; |
| Pinmanee | 1:baf91b6482eb | 132 | } // End PCD_ReadRegister() |
| Pinmanee | 1:baf91b6482eb | 133 | |
| Pinmanee | 1:baf91b6482eb | 134 | /** |
| Pinmanee | 1:baf91b6482eb | 135 | * Reads a number of bytes from the specified register in the MFRC522 chip. |
| Pinmanee | 1:baf91b6482eb | 136 | * The interface is described in the datasheet section 8.1.2. |
| Pinmanee | 1:baf91b6482eb | 137 | */ |
| Pinmanee | 1:baf91b6482eb | 138 | void MFRC522::PCD_ReadRegister(uint8_t reg, uint8_t count, uint8_t *values, uint8_t rxAlign) |
| Pinmanee | 1:baf91b6482eb | 139 | { |
| Pinmanee | 1:baf91b6482eb | 140 | if (count == 0) { return; } |
| Pinmanee | 1:baf91b6482eb | 141 | |
| Pinmanee | 1:baf91b6482eb | 142 | uint8_t address = 0x80 | reg; // MSB == 1 is for reading. LSB is not used in address. Datasheet section 8.1.2.3. |
| Pinmanee | 1:baf91b6482eb | 143 | uint8_t index = 0; // Index in values array. |
| Pinmanee | 1:baf91b6482eb | 144 | |
| Pinmanee | 1:baf91b6482eb | 145 | m_CS = 0; /* Select SPI Chip MFRC522 */ |
| Pinmanee | 1:baf91b6482eb | 146 | count--; // One read is performed outside of the loop |
| Pinmanee | 1:baf91b6482eb | 147 | (void) m_SPI.write(address); // Tell MFRC522 which address we want to read |
| Pinmanee | 1:baf91b6482eb | 148 | |
| Pinmanee | 1:baf91b6482eb | 149 | while (index < count) |
| Pinmanee | 1:baf91b6482eb | 150 | { |
| Pinmanee | 1:baf91b6482eb | 151 | if ((index == 0) && rxAlign) // Only update bit positions rxAlign..7 in values[0] |
| Pinmanee | 1:baf91b6482eb | 152 | { |
| Pinmanee | 1:baf91b6482eb | 153 | // Create bit mask for bit positions rxAlign..7 |
| Pinmanee | 1:baf91b6482eb | 154 | uint8_t mask = 0; |
| Pinmanee | 1:baf91b6482eb | 155 | for (uint8_t i = rxAlign; i <= 7; i++) |
| Pinmanee | 1:baf91b6482eb | 156 | { |
| Pinmanee | 1:baf91b6482eb | 157 | mask |= (1 << i); |
| Pinmanee | 1:baf91b6482eb | 158 | } |
| Pinmanee | 1:baf91b6482eb | 159 | |
| Pinmanee | 1:baf91b6482eb | 160 | // Read value and tell that we want to read the same address again. |
| Pinmanee | 1:baf91b6482eb | 161 | uint8_t value = m_SPI.write(address); |
| Pinmanee | 1:baf91b6482eb | 162 | |
| Pinmanee | 1:baf91b6482eb | 163 | // Apply mask to both current value of values[0] and the new data in value. |
| Pinmanee | 1:baf91b6482eb | 164 | values[0] = (values[index] & ~mask) | (value & mask); |
| Pinmanee | 1:baf91b6482eb | 165 | } |
| Pinmanee | 1:baf91b6482eb | 166 | else |
| Pinmanee | 1:baf91b6482eb | 167 | { |
| Pinmanee | 1:baf91b6482eb | 168 | // Read value and tell that we want to read the same address again. |
| Pinmanee | 1:baf91b6482eb | 169 | values[index] = m_SPI.write(address); |
| Pinmanee | 1:baf91b6482eb | 170 | } |
| Pinmanee | 1:baf91b6482eb | 171 | |
| Pinmanee | 1:baf91b6482eb | 172 | index++; |
| Pinmanee | 1:baf91b6482eb | 173 | } |
| Pinmanee | 1:baf91b6482eb | 174 | |
| Pinmanee | 1:baf91b6482eb | 175 | values[index] = m_SPI.write(0); // Read the final byte. Send 0 to stop reading. |
| Pinmanee | 1:baf91b6482eb | 176 | |
| Pinmanee | 1:baf91b6482eb | 177 | m_CS = 1; /* Release SPI Chip MFRC522 */ |
| Pinmanee | 1:baf91b6482eb | 178 | } // End PCD_ReadRegister() |
| Pinmanee | 1:baf91b6482eb | 179 | |
| Pinmanee | 1:baf91b6482eb | 180 | /** |
| Pinmanee | 1:baf91b6482eb | 181 | * Sets the bits given in mask in register reg. |
| Pinmanee | 1:baf91b6482eb | 182 | */ |
| Pinmanee | 1:baf91b6482eb | 183 | void MFRC522::PCD_SetRegisterBits(uint8_t reg, uint8_t mask) |
| Pinmanee | 1:baf91b6482eb | 184 | { |
| Pinmanee | 1:baf91b6482eb | 185 | uint8_t tmp = PCD_ReadRegister(reg); |
| Pinmanee | 1:baf91b6482eb | 186 | PCD_WriteRegister(reg, tmp | mask); // set bit mask |
| Pinmanee | 1:baf91b6482eb | 187 | } // End PCD_SetRegisterBitMask() |
| Pinmanee | 1:baf91b6482eb | 188 | |
| Pinmanee | 1:baf91b6482eb | 189 | /** |
| Pinmanee | 1:baf91b6482eb | 190 | * Clears the bits given in mask from register reg. |
| Pinmanee | 1:baf91b6482eb | 191 | */ |
| Pinmanee | 1:baf91b6482eb | 192 | void MFRC522::PCD_ClrRegisterBits(uint8_t reg, uint8_t mask) |
| Pinmanee | 1:baf91b6482eb | 193 | { |
| Pinmanee | 1:baf91b6482eb | 194 | uint8_t tmp = PCD_ReadRegister(reg); |
| Pinmanee | 1:baf91b6482eb | 195 | PCD_WriteRegister(reg, tmp & (~mask)); // clear bit mask |
| Pinmanee | 1:baf91b6482eb | 196 | } // End PCD_ClearRegisterBitMask() |
| Pinmanee | 1:baf91b6482eb | 197 | |
| Pinmanee | 1:baf91b6482eb | 198 | |
| Pinmanee | 1:baf91b6482eb | 199 | /** |
| Pinmanee | 1:baf91b6482eb | 200 | * Use the CRC coprocessor in the MFRC522 to calculate a CRC_A. |
| Pinmanee | 1:baf91b6482eb | 201 | */ |
| Pinmanee | 1:baf91b6482eb | 202 | uint8_t MFRC522::PCD_CalculateCRC(uint8_t *data, uint8_t length, uint8_t *result) |
| Pinmanee | 1:baf91b6482eb | 203 | { |
| Pinmanee | 1:baf91b6482eb | 204 | PCD_WriteRegister(CommandReg, PCD_Idle); // Stop any active command. |
| Pinmanee | 1:baf91b6482eb | 205 | PCD_WriteRegister(DivIrqReg, 0x04); // Clear the CRCIRq interrupt request bit |
| Pinmanee | 1:baf91b6482eb | 206 | PCD_SetRegisterBits(FIFOLevelReg, 0x80); // FlushBuffer = 1, FIFO initialization |
| Pinmanee | 1:baf91b6482eb | 207 | PCD_WriteRegister(FIFODataReg, length, data); // Write data to the FIFO |
| Pinmanee | 1:baf91b6482eb | 208 | PCD_WriteRegister(CommandReg, PCD_CalcCRC); // Start the calculation |
| Pinmanee | 1:baf91b6482eb | 209 | |
| Pinmanee | 1:baf91b6482eb | 210 | // Wait for the CRC calculation to complete. Each iteration of the while-loop takes 17.73us. |
| Pinmanee | 1:baf91b6482eb | 211 | uint16_t i = 5000; |
| Pinmanee | 1:baf91b6482eb | 212 | uint8_t n; |
| Pinmanee | 1:baf91b6482eb | 213 | while (1) |
| Pinmanee | 1:baf91b6482eb | 214 | { |
| Pinmanee | 1:baf91b6482eb | 215 | n = PCD_ReadRegister(DivIrqReg); // DivIrqReg[7..0] bits are: Set2 reserved reserved MfinActIRq reserved CRCIRq reserved reserved |
| Pinmanee | 1:baf91b6482eb | 216 | if (n & 0x04) |
| Pinmanee | 1:baf91b6482eb | 217 | { |
| Pinmanee | 1:baf91b6482eb | 218 | // CRCIRq bit set - calculation done |
| Pinmanee | 1:baf91b6482eb | 219 | break; |
| Pinmanee | 1:baf91b6482eb | 220 | } |
| Pinmanee | 1:baf91b6482eb | 221 | |
| Pinmanee | 1:baf91b6482eb | 222 | if (--i == 0) |
| Pinmanee | 1:baf91b6482eb | 223 | { |
| Pinmanee | 1:baf91b6482eb | 224 | // The emergency break. We will eventually terminate on this one after 89ms. |
| Pinmanee | 1:baf91b6482eb | 225 | // Communication with the MFRC522 might be down. |
| Pinmanee | 1:baf91b6482eb | 226 | return STATUS_TIMEOUT; |
| Pinmanee | 1:baf91b6482eb | 227 | } |
| Pinmanee | 1:baf91b6482eb | 228 | } |
| Pinmanee | 1:baf91b6482eb | 229 | |
| Pinmanee | 1:baf91b6482eb | 230 | // Stop calculating CRC for new content in the FIFO. |
| Pinmanee | 1:baf91b6482eb | 231 | PCD_WriteRegister(CommandReg, PCD_Idle); |
| Pinmanee | 1:baf91b6482eb | 232 | |
| Pinmanee | 1:baf91b6482eb | 233 | // Transfer the result from the registers to the result buffer |
| Pinmanee | 1:baf91b6482eb | 234 | result[0] = PCD_ReadRegister(CRCResultRegL); |
| Pinmanee | 1:baf91b6482eb | 235 | result[1] = PCD_ReadRegister(CRCResultRegH); |
| Pinmanee | 1:baf91b6482eb | 236 | return STATUS_OK; |
| Pinmanee | 1:baf91b6482eb | 237 | } // End PCD_CalculateCRC() |
| Pinmanee | 1:baf91b6482eb | 238 | |
| Pinmanee | 1:baf91b6482eb | 239 | |
| Pinmanee | 1:baf91b6482eb | 240 | ///////////////////////////////////////////////////////////////////////////////////// |
| Pinmanee | 1:baf91b6482eb | 241 | // Functions for manipulating the MFRC522 |
| Pinmanee | 1:baf91b6482eb | 242 | ///////////////////////////////////////////////////////////////////////////////////// |
| Pinmanee | 1:baf91b6482eb | 243 | |
| Pinmanee | 1:baf91b6482eb | 244 | /** |
| Pinmanee | 1:baf91b6482eb | 245 | * Initializes the MFRC522 chip. |
| Pinmanee | 1:baf91b6482eb | 246 | */ |
| Pinmanee | 1:baf91b6482eb | 247 | void MFRC522::PCD_Init() |
| Pinmanee | 1:baf91b6482eb | 248 | { |
| Pinmanee | 1:baf91b6482eb | 249 | /* Reset MFRC522 */ |
| Pinmanee | 1:baf91b6482eb | 250 | m_RESET = 0; |
| Pinmanee | 1:baf91b6482eb | 251 | wait_ms(10); |
| Pinmanee | 1:baf91b6482eb | 252 | m_RESET = 1; |
| Pinmanee | 1:baf91b6482eb | 253 | |
| Pinmanee | 1:baf91b6482eb | 254 | // Section 8.8.2 in the datasheet says the oscillator start-up time is the start up time of the crystal + 37,74us. Let us be generous: 50ms. |
| Pinmanee | 1:baf91b6482eb | 255 | wait_ms(50); |
| Pinmanee | 1:baf91b6482eb | 256 | |
| Pinmanee | 1:baf91b6482eb | 257 | // When communicating with a PICC we need a timeout if something goes wrong. |
| Pinmanee | 1:baf91b6482eb | 258 | // f_timer = 13.56 MHz / (2*TPreScaler+1) where TPreScaler = [TPrescaler_Hi:TPrescaler_Lo]. |
| Pinmanee | 1:baf91b6482eb | 259 | // TPrescaler_Hi are the four low bits in TModeReg. TPrescaler_Lo is TPrescalerReg. |
| Pinmanee | 1:baf91b6482eb | 260 | PCD_WriteRegister(TModeReg, 0x80); // TAuto=1; timer starts automatically at the end of the transmission in all communication modes at all speeds |
| Pinmanee | 1:baf91b6482eb | 261 | PCD_WriteRegister(TPrescalerReg, 0xA9); // TPreScaler = TModeReg[3..0]:TPrescalerReg, ie 0x0A9 = 169 => f_timer=40kHz, ie a timer period of 25us. |
| Pinmanee | 1:baf91b6482eb | 262 | PCD_WriteRegister(TReloadRegH, 0x03); // Reload timer with 0x3E8 = 1000, ie 25ms before timeout. |
| Pinmanee | 1:baf91b6482eb | 263 | PCD_WriteRegister(TReloadRegL, 0xE8); |
| Pinmanee | 1:baf91b6482eb | 264 | |
| Pinmanee | 1:baf91b6482eb | 265 | PCD_WriteRegister(TxASKReg, 0x40); // Default 0x00. Force a 100 % ASK modulation independent of the ModGsPReg register setting |
| Pinmanee | 1:baf91b6482eb | 266 | PCD_WriteRegister(ModeReg, 0x3D); // Default 0x3F. Set the preset value for the CRC coprocessor for the CalcCRC command to 0x6363 (ISO 14443-3 part 6.2.4) |
| Pinmanee | 1:baf91b6482eb | 267 | |
| Pinmanee | 1:baf91b6482eb | 268 | PCD_WriteRegister(RFCfgReg, (0x07<<4)); // Set Rx Gain to max |
| Pinmanee | 1:baf91b6482eb | 269 | |
| Pinmanee | 1:baf91b6482eb | 270 | PCD_AntennaOn(); // Enable the antenna driver pins TX1 and TX2 (they were disabled by the reset) |
| Pinmanee | 1:baf91b6482eb | 271 | } // End PCD_Init() |
| Pinmanee | 1:baf91b6482eb | 272 | |
| Pinmanee | 1:baf91b6482eb | 273 | /** |
| Pinmanee | 1:baf91b6482eb | 274 | * Performs a soft reset on the MFRC522 chip and waits for it to be ready again. |
| Pinmanee | 1:baf91b6482eb | 275 | */ |
| Pinmanee | 1:baf91b6482eb | 276 | void MFRC522::PCD_Reset() |
| Pinmanee | 1:baf91b6482eb | 277 | { |
| Pinmanee | 1:baf91b6482eb | 278 | PCD_WriteRegister(CommandReg, PCD_SoftReset); // Issue the SoftReset command. |
| Pinmanee | 1:baf91b6482eb | 279 | // The datasheet does not mention how long the SoftRest command takes to complete. |
| Pinmanee | 1:baf91b6482eb | 280 | // But the MFRC522 might have been in soft power-down mode (triggered by bit 4 of CommandReg) |
| Pinmanee | 1:baf91b6482eb | 281 | // Section 8.8.2 in the datasheet says the oscillator start-up time is the start up time of the crystal + 37,74us. Let us be generous: 50ms. |
| Pinmanee | 1:baf91b6482eb | 282 | wait_ms(50); |
| Pinmanee | 1:baf91b6482eb | 283 | |
| Pinmanee | 1:baf91b6482eb | 284 | // Wait for the PowerDown bit in CommandReg to be cleared |
| Pinmanee | 1:baf91b6482eb | 285 | while (PCD_ReadRegister(CommandReg) & (1<<4)) |
| Pinmanee | 1:baf91b6482eb | 286 | { |
| Pinmanee | 1:baf91b6482eb | 287 | // PCD still restarting - unlikely after waiting 50ms, but better safe than sorry. |
| Pinmanee | 1:baf91b6482eb | 288 | } |
| Pinmanee | 1:baf91b6482eb | 289 | } // End PCD_Reset() |
| Pinmanee | 1:baf91b6482eb | 290 | |
| Pinmanee | 1:baf91b6482eb | 291 | /** |
| Pinmanee | 1:baf91b6482eb | 292 | * Turns the antenna on by enabling pins TX1 and TX2. |
| Pinmanee | 1:baf91b6482eb | 293 | * After a reset these pins disabled. |
| Pinmanee | 1:baf91b6482eb | 294 | */ |
| Pinmanee | 1:baf91b6482eb | 295 | void MFRC522::PCD_AntennaOn() |
| Pinmanee | 1:baf91b6482eb | 296 | { |
| Pinmanee | 1:baf91b6482eb | 297 | uint8_t value = PCD_ReadRegister(TxControlReg); |
| Pinmanee | 1:baf91b6482eb | 298 | if ((value & 0x03) != 0x03) |
| Pinmanee | 1:baf91b6482eb | 299 | { |
| Pinmanee | 1:baf91b6482eb | 300 | PCD_WriteRegister(TxControlReg, value | 0x03); |
| Pinmanee | 1:baf91b6482eb | 301 | } |
| Pinmanee | 1:baf91b6482eb | 302 | } // End PCD_AntennaOn() |
| Pinmanee | 1:baf91b6482eb | 303 | |
| Pinmanee | 1:baf91b6482eb | 304 | ///////////////////////////////////////////////////////////////////////////////////// |
| Pinmanee | 1:baf91b6482eb | 305 | // Functions for communicating with PICCs |
| Pinmanee | 1:baf91b6482eb | 306 | ///////////////////////////////////////////////////////////////////////////////////// |
| Pinmanee | 1:baf91b6482eb | 307 | |
| Pinmanee | 1:baf91b6482eb | 308 | /** |
| Pinmanee | 1:baf91b6482eb | 309 | * Executes the Transceive command. |
| Pinmanee | 1:baf91b6482eb | 310 | * CRC validation can only be done if backData and backLen are specified. |
| Pinmanee | 1:baf91b6482eb | 311 | */ |
| Pinmanee | 1:baf91b6482eb | 312 | uint8_t MFRC522::PCD_TransceiveData(uint8_t *sendData, |
| Pinmanee | 1:baf91b6482eb | 313 | uint8_t sendLen, |
| Pinmanee | 1:baf91b6482eb | 314 | uint8_t *backData, |
| Pinmanee | 1:baf91b6482eb | 315 | uint8_t *backLen, |
| Pinmanee | 1:baf91b6482eb | 316 | uint8_t *validBits, |
| Pinmanee | 1:baf91b6482eb | 317 | uint8_t rxAlign, |
| Pinmanee | 1:baf91b6482eb | 318 | bool checkCRC) |
| Pinmanee | 1:baf91b6482eb | 319 | { |
| Pinmanee | 1:baf91b6482eb | 320 | uint8_t waitIRq = 0x30; // RxIRq and IdleIRq |
| Pinmanee | 1:baf91b6482eb | 321 | return PCD_CommunicateWithPICC(PCD_Transceive, waitIRq, sendData, sendLen, backData, backLen, validBits, rxAlign, checkCRC); |
| Pinmanee | 1:baf91b6482eb | 322 | } // End PCD_TransceiveData() |
| Pinmanee | 1:baf91b6482eb | 323 | |
| Pinmanee | 1:baf91b6482eb | 324 | /** |
| Pinmanee | 1:baf91b6482eb | 325 | * Transfers data to the MFRC522 FIFO, executes a commend, waits for completion and transfers data back from the FIFO. |
| Pinmanee | 1:baf91b6482eb | 326 | * CRC validation can only be done if backData and backLen are specified. |
| Pinmanee | 1:baf91b6482eb | 327 | */ |
| Pinmanee | 1:baf91b6482eb | 328 | uint8_t MFRC522::PCD_CommunicateWithPICC(uint8_t command, |
| Pinmanee | 1:baf91b6482eb | 329 | uint8_t waitIRq, |
| Pinmanee | 1:baf91b6482eb | 330 | uint8_t *sendData, |
| Pinmanee | 1:baf91b6482eb | 331 | uint8_t sendLen, |
| Pinmanee | 1:baf91b6482eb | 332 | uint8_t *backData, |
| Pinmanee | 1:baf91b6482eb | 333 | uint8_t *backLen, |
| Pinmanee | 1:baf91b6482eb | 334 | uint8_t *validBits, |
| Pinmanee | 1:baf91b6482eb | 335 | uint8_t rxAlign, |
| Pinmanee | 1:baf91b6482eb | 336 | bool checkCRC) |
| Pinmanee | 1:baf91b6482eb | 337 | { |
| Pinmanee | 1:baf91b6482eb | 338 | uint8_t n, _validBits = 0; |
| Pinmanee | 1:baf91b6482eb | 339 | uint32_t i; |
| Pinmanee | 1:baf91b6482eb | 340 | |
| Pinmanee | 1:baf91b6482eb | 341 | // Prepare values for BitFramingReg |
| Pinmanee | 1:baf91b6482eb | 342 | uint8_t txLastBits = validBits ? *validBits : 0; |
| Pinmanee | 1:baf91b6482eb | 343 | uint8_t bitFraming = (rxAlign << 4) + txLastBits; // RxAlign = BitFramingReg[6..4]. TxLastBits = BitFramingReg[2..0] |
| Pinmanee | 1:baf91b6482eb | 344 | |
| Pinmanee | 1:baf91b6482eb | 345 | PCD_WriteRegister(CommandReg, PCD_Idle); // Stop any active command. |
| Pinmanee | 1:baf91b6482eb | 346 | PCD_WriteRegister(ComIrqReg, 0x7F); // Clear all seven interrupt request bits |
| Pinmanee | 1:baf91b6482eb | 347 | PCD_SetRegisterBits(FIFOLevelReg, 0x80); // FlushBuffer = 1, FIFO initialization |
| Pinmanee | 1:baf91b6482eb | 348 | PCD_WriteRegister(FIFODataReg, sendLen, sendData); // Write sendData to the FIFO |
| Pinmanee | 1:baf91b6482eb | 349 | PCD_WriteRegister(BitFramingReg, bitFraming); // Bit adjustments |
| Pinmanee | 1:baf91b6482eb | 350 | PCD_WriteRegister(CommandReg, command); // Execute the command |
| Pinmanee | 1:baf91b6482eb | 351 | if (command == PCD_Transceive) |
| Pinmanee | 1:baf91b6482eb | 352 | { |
| Pinmanee | 1:baf91b6482eb | 353 | PCD_SetRegisterBits(BitFramingReg, 0x80); // StartSend=1, transmission of data starts |
| Pinmanee | 1:baf91b6482eb | 354 | } |
| Pinmanee | 1:baf91b6482eb | 355 | |
| Pinmanee | 1:baf91b6482eb | 356 | // Wait for the command to complete. |
| Pinmanee | 1:baf91b6482eb | 357 | // In PCD_Init() we set the TAuto flag in TModeReg. This means the timer automatically starts when the PCD stops transmitting. |
| Pinmanee | 1:baf91b6482eb | 358 | // Each iteration of the do-while-loop takes 17.86us. |
| Pinmanee | 1:baf91b6482eb | 359 | i = 2000; |
| Pinmanee | 1:baf91b6482eb | 360 | while (1) |
| Pinmanee | 1:baf91b6482eb | 361 | { |
| Pinmanee | 1:baf91b6482eb | 362 | n = PCD_ReadRegister(ComIrqReg); // ComIrqReg[7..0] bits are: Set1 TxIRq RxIRq IdleIRq HiAlertIRq LoAlertIRq ErrIRq TimerIRq |
| Pinmanee | 1:baf91b6482eb | 363 | if (n & waitIRq) |
| Pinmanee | 1:baf91b6482eb | 364 | { // One of the interrupts that signal success has been set. |
| Pinmanee | 1:baf91b6482eb | 365 | break; |
| Pinmanee | 1:baf91b6482eb | 366 | } |
| Pinmanee | 1:baf91b6482eb | 367 | |
| Pinmanee | 1:baf91b6482eb | 368 | if (n & 0x01) |
| Pinmanee | 1:baf91b6482eb | 369 | { // Timer interrupt - nothing received in 25ms |
| Pinmanee | 1:baf91b6482eb | 370 | return STATUS_TIMEOUT; |
| Pinmanee | 1:baf91b6482eb | 371 | } |
| Pinmanee | 1:baf91b6482eb | 372 | |
| Pinmanee | 1:baf91b6482eb | 373 | if (--i == 0) |
| Pinmanee | 1:baf91b6482eb | 374 | { // The emergency break. If all other condions fail we will eventually terminate on this one after 35.7ms. Communication with the MFRC522 might be down. |
| Pinmanee | 1:baf91b6482eb | 375 | return STATUS_TIMEOUT; |
| Pinmanee | 1:baf91b6482eb | 376 | } |
| Pinmanee | 1:baf91b6482eb | 377 | } |
| Pinmanee | 1:baf91b6482eb | 378 | |
| Pinmanee | 1:baf91b6482eb | 379 | // Stop now if any errors except collisions were detected. |
| Pinmanee | 1:baf91b6482eb | 380 | uint8_t errorRegValue = PCD_ReadRegister(ErrorReg); // ErrorReg[7..0] bits are: WrErr TempErr reserved BufferOvfl CollErr CRCErr ParityErr ProtocolErr |
| Pinmanee | 1:baf91b6482eb | 381 | if (errorRegValue & 0x13) |
| Pinmanee | 1:baf91b6482eb | 382 | { // BufferOvfl ParityErr ProtocolErr |
| Pinmanee | 1:baf91b6482eb | 383 | return STATUS_ERROR; |
| Pinmanee | 1:baf91b6482eb | 384 | } |
| Pinmanee | 1:baf91b6482eb | 385 | |
| Pinmanee | 1:baf91b6482eb | 386 | // If the caller wants data back, get it from the MFRC522. |
| Pinmanee | 1:baf91b6482eb | 387 | if (backData && backLen) |
| Pinmanee | 1:baf91b6482eb | 388 | { |
| Pinmanee | 1:baf91b6482eb | 389 | n = PCD_ReadRegister(FIFOLevelReg); // Number of bytes in the FIFO |
| Pinmanee | 1:baf91b6482eb | 390 | if (n > *backLen) |
| Pinmanee | 1:baf91b6482eb | 391 | { |
| Pinmanee | 1:baf91b6482eb | 392 | return STATUS_NO_ROOM; |
| Pinmanee | 1:baf91b6482eb | 393 | } |
| Pinmanee | 1:baf91b6482eb | 394 | |
| Pinmanee | 1:baf91b6482eb | 395 | *backLen = n; // Number of bytes returned |
| Pinmanee | 1:baf91b6482eb | 396 | PCD_ReadRegister(FIFODataReg, n, backData, rxAlign); // Get received data from FIFO |
| Pinmanee | 1:baf91b6482eb | 397 | _validBits = PCD_ReadRegister(ControlReg) & 0x07; // RxLastBits[2:0] indicates the number of valid bits in the last received byte. If this value is 000b, the whole byte is valid. |
| Pinmanee | 1:baf91b6482eb | 398 | if (validBits) |
| Pinmanee | 1:baf91b6482eb | 399 | { |
| Pinmanee | 1:baf91b6482eb | 400 | *validBits = _validBits; |
| Pinmanee | 1:baf91b6482eb | 401 | } |
| Pinmanee | 1:baf91b6482eb | 402 | } |
| Pinmanee | 1:baf91b6482eb | 403 | |
| Pinmanee | 1:baf91b6482eb | 404 | // Tell about collisions |
| Pinmanee | 1:baf91b6482eb | 405 | if (errorRegValue & 0x08) |
| Pinmanee | 1:baf91b6482eb | 406 | { // CollErr |
| Pinmanee | 1:baf91b6482eb | 407 | return STATUS_COLLISION; |
| Pinmanee | 1:baf91b6482eb | 408 | } |
| Pinmanee | 1:baf91b6482eb | 409 | |
| Pinmanee | 1:baf91b6482eb | 410 | // Perform CRC_A validation if requested. |
| Pinmanee | 1:baf91b6482eb | 411 | if (backData && backLen && checkCRC) |
| Pinmanee | 1:baf91b6482eb | 412 | { |
| Pinmanee | 1:baf91b6482eb | 413 | // In this case a MIFARE Classic NAK is not OK. |
| Pinmanee | 1:baf91b6482eb | 414 | if ((*backLen == 1) && (_validBits == 4)) |
| Pinmanee | 1:baf91b6482eb | 415 | { |
| Pinmanee | 1:baf91b6482eb | 416 | return STATUS_MIFARE_NACK; |
| Pinmanee | 1:baf91b6482eb | 417 | } |
| Pinmanee | 1:baf91b6482eb | 418 | |
| Pinmanee | 1:baf91b6482eb | 419 | // We need at least the CRC_A value and all 8 bits of the last byte must be received. |
| Pinmanee | 1:baf91b6482eb | 420 | if ((*backLen < 2) || (_validBits != 0)) |
| Pinmanee | 1:baf91b6482eb | 421 | { |
| Pinmanee | 1:baf91b6482eb | 422 | return STATUS_CRC_WRONG; |
| Pinmanee | 1:baf91b6482eb | 423 | } |
| Pinmanee | 1:baf91b6482eb | 424 | |
| Pinmanee | 1:baf91b6482eb | 425 | // Verify CRC_A - do our own calculation and store the control in controlBuffer. |
| Pinmanee | 1:baf91b6482eb | 426 | uint8_t controlBuffer[2]; |
| Pinmanee | 1:baf91b6482eb | 427 | n = PCD_CalculateCRC(&backData[0], *backLen - 2, &controlBuffer[0]); |
| Pinmanee | 1:baf91b6482eb | 428 | if (n != STATUS_OK) |
| Pinmanee | 1:baf91b6482eb | 429 | { |
| Pinmanee | 1:baf91b6482eb | 430 | return n; |
| Pinmanee | 1:baf91b6482eb | 431 | } |
| Pinmanee | 1:baf91b6482eb | 432 | |
| Pinmanee | 1:baf91b6482eb | 433 | if ((backData[*backLen - 2] != controlBuffer[0]) || (backData[*backLen - 1] != controlBuffer[1])) |
| Pinmanee | 1:baf91b6482eb | 434 | { |
| Pinmanee | 1:baf91b6482eb | 435 | return STATUS_CRC_WRONG; |
| Pinmanee | 1:baf91b6482eb | 436 | } |
| Pinmanee | 1:baf91b6482eb | 437 | } |
| Pinmanee | 1:baf91b6482eb | 438 | |
| Pinmanee | 1:baf91b6482eb | 439 | return STATUS_OK; |
| Pinmanee | 1:baf91b6482eb | 440 | } // End PCD_CommunicateWithPICC() |
| Pinmanee | 1:baf91b6482eb | 441 | |
| Pinmanee | 1:baf91b6482eb | 442 | /* |
| Pinmanee | 1:baf91b6482eb | 443 | * Transmits a REQuest command, Type A. Invites PICCs in state IDLE to go to READY and prepare for anticollision or selection. 7 bit frame. |
| Pinmanee | 1:baf91b6482eb | 444 | * Beware: When two PICCs are in the field at the same time I often get STATUS_TIMEOUT - probably due do bad antenna design. |
| Pinmanee | 1:baf91b6482eb | 445 | */ |
| Pinmanee | 1:baf91b6482eb | 446 | uint8_t MFRC522::PICC_RequestA(uint8_t *bufferATQA, uint8_t *bufferSize) |
| Pinmanee | 1:baf91b6482eb | 447 | { |
| Pinmanee | 1:baf91b6482eb | 448 | return PICC_REQA_or_WUPA(PICC_CMD_REQA, bufferATQA, bufferSize); |
| Pinmanee | 1:baf91b6482eb | 449 | } // End PICC_RequestA() |
| Pinmanee | 1:baf91b6482eb | 450 | |
| Pinmanee | 1:baf91b6482eb | 451 | /** |
| Pinmanee | 1:baf91b6482eb | 452 | * Transmits a Wake-UP command, Type A. Invites PICCs in state IDLE and HALT to go to READY(*) and prepare for anticollision or selection. 7 bit frame. |
| Pinmanee | 1:baf91b6482eb | 453 | * Beware: When two PICCs are in the field at the same time I often get STATUS_TIMEOUT - probably due do bad antenna design. |
| Pinmanee | 1:baf91b6482eb | 454 | */ |
| Pinmanee | 1:baf91b6482eb | 455 | uint8_t MFRC522::PICC_WakeupA(uint8_t *bufferATQA, uint8_t *bufferSize) |
| Pinmanee | 1:baf91b6482eb | 456 | { |
| Pinmanee | 1:baf91b6482eb | 457 | return PICC_REQA_or_WUPA(PICC_CMD_WUPA, bufferATQA, bufferSize); |
| Pinmanee | 1:baf91b6482eb | 458 | } // End PICC_WakeupA() |
| Pinmanee | 1:baf91b6482eb | 459 | |
| Pinmanee | 1:baf91b6482eb | 460 | /* |
| Pinmanee | 1:baf91b6482eb | 461 | * Transmits REQA or WUPA commands. |
| Pinmanee | 1:baf91b6482eb | 462 | * Beware: When two PICCs are in the field at the same time I often get STATUS_TIMEOUT - probably due do bad antenna design. |
| Pinmanee | 1:baf91b6482eb | 463 | */ |
| Pinmanee | 1:baf91b6482eb | 464 | uint8_t MFRC522::PICC_REQA_or_WUPA(uint8_t command, uint8_t *bufferATQA, uint8_t *bufferSize) |
| Pinmanee | 1:baf91b6482eb | 465 | { |
| Pinmanee | 1:baf91b6482eb | 466 | uint8_t validBits; |
| Pinmanee | 1:baf91b6482eb | 467 | uint8_t status; |
| Pinmanee | 1:baf91b6482eb | 468 | |
| Pinmanee | 1:baf91b6482eb | 469 | if (bufferATQA == NULL || *bufferSize < 2) |
| Pinmanee | 1:baf91b6482eb | 470 | { // The ATQA response is 2 bytes long. |
| Pinmanee | 1:baf91b6482eb | 471 | return STATUS_NO_ROOM; |
| Pinmanee | 1:baf91b6482eb | 472 | } |
| Pinmanee | 1:baf91b6482eb | 473 | |
| Pinmanee | 1:baf91b6482eb | 474 | // ValuesAfterColl=1 => Bits received after collision are cleared. |
| Pinmanee | 1:baf91b6482eb | 475 | PCD_ClrRegisterBits(CollReg, 0x80); |
| Pinmanee | 1:baf91b6482eb | 476 | |
| Pinmanee | 1:baf91b6482eb | 477 | // For REQA and WUPA we need the short frame format |
| Pinmanee | 1:baf91b6482eb | 478 | // - transmit only 7 bits of the last (and only) byte. TxLastBits = BitFramingReg[2..0] |
| Pinmanee | 1:baf91b6482eb | 479 | validBits = 7; |
| Pinmanee | 1:baf91b6482eb | 480 | |
| Pinmanee | 1:baf91b6482eb | 481 | status = PCD_TransceiveData(&command, 1, bufferATQA, bufferSize, &validBits); |
| Pinmanee | 1:baf91b6482eb | 482 | if (status != STATUS_OK) |
| Pinmanee | 1:baf91b6482eb | 483 | { |
| Pinmanee | 1:baf91b6482eb | 484 | return status; |
| Pinmanee | 1:baf91b6482eb | 485 | } |
| Pinmanee | 1:baf91b6482eb | 486 | |
| Pinmanee | 1:baf91b6482eb | 487 | if ((*bufferSize != 2) || (validBits != 0)) |
| Pinmanee | 1:baf91b6482eb | 488 | { // ATQA must be exactly 16 bits. |
| Pinmanee | 1:baf91b6482eb | 489 | return STATUS_ERROR; |
| Pinmanee | 1:baf91b6482eb | 490 | } |
| Pinmanee | 1:baf91b6482eb | 491 | |
| Pinmanee | 1:baf91b6482eb | 492 | return STATUS_OK; |
| Pinmanee | 1:baf91b6482eb | 493 | } // End PICC_REQA_or_WUPA() |
| Pinmanee | 1:baf91b6482eb | 494 | |
| Pinmanee | 1:baf91b6482eb | 495 | /* |
| Pinmanee | 1:baf91b6482eb | 496 | * Transmits SELECT/ANTICOLLISION commands to select a single PICC. |
| Pinmanee | 1:baf91b6482eb | 497 | */ |
| Pinmanee | 1:baf91b6482eb | 498 | uint8_t MFRC522::PICC_Select(Uid *uid, uint8_t validBits) |
| Pinmanee | 1:baf91b6482eb | 499 | { |
| Pinmanee | 1:baf91b6482eb | 500 | bool uidComplete; |
| Pinmanee | 1:baf91b6482eb | 501 | bool selectDone; |
| Pinmanee | 1:baf91b6482eb | 502 | bool useCascadeTag; |
| Pinmanee | 1:baf91b6482eb | 503 | uint8_t cascadeLevel = 1; |
| Pinmanee | 1:baf91b6482eb | 504 | uint8_t result; |
| Pinmanee | 1:baf91b6482eb | 505 | uint8_t count; |
| Pinmanee | 1:baf91b6482eb | 506 | uint8_t index; |
| Pinmanee | 1:baf91b6482eb | 507 | uint8_t uidIndex; // The first index in uid->uidByte[] that is used in the current Cascade Level. |
| Pinmanee | 1:baf91b6482eb | 508 | uint8_t currentLevelKnownBits; // The number of known UID bits in the current Cascade Level. |
| Pinmanee | 1:baf91b6482eb | 509 | uint8_t buffer[9]; // The SELECT/ANTICOLLISION commands uses a 7 byte standard frame + 2 bytes CRC_A |
| Pinmanee | 1:baf91b6482eb | 510 | uint8_t bufferUsed; // The number of bytes used in the buffer, ie the number of bytes to transfer to the FIFO. |
| Pinmanee | 1:baf91b6482eb | 511 | uint8_t rxAlign; // Used in BitFramingReg. Defines the bit position for the first bit received. |
| Pinmanee | 1:baf91b6482eb | 512 | uint8_t txLastBits; // Used in BitFramingReg. The number of valid bits in the last transmitted byte. |
| Pinmanee | 1:baf91b6482eb | 513 | uint8_t *responseBuffer; |
| Pinmanee | 1:baf91b6482eb | 514 | uint8_t responseLength; |
| Pinmanee | 1:baf91b6482eb | 515 | |
| Pinmanee | 1:baf91b6482eb | 516 | // Description of buffer structure: |
| Pinmanee | 1:baf91b6482eb | 517 | // Byte 0: SEL Indicates the Cascade Level: PICC_CMD_SEL_CL1, PICC_CMD_SEL_CL2 or PICC_CMD_SEL_CL3 |
| Pinmanee | 1:baf91b6482eb | 518 | // Byte 1: NVB Number of Valid Bits (in complete command, not just the UID): High nibble: complete bytes, Low nibble: Extra bits. |
| Pinmanee | 1:baf91b6482eb | 519 | // Byte 2: UID-data or CT See explanation below. CT means Cascade Tag. |
| Pinmanee | 1:baf91b6482eb | 520 | // Byte 3: UID-data |
| Pinmanee | 1:baf91b6482eb | 521 | // Byte 4: UID-data |
| Pinmanee | 1:baf91b6482eb | 522 | // Byte 5: UID-data |
| Pinmanee | 1:baf91b6482eb | 523 | // Byte 6: BCC Block Check Character - XOR of bytes 2-5 |
| Pinmanee | 1:baf91b6482eb | 524 | // Byte 7: CRC_A |
| Pinmanee | 1:baf91b6482eb | 525 | // Byte 8: CRC_A |
| Pinmanee | 1:baf91b6482eb | 526 | // The BCC and CRC_A is only transmitted if we know all the UID bits of the current Cascade Level. |
| Pinmanee | 1:baf91b6482eb | 527 | // |
| Pinmanee | 1:baf91b6482eb | 528 | // Description of bytes 2-5: (Section 6.5.4 of the ISO/IEC 14443-3 draft: UID contents and cascade levels) |
| Pinmanee | 1:baf91b6482eb | 529 | // UID size Cascade level Byte2 Byte3 Byte4 Byte5 |
| Pinmanee | 1:baf91b6482eb | 530 | // ======== ============= ===== ===== ===== ===== |
| Pinmanee | 1:baf91b6482eb | 531 | // 4 bytes 1 uid0 uid1 uid2 uid3 |
| Pinmanee | 1:baf91b6482eb | 532 | // 7 bytes 1 CT uid0 uid1 uid2 |
| Pinmanee | 1:baf91b6482eb | 533 | // 2 uid3 uid4 uid5 uid6 |
| Pinmanee | 1:baf91b6482eb | 534 | // 10 bytes 1 CT uid0 uid1 uid2 |
| Pinmanee | 1:baf91b6482eb | 535 | // 2 CT uid3 uid4 uid5 |
| Pinmanee | 1:baf91b6482eb | 536 | // 3 uid6 uid7 uid8 uid9 |
| Pinmanee | 1:baf91b6482eb | 537 | |
| Pinmanee | 1:baf91b6482eb | 538 | // Sanity checks |
| Pinmanee | 1:baf91b6482eb | 539 | if (validBits > 80) |
| Pinmanee | 1:baf91b6482eb | 540 | { |
| Pinmanee | 1:baf91b6482eb | 541 | return STATUS_INVALID; |
| Pinmanee | 1:baf91b6482eb | 542 | } |
| Pinmanee | 1:baf91b6482eb | 543 | |
| Pinmanee | 1:baf91b6482eb | 544 | // Prepare MFRC522 |
| Pinmanee | 1:baf91b6482eb | 545 | // ValuesAfterColl=1 => Bits received after collision are cleared. |
| Pinmanee | 1:baf91b6482eb | 546 | PCD_ClrRegisterBits(CollReg, 0x80); |
| Pinmanee | 1:baf91b6482eb | 547 | |
| Pinmanee | 1:baf91b6482eb | 548 | // Repeat Cascade Level loop until we have a complete UID. |
| Pinmanee | 1:baf91b6482eb | 549 | uidComplete = false; |
| Pinmanee | 1:baf91b6482eb | 550 | while ( ! uidComplete) |
| Pinmanee | 1:baf91b6482eb | 551 | { |
| Pinmanee | 1:baf91b6482eb | 552 | // Set the Cascade Level in the SEL byte, find out if we need to use the Cascade Tag in byte 2. |
| Pinmanee | 1:baf91b6482eb | 553 | switch (cascadeLevel) |
| Pinmanee | 1:baf91b6482eb | 554 | { |
| Pinmanee | 1:baf91b6482eb | 555 | case 1: |
| Pinmanee | 1:baf91b6482eb | 556 | buffer[0] = PICC_CMD_SEL_CL1; |
| Pinmanee | 1:baf91b6482eb | 557 | uidIndex = 0; |
| Pinmanee | 1:baf91b6482eb | 558 | useCascadeTag = validBits && (uid->size > 4); // When we know that the UID has more than 4 bytes |
| Pinmanee | 1:baf91b6482eb | 559 | break; |
| Pinmanee | 1:baf91b6482eb | 560 | |
| Pinmanee | 1:baf91b6482eb | 561 | case 2: |
| Pinmanee | 1:baf91b6482eb | 562 | buffer[0] = PICC_CMD_SEL_CL2; |
| Pinmanee | 1:baf91b6482eb | 563 | uidIndex = 3; |
| Pinmanee | 1:baf91b6482eb | 564 | useCascadeTag = validBits && (uid->size > 7); // When we know that the UID has more than 7 bytes |
| Pinmanee | 1:baf91b6482eb | 565 | break; |
| Pinmanee | 1:baf91b6482eb | 566 | |
| Pinmanee | 1:baf91b6482eb | 567 | case 3: |
| Pinmanee | 1:baf91b6482eb | 568 | buffer[0] = PICC_CMD_SEL_CL3; |
| Pinmanee | 1:baf91b6482eb | 569 | uidIndex = 6; |
| Pinmanee | 1:baf91b6482eb | 570 | useCascadeTag = false; // Never used in CL3. |
| Pinmanee | 1:baf91b6482eb | 571 | break; |
| Pinmanee | 1:baf91b6482eb | 572 | |
| Pinmanee | 1:baf91b6482eb | 573 | default: |
| Pinmanee | 1:baf91b6482eb | 574 | return STATUS_INTERNAL_ERROR; |
| Pinmanee | 1:baf91b6482eb | 575 | //break; |
| Pinmanee | 1:baf91b6482eb | 576 | } |
| Pinmanee | 1:baf91b6482eb | 577 | |
| Pinmanee | 1:baf91b6482eb | 578 | // How many UID bits are known in this Cascade Level? |
| Pinmanee | 1:baf91b6482eb | 579 | if(validBits > (8 * uidIndex)) |
| Pinmanee | 1:baf91b6482eb | 580 | { |
| Pinmanee | 1:baf91b6482eb | 581 | currentLevelKnownBits = validBits - (8 * uidIndex); |
| Pinmanee | 1:baf91b6482eb | 582 | } |
| Pinmanee | 1:baf91b6482eb | 583 | else |
| Pinmanee | 1:baf91b6482eb | 584 | { |
| Pinmanee | 1:baf91b6482eb | 585 | currentLevelKnownBits = 0; |
| Pinmanee | 1:baf91b6482eb | 586 | } |
| Pinmanee | 1:baf91b6482eb | 587 | |
| Pinmanee | 1:baf91b6482eb | 588 | // Copy the known bits from uid->uidByte[] to buffer[] |
| Pinmanee | 1:baf91b6482eb | 589 | index = 2; // destination index in buffer[] |
| Pinmanee | 1:baf91b6482eb | 590 | if (useCascadeTag) |
| Pinmanee | 1:baf91b6482eb | 591 | { |
| Pinmanee | 1:baf91b6482eb | 592 | buffer[index++] = PICC_CMD_CT; |
| Pinmanee | 1:baf91b6482eb | 593 | } |
| Pinmanee | 1:baf91b6482eb | 594 | |
| Pinmanee | 1:baf91b6482eb | 595 | uint8_t bytesToCopy = currentLevelKnownBits / 8 + (currentLevelKnownBits % 8 ? 1 : 0); // The number of bytes needed to represent the known bits for this level. |
| Pinmanee | 1:baf91b6482eb | 596 | if (bytesToCopy) |
| Pinmanee | 1:baf91b6482eb | 597 | { |
| Pinmanee | 1:baf91b6482eb | 598 | // Max 4 bytes in each Cascade Level. Only 3 left if we use the Cascade Tag |
| Pinmanee | 1:baf91b6482eb | 599 | uint8_t maxBytes = useCascadeTag ? 3 : 4; |
| Pinmanee | 1:baf91b6482eb | 600 | if (bytesToCopy > maxBytes) |
| Pinmanee | 1:baf91b6482eb | 601 | { |
| Pinmanee | 1:baf91b6482eb | 602 | bytesToCopy = maxBytes; |
| Pinmanee | 1:baf91b6482eb | 603 | } |
| Pinmanee | 1:baf91b6482eb | 604 | |
| Pinmanee | 1:baf91b6482eb | 605 | for (count = 0; count < bytesToCopy; count++) |
| Pinmanee | 1:baf91b6482eb | 606 | { |
| Pinmanee | 1:baf91b6482eb | 607 | buffer[index++] = uid->uidByte[uidIndex + count]; |
| Pinmanee | 1:baf91b6482eb | 608 | } |
| Pinmanee | 1:baf91b6482eb | 609 | } |
| Pinmanee | 1:baf91b6482eb | 610 | |
| Pinmanee | 1:baf91b6482eb | 611 | // Now that the data has been copied we need to include the 8 bits in CT in currentLevelKnownBits |
| Pinmanee | 1:baf91b6482eb | 612 | if (useCascadeTag) |
| Pinmanee | 1:baf91b6482eb | 613 | { |
| Pinmanee | 1:baf91b6482eb | 614 | currentLevelKnownBits += 8; |
| Pinmanee | 1:baf91b6482eb | 615 | } |
| Pinmanee | 1:baf91b6482eb | 616 | |
| Pinmanee | 1:baf91b6482eb | 617 | // Repeat anti collision loop until we can transmit all UID bits + BCC and receive a SAK - max 32 iterations. |
| Pinmanee | 1:baf91b6482eb | 618 | selectDone = false; |
| Pinmanee | 1:baf91b6482eb | 619 | while ( ! selectDone) |
| Pinmanee | 1:baf91b6482eb | 620 | { |
| Pinmanee | 1:baf91b6482eb | 621 | // Find out how many bits and bytes to send and receive. |
| Pinmanee | 1:baf91b6482eb | 622 | if (currentLevelKnownBits >= 32) |
| Pinmanee | 1:baf91b6482eb | 623 | { // All UID bits in this Cascade Level are known. This is a SELECT. |
| Pinmanee | 1:baf91b6482eb | 624 | //Serial.print("SELECT: currentLevelKnownBits="); Serial.println(currentLevelKnownBits, DEC); |
| Pinmanee | 1:baf91b6482eb | 625 | buffer[1] = 0x70; // NVB - Number of Valid Bits: Seven whole bytes |
| Pinmanee | 1:baf91b6482eb | 626 | |
| Pinmanee | 1:baf91b6482eb | 627 | // Calulate BCC - Block Check Character |
| Pinmanee | 1:baf91b6482eb | 628 | buffer[6] = buffer[2] ^ buffer[3] ^ buffer[4] ^ buffer[5]; |
| Pinmanee | 1:baf91b6482eb | 629 | |
| Pinmanee | 1:baf91b6482eb | 630 | // Calculate CRC_A |
| Pinmanee | 1:baf91b6482eb | 631 | result = PCD_CalculateCRC(buffer, 7, &buffer[7]); |
| Pinmanee | 1:baf91b6482eb | 632 | if (result != STATUS_OK) |
| Pinmanee | 1:baf91b6482eb | 633 | { |
| Pinmanee | 1:baf91b6482eb | 634 | return result; |
| Pinmanee | 1:baf91b6482eb | 635 | } |
| Pinmanee | 1:baf91b6482eb | 636 | |
| Pinmanee | 1:baf91b6482eb | 637 | txLastBits = 0; // 0 => All 8 bits are valid. |
| Pinmanee | 1:baf91b6482eb | 638 | bufferUsed = 9; |
| Pinmanee | 1:baf91b6482eb | 639 | |
| Pinmanee | 1:baf91b6482eb | 640 | // Store response in the last 3 bytes of buffer (BCC and CRC_A - not needed after tx) |
| Pinmanee | 1:baf91b6482eb | 641 | responseBuffer = &buffer[6]; |
| Pinmanee | 1:baf91b6482eb | 642 | responseLength = 3; |
| Pinmanee | 1:baf91b6482eb | 643 | } |
| Pinmanee | 1:baf91b6482eb | 644 | else |
| Pinmanee | 1:baf91b6482eb | 645 | { // This is an ANTICOLLISION. |
| Pinmanee | 1:baf91b6482eb | 646 | //Serial.print("ANTICOLLISION: currentLevelKnownBits="); Serial.println(currentLevelKnownBits, DEC); |
| Pinmanee | 1:baf91b6482eb | 647 | txLastBits = currentLevelKnownBits % 8; |
| Pinmanee | 1:baf91b6482eb | 648 | count = currentLevelKnownBits / 8; // Number of whole bytes in the UID part. |
| Pinmanee | 1:baf91b6482eb | 649 | index = 2 + count; // Number of whole bytes: SEL + NVB + UIDs |
| Pinmanee | 1:baf91b6482eb | 650 | buffer[1] = (index << 4) + txLastBits; // NVB - Number of Valid Bits |
| Pinmanee | 1:baf91b6482eb | 651 | bufferUsed = index + (txLastBits ? 1 : 0); |
| Pinmanee | 1:baf91b6482eb | 652 | |
| Pinmanee | 1:baf91b6482eb | 653 | // Store response in the unused part of buffer |
| Pinmanee | 1:baf91b6482eb | 654 | responseBuffer = &buffer[index]; |
| Pinmanee | 1:baf91b6482eb | 655 | responseLength = sizeof(buffer) - index; |
| Pinmanee | 1:baf91b6482eb | 656 | } |
| Pinmanee | 1:baf91b6482eb | 657 | |
| Pinmanee | 1:baf91b6482eb | 658 | // Set bit adjustments |
| Pinmanee | 1:baf91b6482eb | 659 | rxAlign = txLastBits; // Having a seperate variable is overkill. But it makes the next line easier to read. |
| Pinmanee | 1:baf91b6482eb | 660 | PCD_WriteRegister(BitFramingReg, (rxAlign << 4) + txLastBits); // RxAlign = BitFramingReg[6..4]. TxLastBits = BitFramingReg[2..0] |
| Pinmanee | 1:baf91b6482eb | 661 | |
| Pinmanee | 1:baf91b6482eb | 662 | // Transmit the buffer and receive the response. |
| Pinmanee | 1:baf91b6482eb | 663 | result = PCD_TransceiveData(buffer, bufferUsed, responseBuffer, &responseLength, &txLastBits, rxAlign); |
| Pinmanee | 1:baf91b6482eb | 664 | if (result == STATUS_COLLISION) |
| Pinmanee | 1:baf91b6482eb | 665 | { // More than one PICC in the field => collision. |
| Pinmanee | 1:baf91b6482eb | 666 | result = PCD_ReadRegister(CollReg); // CollReg[7..0] bits are: ValuesAfterColl reserved CollPosNotValid CollPos[4:0] |
| Pinmanee | 1:baf91b6482eb | 667 | if (result & 0x20) |
| Pinmanee | 1:baf91b6482eb | 668 | { // CollPosNotValid |
| Pinmanee | 1:baf91b6482eb | 669 | return STATUS_COLLISION; // Without a valid collision position we cannot continue |
| Pinmanee | 1:baf91b6482eb | 670 | } |
| Pinmanee | 1:baf91b6482eb | 671 | |
| Pinmanee | 1:baf91b6482eb | 672 | uint8_t collisionPos = result & 0x1F; // Values 0-31, 0 means bit 32. |
| Pinmanee | 1:baf91b6482eb | 673 | if (collisionPos == 0) |
| Pinmanee | 1:baf91b6482eb | 674 | { |
| Pinmanee | 1:baf91b6482eb | 675 | collisionPos = 32; |
| Pinmanee | 1:baf91b6482eb | 676 | } |
| Pinmanee | 1:baf91b6482eb | 677 | |
| Pinmanee | 1:baf91b6482eb | 678 | if (collisionPos <= currentLevelKnownBits) |
| Pinmanee | 1:baf91b6482eb | 679 | { // No progress - should not happen |
| Pinmanee | 1:baf91b6482eb | 680 | return STATUS_INTERNAL_ERROR; |
| Pinmanee | 1:baf91b6482eb | 681 | } |
| Pinmanee | 1:baf91b6482eb | 682 | |
| Pinmanee | 1:baf91b6482eb | 683 | // Choose the PICC with the bit set. |
| Pinmanee | 1:baf91b6482eb | 684 | currentLevelKnownBits = collisionPos; |
| Pinmanee | 1:baf91b6482eb | 685 | count = (currentLevelKnownBits - 1) % 8; // The bit to modify |
| Pinmanee | 1:baf91b6482eb | 686 | index = 1 + (currentLevelKnownBits / 8) + (count ? 1 : 0); // First byte is index 0. |
| Pinmanee | 1:baf91b6482eb | 687 | buffer[index] |= (1 << count); |
| Pinmanee | 1:baf91b6482eb | 688 | } |
| Pinmanee | 1:baf91b6482eb | 689 | else if (result != STATUS_OK) |
| Pinmanee | 1:baf91b6482eb | 690 | { |
| Pinmanee | 1:baf91b6482eb | 691 | return result; |
| Pinmanee | 1:baf91b6482eb | 692 | } |
| Pinmanee | 1:baf91b6482eb | 693 | else |
| Pinmanee | 1:baf91b6482eb | 694 | { // STATUS_OK |
| Pinmanee | 1:baf91b6482eb | 695 | if (currentLevelKnownBits >= 32) |
| Pinmanee | 1:baf91b6482eb | 696 | { // This was a SELECT. |
| Pinmanee | 1:baf91b6482eb | 697 | selectDone = true; // No more anticollision |
| Pinmanee | 1:baf91b6482eb | 698 | // We continue below outside the while. |
| Pinmanee | 1:baf91b6482eb | 699 | } |
| Pinmanee | 1:baf91b6482eb | 700 | else |
| Pinmanee | 1:baf91b6482eb | 701 | { // This was an ANTICOLLISION. |
| Pinmanee | 1:baf91b6482eb | 702 | // We now have all 32 bits of the UID in this Cascade Level |
| Pinmanee | 1:baf91b6482eb | 703 | currentLevelKnownBits = 32; |
| Pinmanee | 1:baf91b6482eb | 704 | // Run loop again to do the SELECT. |
| Pinmanee | 1:baf91b6482eb | 705 | } |
| Pinmanee | 1:baf91b6482eb | 706 | } |
| Pinmanee | 1:baf91b6482eb | 707 | } // End of while ( ! selectDone) |
| Pinmanee | 1:baf91b6482eb | 708 | |
| Pinmanee | 1:baf91b6482eb | 709 | // We do not check the CBB - it was constructed by us above. |
| Pinmanee | 1:baf91b6482eb | 710 | |
| Pinmanee | 1:baf91b6482eb | 711 | // Copy the found UID bytes from buffer[] to uid->uidByte[] |
| Pinmanee | 1:baf91b6482eb | 712 | index = (buffer[2] == PICC_CMD_CT) ? 3 : 2; // source index in buffer[] |
| Pinmanee | 1:baf91b6482eb | 713 | bytesToCopy = (buffer[2] == PICC_CMD_CT) ? 3 : 4; |
| Pinmanee | 1:baf91b6482eb | 714 | for (count = 0; count < bytesToCopy; count++) |
| Pinmanee | 1:baf91b6482eb | 715 | { |
| Pinmanee | 1:baf91b6482eb | 716 | uid->uidByte[uidIndex + count] = buffer[index++]; |
| Pinmanee | 1:baf91b6482eb | 717 | } |
| Pinmanee | 1:baf91b6482eb | 718 | |
| Pinmanee | 1:baf91b6482eb | 719 | // Check response SAK (Select Acknowledge) |
| Pinmanee | 1:baf91b6482eb | 720 | if (responseLength != 3 || txLastBits != 0) |
| Pinmanee | 1:baf91b6482eb | 721 | { // SAK must be exactly 24 bits (1 byte + CRC_A). |
| Pinmanee | 1:baf91b6482eb | 722 | return STATUS_ERROR; |
| Pinmanee | 1:baf91b6482eb | 723 | } |
| Pinmanee | 1:baf91b6482eb | 724 | |
| Pinmanee | 1:baf91b6482eb | 725 | // Verify CRC_A - do our own calculation and store the control in buffer[2..3] - those bytes are not needed anymore. |
| Pinmanee | 1:baf91b6482eb | 726 | result = PCD_CalculateCRC(responseBuffer, 1, &buffer[2]); |
| Pinmanee | 1:baf91b6482eb | 727 | if (result != STATUS_OK) |
| Pinmanee | 1:baf91b6482eb | 728 | { |
| Pinmanee | 1:baf91b6482eb | 729 | return result; |
| Pinmanee | 1:baf91b6482eb | 730 | } |
| Pinmanee | 1:baf91b6482eb | 731 | |
| Pinmanee | 1:baf91b6482eb | 732 | if ((buffer[2] != responseBuffer[1]) || (buffer[3] != responseBuffer[2])) |
| Pinmanee | 1:baf91b6482eb | 733 | { |
| Pinmanee | 1:baf91b6482eb | 734 | return STATUS_CRC_WRONG; |
| Pinmanee | 1:baf91b6482eb | 735 | } |
| Pinmanee | 1:baf91b6482eb | 736 | |
| Pinmanee | 1:baf91b6482eb | 737 | if (responseBuffer[0] & 0x04) |
| Pinmanee | 1:baf91b6482eb | 738 | { // Cascade bit set - UID not complete yes |
| Pinmanee | 1:baf91b6482eb | 739 | cascadeLevel++; |
| Pinmanee | 1:baf91b6482eb | 740 | } |
| Pinmanee | 1:baf91b6482eb | 741 | else |
| Pinmanee | 1:baf91b6482eb | 742 | { |
| Pinmanee | 1:baf91b6482eb | 743 | uidComplete = true; |
| Pinmanee | 1:baf91b6482eb | 744 | uid->sak = responseBuffer[0]; |
| Pinmanee | 1:baf91b6482eb | 745 | } |
| Pinmanee | 1:baf91b6482eb | 746 | } // End of while ( ! uidComplete) |
| Pinmanee | 1:baf91b6482eb | 747 | |
| Pinmanee | 1:baf91b6482eb | 748 | // Set correct uid->size |
| Pinmanee | 1:baf91b6482eb | 749 | uid->size = 3 * cascadeLevel + 1; |
| Pinmanee | 1:baf91b6482eb | 750 | |
| Pinmanee | 1:baf91b6482eb | 751 | return STATUS_OK; |
| Pinmanee | 1:baf91b6482eb | 752 | } // End PICC_Select() |
| Pinmanee | 1:baf91b6482eb | 753 | |
| Pinmanee | 1:baf91b6482eb | 754 | /* |
| Pinmanee | 1:baf91b6482eb | 755 | * Instructs a PICC in state ACTIVE(*) to go to state HALT. |
| Pinmanee | 1:baf91b6482eb | 756 | */ |
| Pinmanee | 1:baf91b6482eb | 757 | uint8_t MFRC522::PICC_HaltA() |
| Pinmanee | 1:baf91b6482eb | 758 | { |
| Pinmanee | 1:baf91b6482eb | 759 | uint8_t result; |
| Pinmanee | 1:baf91b6482eb | 760 | uint8_t buffer[4]; |
| Pinmanee | 1:baf91b6482eb | 761 | |
| Pinmanee | 1:baf91b6482eb | 762 | // Build command buffer |
| Pinmanee | 1:baf91b6482eb | 763 | buffer[0] = PICC_CMD_HLTA; |
| Pinmanee | 1:baf91b6482eb | 764 | buffer[1] = 0; |
| Pinmanee | 1:baf91b6482eb | 765 | |
| Pinmanee | 1:baf91b6482eb | 766 | // Calculate CRC_A |
| Pinmanee | 1:baf91b6482eb | 767 | result = PCD_CalculateCRC(buffer, 2, &buffer[2]); |
| Pinmanee | 1:baf91b6482eb | 768 | if (result == STATUS_OK) |
| Pinmanee | 1:baf91b6482eb | 769 | { |
| Pinmanee | 1:baf91b6482eb | 770 | // Send the command. |
| Pinmanee | 1:baf91b6482eb | 771 | // The standard says: |
| Pinmanee | 1:baf91b6482eb | 772 | // If the PICC responds with any modulation during a period of 1 ms after the end of the frame containing the |
| Pinmanee | 1:baf91b6482eb | 773 | // HLTA command, this response shall be interpreted as 'not acknowledge'. |
| Pinmanee | 1:baf91b6482eb | 774 | // We interpret that this way: Only STATUS_TIMEOUT is an success. |
| Pinmanee | 1:baf91b6482eb | 775 | result = PCD_TransceiveData(buffer, sizeof(buffer), NULL, 0); |
| Pinmanee | 1:baf91b6482eb | 776 | if (result == STATUS_TIMEOUT) |
| Pinmanee | 1:baf91b6482eb | 777 | { |
| Pinmanee | 1:baf91b6482eb | 778 | result = STATUS_OK; |
| Pinmanee | 1:baf91b6482eb | 779 | } |
| Pinmanee | 1:baf91b6482eb | 780 | else if (result == STATUS_OK) |
| Pinmanee | 1:baf91b6482eb | 781 | { // That is ironically NOT ok in this case ;-) |
| Pinmanee | 1:baf91b6482eb | 782 | result = STATUS_ERROR; |
| Pinmanee | 1:baf91b6482eb | 783 | } |
| Pinmanee | 1:baf91b6482eb | 784 | } |
| Pinmanee | 1:baf91b6482eb | 785 | |
| Pinmanee | 1:baf91b6482eb | 786 | return result; |
| Pinmanee | 1:baf91b6482eb | 787 | } // End PICC_HaltA() |
| Pinmanee | 1:baf91b6482eb | 788 | |
| Pinmanee | 1:baf91b6482eb | 789 | |
| Pinmanee | 1:baf91b6482eb | 790 | ///////////////////////////////////////////////////////////////////////////////////// |
| Pinmanee | 1:baf91b6482eb | 791 | // Functions for communicating with MIFARE PICCs |
| Pinmanee | 1:baf91b6482eb | 792 | ///////////////////////////////////////////////////////////////////////////////////// |
| Pinmanee | 1:baf91b6482eb | 793 | |
| Pinmanee | 1:baf91b6482eb | 794 | /* |
| Pinmanee | 1:baf91b6482eb | 795 | * Executes the MFRC522 MFAuthent command. |
| Pinmanee | 1:baf91b6482eb | 796 | */ |
| Pinmanee | 1:baf91b6482eb | 797 | uint8_t MFRC522::PCD_Authenticate(uint8_t command, uint8_t blockAddr, MIFARE_Key *key, Uid *uid) |
| Pinmanee | 1:baf91b6482eb | 798 | { |
| Pinmanee | 1:baf91b6482eb | 799 | uint8_t i, waitIRq = 0x10; // IdleIRq |
| Pinmanee | 1:baf91b6482eb | 800 | |
| Pinmanee | 1:baf91b6482eb | 801 | // Build command buffer |
| Pinmanee | 1:baf91b6482eb | 802 | uint8_t sendData[12]; |
| Pinmanee | 1:baf91b6482eb | 803 | sendData[0] = command; |
| Pinmanee | 1:baf91b6482eb | 804 | sendData[1] = blockAddr; |
| Pinmanee | 1:baf91b6482eb | 805 | |
| Pinmanee | 1:baf91b6482eb | 806 | for (i = 0; i < MF_KEY_SIZE; i++) |
| Pinmanee | 1:baf91b6482eb | 807 | { // 6 key bytes |
| Pinmanee | 1:baf91b6482eb | 808 | sendData[2+i] = key->keyByte[i]; |
| Pinmanee | 1:baf91b6482eb | 809 | } |
| Pinmanee | 1:baf91b6482eb | 810 | |
| Pinmanee | 1:baf91b6482eb | 811 | for (i = 0; i < 4; i++) |
| Pinmanee | 1:baf91b6482eb | 812 | { // The first 4 bytes of the UID |
| Pinmanee | 1:baf91b6482eb | 813 | sendData[8+i] = uid->uidByte[i]; |
| Pinmanee | 1:baf91b6482eb | 814 | } |
| Pinmanee | 1:baf91b6482eb | 815 | |
| Pinmanee | 1:baf91b6482eb | 816 | // Start the authentication. |
| Pinmanee | 1:baf91b6482eb | 817 | return PCD_CommunicateWithPICC(PCD_MFAuthent, waitIRq, &sendData[0], sizeof(sendData)); |
| Pinmanee | 1:baf91b6482eb | 818 | } // End PCD_Authenticate() |
| Pinmanee | 1:baf91b6482eb | 819 | |
| Pinmanee | 1:baf91b6482eb | 820 | /* |
| Pinmanee | 1:baf91b6482eb | 821 | * Used to exit the PCD from its authenticated state. |
| Pinmanee | 1:baf91b6482eb | 822 | * Remember to call this function after communicating with an authenticated PICC - otherwise no new communications can start. |
| Pinmanee | 1:baf91b6482eb | 823 | */ |
| Pinmanee | 1:baf91b6482eb | 824 | void MFRC522::PCD_StopCrypto1() |
| Pinmanee | 1:baf91b6482eb | 825 | { |
| Pinmanee | 1:baf91b6482eb | 826 | // Clear MFCrypto1On bit |
| Pinmanee | 1:baf91b6482eb | 827 | PCD_ClrRegisterBits(Status2Reg, 0x08); // Status2Reg[7..0] bits are: TempSensClear I2CForceHS reserved reserved MFCrypto1On ModemState[2:0] |
| Pinmanee | 1:baf91b6482eb | 828 | } // End PCD_StopCrypto1() |
| Pinmanee | 1:baf91b6482eb | 829 | |
| Pinmanee | 1:baf91b6482eb | 830 | /* |
| Pinmanee | 1:baf91b6482eb | 831 | * Reads 16 bytes (+ 2 bytes CRC_A) from the active PICC. |
| Pinmanee | 1:baf91b6482eb | 832 | */ |
| Pinmanee | 1:baf91b6482eb | 833 | uint8_t MFRC522::MIFARE_Read(uint8_t blockAddr, uint8_t *buffer, uint8_t *bufferSize) |
| Pinmanee | 1:baf91b6482eb | 834 | { |
| Pinmanee | 1:baf91b6482eb | 835 | uint8_t result = STATUS_NO_ROOM; |
| Pinmanee | 1:baf91b6482eb | 836 | |
| Pinmanee | 1:baf91b6482eb | 837 | // Sanity check |
| Pinmanee | 1:baf91b6482eb | 838 | if ((buffer == NULL) || (*bufferSize < 18)) |
| Pinmanee | 1:baf91b6482eb | 839 | { |
| Pinmanee | 1:baf91b6482eb | 840 | return result; |
| Pinmanee | 1:baf91b6482eb | 841 | } |
| Pinmanee | 1:baf91b6482eb | 842 | |
| Pinmanee | 1:baf91b6482eb | 843 | // Build command buffer |
| Pinmanee | 1:baf91b6482eb | 844 | buffer[0] = PICC_CMD_MF_READ; |
| Pinmanee | 1:baf91b6482eb | 845 | buffer[1] = blockAddr; |
| Pinmanee | 1:baf91b6482eb | 846 | |
| Pinmanee | 1:baf91b6482eb | 847 | // Calculate CRC_A |
| Pinmanee | 1:baf91b6482eb | 848 | result = PCD_CalculateCRC(buffer, 2, &buffer[2]); |
| Pinmanee | 1:baf91b6482eb | 849 | if (result != STATUS_OK) |
| Pinmanee | 1:baf91b6482eb | 850 | { |
| Pinmanee | 1:baf91b6482eb | 851 | return result; |
| Pinmanee | 1:baf91b6482eb | 852 | } |
| Pinmanee | 1:baf91b6482eb | 853 | |
| Pinmanee | 1:baf91b6482eb | 854 | // Transmit the buffer and receive the response, validate CRC_A. |
| Pinmanee | 1:baf91b6482eb | 855 | return PCD_TransceiveData(buffer, 4, buffer, bufferSize, NULL, 0, true); |
| Pinmanee | 1:baf91b6482eb | 856 | } // End MIFARE_Read() |
| Pinmanee | 1:baf91b6482eb | 857 | |
| Pinmanee | 1:baf91b6482eb | 858 | /* |
| Pinmanee | 1:baf91b6482eb | 859 | * Writes 16 bytes to the active PICC. |
| Pinmanee | 1:baf91b6482eb | 860 | */ |
| Pinmanee | 1:baf91b6482eb | 861 | uint8_t MFRC522::MIFARE_Write(uint8_t blockAddr, uint8_t *buffer, uint8_t bufferSize) |
| Pinmanee | 1:baf91b6482eb | 862 | { |
| Pinmanee | 1:baf91b6482eb | 863 | uint8_t result; |
| Pinmanee | 1:baf91b6482eb | 864 | |
| Pinmanee | 1:baf91b6482eb | 865 | // Sanity check |
| Pinmanee | 1:baf91b6482eb | 866 | if (buffer == NULL || bufferSize < 16) |
| Pinmanee | 1:baf91b6482eb | 867 | { |
| Pinmanee | 1:baf91b6482eb | 868 | return STATUS_INVALID; |
| Pinmanee | 1:baf91b6482eb | 869 | } |
| Pinmanee | 1:baf91b6482eb | 870 | |
| Pinmanee | 1:baf91b6482eb | 871 | // Mifare Classic protocol requires two communications to perform a write. |
| Pinmanee | 1:baf91b6482eb | 872 | // Step 1: Tell the PICC we want to write to block blockAddr. |
| Pinmanee | 1:baf91b6482eb | 873 | uint8_t cmdBuffer[2]; |
| Pinmanee | 1:baf91b6482eb | 874 | cmdBuffer[0] = PICC_CMD_MF_WRITE; |
| Pinmanee | 1:baf91b6482eb | 875 | cmdBuffer[1] = blockAddr; |
| Pinmanee | 1:baf91b6482eb | 876 | // Adds CRC_A and checks that the response is MF_ACK. |
| Pinmanee | 1:baf91b6482eb | 877 | result = PCD_MIFARE_Transceive(cmdBuffer, 2); |
| Pinmanee | 1:baf91b6482eb | 878 | if (result != STATUS_OK) |
| Pinmanee | 1:baf91b6482eb | 879 | { |
| Pinmanee | 1:baf91b6482eb | 880 | return result; |
| Pinmanee | 1:baf91b6482eb | 881 | } |
| Pinmanee | 1:baf91b6482eb | 882 | |
| Pinmanee | 1:baf91b6482eb | 883 | // Step 2: Transfer the data |
| Pinmanee | 1:baf91b6482eb | 884 | // Adds CRC_A and checks that the response is MF_ACK. |
| Pinmanee | 1:baf91b6482eb | 885 | result = PCD_MIFARE_Transceive(buffer, bufferSize); |
| Pinmanee | 1:baf91b6482eb | 886 | if (result != STATUS_OK) |
| Pinmanee | 1:baf91b6482eb | 887 | { |
| Pinmanee | 1:baf91b6482eb | 888 | return result; |
| Pinmanee | 1:baf91b6482eb | 889 | } |
| Pinmanee | 1:baf91b6482eb | 890 | |
| Pinmanee | 1:baf91b6482eb | 891 | return STATUS_OK; |
| Pinmanee | 1:baf91b6482eb | 892 | } // End MIFARE_Write() |
| Pinmanee | 1:baf91b6482eb | 893 | |
| Pinmanee | 1:baf91b6482eb | 894 | /* |
| Pinmanee | 1:baf91b6482eb | 895 | * Writes a 4 byte page to the active MIFARE Ultralight PICC. |
| Pinmanee | 1:baf91b6482eb | 896 | */ |
| Pinmanee | 1:baf91b6482eb | 897 | uint8_t MFRC522::MIFARE_UltralightWrite(uint8_t page, uint8_t *buffer, uint8_t bufferSize) |
| Pinmanee | 1:baf91b6482eb | 898 | { |
| Pinmanee | 1:baf91b6482eb | 899 | uint8_t result; |
| Pinmanee | 1:baf91b6482eb | 900 | |
| Pinmanee | 1:baf91b6482eb | 901 | // Sanity check |
| Pinmanee | 1:baf91b6482eb | 902 | if (buffer == NULL || bufferSize < 4) |
| Pinmanee | 1:baf91b6482eb | 903 | { |
| Pinmanee | 1:baf91b6482eb | 904 | return STATUS_INVALID; |
| Pinmanee | 1:baf91b6482eb | 905 | } |
| Pinmanee | 1:baf91b6482eb | 906 | |
| Pinmanee | 1:baf91b6482eb | 907 | // Build commmand buffer |
| Pinmanee | 1:baf91b6482eb | 908 | uint8_t cmdBuffer[6]; |
| Pinmanee | 1:baf91b6482eb | 909 | cmdBuffer[0] = PICC_CMD_UL_WRITE; |
| Pinmanee | 1:baf91b6482eb | 910 | cmdBuffer[1] = page; |
| Pinmanee | 1:baf91b6482eb | 911 | memcpy(&cmdBuffer[2], buffer, 4); |
| Pinmanee | 1:baf91b6482eb | 912 | |
| Pinmanee | 1:baf91b6482eb | 913 | // Perform the write |
| Pinmanee | 1:baf91b6482eb | 914 | result = PCD_MIFARE_Transceive(cmdBuffer, 6); // Adds CRC_A and checks that the response is MF_ACK. |
| Pinmanee | 1:baf91b6482eb | 915 | if (result != STATUS_OK) |
| Pinmanee | 1:baf91b6482eb | 916 | { |
| Pinmanee | 1:baf91b6482eb | 917 | return result; |
| Pinmanee | 1:baf91b6482eb | 918 | } |
| Pinmanee | 1:baf91b6482eb | 919 | |
| Pinmanee | 1:baf91b6482eb | 920 | return STATUS_OK; |
| Pinmanee | 1:baf91b6482eb | 921 | } // End MIFARE_Ultralight_Write() |
| Pinmanee | 1:baf91b6482eb | 922 | |
| Pinmanee | 1:baf91b6482eb | 923 | /* |
| Pinmanee | 1:baf91b6482eb | 924 | * MIFARE Decrement subtracts the delta from the value of the addressed block, and stores the result in a volatile memory. |
| Pinmanee | 1:baf91b6482eb | 925 | */ |
| Pinmanee | 1:baf91b6482eb | 926 | uint8_t MFRC522::MIFARE_Decrement(uint8_t blockAddr, uint32_t delta) |
| Pinmanee | 1:baf91b6482eb | 927 | { |
| Pinmanee | 1:baf91b6482eb | 928 | return MIFARE_TwoStepHelper(PICC_CMD_MF_DECREMENT, blockAddr, delta); |
| Pinmanee | 1:baf91b6482eb | 929 | } // End MIFARE_Decrement() |
| Pinmanee | 1:baf91b6482eb | 930 | |
| Pinmanee | 1:baf91b6482eb | 931 | /* |
| Pinmanee | 1:baf91b6482eb | 932 | * MIFARE Increment adds the delta to the value of the addressed block, and stores the result in a volatile memory. |
| Pinmanee | 1:baf91b6482eb | 933 | */ |
| Pinmanee | 1:baf91b6482eb | 934 | uint8_t MFRC522::MIFARE_Increment(uint8_t blockAddr, uint32_t delta) |
| Pinmanee | 1:baf91b6482eb | 935 | { |
| Pinmanee | 1:baf91b6482eb | 936 | return MIFARE_TwoStepHelper(PICC_CMD_MF_INCREMENT, blockAddr, delta); |
| Pinmanee | 1:baf91b6482eb | 937 | } // End MIFARE_Increment() |
| Pinmanee | 1:baf91b6482eb | 938 | |
| Pinmanee | 1:baf91b6482eb | 939 | /** |
| Pinmanee | 1:baf91b6482eb | 940 | * MIFARE Restore copies the value of the addressed block into a volatile memory. |
| Pinmanee | 1:baf91b6482eb | 941 | */ |
| Pinmanee | 1:baf91b6482eb | 942 | uint8_t MFRC522::MIFARE_Restore(uint8_t blockAddr) |
| Pinmanee | 1:baf91b6482eb | 943 | { |
| Pinmanee | 1:baf91b6482eb | 944 | // The datasheet describes Restore as a two step operation, but does not explain what data to transfer in step 2. |
| Pinmanee | 1:baf91b6482eb | 945 | // Doing only a single step does not work, so I chose to transfer 0L in step two. |
| Pinmanee | 1:baf91b6482eb | 946 | return MIFARE_TwoStepHelper(PICC_CMD_MF_RESTORE, blockAddr, 0L); |
| Pinmanee | 1:baf91b6482eb | 947 | } // End MIFARE_Restore() |
| Pinmanee | 1:baf91b6482eb | 948 | |
| Pinmanee | 1:baf91b6482eb | 949 | /* |
| Pinmanee | 1:baf91b6482eb | 950 | * Helper function for the two-step MIFARE Classic protocol operations Decrement, Increment and Restore. |
| Pinmanee | 1:baf91b6482eb | 951 | */ |
| Pinmanee | 1:baf91b6482eb | 952 | uint8_t MFRC522::MIFARE_TwoStepHelper(uint8_t command, uint8_t blockAddr, uint32_t data) |
| Pinmanee | 1:baf91b6482eb | 953 | { |
| Pinmanee | 1:baf91b6482eb | 954 | uint8_t result; |
| Pinmanee | 1:baf91b6482eb | 955 | uint8_t cmdBuffer[2]; // We only need room for 2 bytes. |
| Pinmanee | 1:baf91b6482eb | 956 | |
| Pinmanee | 1:baf91b6482eb | 957 | // Step 1: Tell the PICC the command and block address |
| Pinmanee | 1:baf91b6482eb | 958 | cmdBuffer[0] = command; |
| Pinmanee | 1:baf91b6482eb | 959 | cmdBuffer[1] = blockAddr; |
| Pinmanee | 1:baf91b6482eb | 960 | |
| Pinmanee | 1:baf91b6482eb | 961 | // Adds CRC_A and checks that the response is MF_ACK. |
| Pinmanee | 1:baf91b6482eb | 962 | result = PCD_MIFARE_Transceive(cmdBuffer, 2); |
| Pinmanee | 1:baf91b6482eb | 963 | if (result != STATUS_OK) |
| Pinmanee | 1:baf91b6482eb | 964 | { |
| Pinmanee | 1:baf91b6482eb | 965 | return result; |
| Pinmanee | 1:baf91b6482eb | 966 | } |
| Pinmanee | 1:baf91b6482eb | 967 | |
| Pinmanee | 1:baf91b6482eb | 968 | // Step 2: Transfer the data |
| Pinmanee | 1:baf91b6482eb | 969 | // Adds CRC_A and accept timeout as success. |
| Pinmanee | 1:baf91b6482eb | 970 | result = PCD_MIFARE_Transceive((uint8_t *) &data, 4, true); |
| Pinmanee | 1:baf91b6482eb | 971 | if (result != STATUS_OK) |
| Pinmanee | 1:baf91b6482eb | 972 | { |
| Pinmanee | 1:baf91b6482eb | 973 | return result; |
| Pinmanee | 1:baf91b6482eb | 974 | } |
| Pinmanee | 1:baf91b6482eb | 975 | |
| Pinmanee | 1:baf91b6482eb | 976 | return STATUS_OK; |
| Pinmanee | 1:baf91b6482eb | 977 | } // End MIFARE_TwoStepHelper() |
| Pinmanee | 1:baf91b6482eb | 978 | |
| Pinmanee | 1:baf91b6482eb | 979 | /* |
| Pinmanee | 1:baf91b6482eb | 980 | * MIFARE Transfer writes the value stored in the volatile memory into one MIFARE Classic block. |
| Pinmanee | 1:baf91b6482eb | 981 | */ |
| Pinmanee | 1:baf91b6482eb | 982 | uint8_t MFRC522::MIFARE_Transfer(uint8_t blockAddr) |
| Pinmanee | 1:baf91b6482eb | 983 | { |
| Pinmanee | 1:baf91b6482eb | 984 | uint8_t cmdBuffer[2]; // We only need room for 2 bytes. |
| Pinmanee | 1:baf91b6482eb | 985 | |
| Pinmanee | 1:baf91b6482eb | 986 | // Tell the PICC we want to transfer the result into block blockAddr. |
| Pinmanee | 1:baf91b6482eb | 987 | cmdBuffer[0] = PICC_CMD_MF_TRANSFER; |
| Pinmanee | 1:baf91b6482eb | 988 | cmdBuffer[1] = blockAddr; |
| Pinmanee | 1:baf91b6482eb | 989 | |
| Pinmanee | 1:baf91b6482eb | 990 | // Adds CRC_A and checks that the response is MF_ACK. |
| Pinmanee | 1:baf91b6482eb | 991 | return PCD_MIFARE_Transceive(cmdBuffer, 2); |
| Pinmanee | 1:baf91b6482eb | 992 | } // End MIFARE_Transfer() |
| Pinmanee | 1:baf91b6482eb | 993 | |
| Pinmanee | 1:baf91b6482eb | 994 | |
| Pinmanee | 1:baf91b6482eb | 995 | ///////////////////////////////////////////////////////////////////////////////////// |
| Pinmanee | 1:baf91b6482eb | 996 | // Support functions |
| Pinmanee | 1:baf91b6482eb | 997 | ///////////////////////////////////////////////////////////////////////////////////// |
| Pinmanee | 1:baf91b6482eb | 998 | |
| Pinmanee | 1:baf91b6482eb | 999 | /* |
| Pinmanee | 1:baf91b6482eb | 1000 | * Wrapper for MIFARE protocol communication. |
| Pinmanee | 1:baf91b6482eb | 1001 | * Adds CRC_A, executes the Transceive command and checks that the response is MF_ACK or a timeout. |
| Pinmanee | 1:baf91b6482eb | 1002 | */ |
| Pinmanee | 1:baf91b6482eb | 1003 | uint8_t MFRC522::PCD_MIFARE_Transceive(uint8_t *sendData, uint8_t sendLen, bool acceptTimeout) |
| Pinmanee | 1:baf91b6482eb | 1004 | { |
| Pinmanee | 1:baf91b6482eb | 1005 | uint8_t result; |
| Pinmanee | 1:baf91b6482eb | 1006 | uint8_t cmdBuffer[18]; // We need room for 16 bytes data and 2 bytes CRC_A. |
| Pinmanee | 1:baf91b6482eb | 1007 | |
| Pinmanee | 1:baf91b6482eb | 1008 | // Sanity check |
| Pinmanee | 1:baf91b6482eb | 1009 | if (sendData == NULL || sendLen > 16) |
| Pinmanee | 1:baf91b6482eb | 1010 | { |
| Pinmanee | 1:baf91b6482eb | 1011 | return STATUS_INVALID; |
| Pinmanee | 1:baf91b6482eb | 1012 | } |
| Pinmanee | 1:baf91b6482eb | 1013 | |
| Pinmanee | 1:baf91b6482eb | 1014 | // Copy sendData[] to cmdBuffer[] and add CRC_A |
| Pinmanee | 1:baf91b6482eb | 1015 | memcpy(cmdBuffer, sendData, sendLen); |
| Pinmanee | 1:baf91b6482eb | 1016 | result = PCD_CalculateCRC(cmdBuffer, sendLen, &cmdBuffer[sendLen]); |
| Pinmanee | 1:baf91b6482eb | 1017 | if (result != STATUS_OK) |
| Pinmanee | 1:baf91b6482eb | 1018 | { |
| Pinmanee | 1:baf91b6482eb | 1019 | return result; |
| Pinmanee | 1:baf91b6482eb | 1020 | } |
| Pinmanee | 1:baf91b6482eb | 1021 | |
| Pinmanee | 1:baf91b6482eb | 1022 | sendLen += 2; |
| Pinmanee | 1:baf91b6482eb | 1023 | |
| Pinmanee | 1:baf91b6482eb | 1024 | // Transceive the data, store the reply in cmdBuffer[] |
| Pinmanee | 1:baf91b6482eb | 1025 | uint8_t waitIRq = 0x30; // RxIRq and IdleIRq |
| Pinmanee | 1:baf91b6482eb | 1026 | uint8_t cmdBufferSize = sizeof(cmdBuffer); |
| Pinmanee | 1:baf91b6482eb | 1027 | uint8_t validBits = 0; |
| Pinmanee | 1:baf91b6482eb | 1028 | result = PCD_CommunicateWithPICC(PCD_Transceive, waitIRq, cmdBuffer, sendLen, cmdBuffer, &cmdBufferSize, &validBits); |
| Pinmanee | 1:baf91b6482eb | 1029 | if (acceptTimeout && result == STATUS_TIMEOUT) |
| Pinmanee | 1:baf91b6482eb | 1030 | { |
| Pinmanee | 1:baf91b6482eb | 1031 | return STATUS_OK; |
| Pinmanee | 1:baf91b6482eb | 1032 | } |
| Pinmanee | 1:baf91b6482eb | 1033 | |
| Pinmanee | 1:baf91b6482eb | 1034 | if (result != STATUS_OK) |
| Pinmanee | 1:baf91b6482eb | 1035 | { |
| Pinmanee | 1:baf91b6482eb | 1036 | return result; |
| Pinmanee | 1:baf91b6482eb | 1037 | } |
| Pinmanee | 1:baf91b6482eb | 1038 | |
| Pinmanee | 1:baf91b6482eb | 1039 | // The PICC must reply with a 4 bit ACK |
| Pinmanee | 1:baf91b6482eb | 1040 | if (cmdBufferSize != 1 || validBits != 4) |
| Pinmanee | 1:baf91b6482eb | 1041 | { |
| Pinmanee | 1:baf91b6482eb | 1042 | return STATUS_ERROR; |
| Pinmanee | 1:baf91b6482eb | 1043 | } |
| Pinmanee | 1:baf91b6482eb | 1044 | |
| Pinmanee | 1:baf91b6482eb | 1045 | if (cmdBuffer[0] != MF_ACK) |
| Pinmanee | 1:baf91b6482eb | 1046 | { |
| Pinmanee | 1:baf91b6482eb | 1047 | return STATUS_MIFARE_NACK; |
| Pinmanee | 1:baf91b6482eb | 1048 | } |
| Pinmanee | 1:baf91b6482eb | 1049 | |
| Pinmanee | 1:baf91b6482eb | 1050 | return STATUS_OK; |
| Pinmanee | 1:baf91b6482eb | 1051 | } // End PCD_MIFARE_Transceive() |
| Pinmanee | 1:baf91b6482eb | 1052 | |
| Pinmanee | 1:baf91b6482eb | 1053 | |
| Pinmanee | 1:baf91b6482eb | 1054 | /* |
| Pinmanee | 1:baf91b6482eb | 1055 | * Translates the SAK (Select Acknowledge) to a PICC type. |
| Pinmanee | 1:baf91b6482eb | 1056 | */ |
| Pinmanee | 1:baf91b6482eb | 1057 | uint8_t MFRC522::PICC_GetType(uint8_t sak) |
| Pinmanee | 1:baf91b6482eb | 1058 | { |
| Pinmanee | 1:baf91b6482eb | 1059 | uint8_t retType = PICC_TYPE_UNKNOWN; |
| Pinmanee | 1:baf91b6482eb | 1060 | |
| Pinmanee | 1:baf91b6482eb | 1061 | if (sak & 0x04) |
| Pinmanee | 1:baf91b6482eb | 1062 | { // UID not complete |
| Pinmanee | 1:baf91b6482eb | 1063 | retType = PICC_TYPE_NOT_COMPLETE; |
| Pinmanee | 1:baf91b6482eb | 1064 | } |
| Pinmanee | 1:baf91b6482eb | 1065 | else |
| Pinmanee | 1:baf91b6482eb | 1066 | { |
| Pinmanee | 1:baf91b6482eb | 1067 | switch (sak) |
| Pinmanee | 1:baf91b6482eb | 1068 | { |
| Pinmanee | 1:baf91b6482eb | 1069 | case 0x09: retType = PICC_TYPE_MIFARE_MINI; break; |
| Pinmanee | 1:baf91b6482eb | 1070 | case 0x08: retType = PICC_TYPE_MIFARE_1K; break; |
| Pinmanee | 1:baf91b6482eb | 1071 | case 0x18: retType = PICC_TYPE_MIFARE_4K; break; |
| Pinmanee | 1:baf91b6482eb | 1072 | case 0x00: retType = PICC_TYPE_MIFARE_UL; break; |
| Pinmanee | 1:baf91b6482eb | 1073 | case 0x10: |
| Pinmanee | 1:baf91b6482eb | 1074 | case 0x11: retType = PICC_TYPE_MIFARE_PLUS; break; |
| Pinmanee | 1:baf91b6482eb | 1075 | case 0x01: retType = PICC_TYPE_TNP3XXX; break; |
| Pinmanee | 1:baf91b6482eb | 1076 | default: |
| Pinmanee | 1:baf91b6482eb | 1077 | if (sak & 0x20) |
| Pinmanee | 1:baf91b6482eb | 1078 | { |
| Pinmanee | 1:baf91b6482eb | 1079 | retType = PICC_TYPE_ISO_14443_4; |
| Pinmanee | 1:baf91b6482eb | 1080 | } |
| Pinmanee | 1:baf91b6482eb | 1081 | else if (sak & 0x40) |
| Pinmanee | 1:baf91b6482eb | 1082 | { |
| Pinmanee | 1:baf91b6482eb | 1083 | retType = PICC_TYPE_ISO_18092; |
| Pinmanee | 1:baf91b6482eb | 1084 | } |
| Pinmanee | 1:baf91b6482eb | 1085 | break; |
| Pinmanee | 1:baf91b6482eb | 1086 | } |
| Pinmanee | 1:baf91b6482eb | 1087 | } |
| Pinmanee | 1:baf91b6482eb | 1088 | |
| Pinmanee | 1:baf91b6482eb | 1089 | return (retType); |
| Pinmanee | 1:baf91b6482eb | 1090 | } // End PICC_GetType() |
| Pinmanee | 1:baf91b6482eb | 1091 | |
| Pinmanee | 1:baf91b6482eb | 1092 | /* |
| Pinmanee | 1:baf91b6482eb | 1093 | * Returns a string pointer to the PICC type name. |
| Pinmanee | 1:baf91b6482eb | 1094 | */ |
| Pinmanee | 1:baf91b6482eb | 1095 | char* MFRC522::PICC_GetTypeName(uint8_t piccType) |
| Pinmanee | 1:baf91b6482eb | 1096 | { |
| Pinmanee | 1:baf91b6482eb | 1097 | if(piccType == PICC_TYPE_NOT_COMPLETE) |
| Pinmanee | 1:baf91b6482eb | 1098 | { |
| Pinmanee | 1:baf91b6482eb | 1099 | piccType = MFRC522_MaxPICCs - 1; |
| Pinmanee | 1:baf91b6482eb | 1100 | } |
| Pinmanee | 1:baf91b6482eb | 1101 | |
| Pinmanee | 1:baf91b6482eb | 1102 | return((char *) _TypeNamePICC[piccType]); |
| Pinmanee | 1:baf91b6482eb | 1103 | } // End PICC_GetTypeName() |
| Pinmanee | 1:baf91b6482eb | 1104 | |
| Pinmanee | 1:baf91b6482eb | 1105 | /* |
| Pinmanee | 1:baf91b6482eb | 1106 | * Returns a string pointer to a status code name. |
| Pinmanee | 1:baf91b6482eb | 1107 | */ |
| Pinmanee | 1:baf91b6482eb | 1108 | char* MFRC522::GetStatusCodeName(uint8_t code) |
| Pinmanee | 1:baf91b6482eb | 1109 | { |
| Pinmanee | 1:baf91b6482eb | 1110 | return((char *) _ErrorMessage[code]); |
| Pinmanee | 1:baf91b6482eb | 1111 | } // End GetStatusCodeName() |
| Pinmanee | 1:baf91b6482eb | 1112 | |
| Pinmanee | 1:baf91b6482eb | 1113 | /* |
| Pinmanee | 1:baf91b6482eb | 1114 | * Calculates the bit pattern needed for the specified access bits. In the [C1 C2 C3] tupples C1 is MSB (=4) and C3 is LSB (=1). |
| Pinmanee | 1:baf91b6482eb | 1115 | */ |
| Pinmanee | 1:baf91b6482eb | 1116 | void MFRC522::MIFARE_SetAccessBits(uint8_t *accessBitBuffer, |
| Pinmanee | 1:baf91b6482eb | 1117 | uint8_t g0, |
| Pinmanee | 1:baf91b6482eb | 1118 | uint8_t g1, |
| Pinmanee | 1:baf91b6482eb | 1119 | uint8_t g2, |
| Pinmanee | 1:baf91b6482eb | 1120 | uint8_t g3) |
| Pinmanee | 1:baf91b6482eb | 1121 | { |
| Pinmanee | 1:baf91b6482eb | 1122 | uint8_t c1 = ((g3 & 4) << 1) | ((g2 & 4) << 0) | ((g1 & 4) >> 1) | ((g0 & 4) >> 2); |
| Pinmanee | 1:baf91b6482eb | 1123 | uint8_t c2 = ((g3 & 2) << 2) | ((g2 & 2) << 1) | ((g1 & 2) << 0) | ((g0 & 2) >> 1); |
| Pinmanee | 1:baf91b6482eb | 1124 | uint8_t c3 = ((g3 & 1) << 3) | ((g2 & 1) << 2) | ((g1 & 1) << 1) | ((g0 & 1) << 0); |
| Pinmanee | 1:baf91b6482eb | 1125 | |
| Pinmanee | 1:baf91b6482eb | 1126 | accessBitBuffer[0] = (~c2 & 0xF) << 4 | (~c1 & 0xF); |
| Pinmanee | 1:baf91b6482eb | 1127 | accessBitBuffer[1] = c1 << 4 | (~c3 & 0xF); |
| Pinmanee | 1:baf91b6482eb | 1128 | accessBitBuffer[2] = c3 << 4 | c2; |
| Pinmanee | 1:baf91b6482eb | 1129 | } // End MIFARE_SetAccessBits() |
| Pinmanee | 1:baf91b6482eb | 1130 | |
| Pinmanee | 1:baf91b6482eb | 1131 | ///////////////////////////////////////////////////////////////////////////////////// |
| Pinmanee | 1:baf91b6482eb | 1132 | // Convenience functions - does not add extra functionality |
| Pinmanee | 1:baf91b6482eb | 1133 | ///////////////////////////////////////////////////////////////////////////////////// |
| Pinmanee | 1:baf91b6482eb | 1134 | |
| Pinmanee | 1:baf91b6482eb | 1135 | /* |
| Pinmanee | 1:baf91b6482eb | 1136 | * Returns true if a PICC responds to PICC_CMD_REQA. |
| Pinmanee | 1:baf91b6482eb | 1137 | * Only "new" cards in state IDLE are invited. Sleeping cards in state HALT are ignored. |
| Pinmanee | 1:baf91b6482eb | 1138 | */ |
| Pinmanee | 1:baf91b6482eb | 1139 | bool MFRC522::PICC_IsNewCardPresent(void) |
| Pinmanee | 1:baf91b6482eb | 1140 | { |
| Pinmanee | 1:baf91b6482eb | 1141 | uint8_t bufferATQA[2]; |
| Pinmanee | 1:baf91b6482eb | 1142 | uint8_t bufferSize = sizeof(bufferATQA); |
| Pinmanee | 1:baf91b6482eb | 1143 | uint8_t result = PICC_RequestA(bufferATQA, &bufferSize); |
| Pinmanee | 1:baf91b6482eb | 1144 | return ((result == STATUS_OK) || (result == STATUS_COLLISION)); |
| Pinmanee | 1:baf91b6482eb | 1145 | } // End PICC_IsNewCardPresent() |
| Pinmanee | 1:baf91b6482eb | 1146 | |
| Pinmanee | 1:baf91b6482eb | 1147 | /* |
| Pinmanee | 1:baf91b6482eb | 1148 | * Simple wrapper around PICC_Select. |
| Pinmanee | 1:baf91b6482eb | 1149 | */ |
| Pinmanee | 1:baf91b6482eb | 1150 | bool MFRC522::PICC_ReadCardSerial(void) |
| Pinmanee | 1:baf91b6482eb | 1151 | { |
| Pinmanee | 1:baf91b6482eb | 1152 | uint8_t result = PICC_Select(&uid); |
| Pinmanee | 1:baf91b6482eb | 1153 | return (result == STATUS_OK); |
| Pinmanee | 1:baf91b6482eb | 1154 | } // End PICC_ReadCardSerial() |