Osman Kamerić / Mbed OS kopija_NUCLEO_CELL_LOCKER_copy

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Dependencies:   MPU6050 PinDetect circular_buffer

MFRC522.cpp@0:b416214256cd, 2017-11-07 (annotated)

Committer:
OsmanKameric
Date:
Tue Nov 07 16:35:14 2017 +0000
Revision:
0:b416214256cd
FIRST

Who changed what in which revision?

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OsmanKameric 0:b416214256cd 1 /*
OsmanKameric 0:b416214256cd 2 * MFRC522.cpp - Library to use ARDUINO RFID MODULE KIT 13.56 MHZ WITH TAGS SPI W AND R BY COOQROBOT.
OsmanKameric 0:b416214256cd 3 * _Please_ see the comments in MFRC522.h - they give useful hints and background.
OsmanKameric 0:b416214256cd 4 * Released into the public domain.
OsmanKameric 0:b416214256cd 5 */
OsmanKameric 0:b416214256cd 6
OsmanKameric 0:b416214256cd 7 #include "MFRC522.h"
OsmanKameric 0:b416214256cd 8
OsmanKameric 0:b416214256cd 9 static const char* const _TypeNamePICC[] =
OsmanKameric 0:b416214256cd 10 {
OsmanKameric 0:b416214256cd 11 "Unknown type",
OsmanKameric 0:b416214256cd 12 "PICC compliant with ISO/IEC 14443-4",
OsmanKameric 0:b416214256cd 13 "PICC compliant with ISO/IEC 18092 (NFC)",
OsmanKameric 0:b416214256cd 14 "MIFARE Mini, 320 bytes",
OsmanKameric 0:b416214256cd 15 "MIFARE 1KB",
OsmanKameric 0:b416214256cd 16 "MIFARE 4KB",
OsmanKameric 0:b416214256cd 17 "MIFARE Ultralight or Ultralight C",
OsmanKameric 0:b416214256cd 18 "MIFARE Plus",
OsmanKameric 0:b416214256cd 19 "MIFARE TNP3XXX",
OsmanKameric 0:b416214256cd 20
OsmanKameric 0:b416214256cd 21 /* not complete UID */
OsmanKameric 0:b416214256cd 22 "SAK indicates UID is not complete"
OsmanKameric 0:b416214256cd 23 };
OsmanKameric 0:b416214256cd 24
OsmanKameric 0:b416214256cd 25 static const char* const _ErrorMessage[] =
OsmanKameric 0:b416214256cd 26 {
OsmanKameric 0:b416214256cd 27 "Unknown error",
OsmanKameric 0:b416214256cd 28 "Success",
OsmanKameric 0:b416214256cd 29 "Error in communication",
OsmanKameric 0:b416214256cd 30 "Collision detected",
OsmanKameric 0:b416214256cd 31 "Timeout in communication",
OsmanKameric 0:b416214256cd 32 "A buffer is not big enough",
OsmanKameric 0:b416214256cd 33 "Internal error in the code, should not happen",
OsmanKameric 0:b416214256cd 34 "Invalid argument",
OsmanKameric 0:b416214256cd 35 "The CRC_A does not match",
OsmanKameric 0:b416214256cd 36 "A MIFARE PICC responded with NAK"
OsmanKameric 0:b416214256cd 37 };
OsmanKameric 0:b416214256cd 38
OsmanKameric 0:b416214256cd 39 #define MFRC522_MaxPICCs (sizeof(_TypeNamePICC)/sizeof(_TypeNamePICC[0]))
OsmanKameric 0:b416214256cd 40 #define MFRC522_MaxError (sizeof(_ErrorMessage)/sizeof(_ErrorMessage[0]))
OsmanKameric 0:b416214256cd 41
OsmanKameric 0:b416214256cd 42 /////////////////////////////////////////////////////////////////////////////////////
OsmanKameric 0:b416214256cd 43 // Functions for setting up the driver
OsmanKameric 0:b416214256cd 44 /////////////////////////////////////////////////////////////////////////////////////
OsmanKameric 0:b416214256cd 45
OsmanKameric 0:b416214256cd 46 /**
OsmanKameric 0:b416214256cd 47 * Constructor.
OsmanKameric 0:b416214256cd 48 * Prepares the output pins.
OsmanKameric 0:b416214256cd 49 */
OsmanKameric 0:b416214256cd 50 MFRC522::MFRC522(PinName mosi,
OsmanKameric 0:b416214256cd 51 PinName miso,
OsmanKameric 0:b416214256cd 52 PinName sclk,
OsmanKameric 0:b416214256cd 53 PinName cs,
OsmanKameric 0:b416214256cd 54 PinName reset) : m_SPI(mosi, miso, sclk), m_CS(cs), m_RESET(reset)
OsmanKameric 0:b416214256cd 55 {
OsmanKameric 0:b416214256cd 56 /* Configure SPI bus */
OsmanKameric 0:b416214256cd 57 m_SPI.format(8, 0);
OsmanKameric 0:b416214256cd 58 m_SPI.frequency(8000000);
OsmanKameric 0:b416214256cd 59
OsmanKameric 0:b416214256cd 60 /* Release SPI-CS pin */
OsmanKameric 0:b416214256cd 61 m_CS = 1;
OsmanKameric 0:b416214256cd 62
OsmanKameric 0:b416214256cd 63 /* Release RESET pin */
OsmanKameric 0:b416214256cd 64 m_RESET = 1;
OsmanKameric 0:b416214256cd 65 } // End constructor
OsmanKameric 0:b416214256cd 66
OsmanKameric 0:b416214256cd 67
OsmanKameric 0:b416214256cd 68 /**
OsmanKameric 0:b416214256cd 69 * Destructor.
OsmanKameric 0:b416214256cd 70 */
OsmanKameric 0:b416214256cd 71 MFRC522::~MFRC522()
OsmanKameric 0:b416214256cd 72 {
OsmanKameric 0:b416214256cd 73
OsmanKameric 0:b416214256cd 74 }
OsmanKameric 0:b416214256cd 75
OsmanKameric 0:b416214256cd 76
OsmanKameric 0:b416214256cd 77 /////////////////////////////////////////////////////////////////////////////////////
OsmanKameric 0:b416214256cd 78 // Basic interface functions for communicating with the MFRC522
OsmanKameric 0:b416214256cd 79 /////////////////////////////////////////////////////////////////////////////////////
OsmanKameric 0:b416214256cd 80
OsmanKameric 0:b416214256cd 81 /**
OsmanKameric 0:b416214256cd 82 * Writes a byte to the specified register in the MFRC522 chip.
OsmanKameric 0:b416214256cd 83 * The interface is described in the datasheet section 8.1.2.
OsmanKameric 0:b416214256cd 84 */
OsmanKameric 0:b416214256cd 85 void MFRC522::PCD_WriteRegister(uint8_t reg, uint8_t value)
OsmanKameric 0:b416214256cd 86 {
OsmanKameric 0:b416214256cd 87 m_CS = 0; /* Select SPI Chip MFRC522 */
OsmanKameric 0:b416214256cd 88
OsmanKameric 0:b416214256cd 89 // MSB == 0 is for writing. LSB is not used in address. Datasheet section 8.1.2.3.
OsmanKameric 0:b416214256cd 90 (void) m_SPI.write(reg & 0x7E);
OsmanKameric 0:b416214256cd 91 (void) m_SPI.write(value);
OsmanKameric 0:b416214256cd 92
OsmanKameric 0:b416214256cd 93 m_CS = 1; /* Release SPI Chip MFRC522 */
OsmanKameric 0:b416214256cd 94 } // End PCD_WriteRegister()
OsmanKameric 0:b416214256cd 95
OsmanKameric 0:b416214256cd 96 /**
OsmanKameric 0:b416214256cd 97 * Writes a number of bytes to the specified register in the MFRC522 chip.
OsmanKameric 0:b416214256cd 98 * The interface is described in the datasheet section 8.1.2.
OsmanKameric 0:b416214256cd 99 */
OsmanKameric 0:b416214256cd 100 void MFRC522::PCD_WriteRegister(uint8_t reg, uint8_t count, uint8_t *values)
OsmanKameric 0:b416214256cd 101 {
OsmanKameric 0:b416214256cd 102 m_CS = 0; /* Select SPI Chip MFRC522 */
OsmanKameric 0:b416214256cd 103
OsmanKameric 0:b416214256cd 104 // MSB == 0 is for writing. LSB is not used in address. Datasheet section 8.1.2.3.
OsmanKameric 0:b416214256cd 105 (void) m_SPI.write(reg & 0x7E);
OsmanKameric 0:b416214256cd 106 for (uint8_t index = 0; index < count; index++)
OsmanKameric 0:b416214256cd 107 {
OsmanKameric 0:b416214256cd 108 (void) m_SPI.write(values[index]);
OsmanKameric 0:b416214256cd 109 }
OsmanKameric 0:b416214256cd 110
OsmanKameric 0:b416214256cd 111 m_CS = 1; /* Release SPI Chip MFRC522 */
OsmanKameric 0:b416214256cd 112 } // End PCD_WriteRegister()
OsmanKameric 0:b416214256cd 113
OsmanKameric 0:b416214256cd 114 /**
OsmanKameric 0:b416214256cd 115 * Reads a byte from the specified register in the MFRC522 chip.
OsmanKameric 0:b416214256cd 116 * The interface is described in the datasheet section 8.1.2.
OsmanKameric 0:b416214256cd 117 */
OsmanKameric 0:b416214256cd 118 uint8_t MFRC522::PCD_ReadRegister(uint8_t reg)
OsmanKameric 0:b416214256cd 119 {
OsmanKameric 0:b416214256cd 120 uint8_t value;
OsmanKameric 0:b416214256cd 121 m_CS = 0; /* Select SPI Chip MFRC522 */
OsmanKameric 0:b416214256cd 122
OsmanKameric 0:b416214256cd 123 // MSB == 1 is for reading. LSB is not used in address. Datasheet section 8.1.2.3.
OsmanKameric 0:b416214256cd 124 (void) m_SPI.write(0x80 | reg);
OsmanKameric 0:b416214256cd 125
OsmanKameric 0:b416214256cd 126 // Read the value back. Send 0 to stop reading.
OsmanKameric 0:b416214256cd 127 value = m_SPI.write(0);
OsmanKameric 0:b416214256cd 128
OsmanKameric 0:b416214256cd 129 m_CS = 1; /* Release SPI Chip MFRC522 */
OsmanKameric 0:b416214256cd 130
OsmanKameric 0:b416214256cd 131 return value;
OsmanKameric 0:b416214256cd 132 } // End PCD_ReadRegister()
OsmanKameric 0:b416214256cd 133
OsmanKameric 0:b416214256cd 134 /**
OsmanKameric 0:b416214256cd 135 * Reads a number of bytes from the specified register in the MFRC522 chip.
OsmanKameric 0:b416214256cd 136 * The interface is described in the datasheet section 8.1.2.
OsmanKameric 0:b416214256cd 137 */
OsmanKameric 0:b416214256cd 138 void MFRC522::PCD_ReadRegister(uint8_t reg, uint8_t count, uint8_t *values, uint8_t rxAlign)
OsmanKameric 0:b416214256cd 139 {
OsmanKameric 0:b416214256cd 140 if (count == 0) { return; }
OsmanKameric 0:b416214256cd 141
OsmanKameric 0:b416214256cd 142 uint8_t address = 0x80 | reg; // MSB == 1 is for reading. LSB is not used in address. Datasheet section 8.1.2.3.
OsmanKameric 0:b416214256cd 143 uint8_t index = 0; // Index in values array.
OsmanKameric 0:b416214256cd 144
OsmanKameric 0:b416214256cd 145 m_CS = 0; /* Select SPI Chip MFRC522 */
OsmanKameric 0:b416214256cd 146 count--; // One read is performed outside of the loop
OsmanKameric 0:b416214256cd 147 (void) m_SPI.write(address); // Tell MFRC522 which address we want to read
OsmanKameric 0:b416214256cd 148
OsmanKameric 0:b416214256cd 149 while (index < count)
OsmanKameric 0:b416214256cd 150 {
OsmanKameric 0:b416214256cd 151 if ((index == 0) && rxAlign) // Only update bit positions rxAlign..7 in values[0]
OsmanKameric 0:b416214256cd 152 {
OsmanKameric 0:b416214256cd 153 // Create bit mask for bit positions rxAlign..7
OsmanKameric 0:b416214256cd 154 uint8_t mask = 0;
OsmanKameric 0:b416214256cd 155 for (uint8_t i = rxAlign; i <= 7; i++)
OsmanKameric 0:b416214256cd 156 {
OsmanKameric 0:b416214256cd 157 mask |= (1 << i);
OsmanKameric 0:b416214256cd 158 }
OsmanKameric 0:b416214256cd 159
OsmanKameric 0:b416214256cd 160 // Read value and tell that we want to read the same address again.
OsmanKameric 0:b416214256cd 161 uint8_t value = m_SPI.write(address);
OsmanKameric 0:b416214256cd 162
OsmanKameric 0:b416214256cd 163 // Apply mask to both current value of values[0] and the new data in value.
OsmanKameric 0:b416214256cd 164 values[0] = (values[index] & ~mask) | (value & mask);
OsmanKameric 0:b416214256cd 165 }
OsmanKameric 0:b416214256cd 166 else
OsmanKameric 0:b416214256cd 167 {
OsmanKameric 0:b416214256cd 168 // Read value and tell that we want to read the same address again.
OsmanKameric 0:b416214256cd 169 values[index] = m_SPI.write(address);
OsmanKameric 0:b416214256cd 170 }
OsmanKameric 0:b416214256cd 171
OsmanKameric 0:b416214256cd 172 index++;
OsmanKameric 0:b416214256cd 173 }
OsmanKameric 0:b416214256cd 174
OsmanKameric 0:b416214256cd 175 values[index] = m_SPI.write(0); // Read the final byte. Send 0 to stop reading.
OsmanKameric 0:b416214256cd 176
OsmanKameric 0:b416214256cd 177 m_CS = 1; /* Release SPI Chip MFRC522 */
OsmanKameric 0:b416214256cd 178 } // End PCD_ReadRegister()
OsmanKameric 0:b416214256cd 179
OsmanKameric 0:b416214256cd 180 /**
OsmanKameric 0:b416214256cd 181 * Sets the bits given in mask in register reg.
OsmanKameric 0:b416214256cd 182 */
OsmanKameric 0:b416214256cd 183 void MFRC522::PCD_SetRegisterBits(uint8_t reg, uint8_t mask)
OsmanKameric 0:b416214256cd 184 {
OsmanKameric 0:b416214256cd 185 uint8_t tmp = PCD_ReadRegister(reg);
OsmanKameric 0:b416214256cd 186 PCD_WriteRegister(reg, tmp | mask); // set bit mask
OsmanKameric 0:b416214256cd 187 } // End PCD_SetRegisterBitMask()
OsmanKameric 0:b416214256cd 188
OsmanKameric 0:b416214256cd 189 /**
OsmanKameric 0:b416214256cd 190 * Clears the bits given in mask from register reg.
OsmanKameric 0:b416214256cd 191 */
OsmanKameric 0:b416214256cd 192 void MFRC522::PCD_ClrRegisterBits(uint8_t reg, uint8_t mask)
OsmanKameric 0:b416214256cd 193 {
OsmanKameric 0:b416214256cd 194 uint8_t tmp = PCD_ReadRegister(reg);
OsmanKameric 0:b416214256cd 195 PCD_WriteRegister(reg, tmp & (~mask)); // clear bit mask
OsmanKameric 0:b416214256cd 196 } // End PCD_ClearRegisterBitMask()
OsmanKameric 0:b416214256cd 197
OsmanKameric 0:b416214256cd 198
OsmanKameric 0:b416214256cd 199 /**
OsmanKameric 0:b416214256cd 200 * Use the CRC coprocessor in the MFRC522 to calculate a CRC_A.
OsmanKameric 0:b416214256cd 201 */
OsmanKameric 0:b416214256cd 202 uint8_t MFRC522::PCD_CalculateCRC(uint8_t *data, uint8_t length, uint8_t *result)
OsmanKameric 0:b416214256cd 203 {
OsmanKameric 0:b416214256cd 204 PCD_WriteRegister(CommandReg, PCD_Idle); // Stop any active command.
OsmanKameric 0:b416214256cd 205 PCD_WriteRegister(DivIrqReg, 0x04); // Clear the CRCIRq interrupt request bit
OsmanKameric 0:b416214256cd 206 PCD_SetRegisterBits(FIFOLevelReg, 0x80); // FlushBuffer = 1, FIFO initialization
OsmanKameric 0:b416214256cd 207 PCD_WriteRegister(FIFODataReg, length, data); // Write data to the FIFO
OsmanKameric 0:b416214256cd 208 PCD_WriteRegister(CommandReg, PCD_CalcCRC); // Start the calculation
OsmanKameric 0:b416214256cd 209
OsmanKameric 0:b416214256cd 210 // Wait for the CRC calculation to complete. Each iteration of the while-loop takes 17.73us.
OsmanKameric 0:b416214256cd 211 uint16_t i = 5000;
OsmanKameric 0:b416214256cd 212 uint8_t n;
OsmanKameric 0:b416214256cd 213 while (1)
OsmanKameric 0:b416214256cd 214 {
OsmanKameric 0:b416214256cd 215 n = PCD_ReadRegister(DivIrqReg); // DivIrqReg[7..0] bits are: Set2 reserved reserved MfinActIRq reserved CRCIRq reserved reserved
OsmanKameric 0:b416214256cd 216 if (n & 0x04)
OsmanKameric 0:b416214256cd 217 {
OsmanKameric 0:b416214256cd 218 // CRCIRq bit set - calculation done
OsmanKameric 0:b416214256cd 219 break;
OsmanKameric 0:b416214256cd 220 }
OsmanKameric 0:b416214256cd 221
OsmanKameric 0:b416214256cd 222 if (--i == 0)
OsmanKameric 0:b416214256cd 223 {
OsmanKameric 0:b416214256cd 224 // The emergency break. We will eventually terminate on this one after 89ms.
OsmanKameric 0:b416214256cd 225 // Communication with the MFRC522 might be down.
OsmanKameric 0:b416214256cd 226 return STATUS_TIMEOUT;
OsmanKameric 0:b416214256cd 227 }
OsmanKameric 0:b416214256cd 228 }
OsmanKameric 0:b416214256cd 229
OsmanKameric 0:b416214256cd 230 // Stop calculating CRC for new content in the FIFO.
OsmanKameric 0:b416214256cd 231 PCD_WriteRegister(CommandReg, PCD_Idle);
OsmanKameric 0:b416214256cd 232
OsmanKameric 0:b416214256cd 233 // Transfer the result from the registers to the result buffer
OsmanKameric 0:b416214256cd 234 result[0] = PCD_ReadRegister(CRCResultRegL);
OsmanKameric 0:b416214256cd 235 result[1] = PCD_ReadRegister(CRCResultRegH);
OsmanKameric 0:b416214256cd 236 return STATUS_OK;
OsmanKameric 0:b416214256cd 237 } // End PCD_CalculateCRC()
OsmanKameric 0:b416214256cd 238
OsmanKameric 0:b416214256cd 239
OsmanKameric 0:b416214256cd 240 /////////////////////////////////////////////////////////////////////////////////////
OsmanKameric 0:b416214256cd 241 // Functions for manipulating the MFRC522
OsmanKameric 0:b416214256cd 242 /////////////////////////////////////////////////////////////////////////////////////
OsmanKameric 0:b416214256cd 243
OsmanKameric 0:b416214256cd 244 /**
OsmanKameric 0:b416214256cd 245 * Initializes the MFRC522 chip.
OsmanKameric 0:b416214256cd 246 */
OsmanKameric 0:b416214256cd 247 void MFRC522::PCD_Init()
OsmanKameric 0:b416214256cd 248 {
OsmanKameric 0:b416214256cd 249 /* Reset MFRC522 */
OsmanKameric 0:b416214256cd 250 m_RESET = 0;
OsmanKameric 0:b416214256cd 251 wait_ms(10);
OsmanKameric 0:b416214256cd 252 m_RESET = 1;
OsmanKameric 0:b416214256cd 253
OsmanKameric 0:b416214256cd 254 // Section 8.8.2 in the datasheet says the oscillator start-up time is the start up time of the crystal + 37,74us. Let us be generous: 50ms.
OsmanKameric 0:b416214256cd 255 wait_ms(50);
OsmanKameric 0:b416214256cd 256
OsmanKameric 0:b416214256cd 257 // When communicating with a PICC we need a timeout if something goes wrong.
OsmanKameric 0:b416214256cd 258 // f_timer = 13.56 MHz / (2*TPreScaler+1) where TPreScaler = [TPrescaler_Hi:TPrescaler_Lo].
OsmanKameric 0:b416214256cd 259 // TPrescaler_Hi are the four low bits in TModeReg. TPrescaler_Lo is TPrescalerReg.
OsmanKameric 0:b416214256cd 260 PCD_WriteRegister(TModeReg, 0x80); // TAuto=1; timer starts automatically at the end of the transmission in all communication modes at all speeds
OsmanKameric 0:b416214256cd 261 PCD_WriteRegister(TPrescalerReg, 0xA9); // TPreScaler = TModeReg[3..0]:TPrescalerReg, ie 0x0A9 = 169 => f_timer=40kHz, ie a timer period of 25us.
OsmanKameric 0:b416214256cd 262 PCD_WriteRegister(TReloadRegH, 0x03); // Reload timer with 0x3E8 = 1000, ie 25ms before timeout.
OsmanKameric 0:b416214256cd 263 PCD_WriteRegister(TReloadRegL, 0xE8);
OsmanKameric 0:b416214256cd 264
OsmanKameric 0:b416214256cd 265 PCD_WriteRegister(TxASKReg, 0x40); // Default 0x00. Force a 100 % ASK modulation independent of the ModGsPReg register setting
OsmanKameric 0:b416214256cd 266 PCD_WriteRegister(ModeReg, 0x3D); // Default 0x3F. Set the preset value for the CRC coprocessor for the CalcCRC command to 0x6363 (ISO 14443-3 part 6.2.4)
OsmanKameric 0:b416214256cd 267
OsmanKameric 0:b416214256cd 268 PCD_WriteRegister(RFCfgReg, (0x07<<4)); // Set Rx Gain to max
OsmanKameric 0:b416214256cd 269
OsmanKameric 0:b416214256cd 270 PCD_AntennaOn(); // Enable the antenna driver pins TX1 and TX2 (they were disabled by the reset)
OsmanKameric 0:b416214256cd 271 } // End PCD_Init()
OsmanKameric 0:b416214256cd 272
OsmanKameric 0:b416214256cd 273 /**
OsmanKameric 0:b416214256cd 274 * Performs a soft reset on the MFRC522 chip and waits for it to be ready again.
OsmanKameric 0:b416214256cd 275 */
OsmanKameric 0:b416214256cd 276 void MFRC522::PCD_Reset()
OsmanKameric 0:b416214256cd 277 {
OsmanKameric 0:b416214256cd 278 PCD_WriteRegister(CommandReg, PCD_SoftReset); // Issue the SoftReset command.
OsmanKameric 0:b416214256cd 279 // The datasheet does not mention how long the SoftRest command takes to complete.
OsmanKameric 0:b416214256cd 280 // But the MFRC522 might have been in soft power-down mode (triggered by bit 4 of CommandReg)
OsmanKameric 0:b416214256cd 281 // Section 8.8.2 in the datasheet says the oscillator start-up time is the start up time of the crystal + 37,74us. Let us be generous: 50ms.
OsmanKameric 0:b416214256cd 282 wait_ms(50);
OsmanKameric 0:b416214256cd 283
OsmanKameric 0:b416214256cd 284 // Wait for the PowerDown bit in CommandReg to be cleared
OsmanKameric 0:b416214256cd 285 while (PCD_ReadRegister(CommandReg) & (1<<4))
OsmanKameric 0:b416214256cd 286 {
OsmanKameric 0:b416214256cd 287 // PCD still restarting - unlikely after waiting 50ms, but better safe than sorry.
OsmanKameric 0:b416214256cd 288 }
OsmanKameric 0:b416214256cd 289 } // End PCD_Reset()
OsmanKameric 0:b416214256cd 290
OsmanKameric 0:b416214256cd 291 /**
OsmanKameric 0:b416214256cd 292 * Turns the antenna on by enabling pins TX1 and TX2.
OsmanKameric 0:b416214256cd 293 * After a reset these pins disabled.
OsmanKameric 0:b416214256cd 294 */
OsmanKameric 0:b416214256cd 295 void MFRC522::PCD_AntennaOn()
OsmanKameric 0:b416214256cd 296 {
OsmanKameric 0:b416214256cd 297 uint8_t value = PCD_ReadRegister(TxControlReg);
OsmanKameric 0:b416214256cd 298 if ((value & 0x03) != 0x03)
OsmanKameric 0:b416214256cd 299 {
OsmanKameric 0:b416214256cd 300 PCD_WriteRegister(TxControlReg, value | 0x03);
OsmanKameric 0:b416214256cd 301 }
OsmanKameric 0:b416214256cd 302 } // End PCD_AntennaOn()
OsmanKameric 0:b416214256cd 303
OsmanKameric 0:b416214256cd 304 /////////////////////////////////////////////////////////////////////////////////////
OsmanKameric 0:b416214256cd 305 // Functions for communicating with PICCs
OsmanKameric 0:b416214256cd 306 /////////////////////////////////////////////////////////////////////////////////////
OsmanKameric 0:b416214256cd 307
OsmanKameric 0:b416214256cd 308 /**
OsmanKameric 0:b416214256cd 309 * Executes the Transceive command.
OsmanKameric 0:b416214256cd 310 * CRC validation can only be done if backData and backLen are specified.
OsmanKameric 0:b416214256cd 311 */
OsmanKameric 0:b416214256cd 312 uint8_t MFRC522::PCD_TransceiveData(uint8_t *sendData,
OsmanKameric 0:b416214256cd 313 uint8_t sendLen,
OsmanKameric 0:b416214256cd 314 uint8_t *backData,
OsmanKameric 0:b416214256cd 315 uint8_t *backLen,
OsmanKameric 0:b416214256cd 316 uint8_t *validBits,
OsmanKameric 0:b416214256cd 317 uint8_t rxAlign,
OsmanKameric 0:b416214256cd 318 bool checkCRC)
OsmanKameric 0:b416214256cd 319 {
OsmanKameric 0:b416214256cd 320 uint8_t waitIRq = 0x30; // RxIRq and IdleIRq
OsmanKameric 0:b416214256cd 321 return PCD_CommunicateWithPICC(PCD_Transceive, waitIRq, sendData, sendLen, backData, backLen, validBits, rxAlign, checkCRC);
OsmanKameric 0:b416214256cd 322 } // End PCD_TransceiveData()
OsmanKameric 0:b416214256cd 323
OsmanKameric 0:b416214256cd 324 /**
OsmanKameric 0:b416214256cd 325 * Transfers data to the MFRC522 FIFO, executes a commend, waits for completion and transfers data back from the FIFO.
OsmanKameric 0:b416214256cd 326 * CRC validation can only be done if backData and backLen are specified.
OsmanKameric 0:b416214256cd 327 */
OsmanKameric 0:b416214256cd 328 uint8_t MFRC522::PCD_CommunicateWithPICC(uint8_t command,
OsmanKameric 0:b416214256cd 329 uint8_t waitIRq,
OsmanKameric 0:b416214256cd 330 uint8_t *sendData,
OsmanKameric 0:b416214256cd 331 uint8_t sendLen,
OsmanKameric 0:b416214256cd 332 uint8_t *backData,
OsmanKameric 0:b416214256cd 333 uint8_t *backLen,
OsmanKameric 0:b416214256cd 334 uint8_t *validBits,
OsmanKameric 0:b416214256cd 335 uint8_t rxAlign,
OsmanKameric 0:b416214256cd 336 bool checkCRC)
OsmanKameric 0:b416214256cd 337 {
OsmanKameric 0:b416214256cd 338 uint8_t n, _validBits = 0;
OsmanKameric 0:b416214256cd 339 uint32_t i;
OsmanKameric 0:b416214256cd 340
OsmanKameric 0:b416214256cd 341 // Prepare values for BitFramingReg
OsmanKameric 0:b416214256cd 342 uint8_t txLastBits = validBits ? *validBits : 0;
OsmanKameric 0:b416214256cd 343 uint8_t bitFraming = (rxAlign << 4) + txLastBits; // RxAlign = BitFramingReg[6..4]. TxLastBits = BitFramingReg[2..0]
OsmanKameric 0:b416214256cd 344
OsmanKameric 0:b416214256cd 345 PCD_WriteRegister(CommandReg, PCD_Idle); // Stop any active command.
OsmanKameric 0:b416214256cd 346 PCD_WriteRegister(ComIrqReg, 0x7F); // Clear all seven interrupt request bits
OsmanKameric 0:b416214256cd 347 PCD_SetRegisterBits(FIFOLevelReg, 0x80); // FlushBuffer = 1, FIFO initialization
OsmanKameric 0:b416214256cd 348 PCD_WriteRegister(FIFODataReg, sendLen, sendData); // Write sendData to the FIFO
OsmanKameric 0:b416214256cd 349 PCD_WriteRegister(BitFramingReg, bitFraming); // Bit adjustments
OsmanKameric 0:b416214256cd 350 PCD_WriteRegister(CommandReg, command); // Execute the command
OsmanKameric 0:b416214256cd 351 if (command == PCD_Transceive)
OsmanKameric 0:b416214256cd 352 {
OsmanKameric 0:b416214256cd 353 PCD_SetRegisterBits(BitFramingReg, 0x80); // StartSend=1, transmission of data starts
OsmanKameric 0:b416214256cd 354 }
OsmanKameric 0:b416214256cd 355
OsmanKameric 0:b416214256cd 356 // Wait for the command to complete.
OsmanKameric 0:b416214256cd 357 // In PCD_Init() we set the TAuto flag in TModeReg. This means the timer automatically starts when the PCD stops transmitting.
OsmanKameric 0:b416214256cd 358 // Each iteration of the do-while-loop takes 17.86us.
OsmanKameric 0:b416214256cd 359 i = 2000;
OsmanKameric 0:b416214256cd 360 while (1)
OsmanKameric 0:b416214256cd 361 {
OsmanKameric 0:b416214256cd 362 n = PCD_ReadRegister(ComIrqReg); // ComIrqReg[7..0] bits are: Set1 TxIRq RxIRq IdleIRq HiAlertIRq LoAlertIRq ErrIRq TimerIRq
OsmanKameric 0:b416214256cd 363 if (n & waitIRq)
OsmanKameric 0:b416214256cd 364 { // One of the interrupts that signal success has been set.
OsmanKameric 0:b416214256cd 365 break;
OsmanKameric 0:b416214256cd 366 }
OsmanKameric 0:b416214256cd 367
OsmanKameric 0:b416214256cd 368 if (n & 0x01)
OsmanKameric 0:b416214256cd 369 { // Timer interrupt - nothing received in 25ms
OsmanKameric 0:b416214256cd 370 return STATUS_TIMEOUT;
OsmanKameric 0:b416214256cd 371 }
OsmanKameric 0:b416214256cd 372
OsmanKameric 0:b416214256cd 373 if (--i == 0)
OsmanKameric 0:b416214256cd 374 { // The emergency break. If all other condions fail we will eventually terminate on this one after 35.7ms. Communication with the MFRC522 might be down.
OsmanKameric 0:b416214256cd 375 return STATUS_TIMEOUT;
OsmanKameric 0:b416214256cd 376 }
OsmanKameric 0:b416214256cd 377 }
OsmanKameric 0:b416214256cd 378
OsmanKameric 0:b416214256cd 379 // Stop now if any errors except collisions were detected.
OsmanKameric 0:b416214256cd 380 uint8_t errorRegValue = PCD_ReadRegister(ErrorReg); // ErrorReg[7..0] bits are: WrErr TempErr reserved BufferOvfl CollErr CRCErr ParityErr ProtocolErr
OsmanKameric 0:b416214256cd 381 if (errorRegValue & 0x13)
OsmanKameric 0:b416214256cd 382 { // BufferOvfl ParityErr ProtocolErr
OsmanKameric 0:b416214256cd 383 return STATUS_ERROR;
OsmanKameric 0:b416214256cd 384 }
OsmanKameric 0:b416214256cd 385
OsmanKameric 0:b416214256cd 386 // If the caller wants data back, get it from the MFRC522.
OsmanKameric 0:b416214256cd 387 if (backData && backLen)
OsmanKameric 0:b416214256cd 388 {
OsmanKameric 0:b416214256cd 389 n = PCD_ReadRegister(FIFOLevelReg); // Number of bytes in the FIFO
OsmanKameric 0:b416214256cd 390 if (n > *backLen)
OsmanKameric 0:b416214256cd 391 {
OsmanKameric 0:b416214256cd 392 return STATUS_NO_ROOM;
OsmanKameric 0:b416214256cd 393 }
OsmanKameric 0:b416214256cd 394
OsmanKameric 0:b416214256cd 395 *backLen = n; // Number of bytes returned
OsmanKameric 0:b416214256cd 396 PCD_ReadRegister(FIFODataReg, n, backData, rxAlign); // Get received data from FIFO
OsmanKameric 0:b416214256cd 397 _validBits = PCD_ReadRegister(ControlReg) & 0x07; // RxLastBits[2:0] indicates the number of valid bits in the last received byte. If this value is 000b, the whole byte is valid.
OsmanKameric 0:b416214256cd 398 if (validBits)
OsmanKameric 0:b416214256cd 399 {
OsmanKameric 0:b416214256cd 400 *validBits = _validBits;
OsmanKameric 0:b416214256cd 401 }
OsmanKameric 0:b416214256cd 402 }
OsmanKameric 0:b416214256cd 403
OsmanKameric 0:b416214256cd 404 // Tell about collisions
OsmanKameric 0:b416214256cd 405 if (errorRegValue & 0x08)
OsmanKameric 0:b416214256cd 406 { // CollErr
OsmanKameric 0:b416214256cd 407 return STATUS_COLLISION;
OsmanKameric 0:b416214256cd 408 }
OsmanKameric 0:b416214256cd 409
OsmanKameric 0:b416214256cd 410 // Perform CRC_A validation if requested.
OsmanKameric 0:b416214256cd 411 if (backData && backLen && checkCRC)
OsmanKameric 0:b416214256cd 412 {
OsmanKameric 0:b416214256cd 413 // In this case a MIFARE Classic NAK is not OK.
OsmanKameric 0:b416214256cd 414 if ((*backLen == 1) && (_validBits == 4))
OsmanKameric 0:b416214256cd 415 {
OsmanKameric 0:b416214256cd 416 return STATUS_MIFARE_NACK;
OsmanKameric 0:b416214256cd 417 }
OsmanKameric 0:b416214256cd 418
OsmanKameric 0:b416214256cd 419 // We need at least the CRC_A value and all 8 bits of the last byte must be received.
OsmanKameric 0:b416214256cd 420 if ((*backLen < 2) || (_validBits != 0))
OsmanKameric 0:b416214256cd 421 {
OsmanKameric 0:b416214256cd 422 return STATUS_CRC_WRONG;
OsmanKameric 0:b416214256cd 423 }
OsmanKameric 0:b416214256cd 424
OsmanKameric 0:b416214256cd 425 // Verify CRC_A - do our own calculation and store the control in controlBuffer.
OsmanKameric 0:b416214256cd 426 uint8_t controlBuffer[2];
OsmanKameric 0:b416214256cd 427 n = PCD_CalculateCRC(&backData[0], *backLen - 2, &controlBuffer[0]);
OsmanKameric 0:b416214256cd 428 if (n != STATUS_OK)
OsmanKameric 0:b416214256cd 429 {
OsmanKameric 0:b416214256cd 430 return n;
OsmanKameric 0:b416214256cd 431 }
OsmanKameric 0:b416214256cd 432
OsmanKameric 0:b416214256cd 433 if ((backData[*backLen - 2] != controlBuffer[0]) || (backData[*backLen - 1] != controlBuffer[1]))
OsmanKameric 0:b416214256cd 434 {
OsmanKameric 0:b416214256cd 435 return STATUS_CRC_WRONG;
OsmanKameric 0:b416214256cd 436 }
OsmanKameric 0:b416214256cd 437 }
OsmanKameric 0:b416214256cd 438
OsmanKameric 0:b416214256cd 439 return STATUS_OK;
OsmanKameric 0:b416214256cd 440 } // End PCD_CommunicateWithPICC()
OsmanKameric 0:b416214256cd 441
OsmanKameric 0:b416214256cd 442 /*
OsmanKameric 0:b416214256cd 443 * Transmits a REQuest command, Type A. Invites PICCs in state IDLE to go to READY and prepare for anticollision or selection. 7 bit frame.
OsmanKameric 0:b416214256cd 444 * Beware: When two PICCs are in the field at the same time I often get STATUS_TIMEOUT - probably due do bad antenna design.
OsmanKameric 0:b416214256cd 445 */
OsmanKameric 0:b416214256cd 446 uint8_t MFRC522::PICC_RequestA(uint8_t *bufferATQA, uint8_t *bufferSize)
OsmanKameric 0:b416214256cd 447 {
OsmanKameric 0:b416214256cd 448 return PICC_REQA_or_WUPA(PICC_CMD_REQA, bufferATQA, bufferSize);
OsmanKameric 0:b416214256cd 449 } // End PICC_RequestA()
OsmanKameric 0:b416214256cd 450
OsmanKameric 0:b416214256cd 451 /**
OsmanKameric 0:b416214256cd 452 * Transmits a Wake-UP command, Type A. Invites PICCs in state IDLE and HALT to go to READY(*) and prepare for anticollision or selection. 7 bit frame.
OsmanKameric 0:b416214256cd 453 * Beware: When two PICCs are in the field at the same time I often get STATUS_TIMEOUT - probably due do bad antenna design.
OsmanKameric 0:b416214256cd 454 */
OsmanKameric 0:b416214256cd 455 uint8_t MFRC522::PICC_WakeupA(uint8_t *bufferATQA, uint8_t *bufferSize)
OsmanKameric 0:b416214256cd 456 {
OsmanKameric 0:b416214256cd 457 return PICC_REQA_or_WUPA(PICC_CMD_WUPA, bufferATQA, bufferSize);
OsmanKameric 0:b416214256cd 458 } // End PICC_WakeupA()
OsmanKameric 0:b416214256cd 459
OsmanKameric 0:b416214256cd 460 /*
OsmanKameric 0:b416214256cd 461 * Transmits REQA or WUPA commands.
OsmanKameric 0:b416214256cd 462 * Beware: When two PICCs are in the field at the same time I often get STATUS_TIMEOUT - probably due do bad antenna design.
OsmanKameric 0:b416214256cd 463 */
OsmanKameric 0:b416214256cd 464 uint8_t MFRC522::PICC_REQA_or_WUPA(uint8_t command, uint8_t *bufferATQA, uint8_t *bufferSize)
OsmanKameric 0:b416214256cd 465 {
OsmanKameric 0:b416214256cd 466 uint8_t validBits;
OsmanKameric 0:b416214256cd 467 uint8_t status;
OsmanKameric 0:b416214256cd 468
OsmanKameric 0:b416214256cd 469 if (bufferATQA == NULL || *bufferSize < 2)
OsmanKameric 0:b416214256cd 470 { // The ATQA response is 2 bytes long.
OsmanKameric 0:b416214256cd 471 return STATUS_NO_ROOM;
OsmanKameric 0:b416214256cd 472 }
OsmanKameric 0:b416214256cd 473
OsmanKameric 0:b416214256cd 474 // ValuesAfterColl=1 => Bits received after collision are cleared.
OsmanKameric 0:b416214256cd 475 PCD_ClrRegisterBits(CollReg, 0x80);
OsmanKameric 0:b416214256cd 476
OsmanKameric 0:b416214256cd 477 // For REQA and WUPA we need the short frame format
OsmanKameric 0:b416214256cd 478 // - transmit only 7 bits of the last (and only) byte. TxLastBits = BitFramingReg[2..0]
OsmanKameric 0:b416214256cd 479 validBits = 7;
OsmanKameric 0:b416214256cd 480
OsmanKameric 0:b416214256cd 481 status = PCD_TransceiveData(&command, 1, bufferATQA, bufferSize, &validBits);
OsmanKameric 0:b416214256cd 482 if (status != STATUS_OK)
OsmanKameric 0:b416214256cd 483 {
OsmanKameric 0:b416214256cd 484 return status;
OsmanKameric 0:b416214256cd 485 }
OsmanKameric 0:b416214256cd 486
OsmanKameric 0:b416214256cd 487 if ((*bufferSize != 2) || (validBits != 0))
OsmanKameric 0:b416214256cd 488 { // ATQA must be exactly 16 bits.
OsmanKameric 0:b416214256cd 489 return STATUS_ERROR;
OsmanKameric 0:b416214256cd 490 }
OsmanKameric 0:b416214256cd 491
OsmanKameric 0:b416214256cd 492 return STATUS_OK;
OsmanKameric 0:b416214256cd 493 } // End PICC_REQA_or_WUPA()
OsmanKameric 0:b416214256cd 494
OsmanKameric 0:b416214256cd 495 /*
OsmanKameric 0:b416214256cd 496 * Transmits SELECT/ANTICOLLISION commands to select a single PICC.
OsmanKameric 0:b416214256cd 497 */
OsmanKameric 0:b416214256cd 498 uint8_t MFRC522::PICC_Select(Uid *uid, uint8_t validBits)
OsmanKameric 0:b416214256cd 499 {
OsmanKameric 0:b416214256cd 500 bool uidComplete;
OsmanKameric 0:b416214256cd 501 bool selectDone;
OsmanKameric 0:b416214256cd 502 bool useCascadeTag;
OsmanKameric 0:b416214256cd 503 uint8_t cascadeLevel = 1;
OsmanKameric 0:b416214256cd 504 uint8_t result;
OsmanKameric 0:b416214256cd 505 uint8_t count;
OsmanKameric 0:b416214256cd 506 uint8_t index;
OsmanKameric 0:b416214256cd 507 uint8_t uidIndex; // The first index in uid->uidByte[] that is used in the current Cascade Level.
OsmanKameric 0:b416214256cd 508 uint8_t currentLevelKnownBits; // The number of known UID bits in the current Cascade Level.
OsmanKameric 0:b416214256cd 509 uint8_t buffer[9]; // The SELECT/ANTICOLLISION commands uses a 7 byte standard frame + 2 bytes CRC_A
OsmanKameric 0:b416214256cd 510 uint8_t bufferUsed; // The number of bytes used in the buffer, ie the number of bytes to transfer to the FIFO.
OsmanKameric 0:b416214256cd 511 uint8_t rxAlign; // Used in BitFramingReg. Defines the bit position for the first bit received.
OsmanKameric 0:b416214256cd 512 uint8_t txLastBits; // Used in BitFramingReg. The number of valid bits in the last transmitted byte.
OsmanKameric 0:b416214256cd 513 uint8_t *responseBuffer;
OsmanKameric 0:b416214256cd 514 uint8_t responseLength;
OsmanKameric 0:b416214256cd 515
OsmanKameric 0:b416214256cd 516 // Description of buffer structure:
OsmanKameric 0:b416214256cd 517 // Byte 0: SEL Indicates the Cascade Level: PICC_CMD_SEL_CL1, PICC_CMD_SEL_CL2 or PICC_CMD_SEL_CL3
OsmanKameric 0:b416214256cd 518 // Byte 1: NVB Number of Valid Bits (in complete command, not just the UID): High nibble: complete bytes, Low nibble: Extra bits.
OsmanKameric 0:b416214256cd 519 // Byte 2: UID-data or CT See explanation below. CT means Cascade Tag.
OsmanKameric 0:b416214256cd 520 // Byte 3: UID-data
OsmanKameric 0:b416214256cd 521 // Byte 4: UID-data
OsmanKameric 0:b416214256cd 522 // Byte 5: UID-data
OsmanKameric 0:b416214256cd 523 // Byte 6: BCC Block Check Character - XOR of bytes 2-5
OsmanKameric 0:b416214256cd 524 // Byte 7: CRC_A
OsmanKameric 0:b416214256cd 525 // Byte 8: CRC_A
OsmanKameric 0:b416214256cd 526 // The BCC and CRC_A is only transmitted if we know all the UID bits of the current Cascade Level.
OsmanKameric 0:b416214256cd 527 //
OsmanKameric 0:b416214256cd 528 // Description of bytes 2-5: (Section 6.5.4 of the ISO/IEC 14443-3 draft: UID contents and cascade levels)
OsmanKameric 0:b416214256cd 529 // UID size Cascade level Byte2 Byte3 Byte4 Byte5
OsmanKameric 0:b416214256cd 530 // ======== ============= ===== ===== ===== =====
OsmanKameric 0:b416214256cd 531 // 4 bytes 1 uid0 uid1 uid2 uid3
OsmanKameric 0:b416214256cd 532 // 7 bytes 1 CT uid0 uid1 uid2
OsmanKameric 0:b416214256cd 533 // 2 uid3 uid4 uid5 uid6
OsmanKameric 0:b416214256cd 534 // 10 bytes 1 CT uid0 uid1 uid2
OsmanKameric 0:b416214256cd 535 // 2 CT uid3 uid4 uid5
OsmanKameric 0:b416214256cd 536 // 3 uid6 uid7 uid8 uid9
OsmanKameric 0:b416214256cd 537
OsmanKameric 0:b416214256cd 538 // Sanity checks
OsmanKameric 0:b416214256cd 539 if (validBits > 80)
OsmanKameric 0:b416214256cd 540 {
OsmanKameric 0:b416214256cd 541 return STATUS_INVALID;
OsmanKameric 0:b416214256cd 542 }
OsmanKameric 0:b416214256cd 543
OsmanKameric 0:b416214256cd 544 // Prepare MFRC522
OsmanKameric 0:b416214256cd 545 // ValuesAfterColl=1 => Bits received after collision are cleared.
OsmanKameric 0:b416214256cd 546 PCD_ClrRegisterBits(CollReg, 0x80);
OsmanKameric 0:b416214256cd 547
OsmanKameric 0:b416214256cd 548 // Repeat Cascade Level loop until we have a complete UID.
OsmanKameric 0:b416214256cd 549 uidComplete = false;
OsmanKameric 0:b416214256cd 550 while ( ! uidComplete)
OsmanKameric 0:b416214256cd 551 {
OsmanKameric 0:b416214256cd 552 // Set the Cascade Level in the SEL byte, find out if we need to use the Cascade Tag in byte 2.
OsmanKameric 0:b416214256cd 553 switch (cascadeLevel)
OsmanKameric 0:b416214256cd 554 {
OsmanKameric 0:b416214256cd 555 case 1:
OsmanKameric 0:b416214256cd 556 buffer[0] = PICC_CMD_SEL_CL1;
OsmanKameric 0:b416214256cd 557 uidIndex = 0;
OsmanKameric 0:b416214256cd 558 useCascadeTag = validBits && (uid->size > 4); // When we know that the UID has more than 4 bytes
OsmanKameric 0:b416214256cd 559 break;
OsmanKameric 0:b416214256cd 560
OsmanKameric 0:b416214256cd 561 case 2:
OsmanKameric 0:b416214256cd 562 buffer[0] = PICC_CMD_SEL_CL2;
OsmanKameric 0:b416214256cd 563 uidIndex = 3;
OsmanKameric 0:b416214256cd 564 useCascadeTag = validBits && (uid->size > 7); // When we know that the UID has more than 7 bytes
OsmanKameric 0:b416214256cd 565 break;
OsmanKameric 0:b416214256cd 566
OsmanKameric 0:b416214256cd 567 case 3:
OsmanKameric 0:b416214256cd 568 buffer[0] = PICC_CMD_SEL_CL3;
OsmanKameric 0:b416214256cd 569 uidIndex = 6;
OsmanKameric 0:b416214256cd 570 useCascadeTag = false; // Never used in CL3.
OsmanKameric 0:b416214256cd 571 break;
OsmanKameric 0:b416214256cd 572
OsmanKameric 0:b416214256cd 573 default:
OsmanKameric 0:b416214256cd 574 return STATUS_INTERNAL_ERROR;
OsmanKameric 0:b416214256cd 575 //break;
OsmanKameric 0:b416214256cd 576 }
OsmanKameric 0:b416214256cd 577
OsmanKameric 0:b416214256cd 578 // How many UID bits are known in this Cascade Level?
OsmanKameric 0:b416214256cd 579 if(validBits > (8 * uidIndex))
OsmanKameric 0:b416214256cd 580 {
OsmanKameric 0:b416214256cd 581 currentLevelKnownBits = validBits - (8 * uidIndex);
OsmanKameric 0:b416214256cd 582 }
OsmanKameric 0:b416214256cd 583 else
OsmanKameric 0:b416214256cd 584 {
OsmanKameric 0:b416214256cd 585 currentLevelKnownBits = 0;
OsmanKameric 0:b416214256cd 586 }
OsmanKameric 0:b416214256cd 587
OsmanKameric 0:b416214256cd 588 // Copy the known bits from uid->uidByte[] to buffer[]
OsmanKameric 0:b416214256cd 589 index = 2; // destination index in buffer[]
OsmanKameric 0:b416214256cd 590 if (useCascadeTag)
OsmanKameric 0:b416214256cd 591 {
OsmanKameric 0:b416214256cd 592 buffer[index++] = PICC_CMD_CT;
OsmanKameric 0:b416214256cd 593 }
OsmanKameric 0:b416214256cd 594
OsmanKameric 0:b416214256cd 595 uint8_t bytesToCopy = currentLevelKnownBits / 8 + (currentLevelKnownBits % 8 ? 1 : 0); // The number of bytes needed to represent the known bits for this level.
OsmanKameric 0:b416214256cd 596 if (bytesToCopy)
OsmanKameric 0:b416214256cd 597 {
OsmanKameric 0:b416214256cd 598 // Max 4 bytes in each Cascade Level. Only 3 left if we use the Cascade Tag
OsmanKameric 0:b416214256cd 599 uint8_t maxBytes = useCascadeTag ? 3 : 4;
OsmanKameric 0:b416214256cd 600 if (bytesToCopy > maxBytes)
OsmanKameric 0:b416214256cd 601 {
OsmanKameric 0:b416214256cd 602 bytesToCopy = maxBytes;
OsmanKameric 0:b416214256cd 603 }
OsmanKameric 0:b416214256cd 604
OsmanKameric 0:b416214256cd 605 for (count = 0; count < bytesToCopy; count++)
OsmanKameric 0:b416214256cd 606 {
OsmanKameric 0:b416214256cd 607 buffer[index++] = uid->uidByte[uidIndex + count];
OsmanKameric 0:b416214256cd 608 }
OsmanKameric 0:b416214256cd 609 }
OsmanKameric 0:b416214256cd 610
OsmanKameric 0:b416214256cd 611 // Now that the data has been copied we need to include the 8 bits in CT in currentLevelKnownBits
OsmanKameric 0:b416214256cd 612 if (useCascadeTag)
OsmanKameric 0:b416214256cd 613 {
OsmanKameric 0:b416214256cd 614 currentLevelKnownBits += 8;
OsmanKameric 0:b416214256cd 615 }
OsmanKameric 0:b416214256cd 616
OsmanKameric 0:b416214256cd 617 // Repeat anti collision loop until we can transmit all UID bits + BCC and receive a SAK - max 32 iterations.
OsmanKameric 0:b416214256cd 618 selectDone = false;
OsmanKameric 0:b416214256cd 619 while ( ! selectDone)
OsmanKameric 0:b416214256cd 620 {
OsmanKameric 0:b416214256cd 621 // Find out how many bits and bytes to send and receive.
OsmanKameric 0:b416214256cd 622 if (currentLevelKnownBits >= 32)
OsmanKameric 0:b416214256cd 623 { // All UID bits in this Cascade Level are known. This is a SELECT.
OsmanKameric 0:b416214256cd 624 //Serial.print("SELECT: currentLevelKnownBits="); Serial.println(currentLevelKnownBits, DEC);
OsmanKameric 0:b416214256cd 625 buffer[1] = 0x70; // NVB - Number of Valid Bits: Seven whole bytes
OsmanKameric 0:b416214256cd 626
OsmanKameric 0:b416214256cd 627 // Calulate BCC - Block Check Character
OsmanKameric 0:b416214256cd 628 buffer[6] = buffer[2] ^ buffer[3] ^ buffer[4] ^ buffer[5];
OsmanKameric 0:b416214256cd 629
OsmanKameric 0:b416214256cd 630 // Calculate CRC_A
OsmanKameric 0:b416214256cd 631 result = PCD_CalculateCRC(buffer, 7, &buffer[7]);
OsmanKameric 0:b416214256cd 632 if (result != STATUS_OK)
OsmanKameric 0:b416214256cd 633 {
OsmanKameric 0:b416214256cd 634 return result;
OsmanKameric 0:b416214256cd 635 }
OsmanKameric 0:b416214256cd 636
OsmanKameric 0:b416214256cd 637 txLastBits = 0; // 0 => All 8 bits are valid.
OsmanKameric 0:b416214256cd 638 bufferUsed = 9;
OsmanKameric 0:b416214256cd 639
OsmanKameric 0:b416214256cd 640 // Store response in the last 3 bytes of buffer (BCC and CRC_A - not needed after tx)
OsmanKameric 0:b416214256cd 641 responseBuffer = &buffer[6];
OsmanKameric 0:b416214256cd 642 responseLength = 3;
OsmanKameric 0:b416214256cd 643 }
OsmanKameric 0:b416214256cd 644 else
OsmanKameric 0:b416214256cd 645 { // This is an ANTICOLLISION.
OsmanKameric 0:b416214256cd 646 //Serial.print("ANTICOLLISION: currentLevelKnownBits="); Serial.println(currentLevelKnownBits, DEC);
OsmanKameric 0:b416214256cd 647 txLastBits = currentLevelKnownBits % 8;
OsmanKameric 0:b416214256cd 648 count = currentLevelKnownBits / 8; // Number of whole bytes in the UID part.
OsmanKameric 0:b416214256cd 649 index = 2 + count; // Number of whole bytes: SEL + NVB + UIDs
OsmanKameric 0:b416214256cd 650 buffer[1] = (index << 4) + txLastBits; // NVB - Number of Valid Bits
OsmanKameric 0:b416214256cd 651 bufferUsed = index + (txLastBits ? 1 : 0);
OsmanKameric 0:b416214256cd 652
OsmanKameric 0:b416214256cd 653 // Store response in the unused part of buffer
OsmanKameric 0:b416214256cd 654 responseBuffer = &buffer[index];
OsmanKameric 0:b416214256cd 655 responseLength = sizeof(buffer) - index;
OsmanKameric 0:b416214256cd 656 }
OsmanKameric 0:b416214256cd 657
OsmanKameric 0:b416214256cd 658 // Set bit adjustments
OsmanKameric 0:b416214256cd 659 rxAlign = txLastBits; // Having a seperate variable is overkill. But it makes the next line easier to read.
OsmanKameric 0:b416214256cd 660 PCD_WriteRegister(BitFramingReg, (rxAlign << 4) + txLastBits); // RxAlign = BitFramingReg[6..4]. TxLastBits = BitFramingReg[2..0]
OsmanKameric 0:b416214256cd 661
OsmanKameric 0:b416214256cd 662 // Transmit the buffer and receive the response.
OsmanKameric 0:b416214256cd 663 result = PCD_TransceiveData(buffer, bufferUsed, responseBuffer, &responseLength, &txLastBits, rxAlign);
OsmanKameric 0:b416214256cd 664 if (result == STATUS_COLLISION)
OsmanKameric 0:b416214256cd 665 { // More than one PICC in the field => collision.
OsmanKameric 0:b416214256cd 666 result = PCD_ReadRegister(CollReg); // CollReg[7..0] bits are: ValuesAfterColl reserved CollPosNotValid CollPos[4:0]
OsmanKameric 0:b416214256cd 667 if (result & 0x20)
OsmanKameric 0:b416214256cd 668 { // CollPosNotValid
OsmanKameric 0:b416214256cd 669 return STATUS_COLLISION; // Without a valid collision position we cannot continue
OsmanKameric 0:b416214256cd 670 }
OsmanKameric 0:b416214256cd 671
OsmanKameric 0:b416214256cd 672 uint8_t collisionPos = result & 0x1F; // Values 0-31, 0 means bit 32.
OsmanKameric 0:b416214256cd 673 if (collisionPos == 0)
OsmanKameric 0:b416214256cd 674 {
OsmanKameric 0:b416214256cd 675 collisionPos = 32;
OsmanKameric 0:b416214256cd 676 }
OsmanKameric 0:b416214256cd 677
OsmanKameric 0:b416214256cd 678 if (collisionPos <= currentLevelKnownBits)
OsmanKameric 0:b416214256cd 679 { // No progress - should not happen
OsmanKameric 0:b416214256cd 680 return STATUS_INTERNAL_ERROR;
OsmanKameric 0:b416214256cd 681 }
OsmanKameric 0:b416214256cd 682
OsmanKameric 0:b416214256cd 683 // Choose the PICC with the bit set.
OsmanKameric 0:b416214256cd 684 currentLevelKnownBits = collisionPos;
OsmanKameric 0:b416214256cd 685 count = (currentLevelKnownBits - 1) % 8; // The bit to modify
OsmanKameric 0:b416214256cd 686 index = 1 + (currentLevelKnownBits / 8) + (count ? 1 : 0); // First byte is index 0.
OsmanKameric 0:b416214256cd 687 buffer[index] |= (1 << count);
OsmanKameric 0:b416214256cd 688 }
OsmanKameric 0:b416214256cd 689 else if (result != STATUS_OK)
OsmanKameric 0:b416214256cd 690 {
OsmanKameric 0:b416214256cd 691 return result;
OsmanKameric 0:b416214256cd 692 }
OsmanKameric 0:b416214256cd 693 else
OsmanKameric 0:b416214256cd 694 { // STATUS_OK
OsmanKameric 0:b416214256cd 695 if (currentLevelKnownBits >= 32)
OsmanKameric 0:b416214256cd 696 { // This was a SELECT.
OsmanKameric 0:b416214256cd 697 selectDone = true; // No more anticollision
OsmanKameric 0:b416214256cd 698 // We continue below outside the while.
OsmanKameric 0:b416214256cd 699 }
OsmanKameric 0:b416214256cd 700 else
OsmanKameric 0:b416214256cd 701 { // This was an ANTICOLLISION.
OsmanKameric 0:b416214256cd 702 // We now have all 32 bits of the UID in this Cascade Level
OsmanKameric 0:b416214256cd 703 currentLevelKnownBits = 32;
OsmanKameric 0:b416214256cd 704 // Run loop again to do the SELECT.
OsmanKameric 0:b416214256cd 705 }
OsmanKameric 0:b416214256cd 706 }
OsmanKameric 0:b416214256cd 707 } // End of while ( ! selectDone)
OsmanKameric 0:b416214256cd 708
OsmanKameric 0:b416214256cd 709 // We do not check the CBB - it was constructed by us above.
OsmanKameric 0:b416214256cd 710
OsmanKameric 0:b416214256cd 711 // Copy the found UID bytes from buffer[] to uid->uidByte[]
OsmanKameric 0:b416214256cd 712 index = (buffer[2] == PICC_CMD_CT) ? 3 : 2; // source index in buffer[]
OsmanKameric 0:b416214256cd 713 bytesToCopy = (buffer[2] == PICC_CMD_CT) ? 3 : 4;
OsmanKameric 0:b416214256cd 714 for (count = 0; count < bytesToCopy; count++)
OsmanKameric 0:b416214256cd 715 {
OsmanKameric 0:b416214256cd 716 uid->uidByte[uidIndex + count] = buffer[index++];
OsmanKameric 0:b416214256cd 717 }
OsmanKameric 0:b416214256cd 718
OsmanKameric 0:b416214256cd 719 // Check response SAK (Select Acknowledge)
OsmanKameric 0:b416214256cd 720 if (responseLength != 3 || txLastBits != 0)
OsmanKameric 0:b416214256cd 721 { // SAK must be exactly 24 bits (1 byte + CRC_A).
OsmanKameric 0:b416214256cd 722 return STATUS_ERROR;
OsmanKameric 0:b416214256cd 723 }
OsmanKameric 0:b416214256cd 724
OsmanKameric 0:b416214256cd 725 // Verify CRC_A - do our own calculation and store the control in buffer[2..3] - those bytes are not needed anymore.
OsmanKameric 0:b416214256cd 726 result = PCD_CalculateCRC(responseBuffer, 1, &buffer[2]);
OsmanKameric 0:b416214256cd 727 if (result != STATUS_OK)
OsmanKameric 0:b416214256cd 728 {
OsmanKameric 0:b416214256cd 729 return result;
OsmanKameric 0:b416214256cd 730 }
OsmanKameric 0:b416214256cd 731
OsmanKameric 0:b416214256cd 732 if ((buffer[2] != responseBuffer[1]) || (buffer[3] != responseBuffer[2]))
OsmanKameric 0:b416214256cd 733 {
OsmanKameric 0:b416214256cd 734 return STATUS_CRC_WRONG;
OsmanKameric 0:b416214256cd 735 }
OsmanKameric 0:b416214256cd 736
OsmanKameric 0:b416214256cd 737 if (responseBuffer[0] & 0x04)
OsmanKameric 0:b416214256cd 738 { // Cascade bit set - UID not complete yes
OsmanKameric 0:b416214256cd 739 cascadeLevel++;
OsmanKameric 0:b416214256cd 740 }
OsmanKameric 0:b416214256cd 741 else
OsmanKameric 0:b416214256cd 742 {
OsmanKameric 0:b416214256cd 743 uidComplete = true;
OsmanKameric 0:b416214256cd 744 uid->sak = responseBuffer[0];
OsmanKameric 0:b416214256cd 745 }
OsmanKameric 0:b416214256cd 746 } // End of while ( ! uidComplete)
OsmanKameric 0:b416214256cd 747
OsmanKameric 0:b416214256cd 748 // Set correct uid->size
OsmanKameric 0:b416214256cd 749 uid->size = 3 * cascadeLevel + 1;
OsmanKameric 0:b416214256cd 750
OsmanKameric 0:b416214256cd 751 return STATUS_OK;
OsmanKameric 0:b416214256cd 752 } // End PICC_Select()
OsmanKameric 0:b416214256cd 753
OsmanKameric 0:b416214256cd 754 /*
OsmanKameric 0:b416214256cd 755 * Instructs a PICC in state ACTIVE(*) to go to state HALT.
OsmanKameric 0:b416214256cd 756 */
OsmanKameric 0:b416214256cd 757 uint8_t MFRC522::PICC_HaltA()
OsmanKameric 0:b416214256cd 758 {
OsmanKameric 0:b416214256cd 759 uint8_t result;
OsmanKameric 0:b416214256cd 760 uint8_t buffer[4];
OsmanKameric 0:b416214256cd 761
OsmanKameric 0:b416214256cd 762 // Build command buffer
OsmanKameric 0:b416214256cd 763 buffer[0] = PICC_CMD_HLTA;
OsmanKameric 0:b416214256cd 764 buffer[1] = 0;
OsmanKameric 0:b416214256cd 765
OsmanKameric 0:b416214256cd 766 // Calculate CRC_A
OsmanKameric 0:b416214256cd 767 result = PCD_CalculateCRC(buffer, 2, &buffer[2]);
OsmanKameric 0:b416214256cd 768 if (result == STATUS_OK)
OsmanKameric 0:b416214256cd 769 {
OsmanKameric 0:b416214256cd 770 // Send the command.
OsmanKameric 0:b416214256cd 771 // The standard says:
OsmanKameric 0:b416214256cd 772 // If the PICC responds with any modulation during a period of 1 ms after the end of the frame containing the
OsmanKameric 0:b416214256cd 773 // HLTA command, this response shall be interpreted as 'not acknowledge'.
OsmanKameric 0:b416214256cd 774 // We interpret that this way: Only STATUS_TIMEOUT is an success.
OsmanKameric 0:b416214256cd 775 result = PCD_TransceiveData(buffer, sizeof(buffer), NULL, 0);
OsmanKameric 0:b416214256cd 776 if (result == STATUS_TIMEOUT)
OsmanKameric 0:b416214256cd 777 {
OsmanKameric 0:b416214256cd 778 result = STATUS_OK;
OsmanKameric 0:b416214256cd 779 }
OsmanKameric 0:b416214256cd 780 else if (result == STATUS_OK)
OsmanKameric 0:b416214256cd 781 { // That is ironically NOT ok in this case ;-)
OsmanKameric 0:b416214256cd 782 result = STATUS_ERROR;
OsmanKameric 0:b416214256cd 783 }
OsmanKameric 0:b416214256cd 784 }
OsmanKameric 0:b416214256cd 785
OsmanKameric 0:b416214256cd 786 return result;
OsmanKameric 0:b416214256cd 787 } // End PICC_HaltA()
OsmanKameric 0:b416214256cd 788
OsmanKameric 0:b416214256cd 789
OsmanKameric 0:b416214256cd 790 /////////////////////////////////////////////////////////////////////////////////////
OsmanKameric 0:b416214256cd 791 // Functions for communicating with MIFARE PICCs
OsmanKameric 0:b416214256cd 792 /////////////////////////////////////////////////////////////////////////////////////
OsmanKameric 0:b416214256cd 793
OsmanKameric 0:b416214256cd 794 /*
OsmanKameric 0:b416214256cd 795 * Executes the MFRC522 MFAuthent command.
OsmanKameric 0:b416214256cd 796 */
OsmanKameric 0:b416214256cd 797 uint8_t MFRC522::PCD_Authenticate(uint8_t command, uint8_t blockAddr, MIFARE_Key *key, Uid *uid)
OsmanKameric 0:b416214256cd 798 {
OsmanKameric 0:b416214256cd 799 uint8_t i, waitIRq = 0x10; // IdleIRq
OsmanKameric 0:b416214256cd 800
OsmanKameric 0:b416214256cd 801 // Build command buffer
OsmanKameric 0:b416214256cd 802 uint8_t sendData[12];
OsmanKameric 0:b416214256cd 803 sendData[0] = command;
OsmanKameric 0:b416214256cd 804 sendData[1] = blockAddr;
OsmanKameric 0:b416214256cd 805
OsmanKameric 0:b416214256cd 806 for (i = 0; i < MF_KEY_SIZE; i++)
OsmanKameric 0:b416214256cd 807 { // 6 key bytes
OsmanKameric 0:b416214256cd 808 sendData[2+i] = key->keyByte[i];
OsmanKameric 0:b416214256cd 809 }
OsmanKameric 0:b416214256cd 810
OsmanKameric 0:b416214256cd 811 for (i = 0; i < 4; i++)
OsmanKameric 0:b416214256cd 812 { // The first 4 bytes of the UID
OsmanKameric 0:b416214256cd 813 sendData[8+i] = uid->uidByte[i];
OsmanKameric 0:b416214256cd 814 }
OsmanKameric 0:b416214256cd 815
OsmanKameric 0:b416214256cd 816 // Start the authentication.
OsmanKameric 0:b416214256cd 817 return PCD_CommunicateWithPICC(PCD_MFAuthent, waitIRq, &sendData[0], sizeof(sendData));
OsmanKameric 0:b416214256cd 818 } // End PCD_Authenticate()
OsmanKameric 0:b416214256cd 819
OsmanKameric 0:b416214256cd 820 /*
OsmanKameric 0:b416214256cd 821 * Used to exit the PCD from its authenticated state.
OsmanKameric 0:b416214256cd 822 * Remember to call this function after communicating with an authenticated PICC - otherwise no new communications can start.
OsmanKameric 0:b416214256cd 823 */
OsmanKameric 0:b416214256cd 824 void MFRC522::PCD_StopCrypto1()
OsmanKameric 0:b416214256cd 825 {
OsmanKameric 0:b416214256cd 826 // Clear MFCrypto1On bit
OsmanKameric 0:b416214256cd 827 PCD_ClrRegisterBits(Status2Reg, 0x08); // Status2Reg[7..0] bits are: TempSensClear I2CForceHS reserved reserved MFCrypto1On ModemState[2:0]
OsmanKameric 0:b416214256cd 828 } // End PCD_StopCrypto1()
OsmanKameric 0:b416214256cd 829
OsmanKameric 0:b416214256cd 830 /*
OsmanKameric 0:b416214256cd 831 * Reads 16 bytes (+ 2 bytes CRC_A) from the active PICC.
OsmanKameric 0:b416214256cd 832 */
OsmanKameric 0:b416214256cd 833 uint8_t MFRC522::MIFARE_Read(uint8_t blockAddr, uint8_t *buffer, uint8_t *bufferSize)
OsmanKameric 0:b416214256cd 834 {
OsmanKameric 0:b416214256cd 835 uint8_t result = STATUS_NO_ROOM;
OsmanKameric 0:b416214256cd 836
OsmanKameric 0:b416214256cd 837 // Sanity check
OsmanKameric 0:b416214256cd 838 if ((buffer == NULL) || (*bufferSize < 18))
OsmanKameric 0:b416214256cd 839 {
OsmanKameric 0:b416214256cd 840 return result;
OsmanKameric 0:b416214256cd 841 }
OsmanKameric 0:b416214256cd 842
OsmanKameric 0:b416214256cd 843 // Build command buffer
OsmanKameric 0:b416214256cd 844 buffer[0] = PICC_CMD_MF_READ;
OsmanKameric 0:b416214256cd 845 buffer[1] = blockAddr;
OsmanKameric 0:b416214256cd 846
OsmanKameric 0:b416214256cd 847 // Calculate CRC_A
OsmanKameric 0:b416214256cd 848 result = PCD_CalculateCRC(buffer, 2, &buffer[2]);
OsmanKameric 0:b416214256cd 849 if (result != STATUS_OK)
OsmanKameric 0:b416214256cd 850 {
OsmanKameric 0:b416214256cd 851 return result;
OsmanKameric 0:b416214256cd 852 }
OsmanKameric 0:b416214256cd 853
OsmanKameric 0:b416214256cd 854 // Transmit the buffer and receive the response, validate CRC_A.
OsmanKameric 0:b416214256cd 855 return PCD_TransceiveData(buffer, 4, buffer, bufferSize, NULL, 0, true);
OsmanKameric 0:b416214256cd 856 } // End MIFARE_Read()
OsmanKameric 0:b416214256cd 857
OsmanKameric 0:b416214256cd 858 /*
OsmanKameric 0:b416214256cd 859 * Writes 16 bytes to the active PICC.
OsmanKameric 0:b416214256cd 860 */
OsmanKameric 0:b416214256cd 861 uint8_t MFRC522::MIFARE_Write(uint8_t blockAddr, uint8_t *buffer, uint8_t bufferSize)
OsmanKameric 0:b416214256cd 862 {
OsmanKameric 0:b416214256cd 863 uint8_t result;
OsmanKameric 0:b416214256cd 864
OsmanKameric 0:b416214256cd 865 // Sanity check
OsmanKameric 0:b416214256cd 866 if (buffer == NULL || bufferSize < 16)
OsmanKameric 0:b416214256cd 867 {
OsmanKameric 0:b416214256cd 868 return STATUS_INVALID;
OsmanKameric 0:b416214256cd 869 }
OsmanKameric 0:b416214256cd 870
OsmanKameric 0:b416214256cd 871 // Mifare Classic protocol requires two communications to perform a write.
OsmanKameric 0:b416214256cd 872 // Step 1: Tell the PICC we want to write to block blockAddr.
OsmanKameric 0:b416214256cd 873 uint8_t cmdBuffer[2];
OsmanKameric 0:b416214256cd 874 cmdBuffer[0] = PICC_CMD_MF_WRITE;
OsmanKameric 0:b416214256cd 875 cmdBuffer[1] = blockAddr;
OsmanKameric 0:b416214256cd 876 // Adds CRC_A and checks that the response is MF_ACK.
OsmanKameric 0:b416214256cd 877 result = PCD_MIFARE_Transceive(cmdBuffer, 2);
OsmanKameric 0:b416214256cd 878 if (result != STATUS_OK)
OsmanKameric 0:b416214256cd 879 {
OsmanKameric 0:b416214256cd 880 return result;
OsmanKameric 0:b416214256cd 881 }
OsmanKameric 0:b416214256cd 882
OsmanKameric 0:b416214256cd 883 // Step 2: Transfer the data
OsmanKameric 0:b416214256cd 884 // Adds CRC_A and checks that the response is MF_ACK.
OsmanKameric 0:b416214256cd 885 result = PCD_MIFARE_Transceive(buffer, bufferSize);
OsmanKameric 0:b416214256cd 886 if (result != STATUS_OK)
OsmanKameric 0:b416214256cd 887 {
OsmanKameric 0:b416214256cd 888 return result;
OsmanKameric 0:b416214256cd 889 }
OsmanKameric 0:b416214256cd 890
OsmanKameric 0:b416214256cd 891 return STATUS_OK;
OsmanKameric 0:b416214256cd 892 } // End MIFARE_Write()
OsmanKameric 0:b416214256cd 893
OsmanKameric 0:b416214256cd 894 /*
OsmanKameric 0:b416214256cd 895 * Writes a 4 byte page to the active MIFARE Ultralight PICC.
OsmanKameric 0:b416214256cd 896 */
OsmanKameric 0:b416214256cd 897 uint8_t MFRC522::MIFARE_UltralightWrite(uint8_t page, uint8_t *buffer, uint8_t bufferSize)
OsmanKameric 0:b416214256cd 898 {
OsmanKameric 0:b416214256cd 899 uint8_t result;
OsmanKameric 0:b416214256cd 900
OsmanKameric 0:b416214256cd 901 // Sanity check
OsmanKameric 0:b416214256cd 902 if (buffer == NULL || bufferSize < 4)
OsmanKameric 0:b416214256cd 903 {
OsmanKameric 0:b416214256cd 904 return STATUS_INVALID;
OsmanKameric 0:b416214256cd 905 }
OsmanKameric 0:b416214256cd 906
OsmanKameric 0:b416214256cd 907 // Build commmand buffer
OsmanKameric 0:b416214256cd 908 uint8_t cmdBuffer[6];
OsmanKameric 0:b416214256cd 909 cmdBuffer[0] = PICC_CMD_UL_WRITE;
OsmanKameric 0:b416214256cd 910 cmdBuffer[1] = page;
OsmanKameric 0:b416214256cd 911 memcpy(&cmdBuffer[2], buffer, 4);
OsmanKameric 0:b416214256cd 912
OsmanKameric 0:b416214256cd 913 // Perform the write
OsmanKameric 0:b416214256cd 914 result = PCD_MIFARE_Transceive(cmdBuffer, 6); // Adds CRC_A and checks that the response is MF_ACK.
OsmanKameric 0:b416214256cd 915 if (result != STATUS_OK)
OsmanKameric 0:b416214256cd 916 {
OsmanKameric 0:b416214256cd 917 return result;
OsmanKameric 0:b416214256cd 918 }
OsmanKameric 0:b416214256cd 919
OsmanKameric 0:b416214256cd 920 return STATUS_OK;
OsmanKameric 0:b416214256cd 921 } // End MIFARE_Ultralight_Write()
OsmanKameric 0:b416214256cd 922
OsmanKameric 0:b416214256cd 923 /*
OsmanKameric 0:b416214256cd 924 * MIFARE Decrement subtracts the delta from the value of the addressed block, and stores the result in a volatile memory.
OsmanKameric 0:b416214256cd 925 */
OsmanKameric 0:b416214256cd 926 uint8_t MFRC522::MIFARE_Decrement(uint8_t blockAddr, uint32_t delta)
OsmanKameric 0:b416214256cd 927 {
OsmanKameric 0:b416214256cd 928 return MIFARE_TwoStepHelper(PICC_CMD_MF_DECREMENT, blockAddr, delta);
OsmanKameric 0:b416214256cd 929 } // End MIFARE_Decrement()
OsmanKameric 0:b416214256cd 930
OsmanKameric 0:b416214256cd 931 /*
OsmanKameric 0:b416214256cd 932 * MIFARE Increment adds the delta to the value of the addressed block, and stores the result in a volatile memory.
OsmanKameric 0:b416214256cd 933 */
OsmanKameric 0:b416214256cd 934 uint8_t MFRC522::MIFARE_Increment(uint8_t blockAddr, uint32_t delta)
OsmanKameric 0:b416214256cd 935 {
OsmanKameric 0:b416214256cd 936 return MIFARE_TwoStepHelper(PICC_CMD_MF_INCREMENT, blockAddr, delta);
OsmanKameric 0:b416214256cd 937 } // End MIFARE_Increment()
OsmanKameric 0:b416214256cd 938
OsmanKameric 0:b416214256cd 939 /**
OsmanKameric 0:b416214256cd 940 * MIFARE Restore copies the value of the addressed block into a volatile memory.
OsmanKameric 0:b416214256cd 941 */
OsmanKameric 0:b416214256cd 942 uint8_t MFRC522::MIFARE_Restore(uint8_t blockAddr)
OsmanKameric 0:b416214256cd 943 {
OsmanKameric 0:b416214256cd 944 // The datasheet describes Restore as a two step operation, but does not explain what data to transfer in step 2.
OsmanKameric 0:b416214256cd 945 // Doing only a single step does not work, so I chose to transfer 0L in step two.
OsmanKameric 0:b416214256cd 946 return MIFARE_TwoStepHelper(PICC_CMD_MF_RESTORE, blockAddr, 0L);
OsmanKameric 0:b416214256cd 947 } // End MIFARE_Restore()
OsmanKameric 0:b416214256cd 948
OsmanKameric 0:b416214256cd 949 /*
OsmanKameric 0:b416214256cd 950 * Helper function for the two-step MIFARE Classic protocol operations Decrement, Increment and Restore.
OsmanKameric 0:b416214256cd 951 */
OsmanKameric 0:b416214256cd 952 uint8_t MFRC522::MIFARE_TwoStepHelper(uint8_t command, uint8_t blockAddr, uint32_t data)
OsmanKameric 0:b416214256cd 953 {
OsmanKameric 0:b416214256cd 954 uint8_t result;
OsmanKameric 0:b416214256cd 955 uint8_t cmdBuffer[2]; // We only need room for 2 bytes.
OsmanKameric 0:b416214256cd 956
OsmanKameric 0:b416214256cd 957 // Step 1: Tell the PICC the command and block address
OsmanKameric 0:b416214256cd 958 cmdBuffer[0] = command;
OsmanKameric 0:b416214256cd 959 cmdBuffer[1] = blockAddr;
OsmanKameric 0:b416214256cd 960
OsmanKameric 0:b416214256cd 961 // Adds CRC_A and checks that the response is MF_ACK.
OsmanKameric 0:b416214256cd 962 result = PCD_MIFARE_Transceive(cmdBuffer, 2);
OsmanKameric 0:b416214256cd 963 if (result != STATUS_OK)
OsmanKameric 0:b416214256cd 964 {
OsmanKameric 0:b416214256cd 965 return result;
OsmanKameric 0:b416214256cd 966 }
OsmanKameric 0:b416214256cd 967
OsmanKameric 0:b416214256cd 968 // Step 2: Transfer the data
OsmanKameric 0:b416214256cd 969 // Adds CRC_A and accept timeout as success.
OsmanKameric 0:b416214256cd 970 result = PCD_MIFARE_Transceive((uint8_t *) &data, 4, true);
OsmanKameric 0:b416214256cd 971 if (result != STATUS_OK)
OsmanKameric 0:b416214256cd 972 {
OsmanKameric 0:b416214256cd 973 return result;
OsmanKameric 0:b416214256cd 974 }
OsmanKameric 0:b416214256cd 975
OsmanKameric 0:b416214256cd 976 return STATUS_OK;
OsmanKameric 0:b416214256cd 977 } // End MIFARE_TwoStepHelper()
OsmanKameric 0:b416214256cd 978
OsmanKameric 0:b416214256cd 979 /*
OsmanKameric 0:b416214256cd 980 * MIFARE Transfer writes the value stored in the volatile memory into one MIFARE Classic block.
OsmanKameric 0:b416214256cd 981 */
OsmanKameric 0:b416214256cd 982 uint8_t MFRC522::MIFARE_Transfer(uint8_t blockAddr)
OsmanKameric 0:b416214256cd 983 {
OsmanKameric 0:b416214256cd 984 uint8_t cmdBuffer[2]; // We only need room for 2 bytes.
OsmanKameric 0:b416214256cd 985
OsmanKameric 0:b416214256cd 986 // Tell the PICC we want to transfer the result into block blockAddr.
OsmanKameric 0:b416214256cd 987 cmdBuffer[0] = PICC_CMD_MF_TRANSFER;
OsmanKameric 0:b416214256cd 988 cmdBuffer[1] = blockAddr;
OsmanKameric 0:b416214256cd 989
OsmanKameric 0:b416214256cd 990 // Adds CRC_A and checks that the response is MF_ACK.
OsmanKameric 0:b416214256cd 991 return PCD_MIFARE_Transceive(cmdBuffer, 2);
OsmanKameric 0:b416214256cd 992 } // End MIFARE_Transfer()
OsmanKameric 0:b416214256cd 993
OsmanKameric 0:b416214256cd 994
OsmanKameric 0:b416214256cd 995 /////////////////////////////////////////////////////////////////////////////////////
OsmanKameric 0:b416214256cd 996 // Support functions
OsmanKameric 0:b416214256cd 997 /////////////////////////////////////////////////////////////////////////////////////
OsmanKameric 0:b416214256cd 998
OsmanKameric 0:b416214256cd 999 /*
OsmanKameric 0:b416214256cd 1000 * Wrapper for MIFARE protocol communication.
OsmanKameric 0:b416214256cd 1001 * Adds CRC_A, executes the Transceive command and checks that the response is MF_ACK or a timeout.
OsmanKameric 0:b416214256cd 1002 */
OsmanKameric 0:b416214256cd 1003 uint8_t MFRC522::PCD_MIFARE_Transceive(uint8_t *sendData, uint8_t sendLen, bool acceptTimeout)
OsmanKameric 0:b416214256cd 1004 {
OsmanKameric 0:b416214256cd 1005 uint8_t result;
OsmanKameric 0:b416214256cd 1006 uint8_t cmdBuffer[18]; // We need room for 16 bytes data and 2 bytes CRC_A.
OsmanKameric 0:b416214256cd 1007
OsmanKameric 0:b416214256cd 1008 // Sanity check
OsmanKameric 0:b416214256cd 1009 if (sendData == NULL || sendLen > 16)
OsmanKameric 0:b416214256cd 1010 {
OsmanKameric 0:b416214256cd 1011 return STATUS_INVALID;
OsmanKameric 0:b416214256cd 1012 }
OsmanKameric 0:b416214256cd 1013
OsmanKameric 0:b416214256cd 1014 // Copy sendData[] to cmdBuffer[] and add CRC_A
OsmanKameric 0:b416214256cd 1015 memcpy(cmdBuffer, sendData, sendLen);
OsmanKameric 0:b416214256cd 1016 result = PCD_CalculateCRC(cmdBuffer, sendLen, &cmdBuffer[sendLen]);
OsmanKameric 0:b416214256cd 1017 if (result != STATUS_OK)
OsmanKameric 0:b416214256cd 1018 {
OsmanKameric 0:b416214256cd 1019 return result;
OsmanKameric 0:b416214256cd 1020 }
OsmanKameric 0:b416214256cd 1021
OsmanKameric 0:b416214256cd 1022 sendLen += 2;
OsmanKameric 0:b416214256cd 1023
OsmanKameric 0:b416214256cd 1024 // Transceive the data, store the reply in cmdBuffer[]
OsmanKameric 0:b416214256cd 1025 uint8_t waitIRq = 0x30; // RxIRq and IdleIRq
OsmanKameric 0:b416214256cd 1026 uint8_t cmdBufferSize = sizeof(cmdBuffer);
OsmanKameric 0:b416214256cd 1027 uint8_t validBits = 0;
OsmanKameric 0:b416214256cd 1028 result = PCD_CommunicateWithPICC(PCD_Transceive, waitIRq, cmdBuffer, sendLen, cmdBuffer, &cmdBufferSize, &validBits);
OsmanKameric 0:b416214256cd 1029 if (acceptTimeout && result == STATUS_TIMEOUT)
OsmanKameric 0:b416214256cd 1030 {
OsmanKameric 0:b416214256cd 1031 return STATUS_OK;
OsmanKameric 0:b416214256cd 1032 }
OsmanKameric 0:b416214256cd 1033
OsmanKameric 0:b416214256cd 1034 if (result != STATUS_OK)
OsmanKameric 0:b416214256cd 1035 {
OsmanKameric 0:b416214256cd 1036 return result;
OsmanKameric 0:b416214256cd 1037 }
OsmanKameric 0:b416214256cd 1038
OsmanKameric 0:b416214256cd 1039 // The PICC must reply with a 4 bit ACK
OsmanKameric 0:b416214256cd 1040 if (cmdBufferSize != 1 || validBits != 4)
OsmanKameric 0:b416214256cd 1041 {
OsmanKameric 0:b416214256cd 1042 return STATUS_ERROR;
OsmanKameric 0:b416214256cd 1043 }
OsmanKameric 0:b416214256cd 1044
OsmanKameric 0:b416214256cd 1045 if (cmdBuffer[0] != MF_ACK)
OsmanKameric 0:b416214256cd 1046 {
OsmanKameric 0:b416214256cd 1047 return STATUS_MIFARE_NACK;
OsmanKameric 0:b416214256cd 1048 }
OsmanKameric 0:b416214256cd 1049
OsmanKameric 0:b416214256cd 1050 return STATUS_OK;
OsmanKameric 0:b416214256cd 1051 } // End PCD_MIFARE_Transceive()
OsmanKameric 0:b416214256cd 1052
OsmanKameric 0:b416214256cd 1053
OsmanKameric 0:b416214256cd 1054 /*
OsmanKameric 0:b416214256cd 1055 * Translates the SAK (Select Acknowledge) to a PICC type.
OsmanKameric 0:b416214256cd 1056 */
OsmanKameric 0:b416214256cd 1057 uint8_t MFRC522::PICC_GetType(uint8_t sak)
OsmanKameric 0:b416214256cd 1058 {
OsmanKameric 0:b416214256cd 1059 uint8_t retType = PICC_TYPE_UNKNOWN;
OsmanKameric 0:b416214256cd 1060
OsmanKameric 0:b416214256cd 1061 if (sak & 0x04)
OsmanKameric 0:b416214256cd 1062 { // UID not complete
OsmanKameric 0:b416214256cd 1063 retType = PICC_TYPE_NOT_COMPLETE;
OsmanKameric 0:b416214256cd 1064 }
OsmanKameric 0:b416214256cd 1065 else
OsmanKameric 0:b416214256cd 1066 {
OsmanKameric 0:b416214256cd 1067 switch (sak)
OsmanKameric 0:b416214256cd 1068 {
OsmanKameric 0:b416214256cd 1069 case 0x09: retType = PICC_TYPE_MIFARE_MINI; break;
OsmanKameric 0:b416214256cd 1070 case 0x08: retType = PICC_TYPE_MIFARE_1K; break;
OsmanKameric 0:b416214256cd 1071 case 0x18: retType = PICC_TYPE_MIFARE_4K; break;
OsmanKameric 0:b416214256cd 1072 case 0x00: retType = PICC_TYPE_MIFARE_UL; break;
OsmanKameric 0:b416214256cd 1073 case 0x10:
OsmanKameric 0:b416214256cd 1074 case 0x11: retType = PICC_TYPE_MIFARE_PLUS; break;
OsmanKameric 0:b416214256cd 1075 case 0x01: retType = PICC_TYPE_TNP3XXX; break;
OsmanKameric 0:b416214256cd 1076 default:
OsmanKameric 0:b416214256cd 1077 if (sak & 0x20)
OsmanKameric 0:b416214256cd 1078 {
OsmanKameric 0:b416214256cd 1079 retType = PICC_TYPE_ISO_14443_4;
OsmanKameric 0:b416214256cd 1080 }
OsmanKameric 0:b416214256cd 1081 else if (sak & 0x40)
OsmanKameric 0:b416214256cd 1082 {
OsmanKameric 0:b416214256cd 1083 retType = PICC_TYPE_ISO_18092;
OsmanKameric 0:b416214256cd 1084 }
OsmanKameric 0:b416214256cd 1085 break;
OsmanKameric 0:b416214256cd 1086 }
OsmanKameric 0:b416214256cd 1087 }
OsmanKameric 0:b416214256cd 1088
OsmanKameric 0:b416214256cd 1089 return (retType);
OsmanKameric 0:b416214256cd 1090 } // End PICC_GetType()
OsmanKameric 0:b416214256cd 1091
OsmanKameric 0:b416214256cd 1092 /*
OsmanKameric 0:b416214256cd 1093 * Returns a string pointer to the PICC type name.
OsmanKameric 0:b416214256cd 1094 */
OsmanKameric 0:b416214256cd 1095 char* MFRC522::PICC_GetTypeName(uint8_t piccType)
OsmanKameric 0:b416214256cd 1096 {
OsmanKameric 0:b416214256cd 1097 if(piccType == PICC_TYPE_NOT_COMPLETE)
OsmanKameric 0:b416214256cd 1098 {
OsmanKameric 0:b416214256cd 1099 piccType = MFRC522_MaxPICCs - 1;
OsmanKameric 0:b416214256cd 1100 }
OsmanKameric 0:b416214256cd 1101
OsmanKameric 0:b416214256cd 1102 return((char *) _TypeNamePICC[piccType]);
OsmanKameric 0:b416214256cd 1103 } // End PICC_GetTypeName()
OsmanKameric 0:b416214256cd 1104
OsmanKameric 0:b416214256cd 1105 /*
OsmanKameric 0:b416214256cd 1106 * Returns a string pointer to a status code name.
OsmanKameric 0:b416214256cd 1107 */
OsmanKameric 0:b416214256cd 1108 char* MFRC522::GetStatusCodeName(uint8_t code)
OsmanKameric 0:b416214256cd 1109 {
OsmanKameric 0:b416214256cd 1110 return((char *) _ErrorMessage[code]);
OsmanKameric 0:b416214256cd 1111 } // End GetStatusCodeName()
OsmanKameric 0:b416214256cd 1112
OsmanKameric 0:b416214256cd 1113 /*
OsmanKameric 0:b416214256cd 1114 * Calculates the bit pattern needed for the specified access bits. In the [C1 C2 C3] tupples C1 is MSB (=4) and C3 is LSB (=1).
OsmanKameric 0:b416214256cd 1115 */
OsmanKameric 0:b416214256cd 1116 void MFRC522::MIFARE_SetAccessBits(uint8_t *accessBitBuffer,
OsmanKameric 0:b416214256cd 1117 uint8_t g0,
OsmanKameric 0:b416214256cd 1118 uint8_t g1,
OsmanKameric 0:b416214256cd 1119 uint8_t g2,
OsmanKameric 0:b416214256cd 1120 uint8_t g3)
OsmanKameric 0:b416214256cd 1121 {
OsmanKameric 0:b416214256cd 1122 uint8_t c1 = ((g3 & 4) << 1) | ((g2 & 4) << 0) | ((g1 & 4) >> 1) | ((g0 & 4) >> 2);
OsmanKameric 0:b416214256cd 1123 uint8_t c2 = ((g3 & 2) << 2) | ((g2 & 2) << 1) | ((g1 & 2) << 0) | ((g0 & 2) >> 1);
OsmanKameric 0:b416214256cd 1124 uint8_t c3 = ((g3 & 1) << 3) | ((g2 & 1) << 2) | ((g1 & 1) << 1) | ((g0 & 1) << 0);
OsmanKameric 0:b416214256cd 1125
OsmanKameric 0:b416214256cd 1126 accessBitBuffer[0] = (~c2 & 0xF) << 4 | (~c1 & 0xF);
OsmanKameric 0:b416214256cd 1127 accessBitBuffer[1] = c1 << 4 | (~c3 & 0xF);
OsmanKameric 0:b416214256cd 1128 accessBitBuffer[2] = c3 << 4 | c2;
OsmanKameric 0:b416214256cd 1129 } // End MIFARE_SetAccessBits()
OsmanKameric 0:b416214256cd 1130
OsmanKameric 0:b416214256cd 1131 /////////////////////////////////////////////////////////////////////////////////////
OsmanKameric 0:b416214256cd 1132 // Convenience functions - does not add extra functionality
OsmanKameric 0:b416214256cd 1133 /////////////////////////////////////////////////////////////////////////////////////
OsmanKameric 0:b416214256cd 1134
OsmanKameric 0:b416214256cd 1135 /*
OsmanKameric 0:b416214256cd 1136 * Returns true if a PICC responds to PICC_CMD_REQA.
OsmanKameric 0:b416214256cd 1137 * Only "new" cards in state IDLE are invited. Sleeping cards in state HALT are ignored.
OsmanKameric 0:b416214256cd 1138 */
OsmanKameric 0:b416214256cd 1139 bool MFRC522::PICC_IsNewCardPresent(void)
OsmanKameric 0:b416214256cd 1140 {
OsmanKameric 0:b416214256cd 1141 uint8_t bufferATQA[2];
OsmanKameric 0:b416214256cd 1142 uint8_t bufferSize = sizeof(bufferATQA);
OsmanKameric 0:b416214256cd 1143 uint8_t result = PICC_RequestA(bufferATQA, &bufferSize);
OsmanKameric 0:b416214256cd 1144 return ((result == STATUS_OK) || (result == STATUS_COLLISION));
OsmanKameric 0:b416214256cd 1145 } // End PICC_IsNewCardPresent()
OsmanKameric 0:b416214256cd 1146
OsmanKameric 0:b416214256cd 1147 /*
OsmanKameric 0:b416214256cd 1148 * Simple wrapper around PICC_Select.
OsmanKameric 0:b416214256cd 1149 */
OsmanKameric 0:b416214256cd 1150 bool MFRC522::PICC_ReadCardSerial(void)
OsmanKameric 0:b416214256cd 1151 {
OsmanKameric 0:b416214256cd 1152 uint8_t result = PICC_Select(&uid);
OsmanKameric 0:b416214256cd 1153 return (result == STATUS_OK);
OsmanKameric 0:b416214256cd 1154 } // End PICC_ReadCardSerial()