LCDconfig.h

00001 #include "FRDM-s401.h"                //  4x7 segdisplay
00002 
00003 
00004 #if 1  // VREF to VLL1
00005 /* Following configuration is used for LCD default initialization  */
00006 #define _LCDRVEN          (1)         //
00007 #define _LCDRVTRIM        (8)         // CPSEL = 1     0 -- 8000 pf 1 -- 6000 pf  2 -- 4000 pf  3 -- 2000 pf
00008 #define _LCDCPSEL         (1)         //  charge pump select 0 or 1 
00009 #define _LCDLOADADJUST    (3)         // CPSEL = 1     0 -- 8000 pf 1 -- 6000 pf  2 -- 4000 pf  3 -- 2000 pf
00010 #define _LCDALTDIV        (0)         // CPSEL = 1     0 -- 8000 pf 1 -- 6000 pf  2 -- 4000 pf  3 -- 2000 pf
00011 #define _LCDALRCLKSOURCE  (0)         // 0 -- External clock       1 --  Alternate clock
00012 
00013 #define _LCDCLKPSL        (0)         //  Clock divider to generate the LCD Waveforms 
00014 #define _LCDSUPPLY        (1)
00015 #define _LCDHREF          (0)         // 0 or 1 
00016 #define _LCDCLKSOURCE     (1)         // 0 -- External clock       1 --  Alternate clock
00017 #define _LCDLCK           (1)         //Any number between 0 and 7 
00018 #define _LCDBLINKRATE     (3)         //Any number between 0 and 7 
00019 
00020 
00021 #else    //VLL3 to VDD internally
00022 /* Following configuration is used for LCD default initialization  */
00023 #define _LCDCLKSOURCE     (1)         // 0 -- External clock       1 --  Alternate clock
00024 #define _LCDALRCLKSOURCE  (0)         // 0 -- External clock       1 --  Alternate clock
00025 #define _LCDCLKPSL        (0)         // Clock divider to generate the LCD Waveforms 
00026 #define _LCDSUPPLY        (0)
00027 #define _LCDLOADADJUST    (3)         // CPSEL = 1     0 -- 8000 pf 1 -- 6000 pf  2 -- 4000 pf  3 -- 2000 pf
00028 #define _LCDALTDIV        (0)         // CPSEL = 1     0 -- 8000 pf 1 -- 6000 pf  2 -- 4000 pf  3 -- 2000 pf
00029 #define _LCDRVTRIM        (0)         // CPSEL = 1     0 -- 8000 pf 1 -- 6000 pf  2 -- 4000 pf  3 -- 2000 pf
00030 #define _LCDHREF          (0)         // 0 or 1 
00031 #define _LCDCPSEL         (1)         // 0 or 1 
00032 #define _LCDRVEN          (0)         //
00033 #define _LCDBLINKRATE     (3)         // Any number between 0 and 7 
00034 #define _LCDLCK           (0)         // Any number between 0 and 7 
00035 
00036 #endif
00037 
00038 
00039 
00040 
00041 /*~|~|~|~|~|~|~|~|~|~|~|~|~|~  LCD  Control Register 0  ~|~|~|~|~|~|~|~|~|~|~|~|~*/
00042 /*~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|*/
00043 #define _LCDINTENABLE          (1)
00044 
00045 /*~|~|~|~|~|~|~|~|~|~|~|~|~|~  LCD  Control Register 1  ~|~|~|~|~|~|~|~|~|~|~|~|~|*/
00046 /*~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|*/
00047 #define _LCDFRAMEINTERRUPT     (0)     //0 Disable Frame Frequency Interrupt
00048 //1 Enable an LCD interrupt that coincides with the LCD frame frequency
00049 #define _LCDFULLCPLDIRIVE      (0)     // 0 GPIO shared with the LCD. Inputs levels and internal pullup reference to VDD
00050 // 1 If VSUPPLY=11and RVEN=0. Inputs levels and internal pullup reference to VLL3
00051 #define _LCDWAITMODE           (0)     // 0 Allows the LCD driver and charge pump to continue running during wait mode
00052 //  1 Disable the LCD when the MCU goes into wait mode
00053 #define _LCDSTOPMODE           (0)     // 0 Allows the LCD driver and charge pump to continue running during stop2 or stop3
00054 //  1 Disable the LCD when and charge pump when the MCU goes into stop2 or stop3
00055 
00056 /*~|~|~|~|~|~|~|~|~|~|~|~|~|~  LCD  Voltage Supply Register  ~|~|~|~|~|~|~|~|~|~|~|~*/
00057 /*~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|*/
00058 #define _LCDHIGHREF             (0)    //0 Divide input VIREG=1.0v
00059 //1 Do not divide the input VIREG=1.67v
00060 #define _LCDBBYPASS             (0)    //Determines whether the internal LCD op amp buffer is bypassed
00061 //0 Buffered mode
00062 //1 Unbuffered mode
00063 
00064 /*~|~|~|~|~|~|~|~|~|~|~|~|~|~  LCD  Regulated Voltage Control |~|~|~|~|~|~|~|~|~|~*/
00065 /*~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|*/
00066 #define _LCDCONTRAST            (1)       //Contrast by software   0 -- Disable    1-- Enable
00067 #define _LVLCONTRAST            (0)       //Any number between 0  and 15, if the number is bigger the glass gets darker
00068 
00069 /*~|~|~|~|~|~|~|~|~|~|~|~|~|~  LCD  Blink Control Register ~|~|~|~|~|~|~|~|~|~|~|~*/
00070 /*~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|*/
00071 #define _LCDBLINKCONTROL        (1)     //0 Disable blink mode
00072 //1 Enable blink mode
00073 #define _LCDALTMODE             (0)     //0 Normal display 
00074 //1 Alternate display for 4 backplanes or less the LCD backplane sequencer changes to otuput an alternate display
00075 #define _LCDBLANKDISP           (0)     //0 Do not blank display
00076 //1 Blank display if you put it in 0 the text before blank is manteined
00077 #define _LCDBLINKMODE           (0)     //0 Display blank during the blink period 
00078 //1 Display alternate displat during blink period (Ignored if duty is 5 or greater)
00079 
00080 
00081 //Calculated values
00082 #define _LCDUSEDPINS   (_LCDFRONTPLANES + _LCDBACKPLANES)
00083 #define _LCDDUTY       (_LCDBACKPLANES-1)         //Any number between 0 and 7 
00084 #define  LCD_WF_BASE    LCD->WF8B[0]
00085 
00086 // General definitions used by the LCD library
00087 #define  LCD_WF(x)              *((uint8 *)&LCD_WF_BASE + x)
00088 
00089 /*LCD Fault Detections Consts*/
00090 #define  FP_TYPE  0x00         // pin is a Front Plane
00091 #define  BP_TYPE  0x80         // pin is Back Plane
00092 
00093 // Fault Detect Preescaler Options
00094 #define FDPRS_1      0
00095 #define FDPRS_2      1
00096 #define FDPRS_4      2
00097 #define FDPRS_8      3
00098 #define FDPRS_16     4
00099 #define FDPRS_32     5
00100 #define FDPRS_64     6
00101 #define FDPRS_128    7
00102 
00103 // Fault Detect Sample Window Width Values
00104 #define FDSWW_4           0
00105 #define FDSWW_8           1
00106 #define FDSWW_16          2
00107 #define FDSWW_32          3
00108 #define FDSWW_64          4
00109 #define FDSWW_128         5
00110 #define FDSWW_256         6
00111 #define FDSWW_512         7
00112 
00113 /*
00114   Mask Bit definitions used f
00115 */
00116 #define     mBIT0   1
00117 #define     mBIT1   2
00118 #define     mBIT2   4
00119 #define     mBIT3   8
00120 #define     mBIT4   16
00121 #define     mBIT5   32
00122 #define     mBIT6   64
00123 #define     mBIT7   128
00124 #define     mBIT8   256
00125 #define     mBIT9   512
00126 #define     mBIT10   1024
00127 #define     mBIT11   2048
00128 #define     mBIT12   4096
00129 #define     mBIT13   8192
00130 #define     mBIT14   16384
00131 #define     mBIT15   32768
00132 #define     mBIT16   65536
00133 #define     mBIT17   131072
00134 #define     mBIT18   262144
00135 #define     mBIT19   524288
00136 #define     mBIT20   1048576
00137 #define     mBIT21   2097152
00138 #define     mBIT22   4194304
00139 #define     mBIT23   8388608
00140 #define     mBIT24   16777216
00141 #define     mBIT25   33554432
00142 #define     mBIT26   67108864
00143 #define     mBIT27   134217728
00144 #define     mBIT28   268435456
00145 #define     mBIT29   536870912
00146 #define     mBIT30   1073741824
00147 #define     mBIT31   2147483648
00148 
00149 #define    mBIT32      1
00150 #define    mBIT33      2
00151 #define    mBIT34      4
00152 #define    mBIT35      8
00153 #define    mBIT36      16
00154 #define    mBIT37      32
00155 #define    mBIT38      64
00156 #define    mBIT39      128
00157 #define    mBIT40      256
00158 #define    mBIT41      512
00159 #define    mBIT42      1024
00160 #define    mBIT43      2048
00161 #define    mBIT44      4096
00162 #define    mBIT45      8192
00163 #define    mBIT46      16384
00164 #define    mBIT47      32768
00165 #define    mBIT48      65536
00166 #define    mBIT49      131072
00167 #define    mBIT50      262144
00168 #define    mBIT51      524288
00169 #define    mBIT52      1048576
00170 #define    mBIT53      2097152
00171 #define    mBIT54      4194304
00172 #define    mBIT55      8388608
00173 #define    mBIT56      16777216
00174 #define    mBIT57      33554432
00175 #define    mBIT58      67108864
00176 #define    mBIT59      134217728
00177 #define    mBIT60      268435456
00178 #define    mBIT61      536870912
00179 #define    mBIT62      1073741824
00180 #define    mBIT63      2147483648
00181 
00182 
00183