inport from local
Dependents: Hobbyking_Cheetah_0511
targets/TARGET_STM/i2c_api.c@0:85b3fd62ea1a, 2020-03-16 (annotated)
- Committer:
- NYX
- Date:
- Mon Mar 16 06:35:48 2020 +0000
- Revision:
- 0:85b3fd62ea1a
reinport to mbed;
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
NYX | 0:85b3fd62ea1a | 1 | /* mbed Microcontroller Library |
NYX | 0:85b3fd62ea1a | 2 | ******************************************************************************* |
NYX | 0:85b3fd62ea1a | 3 | * Copyright (c) 2015, STMicroelectronics |
NYX | 0:85b3fd62ea1a | 4 | * All rights reserved. |
NYX | 0:85b3fd62ea1a | 5 | * |
NYX | 0:85b3fd62ea1a | 6 | * Redistribution and use in source and binary forms, with or without |
NYX | 0:85b3fd62ea1a | 7 | * modification, are permitted provided that the following conditions are met: |
NYX | 0:85b3fd62ea1a | 8 | * |
NYX | 0:85b3fd62ea1a | 9 | * 1. Redistributions of source code must retain the above copyright notice, |
NYX | 0:85b3fd62ea1a | 10 | * this list of conditions and the following disclaimer. |
NYX | 0:85b3fd62ea1a | 11 | * 2. Redistributions in binary form must reproduce the above copyright notice, |
NYX | 0:85b3fd62ea1a | 12 | * this list of conditions and the following disclaimer in the documentation |
NYX | 0:85b3fd62ea1a | 13 | * and/or other materials provided with the distribution. |
NYX | 0:85b3fd62ea1a | 14 | * 3. Neither the name of STMicroelectronics nor the names of its contributors |
NYX | 0:85b3fd62ea1a | 15 | * may be used to endorse or promote products derived from this software |
NYX | 0:85b3fd62ea1a | 16 | * without specific prior written permission. |
NYX | 0:85b3fd62ea1a | 17 | * |
NYX | 0:85b3fd62ea1a | 18 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
NYX | 0:85b3fd62ea1a | 19 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
NYX | 0:85b3fd62ea1a | 20 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
NYX | 0:85b3fd62ea1a | 21 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE |
NYX | 0:85b3fd62ea1a | 22 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
NYX | 0:85b3fd62ea1a | 23 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR |
NYX | 0:85b3fd62ea1a | 24 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
NYX | 0:85b3fd62ea1a | 25 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
NYX | 0:85b3fd62ea1a | 26 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
NYX | 0:85b3fd62ea1a | 27 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
NYX | 0:85b3fd62ea1a | 28 | ******************************************************************************* |
NYX | 0:85b3fd62ea1a | 29 | */ |
NYX | 0:85b3fd62ea1a | 30 | |
NYX | 0:85b3fd62ea1a | 31 | |
NYX | 0:85b3fd62ea1a | 32 | #include "mbed_assert.h" |
NYX | 0:85b3fd62ea1a | 33 | #include "i2c_api.h" |
NYX | 0:85b3fd62ea1a | 34 | #include "platform/mbed_wait_api.h" |
NYX | 0:85b3fd62ea1a | 35 | |
NYX | 0:85b3fd62ea1a | 36 | #if DEVICE_I2C |
NYX | 0:85b3fd62ea1a | 37 | |
NYX | 0:85b3fd62ea1a | 38 | #include "cmsis.h" |
NYX | 0:85b3fd62ea1a | 39 | #include "pinmap.h" |
NYX | 0:85b3fd62ea1a | 40 | #include "PeripheralPins.h" |
NYX | 0:85b3fd62ea1a | 41 | #include "i2c_device.h" // family specific defines |
NYX | 0:85b3fd62ea1a | 42 | |
NYX | 0:85b3fd62ea1a | 43 | #ifndef DEBUG_STDIO |
NYX | 0:85b3fd62ea1a | 44 | # define DEBUG_STDIO 0 |
NYX | 0:85b3fd62ea1a | 45 | #endif |
NYX | 0:85b3fd62ea1a | 46 | |
NYX | 0:85b3fd62ea1a | 47 | #if DEBUG_STDIO |
NYX | 0:85b3fd62ea1a | 48 | # include <stdio.h> |
NYX | 0:85b3fd62ea1a | 49 | # define DEBUG_PRINTF(...) do { printf(__VA_ARGS__); } while(0) |
NYX | 0:85b3fd62ea1a | 50 | #else |
NYX | 0:85b3fd62ea1a | 51 | # define DEBUG_PRINTF(...) {} |
NYX | 0:85b3fd62ea1a | 52 | #endif |
NYX | 0:85b3fd62ea1a | 53 | |
NYX | 0:85b3fd62ea1a | 54 | #if DEVICE_I2C_ASYNCH |
NYX | 0:85b3fd62ea1a | 55 | #define I2C_S(obj) (struct i2c_s *) (&((obj)->i2c)) |
NYX | 0:85b3fd62ea1a | 56 | #else |
NYX | 0:85b3fd62ea1a | 57 | #define I2C_S(obj) (struct i2c_s *) (obj) |
NYX | 0:85b3fd62ea1a | 58 | #endif |
NYX | 0:85b3fd62ea1a | 59 | |
NYX | 0:85b3fd62ea1a | 60 | /* Family specific description for I2C */ |
NYX | 0:85b3fd62ea1a | 61 | #define I2C_NUM (5) |
NYX | 0:85b3fd62ea1a | 62 | static I2C_HandleTypeDef* i2c_handles[I2C_NUM]; |
NYX | 0:85b3fd62ea1a | 63 | |
NYX | 0:85b3fd62ea1a | 64 | /* Timeout values are based on core clock and I2C clock. |
NYX | 0:85b3fd62ea1a | 65 | The BYTE_TIMEOUT is computed as twice the number of cycles it would |
NYX | 0:85b3fd62ea1a | 66 | take to send 10 bits over I2C. Most Flags should take less than that. |
NYX | 0:85b3fd62ea1a | 67 | This is for immediate FLAG or ACK check. |
NYX | 0:85b3fd62ea1a | 68 | */ |
NYX | 0:85b3fd62ea1a | 69 | #define BYTE_TIMEOUT ((SystemCoreClock / obj_s->hz) * 2 * 10) |
NYX | 0:85b3fd62ea1a | 70 | /* Timeout values based on I2C clock. |
NYX | 0:85b3fd62ea1a | 71 | The BYTE_TIMEOUT_US is computed as 3x the time in us it would |
NYX | 0:85b3fd62ea1a | 72 | take to send 10 bits over I2C. Most Flags should take less than that. |
NYX | 0:85b3fd62ea1a | 73 | This is for complete transfers check. |
NYX | 0:85b3fd62ea1a | 74 | */ |
NYX | 0:85b3fd62ea1a | 75 | #define BYTE_TIMEOUT_US ((SystemCoreClock / obj_s->hz) * 3 * 10) |
NYX | 0:85b3fd62ea1a | 76 | /* Timeout values for flags and events waiting loops. These timeouts are |
NYX | 0:85b3fd62ea1a | 77 | not based on accurate values, they just guarantee that the application will |
NYX | 0:85b3fd62ea1a | 78 | not remain stuck if the I2C communication is corrupted. |
NYX | 0:85b3fd62ea1a | 79 | */ |
NYX | 0:85b3fd62ea1a | 80 | #define FLAG_TIMEOUT ((int)0x1000) |
NYX | 0:85b3fd62ea1a | 81 | |
NYX | 0:85b3fd62ea1a | 82 | /* GENERIC INIT and HELPERS FUNCTIONS */ |
NYX | 0:85b3fd62ea1a | 83 | |
NYX | 0:85b3fd62ea1a | 84 | #if defined(I2C1_BASE) |
NYX | 0:85b3fd62ea1a | 85 | static void i2c1_irq(void) |
NYX | 0:85b3fd62ea1a | 86 | { |
NYX | 0:85b3fd62ea1a | 87 | I2C_HandleTypeDef * handle = i2c_handles[0]; |
NYX | 0:85b3fd62ea1a | 88 | HAL_I2C_EV_IRQHandler(handle); |
NYX | 0:85b3fd62ea1a | 89 | HAL_I2C_ER_IRQHandler(handle); |
NYX | 0:85b3fd62ea1a | 90 | } |
NYX | 0:85b3fd62ea1a | 91 | #endif |
NYX | 0:85b3fd62ea1a | 92 | #if defined(I2C2_BASE) |
NYX | 0:85b3fd62ea1a | 93 | static void i2c2_irq(void) |
NYX | 0:85b3fd62ea1a | 94 | { |
NYX | 0:85b3fd62ea1a | 95 | I2C_HandleTypeDef * handle = i2c_handles[1]; |
NYX | 0:85b3fd62ea1a | 96 | HAL_I2C_EV_IRQHandler(handle); |
NYX | 0:85b3fd62ea1a | 97 | HAL_I2C_ER_IRQHandler(handle); |
NYX | 0:85b3fd62ea1a | 98 | } |
NYX | 0:85b3fd62ea1a | 99 | #endif |
NYX | 0:85b3fd62ea1a | 100 | #if defined(I2C3_BASE) |
NYX | 0:85b3fd62ea1a | 101 | static void i2c3_irq(void) |
NYX | 0:85b3fd62ea1a | 102 | { |
NYX | 0:85b3fd62ea1a | 103 | I2C_HandleTypeDef * handle = i2c_handles[2]; |
NYX | 0:85b3fd62ea1a | 104 | HAL_I2C_EV_IRQHandler(handle); |
NYX | 0:85b3fd62ea1a | 105 | HAL_I2C_ER_IRQHandler(handle); |
NYX | 0:85b3fd62ea1a | 106 | } |
NYX | 0:85b3fd62ea1a | 107 | #endif |
NYX | 0:85b3fd62ea1a | 108 | #if defined(I2C4_BASE) |
NYX | 0:85b3fd62ea1a | 109 | static void i2c4_irq(void) |
NYX | 0:85b3fd62ea1a | 110 | { |
NYX | 0:85b3fd62ea1a | 111 | I2C_HandleTypeDef * handle = i2c_handles[3]; |
NYX | 0:85b3fd62ea1a | 112 | HAL_I2C_EV_IRQHandler(handle); |
NYX | 0:85b3fd62ea1a | 113 | HAL_I2C_ER_IRQHandler(handle); |
NYX | 0:85b3fd62ea1a | 114 | } |
NYX | 0:85b3fd62ea1a | 115 | #endif |
NYX | 0:85b3fd62ea1a | 116 | #if defined(FMPI2C1_BASE) |
NYX | 0:85b3fd62ea1a | 117 | static void i2c5_irq(void) |
NYX | 0:85b3fd62ea1a | 118 | { |
NYX | 0:85b3fd62ea1a | 119 | I2C_HandleTypeDef * handle = i2c_handles[4]; |
NYX | 0:85b3fd62ea1a | 120 | HAL_I2C_EV_IRQHandler(handle); |
NYX | 0:85b3fd62ea1a | 121 | HAL_I2C_ER_IRQHandler(handle); |
NYX | 0:85b3fd62ea1a | 122 | } |
NYX | 0:85b3fd62ea1a | 123 | #endif |
NYX | 0:85b3fd62ea1a | 124 | |
NYX | 0:85b3fd62ea1a | 125 | void i2c_ev_err_enable(i2c_t *obj, uint32_t handler) { |
NYX | 0:85b3fd62ea1a | 126 | struct i2c_s *obj_s = I2C_S(obj); |
NYX | 0:85b3fd62ea1a | 127 | IRQn_Type irq_event_n = obj_s->event_i2cIRQ; |
NYX | 0:85b3fd62ea1a | 128 | IRQn_Type irq_error_n = obj_s->error_i2cIRQ; |
NYX | 0:85b3fd62ea1a | 129 | /* default prio in master case is set to 2 */ |
NYX | 0:85b3fd62ea1a | 130 | uint32_t prio = 2; |
NYX | 0:85b3fd62ea1a | 131 | |
NYX | 0:85b3fd62ea1a | 132 | /* Set up ITs using IRQ and handler tables */ |
NYX | 0:85b3fd62ea1a | 133 | NVIC_SetVector(irq_event_n, handler); |
NYX | 0:85b3fd62ea1a | 134 | NVIC_SetVector(irq_error_n, handler); |
NYX | 0:85b3fd62ea1a | 135 | |
NYX | 0:85b3fd62ea1a | 136 | #if DEVICE_I2CSLAVE |
NYX | 0:85b3fd62ea1a | 137 | /* Set higher priority to slave device than master. |
NYX | 0:85b3fd62ea1a | 138 | * In case a device makes use of both master and slave, the |
NYX | 0:85b3fd62ea1a | 139 | * slave needs higher responsiveness. |
NYX | 0:85b3fd62ea1a | 140 | */ |
NYX | 0:85b3fd62ea1a | 141 | if (obj_s->slave) { |
NYX | 0:85b3fd62ea1a | 142 | prio = 1; |
NYX | 0:85b3fd62ea1a | 143 | } |
NYX | 0:85b3fd62ea1a | 144 | #endif |
NYX | 0:85b3fd62ea1a | 145 | |
NYX | 0:85b3fd62ea1a | 146 | NVIC_SetPriority(irq_event_n, prio); |
NYX | 0:85b3fd62ea1a | 147 | NVIC_SetPriority(irq_error_n, prio); |
NYX | 0:85b3fd62ea1a | 148 | NVIC_EnableIRQ(irq_event_n); |
NYX | 0:85b3fd62ea1a | 149 | NVIC_EnableIRQ(irq_error_n); |
NYX | 0:85b3fd62ea1a | 150 | } |
NYX | 0:85b3fd62ea1a | 151 | |
NYX | 0:85b3fd62ea1a | 152 | void i2c_ev_err_disable(i2c_t *obj) { |
NYX | 0:85b3fd62ea1a | 153 | struct i2c_s *obj_s = I2C_S(obj); |
NYX | 0:85b3fd62ea1a | 154 | IRQn_Type irq_event_n = obj_s->event_i2cIRQ; |
NYX | 0:85b3fd62ea1a | 155 | IRQn_Type irq_error_n = obj_s->error_i2cIRQ; |
NYX | 0:85b3fd62ea1a | 156 | |
NYX | 0:85b3fd62ea1a | 157 | HAL_NVIC_DisableIRQ(irq_event_n); |
NYX | 0:85b3fd62ea1a | 158 | HAL_NVIC_DisableIRQ(irq_error_n); |
NYX | 0:85b3fd62ea1a | 159 | } |
NYX | 0:85b3fd62ea1a | 160 | |
NYX | 0:85b3fd62ea1a | 161 | uint32_t i2c_get_irq_handler(i2c_t *obj) |
NYX | 0:85b3fd62ea1a | 162 | { |
NYX | 0:85b3fd62ea1a | 163 | struct i2c_s *obj_s = I2C_S(obj); |
NYX | 0:85b3fd62ea1a | 164 | I2C_HandleTypeDef *handle = &(obj_s->handle); |
NYX | 0:85b3fd62ea1a | 165 | uint32_t handler = 0; |
NYX | 0:85b3fd62ea1a | 166 | |
NYX | 0:85b3fd62ea1a | 167 | switch (obj_s->index) { |
NYX | 0:85b3fd62ea1a | 168 | #if defined(I2C1_BASE) |
NYX | 0:85b3fd62ea1a | 169 | case 0: |
NYX | 0:85b3fd62ea1a | 170 | handler = (uint32_t)&i2c1_irq; |
NYX | 0:85b3fd62ea1a | 171 | break; |
NYX | 0:85b3fd62ea1a | 172 | #endif |
NYX | 0:85b3fd62ea1a | 173 | #if defined(I2C2_BASE) |
NYX | 0:85b3fd62ea1a | 174 | case 1: |
NYX | 0:85b3fd62ea1a | 175 | handler = (uint32_t)&i2c2_irq; |
NYX | 0:85b3fd62ea1a | 176 | break; |
NYX | 0:85b3fd62ea1a | 177 | #endif |
NYX | 0:85b3fd62ea1a | 178 | #if defined(I2C3_BASE) |
NYX | 0:85b3fd62ea1a | 179 | case 2: |
NYX | 0:85b3fd62ea1a | 180 | handler = (uint32_t)&i2c3_irq; |
NYX | 0:85b3fd62ea1a | 181 | break; |
NYX | 0:85b3fd62ea1a | 182 | #endif |
NYX | 0:85b3fd62ea1a | 183 | #if defined(I2C4_BASE) |
NYX | 0:85b3fd62ea1a | 184 | case 3: |
NYX | 0:85b3fd62ea1a | 185 | handler = (uint32_t)&i2c4_irq; |
NYX | 0:85b3fd62ea1a | 186 | break; |
NYX | 0:85b3fd62ea1a | 187 | #endif |
NYX | 0:85b3fd62ea1a | 188 | #if defined(FMPI2C1_BASE) |
NYX | 0:85b3fd62ea1a | 189 | case 4: |
NYX | 0:85b3fd62ea1a | 190 | handler = (uint32_t)&i2c5_irq; |
NYX | 0:85b3fd62ea1a | 191 | break; |
NYX | 0:85b3fd62ea1a | 192 | #endif |
NYX | 0:85b3fd62ea1a | 193 | } |
NYX | 0:85b3fd62ea1a | 194 | |
NYX | 0:85b3fd62ea1a | 195 | i2c_handles[obj_s->index] = handle; |
NYX | 0:85b3fd62ea1a | 196 | return handler; |
NYX | 0:85b3fd62ea1a | 197 | } |
NYX | 0:85b3fd62ea1a | 198 | |
NYX | 0:85b3fd62ea1a | 199 | void i2c_hw_reset(i2c_t *obj) { |
NYX | 0:85b3fd62ea1a | 200 | int timeout; |
NYX | 0:85b3fd62ea1a | 201 | struct i2c_s *obj_s = I2C_S(obj); |
NYX | 0:85b3fd62ea1a | 202 | I2C_HandleTypeDef *handle = &(obj_s->handle); |
NYX | 0:85b3fd62ea1a | 203 | |
NYX | 0:85b3fd62ea1a | 204 | handle->Instance = (I2C_TypeDef *)(obj_s->i2c); |
NYX | 0:85b3fd62ea1a | 205 | |
NYX | 0:85b3fd62ea1a | 206 | // wait before reset |
NYX | 0:85b3fd62ea1a | 207 | timeout = BYTE_TIMEOUT; |
NYX | 0:85b3fd62ea1a | 208 | while ((__HAL_I2C_GET_FLAG(handle, I2C_FLAG_BUSY)) && (--timeout != 0)); |
NYX | 0:85b3fd62ea1a | 209 | #if defined I2C1_BASE |
NYX | 0:85b3fd62ea1a | 210 | if (obj_s->i2c == I2C_1) { |
NYX | 0:85b3fd62ea1a | 211 | __HAL_RCC_I2C1_FORCE_RESET(); |
NYX | 0:85b3fd62ea1a | 212 | __HAL_RCC_I2C1_RELEASE_RESET(); |
NYX | 0:85b3fd62ea1a | 213 | } |
NYX | 0:85b3fd62ea1a | 214 | #endif |
NYX | 0:85b3fd62ea1a | 215 | #if defined I2C2_BASE |
NYX | 0:85b3fd62ea1a | 216 | if (obj_s->i2c == I2C_2) { |
NYX | 0:85b3fd62ea1a | 217 | __HAL_RCC_I2C2_FORCE_RESET(); |
NYX | 0:85b3fd62ea1a | 218 | __HAL_RCC_I2C2_RELEASE_RESET(); |
NYX | 0:85b3fd62ea1a | 219 | } |
NYX | 0:85b3fd62ea1a | 220 | #endif |
NYX | 0:85b3fd62ea1a | 221 | #if defined I2C3_BASE |
NYX | 0:85b3fd62ea1a | 222 | if (obj_s->i2c == I2C_3) { |
NYX | 0:85b3fd62ea1a | 223 | __HAL_RCC_I2C3_FORCE_RESET(); |
NYX | 0:85b3fd62ea1a | 224 | __HAL_RCC_I2C3_RELEASE_RESET(); |
NYX | 0:85b3fd62ea1a | 225 | } |
NYX | 0:85b3fd62ea1a | 226 | #endif |
NYX | 0:85b3fd62ea1a | 227 | #if defined I2C4_BASE |
NYX | 0:85b3fd62ea1a | 228 | if (obj_s->i2c == I2C_4) { |
NYX | 0:85b3fd62ea1a | 229 | __HAL_RCC_I2C4_FORCE_RESET(); |
NYX | 0:85b3fd62ea1a | 230 | __HAL_RCC_I2C4_RELEASE_RESET(); |
NYX | 0:85b3fd62ea1a | 231 | } |
NYX | 0:85b3fd62ea1a | 232 | #endif |
NYX | 0:85b3fd62ea1a | 233 | #if defined FMPI2C1_BASE |
NYX | 0:85b3fd62ea1a | 234 | if (obj_s->i2c == FMPI2C_1) { |
NYX | 0:85b3fd62ea1a | 235 | __HAL_RCC_FMPI2C1_FORCE_RESET(); |
NYX | 0:85b3fd62ea1a | 236 | __HAL_RCC_FMPI2C1_RELEASE_RESET(); |
NYX | 0:85b3fd62ea1a | 237 | } |
NYX | 0:85b3fd62ea1a | 238 | #endif |
NYX | 0:85b3fd62ea1a | 239 | } |
NYX | 0:85b3fd62ea1a | 240 | |
NYX | 0:85b3fd62ea1a | 241 | void i2c_sw_reset(i2c_t *obj) |
NYX | 0:85b3fd62ea1a | 242 | { |
NYX | 0:85b3fd62ea1a | 243 | struct i2c_s *obj_s = I2C_S(obj); |
NYX | 0:85b3fd62ea1a | 244 | I2C_HandleTypeDef *handle = &(obj_s->handle); |
NYX | 0:85b3fd62ea1a | 245 | /* SW reset procedure: |
NYX | 0:85b3fd62ea1a | 246 | * PE must be kept low during at least 3 APB clock cycles |
NYX | 0:85b3fd62ea1a | 247 | * in order to perform the software reset. |
NYX | 0:85b3fd62ea1a | 248 | * This is ensured by writing the following software sequence: |
NYX | 0:85b3fd62ea1a | 249 | * - Write PE=0 |
NYX | 0:85b3fd62ea1a | 250 | * - Check PE=0 |
NYX | 0:85b3fd62ea1a | 251 | * - Write PE=1. |
NYX | 0:85b3fd62ea1a | 252 | */ |
NYX | 0:85b3fd62ea1a | 253 | handle->Instance->CR1 &= ~I2C_CR1_PE; |
NYX | 0:85b3fd62ea1a | 254 | while(handle->Instance->CR1 & I2C_CR1_PE); |
NYX | 0:85b3fd62ea1a | 255 | handle->Instance->CR1 |= I2C_CR1_PE; |
NYX | 0:85b3fd62ea1a | 256 | } |
NYX | 0:85b3fd62ea1a | 257 | |
NYX | 0:85b3fd62ea1a | 258 | void i2c_init(i2c_t *obj, PinName sda, PinName scl) { |
NYX | 0:85b3fd62ea1a | 259 | |
NYX | 0:85b3fd62ea1a | 260 | struct i2c_s *obj_s = I2C_S(obj); |
NYX | 0:85b3fd62ea1a | 261 | |
NYX | 0:85b3fd62ea1a | 262 | // Determine the I2C to use |
NYX | 0:85b3fd62ea1a | 263 | I2CName i2c_sda = (I2CName)pinmap_peripheral(sda, PinMap_I2C_SDA); |
NYX | 0:85b3fd62ea1a | 264 | I2CName i2c_scl = (I2CName)pinmap_peripheral(scl, PinMap_I2C_SCL); |
NYX | 0:85b3fd62ea1a | 265 | obj_s->sda = sda; |
NYX | 0:85b3fd62ea1a | 266 | obj_s->scl = scl; |
NYX | 0:85b3fd62ea1a | 267 | |
NYX | 0:85b3fd62ea1a | 268 | obj_s->i2c = (I2CName)pinmap_merge(i2c_sda, i2c_scl); |
NYX | 0:85b3fd62ea1a | 269 | MBED_ASSERT(obj_s->i2c != (I2CName)NC); |
NYX | 0:85b3fd62ea1a | 270 | |
NYX | 0:85b3fd62ea1a | 271 | #if defined I2C1_BASE |
NYX | 0:85b3fd62ea1a | 272 | // Enable I2C1 clock and pinout if not done |
NYX | 0:85b3fd62ea1a | 273 | if (obj_s->i2c == I2C_1) { |
NYX | 0:85b3fd62ea1a | 274 | obj_s->index = 0; |
NYX | 0:85b3fd62ea1a | 275 | __HAL_RCC_I2C1_CLK_ENABLE(); |
NYX | 0:85b3fd62ea1a | 276 | // Configure I2C pins |
NYX | 0:85b3fd62ea1a | 277 | pinmap_pinout(sda, PinMap_I2C_SDA); |
NYX | 0:85b3fd62ea1a | 278 | pinmap_pinout(scl, PinMap_I2C_SCL); |
NYX | 0:85b3fd62ea1a | 279 | pin_mode(sda, OpenDrainPullUp); |
NYX | 0:85b3fd62ea1a | 280 | pin_mode(scl, OpenDrainPullUp); |
NYX | 0:85b3fd62ea1a | 281 | obj_s->event_i2cIRQ = I2C1_EV_IRQn; |
NYX | 0:85b3fd62ea1a | 282 | obj_s->error_i2cIRQ = I2C1_ER_IRQn; |
NYX | 0:85b3fd62ea1a | 283 | } |
NYX | 0:85b3fd62ea1a | 284 | #endif |
NYX | 0:85b3fd62ea1a | 285 | #if defined I2C2_BASE |
NYX | 0:85b3fd62ea1a | 286 | // Enable I2C2 clock and pinout if not done |
NYX | 0:85b3fd62ea1a | 287 | if (obj_s->i2c == I2C_2) { |
NYX | 0:85b3fd62ea1a | 288 | obj_s->index = 1; |
NYX | 0:85b3fd62ea1a | 289 | __HAL_RCC_I2C2_CLK_ENABLE(); |
NYX | 0:85b3fd62ea1a | 290 | // Configure I2C pins |
NYX | 0:85b3fd62ea1a | 291 | pinmap_pinout(sda, PinMap_I2C_SDA); |
NYX | 0:85b3fd62ea1a | 292 | pinmap_pinout(scl, PinMap_I2C_SCL); |
NYX | 0:85b3fd62ea1a | 293 | pin_mode(sda, OpenDrainPullUp); |
NYX | 0:85b3fd62ea1a | 294 | pin_mode(scl, OpenDrainPullUp); |
NYX | 0:85b3fd62ea1a | 295 | obj_s->event_i2cIRQ = I2C2_EV_IRQn; |
NYX | 0:85b3fd62ea1a | 296 | obj_s->error_i2cIRQ = I2C2_ER_IRQn; |
NYX | 0:85b3fd62ea1a | 297 | } |
NYX | 0:85b3fd62ea1a | 298 | #endif |
NYX | 0:85b3fd62ea1a | 299 | #if defined I2C3_BASE |
NYX | 0:85b3fd62ea1a | 300 | // Enable I2C3 clock and pinout if not done |
NYX | 0:85b3fd62ea1a | 301 | if (obj_s->i2c == I2C_3) { |
NYX | 0:85b3fd62ea1a | 302 | obj_s->index = 2; |
NYX | 0:85b3fd62ea1a | 303 | __HAL_RCC_I2C3_CLK_ENABLE(); |
NYX | 0:85b3fd62ea1a | 304 | // Configure I2C pins |
NYX | 0:85b3fd62ea1a | 305 | pinmap_pinout(sda, PinMap_I2C_SDA); |
NYX | 0:85b3fd62ea1a | 306 | pinmap_pinout(scl, PinMap_I2C_SCL); |
NYX | 0:85b3fd62ea1a | 307 | pin_mode(sda, OpenDrainPullUp); |
NYX | 0:85b3fd62ea1a | 308 | pin_mode(scl, OpenDrainPullUp); |
NYX | 0:85b3fd62ea1a | 309 | obj_s->event_i2cIRQ = I2C3_EV_IRQn; |
NYX | 0:85b3fd62ea1a | 310 | obj_s->error_i2cIRQ = I2C3_ER_IRQn; |
NYX | 0:85b3fd62ea1a | 311 | } |
NYX | 0:85b3fd62ea1a | 312 | #endif |
NYX | 0:85b3fd62ea1a | 313 | #if defined I2C4_BASE |
NYX | 0:85b3fd62ea1a | 314 | // Enable I2C3 clock and pinout if not done |
NYX | 0:85b3fd62ea1a | 315 | if (obj_s->i2c == I2C_4) { |
NYX | 0:85b3fd62ea1a | 316 | obj_s->index = 3; |
NYX | 0:85b3fd62ea1a | 317 | __HAL_RCC_I2C4_CLK_ENABLE(); |
NYX | 0:85b3fd62ea1a | 318 | // Configure I2C pins |
NYX | 0:85b3fd62ea1a | 319 | pinmap_pinout(sda, PinMap_I2C_SDA); |
NYX | 0:85b3fd62ea1a | 320 | pinmap_pinout(scl, PinMap_I2C_SCL); |
NYX | 0:85b3fd62ea1a | 321 | pin_mode(sda, OpenDrainPullUp); |
NYX | 0:85b3fd62ea1a | 322 | pin_mode(scl, OpenDrainPullUp); |
NYX | 0:85b3fd62ea1a | 323 | obj_s->event_i2cIRQ = I2C4_EV_IRQn; |
NYX | 0:85b3fd62ea1a | 324 | obj_s->error_i2cIRQ = I2C4_ER_IRQn; |
NYX | 0:85b3fd62ea1a | 325 | } |
NYX | 0:85b3fd62ea1a | 326 | #endif |
NYX | 0:85b3fd62ea1a | 327 | #if defined FMPI2C1_BASE |
NYX | 0:85b3fd62ea1a | 328 | // Enable I2C3 clock and pinout if not done |
NYX | 0:85b3fd62ea1a | 329 | if (obj_s->i2c == FMPI2C_1) { |
NYX | 0:85b3fd62ea1a | 330 | obj_s->index = 4; |
NYX | 0:85b3fd62ea1a | 331 | __HAL_RCC_FMPI2C1_CLK_ENABLE(); |
NYX | 0:85b3fd62ea1a | 332 | // Configure I2C pins |
NYX | 0:85b3fd62ea1a | 333 | pinmap_pinout(sda, PinMap_I2C_SDA); |
NYX | 0:85b3fd62ea1a | 334 | pinmap_pinout(scl, PinMap_I2C_SCL); |
NYX | 0:85b3fd62ea1a | 335 | pin_mode(sda, OpenDrainPullUp); |
NYX | 0:85b3fd62ea1a | 336 | pin_mode(scl, OpenDrainPullUp); |
NYX | 0:85b3fd62ea1a | 337 | obj_s->event_i2cIRQ = FMPI2C1_EV_IRQn; |
NYX | 0:85b3fd62ea1a | 338 | obj_s->error_i2cIRQ = FMPI2C1_ER_IRQn; |
NYX | 0:85b3fd62ea1a | 339 | } |
NYX | 0:85b3fd62ea1a | 340 | #endif |
NYX | 0:85b3fd62ea1a | 341 | |
NYX | 0:85b3fd62ea1a | 342 | // I2C configuration |
NYX | 0:85b3fd62ea1a | 343 | // Default hz value used for timeout computation |
NYX | 0:85b3fd62ea1a | 344 | if(!obj_s->hz) |
NYX | 0:85b3fd62ea1a | 345 | obj_s->hz = 100000; // 100 kHz per default |
NYX | 0:85b3fd62ea1a | 346 | |
NYX | 0:85b3fd62ea1a | 347 | // Reset to clear pending flags if any |
NYX | 0:85b3fd62ea1a | 348 | i2c_hw_reset(obj); |
NYX | 0:85b3fd62ea1a | 349 | i2c_frequency(obj, obj_s->hz ); |
NYX | 0:85b3fd62ea1a | 350 | |
NYX | 0:85b3fd62ea1a | 351 | #if DEVICE_I2CSLAVE |
NYX | 0:85b3fd62ea1a | 352 | // I2C master by default |
NYX | 0:85b3fd62ea1a | 353 | obj_s->slave = 0; |
NYX | 0:85b3fd62ea1a | 354 | obj_s->pending_slave_tx_master_rx = 0; |
NYX | 0:85b3fd62ea1a | 355 | obj_s->pending_slave_rx_maxter_tx = 0; |
NYX | 0:85b3fd62ea1a | 356 | #endif |
NYX | 0:85b3fd62ea1a | 357 | |
NYX | 0:85b3fd62ea1a | 358 | // I2C Xfer operation init |
NYX | 0:85b3fd62ea1a | 359 | obj_s->event = 0; |
NYX | 0:85b3fd62ea1a | 360 | obj_s->XferOperation = I2C_FIRST_AND_LAST_FRAME; |
NYX | 0:85b3fd62ea1a | 361 | #ifdef I2C_IP_VERSION_V2 |
NYX | 0:85b3fd62ea1a | 362 | obj_s->pending_start = 0; |
NYX | 0:85b3fd62ea1a | 363 | #endif |
NYX | 0:85b3fd62ea1a | 364 | } |
NYX | 0:85b3fd62ea1a | 365 | |
NYX | 0:85b3fd62ea1a | 366 | void i2c_frequency(i2c_t *obj, int hz) |
NYX | 0:85b3fd62ea1a | 367 | { |
NYX | 0:85b3fd62ea1a | 368 | int timeout; |
NYX | 0:85b3fd62ea1a | 369 | struct i2c_s *obj_s = I2C_S(obj); |
NYX | 0:85b3fd62ea1a | 370 | I2C_HandleTypeDef *handle = &(obj_s->handle); |
NYX | 0:85b3fd62ea1a | 371 | |
NYX | 0:85b3fd62ea1a | 372 | // wait before init |
NYX | 0:85b3fd62ea1a | 373 | timeout = BYTE_TIMEOUT; |
NYX | 0:85b3fd62ea1a | 374 | while ((__HAL_I2C_GET_FLAG(handle, I2C_FLAG_BUSY)) && (--timeout != 0)); |
NYX | 0:85b3fd62ea1a | 375 | |
NYX | 0:85b3fd62ea1a | 376 | #ifdef I2C_IP_VERSION_V1 |
NYX | 0:85b3fd62ea1a | 377 | handle->Init.ClockSpeed = hz; |
NYX | 0:85b3fd62ea1a | 378 | handle->Init.DutyCycle = I2C_DUTYCYCLE_2; |
NYX | 0:85b3fd62ea1a | 379 | #endif |
NYX | 0:85b3fd62ea1a | 380 | #ifdef I2C_IP_VERSION_V2 |
NYX | 0:85b3fd62ea1a | 381 | /* Only predefined timing for below frequencies are supported */ |
NYX | 0:85b3fd62ea1a | 382 | MBED_ASSERT((hz == 100000) || (hz == 400000) || (hz == 1000000)); |
NYX | 0:85b3fd62ea1a | 383 | handle->Init.Timing = get_i2c_timing(hz); |
NYX | 0:85b3fd62ea1a | 384 | |
NYX | 0:85b3fd62ea1a | 385 | // Enable the Fast Mode Plus capability |
NYX | 0:85b3fd62ea1a | 386 | if (hz == 1000000) { |
NYX | 0:85b3fd62ea1a | 387 | #if defined(I2C1_BASE) && defined(__HAL_SYSCFG_FASTMODEPLUS_ENABLE) && defined (I2C_FASTMODEPLUS_I2C1) |
NYX | 0:85b3fd62ea1a | 388 | if (obj_s->i2c == I2C_1) { |
NYX | 0:85b3fd62ea1a | 389 | HAL_I2CEx_EnableFastModePlus(I2C_FASTMODEPLUS_I2C1); |
NYX | 0:85b3fd62ea1a | 390 | } |
NYX | 0:85b3fd62ea1a | 391 | #endif |
NYX | 0:85b3fd62ea1a | 392 | #if defined(I2C2_BASE) && defined(__HAL_SYSCFG_FASTMODEPLUS_ENABLE) && defined (I2C_FASTMODEPLUS_I2C2) |
NYX | 0:85b3fd62ea1a | 393 | if (obj_s->i2c == I2C_2) { |
NYX | 0:85b3fd62ea1a | 394 | HAL_I2CEx_EnableFastModePlus(I2C_FASTMODEPLUS_I2C2); |
NYX | 0:85b3fd62ea1a | 395 | } |
NYX | 0:85b3fd62ea1a | 396 | #endif |
NYX | 0:85b3fd62ea1a | 397 | #if defined(I2C3_BASE) && defined(__HAL_SYSCFG_FASTMODEPLUS_ENABLE) && defined (I2C_FASTMODEPLUS_I2C3) |
NYX | 0:85b3fd62ea1a | 398 | if (obj_s->i2c == I2C_3) { |
NYX | 0:85b3fd62ea1a | 399 | HAL_I2CEx_EnableFastModePlus(I2C_FASTMODEPLUS_I2C3); |
NYX | 0:85b3fd62ea1a | 400 | } |
NYX | 0:85b3fd62ea1a | 401 | #endif |
NYX | 0:85b3fd62ea1a | 402 | #if defined(I2C4_BASE) && defined(__HAL_SYSCFG_FASTMODEPLUS_ENABLE) && defined (I2C_FASTMODEPLUS_I2C4) |
NYX | 0:85b3fd62ea1a | 403 | if (obj_s->i2c == I2C_4) { |
NYX | 0:85b3fd62ea1a | 404 | HAL_I2CEx_EnableFastModePlus(I2C_FASTMODEPLUS_I2C4); |
NYX | 0:85b3fd62ea1a | 405 | } |
NYX | 0:85b3fd62ea1a | 406 | #endif |
NYX | 0:85b3fd62ea1a | 407 | } |
NYX | 0:85b3fd62ea1a | 408 | #endif //I2C_IP_VERSION_V2 |
NYX | 0:85b3fd62ea1a | 409 | |
NYX | 0:85b3fd62ea1a | 410 | /*##-1- Configure the I2C clock source. The clock is derived from the SYSCLK #*/ |
NYX | 0:85b3fd62ea1a | 411 | #if defined(I2C1_BASE) && defined (__HAL_RCC_I2C1_CONFIG) |
NYX | 0:85b3fd62ea1a | 412 | if (obj_s->i2c == I2C_1) { |
NYX | 0:85b3fd62ea1a | 413 | __HAL_RCC_I2C1_CONFIG(I2CAPI_I2C1_CLKSRC); |
NYX | 0:85b3fd62ea1a | 414 | } |
NYX | 0:85b3fd62ea1a | 415 | #endif |
NYX | 0:85b3fd62ea1a | 416 | #if defined(I2C2_BASE) && defined(__HAL_RCC_I2C2_CONFIG) |
NYX | 0:85b3fd62ea1a | 417 | if (obj_s->i2c == I2C_2) { |
NYX | 0:85b3fd62ea1a | 418 | __HAL_RCC_I2C2_CONFIG(I2CAPI_I2C2_CLKSRC); |
NYX | 0:85b3fd62ea1a | 419 | } |
NYX | 0:85b3fd62ea1a | 420 | #endif |
NYX | 0:85b3fd62ea1a | 421 | #if defined(I2C3_BASE) && defined(__HAL_RCC_I2C3_CONFIG) |
NYX | 0:85b3fd62ea1a | 422 | if (obj_s->i2c == I2C_3) { |
NYX | 0:85b3fd62ea1a | 423 | __HAL_RCC_I2C3_CONFIG(I2CAPI_I2C3_CLKSRC); |
NYX | 0:85b3fd62ea1a | 424 | } |
NYX | 0:85b3fd62ea1a | 425 | #endif |
NYX | 0:85b3fd62ea1a | 426 | #if defined(I2C4_BASE) && defined(__HAL_RCC_I2C4_CONFIG) |
NYX | 0:85b3fd62ea1a | 427 | if (obj_s->i2c == I2C_4) { |
NYX | 0:85b3fd62ea1a | 428 | __HAL_RCC_I2C4_CONFIG(I2CAPI_I2C4_CLKSRC); |
NYX | 0:85b3fd62ea1a | 429 | } |
NYX | 0:85b3fd62ea1a | 430 | #endif |
NYX | 0:85b3fd62ea1a | 431 | |
NYX | 0:85b3fd62ea1a | 432 | #ifdef I2C_ANALOGFILTER_ENABLE |
NYX | 0:85b3fd62ea1a | 433 | /* Enable the Analog I2C Filter */ |
NYX | 0:85b3fd62ea1a | 434 | HAL_I2CEx_AnalogFilter_Config(handle,I2C_ANALOGFILTER_ENABLE); |
NYX | 0:85b3fd62ea1a | 435 | #endif |
NYX | 0:85b3fd62ea1a | 436 | |
NYX | 0:85b3fd62ea1a | 437 | // I2C configuration |
NYX | 0:85b3fd62ea1a | 438 | handle->Init.AddressingMode = I2C_ADDRESSINGMODE_7BIT; |
NYX | 0:85b3fd62ea1a | 439 | handle->Init.DualAddressMode = I2C_DUALADDRESS_DISABLE; |
NYX | 0:85b3fd62ea1a | 440 | handle->Init.GeneralCallMode = I2C_GENERALCALL_DISABLE; |
NYX | 0:85b3fd62ea1a | 441 | handle->Init.NoStretchMode = I2C_NOSTRETCH_DISABLE; |
NYX | 0:85b3fd62ea1a | 442 | handle->Init.OwnAddress1 = 0; |
NYX | 0:85b3fd62ea1a | 443 | handle->Init.OwnAddress2 = 0; |
NYX | 0:85b3fd62ea1a | 444 | HAL_I2C_Init(handle); |
NYX | 0:85b3fd62ea1a | 445 | |
NYX | 0:85b3fd62ea1a | 446 | /* store frequency for timeout computation */ |
NYX | 0:85b3fd62ea1a | 447 | obj_s->hz = hz; |
NYX | 0:85b3fd62ea1a | 448 | } |
NYX | 0:85b3fd62ea1a | 449 | |
NYX | 0:85b3fd62ea1a | 450 | i2c_t *get_i2c_obj(I2C_HandleTypeDef *hi2c){ |
NYX | 0:85b3fd62ea1a | 451 | /* Aim of the function is to get i2c_s pointer using hi2c pointer */ |
NYX | 0:85b3fd62ea1a | 452 | /* Highly inspired from magical linux kernel's "container_of" */ |
NYX | 0:85b3fd62ea1a | 453 | /* (which was not directly used since not compatible with IAR toolchain) */ |
NYX | 0:85b3fd62ea1a | 454 | struct i2c_s *obj_s; |
NYX | 0:85b3fd62ea1a | 455 | i2c_t *obj; |
NYX | 0:85b3fd62ea1a | 456 | |
NYX | 0:85b3fd62ea1a | 457 | obj_s = (struct i2c_s *)( (char *)hi2c - offsetof(struct i2c_s,handle)); |
NYX | 0:85b3fd62ea1a | 458 | obj = (i2c_t *)( (char *)obj_s - offsetof(i2c_t,i2c)); |
NYX | 0:85b3fd62ea1a | 459 | |
NYX | 0:85b3fd62ea1a | 460 | return (obj); |
NYX | 0:85b3fd62ea1a | 461 | } |
NYX | 0:85b3fd62ea1a | 462 | |
NYX | 0:85b3fd62ea1a | 463 | void i2c_reset(i2c_t *obj) { |
NYX | 0:85b3fd62ea1a | 464 | struct i2c_s *obj_s = I2C_S(obj); |
NYX | 0:85b3fd62ea1a | 465 | /* As recommended in i2c_api.h, mainly send stop */ |
NYX | 0:85b3fd62ea1a | 466 | i2c_stop(obj); |
NYX | 0:85b3fd62ea1a | 467 | /* then re-init */ |
NYX | 0:85b3fd62ea1a | 468 | i2c_init(obj, obj_s->sda, obj_s->scl); |
NYX | 0:85b3fd62ea1a | 469 | } |
NYX | 0:85b3fd62ea1a | 470 | |
NYX | 0:85b3fd62ea1a | 471 | /* |
NYX | 0:85b3fd62ea1a | 472 | * UNITARY APIS. |
NYX | 0:85b3fd62ea1a | 473 | * For very basic operations, direct registers access is needed |
NYX | 0:85b3fd62ea1a | 474 | * There are 2 different IPs version that need to be supported |
NYX | 0:85b3fd62ea1a | 475 | */ |
NYX | 0:85b3fd62ea1a | 476 | #ifdef I2C_IP_VERSION_V1 |
NYX | 0:85b3fd62ea1a | 477 | int i2c_start(i2c_t *obj) { |
NYX | 0:85b3fd62ea1a | 478 | |
NYX | 0:85b3fd62ea1a | 479 | int timeout; |
NYX | 0:85b3fd62ea1a | 480 | struct i2c_s *obj_s = I2C_S(obj); |
NYX | 0:85b3fd62ea1a | 481 | I2C_HandleTypeDef *handle = &(obj_s->handle); |
NYX | 0:85b3fd62ea1a | 482 | |
NYX | 0:85b3fd62ea1a | 483 | // Clear Acknowledge failure flag |
NYX | 0:85b3fd62ea1a | 484 | __HAL_I2C_CLEAR_FLAG(handle, I2C_FLAG_AF); |
NYX | 0:85b3fd62ea1a | 485 | |
NYX | 0:85b3fd62ea1a | 486 | // Wait the STOP condition has been previously correctly sent |
NYX | 0:85b3fd62ea1a | 487 | // This timeout can be avoid in some specific cases by simply clearing the STOP bit |
NYX | 0:85b3fd62ea1a | 488 | timeout = FLAG_TIMEOUT; |
NYX | 0:85b3fd62ea1a | 489 | while ((handle->Instance->CR1 & I2C_CR1_STOP) == I2C_CR1_STOP) { |
NYX | 0:85b3fd62ea1a | 490 | if ((timeout--) == 0) { |
NYX | 0:85b3fd62ea1a | 491 | return 1; |
NYX | 0:85b3fd62ea1a | 492 | } |
NYX | 0:85b3fd62ea1a | 493 | } |
NYX | 0:85b3fd62ea1a | 494 | |
NYX | 0:85b3fd62ea1a | 495 | // Generate the START condition |
NYX | 0:85b3fd62ea1a | 496 | handle->Instance->CR1 |= I2C_CR1_START; |
NYX | 0:85b3fd62ea1a | 497 | |
NYX | 0:85b3fd62ea1a | 498 | // Wait the START condition has been correctly sent |
NYX | 0:85b3fd62ea1a | 499 | timeout = FLAG_TIMEOUT; |
NYX | 0:85b3fd62ea1a | 500 | while (__HAL_I2C_GET_FLAG(handle, I2C_FLAG_SB) == RESET) { |
NYX | 0:85b3fd62ea1a | 501 | if ((timeout--) == 0) { |
NYX | 0:85b3fd62ea1a | 502 | return 1; |
NYX | 0:85b3fd62ea1a | 503 | } |
NYX | 0:85b3fd62ea1a | 504 | } |
NYX | 0:85b3fd62ea1a | 505 | |
NYX | 0:85b3fd62ea1a | 506 | return 0; |
NYX | 0:85b3fd62ea1a | 507 | } |
NYX | 0:85b3fd62ea1a | 508 | |
NYX | 0:85b3fd62ea1a | 509 | int i2c_stop(i2c_t *obj) { |
NYX | 0:85b3fd62ea1a | 510 | struct i2c_s *obj_s = I2C_S(obj); |
NYX | 0:85b3fd62ea1a | 511 | I2C_TypeDef *i2c = (I2C_TypeDef *)obj_s->i2c; |
NYX | 0:85b3fd62ea1a | 512 | |
NYX | 0:85b3fd62ea1a | 513 | // Generate the STOP condition |
NYX | 0:85b3fd62ea1a | 514 | i2c->CR1 |= I2C_CR1_STOP; |
NYX | 0:85b3fd62ea1a | 515 | |
NYX | 0:85b3fd62ea1a | 516 | /* In case of mixed usage of the APIs (unitary + SYNC) |
NYX | 0:85b3fd62ea1a | 517 | * re-init HAL state |
NYX | 0:85b3fd62ea1a | 518 | */ |
NYX | 0:85b3fd62ea1a | 519 | if(obj_s->XferOperation != I2C_FIRST_AND_LAST_FRAME) |
NYX | 0:85b3fd62ea1a | 520 | i2c_init(obj, obj_s->sda, obj_s->scl); |
NYX | 0:85b3fd62ea1a | 521 | |
NYX | 0:85b3fd62ea1a | 522 | return 0; |
NYX | 0:85b3fd62ea1a | 523 | } |
NYX | 0:85b3fd62ea1a | 524 | |
NYX | 0:85b3fd62ea1a | 525 | int i2c_byte_read(i2c_t *obj, int last) { |
NYX | 0:85b3fd62ea1a | 526 | |
NYX | 0:85b3fd62ea1a | 527 | int timeout; |
NYX | 0:85b3fd62ea1a | 528 | struct i2c_s *obj_s = I2C_S(obj); |
NYX | 0:85b3fd62ea1a | 529 | I2C_HandleTypeDef *handle = &(obj_s->handle); |
NYX | 0:85b3fd62ea1a | 530 | |
NYX | 0:85b3fd62ea1a | 531 | if (last) { |
NYX | 0:85b3fd62ea1a | 532 | // Don't acknowledge the last byte |
NYX | 0:85b3fd62ea1a | 533 | handle->Instance->CR1 &= ~I2C_CR1_ACK; |
NYX | 0:85b3fd62ea1a | 534 | } else { |
NYX | 0:85b3fd62ea1a | 535 | // Acknowledge the byte |
NYX | 0:85b3fd62ea1a | 536 | handle->Instance->CR1 |= I2C_CR1_ACK; |
NYX | 0:85b3fd62ea1a | 537 | } |
NYX | 0:85b3fd62ea1a | 538 | |
NYX | 0:85b3fd62ea1a | 539 | // Wait until the byte is received |
NYX | 0:85b3fd62ea1a | 540 | timeout = FLAG_TIMEOUT; |
NYX | 0:85b3fd62ea1a | 541 | while (__HAL_I2C_GET_FLAG(handle, I2C_FLAG_RXNE) == RESET) { |
NYX | 0:85b3fd62ea1a | 542 | if ((timeout--) == 0) { |
NYX | 0:85b3fd62ea1a | 543 | return -1; |
NYX | 0:85b3fd62ea1a | 544 | } |
NYX | 0:85b3fd62ea1a | 545 | } |
NYX | 0:85b3fd62ea1a | 546 | |
NYX | 0:85b3fd62ea1a | 547 | return (int)handle->Instance->DR; |
NYX | 0:85b3fd62ea1a | 548 | } |
NYX | 0:85b3fd62ea1a | 549 | |
NYX | 0:85b3fd62ea1a | 550 | int i2c_byte_write(i2c_t *obj, int data) { |
NYX | 0:85b3fd62ea1a | 551 | |
NYX | 0:85b3fd62ea1a | 552 | int timeout; |
NYX | 0:85b3fd62ea1a | 553 | struct i2c_s *obj_s = I2C_S(obj); |
NYX | 0:85b3fd62ea1a | 554 | I2C_HandleTypeDef *handle = &(obj_s->handle); |
NYX | 0:85b3fd62ea1a | 555 | |
NYX | 0:85b3fd62ea1a | 556 | handle->Instance->DR = (uint8_t)data; |
NYX | 0:85b3fd62ea1a | 557 | |
NYX | 0:85b3fd62ea1a | 558 | // Wait until the byte (might be the address) is transmitted |
NYX | 0:85b3fd62ea1a | 559 | timeout = FLAG_TIMEOUT; |
NYX | 0:85b3fd62ea1a | 560 | while ((__HAL_I2C_GET_FLAG(handle, I2C_FLAG_TXE) == RESET) && |
NYX | 0:85b3fd62ea1a | 561 | (__HAL_I2C_GET_FLAG(handle, I2C_FLAG_BTF) == RESET) && |
NYX | 0:85b3fd62ea1a | 562 | (__HAL_I2C_GET_FLAG(handle, I2C_FLAG_ADDR) == RESET)) { |
NYX | 0:85b3fd62ea1a | 563 | if ((timeout--) == 0) { |
NYX | 0:85b3fd62ea1a | 564 | return 2; |
NYX | 0:85b3fd62ea1a | 565 | } |
NYX | 0:85b3fd62ea1a | 566 | } |
NYX | 0:85b3fd62ea1a | 567 | |
NYX | 0:85b3fd62ea1a | 568 | if (__HAL_I2C_GET_FLAG(handle, I2C_FLAG_ADDR) != RESET) |
NYX | 0:85b3fd62ea1a | 569 | { |
NYX | 0:85b3fd62ea1a | 570 | __HAL_I2C_CLEAR_ADDRFLAG(handle); |
NYX | 0:85b3fd62ea1a | 571 | } |
NYX | 0:85b3fd62ea1a | 572 | |
NYX | 0:85b3fd62ea1a | 573 | return 1; |
NYX | 0:85b3fd62ea1a | 574 | } |
NYX | 0:85b3fd62ea1a | 575 | #endif //I2C_IP_VERSION_V1 |
NYX | 0:85b3fd62ea1a | 576 | #ifdef I2C_IP_VERSION_V2 |
NYX | 0:85b3fd62ea1a | 577 | |
NYX | 0:85b3fd62ea1a | 578 | int i2c_start(i2c_t *obj) { |
NYX | 0:85b3fd62ea1a | 579 | struct i2c_s *obj_s = I2C_S(obj); |
NYX | 0:85b3fd62ea1a | 580 | /* This I2C IP doesn't */ |
NYX | 0:85b3fd62ea1a | 581 | obj_s->pending_start = 1; |
NYX | 0:85b3fd62ea1a | 582 | return 0; |
NYX | 0:85b3fd62ea1a | 583 | } |
NYX | 0:85b3fd62ea1a | 584 | |
NYX | 0:85b3fd62ea1a | 585 | int i2c_stop(i2c_t *obj) { |
NYX | 0:85b3fd62ea1a | 586 | struct i2c_s *obj_s = I2C_S(obj); |
NYX | 0:85b3fd62ea1a | 587 | I2C_HandleTypeDef *handle = &(obj_s->handle); |
NYX | 0:85b3fd62ea1a | 588 | int timeout = FLAG_TIMEOUT; |
NYX | 0:85b3fd62ea1a | 589 | #if DEVICE_I2CSLAVE |
NYX | 0:85b3fd62ea1a | 590 | if (obj_s->slave) { |
NYX | 0:85b3fd62ea1a | 591 | /* re-init slave when stop is requested */ |
NYX | 0:85b3fd62ea1a | 592 | i2c_init(obj, obj_s->sda, obj_s->scl); |
NYX | 0:85b3fd62ea1a | 593 | return 0; |
NYX | 0:85b3fd62ea1a | 594 | } |
NYX | 0:85b3fd62ea1a | 595 | #endif |
NYX | 0:85b3fd62ea1a | 596 | // Disable reload mode |
NYX | 0:85b3fd62ea1a | 597 | handle->Instance->CR2 &= (uint32_t)~I2C_CR2_RELOAD; |
NYX | 0:85b3fd62ea1a | 598 | // Generate the STOP condition |
NYX | 0:85b3fd62ea1a | 599 | handle->Instance->CR2 |= I2C_CR2_STOP; |
NYX | 0:85b3fd62ea1a | 600 | |
NYX | 0:85b3fd62ea1a | 601 | timeout = FLAG_TIMEOUT; |
NYX | 0:85b3fd62ea1a | 602 | while (!__HAL_I2C_GET_FLAG(handle, I2C_FLAG_STOPF)) { |
NYX | 0:85b3fd62ea1a | 603 | if ((timeout--) == 0) { |
NYX | 0:85b3fd62ea1a | 604 | return I2C_ERROR_BUS_BUSY; |
NYX | 0:85b3fd62ea1a | 605 | } |
NYX | 0:85b3fd62ea1a | 606 | } |
NYX | 0:85b3fd62ea1a | 607 | |
NYX | 0:85b3fd62ea1a | 608 | /* Clear STOP Flag */ |
NYX | 0:85b3fd62ea1a | 609 | __HAL_I2C_CLEAR_FLAG(handle, I2C_FLAG_STOPF); |
NYX | 0:85b3fd62ea1a | 610 | |
NYX | 0:85b3fd62ea1a | 611 | /* Erase slave address, this wiil be used as a marker |
NYX | 0:85b3fd62ea1a | 612 | * to know when we need to prepare next start */ |
NYX | 0:85b3fd62ea1a | 613 | handle->Instance->CR2 &= ~I2C_CR2_SADD; |
NYX | 0:85b3fd62ea1a | 614 | |
NYX | 0:85b3fd62ea1a | 615 | /* |
NYX | 0:85b3fd62ea1a | 616 | * V2 IP is meant for automatic STOP, not user STOP |
NYX | 0:85b3fd62ea1a | 617 | * SW reset the IP state machine before next transaction |
NYX | 0:85b3fd62ea1a | 618 | */ |
NYX | 0:85b3fd62ea1a | 619 | i2c_sw_reset(obj); |
NYX | 0:85b3fd62ea1a | 620 | |
NYX | 0:85b3fd62ea1a | 621 | /* In case of mixed usage of the APIs (unitary + SYNC) |
NYX | 0:85b3fd62ea1a | 622 | * re-init HAL state */ |
NYX | 0:85b3fd62ea1a | 623 | if (obj_s->XferOperation != I2C_FIRST_AND_LAST_FRAME) { |
NYX | 0:85b3fd62ea1a | 624 | i2c_init(obj, obj_s->sda, obj_s->scl); |
NYX | 0:85b3fd62ea1a | 625 | } |
NYX | 0:85b3fd62ea1a | 626 | |
NYX | 0:85b3fd62ea1a | 627 | return 0; |
NYX | 0:85b3fd62ea1a | 628 | } |
NYX | 0:85b3fd62ea1a | 629 | |
NYX | 0:85b3fd62ea1a | 630 | int i2c_byte_read(i2c_t *obj, int last) { |
NYX | 0:85b3fd62ea1a | 631 | struct i2c_s *obj_s = I2C_S(obj); |
NYX | 0:85b3fd62ea1a | 632 | I2C_HandleTypeDef *handle = &(obj_s->handle); |
NYX | 0:85b3fd62ea1a | 633 | int timeout = FLAG_TIMEOUT; |
NYX | 0:85b3fd62ea1a | 634 | uint32_t tmpreg = handle->Instance->CR2; |
NYX | 0:85b3fd62ea1a | 635 | char data; |
NYX | 0:85b3fd62ea1a | 636 | #if DEVICE_I2CSLAVE |
NYX | 0:85b3fd62ea1a | 637 | if (obj_s->slave) { |
NYX | 0:85b3fd62ea1a | 638 | return i2c_slave_read(obj, &data, 1); |
NYX | 0:85b3fd62ea1a | 639 | } |
NYX | 0:85b3fd62ea1a | 640 | #endif |
NYX | 0:85b3fd62ea1a | 641 | /* Then send data when there's room in the TX fifo */ |
NYX | 0:85b3fd62ea1a | 642 | if ((tmpreg & I2C_CR2_RELOAD) != 0) { |
NYX | 0:85b3fd62ea1a | 643 | while (!__HAL_I2C_GET_FLAG(handle, I2C_FLAG_TCR)) { |
NYX | 0:85b3fd62ea1a | 644 | if ((timeout--) == 0) { |
NYX | 0:85b3fd62ea1a | 645 | DEBUG_PRINTF("timeout in byte_read\r\n"); |
NYX | 0:85b3fd62ea1a | 646 | return -1; |
NYX | 0:85b3fd62ea1a | 647 | } |
NYX | 0:85b3fd62ea1a | 648 | } |
NYX | 0:85b3fd62ea1a | 649 | } |
NYX | 0:85b3fd62ea1a | 650 | |
NYX | 0:85b3fd62ea1a | 651 | /* Enable reload mode as we don't know how many bytes will be sent */ |
NYX | 0:85b3fd62ea1a | 652 | /* and set transfer size to 1 */ |
NYX | 0:85b3fd62ea1a | 653 | tmpreg |= I2C_CR2_RELOAD | (I2C_CR2_NBYTES & (1 << 16)); |
NYX | 0:85b3fd62ea1a | 654 | /* Set the prepared configuration */ |
NYX | 0:85b3fd62ea1a | 655 | handle->Instance->CR2 = tmpreg; |
NYX | 0:85b3fd62ea1a | 656 | |
NYX | 0:85b3fd62ea1a | 657 | timeout = FLAG_TIMEOUT; |
NYX | 0:85b3fd62ea1a | 658 | while (!__HAL_I2C_GET_FLAG(handle, I2C_FLAG_RXNE)) { |
NYX | 0:85b3fd62ea1a | 659 | if ((timeout--) == 0) { |
NYX | 0:85b3fd62ea1a | 660 | return -1; |
NYX | 0:85b3fd62ea1a | 661 | } |
NYX | 0:85b3fd62ea1a | 662 | } |
NYX | 0:85b3fd62ea1a | 663 | |
NYX | 0:85b3fd62ea1a | 664 | /* Then Get Byte */ |
NYX | 0:85b3fd62ea1a | 665 | data = handle->Instance->RXDR; |
NYX | 0:85b3fd62ea1a | 666 | |
NYX | 0:85b3fd62ea1a | 667 | if (last) { |
NYX | 0:85b3fd62ea1a | 668 | /* Disable Address Acknowledge */ |
NYX | 0:85b3fd62ea1a | 669 | handle->Instance->CR2 |= I2C_CR2_NACK; |
NYX | 0:85b3fd62ea1a | 670 | } |
NYX | 0:85b3fd62ea1a | 671 | |
NYX | 0:85b3fd62ea1a | 672 | return data; |
NYX | 0:85b3fd62ea1a | 673 | } |
NYX | 0:85b3fd62ea1a | 674 | |
NYX | 0:85b3fd62ea1a | 675 | int i2c_byte_write(i2c_t *obj, int data) { |
NYX | 0:85b3fd62ea1a | 676 | struct i2c_s *obj_s = I2C_S(obj); |
NYX | 0:85b3fd62ea1a | 677 | I2C_HandleTypeDef *handle = &(obj_s->handle); |
NYX | 0:85b3fd62ea1a | 678 | int timeout = FLAG_TIMEOUT; |
NYX | 0:85b3fd62ea1a | 679 | uint32_t tmpreg = handle->Instance->CR2; |
NYX | 0:85b3fd62ea1a | 680 | #if DEVICE_I2CSLAVE |
NYX | 0:85b3fd62ea1a | 681 | if (obj_s->slave) { |
NYX | 0:85b3fd62ea1a | 682 | return i2c_slave_write(obj, (char *) &data, 1); |
NYX | 0:85b3fd62ea1a | 683 | } |
NYX | 0:85b3fd62ea1a | 684 | #endif |
NYX | 0:85b3fd62ea1a | 685 | if (obj_s->pending_start) { |
NYX | 0:85b3fd62ea1a | 686 | obj_s->pending_start = 0; |
NYX | 0:85b3fd62ea1a | 687 | //* First byte after the start is the address */ |
NYX | 0:85b3fd62ea1a | 688 | tmpreg |= (uint32_t)((uint32_t)data & I2C_CR2_SADD); |
NYX | 0:85b3fd62ea1a | 689 | if (data & 0x01) { |
NYX | 0:85b3fd62ea1a | 690 | tmpreg |= I2C_CR2_START | I2C_CR2_RD_WRN; |
NYX | 0:85b3fd62ea1a | 691 | } else { |
NYX | 0:85b3fd62ea1a | 692 | tmpreg |= I2C_CR2_START; |
NYX | 0:85b3fd62ea1a | 693 | tmpreg &= ~I2C_CR2_RD_WRN; |
NYX | 0:85b3fd62ea1a | 694 | } |
NYX | 0:85b3fd62ea1a | 695 | /* Disable reload first to use it later */ |
NYX | 0:85b3fd62ea1a | 696 | tmpreg &= ~I2C_CR2_RELOAD; |
NYX | 0:85b3fd62ea1a | 697 | /* Disable Autoend */ |
NYX | 0:85b3fd62ea1a | 698 | tmpreg &= ~I2C_CR2_AUTOEND; |
NYX | 0:85b3fd62ea1a | 699 | /* Do not set any transfer size for now */ |
NYX | 0:85b3fd62ea1a | 700 | tmpreg |= (I2C_CR2_NBYTES & (1 << 16)); |
NYX | 0:85b3fd62ea1a | 701 | /* Set the prepared configuration */ |
NYX | 0:85b3fd62ea1a | 702 | handle->Instance->CR2 = tmpreg; |
NYX | 0:85b3fd62ea1a | 703 | } else { |
NYX | 0:85b3fd62ea1a | 704 | /* Set the prepared configuration */ |
NYX | 0:85b3fd62ea1a | 705 | tmpreg = handle->Instance->CR2; |
NYX | 0:85b3fd62ea1a | 706 | |
NYX | 0:85b3fd62ea1a | 707 | /* Then send data when there's room in the TX fifo */ |
NYX | 0:85b3fd62ea1a | 708 | if ((tmpreg & I2C_CR2_RELOAD) != 0) { |
NYX | 0:85b3fd62ea1a | 709 | while (!__HAL_I2C_GET_FLAG(handle, I2C_FLAG_TCR)) { |
NYX | 0:85b3fd62ea1a | 710 | if ((timeout--) == 0) { |
NYX | 0:85b3fd62ea1a | 711 | DEBUG_PRINTF("timeout in byte_write\r\n"); |
NYX | 0:85b3fd62ea1a | 712 | return 2; |
NYX | 0:85b3fd62ea1a | 713 | } |
NYX | 0:85b3fd62ea1a | 714 | } |
NYX | 0:85b3fd62ea1a | 715 | } |
NYX | 0:85b3fd62ea1a | 716 | /* Enable reload mode as we don't know how many bytes will eb sent */ |
NYX | 0:85b3fd62ea1a | 717 | tmpreg |= I2C_CR2_RELOAD; |
NYX | 0:85b3fd62ea1a | 718 | /* Set transfer size to 1 */ |
NYX | 0:85b3fd62ea1a | 719 | tmpreg |= (I2C_CR2_NBYTES & (1 << 16)); |
NYX | 0:85b3fd62ea1a | 720 | /* Set the prepared configuration */ |
NYX | 0:85b3fd62ea1a | 721 | handle->Instance->CR2 = tmpreg; |
NYX | 0:85b3fd62ea1a | 722 | /* Prepare next write */ |
NYX | 0:85b3fd62ea1a | 723 | timeout = FLAG_TIMEOUT; |
NYX | 0:85b3fd62ea1a | 724 | while (!__HAL_I2C_GET_FLAG(handle, I2C_FLAG_TXE)) { |
NYX | 0:85b3fd62ea1a | 725 | if ((timeout--) == 0) { |
NYX | 0:85b3fd62ea1a | 726 | return 2; |
NYX | 0:85b3fd62ea1a | 727 | } |
NYX | 0:85b3fd62ea1a | 728 | } |
NYX | 0:85b3fd62ea1a | 729 | /* Write byte */ |
NYX | 0:85b3fd62ea1a | 730 | handle->Instance->TXDR = data; |
NYX | 0:85b3fd62ea1a | 731 | } |
NYX | 0:85b3fd62ea1a | 732 | |
NYX | 0:85b3fd62ea1a | 733 | return 1; |
NYX | 0:85b3fd62ea1a | 734 | } |
NYX | 0:85b3fd62ea1a | 735 | #endif //I2C_IP_VERSION_V2 |
NYX | 0:85b3fd62ea1a | 736 | |
NYX | 0:85b3fd62ea1a | 737 | /* |
NYX | 0:85b3fd62ea1a | 738 | * SYNC APIS |
NYX | 0:85b3fd62ea1a | 739 | */ |
NYX | 0:85b3fd62ea1a | 740 | int i2c_read(i2c_t *obj, int address, char *data, int length, int stop) { |
NYX | 0:85b3fd62ea1a | 741 | struct i2c_s *obj_s = I2C_S(obj); |
NYX | 0:85b3fd62ea1a | 742 | I2C_HandleTypeDef *handle = &(obj_s->handle); |
NYX | 0:85b3fd62ea1a | 743 | int count = I2C_ERROR_BUS_BUSY, ret = 0; |
NYX | 0:85b3fd62ea1a | 744 | uint32_t timeout = 0; |
NYX | 0:85b3fd62ea1a | 745 | |
NYX | 0:85b3fd62ea1a | 746 | if ((obj_s->XferOperation == I2C_FIRST_AND_LAST_FRAME) || |
NYX | 0:85b3fd62ea1a | 747 | (obj_s->XferOperation == I2C_LAST_FRAME)) { |
NYX | 0:85b3fd62ea1a | 748 | if (stop) |
NYX | 0:85b3fd62ea1a | 749 | obj_s->XferOperation = I2C_FIRST_AND_LAST_FRAME; |
NYX | 0:85b3fd62ea1a | 750 | else |
NYX | 0:85b3fd62ea1a | 751 | obj_s->XferOperation = I2C_FIRST_FRAME; |
NYX | 0:85b3fd62ea1a | 752 | } else if ((obj_s->XferOperation == I2C_FIRST_FRAME) || |
NYX | 0:85b3fd62ea1a | 753 | (obj_s->XferOperation == I2C_NEXT_FRAME)) { |
NYX | 0:85b3fd62ea1a | 754 | if (stop) |
NYX | 0:85b3fd62ea1a | 755 | obj_s->XferOperation = I2C_LAST_FRAME; |
NYX | 0:85b3fd62ea1a | 756 | else |
NYX | 0:85b3fd62ea1a | 757 | obj_s->XferOperation = I2C_NEXT_FRAME; |
NYX | 0:85b3fd62ea1a | 758 | } |
NYX | 0:85b3fd62ea1a | 759 | |
NYX | 0:85b3fd62ea1a | 760 | obj_s->event = 0; |
NYX | 0:85b3fd62ea1a | 761 | |
NYX | 0:85b3fd62ea1a | 762 | /* Activate default IRQ handlers for sync mode |
NYX | 0:85b3fd62ea1a | 763 | * which would be overwritten in async mode |
NYX | 0:85b3fd62ea1a | 764 | */ |
NYX | 0:85b3fd62ea1a | 765 | i2c_ev_err_enable(obj, i2c_get_irq_handler(obj)); |
NYX | 0:85b3fd62ea1a | 766 | |
NYX | 0:85b3fd62ea1a | 767 | ret = HAL_I2C_Master_Sequential_Receive_IT(handle, address, (uint8_t *) data, length, obj_s->XferOperation); |
NYX | 0:85b3fd62ea1a | 768 | |
NYX | 0:85b3fd62ea1a | 769 | if(ret == HAL_OK) { |
NYX | 0:85b3fd62ea1a | 770 | timeout = BYTE_TIMEOUT_US * (length + 1); |
NYX | 0:85b3fd62ea1a | 771 | /* transfer started : wait completion or timeout */ |
NYX | 0:85b3fd62ea1a | 772 | while(!(obj_s->event & I2C_EVENT_ALL) && (--timeout != 0)) { |
NYX | 0:85b3fd62ea1a | 773 | wait_us(1); |
NYX | 0:85b3fd62ea1a | 774 | } |
NYX | 0:85b3fd62ea1a | 775 | |
NYX | 0:85b3fd62ea1a | 776 | i2c_ev_err_disable(obj); |
NYX | 0:85b3fd62ea1a | 777 | |
NYX | 0:85b3fd62ea1a | 778 | if((timeout == 0) || (obj_s->event != I2C_EVENT_TRANSFER_COMPLETE)) { |
NYX | 0:85b3fd62ea1a | 779 | DEBUG_PRINTF(" TIMEOUT or error in i2c_read\r\n"); |
NYX | 0:85b3fd62ea1a | 780 | /* re-init IP to try and get back in a working state */ |
NYX | 0:85b3fd62ea1a | 781 | i2c_init(obj, obj_s->sda, obj_s->scl); |
NYX | 0:85b3fd62ea1a | 782 | } else { |
NYX | 0:85b3fd62ea1a | 783 | count = length; |
NYX | 0:85b3fd62ea1a | 784 | } |
NYX | 0:85b3fd62ea1a | 785 | } else { |
NYX | 0:85b3fd62ea1a | 786 | DEBUG_PRINTF("ERROR in i2c_read:%d\r\n", ret); |
NYX | 0:85b3fd62ea1a | 787 | } |
NYX | 0:85b3fd62ea1a | 788 | |
NYX | 0:85b3fd62ea1a | 789 | return count; |
NYX | 0:85b3fd62ea1a | 790 | } |
NYX | 0:85b3fd62ea1a | 791 | |
NYX | 0:85b3fd62ea1a | 792 | int i2c_write(i2c_t *obj, int address, const char *data, int length, int stop) { |
NYX | 0:85b3fd62ea1a | 793 | struct i2c_s *obj_s = I2C_S(obj); |
NYX | 0:85b3fd62ea1a | 794 | I2C_HandleTypeDef *handle = &(obj_s->handle); |
NYX | 0:85b3fd62ea1a | 795 | int count = I2C_ERROR_BUS_BUSY, ret = 0; |
NYX | 0:85b3fd62ea1a | 796 | uint32_t timeout = 0; |
NYX | 0:85b3fd62ea1a | 797 | |
NYX | 0:85b3fd62ea1a | 798 | if ((obj_s->XferOperation == I2C_FIRST_AND_LAST_FRAME) || |
NYX | 0:85b3fd62ea1a | 799 | (obj_s->XferOperation == I2C_LAST_FRAME)) { |
NYX | 0:85b3fd62ea1a | 800 | if (stop) |
NYX | 0:85b3fd62ea1a | 801 | obj_s->XferOperation = I2C_FIRST_AND_LAST_FRAME; |
NYX | 0:85b3fd62ea1a | 802 | else |
NYX | 0:85b3fd62ea1a | 803 | obj_s->XferOperation = I2C_FIRST_FRAME; |
NYX | 0:85b3fd62ea1a | 804 | } else if ((obj_s->XferOperation == I2C_FIRST_FRAME) || |
NYX | 0:85b3fd62ea1a | 805 | (obj_s->XferOperation == I2C_NEXT_FRAME)) { |
NYX | 0:85b3fd62ea1a | 806 | if (stop) |
NYX | 0:85b3fd62ea1a | 807 | obj_s->XferOperation = I2C_LAST_FRAME; |
NYX | 0:85b3fd62ea1a | 808 | else |
NYX | 0:85b3fd62ea1a | 809 | obj_s->XferOperation = I2C_NEXT_FRAME; |
NYX | 0:85b3fd62ea1a | 810 | } |
NYX | 0:85b3fd62ea1a | 811 | |
NYX | 0:85b3fd62ea1a | 812 | obj_s->event = 0; |
NYX | 0:85b3fd62ea1a | 813 | |
NYX | 0:85b3fd62ea1a | 814 | i2c_ev_err_enable(obj, i2c_get_irq_handler(obj)); |
NYX | 0:85b3fd62ea1a | 815 | |
NYX | 0:85b3fd62ea1a | 816 | ret = HAL_I2C_Master_Sequential_Transmit_IT(handle, address, (uint8_t *) data, length, obj_s->XferOperation); |
NYX | 0:85b3fd62ea1a | 817 | |
NYX | 0:85b3fd62ea1a | 818 | if(ret == HAL_OK) { |
NYX | 0:85b3fd62ea1a | 819 | timeout = BYTE_TIMEOUT_US * (length + 1); |
NYX | 0:85b3fd62ea1a | 820 | /* transfer started : wait completion or timeout */ |
NYX | 0:85b3fd62ea1a | 821 | while(!(obj_s->event & I2C_EVENT_ALL) && (--timeout != 0)) { |
NYX | 0:85b3fd62ea1a | 822 | wait_us(1); |
NYX | 0:85b3fd62ea1a | 823 | } |
NYX | 0:85b3fd62ea1a | 824 | |
NYX | 0:85b3fd62ea1a | 825 | i2c_ev_err_disable(obj); |
NYX | 0:85b3fd62ea1a | 826 | |
NYX | 0:85b3fd62ea1a | 827 | if((timeout == 0) || (obj_s->event != I2C_EVENT_TRANSFER_COMPLETE)) { |
NYX | 0:85b3fd62ea1a | 828 | DEBUG_PRINTF(" TIMEOUT or error in i2c_write\r\n"); |
NYX | 0:85b3fd62ea1a | 829 | /* re-init IP to try and get back in a working state */ |
NYX | 0:85b3fd62ea1a | 830 | i2c_init(obj, obj_s->sda, obj_s->scl); |
NYX | 0:85b3fd62ea1a | 831 | } else { |
NYX | 0:85b3fd62ea1a | 832 | count = length; |
NYX | 0:85b3fd62ea1a | 833 | } |
NYX | 0:85b3fd62ea1a | 834 | } else { |
NYX | 0:85b3fd62ea1a | 835 | DEBUG_PRINTF("ERROR in i2c_read\r\n"); |
NYX | 0:85b3fd62ea1a | 836 | } |
NYX | 0:85b3fd62ea1a | 837 | |
NYX | 0:85b3fd62ea1a | 838 | return count; |
NYX | 0:85b3fd62ea1a | 839 | } |
NYX | 0:85b3fd62ea1a | 840 | |
NYX | 0:85b3fd62ea1a | 841 | void HAL_I2C_MasterTxCpltCallback(I2C_HandleTypeDef *hi2c){ |
NYX | 0:85b3fd62ea1a | 842 | /* Get object ptr based on handler ptr */ |
NYX | 0:85b3fd62ea1a | 843 | i2c_t *obj = get_i2c_obj(hi2c); |
NYX | 0:85b3fd62ea1a | 844 | struct i2c_s *obj_s = I2C_S(obj); |
NYX | 0:85b3fd62ea1a | 845 | |
NYX | 0:85b3fd62ea1a | 846 | #if DEVICE_I2C_ASYNCH |
NYX | 0:85b3fd62ea1a | 847 | /* Handle potential Tx/Rx use case */ |
NYX | 0:85b3fd62ea1a | 848 | if ((obj->tx_buff.length) && (obj->rx_buff.length)) { |
NYX | 0:85b3fd62ea1a | 849 | if (obj_s->stop) { |
NYX | 0:85b3fd62ea1a | 850 | obj_s->XferOperation = I2C_LAST_FRAME; |
NYX | 0:85b3fd62ea1a | 851 | } else { |
NYX | 0:85b3fd62ea1a | 852 | obj_s->XferOperation = I2C_NEXT_FRAME; |
NYX | 0:85b3fd62ea1a | 853 | } |
NYX | 0:85b3fd62ea1a | 854 | |
NYX | 0:85b3fd62ea1a | 855 | HAL_I2C_Master_Sequential_Receive_IT(hi2c, obj_s->address, (uint8_t*)obj->rx_buff.buffer , obj->rx_buff.length, obj_s->XferOperation); |
NYX | 0:85b3fd62ea1a | 856 | } |
NYX | 0:85b3fd62ea1a | 857 | else |
NYX | 0:85b3fd62ea1a | 858 | #endif |
NYX | 0:85b3fd62ea1a | 859 | { |
NYX | 0:85b3fd62ea1a | 860 | /* Set event flag */ |
NYX | 0:85b3fd62ea1a | 861 | obj_s->event = I2C_EVENT_TRANSFER_COMPLETE; |
NYX | 0:85b3fd62ea1a | 862 | } |
NYX | 0:85b3fd62ea1a | 863 | } |
NYX | 0:85b3fd62ea1a | 864 | |
NYX | 0:85b3fd62ea1a | 865 | void HAL_I2C_MasterRxCpltCallback(I2C_HandleTypeDef *hi2c){ |
NYX | 0:85b3fd62ea1a | 866 | /* Get object ptr based on handler ptr */ |
NYX | 0:85b3fd62ea1a | 867 | i2c_t *obj = get_i2c_obj(hi2c); |
NYX | 0:85b3fd62ea1a | 868 | struct i2c_s *obj_s = I2C_S(obj); |
NYX | 0:85b3fd62ea1a | 869 | |
NYX | 0:85b3fd62ea1a | 870 | /* Set event flag */ |
NYX | 0:85b3fd62ea1a | 871 | obj_s->event = I2C_EVENT_TRANSFER_COMPLETE; |
NYX | 0:85b3fd62ea1a | 872 | } |
NYX | 0:85b3fd62ea1a | 873 | |
NYX | 0:85b3fd62ea1a | 874 | void HAL_I2C_ErrorCallback(I2C_HandleTypeDef *hi2c){ |
NYX | 0:85b3fd62ea1a | 875 | /* Get object ptr based on handler ptr */ |
NYX | 0:85b3fd62ea1a | 876 | i2c_t *obj = get_i2c_obj(hi2c); |
NYX | 0:85b3fd62ea1a | 877 | struct i2c_s *obj_s = I2C_S(obj); |
NYX | 0:85b3fd62ea1a | 878 | #if DEVICE_I2CSLAVE |
NYX | 0:85b3fd62ea1a | 879 | I2C_HandleTypeDef *handle = &(obj_s->handle); |
NYX | 0:85b3fd62ea1a | 880 | uint32_t address = 0; |
NYX | 0:85b3fd62ea1a | 881 | /* Store address to handle it after reset */ |
NYX | 0:85b3fd62ea1a | 882 | if(obj_s->slave) |
NYX | 0:85b3fd62ea1a | 883 | address = handle->Init.OwnAddress1; |
NYX | 0:85b3fd62ea1a | 884 | #endif |
NYX | 0:85b3fd62ea1a | 885 | |
NYX | 0:85b3fd62ea1a | 886 | DEBUG_PRINTF("HAL_I2C_ErrorCallback:%d, index=%d\r\n", (int) hi2c->ErrorCode, obj_s->index); |
NYX | 0:85b3fd62ea1a | 887 | |
NYX | 0:85b3fd62ea1a | 888 | /* re-init IP to try and get back in a working state */ |
NYX | 0:85b3fd62ea1a | 889 | i2c_init(obj, obj_s->sda, obj_s->scl); |
NYX | 0:85b3fd62ea1a | 890 | |
NYX | 0:85b3fd62ea1a | 891 | #if DEVICE_I2CSLAVE |
NYX | 0:85b3fd62ea1a | 892 | /* restore slave address */ |
NYX | 0:85b3fd62ea1a | 893 | if (address != 0) { |
NYX | 0:85b3fd62ea1a | 894 | obj_s->slave = 1; |
NYX | 0:85b3fd62ea1a | 895 | i2c_slave_address(obj, 0, address, 0); |
NYX | 0:85b3fd62ea1a | 896 | } |
NYX | 0:85b3fd62ea1a | 897 | #endif |
NYX | 0:85b3fd62ea1a | 898 | |
NYX | 0:85b3fd62ea1a | 899 | /* Keep Set event flag */ |
NYX | 0:85b3fd62ea1a | 900 | obj_s->event = I2C_EVENT_ERROR; |
NYX | 0:85b3fd62ea1a | 901 | } |
NYX | 0:85b3fd62ea1a | 902 | |
NYX | 0:85b3fd62ea1a | 903 | #if DEVICE_I2CSLAVE |
NYX | 0:85b3fd62ea1a | 904 | /* SLAVE API FUNCTIONS */ |
NYX | 0:85b3fd62ea1a | 905 | void i2c_slave_address(i2c_t *obj, int idx, uint32_t address, uint32_t mask) { |
NYX | 0:85b3fd62ea1a | 906 | struct i2c_s *obj_s = I2C_S(obj); |
NYX | 0:85b3fd62ea1a | 907 | I2C_HandleTypeDef *handle = &(obj_s->handle); |
NYX | 0:85b3fd62ea1a | 908 | |
NYX | 0:85b3fd62ea1a | 909 | // I2C configuration |
NYX | 0:85b3fd62ea1a | 910 | handle->Init.OwnAddress1 = address; |
NYX | 0:85b3fd62ea1a | 911 | HAL_I2C_Init(handle); |
NYX | 0:85b3fd62ea1a | 912 | |
NYX | 0:85b3fd62ea1a | 913 | i2c_ev_err_enable(obj, i2c_get_irq_handler(obj)); |
NYX | 0:85b3fd62ea1a | 914 | |
NYX | 0:85b3fd62ea1a | 915 | HAL_I2C_EnableListen_IT(handle); |
NYX | 0:85b3fd62ea1a | 916 | } |
NYX | 0:85b3fd62ea1a | 917 | |
NYX | 0:85b3fd62ea1a | 918 | void i2c_slave_mode(i2c_t *obj, int enable_slave) { |
NYX | 0:85b3fd62ea1a | 919 | |
NYX | 0:85b3fd62ea1a | 920 | struct i2c_s *obj_s = I2C_S(obj); |
NYX | 0:85b3fd62ea1a | 921 | I2C_HandleTypeDef *handle = &(obj_s->handle); |
NYX | 0:85b3fd62ea1a | 922 | |
NYX | 0:85b3fd62ea1a | 923 | if (enable_slave) { |
NYX | 0:85b3fd62ea1a | 924 | obj_s->slave = 1; |
NYX | 0:85b3fd62ea1a | 925 | HAL_I2C_EnableListen_IT(handle); |
NYX | 0:85b3fd62ea1a | 926 | } else { |
NYX | 0:85b3fd62ea1a | 927 | obj_s->slave = 0; |
NYX | 0:85b3fd62ea1a | 928 | HAL_I2C_DisableListen_IT(handle); |
NYX | 0:85b3fd62ea1a | 929 | } |
NYX | 0:85b3fd62ea1a | 930 | } |
NYX | 0:85b3fd62ea1a | 931 | |
NYX | 0:85b3fd62ea1a | 932 | // See I2CSlave.h |
NYX | 0:85b3fd62ea1a | 933 | #define NoData 0 // the slave has not been addressed |
NYX | 0:85b3fd62ea1a | 934 | #define ReadAddressed 1 // the master has requested a read from this slave (slave = transmitter) |
NYX | 0:85b3fd62ea1a | 935 | #define WriteGeneral 2 // the master is writing to all slave |
NYX | 0:85b3fd62ea1a | 936 | #define WriteAddressed 3 // the master is writing to this slave (slave = receiver) |
NYX | 0:85b3fd62ea1a | 937 | |
NYX | 0:85b3fd62ea1a | 938 | |
NYX | 0:85b3fd62ea1a | 939 | void HAL_I2C_AddrCallback(I2C_HandleTypeDef *hi2c, uint8_t TransferDirection, uint16_t AddrMatchCode) { |
NYX | 0:85b3fd62ea1a | 940 | /* Get object ptr based on handler ptr */ |
NYX | 0:85b3fd62ea1a | 941 | i2c_t *obj = get_i2c_obj(hi2c); |
NYX | 0:85b3fd62ea1a | 942 | struct i2c_s *obj_s = I2C_S(obj); |
NYX | 0:85b3fd62ea1a | 943 | |
NYX | 0:85b3fd62ea1a | 944 | /* Transfer direction in HAL is from Master point of view */ |
NYX | 0:85b3fd62ea1a | 945 | if(TransferDirection == I2C_DIRECTION_RECEIVE) { |
NYX | 0:85b3fd62ea1a | 946 | obj_s->pending_slave_tx_master_rx = 1; |
NYX | 0:85b3fd62ea1a | 947 | } |
NYX | 0:85b3fd62ea1a | 948 | |
NYX | 0:85b3fd62ea1a | 949 | if(TransferDirection == I2C_DIRECTION_TRANSMIT) { |
NYX | 0:85b3fd62ea1a | 950 | obj_s->pending_slave_rx_maxter_tx = 1; |
NYX | 0:85b3fd62ea1a | 951 | } |
NYX | 0:85b3fd62ea1a | 952 | } |
NYX | 0:85b3fd62ea1a | 953 | |
NYX | 0:85b3fd62ea1a | 954 | void HAL_I2C_SlaveTxCpltCallback(I2C_HandleTypeDef *I2cHandle){ |
NYX | 0:85b3fd62ea1a | 955 | /* Get object ptr based on handler ptr */ |
NYX | 0:85b3fd62ea1a | 956 | i2c_t *obj = get_i2c_obj(I2cHandle); |
NYX | 0:85b3fd62ea1a | 957 | struct i2c_s *obj_s = I2C_S(obj); |
NYX | 0:85b3fd62ea1a | 958 | obj_s->pending_slave_tx_master_rx = 0; |
NYX | 0:85b3fd62ea1a | 959 | } |
NYX | 0:85b3fd62ea1a | 960 | |
NYX | 0:85b3fd62ea1a | 961 | void HAL_I2C_SlaveRxCpltCallback(I2C_HandleTypeDef *I2cHandle){ |
NYX | 0:85b3fd62ea1a | 962 | /* Get object ptr based on handler ptr */ |
NYX | 0:85b3fd62ea1a | 963 | i2c_t *obj = get_i2c_obj(I2cHandle); |
NYX | 0:85b3fd62ea1a | 964 | struct i2c_s *obj_s = I2C_S(obj); |
NYX | 0:85b3fd62ea1a | 965 | obj_s->pending_slave_rx_maxter_tx = 0; |
NYX | 0:85b3fd62ea1a | 966 | } |
NYX | 0:85b3fd62ea1a | 967 | |
NYX | 0:85b3fd62ea1a | 968 | void HAL_I2C_ListenCpltCallback(I2C_HandleTypeDef *hi2c) |
NYX | 0:85b3fd62ea1a | 969 | { |
NYX | 0:85b3fd62ea1a | 970 | /* restart listening for master requests */ |
NYX | 0:85b3fd62ea1a | 971 | HAL_I2C_EnableListen_IT(hi2c); |
NYX | 0:85b3fd62ea1a | 972 | } |
NYX | 0:85b3fd62ea1a | 973 | |
NYX | 0:85b3fd62ea1a | 974 | int i2c_slave_receive(i2c_t *obj) { |
NYX | 0:85b3fd62ea1a | 975 | |
NYX | 0:85b3fd62ea1a | 976 | struct i2c_s *obj_s = I2C_S(obj); |
NYX | 0:85b3fd62ea1a | 977 | int retValue = NoData; |
NYX | 0:85b3fd62ea1a | 978 | |
NYX | 0:85b3fd62ea1a | 979 | if(obj_s->pending_slave_rx_maxter_tx) { |
NYX | 0:85b3fd62ea1a | 980 | retValue = WriteAddressed; |
NYX | 0:85b3fd62ea1a | 981 | } |
NYX | 0:85b3fd62ea1a | 982 | |
NYX | 0:85b3fd62ea1a | 983 | if(obj_s->pending_slave_tx_master_rx) { |
NYX | 0:85b3fd62ea1a | 984 | retValue = ReadAddressed; |
NYX | 0:85b3fd62ea1a | 985 | } |
NYX | 0:85b3fd62ea1a | 986 | |
NYX | 0:85b3fd62ea1a | 987 | return (retValue); |
NYX | 0:85b3fd62ea1a | 988 | } |
NYX | 0:85b3fd62ea1a | 989 | |
NYX | 0:85b3fd62ea1a | 990 | int i2c_slave_read(i2c_t *obj, char *data, int length) { |
NYX | 0:85b3fd62ea1a | 991 | struct i2c_s *obj_s = I2C_S(obj); |
NYX | 0:85b3fd62ea1a | 992 | I2C_HandleTypeDef *handle = &(obj_s->handle); |
NYX | 0:85b3fd62ea1a | 993 | int count = 0; |
NYX | 0:85b3fd62ea1a | 994 | int ret = 0; |
NYX | 0:85b3fd62ea1a | 995 | uint32_t timeout = 0; |
NYX | 0:85b3fd62ea1a | 996 | |
NYX | 0:85b3fd62ea1a | 997 | /* Always use I2C_NEXT_FRAME as slave will just adapt to master requests */ |
NYX | 0:85b3fd62ea1a | 998 | ret = HAL_I2C_Slave_Sequential_Receive_IT(handle, (uint8_t *) data, length, I2C_NEXT_FRAME); |
NYX | 0:85b3fd62ea1a | 999 | |
NYX | 0:85b3fd62ea1a | 1000 | if(ret == HAL_OK) { |
NYX | 0:85b3fd62ea1a | 1001 | timeout = BYTE_TIMEOUT_US * (length + 1); |
NYX | 0:85b3fd62ea1a | 1002 | while(obj_s->pending_slave_rx_maxter_tx && (--timeout != 0)) { |
NYX | 0:85b3fd62ea1a | 1003 | wait_us(1); |
NYX | 0:85b3fd62ea1a | 1004 | } |
NYX | 0:85b3fd62ea1a | 1005 | |
NYX | 0:85b3fd62ea1a | 1006 | if(timeout != 0) { |
NYX | 0:85b3fd62ea1a | 1007 | count = length; |
NYX | 0:85b3fd62ea1a | 1008 | } else { |
NYX | 0:85b3fd62ea1a | 1009 | DEBUG_PRINTF("TIMEOUT or error in i2c_slave_read\r\n"); |
NYX | 0:85b3fd62ea1a | 1010 | } |
NYX | 0:85b3fd62ea1a | 1011 | } |
NYX | 0:85b3fd62ea1a | 1012 | return count; |
NYX | 0:85b3fd62ea1a | 1013 | } |
NYX | 0:85b3fd62ea1a | 1014 | |
NYX | 0:85b3fd62ea1a | 1015 | int i2c_slave_write(i2c_t *obj, const char *data, int length) { |
NYX | 0:85b3fd62ea1a | 1016 | struct i2c_s *obj_s = I2C_S(obj); |
NYX | 0:85b3fd62ea1a | 1017 | I2C_HandleTypeDef *handle = &(obj_s->handle); |
NYX | 0:85b3fd62ea1a | 1018 | int count = 0; |
NYX | 0:85b3fd62ea1a | 1019 | int ret = 0; |
NYX | 0:85b3fd62ea1a | 1020 | uint32_t timeout = 0; |
NYX | 0:85b3fd62ea1a | 1021 | |
NYX | 0:85b3fd62ea1a | 1022 | /* Always use I2C_NEXT_FRAME as slave will just adapt to master requests */ |
NYX | 0:85b3fd62ea1a | 1023 | ret = HAL_I2C_Slave_Sequential_Transmit_IT(handle, (uint8_t *) data, length, I2C_NEXT_FRAME); |
NYX | 0:85b3fd62ea1a | 1024 | |
NYX | 0:85b3fd62ea1a | 1025 | if(ret == HAL_OK) { |
NYX | 0:85b3fd62ea1a | 1026 | timeout = BYTE_TIMEOUT_US * (length + 1); |
NYX | 0:85b3fd62ea1a | 1027 | while(obj_s->pending_slave_tx_master_rx && (--timeout != 0)) { |
NYX | 0:85b3fd62ea1a | 1028 | wait_us(1); |
NYX | 0:85b3fd62ea1a | 1029 | } |
NYX | 0:85b3fd62ea1a | 1030 | |
NYX | 0:85b3fd62ea1a | 1031 | if(timeout != 0) { |
NYX | 0:85b3fd62ea1a | 1032 | count = length; |
NYX | 0:85b3fd62ea1a | 1033 | } else { |
NYX | 0:85b3fd62ea1a | 1034 | DEBUG_PRINTF("TIMEOUT or error in i2c_slave_write\r\n"); |
NYX | 0:85b3fd62ea1a | 1035 | } |
NYX | 0:85b3fd62ea1a | 1036 | } |
NYX | 0:85b3fd62ea1a | 1037 | |
NYX | 0:85b3fd62ea1a | 1038 | return count; |
NYX | 0:85b3fd62ea1a | 1039 | } |
NYX | 0:85b3fd62ea1a | 1040 | #endif // DEVICE_I2CSLAVE |
NYX | 0:85b3fd62ea1a | 1041 | |
NYX | 0:85b3fd62ea1a | 1042 | #if DEVICE_I2C_ASYNCH |
NYX | 0:85b3fd62ea1a | 1043 | /* ASYNCH MASTER API FUNCTIONS */ |
NYX | 0:85b3fd62ea1a | 1044 | void HAL_I2C_AbortCpltCallback(I2C_HandleTypeDef *hi2c){ |
NYX | 0:85b3fd62ea1a | 1045 | /* Get object ptr based on handler ptr */ |
NYX | 0:85b3fd62ea1a | 1046 | i2c_t *obj = get_i2c_obj(hi2c); |
NYX | 0:85b3fd62ea1a | 1047 | struct i2c_s *obj_s = I2C_S(obj); |
NYX | 0:85b3fd62ea1a | 1048 | I2C_HandleTypeDef *handle = &(obj_s->handle); |
NYX | 0:85b3fd62ea1a | 1049 | |
NYX | 0:85b3fd62ea1a | 1050 | /* Disable IT. Not always done before calling macro */ |
NYX | 0:85b3fd62ea1a | 1051 | __HAL_I2C_DISABLE_IT(handle, I2C_IT_ALL); |
NYX | 0:85b3fd62ea1a | 1052 | i2c_ev_err_disable(obj); |
NYX | 0:85b3fd62ea1a | 1053 | |
NYX | 0:85b3fd62ea1a | 1054 | /* Set event flag */ |
NYX | 0:85b3fd62ea1a | 1055 | obj_s->event = I2C_EVENT_ERROR; |
NYX | 0:85b3fd62ea1a | 1056 | } |
NYX | 0:85b3fd62ea1a | 1057 | |
NYX | 0:85b3fd62ea1a | 1058 | void i2c_transfer_asynch(i2c_t *obj, const void *tx, size_t tx_length, void *rx, size_t rx_length, uint32_t address, uint32_t stop, uint32_t handler, uint32_t event, DMAUsage hint) { |
NYX | 0:85b3fd62ea1a | 1059 | |
NYX | 0:85b3fd62ea1a | 1060 | // TODO: DMA usage is currently ignored by this way |
NYX | 0:85b3fd62ea1a | 1061 | (void) hint; |
NYX | 0:85b3fd62ea1a | 1062 | |
NYX | 0:85b3fd62ea1a | 1063 | struct i2c_s *obj_s = I2C_S(obj); |
NYX | 0:85b3fd62ea1a | 1064 | I2C_HandleTypeDef *handle = &(obj_s->handle); |
NYX | 0:85b3fd62ea1a | 1065 | |
NYX | 0:85b3fd62ea1a | 1066 | /* Update object */ |
NYX | 0:85b3fd62ea1a | 1067 | obj->tx_buff.buffer = (void *)tx; |
NYX | 0:85b3fd62ea1a | 1068 | obj->tx_buff.length = tx_length; |
NYX | 0:85b3fd62ea1a | 1069 | obj->tx_buff.pos = 0; |
NYX | 0:85b3fd62ea1a | 1070 | obj->tx_buff.width = 8; |
NYX | 0:85b3fd62ea1a | 1071 | |
NYX | 0:85b3fd62ea1a | 1072 | obj->rx_buff.buffer = (void *)rx; |
NYX | 0:85b3fd62ea1a | 1073 | obj->rx_buff.length = rx_length; |
NYX | 0:85b3fd62ea1a | 1074 | obj->rx_buff.pos = SIZE_MAX; |
NYX | 0:85b3fd62ea1a | 1075 | obj->rx_buff.width = 8; |
NYX | 0:85b3fd62ea1a | 1076 | |
NYX | 0:85b3fd62ea1a | 1077 | obj_s->available_events = event; |
NYX | 0:85b3fd62ea1a | 1078 | obj_s->event = 0; |
NYX | 0:85b3fd62ea1a | 1079 | obj_s->address = address; |
NYX | 0:85b3fd62ea1a | 1080 | obj_s->stop = stop; |
NYX | 0:85b3fd62ea1a | 1081 | |
NYX | 0:85b3fd62ea1a | 1082 | i2c_ev_err_enable(obj, handler); |
NYX | 0:85b3fd62ea1a | 1083 | |
NYX | 0:85b3fd62ea1a | 1084 | /* Set operation step depending if stop sending required or not */ |
NYX | 0:85b3fd62ea1a | 1085 | if ((tx_length && !rx_length) || (!tx_length && rx_length)) { |
NYX | 0:85b3fd62ea1a | 1086 | if ((obj_s->XferOperation == I2C_FIRST_AND_LAST_FRAME) || |
NYX | 0:85b3fd62ea1a | 1087 | (obj_s->XferOperation == I2C_LAST_FRAME)) { |
NYX | 0:85b3fd62ea1a | 1088 | if (stop) |
NYX | 0:85b3fd62ea1a | 1089 | obj_s->XferOperation = I2C_FIRST_AND_LAST_FRAME; |
NYX | 0:85b3fd62ea1a | 1090 | else |
NYX | 0:85b3fd62ea1a | 1091 | obj_s->XferOperation = I2C_FIRST_FRAME; |
NYX | 0:85b3fd62ea1a | 1092 | } else if ((obj_s->XferOperation == I2C_FIRST_FRAME) || |
NYX | 0:85b3fd62ea1a | 1093 | (obj_s->XferOperation == I2C_NEXT_FRAME)) { |
NYX | 0:85b3fd62ea1a | 1094 | if (stop) |
NYX | 0:85b3fd62ea1a | 1095 | obj_s->XferOperation = I2C_LAST_FRAME; |
NYX | 0:85b3fd62ea1a | 1096 | else |
NYX | 0:85b3fd62ea1a | 1097 | obj_s->XferOperation = I2C_NEXT_FRAME; |
NYX | 0:85b3fd62ea1a | 1098 | } |
NYX | 0:85b3fd62ea1a | 1099 | |
NYX | 0:85b3fd62ea1a | 1100 | if (tx_length > 0) { |
NYX | 0:85b3fd62ea1a | 1101 | HAL_I2C_Master_Sequential_Transmit_IT(handle, address, (uint8_t*)tx, tx_length, obj_s->XferOperation); |
NYX | 0:85b3fd62ea1a | 1102 | } |
NYX | 0:85b3fd62ea1a | 1103 | if (rx_length > 0) { |
NYX | 0:85b3fd62ea1a | 1104 | HAL_I2C_Master_Sequential_Receive_IT(handle, address, (uint8_t*)rx, rx_length, obj_s->XferOperation); |
NYX | 0:85b3fd62ea1a | 1105 | } |
NYX | 0:85b3fd62ea1a | 1106 | } |
NYX | 0:85b3fd62ea1a | 1107 | else if (tx_length && rx_length) { |
NYX | 0:85b3fd62ea1a | 1108 | /* Two steps operation, don't modify XferOperation, keep it for next step */ |
NYX | 0:85b3fd62ea1a | 1109 | if ((obj_s->XferOperation == I2C_FIRST_AND_LAST_FRAME) || |
NYX | 0:85b3fd62ea1a | 1110 | (obj_s->XferOperation == I2C_LAST_FRAME)) { |
NYX | 0:85b3fd62ea1a | 1111 | HAL_I2C_Master_Sequential_Transmit_IT(handle, address, (uint8_t*)tx, tx_length, I2C_FIRST_FRAME); |
NYX | 0:85b3fd62ea1a | 1112 | } else if ((obj_s->XferOperation == I2C_FIRST_FRAME) || |
NYX | 0:85b3fd62ea1a | 1113 | (obj_s->XferOperation == I2C_NEXT_FRAME)) { |
NYX | 0:85b3fd62ea1a | 1114 | HAL_I2C_Master_Sequential_Transmit_IT(handle, address, (uint8_t*)tx, tx_length, I2C_NEXT_FRAME); |
NYX | 0:85b3fd62ea1a | 1115 | } |
NYX | 0:85b3fd62ea1a | 1116 | } |
NYX | 0:85b3fd62ea1a | 1117 | } |
NYX | 0:85b3fd62ea1a | 1118 | |
NYX | 0:85b3fd62ea1a | 1119 | |
NYX | 0:85b3fd62ea1a | 1120 | uint32_t i2c_irq_handler_asynch(i2c_t *obj) { |
NYX | 0:85b3fd62ea1a | 1121 | |
NYX | 0:85b3fd62ea1a | 1122 | struct i2c_s *obj_s = I2C_S(obj); |
NYX | 0:85b3fd62ea1a | 1123 | I2C_HandleTypeDef *handle = &(obj_s->handle); |
NYX | 0:85b3fd62ea1a | 1124 | |
NYX | 0:85b3fd62ea1a | 1125 | HAL_I2C_EV_IRQHandler(handle); |
NYX | 0:85b3fd62ea1a | 1126 | HAL_I2C_ER_IRQHandler(handle); |
NYX | 0:85b3fd62ea1a | 1127 | |
NYX | 0:85b3fd62ea1a | 1128 | /* Return I2C event status */ |
NYX | 0:85b3fd62ea1a | 1129 | return (obj_s->event & obj_s->available_events); |
NYX | 0:85b3fd62ea1a | 1130 | } |
NYX | 0:85b3fd62ea1a | 1131 | |
NYX | 0:85b3fd62ea1a | 1132 | uint8_t i2c_active(i2c_t *obj) { |
NYX | 0:85b3fd62ea1a | 1133 | |
NYX | 0:85b3fd62ea1a | 1134 | struct i2c_s *obj_s = I2C_S(obj); |
NYX | 0:85b3fd62ea1a | 1135 | I2C_HandleTypeDef *handle = &(obj_s->handle); |
NYX | 0:85b3fd62ea1a | 1136 | |
NYX | 0:85b3fd62ea1a | 1137 | if (handle->State == HAL_I2C_STATE_READY) { |
NYX | 0:85b3fd62ea1a | 1138 | return 0; |
NYX | 0:85b3fd62ea1a | 1139 | } |
NYX | 0:85b3fd62ea1a | 1140 | else { |
NYX | 0:85b3fd62ea1a | 1141 | return 1; |
NYX | 0:85b3fd62ea1a | 1142 | } |
NYX | 0:85b3fd62ea1a | 1143 | } |
NYX | 0:85b3fd62ea1a | 1144 | |
NYX | 0:85b3fd62ea1a | 1145 | void i2c_abort_asynch(i2c_t *obj) { |
NYX | 0:85b3fd62ea1a | 1146 | |
NYX | 0:85b3fd62ea1a | 1147 | struct i2c_s *obj_s = I2C_S(obj); |
NYX | 0:85b3fd62ea1a | 1148 | I2C_HandleTypeDef *handle = &(obj_s->handle); |
NYX | 0:85b3fd62ea1a | 1149 | |
NYX | 0:85b3fd62ea1a | 1150 | /* Abort HAL requires DevAddress, but is not used. Use Dummy */ |
NYX | 0:85b3fd62ea1a | 1151 | uint16_t Dummy_DevAddress = 0x00; |
NYX | 0:85b3fd62ea1a | 1152 | |
NYX | 0:85b3fd62ea1a | 1153 | HAL_I2C_Master_Abort_IT(handle, Dummy_DevAddress); |
NYX | 0:85b3fd62ea1a | 1154 | } |
NYX | 0:85b3fd62ea1a | 1155 | |
NYX | 0:85b3fd62ea1a | 1156 | #endif // DEVICE_I2C_ASYNCH |
NYX | 0:85b3fd62ea1a | 1157 | |
NYX | 0:85b3fd62ea1a | 1158 | #endif // DEVICE_I2C |