inport from local
Dependents: Hobbyking_Cheetah_0511
targets/TARGET_STM/gpio_irq_api.c@0:85b3fd62ea1a, 2020-03-16 (annotated)
- Committer:
- NYX
- Date:
- Mon Mar 16 06:35:48 2020 +0000
- Revision:
- 0:85b3fd62ea1a
reinport to mbed;
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
NYX | 0:85b3fd62ea1a | 1 | /* mbed Microcontroller Library |
NYX | 0:85b3fd62ea1a | 2 | ******************************************************************************* |
NYX | 0:85b3fd62ea1a | 3 | * Copyright (c) 2014, STMicroelectronics |
NYX | 0:85b3fd62ea1a | 4 | * All rights reserved. |
NYX | 0:85b3fd62ea1a | 5 | * |
NYX | 0:85b3fd62ea1a | 6 | * Redistribution and use in source and binary forms, with or without |
NYX | 0:85b3fd62ea1a | 7 | * modification, are permitted provided that the following conditions are met: |
NYX | 0:85b3fd62ea1a | 8 | * |
NYX | 0:85b3fd62ea1a | 9 | * 1. Redistributions of source code must retain the above copyright notice, |
NYX | 0:85b3fd62ea1a | 10 | * this list of conditions and the following disclaimer. |
NYX | 0:85b3fd62ea1a | 11 | * 2. Redistributions in binary form must reproduce the above copyright notice, |
NYX | 0:85b3fd62ea1a | 12 | * this list of conditions and the following disclaimer in the documentation |
NYX | 0:85b3fd62ea1a | 13 | * and/or other materials provided with the distribution. |
NYX | 0:85b3fd62ea1a | 14 | * 3. Neither the name of STMicroelectronics nor the names of its contributors |
NYX | 0:85b3fd62ea1a | 15 | * may be used to endorse or promote products derived from this software |
NYX | 0:85b3fd62ea1a | 16 | * without specific prior written permission. |
NYX | 0:85b3fd62ea1a | 17 | * |
NYX | 0:85b3fd62ea1a | 18 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
NYX | 0:85b3fd62ea1a | 19 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
NYX | 0:85b3fd62ea1a | 20 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
NYX | 0:85b3fd62ea1a | 21 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE |
NYX | 0:85b3fd62ea1a | 22 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
NYX | 0:85b3fd62ea1a | 23 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR |
NYX | 0:85b3fd62ea1a | 24 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
NYX | 0:85b3fd62ea1a | 25 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
NYX | 0:85b3fd62ea1a | 26 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
NYX | 0:85b3fd62ea1a | 27 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
NYX | 0:85b3fd62ea1a | 28 | ******************************************************************************* |
NYX | 0:85b3fd62ea1a | 29 | */ |
NYX | 0:85b3fd62ea1a | 30 | #include <stddef.h> |
NYX | 0:85b3fd62ea1a | 31 | #include "cmsis.h" |
NYX | 0:85b3fd62ea1a | 32 | #include "gpio_irq_api.h" |
NYX | 0:85b3fd62ea1a | 33 | #include "pinmap.h" |
NYX | 0:85b3fd62ea1a | 34 | #include "mbed_error.h" |
NYX | 0:85b3fd62ea1a | 35 | #include "gpio_irq_device.h" |
NYX | 0:85b3fd62ea1a | 36 | |
NYX | 0:85b3fd62ea1a | 37 | #define EDGE_NONE (0) |
NYX | 0:85b3fd62ea1a | 38 | #define EDGE_RISE (1) |
NYX | 0:85b3fd62ea1a | 39 | #define EDGE_FALL (2) |
NYX | 0:85b3fd62ea1a | 40 | #define EDGE_BOTH (3) |
NYX | 0:85b3fd62ea1a | 41 | |
NYX | 0:85b3fd62ea1a | 42 | |
NYX | 0:85b3fd62ea1a | 43 | typedef struct gpio_channel { |
NYX | 0:85b3fd62ea1a | 44 | uint32_t pin_mask; // bitmask representing which pins are configured for receiving interrupts |
NYX | 0:85b3fd62ea1a | 45 | uint32_t channel_ids[MAX_PIN_LINE]; // mbed "gpio_irq_t gpio_irq" field of instance |
NYX | 0:85b3fd62ea1a | 46 | GPIO_TypeDef* channel_gpio[MAX_PIN_LINE]; // base address of gpio port group |
NYX | 0:85b3fd62ea1a | 47 | uint32_t channel_pin[MAX_PIN_LINE]; // pin number in port group |
NYX | 0:85b3fd62ea1a | 48 | } gpio_channel_t; |
NYX | 0:85b3fd62ea1a | 49 | |
NYX | 0:85b3fd62ea1a | 50 | static gpio_irq_handler irq_handler; |
NYX | 0:85b3fd62ea1a | 51 | |
NYX | 0:85b3fd62ea1a | 52 | static gpio_channel_t channels[CHANNEL_NUM] = { |
NYX | 0:85b3fd62ea1a | 53 | #ifdef EXTI_IRQ0_NUM_LINES |
NYX | 0:85b3fd62ea1a | 54 | {.pin_mask = 0}, |
NYX | 0:85b3fd62ea1a | 55 | #endif |
NYX | 0:85b3fd62ea1a | 56 | #ifdef EXTI_IRQ1_NUM_LINES |
NYX | 0:85b3fd62ea1a | 57 | {.pin_mask = 0}, |
NYX | 0:85b3fd62ea1a | 58 | #endif |
NYX | 0:85b3fd62ea1a | 59 | #ifdef EXTI_IRQ2_NUM_LINES |
NYX | 0:85b3fd62ea1a | 60 | {.pin_mask = 0}, |
NYX | 0:85b3fd62ea1a | 61 | #endif |
NYX | 0:85b3fd62ea1a | 62 | #ifdef EXTI_IRQ3_NUM_LINES |
NYX | 0:85b3fd62ea1a | 63 | {.pin_mask = 0}, |
NYX | 0:85b3fd62ea1a | 64 | #endif |
NYX | 0:85b3fd62ea1a | 65 | #ifdef EXTI_IRQ4_NUM_LINES |
NYX | 0:85b3fd62ea1a | 66 | {.pin_mask = 0}, |
NYX | 0:85b3fd62ea1a | 67 | #endif |
NYX | 0:85b3fd62ea1a | 68 | #ifdef EXTI_IRQ5_NUM_LINES |
NYX | 0:85b3fd62ea1a | 69 | {.pin_mask = 0}, |
NYX | 0:85b3fd62ea1a | 70 | #endif |
NYX | 0:85b3fd62ea1a | 71 | #ifdef EXTI_IRQ6_NUM_LINES |
NYX | 0:85b3fd62ea1a | 72 | {.pin_mask = 0} |
NYX | 0:85b3fd62ea1a | 73 | #endif |
NYX | 0:85b3fd62ea1a | 74 | }; |
NYX | 0:85b3fd62ea1a | 75 | |
NYX | 0:85b3fd62ea1a | 76 | static void handle_interrupt_in(uint32_t irq_index, uint32_t max_num_pin_line) |
NYX | 0:85b3fd62ea1a | 77 | { |
NYX | 0:85b3fd62ea1a | 78 | gpio_channel_t *gpio_channel = &channels[irq_index]; |
NYX | 0:85b3fd62ea1a | 79 | uint32_t gpio_idx; |
NYX | 0:85b3fd62ea1a | 80 | |
NYX | 0:85b3fd62ea1a | 81 | for (gpio_idx = 0; gpio_idx < max_num_pin_line; gpio_idx++) { |
NYX | 0:85b3fd62ea1a | 82 | uint32_t current_mask = (1 << gpio_idx); |
NYX | 0:85b3fd62ea1a | 83 | |
NYX | 0:85b3fd62ea1a | 84 | if (gpio_channel->pin_mask & current_mask) { |
NYX | 0:85b3fd62ea1a | 85 | // Retrieve the gpio and pin that generate the irq |
NYX | 0:85b3fd62ea1a | 86 | GPIO_TypeDef *gpio = (GPIO_TypeDef *)(gpio_channel->channel_gpio[gpio_idx]); |
NYX | 0:85b3fd62ea1a | 87 | uint32_t pin = (uint32_t)(1 << (gpio_channel->channel_pin[gpio_idx])); |
NYX | 0:85b3fd62ea1a | 88 | |
NYX | 0:85b3fd62ea1a | 89 | // Clear interrupt flag |
NYX | 0:85b3fd62ea1a | 90 | if (__HAL_GPIO_EXTI_GET_FLAG(pin) != RESET) { |
NYX | 0:85b3fd62ea1a | 91 | __HAL_GPIO_EXTI_CLEAR_FLAG(pin); |
NYX | 0:85b3fd62ea1a | 92 | |
NYX | 0:85b3fd62ea1a | 93 | if (gpio_channel->channel_ids[gpio_idx] == 0) { |
NYX | 0:85b3fd62ea1a | 94 | continue; |
NYX | 0:85b3fd62ea1a | 95 | } |
NYX | 0:85b3fd62ea1a | 96 | |
NYX | 0:85b3fd62ea1a | 97 | // Check which edge has generated the irq |
NYX | 0:85b3fd62ea1a | 98 | if ((gpio->IDR & pin) == 0) { |
NYX | 0:85b3fd62ea1a | 99 | irq_handler(gpio_channel->channel_ids[gpio_idx], IRQ_FALL); |
NYX | 0:85b3fd62ea1a | 100 | } else { |
NYX | 0:85b3fd62ea1a | 101 | irq_handler(gpio_channel->channel_ids[gpio_idx], IRQ_RISE); |
NYX | 0:85b3fd62ea1a | 102 | } |
NYX | 0:85b3fd62ea1a | 103 | return; |
NYX | 0:85b3fd62ea1a | 104 | } |
NYX | 0:85b3fd62ea1a | 105 | } |
NYX | 0:85b3fd62ea1a | 106 | } |
NYX | 0:85b3fd62ea1a | 107 | error("Unexpected Spurious interrupt, index %d\r\n", irq_index); |
NYX | 0:85b3fd62ea1a | 108 | } |
NYX | 0:85b3fd62ea1a | 109 | |
NYX | 0:85b3fd62ea1a | 110 | |
NYX | 0:85b3fd62ea1a | 111 | #ifdef EXTI_IRQ0_NUM_LINES |
NYX | 0:85b3fd62ea1a | 112 | // EXTI line 0 |
NYX | 0:85b3fd62ea1a | 113 | static void gpio_irq0(void) |
NYX | 0:85b3fd62ea1a | 114 | { |
NYX | 0:85b3fd62ea1a | 115 | handle_interrupt_in(0, EXTI_IRQ0_NUM_LINES); |
NYX | 0:85b3fd62ea1a | 116 | } |
NYX | 0:85b3fd62ea1a | 117 | #endif |
NYX | 0:85b3fd62ea1a | 118 | #ifdef EXTI_IRQ1_NUM_LINES |
NYX | 0:85b3fd62ea1a | 119 | // EXTI line 1 |
NYX | 0:85b3fd62ea1a | 120 | static void gpio_irq1(void) |
NYX | 0:85b3fd62ea1a | 121 | { |
NYX | 0:85b3fd62ea1a | 122 | handle_interrupt_in(1, EXTI_IRQ1_NUM_LINES); |
NYX | 0:85b3fd62ea1a | 123 | } |
NYX | 0:85b3fd62ea1a | 124 | #endif |
NYX | 0:85b3fd62ea1a | 125 | #ifdef EXTI_IRQ2_NUM_LINES |
NYX | 0:85b3fd62ea1a | 126 | // EXTI line 2 |
NYX | 0:85b3fd62ea1a | 127 | static void gpio_irq2(void) |
NYX | 0:85b3fd62ea1a | 128 | { |
NYX | 0:85b3fd62ea1a | 129 | handle_interrupt_in(2, EXTI_IRQ2_NUM_LINES); |
NYX | 0:85b3fd62ea1a | 130 | } |
NYX | 0:85b3fd62ea1a | 131 | #endif |
NYX | 0:85b3fd62ea1a | 132 | #ifdef EXTI_IRQ3_NUM_LINES |
NYX | 0:85b3fd62ea1a | 133 | // EXTI line 3 |
NYX | 0:85b3fd62ea1a | 134 | static void gpio_irq3(void) |
NYX | 0:85b3fd62ea1a | 135 | { |
NYX | 0:85b3fd62ea1a | 136 | handle_interrupt_in(3, EXTI_IRQ3_NUM_LINES); |
NYX | 0:85b3fd62ea1a | 137 | } |
NYX | 0:85b3fd62ea1a | 138 | #endif |
NYX | 0:85b3fd62ea1a | 139 | #ifdef EXTI_IRQ4_NUM_LINES |
NYX | 0:85b3fd62ea1a | 140 | // EXTI line 4 |
NYX | 0:85b3fd62ea1a | 141 | static void gpio_irq4(void) |
NYX | 0:85b3fd62ea1a | 142 | { |
NYX | 0:85b3fd62ea1a | 143 | handle_interrupt_in(4, EXTI_IRQ4_NUM_LINES); |
NYX | 0:85b3fd62ea1a | 144 | } |
NYX | 0:85b3fd62ea1a | 145 | #endif |
NYX | 0:85b3fd62ea1a | 146 | #ifdef EXTI_IRQ5_NUM_LINES |
NYX | 0:85b3fd62ea1a | 147 | // EXTI lines 5 to 9 |
NYX | 0:85b3fd62ea1a | 148 | static void gpio_irq5(void) |
NYX | 0:85b3fd62ea1a | 149 | { |
NYX | 0:85b3fd62ea1a | 150 | handle_interrupt_in(5, EXTI_IRQ5_NUM_LINES); |
NYX | 0:85b3fd62ea1a | 151 | } |
NYX | 0:85b3fd62ea1a | 152 | #endif |
NYX | 0:85b3fd62ea1a | 153 | #ifdef EXTI_IRQ6_NUM_LINES |
NYX | 0:85b3fd62ea1a | 154 | // EXTI lines 10 to 15 |
NYX | 0:85b3fd62ea1a | 155 | static void gpio_irq6(void) |
NYX | 0:85b3fd62ea1a | 156 | { |
NYX | 0:85b3fd62ea1a | 157 | handle_interrupt_in(6, EXTI_IRQ6_NUM_LINES); |
NYX | 0:85b3fd62ea1a | 158 | } |
NYX | 0:85b3fd62ea1a | 159 | #endif |
NYX | 0:85b3fd62ea1a | 160 | |
NYX | 0:85b3fd62ea1a | 161 | extern GPIO_TypeDef *Set_GPIO_Clock(uint32_t port_idx); |
NYX | 0:85b3fd62ea1a | 162 | extern void pin_function_gpiomode(PinName pin, uint32_t gpiomode); |
NYX | 0:85b3fd62ea1a | 163 | |
NYX | 0:85b3fd62ea1a | 164 | int gpio_irq_init(gpio_irq_t *obj, PinName pin, gpio_irq_handler handler, uint32_t id) |
NYX | 0:85b3fd62ea1a | 165 | { |
NYX | 0:85b3fd62ea1a | 166 | uint32_t vector = 0; |
NYX | 0:85b3fd62ea1a | 167 | uint32_t irq_index; |
NYX | 0:85b3fd62ea1a | 168 | gpio_channel_t *gpio_channel; |
NYX | 0:85b3fd62ea1a | 169 | uint32_t gpio_idx; |
NYX | 0:85b3fd62ea1a | 170 | |
NYX | 0:85b3fd62ea1a | 171 | if (pin == NC) return -1; |
NYX | 0:85b3fd62ea1a | 172 | |
NYX | 0:85b3fd62ea1a | 173 | /* Enable SYSCFG Clock */ |
NYX | 0:85b3fd62ea1a | 174 | __HAL_RCC_SYSCFG_CLK_ENABLE(); |
NYX | 0:85b3fd62ea1a | 175 | |
NYX | 0:85b3fd62ea1a | 176 | uint32_t port_index = STM_PORT(pin); |
NYX | 0:85b3fd62ea1a | 177 | uint32_t pin_index = STM_PIN(pin); |
NYX | 0:85b3fd62ea1a | 178 | irq_index = pin_lines_desc[pin_index].irq_index; |
NYX | 0:85b3fd62ea1a | 179 | |
NYX | 0:85b3fd62ea1a | 180 | switch (irq_index) { |
NYX | 0:85b3fd62ea1a | 181 | #ifdef EXTI_IRQ0_NUM_LINES |
NYX | 0:85b3fd62ea1a | 182 | case 0: |
NYX | 0:85b3fd62ea1a | 183 | vector = (uint32_t)&gpio_irq0; |
NYX | 0:85b3fd62ea1a | 184 | break; |
NYX | 0:85b3fd62ea1a | 185 | #endif |
NYX | 0:85b3fd62ea1a | 186 | #ifdef EXTI_IRQ1_NUM_LINES |
NYX | 0:85b3fd62ea1a | 187 | case 1: |
NYX | 0:85b3fd62ea1a | 188 | vector = (uint32_t)&gpio_irq1; |
NYX | 0:85b3fd62ea1a | 189 | break; |
NYX | 0:85b3fd62ea1a | 190 | #endif |
NYX | 0:85b3fd62ea1a | 191 | #ifdef EXTI_IRQ2_NUM_LINES |
NYX | 0:85b3fd62ea1a | 192 | case 2: |
NYX | 0:85b3fd62ea1a | 193 | vector = (uint32_t)&gpio_irq2; |
NYX | 0:85b3fd62ea1a | 194 | break; |
NYX | 0:85b3fd62ea1a | 195 | #endif |
NYX | 0:85b3fd62ea1a | 196 | #ifdef EXTI_IRQ3_NUM_LINES |
NYX | 0:85b3fd62ea1a | 197 | case 3: |
NYX | 0:85b3fd62ea1a | 198 | vector = (uint32_t)&gpio_irq3; |
NYX | 0:85b3fd62ea1a | 199 | break; |
NYX | 0:85b3fd62ea1a | 200 | #endif |
NYX | 0:85b3fd62ea1a | 201 | #ifdef EXTI_IRQ4_NUM_LINES |
NYX | 0:85b3fd62ea1a | 202 | case 4: |
NYX | 0:85b3fd62ea1a | 203 | vector = (uint32_t)&gpio_irq4; |
NYX | 0:85b3fd62ea1a | 204 | break; |
NYX | 0:85b3fd62ea1a | 205 | #endif |
NYX | 0:85b3fd62ea1a | 206 | #ifdef EXTI_IRQ5_NUM_LINES |
NYX | 0:85b3fd62ea1a | 207 | case 5: |
NYX | 0:85b3fd62ea1a | 208 | vector = (uint32_t)&gpio_irq5; |
NYX | 0:85b3fd62ea1a | 209 | break; |
NYX | 0:85b3fd62ea1a | 210 | #endif |
NYX | 0:85b3fd62ea1a | 211 | #ifdef EXTI_IRQ6_NUM_LINES |
NYX | 0:85b3fd62ea1a | 212 | case 6: |
NYX | 0:85b3fd62ea1a | 213 | vector = (uint32_t)&gpio_irq6; |
NYX | 0:85b3fd62ea1a | 214 | break; |
NYX | 0:85b3fd62ea1a | 215 | #endif |
NYX | 0:85b3fd62ea1a | 216 | default: |
NYX | 0:85b3fd62ea1a | 217 | error("InterruptIn error: pin not supported.\n"); |
NYX | 0:85b3fd62ea1a | 218 | return -1; |
NYX | 0:85b3fd62ea1a | 219 | } |
NYX | 0:85b3fd62ea1a | 220 | |
NYX | 0:85b3fd62ea1a | 221 | // Enable GPIO clock |
NYX | 0:85b3fd62ea1a | 222 | GPIO_TypeDef *gpio_add = Set_GPIO_Clock(port_index); |
NYX | 0:85b3fd62ea1a | 223 | |
NYX | 0:85b3fd62ea1a | 224 | // Save informations for future use |
NYX | 0:85b3fd62ea1a | 225 | obj->irq_n = pin_lines_desc[pin_index].irq_n; |
NYX | 0:85b3fd62ea1a | 226 | obj->irq_index = pin_lines_desc[pin_index].irq_index; |
NYX | 0:85b3fd62ea1a | 227 | obj->event = EDGE_NONE; |
NYX | 0:85b3fd62ea1a | 228 | obj->pin = pin; |
NYX | 0:85b3fd62ea1a | 229 | |
NYX | 0:85b3fd62ea1a | 230 | gpio_channel = &channels[irq_index]; |
NYX | 0:85b3fd62ea1a | 231 | gpio_idx = pin_lines_desc[pin_index].gpio_idx; |
NYX | 0:85b3fd62ea1a | 232 | gpio_channel->pin_mask |= (1 << gpio_idx); |
NYX | 0:85b3fd62ea1a | 233 | gpio_channel->channel_ids[gpio_idx] = id; |
NYX | 0:85b3fd62ea1a | 234 | gpio_channel->channel_gpio[gpio_idx] = gpio_add; |
NYX | 0:85b3fd62ea1a | 235 | gpio_channel->channel_pin[gpio_idx] = pin_index; |
NYX | 0:85b3fd62ea1a | 236 | |
NYX | 0:85b3fd62ea1a | 237 | irq_handler = handler; |
NYX | 0:85b3fd62ea1a | 238 | |
NYX | 0:85b3fd62ea1a | 239 | // Enable EXTI interrupt |
NYX | 0:85b3fd62ea1a | 240 | NVIC_SetVector(obj->irq_n, vector); |
NYX | 0:85b3fd62ea1a | 241 | gpio_irq_enable(obj); |
NYX | 0:85b3fd62ea1a | 242 | |
NYX | 0:85b3fd62ea1a | 243 | return 0; |
NYX | 0:85b3fd62ea1a | 244 | } |
NYX | 0:85b3fd62ea1a | 245 | |
NYX | 0:85b3fd62ea1a | 246 | void gpio_irq_free(gpio_irq_t *obj) |
NYX | 0:85b3fd62ea1a | 247 | { |
NYX | 0:85b3fd62ea1a | 248 | uint32_t gpio_idx = pin_lines_desc[STM_PIN(obj->pin)].gpio_idx; |
NYX | 0:85b3fd62ea1a | 249 | gpio_channel_t *gpio_channel = &channels[obj->irq_index]; |
NYX | 0:85b3fd62ea1a | 250 | |
NYX | 0:85b3fd62ea1a | 251 | gpio_irq_disable(obj); |
NYX | 0:85b3fd62ea1a | 252 | gpio_channel->pin_mask &= ~(1 << gpio_idx); |
NYX | 0:85b3fd62ea1a | 253 | gpio_channel->channel_ids[gpio_idx] = 0; |
NYX | 0:85b3fd62ea1a | 254 | gpio_channel->channel_gpio[gpio_idx] = 0; |
NYX | 0:85b3fd62ea1a | 255 | gpio_channel->channel_pin[gpio_idx] = 0; |
NYX | 0:85b3fd62ea1a | 256 | } |
NYX | 0:85b3fd62ea1a | 257 | |
NYX | 0:85b3fd62ea1a | 258 | void gpio_irq_set(gpio_irq_t *obj, gpio_irq_event event, uint32_t enable) |
NYX | 0:85b3fd62ea1a | 259 | { |
NYX | 0:85b3fd62ea1a | 260 | /* Enable / Disable Edge triggered interrupt and store event */ |
NYX | 0:85b3fd62ea1a | 261 | if (event == IRQ_RISE) { |
NYX | 0:85b3fd62ea1a | 262 | if (enable) { |
NYX | 0:85b3fd62ea1a | 263 | LL_EXTI_EnableRisingTrig_0_31(1 << STM_PIN(obj->pin)); |
NYX | 0:85b3fd62ea1a | 264 | obj->event |= IRQ_RISE; |
NYX | 0:85b3fd62ea1a | 265 | } else { |
NYX | 0:85b3fd62ea1a | 266 | LL_EXTI_DisableRisingTrig_0_31(1 << STM_PIN(obj->pin)); |
NYX | 0:85b3fd62ea1a | 267 | obj->event &= ~IRQ_RISE; |
NYX | 0:85b3fd62ea1a | 268 | } |
NYX | 0:85b3fd62ea1a | 269 | } |
NYX | 0:85b3fd62ea1a | 270 | if (event == IRQ_FALL) { |
NYX | 0:85b3fd62ea1a | 271 | if (enable) { |
NYX | 0:85b3fd62ea1a | 272 | LL_EXTI_EnableFallingTrig_0_31(1 << STM_PIN(obj->pin)); |
NYX | 0:85b3fd62ea1a | 273 | obj->event |= IRQ_FALL; |
NYX | 0:85b3fd62ea1a | 274 | } else { |
NYX | 0:85b3fd62ea1a | 275 | LL_EXTI_DisableFallingTrig_0_31(1 << STM_PIN(obj->pin)); |
NYX | 0:85b3fd62ea1a | 276 | obj->event &= ~IRQ_FALL; |
NYX | 0:85b3fd62ea1a | 277 | } |
NYX | 0:85b3fd62ea1a | 278 | } |
NYX | 0:85b3fd62ea1a | 279 | } |
NYX | 0:85b3fd62ea1a | 280 | |
NYX | 0:85b3fd62ea1a | 281 | void gpio_irq_enable(gpio_irq_t *obj) |
NYX | 0:85b3fd62ea1a | 282 | { |
NYX | 0:85b3fd62ea1a | 283 | uint32_t temp = 0; |
NYX | 0:85b3fd62ea1a | 284 | uint32_t port_index = STM_PORT(obj->pin); |
NYX | 0:85b3fd62ea1a | 285 | uint32_t pin_index = STM_PIN(obj->pin); |
NYX | 0:85b3fd62ea1a | 286 | |
NYX | 0:85b3fd62ea1a | 287 | /* Select Source */ |
NYX | 0:85b3fd62ea1a | 288 | temp = SYSCFG->EXTICR[pin_index >> 2]; |
NYX | 0:85b3fd62ea1a | 289 | CLEAR_BIT(temp, (0x0FU) << (4U * (pin_index & 0x03U))); |
NYX | 0:85b3fd62ea1a | 290 | SET_BIT(temp, port_index << (4U * (pin_index & 0x03U))); |
NYX | 0:85b3fd62ea1a | 291 | SYSCFG->EXTICR[pin_index >> 2] = temp; |
NYX | 0:85b3fd62ea1a | 292 | |
NYX | 0:85b3fd62ea1a | 293 | LL_EXTI_EnableIT_0_31(1 << pin_index); |
NYX | 0:85b3fd62ea1a | 294 | |
NYX | 0:85b3fd62ea1a | 295 | /* Restore previous edge interrupt configuration if applicable */ |
NYX | 0:85b3fd62ea1a | 296 | if (obj->event & IRQ_RISE) { |
NYX | 0:85b3fd62ea1a | 297 | LL_EXTI_EnableRisingTrig_0_31(1 << STM_PIN(obj->pin)); |
NYX | 0:85b3fd62ea1a | 298 | } |
NYX | 0:85b3fd62ea1a | 299 | if (obj->event & IRQ_FALL) { |
NYX | 0:85b3fd62ea1a | 300 | LL_EXTI_EnableFallingTrig_0_31(1 << STM_PIN(obj->pin)); |
NYX | 0:85b3fd62ea1a | 301 | } |
NYX | 0:85b3fd62ea1a | 302 | |
NYX | 0:85b3fd62ea1a | 303 | NVIC_EnableIRQ(obj->irq_n); |
NYX | 0:85b3fd62ea1a | 304 | } |
NYX | 0:85b3fd62ea1a | 305 | |
NYX | 0:85b3fd62ea1a | 306 | void gpio_irq_disable(gpio_irq_t *obj) |
NYX | 0:85b3fd62ea1a | 307 | { |
NYX | 0:85b3fd62ea1a | 308 | /* Clear EXTI line configuration */ |
NYX | 0:85b3fd62ea1a | 309 | LL_EXTI_DisableRisingTrig_0_31(1 << STM_PIN(obj->pin)); |
NYX | 0:85b3fd62ea1a | 310 | LL_EXTI_DisableFallingTrig_0_31(1 << STM_PIN(obj->pin)); |
NYX | 0:85b3fd62ea1a | 311 | LL_EXTI_DisableIT_0_31(1 << STM_PIN(obj->pin)); |
NYX | 0:85b3fd62ea1a | 312 | NVIC_DisableIRQ(obj->irq_n); |
NYX | 0:85b3fd62ea1a | 313 | NVIC_ClearPendingIRQ(obj->irq_n); |
NYX | 0:85b3fd62ea1a | 314 | } |