inport from local
Dependents: Hobbyking_Cheetah_0511
targets/TARGET_STM/TARGET_STM32F4/serial_device.c@0:85b3fd62ea1a, 2020-03-16 (annotated)
- Committer:
- NYX
- Date:
- Mon Mar 16 06:35:48 2020 +0000
- Revision:
- 0:85b3fd62ea1a
reinport to mbed;
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
NYX | 0:85b3fd62ea1a | 1 | /* mbed Microcontroller Library |
NYX | 0:85b3fd62ea1a | 2 | ******************************************************************************* |
NYX | 0:85b3fd62ea1a | 3 | * Copyright (c) 2015, STMicroelectronics |
NYX | 0:85b3fd62ea1a | 4 | * All rights reserved. |
NYX | 0:85b3fd62ea1a | 5 | * |
NYX | 0:85b3fd62ea1a | 6 | * Redistribution and use in source and binary forms, with or without |
NYX | 0:85b3fd62ea1a | 7 | * modification, are permitted provided that the following conditions are met: |
NYX | 0:85b3fd62ea1a | 8 | * |
NYX | 0:85b3fd62ea1a | 9 | * 1. Redistributions of source code must retain the above copyright notice, |
NYX | 0:85b3fd62ea1a | 10 | * this list of conditions and the following disclaimer. |
NYX | 0:85b3fd62ea1a | 11 | * 2. Redistributions in binary form must reproduce the above copyright notice, |
NYX | 0:85b3fd62ea1a | 12 | * this list of conditions and the following disclaimer in the documentation |
NYX | 0:85b3fd62ea1a | 13 | * and/or other materials provided with the distribution. |
NYX | 0:85b3fd62ea1a | 14 | * 3. Neither the name of STMicroelectronics nor the names of its contributors |
NYX | 0:85b3fd62ea1a | 15 | * may be used to endorse or promote products derived from this software |
NYX | 0:85b3fd62ea1a | 16 | * without specific prior written permission. |
NYX | 0:85b3fd62ea1a | 17 | * |
NYX | 0:85b3fd62ea1a | 18 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
NYX | 0:85b3fd62ea1a | 19 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
NYX | 0:85b3fd62ea1a | 20 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
NYX | 0:85b3fd62ea1a | 21 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE |
NYX | 0:85b3fd62ea1a | 22 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
NYX | 0:85b3fd62ea1a | 23 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR |
NYX | 0:85b3fd62ea1a | 24 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
NYX | 0:85b3fd62ea1a | 25 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
NYX | 0:85b3fd62ea1a | 26 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
NYX | 0:85b3fd62ea1a | 27 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
NYX | 0:85b3fd62ea1a | 28 | ******************************************************************************* |
NYX | 0:85b3fd62ea1a | 29 | */ |
NYX | 0:85b3fd62ea1a | 30 | |
NYX | 0:85b3fd62ea1a | 31 | #include "mbed_assert.h" |
NYX | 0:85b3fd62ea1a | 32 | #include "serial_api.h" |
NYX | 0:85b3fd62ea1a | 33 | #include "serial_api_hal.h" |
NYX | 0:85b3fd62ea1a | 34 | |
NYX | 0:85b3fd62ea1a | 35 | #if DEVICE_SERIAL |
NYX | 0:85b3fd62ea1a | 36 | |
NYX | 0:85b3fd62ea1a | 37 | #include "cmsis.h" |
NYX | 0:85b3fd62ea1a | 38 | #include "pinmap.h" |
NYX | 0:85b3fd62ea1a | 39 | #include <string.h> |
NYX | 0:85b3fd62ea1a | 40 | #include "PeripheralPins.h" |
NYX | 0:85b3fd62ea1a | 41 | #include "mbed_error.h" |
NYX | 0:85b3fd62ea1a | 42 | |
NYX | 0:85b3fd62ea1a | 43 | #define UART_NUM (10) |
NYX | 0:85b3fd62ea1a | 44 | static uint32_t serial_irq_ids[UART_NUM] = {0}; |
NYX | 0:85b3fd62ea1a | 45 | UART_HandleTypeDef uart_handlers[UART_NUM]; |
NYX | 0:85b3fd62ea1a | 46 | |
NYX | 0:85b3fd62ea1a | 47 | static uart_irq_handler irq_handler; |
NYX | 0:85b3fd62ea1a | 48 | |
NYX | 0:85b3fd62ea1a | 49 | int stdio_uart_inited = 0; |
NYX | 0:85b3fd62ea1a | 50 | serial_t stdio_uart; |
NYX | 0:85b3fd62ea1a | 51 | |
NYX | 0:85b3fd62ea1a | 52 | void serial_init(serial_t *obj, PinName tx, PinName rx) |
NYX | 0:85b3fd62ea1a | 53 | { |
NYX | 0:85b3fd62ea1a | 54 | struct serial_s *obj_s = SERIAL_S(obj); |
NYX | 0:85b3fd62ea1a | 55 | |
NYX | 0:85b3fd62ea1a | 56 | // Determine the UART to use (UART_1, UART_2, ...) |
NYX | 0:85b3fd62ea1a | 57 | UARTName uart_tx = (UARTName)pinmap_peripheral(tx, PinMap_UART_TX); |
NYX | 0:85b3fd62ea1a | 58 | UARTName uart_rx = (UARTName)pinmap_peripheral(rx, PinMap_UART_RX); |
NYX | 0:85b3fd62ea1a | 59 | |
NYX | 0:85b3fd62ea1a | 60 | // Get the peripheral name (UART_1, UART_2, ...) from the pin and assign it to the object |
NYX | 0:85b3fd62ea1a | 61 | obj_s->uart = (UARTName)pinmap_merge(uart_tx, uart_rx); |
NYX | 0:85b3fd62ea1a | 62 | MBED_ASSERT(obj_s->uart != (UARTName)NC); |
NYX | 0:85b3fd62ea1a | 63 | |
NYX | 0:85b3fd62ea1a | 64 | // Enable USART clock |
NYX | 0:85b3fd62ea1a | 65 | switch (obj_s->uart) { |
NYX | 0:85b3fd62ea1a | 66 | case UART_1: |
NYX | 0:85b3fd62ea1a | 67 | __HAL_RCC_USART1_FORCE_RESET(); |
NYX | 0:85b3fd62ea1a | 68 | __HAL_RCC_USART1_RELEASE_RESET(); |
NYX | 0:85b3fd62ea1a | 69 | __HAL_RCC_USART1_CLK_ENABLE(); |
NYX | 0:85b3fd62ea1a | 70 | obj_s->index = 0; |
NYX | 0:85b3fd62ea1a | 71 | break; |
NYX | 0:85b3fd62ea1a | 72 | |
NYX | 0:85b3fd62ea1a | 73 | case UART_2: |
NYX | 0:85b3fd62ea1a | 74 | __HAL_RCC_USART2_FORCE_RESET(); |
NYX | 0:85b3fd62ea1a | 75 | __HAL_RCC_USART2_RELEASE_RESET(); |
NYX | 0:85b3fd62ea1a | 76 | __HAL_RCC_USART2_CLK_ENABLE(); |
NYX | 0:85b3fd62ea1a | 77 | obj_s->index = 1; |
NYX | 0:85b3fd62ea1a | 78 | break; |
NYX | 0:85b3fd62ea1a | 79 | #if defined(USART3_BASE) |
NYX | 0:85b3fd62ea1a | 80 | case UART_3: |
NYX | 0:85b3fd62ea1a | 81 | __HAL_RCC_USART3_FORCE_RESET(); |
NYX | 0:85b3fd62ea1a | 82 | __HAL_RCC_USART3_RELEASE_RESET(); |
NYX | 0:85b3fd62ea1a | 83 | __HAL_RCC_USART3_CLK_ENABLE(); |
NYX | 0:85b3fd62ea1a | 84 | obj_s->index = 2; |
NYX | 0:85b3fd62ea1a | 85 | break; |
NYX | 0:85b3fd62ea1a | 86 | #endif |
NYX | 0:85b3fd62ea1a | 87 | #if defined(UART4_BASE) |
NYX | 0:85b3fd62ea1a | 88 | case UART_4: |
NYX | 0:85b3fd62ea1a | 89 | __HAL_RCC_UART4_FORCE_RESET(); |
NYX | 0:85b3fd62ea1a | 90 | __HAL_RCC_UART4_RELEASE_RESET(); |
NYX | 0:85b3fd62ea1a | 91 | __HAL_RCC_UART4_CLK_ENABLE(); |
NYX | 0:85b3fd62ea1a | 92 | obj_s->index = 3; |
NYX | 0:85b3fd62ea1a | 93 | break; |
NYX | 0:85b3fd62ea1a | 94 | #endif |
NYX | 0:85b3fd62ea1a | 95 | #if defined(UART5_BASE) |
NYX | 0:85b3fd62ea1a | 96 | case UART_5: |
NYX | 0:85b3fd62ea1a | 97 | __HAL_RCC_UART5_FORCE_RESET(); |
NYX | 0:85b3fd62ea1a | 98 | __HAL_RCC_UART5_RELEASE_RESET(); |
NYX | 0:85b3fd62ea1a | 99 | __HAL_RCC_UART5_CLK_ENABLE(); |
NYX | 0:85b3fd62ea1a | 100 | obj_s->index = 4; |
NYX | 0:85b3fd62ea1a | 101 | break; |
NYX | 0:85b3fd62ea1a | 102 | #endif |
NYX | 0:85b3fd62ea1a | 103 | #if defined(USART6_BASE) |
NYX | 0:85b3fd62ea1a | 104 | case UART_6: |
NYX | 0:85b3fd62ea1a | 105 | __HAL_RCC_USART6_FORCE_RESET(); |
NYX | 0:85b3fd62ea1a | 106 | __HAL_RCC_USART6_RELEASE_RESET(); |
NYX | 0:85b3fd62ea1a | 107 | __HAL_RCC_USART6_CLK_ENABLE(); |
NYX | 0:85b3fd62ea1a | 108 | obj_s->index = 5; |
NYX | 0:85b3fd62ea1a | 109 | break; |
NYX | 0:85b3fd62ea1a | 110 | #endif |
NYX | 0:85b3fd62ea1a | 111 | #if defined(UART7_BASE) |
NYX | 0:85b3fd62ea1a | 112 | case UART_7: |
NYX | 0:85b3fd62ea1a | 113 | __HAL_RCC_UART7_FORCE_RESET(); |
NYX | 0:85b3fd62ea1a | 114 | __HAL_RCC_UART7_RELEASE_RESET(); |
NYX | 0:85b3fd62ea1a | 115 | __HAL_RCC_UART7_CLK_ENABLE(); |
NYX | 0:85b3fd62ea1a | 116 | obj_s->index = 6; |
NYX | 0:85b3fd62ea1a | 117 | break; |
NYX | 0:85b3fd62ea1a | 118 | #endif |
NYX | 0:85b3fd62ea1a | 119 | #if defined(UART8_BASE) |
NYX | 0:85b3fd62ea1a | 120 | case UART_8: |
NYX | 0:85b3fd62ea1a | 121 | __HAL_RCC_UART8_FORCE_RESET(); |
NYX | 0:85b3fd62ea1a | 122 | __HAL_RCC_UART8_RELEASE_RESET(); |
NYX | 0:85b3fd62ea1a | 123 | __HAL_RCC_UART8_CLK_ENABLE(); |
NYX | 0:85b3fd62ea1a | 124 | obj_s->index = 7; |
NYX | 0:85b3fd62ea1a | 125 | break; |
NYX | 0:85b3fd62ea1a | 126 | #endif |
NYX | 0:85b3fd62ea1a | 127 | #if defined(UART9_BASE) |
NYX | 0:85b3fd62ea1a | 128 | case UART_9: |
NYX | 0:85b3fd62ea1a | 129 | __HAL_RCC_UART9_FORCE_RESET(); |
NYX | 0:85b3fd62ea1a | 130 | __HAL_RCC_UART9_RELEASE_RESET(); |
NYX | 0:85b3fd62ea1a | 131 | __HAL_RCC_UART9_CLK_ENABLE(); |
NYX | 0:85b3fd62ea1a | 132 | obj_s->index = 8; |
NYX | 0:85b3fd62ea1a | 133 | break; |
NYX | 0:85b3fd62ea1a | 134 | #endif |
NYX | 0:85b3fd62ea1a | 135 | #if defined(UART10_BASE) |
NYX | 0:85b3fd62ea1a | 136 | case UART_10: |
NYX | 0:85b3fd62ea1a | 137 | __HAL_RCC_UART10_FORCE_RESET(); |
NYX | 0:85b3fd62ea1a | 138 | __HAL_RCC_UART10_RELEASE_RESET(); |
NYX | 0:85b3fd62ea1a | 139 | __HAL_RCC_UART10_CLK_ENABLE(); |
NYX | 0:85b3fd62ea1a | 140 | obj_s->index = 9; |
NYX | 0:85b3fd62ea1a | 141 | break; |
NYX | 0:85b3fd62ea1a | 142 | #endif |
NYX | 0:85b3fd62ea1a | 143 | } |
NYX | 0:85b3fd62ea1a | 144 | |
NYX | 0:85b3fd62ea1a | 145 | // Configure the UART pins |
NYX | 0:85b3fd62ea1a | 146 | pinmap_pinout(tx, PinMap_UART_TX); |
NYX | 0:85b3fd62ea1a | 147 | pinmap_pinout(rx, PinMap_UART_RX); |
NYX | 0:85b3fd62ea1a | 148 | |
NYX | 0:85b3fd62ea1a | 149 | if (tx != NC) { |
NYX | 0:85b3fd62ea1a | 150 | pin_mode(tx, PullUp); |
NYX | 0:85b3fd62ea1a | 151 | } |
NYX | 0:85b3fd62ea1a | 152 | if (rx != NC) { |
NYX | 0:85b3fd62ea1a | 153 | pin_mode(rx, PullUp); |
NYX | 0:85b3fd62ea1a | 154 | } |
NYX | 0:85b3fd62ea1a | 155 | |
NYX | 0:85b3fd62ea1a | 156 | // Configure UART |
NYX | 0:85b3fd62ea1a | 157 | obj_s->baudrate = 9600; |
NYX | 0:85b3fd62ea1a | 158 | obj_s->databits = UART_WORDLENGTH_8B; |
NYX | 0:85b3fd62ea1a | 159 | obj_s->stopbits = UART_STOPBITS_1; |
NYX | 0:85b3fd62ea1a | 160 | obj_s->parity = UART_PARITY_NONE; |
NYX | 0:85b3fd62ea1a | 161 | |
NYX | 0:85b3fd62ea1a | 162 | #if DEVICE_SERIAL_FC |
NYX | 0:85b3fd62ea1a | 163 | obj_s->hw_flow_ctl = UART_HWCONTROL_NONE; |
NYX | 0:85b3fd62ea1a | 164 | #endif |
NYX | 0:85b3fd62ea1a | 165 | |
NYX | 0:85b3fd62ea1a | 166 | obj_s->pin_tx = tx; |
NYX | 0:85b3fd62ea1a | 167 | obj_s->pin_rx = rx; |
NYX | 0:85b3fd62ea1a | 168 | |
NYX | 0:85b3fd62ea1a | 169 | init_uart(obj); |
NYX | 0:85b3fd62ea1a | 170 | |
NYX | 0:85b3fd62ea1a | 171 | // For stdio management |
NYX | 0:85b3fd62ea1a | 172 | if (obj_s->uart == STDIO_UART) { |
NYX | 0:85b3fd62ea1a | 173 | stdio_uart_inited = 1; |
NYX | 0:85b3fd62ea1a | 174 | memcpy(&stdio_uart, obj, sizeof(serial_t)); |
NYX | 0:85b3fd62ea1a | 175 | } |
NYX | 0:85b3fd62ea1a | 176 | } |
NYX | 0:85b3fd62ea1a | 177 | |
NYX | 0:85b3fd62ea1a | 178 | void serial_free(serial_t *obj) |
NYX | 0:85b3fd62ea1a | 179 | { |
NYX | 0:85b3fd62ea1a | 180 | struct serial_s *obj_s = SERIAL_S(obj); |
NYX | 0:85b3fd62ea1a | 181 | |
NYX | 0:85b3fd62ea1a | 182 | // Reset UART and disable clock |
NYX | 0:85b3fd62ea1a | 183 | switch (obj_s->index) { |
NYX | 0:85b3fd62ea1a | 184 | case 0: |
NYX | 0:85b3fd62ea1a | 185 | __HAL_RCC_USART1_FORCE_RESET(); |
NYX | 0:85b3fd62ea1a | 186 | __HAL_RCC_USART1_RELEASE_RESET(); |
NYX | 0:85b3fd62ea1a | 187 | __HAL_RCC_USART1_CLK_DISABLE(); |
NYX | 0:85b3fd62ea1a | 188 | break; |
NYX | 0:85b3fd62ea1a | 189 | case 1: |
NYX | 0:85b3fd62ea1a | 190 | __HAL_RCC_USART2_FORCE_RESET(); |
NYX | 0:85b3fd62ea1a | 191 | __HAL_RCC_USART2_RELEASE_RESET(); |
NYX | 0:85b3fd62ea1a | 192 | __HAL_RCC_USART2_CLK_DISABLE(); |
NYX | 0:85b3fd62ea1a | 193 | break; |
NYX | 0:85b3fd62ea1a | 194 | #if defined(USART3_BASE) |
NYX | 0:85b3fd62ea1a | 195 | case 2: |
NYX | 0:85b3fd62ea1a | 196 | __HAL_RCC_USART3_FORCE_RESET(); |
NYX | 0:85b3fd62ea1a | 197 | __HAL_RCC_USART3_RELEASE_RESET(); |
NYX | 0:85b3fd62ea1a | 198 | __HAL_RCC_USART3_CLK_DISABLE(); |
NYX | 0:85b3fd62ea1a | 199 | break; |
NYX | 0:85b3fd62ea1a | 200 | #endif |
NYX | 0:85b3fd62ea1a | 201 | #if defined(UART4_BASE) |
NYX | 0:85b3fd62ea1a | 202 | case 3: |
NYX | 0:85b3fd62ea1a | 203 | __HAL_RCC_UART4_FORCE_RESET(); |
NYX | 0:85b3fd62ea1a | 204 | __HAL_RCC_UART4_RELEASE_RESET(); |
NYX | 0:85b3fd62ea1a | 205 | __HAL_RCC_UART4_CLK_DISABLE(); |
NYX | 0:85b3fd62ea1a | 206 | break; |
NYX | 0:85b3fd62ea1a | 207 | #endif |
NYX | 0:85b3fd62ea1a | 208 | #if defined(UART5_BASE) |
NYX | 0:85b3fd62ea1a | 209 | case 4: |
NYX | 0:85b3fd62ea1a | 210 | __HAL_RCC_UART5_FORCE_RESET(); |
NYX | 0:85b3fd62ea1a | 211 | __HAL_RCC_UART5_RELEASE_RESET(); |
NYX | 0:85b3fd62ea1a | 212 | __HAL_RCC_UART5_CLK_DISABLE(); |
NYX | 0:85b3fd62ea1a | 213 | break; |
NYX | 0:85b3fd62ea1a | 214 | #endif |
NYX | 0:85b3fd62ea1a | 215 | #if defined(USART6_BASE) |
NYX | 0:85b3fd62ea1a | 216 | case 5: |
NYX | 0:85b3fd62ea1a | 217 | __HAL_RCC_USART6_FORCE_RESET(); |
NYX | 0:85b3fd62ea1a | 218 | __HAL_RCC_USART6_RELEASE_RESET(); |
NYX | 0:85b3fd62ea1a | 219 | __HAL_RCC_USART6_CLK_DISABLE(); |
NYX | 0:85b3fd62ea1a | 220 | break; |
NYX | 0:85b3fd62ea1a | 221 | #endif |
NYX | 0:85b3fd62ea1a | 222 | #if defined(UART7_BASE) |
NYX | 0:85b3fd62ea1a | 223 | case 6: |
NYX | 0:85b3fd62ea1a | 224 | __HAL_RCC_UART7_FORCE_RESET(); |
NYX | 0:85b3fd62ea1a | 225 | __HAL_RCC_UART7_RELEASE_RESET(); |
NYX | 0:85b3fd62ea1a | 226 | __HAL_RCC_UART7_CLK_DISABLE(); |
NYX | 0:85b3fd62ea1a | 227 | break; |
NYX | 0:85b3fd62ea1a | 228 | #endif |
NYX | 0:85b3fd62ea1a | 229 | #if defined(UART8_BASE) |
NYX | 0:85b3fd62ea1a | 230 | case 7: |
NYX | 0:85b3fd62ea1a | 231 | __HAL_RCC_UART8_FORCE_RESET(); |
NYX | 0:85b3fd62ea1a | 232 | __HAL_RCC_UART8_RELEASE_RESET(); |
NYX | 0:85b3fd62ea1a | 233 | __HAL_RCC_UART8_CLK_DISABLE(); |
NYX | 0:85b3fd62ea1a | 234 | break; |
NYX | 0:85b3fd62ea1a | 235 | #endif |
NYX | 0:85b3fd62ea1a | 236 | #if defined(UART9_BASE) |
NYX | 0:85b3fd62ea1a | 237 | case 8: |
NYX | 0:85b3fd62ea1a | 238 | __HAL_RCC_UART9_FORCE_RESET(); |
NYX | 0:85b3fd62ea1a | 239 | __HAL_RCC_UART9_RELEASE_RESET(); |
NYX | 0:85b3fd62ea1a | 240 | __HAL_RCC_UART9_CLK_DISABLE(); |
NYX | 0:85b3fd62ea1a | 241 | break; |
NYX | 0:85b3fd62ea1a | 242 | #endif |
NYX | 0:85b3fd62ea1a | 243 | #if defined(UART10_BASE) |
NYX | 0:85b3fd62ea1a | 244 | case 9: |
NYX | 0:85b3fd62ea1a | 245 | __HAL_RCC_UART10_FORCE_RESET(); |
NYX | 0:85b3fd62ea1a | 246 | __HAL_RCC_UART10_RELEASE_RESET(); |
NYX | 0:85b3fd62ea1a | 247 | __HAL_RCC_UART10_CLK_DISABLE(); |
NYX | 0:85b3fd62ea1a | 248 | break; |
NYX | 0:85b3fd62ea1a | 249 | #endif |
NYX | 0:85b3fd62ea1a | 250 | } |
NYX | 0:85b3fd62ea1a | 251 | |
NYX | 0:85b3fd62ea1a | 252 | // Configure GPIOs |
NYX | 0:85b3fd62ea1a | 253 | pin_function(obj_s->pin_tx, STM_PIN_DATA(STM_MODE_INPUT, GPIO_NOPULL, 0)); |
NYX | 0:85b3fd62ea1a | 254 | pin_function(obj_s->pin_rx, STM_PIN_DATA(STM_MODE_INPUT, GPIO_NOPULL, 0)); |
NYX | 0:85b3fd62ea1a | 255 | |
NYX | 0:85b3fd62ea1a | 256 | serial_irq_ids[obj_s->index] = 0; |
NYX | 0:85b3fd62ea1a | 257 | } |
NYX | 0:85b3fd62ea1a | 258 | |
NYX | 0:85b3fd62ea1a | 259 | void serial_baud(serial_t *obj, int baudrate) |
NYX | 0:85b3fd62ea1a | 260 | { |
NYX | 0:85b3fd62ea1a | 261 | struct serial_s *obj_s = SERIAL_S(obj); |
NYX | 0:85b3fd62ea1a | 262 | |
NYX | 0:85b3fd62ea1a | 263 | obj_s->baudrate = baudrate; |
NYX | 0:85b3fd62ea1a | 264 | init_uart(obj); |
NYX | 0:85b3fd62ea1a | 265 | } |
NYX | 0:85b3fd62ea1a | 266 | |
NYX | 0:85b3fd62ea1a | 267 | /****************************************************************************** |
NYX | 0:85b3fd62ea1a | 268 | * INTERRUPTS HANDLING |
NYX | 0:85b3fd62ea1a | 269 | ******************************************************************************/ |
NYX | 0:85b3fd62ea1a | 270 | |
NYX | 0:85b3fd62ea1a | 271 | static void uart_irq(int id) |
NYX | 0:85b3fd62ea1a | 272 | { |
NYX | 0:85b3fd62ea1a | 273 | UART_HandleTypeDef * huart = &uart_handlers[id]; |
NYX | 0:85b3fd62ea1a | 274 | |
NYX | 0:85b3fd62ea1a | 275 | if (serial_irq_ids[id] != 0) { |
NYX | 0:85b3fd62ea1a | 276 | if (__HAL_UART_GET_FLAG(huart, UART_FLAG_TXE) != RESET) { |
NYX | 0:85b3fd62ea1a | 277 | if (__HAL_UART_GET_IT_SOURCE(huart, UART_IT_TXE) != RESET) { |
NYX | 0:85b3fd62ea1a | 278 | irq_handler(serial_irq_ids[id], TxIrq); |
NYX | 0:85b3fd62ea1a | 279 | } |
NYX | 0:85b3fd62ea1a | 280 | } |
NYX | 0:85b3fd62ea1a | 281 | if (__HAL_UART_GET_FLAG(huart, UART_FLAG_RXNE) != RESET) { |
NYX | 0:85b3fd62ea1a | 282 | if (__HAL_UART_GET_IT_SOURCE(huart, UART_IT_RXNE) != RESET) { |
NYX | 0:85b3fd62ea1a | 283 | irq_handler(serial_irq_ids[id], RxIrq); |
NYX | 0:85b3fd62ea1a | 284 | /* Flag has been cleared when reading the content */ |
NYX | 0:85b3fd62ea1a | 285 | } |
NYX | 0:85b3fd62ea1a | 286 | } |
NYX | 0:85b3fd62ea1a | 287 | if (__HAL_UART_GET_FLAG(huart, UART_FLAG_ORE) != RESET) { |
NYX | 0:85b3fd62ea1a | 288 | if (__HAL_UART_GET_IT_SOURCE(huart, USART_IT_ERR) != RESET) { |
NYX | 0:85b3fd62ea1a | 289 | volatile uint32_t tmpval = huart->Instance->DR; // Clear ORE flag |
NYX | 0:85b3fd62ea1a | 290 | } |
NYX | 0:85b3fd62ea1a | 291 | } |
NYX | 0:85b3fd62ea1a | 292 | } |
NYX | 0:85b3fd62ea1a | 293 | } |
NYX | 0:85b3fd62ea1a | 294 | |
NYX | 0:85b3fd62ea1a | 295 | static void uart1_irq(void) |
NYX | 0:85b3fd62ea1a | 296 | { |
NYX | 0:85b3fd62ea1a | 297 | uart_irq(0); |
NYX | 0:85b3fd62ea1a | 298 | } |
NYX | 0:85b3fd62ea1a | 299 | |
NYX | 0:85b3fd62ea1a | 300 | static void uart2_irq(void) |
NYX | 0:85b3fd62ea1a | 301 | { |
NYX | 0:85b3fd62ea1a | 302 | uart_irq(1); |
NYX | 0:85b3fd62ea1a | 303 | } |
NYX | 0:85b3fd62ea1a | 304 | |
NYX | 0:85b3fd62ea1a | 305 | #if defined(USART3_BASE) |
NYX | 0:85b3fd62ea1a | 306 | static void uart3_irq(void) |
NYX | 0:85b3fd62ea1a | 307 | { |
NYX | 0:85b3fd62ea1a | 308 | uart_irq(2); |
NYX | 0:85b3fd62ea1a | 309 | } |
NYX | 0:85b3fd62ea1a | 310 | #endif |
NYX | 0:85b3fd62ea1a | 311 | |
NYX | 0:85b3fd62ea1a | 312 | #if defined(UART4_BASE) |
NYX | 0:85b3fd62ea1a | 313 | static void uart4_irq(void) |
NYX | 0:85b3fd62ea1a | 314 | { |
NYX | 0:85b3fd62ea1a | 315 | uart_irq(3); |
NYX | 0:85b3fd62ea1a | 316 | } |
NYX | 0:85b3fd62ea1a | 317 | #endif |
NYX | 0:85b3fd62ea1a | 318 | |
NYX | 0:85b3fd62ea1a | 319 | #if defined(UART5_BASE) |
NYX | 0:85b3fd62ea1a | 320 | static void uart5_irq(void) |
NYX | 0:85b3fd62ea1a | 321 | { |
NYX | 0:85b3fd62ea1a | 322 | uart_irq(4); |
NYX | 0:85b3fd62ea1a | 323 | } |
NYX | 0:85b3fd62ea1a | 324 | #endif |
NYX | 0:85b3fd62ea1a | 325 | |
NYX | 0:85b3fd62ea1a | 326 | #if defined(USART6_BASE) |
NYX | 0:85b3fd62ea1a | 327 | static void uart6_irq(void) |
NYX | 0:85b3fd62ea1a | 328 | { |
NYX | 0:85b3fd62ea1a | 329 | uart_irq(5); |
NYX | 0:85b3fd62ea1a | 330 | } |
NYX | 0:85b3fd62ea1a | 331 | #endif |
NYX | 0:85b3fd62ea1a | 332 | |
NYX | 0:85b3fd62ea1a | 333 | #if defined(UART7_BASE) |
NYX | 0:85b3fd62ea1a | 334 | static void uart7_irq(void) |
NYX | 0:85b3fd62ea1a | 335 | { |
NYX | 0:85b3fd62ea1a | 336 | uart_irq(6); |
NYX | 0:85b3fd62ea1a | 337 | } |
NYX | 0:85b3fd62ea1a | 338 | #endif |
NYX | 0:85b3fd62ea1a | 339 | |
NYX | 0:85b3fd62ea1a | 340 | #if defined(UART8_BASE) |
NYX | 0:85b3fd62ea1a | 341 | static void uart8_irq(void) |
NYX | 0:85b3fd62ea1a | 342 | { |
NYX | 0:85b3fd62ea1a | 343 | uart_irq(7); |
NYX | 0:85b3fd62ea1a | 344 | } |
NYX | 0:85b3fd62ea1a | 345 | #endif |
NYX | 0:85b3fd62ea1a | 346 | |
NYX | 0:85b3fd62ea1a | 347 | #if defined(UART9_BASE) |
NYX | 0:85b3fd62ea1a | 348 | static void uart9_irq(void) |
NYX | 0:85b3fd62ea1a | 349 | { |
NYX | 0:85b3fd62ea1a | 350 | uart_irq(8); |
NYX | 0:85b3fd62ea1a | 351 | } |
NYX | 0:85b3fd62ea1a | 352 | #endif |
NYX | 0:85b3fd62ea1a | 353 | |
NYX | 0:85b3fd62ea1a | 354 | #if defined(UART10_BASE) |
NYX | 0:85b3fd62ea1a | 355 | static void uart10_irq(void) |
NYX | 0:85b3fd62ea1a | 356 | { |
NYX | 0:85b3fd62ea1a | 357 | uart_irq(9); |
NYX | 0:85b3fd62ea1a | 358 | } |
NYX | 0:85b3fd62ea1a | 359 | #endif |
NYX | 0:85b3fd62ea1a | 360 | |
NYX | 0:85b3fd62ea1a | 361 | void serial_irq_handler(serial_t *obj, uart_irq_handler handler, uint32_t id) |
NYX | 0:85b3fd62ea1a | 362 | { |
NYX | 0:85b3fd62ea1a | 363 | struct serial_s *obj_s = SERIAL_S(obj); |
NYX | 0:85b3fd62ea1a | 364 | |
NYX | 0:85b3fd62ea1a | 365 | irq_handler = handler; |
NYX | 0:85b3fd62ea1a | 366 | serial_irq_ids[obj_s->index] = id; |
NYX | 0:85b3fd62ea1a | 367 | } |
NYX | 0:85b3fd62ea1a | 368 | |
NYX | 0:85b3fd62ea1a | 369 | void serial_irq_set(serial_t *obj, SerialIrq irq, uint32_t enable) |
NYX | 0:85b3fd62ea1a | 370 | { |
NYX | 0:85b3fd62ea1a | 371 | struct serial_s *obj_s = SERIAL_S(obj); |
NYX | 0:85b3fd62ea1a | 372 | UART_HandleTypeDef *huart = &uart_handlers[obj_s->index]; |
NYX | 0:85b3fd62ea1a | 373 | IRQn_Type irq_n = (IRQn_Type)0; |
NYX | 0:85b3fd62ea1a | 374 | uint32_t vector = 0; |
NYX | 0:85b3fd62ea1a | 375 | |
NYX | 0:85b3fd62ea1a | 376 | switch (obj_s->index) { |
NYX | 0:85b3fd62ea1a | 377 | case 0: |
NYX | 0:85b3fd62ea1a | 378 | irq_n = USART1_IRQn; |
NYX | 0:85b3fd62ea1a | 379 | vector = (uint32_t)&uart1_irq; |
NYX | 0:85b3fd62ea1a | 380 | break; |
NYX | 0:85b3fd62ea1a | 381 | |
NYX | 0:85b3fd62ea1a | 382 | case 1: |
NYX | 0:85b3fd62ea1a | 383 | irq_n = USART2_IRQn; |
NYX | 0:85b3fd62ea1a | 384 | vector = (uint32_t)&uart2_irq; |
NYX | 0:85b3fd62ea1a | 385 | break; |
NYX | 0:85b3fd62ea1a | 386 | #if defined(USART3_BASE) |
NYX | 0:85b3fd62ea1a | 387 | case 2: |
NYX | 0:85b3fd62ea1a | 388 | irq_n = USART3_IRQn; |
NYX | 0:85b3fd62ea1a | 389 | vector = (uint32_t)&uart3_irq; |
NYX | 0:85b3fd62ea1a | 390 | break; |
NYX | 0:85b3fd62ea1a | 391 | #endif |
NYX | 0:85b3fd62ea1a | 392 | #if defined(UART4_BASE) |
NYX | 0:85b3fd62ea1a | 393 | case 3: |
NYX | 0:85b3fd62ea1a | 394 | irq_n = UART4_IRQn; |
NYX | 0:85b3fd62ea1a | 395 | vector = (uint32_t)&uart4_irq; |
NYX | 0:85b3fd62ea1a | 396 | break; |
NYX | 0:85b3fd62ea1a | 397 | #endif |
NYX | 0:85b3fd62ea1a | 398 | #if defined(UART5_BASE) |
NYX | 0:85b3fd62ea1a | 399 | case 4: |
NYX | 0:85b3fd62ea1a | 400 | irq_n = UART5_IRQn; |
NYX | 0:85b3fd62ea1a | 401 | vector = (uint32_t)&uart5_irq; |
NYX | 0:85b3fd62ea1a | 402 | break; |
NYX | 0:85b3fd62ea1a | 403 | #endif |
NYX | 0:85b3fd62ea1a | 404 | #if defined(USART6_BASE) |
NYX | 0:85b3fd62ea1a | 405 | case 5: |
NYX | 0:85b3fd62ea1a | 406 | irq_n = USART6_IRQn; |
NYX | 0:85b3fd62ea1a | 407 | vector = (uint32_t)&uart6_irq; |
NYX | 0:85b3fd62ea1a | 408 | break; |
NYX | 0:85b3fd62ea1a | 409 | #endif |
NYX | 0:85b3fd62ea1a | 410 | #if defined(UART7_BASE) |
NYX | 0:85b3fd62ea1a | 411 | case 6: |
NYX | 0:85b3fd62ea1a | 412 | irq_n = UART7_IRQn; |
NYX | 0:85b3fd62ea1a | 413 | vector = (uint32_t)&uart7_irq; |
NYX | 0:85b3fd62ea1a | 414 | break; |
NYX | 0:85b3fd62ea1a | 415 | #endif |
NYX | 0:85b3fd62ea1a | 416 | #if defined(UART8_BASE) |
NYX | 0:85b3fd62ea1a | 417 | case 7: |
NYX | 0:85b3fd62ea1a | 418 | irq_n = UART8_IRQn; |
NYX | 0:85b3fd62ea1a | 419 | vector = (uint32_t)&uart8_irq; |
NYX | 0:85b3fd62ea1a | 420 | break; |
NYX | 0:85b3fd62ea1a | 421 | #endif |
NYX | 0:85b3fd62ea1a | 422 | #if defined(UART9_BASE) |
NYX | 0:85b3fd62ea1a | 423 | case 8: |
NYX | 0:85b3fd62ea1a | 424 | irq_n = UART9_IRQn; |
NYX | 0:85b3fd62ea1a | 425 | vector = (uint32_t)&uart9_irq; |
NYX | 0:85b3fd62ea1a | 426 | break; |
NYX | 0:85b3fd62ea1a | 427 | #endif |
NYX | 0:85b3fd62ea1a | 428 | #if defined(UART10_BASE) |
NYX | 0:85b3fd62ea1a | 429 | case 9: |
NYX | 0:85b3fd62ea1a | 430 | irq_n = UART10_IRQn; |
NYX | 0:85b3fd62ea1a | 431 | vector = (uint32_t)&uart10_irq; |
NYX | 0:85b3fd62ea1a | 432 | break; |
NYX | 0:85b3fd62ea1a | 433 | #endif |
NYX | 0:85b3fd62ea1a | 434 | } |
NYX | 0:85b3fd62ea1a | 435 | |
NYX | 0:85b3fd62ea1a | 436 | if (enable) { |
NYX | 0:85b3fd62ea1a | 437 | if (irq == RxIrq) { |
NYX | 0:85b3fd62ea1a | 438 | __HAL_UART_ENABLE_IT(huart, UART_IT_RXNE); |
NYX | 0:85b3fd62ea1a | 439 | } else { // TxIrq |
NYX | 0:85b3fd62ea1a | 440 | __HAL_UART_ENABLE_IT(huart, UART_IT_TXE); |
NYX | 0:85b3fd62ea1a | 441 | } |
NYX | 0:85b3fd62ea1a | 442 | NVIC_SetVector(irq_n, vector); |
NYX | 0:85b3fd62ea1a | 443 | NVIC_EnableIRQ(irq_n); |
NYX | 0:85b3fd62ea1a | 444 | |
NYX | 0:85b3fd62ea1a | 445 | } else { // disable |
NYX | 0:85b3fd62ea1a | 446 | int all_disabled = 0; |
NYX | 0:85b3fd62ea1a | 447 | if (irq == RxIrq) { |
NYX | 0:85b3fd62ea1a | 448 | __HAL_UART_DISABLE_IT(huart, UART_IT_RXNE); |
NYX | 0:85b3fd62ea1a | 449 | // Check if TxIrq is disabled too |
NYX | 0:85b3fd62ea1a | 450 | if ((huart->Instance->CR1 & USART_CR1_TXEIE) == 0) { |
NYX | 0:85b3fd62ea1a | 451 | all_disabled = 1; |
NYX | 0:85b3fd62ea1a | 452 | } |
NYX | 0:85b3fd62ea1a | 453 | } else { // TxIrq |
NYX | 0:85b3fd62ea1a | 454 | __HAL_UART_DISABLE_IT(huart, UART_IT_TXE); |
NYX | 0:85b3fd62ea1a | 455 | // Check if RxIrq is disabled too |
NYX | 0:85b3fd62ea1a | 456 | if ((huart->Instance->CR1 & USART_CR1_RXNEIE) == 0) { |
NYX | 0:85b3fd62ea1a | 457 | all_disabled = 1; |
NYX | 0:85b3fd62ea1a | 458 | } |
NYX | 0:85b3fd62ea1a | 459 | } |
NYX | 0:85b3fd62ea1a | 460 | |
NYX | 0:85b3fd62ea1a | 461 | if (all_disabled) { |
NYX | 0:85b3fd62ea1a | 462 | NVIC_DisableIRQ(irq_n); |
NYX | 0:85b3fd62ea1a | 463 | } |
NYX | 0:85b3fd62ea1a | 464 | } |
NYX | 0:85b3fd62ea1a | 465 | } |
NYX | 0:85b3fd62ea1a | 466 | |
NYX | 0:85b3fd62ea1a | 467 | /****************************************************************************** |
NYX | 0:85b3fd62ea1a | 468 | * READ/WRITE |
NYX | 0:85b3fd62ea1a | 469 | ******************************************************************************/ |
NYX | 0:85b3fd62ea1a | 470 | |
NYX | 0:85b3fd62ea1a | 471 | int serial_getc(serial_t *obj) |
NYX | 0:85b3fd62ea1a | 472 | { |
NYX | 0:85b3fd62ea1a | 473 | struct serial_s *obj_s = SERIAL_S(obj); |
NYX | 0:85b3fd62ea1a | 474 | UART_HandleTypeDef *huart = &uart_handlers[obj_s->index]; |
NYX | 0:85b3fd62ea1a | 475 | |
NYX | 0:85b3fd62ea1a | 476 | while (!serial_readable(obj)); |
NYX | 0:85b3fd62ea1a | 477 | return (int)(huart->Instance->DR & 0x1FF); |
NYX | 0:85b3fd62ea1a | 478 | } |
NYX | 0:85b3fd62ea1a | 479 | |
NYX | 0:85b3fd62ea1a | 480 | void serial_putc(serial_t *obj, int c) |
NYX | 0:85b3fd62ea1a | 481 | { |
NYX | 0:85b3fd62ea1a | 482 | struct serial_s *obj_s = SERIAL_S(obj); |
NYX | 0:85b3fd62ea1a | 483 | UART_HandleTypeDef *huart = &uart_handlers[obj_s->index]; |
NYX | 0:85b3fd62ea1a | 484 | |
NYX | 0:85b3fd62ea1a | 485 | while (!serial_writable(obj)); |
NYX | 0:85b3fd62ea1a | 486 | huart->Instance->DR = (uint32_t)(c & 0x1FF); |
NYX | 0:85b3fd62ea1a | 487 | } |
NYX | 0:85b3fd62ea1a | 488 | |
NYX | 0:85b3fd62ea1a | 489 | void serial_clear(serial_t *obj) |
NYX | 0:85b3fd62ea1a | 490 | { |
NYX | 0:85b3fd62ea1a | 491 | struct serial_s *obj_s = SERIAL_S(obj); |
NYX | 0:85b3fd62ea1a | 492 | UART_HandleTypeDef *huart = &uart_handlers[obj_s->index]; |
NYX | 0:85b3fd62ea1a | 493 | |
NYX | 0:85b3fd62ea1a | 494 | huart->TxXferCount = 0; |
NYX | 0:85b3fd62ea1a | 495 | huart->RxXferCount = 0; |
NYX | 0:85b3fd62ea1a | 496 | } |
NYX | 0:85b3fd62ea1a | 497 | |
NYX | 0:85b3fd62ea1a | 498 | void serial_break_set(serial_t *obj) |
NYX | 0:85b3fd62ea1a | 499 | { |
NYX | 0:85b3fd62ea1a | 500 | struct serial_s *obj_s = SERIAL_S(obj); |
NYX | 0:85b3fd62ea1a | 501 | UART_HandleTypeDef *huart = &uart_handlers[obj_s->index]; |
NYX | 0:85b3fd62ea1a | 502 | |
NYX | 0:85b3fd62ea1a | 503 | HAL_LIN_SendBreak(huart); |
NYX | 0:85b3fd62ea1a | 504 | } |
NYX | 0:85b3fd62ea1a | 505 | |
NYX | 0:85b3fd62ea1a | 506 | #if DEVICE_SERIAL_ASYNCH |
NYX | 0:85b3fd62ea1a | 507 | |
NYX | 0:85b3fd62ea1a | 508 | /****************************************************************************** |
NYX | 0:85b3fd62ea1a | 509 | * LOCAL HELPER FUNCTIONS |
NYX | 0:85b3fd62ea1a | 510 | ******************************************************************************/ |
NYX | 0:85b3fd62ea1a | 511 | |
NYX | 0:85b3fd62ea1a | 512 | /** |
NYX | 0:85b3fd62ea1a | 513 | * Configure the TX buffer for an asynchronous write serial transaction |
NYX | 0:85b3fd62ea1a | 514 | * |
NYX | 0:85b3fd62ea1a | 515 | * @param obj The serial object. |
NYX | 0:85b3fd62ea1a | 516 | * @param tx The buffer for sending. |
NYX | 0:85b3fd62ea1a | 517 | * @param tx_length The number of words to transmit. |
NYX | 0:85b3fd62ea1a | 518 | */ |
NYX | 0:85b3fd62ea1a | 519 | static void serial_tx_buffer_set(serial_t *obj, void *tx, int tx_length, uint8_t width) |
NYX | 0:85b3fd62ea1a | 520 | { |
NYX | 0:85b3fd62ea1a | 521 | (void)width; |
NYX | 0:85b3fd62ea1a | 522 | |
NYX | 0:85b3fd62ea1a | 523 | // Exit if a transmit is already on-going |
NYX | 0:85b3fd62ea1a | 524 | if (serial_tx_active(obj)) { |
NYX | 0:85b3fd62ea1a | 525 | return; |
NYX | 0:85b3fd62ea1a | 526 | } |
NYX | 0:85b3fd62ea1a | 527 | |
NYX | 0:85b3fd62ea1a | 528 | obj->tx_buff.buffer = tx; |
NYX | 0:85b3fd62ea1a | 529 | obj->tx_buff.length = tx_length; |
NYX | 0:85b3fd62ea1a | 530 | obj->tx_buff.pos = 0; |
NYX | 0:85b3fd62ea1a | 531 | } |
NYX | 0:85b3fd62ea1a | 532 | |
NYX | 0:85b3fd62ea1a | 533 | /** |
NYX | 0:85b3fd62ea1a | 534 | * Configure the RX buffer for an asynchronous write serial transaction |
NYX | 0:85b3fd62ea1a | 535 | * |
NYX | 0:85b3fd62ea1a | 536 | * @param obj The serial object. |
NYX | 0:85b3fd62ea1a | 537 | * @param tx The buffer for sending. |
NYX | 0:85b3fd62ea1a | 538 | * @param tx_length The number of words to transmit. |
NYX | 0:85b3fd62ea1a | 539 | */ |
NYX | 0:85b3fd62ea1a | 540 | static void serial_rx_buffer_set(serial_t *obj, void *rx, int rx_length, uint8_t width) |
NYX | 0:85b3fd62ea1a | 541 | { |
NYX | 0:85b3fd62ea1a | 542 | (void)width; |
NYX | 0:85b3fd62ea1a | 543 | |
NYX | 0:85b3fd62ea1a | 544 | // Exit if a reception is already on-going |
NYX | 0:85b3fd62ea1a | 545 | if (serial_rx_active(obj)) { |
NYX | 0:85b3fd62ea1a | 546 | return; |
NYX | 0:85b3fd62ea1a | 547 | } |
NYX | 0:85b3fd62ea1a | 548 | |
NYX | 0:85b3fd62ea1a | 549 | obj->rx_buff.buffer = rx; |
NYX | 0:85b3fd62ea1a | 550 | obj->rx_buff.length = rx_length; |
NYX | 0:85b3fd62ea1a | 551 | obj->rx_buff.pos = 0; |
NYX | 0:85b3fd62ea1a | 552 | } |
NYX | 0:85b3fd62ea1a | 553 | |
NYX | 0:85b3fd62ea1a | 554 | /** |
NYX | 0:85b3fd62ea1a | 555 | * Configure events |
NYX | 0:85b3fd62ea1a | 556 | * |
NYX | 0:85b3fd62ea1a | 557 | * @param obj The serial object |
NYX | 0:85b3fd62ea1a | 558 | * @param event The logical OR of the events to configure |
NYX | 0:85b3fd62ea1a | 559 | * @param enable Set to non-zero to enable events, or zero to disable them |
NYX | 0:85b3fd62ea1a | 560 | */ |
NYX | 0:85b3fd62ea1a | 561 | static void serial_enable_event(serial_t *obj, int event, uint8_t enable) |
NYX | 0:85b3fd62ea1a | 562 | { |
NYX | 0:85b3fd62ea1a | 563 | struct serial_s *obj_s = SERIAL_S(obj); |
NYX | 0:85b3fd62ea1a | 564 | |
NYX | 0:85b3fd62ea1a | 565 | // Shouldn't have to enable interrupt here, just need to keep track of the requested events. |
NYX | 0:85b3fd62ea1a | 566 | if (enable) { |
NYX | 0:85b3fd62ea1a | 567 | obj_s->events |= event; |
NYX | 0:85b3fd62ea1a | 568 | } else { |
NYX | 0:85b3fd62ea1a | 569 | obj_s->events &= ~event; |
NYX | 0:85b3fd62ea1a | 570 | } |
NYX | 0:85b3fd62ea1a | 571 | } |
NYX | 0:85b3fd62ea1a | 572 | |
NYX | 0:85b3fd62ea1a | 573 | |
NYX | 0:85b3fd62ea1a | 574 | /** |
NYX | 0:85b3fd62ea1a | 575 | * Get index of serial object TX IRQ, relating it to the physical peripheral. |
NYX | 0:85b3fd62ea1a | 576 | * |
NYX | 0:85b3fd62ea1a | 577 | * @param obj pointer to serial object |
NYX | 0:85b3fd62ea1a | 578 | * @return internal NVIC TX IRQ index of U(S)ART peripheral |
NYX | 0:85b3fd62ea1a | 579 | */ |
NYX | 0:85b3fd62ea1a | 580 | static IRQn_Type serial_get_irq_n(serial_t *obj) |
NYX | 0:85b3fd62ea1a | 581 | { |
NYX | 0:85b3fd62ea1a | 582 | struct serial_s *obj_s = SERIAL_S(obj); |
NYX | 0:85b3fd62ea1a | 583 | IRQn_Type irq_n; |
NYX | 0:85b3fd62ea1a | 584 | |
NYX | 0:85b3fd62ea1a | 585 | switch (obj_s->index) { |
NYX | 0:85b3fd62ea1a | 586 | #if defined(USART1_BASE) |
NYX | 0:85b3fd62ea1a | 587 | case 0: |
NYX | 0:85b3fd62ea1a | 588 | irq_n = USART1_IRQn; |
NYX | 0:85b3fd62ea1a | 589 | break; |
NYX | 0:85b3fd62ea1a | 590 | #endif |
NYX | 0:85b3fd62ea1a | 591 | #if defined(USART2_BASE) |
NYX | 0:85b3fd62ea1a | 592 | case 1: |
NYX | 0:85b3fd62ea1a | 593 | irq_n = USART2_IRQn; |
NYX | 0:85b3fd62ea1a | 594 | break; |
NYX | 0:85b3fd62ea1a | 595 | #endif |
NYX | 0:85b3fd62ea1a | 596 | #if defined(USART3_BASE) |
NYX | 0:85b3fd62ea1a | 597 | case 2: |
NYX | 0:85b3fd62ea1a | 598 | irq_n = USART3_IRQn; |
NYX | 0:85b3fd62ea1a | 599 | break; |
NYX | 0:85b3fd62ea1a | 600 | #endif |
NYX | 0:85b3fd62ea1a | 601 | #if defined(UART4_BASE) |
NYX | 0:85b3fd62ea1a | 602 | case 3: |
NYX | 0:85b3fd62ea1a | 603 | irq_n = UART4_IRQn; |
NYX | 0:85b3fd62ea1a | 604 | break; |
NYX | 0:85b3fd62ea1a | 605 | #endif |
NYX | 0:85b3fd62ea1a | 606 | #if defined(USART5_BASE) |
NYX | 0:85b3fd62ea1a | 607 | case 4: |
NYX | 0:85b3fd62ea1a | 608 | irq_n = UART5_IRQn; |
NYX | 0:85b3fd62ea1a | 609 | break; |
NYX | 0:85b3fd62ea1a | 610 | #endif |
NYX | 0:85b3fd62ea1a | 611 | #if defined(USART6_BASE) |
NYX | 0:85b3fd62ea1a | 612 | case 5: |
NYX | 0:85b3fd62ea1a | 613 | irq_n = USART6_IRQn; |
NYX | 0:85b3fd62ea1a | 614 | break; |
NYX | 0:85b3fd62ea1a | 615 | #endif |
NYX | 0:85b3fd62ea1a | 616 | #if defined(UART7_BASE) |
NYX | 0:85b3fd62ea1a | 617 | case 6: |
NYX | 0:85b3fd62ea1a | 618 | irq_n = UART7_IRQn; |
NYX | 0:85b3fd62ea1a | 619 | break; |
NYX | 0:85b3fd62ea1a | 620 | #endif |
NYX | 0:85b3fd62ea1a | 621 | #if defined(UART8_BASE) |
NYX | 0:85b3fd62ea1a | 622 | case 7: |
NYX | 0:85b3fd62ea1a | 623 | irq_n = UART8_IRQn; |
NYX | 0:85b3fd62ea1a | 624 | break; |
NYX | 0:85b3fd62ea1a | 625 | #endif |
NYX | 0:85b3fd62ea1a | 626 | #if defined(UART9_BASE) |
NYX | 0:85b3fd62ea1a | 627 | case 8: |
NYX | 0:85b3fd62ea1a | 628 | irq_n = UART9_IRQn; |
NYX | 0:85b3fd62ea1a | 629 | break; |
NYX | 0:85b3fd62ea1a | 630 | #endif |
NYX | 0:85b3fd62ea1a | 631 | #if defined(UART10_BASE) |
NYX | 0:85b3fd62ea1a | 632 | case 9: |
NYX | 0:85b3fd62ea1a | 633 | irq_n = UART10_IRQn; |
NYX | 0:85b3fd62ea1a | 634 | break; |
NYX | 0:85b3fd62ea1a | 635 | #endif |
NYX | 0:85b3fd62ea1a | 636 | default: |
NYX | 0:85b3fd62ea1a | 637 | irq_n = (IRQn_Type)0; |
NYX | 0:85b3fd62ea1a | 638 | } |
NYX | 0:85b3fd62ea1a | 639 | |
NYX | 0:85b3fd62ea1a | 640 | return irq_n; |
NYX | 0:85b3fd62ea1a | 641 | } |
NYX | 0:85b3fd62ea1a | 642 | |
NYX | 0:85b3fd62ea1a | 643 | /****************************************************************************** |
NYX | 0:85b3fd62ea1a | 644 | * MBED API FUNCTIONS |
NYX | 0:85b3fd62ea1a | 645 | ******************************************************************************/ |
NYX | 0:85b3fd62ea1a | 646 | |
NYX | 0:85b3fd62ea1a | 647 | /** |
NYX | 0:85b3fd62ea1a | 648 | * Begin asynchronous TX transfer. The used buffer is specified in the serial |
NYX | 0:85b3fd62ea1a | 649 | * object, tx_buff |
NYX | 0:85b3fd62ea1a | 650 | * |
NYX | 0:85b3fd62ea1a | 651 | * @param obj The serial object |
NYX | 0:85b3fd62ea1a | 652 | * @param tx The buffer for sending |
NYX | 0:85b3fd62ea1a | 653 | * @param tx_length The number of words to transmit |
NYX | 0:85b3fd62ea1a | 654 | * @param tx_width The bit width of buffer word |
NYX | 0:85b3fd62ea1a | 655 | * @param handler The serial handler |
NYX | 0:85b3fd62ea1a | 656 | * @param event The logical OR of events to be registered |
NYX | 0:85b3fd62ea1a | 657 | * @param hint A suggestion for how to use DMA with this transfer |
NYX | 0:85b3fd62ea1a | 658 | * @return Returns number of data transfered, or 0 otherwise |
NYX | 0:85b3fd62ea1a | 659 | */ |
NYX | 0:85b3fd62ea1a | 660 | int serial_tx_asynch(serial_t *obj, const void *tx, size_t tx_length, uint8_t tx_width, uint32_t handler, uint32_t event, DMAUsage hint) |
NYX | 0:85b3fd62ea1a | 661 | { |
NYX | 0:85b3fd62ea1a | 662 | // TODO: DMA usage is currently ignored |
NYX | 0:85b3fd62ea1a | 663 | (void) hint; |
NYX | 0:85b3fd62ea1a | 664 | |
NYX | 0:85b3fd62ea1a | 665 | // Check buffer is ok |
NYX | 0:85b3fd62ea1a | 666 | MBED_ASSERT(tx != (void*)0); |
NYX | 0:85b3fd62ea1a | 667 | MBED_ASSERT(tx_width == 8); // support only 8b width |
NYX | 0:85b3fd62ea1a | 668 | |
NYX | 0:85b3fd62ea1a | 669 | struct serial_s *obj_s = SERIAL_S(obj); |
NYX | 0:85b3fd62ea1a | 670 | UART_HandleTypeDef * huart = &uart_handlers[obj_s->index]; |
NYX | 0:85b3fd62ea1a | 671 | |
NYX | 0:85b3fd62ea1a | 672 | if (tx_length == 0) { |
NYX | 0:85b3fd62ea1a | 673 | return 0; |
NYX | 0:85b3fd62ea1a | 674 | } |
NYX | 0:85b3fd62ea1a | 675 | |
NYX | 0:85b3fd62ea1a | 676 | // Set up buffer |
NYX | 0:85b3fd62ea1a | 677 | serial_tx_buffer_set(obj, (void *)tx, tx_length, tx_width); |
NYX | 0:85b3fd62ea1a | 678 | |
NYX | 0:85b3fd62ea1a | 679 | // Set up events |
NYX | 0:85b3fd62ea1a | 680 | serial_enable_event(obj, SERIAL_EVENT_TX_ALL, 0); // Clear all events |
NYX | 0:85b3fd62ea1a | 681 | serial_enable_event(obj, event, 1); // Set only the wanted events |
NYX | 0:85b3fd62ea1a | 682 | |
NYX | 0:85b3fd62ea1a | 683 | // Enable interrupt |
NYX | 0:85b3fd62ea1a | 684 | IRQn_Type irq_n = serial_get_irq_n(obj); |
NYX | 0:85b3fd62ea1a | 685 | NVIC_ClearPendingIRQ(irq_n); |
NYX | 0:85b3fd62ea1a | 686 | NVIC_DisableIRQ(irq_n); |
NYX | 0:85b3fd62ea1a | 687 | NVIC_SetPriority(irq_n, 1); |
NYX | 0:85b3fd62ea1a | 688 | NVIC_SetVector(irq_n, (uint32_t)handler); |
NYX | 0:85b3fd62ea1a | 689 | NVIC_EnableIRQ(irq_n); |
NYX | 0:85b3fd62ea1a | 690 | |
NYX | 0:85b3fd62ea1a | 691 | // the following function will enable UART_IT_TXE and error interrupts |
NYX | 0:85b3fd62ea1a | 692 | if (HAL_UART_Transmit_IT(huart, (uint8_t*)tx, tx_length) != HAL_OK) { |
NYX | 0:85b3fd62ea1a | 693 | return 0; |
NYX | 0:85b3fd62ea1a | 694 | } |
NYX | 0:85b3fd62ea1a | 695 | |
NYX | 0:85b3fd62ea1a | 696 | return tx_length; |
NYX | 0:85b3fd62ea1a | 697 | } |
NYX | 0:85b3fd62ea1a | 698 | |
NYX | 0:85b3fd62ea1a | 699 | /** |
NYX | 0:85b3fd62ea1a | 700 | * Begin asynchronous RX transfer (enable interrupt for data collecting) |
NYX | 0:85b3fd62ea1a | 701 | * The used buffer is specified in the serial object, rx_buff |
NYX | 0:85b3fd62ea1a | 702 | * |
NYX | 0:85b3fd62ea1a | 703 | * @param obj The serial object |
NYX | 0:85b3fd62ea1a | 704 | * @param rx The buffer for sending |
NYX | 0:85b3fd62ea1a | 705 | * @param rx_length The number of words to transmit |
NYX | 0:85b3fd62ea1a | 706 | * @param rx_width The bit width of buffer word |
NYX | 0:85b3fd62ea1a | 707 | * @param handler The serial handler |
NYX | 0:85b3fd62ea1a | 708 | * @param event The logical OR of events to be registered |
NYX | 0:85b3fd62ea1a | 709 | * @param handler The serial handler |
NYX | 0:85b3fd62ea1a | 710 | * @param char_match A character in range 0-254 to be matched |
NYX | 0:85b3fd62ea1a | 711 | * @param hint A suggestion for how to use DMA with this transfer |
NYX | 0:85b3fd62ea1a | 712 | */ |
NYX | 0:85b3fd62ea1a | 713 | void serial_rx_asynch(serial_t *obj, void *rx, size_t rx_length, uint8_t rx_width, uint32_t handler, uint32_t event, uint8_t char_match, DMAUsage hint) |
NYX | 0:85b3fd62ea1a | 714 | { |
NYX | 0:85b3fd62ea1a | 715 | // TODO: DMA usage is currently ignored |
NYX | 0:85b3fd62ea1a | 716 | (void) hint; |
NYX | 0:85b3fd62ea1a | 717 | |
NYX | 0:85b3fd62ea1a | 718 | /* Sanity check arguments */ |
NYX | 0:85b3fd62ea1a | 719 | MBED_ASSERT(obj); |
NYX | 0:85b3fd62ea1a | 720 | MBED_ASSERT(rx != (void*)0); |
NYX | 0:85b3fd62ea1a | 721 | MBED_ASSERT(rx_width == 8); // support only 8b width |
NYX | 0:85b3fd62ea1a | 722 | |
NYX | 0:85b3fd62ea1a | 723 | struct serial_s *obj_s = SERIAL_S(obj); |
NYX | 0:85b3fd62ea1a | 724 | UART_HandleTypeDef *huart = &uart_handlers[obj_s->index]; |
NYX | 0:85b3fd62ea1a | 725 | |
NYX | 0:85b3fd62ea1a | 726 | serial_enable_event(obj, SERIAL_EVENT_RX_ALL, 0); |
NYX | 0:85b3fd62ea1a | 727 | serial_enable_event(obj, event, 1); |
NYX | 0:85b3fd62ea1a | 728 | |
NYX | 0:85b3fd62ea1a | 729 | // set CharMatch |
NYX | 0:85b3fd62ea1a | 730 | obj->char_match = char_match; |
NYX | 0:85b3fd62ea1a | 731 | |
NYX | 0:85b3fd62ea1a | 732 | serial_rx_buffer_set(obj, rx, rx_length, rx_width); |
NYX | 0:85b3fd62ea1a | 733 | |
NYX | 0:85b3fd62ea1a | 734 | IRQn_Type irq_n = serial_get_irq_n(obj); |
NYX | 0:85b3fd62ea1a | 735 | NVIC_ClearPendingIRQ(irq_n); |
NYX | 0:85b3fd62ea1a | 736 | NVIC_DisableIRQ(irq_n); |
NYX | 0:85b3fd62ea1a | 737 | NVIC_SetPriority(irq_n, 0); |
NYX | 0:85b3fd62ea1a | 738 | NVIC_SetVector(irq_n, (uint32_t)handler); |
NYX | 0:85b3fd62ea1a | 739 | NVIC_EnableIRQ(irq_n); |
NYX | 0:85b3fd62ea1a | 740 | |
NYX | 0:85b3fd62ea1a | 741 | // following HAL function will enable the RXNE interrupt + error interrupts |
NYX | 0:85b3fd62ea1a | 742 | HAL_UART_Receive_IT(huart, (uint8_t*)rx, rx_length); |
NYX | 0:85b3fd62ea1a | 743 | } |
NYX | 0:85b3fd62ea1a | 744 | |
NYX | 0:85b3fd62ea1a | 745 | /** |
NYX | 0:85b3fd62ea1a | 746 | * Attempts to determine if the serial peripheral is already in use for TX |
NYX | 0:85b3fd62ea1a | 747 | * |
NYX | 0:85b3fd62ea1a | 748 | * @param obj The serial object |
NYX | 0:85b3fd62ea1a | 749 | * @return Non-zero if the TX transaction is ongoing, 0 otherwise |
NYX | 0:85b3fd62ea1a | 750 | */ |
NYX | 0:85b3fd62ea1a | 751 | uint8_t serial_tx_active(serial_t *obj) |
NYX | 0:85b3fd62ea1a | 752 | { |
NYX | 0:85b3fd62ea1a | 753 | MBED_ASSERT(obj); |
NYX | 0:85b3fd62ea1a | 754 | |
NYX | 0:85b3fd62ea1a | 755 | struct serial_s *obj_s = SERIAL_S(obj); |
NYX | 0:85b3fd62ea1a | 756 | UART_HandleTypeDef *huart = &uart_handlers[obj_s->index]; |
NYX | 0:85b3fd62ea1a | 757 | |
NYX | 0:85b3fd62ea1a | 758 | return ((HAL_UART_GetState(huart) == HAL_UART_STATE_BUSY_TX) ? 1 : 0); |
NYX | 0:85b3fd62ea1a | 759 | } |
NYX | 0:85b3fd62ea1a | 760 | |
NYX | 0:85b3fd62ea1a | 761 | /** |
NYX | 0:85b3fd62ea1a | 762 | * Attempts to determine if the serial peripheral is already in use for RX |
NYX | 0:85b3fd62ea1a | 763 | * |
NYX | 0:85b3fd62ea1a | 764 | * @param obj The serial object |
NYX | 0:85b3fd62ea1a | 765 | * @return Non-zero if the RX transaction is ongoing, 0 otherwise |
NYX | 0:85b3fd62ea1a | 766 | */ |
NYX | 0:85b3fd62ea1a | 767 | uint8_t serial_rx_active(serial_t *obj) |
NYX | 0:85b3fd62ea1a | 768 | { |
NYX | 0:85b3fd62ea1a | 769 | MBED_ASSERT(obj); |
NYX | 0:85b3fd62ea1a | 770 | |
NYX | 0:85b3fd62ea1a | 771 | struct serial_s *obj_s = SERIAL_S(obj); |
NYX | 0:85b3fd62ea1a | 772 | UART_HandleTypeDef *huart = &uart_handlers[obj_s->index]; |
NYX | 0:85b3fd62ea1a | 773 | |
NYX | 0:85b3fd62ea1a | 774 | return ((HAL_UART_GetState(huart) == HAL_UART_STATE_BUSY_RX) ? 1 : 0); |
NYX | 0:85b3fd62ea1a | 775 | } |
NYX | 0:85b3fd62ea1a | 776 | |
NYX | 0:85b3fd62ea1a | 777 | void HAL_UART_TxCpltCallback(UART_HandleTypeDef *huart) { |
NYX | 0:85b3fd62ea1a | 778 | if (__HAL_UART_GET_FLAG(huart, UART_FLAG_TC) != RESET) { |
NYX | 0:85b3fd62ea1a | 779 | __HAL_UART_CLEAR_FLAG(huart, UART_FLAG_TC); |
NYX | 0:85b3fd62ea1a | 780 | } |
NYX | 0:85b3fd62ea1a | 781 | } |
NYX | 0:85b3fd62ea1a | 782 | |
NYX | 0:85b3fd62ea1a | 783 | void HAL_UART_ErrorCallback(UART_HandleTypeDef *huart) { |
NYX | 0:85b3fd62ea1a | 784 | if (__HAL_UART_GET_FLAG(huart, UART_FLAG_PE) != RESET) { |
NYX | 0:85b3fd62ea1a | 785 | volatile uint32_t tmpval = huart->Instance->DR; // Clear PE flag |
NYX | 0:85b3fd62ea1a | 786 | } else if (__HAL_UART_GET_FLAG(huart, UART_FLAG_FE) != RESET) { |
NYX | 0:85b3fd62ea1a | 787 | volatile uint32_t tmpval = huart->Instance->DR; // Clear FE flag |
NYX | 0:85b3fd62ea1a | 788 | } else if (__HAL_UART_GET_FLAG(huart, UART_FLAG_NE) != RESET) { |
NYX | 0:85b3fd62ea1a | 789 | volatile uint32_t tmpval = huart->Instance->DR; // Clear NE flag |
NYX | 0:85b3fd62ea1a | 790 | } else if (__HAL_UART_GET_FLAG(huart, UART_FLAG_ORE) != RESET) { |
NYX | 0:85b3fd62ea1a | 791 | volatile uint32_t tmpval = huart->Instance->DR; // Clear ORE flag |
NYX | 0:85b3fd62ea1a | 792 | } |
NYX | 0:85b3fd62ea1a | 793 | } |
NYX | 0:85b3fd62ea1a | 794 | |
NYX | 0:85b3fd62ea1a | 795 | /** |
NYX | 0:85b3fd62ea1a | 796 | * The asynchronous TX and RX handler. |
NYX | 0:85b3fd62ea1a | 797 | * |
NYX | 0:85b3fd62ea1a | 798 | * @param obj The serial object |
NYX | 0:85b3fd62ea1a | 799 | * @return Returns event flags if a TX/RX transfer termination condition was met or 0 otherwise |
NYX | 0:85b3fd62ea1a | 800 | */ |
NYX | 0:85b3fd62ea1a | 801 | int serial_irq_handler_asynch(serial_t *obj) |
NYX | 0:85b3fd62ea1a | 802 | { |
NYX | 0:85b3fd62ea1a | 803 | struct serial_s *obj_s = SERIAL_S(obj); |
NYX | 0:85b3fd62ea1a | 804 | UART_HandleTypeDef *huart = &uart_handlers[obj_s->index]; |
NYX | 0:85b3fd62ea1a | 805 | |
NYX | 0:85b3fd62ea1a | 806 | volatile int return_event = 0; |
NYX | 0:85b3fd62ea1a | 807 | uint8_t *buf = (uint8_t*)(obj->rx_buff.buffer); |
NYX | 0:85b3fd62ea1a | 808 | uint8_t i = 0; |
NYX | 0:85b3fd62ea1a | 809 | |
NYX | 0:85b3fd62ea1a | 810 | // TX PART: |
NYX | 0:85b3fd62ea1a | 811 | if (__HAL_UART_GET_FLAG(huart, UART_FLAG_TC) != RESET) { |
NYX | 0:85b3fd62ea1a | 812 | if (__HAL_UART_GET_IT_SOURCE(huart, UART_IT_TC) != RESET) { |
NYX | 0:85b3fd62ea1a | 813 | // Return event SERIAL_EVENT_TX_COMPLETE if requested |
NYX | 0:85b3fd62ea1a | 814 | if ((obj_s->events & SERIAL_EVENT_TX_COMPLETE ) != 0) { |
NYX | 0:85b3fd62ea1a | 815 | return_event |= (SERIAL_EVENT_TX_COMPLETE & obj_s->events); |
NYX | 0:85b3fd62ea1a | 816 | } |
NYX | 0:85b3fd62ea1a | 817 | } |
NYX | 0:85b3fd62ea1a | 818 | } |
NYX | 0:85b3fd62ea1a | 819 | |
NYX | 0:85b3fd62ea1a | 820 | // Handle error events |
NYX | 0:85b3fd62ea1a | 821 | if (__HAL_UART_GET_FLAG(huart, UART_FLAG_PE) != RESET) { |
NYX | 0:85b3fd62ea1a | 822 | if (__HAL_UART_GET_IT_SOURCE(huart, USART_IT_ERR) != RESET) { |
NYX | 0:85b3fd62ea1a | 823 | return_event |= (SERIAL_EVENT_RX_PARITY_ERROR & obj_s->events); |
NYX | 0:85b3fd62ea1a | 824 | } |
NYX | 0:85b3fd62ea1a | 825 | } |
NYX | 0:85b3fd62ea1a | 826 | |
NYX | 0:85b3fd62ea1a | 827 | if (__HAL_UART_GET_FLAG(huart, UART_FLAG_FE) != RESET) { |
NYX | 0:85b3fd62ea1a | 828 | if (__HAL_UART_GET_IT_SOURCE(huart, USART_IT_ERR) != RESET) { |
NYX | 0:85b3fd62ea1a | 829 | return_event |= (SERIAL_EVENT_RX_FRAMING_ERROR & obj_s->events); |
NYX | 0:85b3fd62ea1a | 830 | } |
NYX | 0:85b3fd62ea1a | 831 | } |
NYX | 0:85b3fd62ea1a | 832 | |
NYX | 0:85b3fd62ea1a | 833 | if (__HAL_UART_GET_FLAG(huart, UART_FLAG_ORE) != RESET) { |
NYX | 0:85b3fd62ea1a | 834 | if (__HAL_UART_GET_IT_SOURCE(huart, USART_IT_ERR) != RESET) { |
NYX | 0:85b3fd62ea1a | 835 | return_event |= (SERIAL_EVENT_RX_OVERRUN_ERROR & obj_s->events); |
NYX | 0:85b3fd62ea1a | 836 | } |
NYX | 0:85b3fd62ea1a | 837 | } |
NYX | 0:85b3fd62ea1a | 838 | |
NYX | 0:85b3fd62ea1a | 839 | HAL_UART_IRQHandler(huart); |
NYX | 0:85b3fd62ea1a | 840 | |
NYX | 0:85b3fd62ea1a | 841 | // Abort if an error occurs |
NYX | 0:85b3fd62ea1a | 842 | if (return_event & SERIAL_EVENT_RX_PARITY_ERROR || |
NYX | 0:85b3fd62ea1a | 843 | return_event & SERIAL_EVENT_RX_FRAMING_ERROR || |
NYX | 0:85b3fd62ea1a | 844 | return_event & SERIAL_EVENT_RX_OVERRUN_ERROR) { |
NYX | 0:85b3fd62ea1a | 845 | return return_event; |
NYX | 0:85b3fd62ea1a | 846 | } |
NYX | 0:85b3fd62ea1a | 847 | |
NYX | 0:85b3fd62ea1a | 848 | //RX PART |
NYX | 0:85b3fd62ea1a | 849 | if (huart->RxXferSize != 0) { |
NYX | 0:85b3fd62ea1a | 850 | obj->rx_buff.pos = huart->RxXferSize - huart->RxXferCount; |
NYX | 0:85b3fd62ea1a | 851 | } |
NYX | 0:85b3fd62ea1a | 852 | if ((huart->RxXferCount == 0) && (obj->rx_buff.pos >= (obj->rx_buff.length - 1))) { |
NYX | 0:85b3fd62ea1a | 853 | return_event |= (SERIAL_EVENT_RX_COMPLETE & obj_s->events); |
NYX | 0:85b3fd62ea1a | 854 | } |
NYX | 0:85b3fd62ea1a | 855 | |
NYX | 0:85b3fd62ea1a | 856 | // Check if char_match is present |
NYX | 0:85b3fd62ea1a | 857 | if (obj_s->events & SERIAL_EVENT_RX_CHARACTER_MATCH) { |
NYX | 0:85b3fd62ea1a | 858 | if (buf != NULL) { |
NYX | 0:85b3fd62ea1a | 859 | for (i = 0; i < obj->rx_buff.pos; i++) { |
NYX | 0:85b3fd62ea1a | 860 | if (buf[i] == obj->char_match) { |
NYX | 0:85b3fd62ea1a | 861 | obj->rx_buff.pos = i; |
NYX | 0:85b3fd62ea1a | 862 | return_event |= (SERIAL_EVENT_RX_CHARACTER_MATCH & obj_s->events); |
NYX | 0:85b3fd62ea1a | 863 | serial_rx_abort_asynch(obj); |
NYX | 0:85b3fd62ea1a | 864 | break; |
NYX | 0:85b3fd62ea1a | 865 | } |
NYX | 0:85b3fd62ea1a | 866 | } |
NYX | 0:85b3fd62ea1a | 867 | } |
NYX | 0:85b3fd62ea1a | 868 | } |
NYX | 0:85b3fd62ea1a | 869 | |
NYX | 0:85b3fd62ea1a | 870 | return return_event; |
NYX | 0:85b3fd62ea1a | 871 | } |
NYX | 0:85b3fd62ea1a | 872 | |
NYX | 0:85b3fd62ea1a | 873 | /** |
NYX | 0:85b3fd62ea1a | 874 | * Abort the ongoing TX transaction. It disables the enabled interupt for TX and |
NYX | 0:85b3fd62ea1a | 875 | * flush TX hardware buffer if TX FIFO is used |
NYX | 0:85b3fd62ea1a | 876 | * |
NYX | 0:85b3fd62ea1a | 877 | * @param obj The serial object |
NYX | 0:85b3fd62ea1a | 878 | */ |
NYX | 0:85b3fd62ea1a | 879 | void serial_tx_abort_asynch(serial_t *obj) |
NYX | 0:85b3fd62ea1a | 880 | { |
NYX | 0:85b3fd62ea1a | 881 | struct serial_s *obj_s = SERIAL_S(obj); |
NYX | 0:85b3fd62ea1a | 882 | UART_HandleTypeDef *huart = &uart_handlers[obj_s->index]; |
NYX | 0:85b3fd62ea1a | 883 | |
NYX | 0:85b3fd62ea1a | 884 | __HAL_UART_DISABLE_IT(huart, UART_IT_TC); |
NYX | 0:85b3fd62ea1a | 885 | __HAL_UART_DISABLE_IT(huart, UART_IT_TXE); |
NYX | 0:85b3fd62ea1a | 886 | |
NYX | 0:85b3fd62ea1a | 887 | // clear flags |
NYX | 0:85b3fd62ea1a | 888 | __HAL_UART_CLEAR_FLAG(huart, UART_FLAG_TC); |
NYX | 0:85b3fd62ea1a | 889 | |
NYX | 0:85b3fd62ea1a | 890 | // reset states |
NYX | 0:85b3fd62ea1a | 891 | huart->TxXferCount = 0; |
NYX | 0:85b3fd62ea1a | 892 | // update handle state |
NYX | 0:85b3fd62ea1a | 893 | if(huart->gState == HAL_UART_STATE_BUSY_TX_RX) { |
NYX | 0:85b3fd62ea1a | 894 | huart->gState = HAL_UART_STATE_BUSY_RX; |
NYX | 0:85b3fd62ea1a | 895 | } else { |
NYX | 0:85b3fd62ea1a | 896 | huart->gState = HAL_UART_STATE_READY; |
NYX | 0:85b3fd62ea1a | 897 | } |
NYX | 0:85b3fd62ea1a | 898 | } |
NYX | 0:85b3fd62ea1a | 899 | |
NYX | 0:85b3fd62ea1a | 900 | /** |
NYX | 0:85b3fd62ea1a | 901 | * Abort the ongoing RX transaction It disables the enabled interrupt for RX and |
NYX | 0:85b3fd62ea1a | 902 | * flush RX hardware buffer if RX FIFO is used |
NYX | 0:85b3fd62ea1a | 903 | * |
NYX | 0:85b3fd62ea1a | 904 | * @param obj The serial object |
NYX | 0:85b3fd62ea1a | 905 | */ |
NYX | 0:85b3fd62ea1a | 906 | void serial_rx_abort_asynch(serial_t *obj) |
NYX | 0:85b3fd62ea1a | 907 | { |
NYX | 0:85b3fd62ea1a | 908 | struct serial_s *obj_s = SERIAL_S(obj); |
NYX | 0:85b3fd62ea1a | 909 | UART_HandleTypeDef *huart = &uart_handlers[obj_s->index]; |
NYX | 0:85b3fd62ea1a | 910 | |
NYX | 0:85b3fd62ea1a | 911 | // disable interrupts |
NYX | 0:85b3fd62ea1a | 912 | __HAL_UART_DISABLE_IT(huart, UART_IT_RXNE); |
NYX | 0:85b3fd62ea1a | 913 | __HAL_UART_DISABLE_IT(huart, UART_IT_PE); |
NYX | 0:85b3fd62ea1a | 914 | __HAL_UART_DISABLE_IT(huart, UART_IT_ERR); |
NYX | 0:85b3fd62ea1a | 915 | |
NYX | 0:85b3fd62ea1a | 916 | // clear flags |
NYX | 0:85b3fd62ea1a | 917 | __HAL_UART_CLEAR_FLAG(huart, UART_FLAG_RXNE); |
NYX | 0:85b3fd62ea1a | 918 | volatile uint32_t tmpval = huart->Instance->DR; // Clear errors flag |
NYX | 0:85b3fd62ea1a | 919 | |
NYX | 0:85b3fd62ea1a | 920 | // reset states |
NYX | 0:85b3fd62ea1a | 921 | huart->RxXferCount = 0; |
NYX | 0:85b3fd62ea1a | 922 | // update handle state |
NYX | 0:85b3fd62ea1a | 923 | if(huart->RxState == HAL_UART_STATE_BUSY_TX_RX) { |
NYX | 0:85b3fd62ea1a | 924 | huart->RxState = HAL_UART_STATE_BUSY_TX; |
NYX | 0:85b3fd62ea1a | 925 | } else { |
NYX | 0:85b3fd62ea1a | 926 | huart->RxState = HAL_UART_STATE_READY; |
NYX | 0:85b3fd62ea1a | 927 | } |
NYX | 0:85b3fd62ea1a | 928 | } |
NYX | 0:85b3fd62ea1a | 929 | |
NYX | 0:85b3fd62ea1a | 930 | #endif |
NYX | 0:85b3fd62ea1a | 931 | |
NYX | 0:85b3fd62ea1a | 932 | #if DEVICE_SERIAL_FC |
NYX | 0:85b3fd62ea1a | 933 | |
NYX | 0:85b3fd62ea1a | 934 | /** |
NYX | 0:85b3fd62ea1a | 935 | * Set HW Control Flow |
NYX | 0:85b3fd62ea1a | 936 | * @param obj The serial object |
NYX | 0:85b3fd62ea1a | 937 | * @param type The Control Flow type (FlowControlNone, FlowControlRTS, FlowControlCTS, FlowControlRTSCTS) |
NYX | 0:85b3fd62ea1a | 938 | * @param rxflow Pin for the rxflow |
NYX | 0:85b3fd62ea1a | 939 | * @param txflow Pin for the txflow |
NYX | 0:85b3fd62ea1a | 940 | */ |
NYX | 0:85b3fd62ea1a | 941 | void serial_set_flow_control(serial_t *obj, FlowControl type, PinName rxflow, PinName txflow) |
NYX | 0:85b3fd62ea1a | 942 | { |
NYX | 0:85b3fd62ea1a | 943 | struct serial_s *obj_s = SERIAL_S(obj); |
NYX | 0:85b3fd62ea1a | 944 | |
NYX | 0:85b3fd62ea1a | 945 | // Determine the UART to use (UART_1, UART_2, ...) |
NYX | 0:85b3fd62ea1a | 946 | UARTName uart_rts = (UARTName)pinmap_peripheral(rxflow, PinMap_UART_RTS); |
NYX | 0:85b3fd62ea1a | 947 | UARTName uart_cts = (UARTName)pinmap_peripheral(txflow, PinMap_UART_CTS); |
NYX | 0:85b3fd62ea1a | 948 | |
NYX | 0:85b3fd62ea1a | 949 | // Get the peripheral name (UART_1, UART_2, ...) from the pin and assign it to the object |
NYX | 0:85b3fd62ea1a | 950 | obj_s->uart = (UARTName)pinmap_merge(uart_cts, uart_rts); |
NYX | 0:85b3fd62ea1a | 951 | MBED_ASSERT(obj_s->uart != (UARTName)NC); |
NYX | 0:85b3fd62ea1a | 952 | |
NYX | 0:85b3fd62ea1a | 953 | if(type == FlowControlNone) { |
NYX | 0:85b3fd62ea1a | 954 | // Disable hardware flow control |
NYX | 0:85b3fd62ea1a | 955 | obj_s->hw_flow_ctl = UART_HWCONTROL_NONE; |
NYX | 0:85b3fd62ea1a | 956 | } |
NYX | 0:85b3fd62ea1a | 957 | if (type == FlowControlRTS) { |
NYX | 0:85b3fd62ea1a | 958 | // Enable RTS |
NYX | 0:85b3fd62ea1a | 959 | MBED_ASSERT(uart_rts != (UARTName)NC); |
NYX | 0:85b3fd62ea1a | 960 | obj_s->hw_flow_ctl = UART_HWCONTROL_RTS; |
NYX | 0:85b3fd62ea1a | 961 | obj_s->pin_rts = rxflow; |
NYX | 0:85b3fd62ea1a | 962 | // Enable the pin for RTS function |
NYX | 0:85b3fd62ea1a | 963 | pinmap_pinout(rxflow, PinMap_UART_RTS); |
NYX | 0:85b3fd62ea1a | 964 | } |
NYX | 0:85b3fd62ea1a | 965 | if (type == FlowControlCTS) { |
NYX | 0:85b3fd62ea1a | 966 | // Enable CTS |
NYX | 0:85b3fd62ea1a | 967 | MBED_ASSERT(uart_cts != (UARTName)NC); |
NYX | 0:85b3fd62ea1a | 968 | obj_s->hw_flow_ctl = UART_HWCONTROL_CTS; |
NYX | 0:85b3fd62ea1a | 969 | obj_s->pin_cts = txflow; |
NYX | 0:85b3fd62ea1a | 970 | // Enable the pin for CTS function |
NYX | 0:85b3fd62ea1a | 971 | pinmap_pinout(txflow, PinMap_UART_CTS); |
NYX | 0:85b3fd62ea1a | 972 | } |
NYX | 0:85b3fd62ea1a | 973 | if (type == FlowControlRTSCTS) { |
NYX | 0:85b3fd62ea1a | 974 | // Enable CTS & RTS |
NYX | 0:85b3fd62ea1a | 975 | MBED_ASSERT(uart_rts != (UARTName)NC); |
NYX | 0:85b3fd62ea1a | 976 | MBED_ASSERT(uart_cts != (UARTName)NC); |
NYX | 0:85b3fd62ea1a | 977 | obj_s->hw_flow_ctl = UART_HWCONTROL_RTS_CTS; |
NYX | 0:85b3fd62ea1a | 978 | obj_s->pin_rts = rxflow; |
NYX | 0:85b3fd62ea1a | 979 | obj_s->pin_cts = txflow; |
NYX | 0:85b3fd62ea1a | 980 | // Enable the pin for CTS function |
NYX | 0:85b3fd62ea1a | 981 | pinmap_pinout(txflow, PinMap_UART_CTS); |
NYX | 0:85b3fd62ea1a | 982 | // Enable the pin for RTS function |
NYX | 0:85b3fd62ea1a | 983 | pinmap_pinout(rxflow, PinMap_UART_RTS); |
NYX | 0:85b3fd62ea1a | 984 | } |
NYX | 0:85b3fd62ea1a | 985 | |
NYX | 0:85b3fd62ea1a | 986 | init_uart(obj); |
NYX | 0:85b3fd62ea1a | 987 | } |
NYX | 0:85b3fd62ea1a | 988 | |
NYX | 0:85b3fd62ea1a | 989 | #endif |
NYX | 0:85b3fd62ea1a | 990 | |
NYX | 0:85b3fd62ea1a | 991 | #endif |