Takaaki Numai / mbed-dev

inport from local

Dependents:   Hobbyking_Cheetah_0511

targets/TARGET_STM/TARGET_STM32F4/pin_device.h@0:85b3fd62ea1a, 2020-03-16 (annotated)

Committer:
NYX
Date:
Mon Mar 16 06:35:48 2020 +0000
Revision:
0:85b3fd62ea1a
reinport to mbed;

Who changed what in which revision?

UserRevisionLine numberNew contents of line
NYX 0:85b3fd62ea1a 1 /* mbed Microcontroller Library
NYX 0:85b3fd62ea1a 2 *******************************************************************************
NYX 0:85b3fd62ea1a 3 * Copyright (c) 2016, STMicroelectronics
NYX 0:85b3fd62ea1a 4 * All rights reserved.
NYX 0:85b3fd62ea1a 5 *
NYX 0:85b3fd62ea1a 6 * Redistribution and use in source and binary forms, with or without
NYX 0:85b3fd62ea1a 7 * modification, are permitted provided that the following conditions are met:
NYX 0:85b3fd62ea1a 8 *
NYX 0:85b3fd62ea1a 9 * 1. Redistributions of source code must retain the above copyright notice,
NYX 0:85b3fd62ea1a 10 * this list of conditions and the following disclaimer.
NYX 0:85b3fd62ea1a 11 * 2. Redistributions in binary form must reproduce the above copyright notice,
NYX 0:85b3fd62ea1a 12 * this list of conditions and the following disclaimer in the documentation
NYX 0:85b3fd62ea1a 13 * and/or other materials provided with the distribution.
NYX 0:85b3fd62ea1a 14 * 3. Neither the name of STMicroelectronics nor the names of its contributors
NYX 0:85b3fd62ea1a 15 * may be used to endorse or promote products derived from this software
NYX 0:85b3fd62ea1a 16 * without specific prior written permission.
NYX 0:85b3fd62ea1a 17 *
NYX 0:85b3fd62ea1a 18 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
NYX 0:85b3fd62ea1a 19 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
NYX 0:85b3fd62ea1a 20 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
NYX 0:85b3fd62ea1a 21 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
NYX 0:85b3fd62ea1a 22 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
NYX 0:85b3fd62ea1a 23 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
NYX 0:85b3fd62ea1a 24 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
NYX 0:85b3fd62ea1a 25 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
NYX 0:85b3fd62ea1a 26 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
NYX 0:85b3fd62ea1a 27 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
NYX 0:85b3fd62ea1a 28 *******************************************************************************
NYX 0:85b3fd62ea1a 29 */
NYX 0:85b3fd62ea1a 30 #ifndef MBED_PIN_DEVICE_H
NYX 0:85b3fd62ea1a 31 #define MBED_PIN_DEVICE_H
NYX 0:85b3fd62ea1a 32
NYX 0:85b3fd62ea1a 33 #include "cmsis.h"
NYX 0:85b3fd62ea1a 34
NYX 0:85b3fd62ea1a 35 // when LL is available, below include can be used
NYX 0:85b3fd62ea1a 36 // #include "stm32f4xx_ll_gpio.h"
NYX 0:85b3fd62ea1a 37 // until then let's define locally the required functions
NYX 0:85b3fd62ea1a 38 #define LL_GPIO_PIN_0 GPIO_BSRR_BS_0 /*!< Select pin 0 */
NYX 0:85b3fd62ea1a 39 #define LL_GPIO_PIN_1 GPIO_BSRR_BS_1 /*!< Select pin 1 */
NYX 0:85b3fd62ea1a 40 #define LL_GPIO_PIN_2 GPIO_BSRR_BS_2 /*!< Select pin 2 */
NYX 0:85b3fd62ea1a 41 #define LL_GPIO_PIN_3 GPIO_BSRR_BS_3 /*!< Select pin 3 */
NYX 0:85b3fd62ea1a 42 #define LL_GPIO_PIN_4 GPIO_BSRR_BS_4 /*!< Select pin 4 */
NYX 0:85b3fd62ea1a 43 #define LL_GPIO_PIN_5 GPIO_BSRR_BS_5 /*!< Select pin 5 */
NYX 0:85b3fd62ea1a 44 #define LL_GPIO_PIN_6 GPIO_BSRR_BS_6 /*!< Select pin 6 */
NYX 0:85b3fd62ea1a 45 #define LL_GPIO_PIN_7 GPIO_BSRR_BS_7 /*!< Select pin 7 */
NYX 0:85b3fd62ea1a 46 #define LL_GPIO_PIN_8 GPIO_BSRR_BS_8 /*!< Select pin 8 */
NYX 0:85b3fd62ea1a 47 #define LL_GPIO_PIN_9 GPIO_BSRR_BS_9 /*!< Select pin 9 */
NYX 0:85b3fd62ea1a 48 #define LL_GPIO_PIN_10 GPIO_BSRR_BS_10 /*!< Select pin 10 */
NYX 0:85b3fd62ea1a 49 #define LL_GPIO_PIN_11 GPIO_BSRR_BS_11 /*!< Select pin 11 */
NYX 0:85b3fd62ea1a 50 #define LL_GPIO_PIN_12 GPIO_BSRR_BS_12 /*!< Select pin 12 */
NYX 0:85b3fd62ea1a 51 #define LL_GPIO_PIN_13 GPIO_BSRR_BS_13 /*!< Select pin 13 */
NYX 0:85b3fd62ea1a 52 #define LL_GPIO_PIN_14 GPIO_BSRR_BS_14 /*!< Select pin 14 */
NYX 0:85b3fd62ea1a 53 #define LL_GPIO_PIN_15 GPIO_BSRR_BS_15 /*!< Select pin 15 */
NYX 0:85b3fd62ea1a 54
NYX 0:85b3fd62ea1a 55 #define LL_GPIO_MODE_INPUT ((uint32_t)0x00000000U) /*!< Select input mode */
NYX 0:85b3fd62ea1a 56 #define LL_GPIO_MODE_OUTPUT GPIO_MODER_MODER0_0 /*!< Select output mode */
NYX 0:85b3fd62ea1a 57 #define LL_GPIO_MODE_ALTERNATE GPIO_MODER_MODER0_1 /*!< Select alternate function mode */
NYX 0:85b3fd62ea1a 58 #define LL_GPIO_MODE_ANALOG GPIO_MODER_MODER0 /*!< Select analog mode */
NYX 0:85b3fd62ea1a 59
NYX 0:85b3fd62ea1a 60 #define LL_GPIO_OUTPUT_PUSHPULL ((uint32_t)0x00000000U) /*!< Select push-pull as output type */
NYX 0:85b3fd62ea1a 61 #define LL_GPIO_OUTPUT_OPENDRAIN GPIO_OTYPER_OT_0 /*!< Select open-drain as output type */
NYX 0:85b3fd62ea1a 62
NYX 0:85b3fd62ea1a 63 #define LL_GPIO_PULL_NO ((uint32_t)0x00000000U) /*!< Select I/O no pull */
NYX 0:85b3fd62ea1a 64 #define LL_GPIO_PULL_UP GPIO_PUPDR_PUPDR0_0 /*!< Select I/O pull up */
NYX 0:85b3fd62ea1a 65 #define LL_GPIO_PULL_DOWN GPIO_PUPDR_PUPDR0_1 /*!< Select I/O pull down */
NYX 0:85b3fd62ea1a 66
NYX 0:85b3fd62ea1a 67 #define LL_GPIO_SPEED_FREQ_LOW ((uint32_t)0x00000000U) /*!< Select I/O low output speed */
NYX 0:85b3fd62ea1a 68 #define LL_GPIO_SPEED_FREQ_MEDIUM GPIO_OSPEEDER_OSPEEDR0_0 /*!< Select I/O medium output speed */
NYX 0:85b3fd62ea1a 69 #define LL_GPIO_SPEED_FREQ_HIGH GPIO_OSPEEDER_OSPEEDR0_1 /*!< Select I/O fast output speed */
NYX 0:85b3fd62ea1a 70 #define LL_GPIO_SPEED_FREQ_VERY_HIGH GPIO_OSPEEDER_OSPEEDR0 /*!< Select I/O high output speed */
NYX 0:85b3fd62ea1a 71
NYX 0:85b3fd62ea1a 72 __STATIC_INLINE void LL_GPIO_SetAFPin_0_7(GPIO_TypeDef *GPIOx, uint32_t Pin, uint32_t Alternate)
NYX 0:85b3fd62ea1a 73 {
NYX 0:85b3fd62ea1a 74 MODIFY_REG(GPIOx->AFR[0], (0xFU << (POSITION_VAL(Pin) * 4U)),
NYX 0:85b3fd62ea1a 75 (Alternate << (POSITION_VAL(Pin) * 4U)));
NYX 0:85b3fd62ea1a 76 }
NYX 0:85b3fd62ea1a 77 __STATIC_INLINE void LL_GPIO_SetAFPin_8_15(GPIO_TypeDef *GPIOx, uint32_t Pin, uint32_t Alternate)
NYX 0:85b3fd62ea1a 78 {
NYX 0:85b3fd62ea1a 79 MODIFY_REG(GPIOx->AFR[1], (0xFU << (POSITION_VAL(Pin >> 8U) * 4U)),
NYX 0:85b3fd62ea1a 80 (Alternate << (POSITION_VAL(Pin >> 8U) * 4U)));
NYX 0:85b3fd62ea1a 81 }
NYX 0:85b3fd62ea1a 82 __STATIC_INLINE void LL_GPIO_SetPinMode(GPIO_TypeDef *GPIOx, uint32_t Pin, uint32_t Mode)
NYX 0:85b3fd62ea1a 83 {
NYX 0:85b3fd62ea1a 84 MODIFY_REG(GPIOx->MODER, (GPIO_MODER_MODER0 << (POSITION_VAL(Pin) * 2U)), (Mode << (POSITION_VAL(Pin) * 2U)));
NYX 0:85b3fd62ea1a 85 }
NYX 0:85b3fd62ea1a 86 __STATIC_INLINE uint32_t LL_GPIO_GetPinMode(GPIO_TypeDef *GPIOx, uint32_t Pin)
NYX 0:85b3fd62ea1a 87 {
NYX 0:85b3fd62ea1a 88 return (uint32_t)(READ_BIT(GPIOx->MODER, ((Pin * Pin) * GPIO_MODER_MODER0)) / (Pin * Pin));
NYX 0:85b3fd62ea1a 89 }
NYX 0:85b3fd62ea1a 90 __STATIC_INLINE void LL_GPIO_SetPinPull(GPIO_TypeDef *GPIOx, uint32_t Pin, uint32_t Pull)
NYX 0:85b3fd62ea1a 91 {
NYX 0:85b3fd62ea1a 92 MODIFY_REG(GPIOx->PUPDR, (GPIO_PUPDR_PUPDR0 << (POSITION_VAL(Pin) * 2U)), (Pull << (POSITION_VAL(Pin) * 2U)));
NYX 0:85b3fd62ea1a 93 }
NYX 0:85b3fd62ea1a 94 __STATIC_INLINE void LL_GPIO_SetPinOutputType(GPIO_TypeDef *GPIOx, uint32_t PinMask, uint32_t OutputType)
NYX 0:85b3fd62ea1a 95 {
NYX 0:85b3fd62ea1a 96 MODIFY_REG(GPIOx->OTYPER, PinMask, (PinMask * OutputType));
NYX 0:85b3fd62ea1a 97 }
NYX 0:85b3fd62ea1a 98 __STATIC_INLINE void LL_GPIO_SetPinSpeed(GPIO_TypeDef *GPIOx, uint32_t Pin, uint32_t Speed)
NYX 0:85b3fd62ea1a 99 {
NYX 0:85b3fd62ea1a 100 MODIFY_REG(GPIOx->OSPEEDR, (GPIO_OSPEEDER_OSPEEDR0 << (POSITION_VAL(Pin) * 2U)),
NYX 0:85b3fd62ea1a 101 (Speed << (POSITION_VAL(Pin) * 2U)));
NYX 0:85b3fd62ea1a 102 }
NYX 0:85b3fd62ea1a 103 // Above lines shall be defined in LL when available
NYX 0:85b3fd62ea1a 104
NYX 0:85b3fd62ea1a 105 extern const uint32_t ll_pin_defines[16];
NYX 0:85b3fd62ea1a 106
NYX 0:85b3fd62ea1a 107 /* Family specific implementations */
NYX 0:85b3fd62ea1a 108 static inline void stm_pin_DisconnectDebug(PinName pin)
NYX 0:85b3fd62ea1a 109 {
NYX 0:85b3fd62ea1a 110 /* empty for now */
NYX 0:85b3fd62ea1a 111 }
NYX 0:85b3fd62ea1a 112
NYX 0:85b3fd62ea1a 113 static inline void stm_pin_PullConfig(GPIO_TypeDef *gpio, uint32_t ll_pin, uint32_t pull_config)
NYX 0:85b3fd62ea1a 114 {
NYX 0:85b3fd62ea1a 115 switch (pull_config) {
NYX 0:85b3fd62ea1a 116 case GPIO_PULLUP:
NYX 0:85b3fd62ea1a 117 LL_GPIO_SetPinPull(gpio, ll_pin, LL_GPIO_PULL_UP);
NYX 0:85b3fd62ea1a 118 break;
NYX 0:85b3fd62ea1a 119 case GPIO_PULLDOWN:
NYX 0:85b3fd62ea1a 120 LL_GPIO_SetPinPull(gpio, ll_pin, LL_GPIO_PULL_DOWN);
NYX 0:85b3fd62ea1a 121 break;
NYX 0:85b3fd62ea1a 122 default:
NYX 0:85b3fd62ea1a 123 LL_GPIO_SetPinPull(gpio, ll_pin, LL_GPIO_PULL_NO);
NYX 0:85b3fd62ea1a 124 break;
NYX 0:85b3fd62ea1a 125 }
NYX 0:85b3fd62ea1a 126 }
NYX 0:85b3fd62ea1a 127
NYX 0:85b3fd62ea1a 128 static inline void stm_pin_SetAFPin( GPIO_TypeDef *gpio, PinName pin, uint32_t afnum)
NYX 0:85b3fd62ea1a 129 {
NYX 0:85b3fd62ea1a 130 uint32_t ll_pin = ll_pin_defines[STM_PIN(pin)];
NYX 0:85b3fd62ea1a 131
NYX 0:85b3fd62ea1a 132 if (STM_PIN(pin) > 7)
NYX 0:85b3fd62ea1a 133 LL_GPIO_SetAFPin_8_15(gpio, ll_pin, afnum);
NYX 0:85b3fd62ea1a 134 else
NYX 0:85b3fd62ea1a 135 LL_GPIO_SetAFPin_0_7(gpio, ll_pin, afnum);
NYX 0:85b3fd62ea1a 136 }
NYX 0:85b3fd62ea1a 137
NYX 0:85b3fd62ea1a 138 #endif