Takaaki Numai / mbed-dev

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targets/TARGET_STM/TARGET_STM32F4/device/stm32f4xx_ll_usb.c@0:85b3fd62ea1a, 2020-03-16 (annotated)

Committer:
NYX
Date:
Mon Mar 16 06:35:48 2020 +0000
Revision:
0:85b3fd62ea1a
reinport to mbed;

Who changed what in which revision?

UserRevisionLine numberNew contents of line
NYX 0:85b3fd62ea1a 1 /**
NYX 0:85b3fd62ea1a 2 ******************************************************************************
NYX 0:85b3fd62ea1a 3 * @file stm32f4xx_ll_usb.c
NYX 0:85b3fd62ea1a 4 * @author MCD Application Team
NYX 0:85b3fd62ea1a 5 * @version V1.7.1
NYX 0:85b3fd62ea1a 6 * @date 14-April-2017
NYX 0:85b3fd62ea1a 7 * @brief USB Low Layer HAL module driver.
NYX 0:85b3fd62ea1a 8 *
NYX 0:85b3fd62ea1a 9 * This file provides firmware functions to manage the following
NYX 0:85b3fd62ea1a 10 * functionalities of the USB Peripheral Controller:
NYX 0:85b3fd62ea1a 11 * + Initialization/de-initialization functions
NYX 0:85b3fd62ea1a 12 * + I/O operation functions
NYX 0:85b3fd62ea1a 13 * + Peripheral Control functions
NYX 0:85b3fd62ea1a 14 * + Peripheral State functions
NYX 0:85b3fd62ea1a 15 *
NYX 0:85b3fd62ea1a 16 @verbatim
NYX 0:85b3fd62ea1a 17 ==============================================================================
NYX 0:85b3fd62ea1a 18 ##### How to use this driver #####
NYX 0:85b3fd62ea1a 19 ==============================================================================
NYX 0:85b3fd62ea1a 20 [..]
NYX 0:85b3fd62ea1a 21 (#) Fill parameters of Init structure in USB_OTG_CfgTypeDef structure.
NYX 0:85b3fd62ea1a 22
NYX 0:85b3fd62ea1a 23 (#) Call USB_CoreInit() API to initialize the USB Core peripheral.
NYX 0:85b3fd62ea1a 24
NYX 0:85b3fd62ea1a 25 (#) The upper HAL HCD/PCD driver will call the right routines for its internal processes.
NYX 0:85b3fd62ea1a 26
NYX 0:85b3fd62ea1a 27 @endverbatim
NYX 0:85b3fd62ea1a 28 ******************************************************************************
NYX 0:85b3fd62ea1a 29 * @attention
NYX 0:85b3fd62ea1a 30 *
NYX 0:85b3fd62ea1a 31 * <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
NYX 0:85b3fd62ea1a 32 *
NYX 0:85b3fd62ea1a 33 * Redistribution and use in source and binary forms, with or without modification,
NYX 0:85b3fd62ea1a 34 * are permitted provided that the following conditions are met:
NYX 0:85b3fd62ea1a 35 * 1. Redistributions of source code must retain the above copyright notice,
NYX 0:85b3fd62ea1a 36 * this list of conditions and the following disclaimer.
NYX 0:85b3fd62ea1a 37 * 2. Redistributions in binary form must reproduce the above copyright notice,
NYX 0:85b3fd62ea1a 38 * this list of conditions and the following disclaimer in the documentation
NYX 0:85b3fd62ea1a 39 * and/or other materials provided with the distribution.
NYX 0:85b3fd62ea1a 40 * 3. Neither the name of STMicroelectronics nor the names of its contributors
NYX 0:85b3fd62ea1a 41 * may be used to endorse or promote products derived from this software
NYX 0:85b3fd62ea1a 42 * without specific prior written permission.
NYX 0:85b3fd62ea1a 43 *
NYX 0:85b3fd62ea1a 44 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
NYX 0:85b3fd62ea1a 45 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
NYX 0:85b3fd62ea1a 46 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
NYX 0:85b3fd62ea1a 47 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
NYX 0:85b3fd62ea1a 48 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
NYX 0:85b3fd62ea1a 49 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
NYX 0:85b3fd62ea1a 50 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
NYX 0:85b3fd62ea1a 51 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
NYX 0:85b3fd62ea1a 52 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
NYX 0:85b3fd62ea1a 53 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
NYX 0:85b3fd62ea1a 54 *
NYX 0:85b3fd62ea1a 55 ******************************************************************************
NYX 0:85b3fd62ea1a 56 */
NYX 0:85b3fd62ea1a 57
NYX 0:85b3fd62ea1a 58 /* Includes ------------------------------------------------------------------*/
NYX 0:85b3fd62ea1a 59 #include "stm32f4xx_hal.h"
NYX 0:85b3fd62ea1a 60
NYX 0:85b3fd62ea1a 61 /** @addtogroup STM32F4xx_LL_USB_DRIVER
NYX 0:85b3fd62ea1a 62 * @{
NYX 0:85b3fd62ea1a 63 */
NYX 0:85b3fd62ea1a 64
NYX 0:85b3fd62ea1a 65 #if defined(HAL_PCD_MODULE_ENABLED) || defined(HAL_HCD_MODULE_ENABLED)
NYX 0:85b3fd62ea1a 66 #if defined(STM32F405xx) || defined(STM32F415xx) || defined(STM32F407xx) || defined(STM32F417xx) || \
NYX 0:85b3fd62ea1a 67 defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx) || \
NYX 0:85b3fd62ea1a 68 defined(STM32F401xC) || defined(STM32F401xE) || defined(STM32F411xE) || defined(STM32F446xx) || \
NYX 0:85b3fd62ea1a 69 defined(STM32F469xx) || defined(STM32F479xx) || defined(STM32F412Zx) || defined(STM32F412Vx) || \
NYX 0:85b3fd62ea1a 70 defined(STM32F412Rx) || defined(STM32F412Cx) || defined(STM32F413xx) || defined(STM32F423xx)
NYX 0:85b3fd62ea1a 71 /* Private typedef -----------------------------------------------------------*/
NYX 0:85b3fd62ea1a 72 /* Private define ------------------------------------------------------------*/
NYX 0:85b3fd62ea1a 73 /* Private macro -------------------------------------------------------------*/
NYX 0:85b3fd62ea1a 74 /* Private variables ---------------------------------------------------------*/
NYX 0:85b3fd62ea1a 75 /* Private function prototypes -----------------------------------------------*/
NYX 0:85b3fd62ea1a 76 /* Private functions ---------------------------------------------------------*/
NYX 0:85b3fd62ea1a 77 static HAL_StatusTypeDef USB_CoreReset(USB_OTG_GlobalTypeDef *USBx);
NYX 0:85b3fd62ea1a 78
NYX 0:85b3fd62ea1a 79 /* Exported functions --------------------------------------------------------*/
NYX 0:85b3fd62ea1a 80
NYX 0:85b3fd62ea1a 81 /** @defgroup LL_USB_Exported_Functions USB Low Layer Exported Functions
NYX 0:85b3fd62ea1a 82 * @{
NYX 0:85b3fd62ea1a 83 */
NYX 0:85b3fd62ea1a 84
NYX 0:85b3fd62ea1a 85 /** @defgroup LL_USB_Group1 Initialization/de-initialization functions
NYX 0:85b3fd62ea1a 86 * @brief Initialization and Configuration functions
NYX 0:85b3fd62ea1a 87 *
NYX 0:85b3fd62ea1a 88 @verbatim
NYX 0:85b3fd62ea1a 89 ===============================================================================
NYX 0:85b3fd62ea1a 90 ##### Initialization/de-initialization functions #####
NYX 0:85b3fd62ea1a 91 ===============================================================================
NYX 0:85b3fd62ea1a 92 [..] This section provides functions allowing to:
NYX 0:85b3fd62ea1a 93
NYX 0:85b3fd62ea1a 94 @endverbatim
NYX 0:85b3fd62ea1a 95 * @{
NYX 0:85b3fd62ea1a 96 */
NYX 0:85b3fd62ea1a 97
NYX 0:85b3fd62ea1a 98 /**
NYX 0:85b3fd62ea1a 99 * @brief Initializes the USB Core
NYX 0:85b3fd62ea1a 100 * @param USBx: USB Instance
NYX 0:85b3fd62ea1a 101 * @param cfg : pointer to a USB_OTG_CfgTypeDef structure that contains
NYX 0:85b3fd62ea1a 102 * the configuration information for the specified USBx peripheral.
NYX 0:85b3fd62ea1a 103 * @retval HAL status
NYX 0:85b3fd62ea1a 104 */
NYX 0:85b3fd62ea1a 105 HAL_StatusTypeDef USB_CoreInit(USB_OTG_GlobalTypeDef *USBx, USB_OTG_CfgTypeDef cfg)
NYX 0:85b3fd62ea1a 106 {
NYX 0:85b3fd62ea1a 107 if (cfg.phy_itface == USB_OTG_ULPI_PHY)
NYX 0:85b3fd62ea1a 108 {
NYX 0:85b3fd62ea1a 109
NYX 0:85b3fd62ea1a 110 USBx->GCCFG &= ~(USB_OTG_GCCFG_PWRDWN);
NYX 0:85b3fd62ea1a 111
NYX 0:85b3fd62ea1a 112 /* Init The ULPI Interface */
NYX 0:85b3fd62ea1a 113 USBx->GUSBCFG &= ~(USB_OTG_GUSBCFG_TSDPS | USB_OTG_GUSBCFG_ULPIFSLS | USB_OTG_GUSBCFG_PHYSEL);
NYX 0:85b3fd62ea1a 114
NYX 0:85b3fd62ea1a 115 /* Select vbus source */
NYX 0:85b3fd62ea1a 116 USBx->GUSBCFG &= ~(USB_OTG_GUSBCFG_ULPIEVBUSD | USB_OTG_GUSBCFG_ULPIEVBUSI);
NYX 0:85b3fd62ea1a 117 if(cfg.use_external_vbus == 1U)
NYX 0:85b3fd62ea1a 118 {
NYX 0:85b3fd62ea1a 119 USBx->GUSBCFG |= USB_OTG_GUSBCFG_ULPIEVBUSD;
NYX 0:85b3fd62ea1a 120 }
NYX 0:85b3fd62ea1a 121 /* Reset after a PHY select */
NYX 0:85b3fd62ea1a 122 USB_CoreReset(USBx);
NYX 0:85b3fd62ea1a 123 }
NYX 0:85b3fd62ea1a 124 else /* FS interface (embedded Phy) */
NYX 0:85b3fd62ea1a 125 {
NYX 0:85b3fd62ea1a 126 /* Select FS Embedded PHY */
NYX 0:85b3fd62ea1a 127 USBx->GUSBCFG |= USB_OTG_GUSBCFG_PHYSEL;
NYX 0:85b3fd62ea1a 128
NYX 0:85b3fd62ea1a 129 /* Reset after a PHY select and set Host mode */
NYX 0:85b3fd62ea1a 130 USB_CoreReset(USBx);
NYX 0:85b3fd62ea1a 131
NYX 0:85b3fd62ea1a 132 /* Deactivate the power down*/
NYX 0:85b3fd62ea1a 133 USBx->GCCFG = USB_OTG_GCCFG_PWRDWN;
NYX 0:85b3fd62ea1a 134 }
NYX 0:85b3fd62ea1a 135
NYX 0:85b3fd62ea1a 136 if(cfg.dma_enable == ENABLE)
NYX 0:85b3fd62ea1a 137 {
NYX 0:85b3fd62ea1a 138 USBx->GAHBCFG |= USB_OTG_GAHBCFG_HBSTLEN_2;
NYX 0:85b3fd62ea1a 139 USBx->GAHBCFG |= USB_OTG_GAHBCFG_DMAEN;
NYX 0:85b3fd62ea1a 140 }
NYX 0:85b3fd62ea1a 141
NYX 0:85b3fd62ea1a 142 return HAL_OK;
NYX 0:85b3fd62ea1a 143 }
NYX 0:85b3fd62ea1a 144
NYX 0:85b3fd62ea1a 145 /**
NYX 0:85b3fd62ea1a 146 * @brief USB_EnableGlobalInt
NYX 0:85b3fd62ea1a 147 * Enables the controller's Global Int in the AHB Config reg
NYX 0:85b3fd62ea1a 148 * @param USBx : Selected device
NYX 0:85b3fd62ea1a 149 * @retval HAL status
NYX 0:85b3fd62ea1a 150 */
NYX 0:85b3fd62ea1a 151 HAL_StatusTypeDef USB_EnableGlobalInt(USB_OTG_GlobalTypeDef *USBx)
NYX 0:85b3fd62ea1a 152 {
NYX 0:85b3fd62ea1a 153 USBx->GAHBCFG |= USB_OTG_GAHBCFG_GINT;
NYX 0:85b3fd62ea1a 154 return HAL_OK;
NYX 0:85b3fd62ea1a 155 }
NYX 0:85b3fd62ea1a 156
NYX 0:85b3fd62ea1a 157
NYX 0:85b3fd62ea1a 158 /**
NYX 0:85b3fd62ea1a 159 * @brief USB_DisableGlobalInt
NYX 0:85b3fd62ea1a 160 * Disable the controller's Global Int in the AHB Config reg
NYX 0:85b3fd62ea1a 161 * @param USBx : Selected device
NYX 0:85b3fd62ea1a 162 * @retval HAL status
NYX 0:85b3fd62ea1a 163 */
NYX 0:85b3fd62ea1a 164 HAL_StatusTypeDef USB_DisableGlobalInt(USB_OTG_GlobalTypeDef *USBx)
NYX 0:85b3fd62ea1a 165 {
NYX 0:85b3fd62ea1a 166 USBx->GAHBCFG &= ~USB_OTG_GAHBCFG_GINT;
NYX 0:85b3fd62ea1a 167 return HAL_OK;
NYX 0:85b3fd62ea1a 168 }
NYX 0:85b3fd62ea1a 169
NYX 0:85b3fd62ea1a 170 /**
NYX 0:85b3fd62ea1a 171 * @brief USB_SetCurrentMode : Set functional mode
NYX 0:85b3fd62ea1a 172 * @param USBx : Selected device
NYX 0:85b3fd62ea1a 173 * @param mode : current core mode
NYX 0:85b3fd62ea1a 174 * This parameter can be one of these values:
NYX 0:85b3fd62ea1a 175 * @arg USB_OTG_DEVICE_MODE: Peripheral mode
NYX 0:85b3fd62ea1a 176 * @arg USB_OTG_HOST_MODE: Host mode
NYX 0:85b3fd62ea1a 177 * @arg USB_OTG_DRD_MODE: Dual Role Device mode
NYX 0:85b3fd62ea1a 178 * @retval HAL status
NYX 0:85b3fd62ea1a 179 */
NYX 0:85b3fd62ea1a 180 HAL_StatusTypeDef USB_SetCurrentMode(USB_OTG_GlobalTypeDef *USBx , USB_OTG_ModeTypeDef mode)
NYX 0:85b3fd62ea1a 181 {
NYX 0:85b3fd62ea1a 182 USBx->GUSBCFG &= ~(USB_OTG_GUSBCFG_FHMOD | USB_OTG_GUSBCFG_FDMOD);
NYX 0:85b3fd62ea1a 183
NYX 0:85b3fd62ea1a 184 if ( mode == USB_OTG_HOST_MODE)
NYX 0:85b3fd62ea1a 185 {
NYX 0:85b3fd62ea1a 186 USBx->GUSBCFG |= USB_OTG_GUSBCFG_FHMOD;
NYX 0:85b3fd62ea1a 187 }
NYX 0:85b3fd62ea1a 188 else if ( mode == USB_OTG_DEVICE_MODE)
NYX 0:85b3fd62ea1a 189 {
NYX 0:85b3fd62ea1a 190 USBx->GUSBCFG |= USB_OTG_GUSBCFG_FDMOD;
NYX 0:85b3fd62ea1a 191 }
NYX 0:85b3fd62ea1a 192 HAL_Delay(50U);
NYX 0:85b3fd62ea1a 193
NYX 0:85b3fd62ea1a 194 return HAL_OK;
NYX 0:85b3fd62ea1a 195 }
NYX 0:85b3fd62ea1a 196
NYX 0:85b3fd62ea1a 197 /**
NYX 0:85b3fd62ea1a 198 * @brief USB_DevInit : Initializes the USB_OTG controller registers
NYX 0:85b3fd62ea1a 199 * for device mode
NYX 0:85b3fd62ea1a 200 * @param USBx : Selected device
NYX 0:85b3fd62ea1a 201 * @param cfg : pointer to a USB_OTG_CfgTypeDef structure that contains
NYX 0:85b3fd62ea1a 202 * the configuration information for the specified USBx peripheral.
NYX 0:85b3fd62ea1a 203 * @retval HAL status
NYX 0:85b3fd62ea1a 204 */
NYX 0:85b3fd62ea1a 205 HAL_StatusTypeDef USB_DevInit (USB_OTG_GlobalTypeDef *USBx, USB_OTG_CfgTypeDef cfg)
NYX 0:85b3fd62ea1a 206 {
NYX 0:85b3fd62ea1a 207 uint32_t i = 0U;
NYX 0:85b3fd62ea1a 208
NYX 0:85b3fd62ea1a 209 /*Activate VBUS Sensing B */
NYX 0:85b3fd62ea1a 210 #if defined(STM32F446xx) || defined(STM32F469xx) || defined(STM32F479xx) || defined(STM32F412Zx) || defined(STM32F412Vx) || \
NYX 0:85b3fd62ea1a 211 defined(STM32F412Rx) || defined(STM32F412Cx) || defined(STM32F413xx) || defined(STM32F423xx)
NYX 0:85b3fd62ea1a 212 USBx->GCCFG |= USB_OTG_GCCFG_VBDEN;
NYX 0:85b3fd62ea1a 213
NYX 0:85b3fd62ea1a 214 if (cfg.vbus_sensing_enable == 0U)
NYX 0:85b3fd62ea1a 215 {
NYX 0:85b3fd62ea1a 216 /* Deactivate VBUS Sensing B */
NYX 0:85b3fd62ea1a 217 USBx->GCCFG &= ~USB_OTG_GCCFG_VBDEN;
NYX 0:85b3fd62ea1a 218
NYX 0:85b3fd62ea1a 219 /* B-peripheral session valid override enable*/
NYX 0:85b3fd62ea1a 220 USBx->GOTGCTL |= USB_OTG_GOTGCTL_BVALOEN;
NYX 0:85b3fd62ea1a 221 USBx->GOTGCTL |= USB_OTG_GOTGCTL_BVALOVAL;
NYX 0:85b3fd62ea1a 222 }
NYX 0:85b3fd62ea1a 223 #else
NYX 0:85b3fd62ea1a 224 if (cfg.vbus_sensing_enable == 0U)
NYX 0:85b3fd62ea1a 225 {
NYX 0:85b3fd62ea1a 226 USBx->GCCFG |= USB_OTG_GCCFG_NOVBUSSENS;
NYX 0:85b3fd62ea1a 227 }
NYX 0:85b3fd62ea1a 228 else
NYX 0:85b3fd62ea1a 229 {
NYX 0:85b3fd62ea1a 230 /* Enable VBUS */
NYX 0:85b3fd62ea1a 231 USBx->GCCFG |= USB_OTG_GCCFG_VBUSBSEN;
NYX 0:85b3fd62ea1a 232 }
NYX 0:85b3fd62ea1a 233 #endif /* STM32F446xx || STM32F469xx || STM32F479xx || STM32F412Zx || STM32F412Rx || STM32F412Vx || STM32F412Cx || STM32F413xx || STM32F423xx */
NYX 0:85b3fd62ea1a 234
NYX 0:85b3fd62ea1a 235 /* Restart the Phy Clock */
NYX 0:85b3fd62ea1a 236 USBx_PCGCCTL = 0U;
NYX 0:85b3fd62ea1a 237
NYX 0:85b3fd62ea1a 238 /* Device mode configuration */
NYX 0:85b3fd62ea1a 239 USBx_DEVICE->DCFG |= DCFG_FRAME_INTERVAL_80;
NYX 0:85b3fd62ea1a 240
NYX 0:85b3fd62ea1a 241 if(cfg.phy_itface == USB_OTG_ULPI_PHY)
NYX 0:85b3fd62ea1a 242 {
NYX 0:85b3fd62ea1a 243 if(cfg.speed == USB_OTG_SPEED_HIGH)
NYX 0:85b3fd62ea1a 244 {
NYX 0:85b3fd62ea1a 245 /* Set High speed phy */
NYX 0:85b3fd62ea1a 246 USB_SetDevSpeed (USBx , USB_OTG_SPEED_HIGH);
NYX 0:85b3fd62ea1a 247 }
NYX 0:85b3fd62ea1a 248 else
NYX 0:85b3fd62ea1a 249 {
NYX 0:85b3fd62ea1a 250 /* set High speed phy in Full speed mode */
NYX 0:85b3fd62ea1a 251 USB_SetDevSpeed (USBx , USB_OTG_SPEED_HIGH_IN_FULL);
NYX 0:85b3fd62ea1a 252 }
NYX 0:85b3fd62ea1a 253 }
NYX 0:85b3fd62ea1a 254 else
NYX 0:85b3fd62ea1a 255 {
NYX 0:85b3fd62ea1a 256 /* Set Full speed phy */
NYX 0:85b3fd62ea1a 257 USB_SetDevSpeed (USBx , USB_OTG_SPEED_FULL);
NYX 0:85b3fd62ea1a 258 }
NYX 0:85b3fd62ea1a 259
NYX 0:85b3fd62ea1a 260 /* Flush the FIFOs */
NYX 0:85b3fd62ea1a 261 USB_FlushTxFifo(USBx , 0x10U); /* all Tx FIFOs */
NYX 0:85b3fd62ea1a 262 USB_FlushRxFifo(USBx);
NYX 0:85b3fd62ea1a 263
NYX 0:85b3fd62ea1a 264 /* Clear all pending Device Interrupts */
NYX 0:85b3fd62ea1a 265 USBx_DEVICE->DIEPMSK = 0U;
NYX 0:85b3fd62ea1a 266 USBx_DEVICE->DOEPMSK = 0U;
NYX 0:85b3fd62ea1a 267 USBx_DEVICE->DAINT = 0xFFFFFFFFU;
NYX 0:85b3fd62ea1a 268 USBx_DEVICE->DAINTMSK = 0U;
NYX 0:85b3fd62ea1a 269
NYX 0:85b3fd62ea1a 270 for (i = 0U; i < cfg.dev_endpoints; i++)
NYX 0:85b3fd62ea1a 271 {
NYX 0:85b3fd62ea1a 272 if ((USBx_INEP(i)->DIEPCTL & USB_OTG_DIEPCTL_EPENA) == USB_OTG_DIEPCTL_EPENA)
NYX 0:85b3fd62ea1a 273 {
NYX 0:85b3fd62ea1a 274 USBx_INEP(i)->DIEPCTL = (USB_OTG_DIEPCTL_EPDIS | USB_OTG_DIEPCTL_SNAK);
NYX 0:85b3fd62ea1a 275 }
NYX 0:85b3fd62ea1a 276 else
NYX 0:85b3fd62ea1a 277 {
NYX 0:85b3fd62ea1a 278 USBx_INEP(i)->DIEPCTL = 0U;
NYX 0:85b3fd62ea1a 279 }
NYX 0:85b3fd62ea1a 280
NYX 0:85b3fd62ea1a 281 USBx_INEP(i)->DIEPTSIZ = 0U;
NYX 0:85b3fd62ea1a 282 USBx_INEP(i)->DIEPINT = 0xFFU;
NYX 0:85b3fd62ea1a 283 }
NYX 0:85b3fd62ea1a 284
NYX 0:85b3fd62ea1a 285 for (i = 0U; i < cfg.dev_endpoints; i++)
NYX 0:85b3fd62ea1a 286 {
NYX 0:85b3fd62ea1a 287 if ((USBx_OUTEP(i)->DOEPCTL & USB_OTG_DOEPCTL_EPENA) == USB_OTG_DOEPCTL_EPENA)
NYX 0:85b3fd62ea1a 288 {
NYX 0:85b3fd62ea1a 289 USBx_OUTEP(i)->DOEPCTL = (USB_OTG_DOEPCTL_EPDIS | USB_OTG_DOEPCTL_SNAK);
NYX 0:85b3fd62ea1a 290 }
NYX 0:85b3fd62ea1a 291 else
NYX 0:85b3fd62ea1a 292 {
NYX 0:85b3fd62ea1a 293 USBx_OUTEP(i)->DOEPCTL = 0U;
NYX 0:85b3fd62ea1a 294 }
NYX 0:85b3fd62ea1a 295
NYX 0:85b3fd62ea1a 296 USBx_OUTEP(i)->DOEPTSIZ = 0U;
NYX 0:85b3fd62ea1a 297 USBx_OUTEP(i)->DOEPINT = 0xFFU;
NYX 0:85b3fd62ea1a 298 }
NYX 0:85b3fd62ea1a 299
NYX 0:85b3fd62ea1a 300 USBx_DEVICE->DIEPMSK &= ~(USB_OTG_DIEPMSK_TXFURM);
NYX 0:85b3fd62ea1a 301
NYX 0:85b3fd62ea1a 302 if (cfg.dma_enable == 1U)
NYX 0:85b3fd62ea1a 303 {
NYX 0:85b3fd62ea1a 304 /*Set threshold parameters */
NYX 0:85b3fd62ea1a 305 USBx_DEVICE->DTHRCTL = (USB_OTG_DTHRCTL_TXTHRLEN_6 | USB_OTG_DTHRCTL_RXTHRLEN_6);
NYX 0:85b3fd62ea1a 306 USBx_DEVICE->DTHRCTL |= (USB_OTG_DTHRCTL_RXTHREN | USB_OTG_DTHRCTL_ISOTHREN | USB_OTG_DTHRCTL_NONISOTHREN);
NYX 0:85b3fd62ea1a 307
NYX 0:85b3fd62ea1a 308 i= USBx_DEVICE->DTHRCTL;
NYX 0:85b3fd62ea1a 309 }
NYX 0:85b3fd62ea1a 310
NYX 0:85b3fd62ea1a 311 /* Disable all interrupts. */
NYX 0:85b3fd62ea1a 312 USBx->GINTMSK = 0U;
NYX 0:85b3fd62ea1a 313
NYX 0:85b3fd62ea1a 314 /* Clear any pending interrupts */
NYX 0:85b3fd62ea1a 315 USBx->GINTSTS = 0xBFFFFFFFU;
NYX 0:85b3fd62ea1a 316
NYX 0:85b3fd62ea1a 317 /* Enable the common interrupts */
NYX 0:85b3fd62ea1a 318 if (cfg.dma_enable == DISABLE)
NYX 0:85b3fd62ea1a 319 {
NYX 0:85b3fd62ea1a 320 USBx->GINTMSK |= USB_OTG_GINTMSK_RXFLVLM;
NYX 0:85b3fd62ea1a 321 }
NYX 0:85b3fd62ea1a 322
NYX 0:85b3fd62ea1a 323 /* Enable interrupts matching to the Device mode ONLY */
NYX 0:85b3fd62ea1a 324 USBx->GINTMSK |= (USB_OTG_GINTMSK_USBSUSPM | USB_OTG_GINTMSK_USBRST |\
NYX 0:85b3fd62ea1a 325 USB_OTG_GINTMSK_ENUMDNEM | USB_OTG_GINTMSK_IEPINT |\
NYX 0:85b3fd62ea1a 326 USB_OTG_GINTMSK_OEPINT | USB_OTG_GINTMSK_IISOIXFRM|\
NYX 0:85b3fd62ea1a 327 USB_OTG_GINTMSK_PXFRM_IISOOXFRM | USB_OTG_GINTMSK_WUIM);
NYX 0:85b3fd62ea1a 328
NYX 0:85b3fd62ea1a 329 if(cfg.Sof_enable)
NYX 0:85b3fd62ea1a 330 {
NYX 0:85b3fd62ea1a 331 USBx->GINTMSK |= USB_OTG_GINTMSK_SOFM;
NYX 0:85b3fd62ea1a 332 }
NYX 0:85b3fd62ea1a 333
NYX 0:85b3fd62ea1a 334 if (cfg.vbus_sensing_enable == ENABLE)
NYX 0:85b3fd62ea1a 335 {
NYX 0:85b3fd62ea1a 336 USBx->GINTMSK |= (USB_OTG_GINTMSK_SRQIM | USB_OTG_GINTMSK_OTGINT);
NYX 0:85b3fd62ea1a 337 }
NYX 0:85b3fd62ea1a 338
NYX 0:85b3fd62ea1a 339 return HAL_OK;
NYX 0:85b3fd62ea1a 340 }
NYX 0:85b3fd62ea1a 341
NYX 0:85b3fd62ea1a 342
NYX 0:85b3fd62ea1a 343 /**
NYX 0:85b3fd62ea1a 344 * @brief USB_OTG_FlushTxFifo : Flush a Tx FIFO
NYX 0:85b3fd62ea1a 345 * @param USBx : Selected device
NYX 0:85b3fd62ea1a 346 * @param num : FIFO number
NYX 0:85b3fd62ea1a 347 * This parameter can be a value from 1 to 15
NYX 0:85b3fd62ea1a 348 15 means Flush all Tx FIFOs
NYX 0:85b3fd62ea1a 349 * @retval HAL status
NYX 0:85b3fd62ea1a 350 */
NYX 0:85b3fd62ea1a 351 HAL_StatusTypeDef USB_FlushTxFifo (USB_OTG_GlobalTypeDef *USBx, uint32_t num )
NYX 0:85b3fd62ea1a 352 {
NYX 0:85b3fd62ea1a 353 uint32_t count = 0;
NYX 0:85b3fd62ea1a 354
NYX 0:85b3fd62ea1a 355 USBx->GRSTCTL = ( USB_OTG_GRSTCTL_TXFFLSH |(uint32_t)( num << 6));
NYX 0:85b3fd62ea1a 356
NYX 0:85b3fd62ea1a 357 do
NYX 0:85b3fd62ea1a 358 {
NYX 0:85b3fd62ea1a 359 if (++count > 200000)
NYX 0:85b3fd62ea1a 360 {
NYX 0:85b3fd62ea1a 361 return HAL_TIMEOUT;
NYX 0:85b3fd62ea1a 362 }
NYX 0:85b3fd62ea1a 363 }
NYX 0:85b3fd62ea1a 364 while ((USBx->GRSTCTL & USB_OTG_GRSTCTL_TXFFLSH) == USB_OTG_GRSTCTL_TXFFLSH);
NYX 0:85b3fd62ea1a 365
NYX 0:85b3fd62ea1a 366 return HAL_OK;
NYX 0:85b3fd62ea1a 367 }
NYX 0:85b3fd62ea1a 368
NYX 0:85b3fd62ea1a 369
NYX 0:85b3fd62ea1a 370 /**
NYX 0:85b3fd62ea1a 371 * @brief USB_FlushRxFifo : Flush Rx FIFO
NYX 0:85b3fd62ea1a 372 * @param USBx : Selected device
NYX 0:85b3fd62ea1a 373 * @retval HAL status
NYX 0:85b3fd62ea1a 374 */
NYX 0:85b3fd62ea1a 375 HAL_StatusTypeDef USB_FlushRxFifo(USB_OTG_GlobalTypeDef *USBx)
NYX 0:85b3fd62ea1a 376 {
NYX 0:85b3fd62ea1a 377 uint32_t count = 0;
NYX 0:85b3fd62ea1a 378
NYX 0:85b3fd62ea1a 379 USBx->GRSTCTL = USB_OTG_GRSTCTL_RXFFLSH;
NYX 0:85b3fd62ea1a 380
NYX 0:85b3fd62ea1a 381 do
NYX 0:85b3fd62ea1a 382 {
NYX 0:85b3fd62ea1a 383 if (++count > 200000)
NYX 0:85b3fd62ea1a 384 {
NYX 0:85b3fd62ea1a 385 return HAL_TIMEOUT;
NYX 0:85b3fd62ea1a 386 }
NYX 0:85b3fd62ea1a 387 }
NYX 0:85b3fd62ea1a 388 while ((USBx->GRSTCTL & USB_OTG_GRSTCTL_RXFFLSH) == USB_OTG_GRSTCTL_RXFFLSH);
NYX 0:85b3fd62ea1a 389
NYX 0:85b3fd62ea1a 390 return HAL_OK;
NYX 0:85b3fd62ea1a 391 }
NYX 0:85b3fd62ea1a 392
NYX 0:85b3fd62ea1a 393 /**
NYX 0:85b3fd62ea1a 394 * @brief USB_SetDevSpeed :Initializes the DevSpd field of DCFG register
NYX 0:85b3fd62ea1a 395 * depending the PHY type and the enumeration speed of the device.
NYX 0:85b3fd62ea1a 396 * @param USBx : Selected device
NYX 0:85b3fd62ea1a 397 * @param speed : device speed
NYX 0:85b3fd62ea1a 398 * This parameter can be one of these values:
NYX 0:85b3fd62ea1a 399 * @arg USB_OTG_SPEED_HIGH: High speed mode
NYX 0:85b3fd62ea1a 400 * @arg USB_OTG_SPEED_HIGH_IN_FULL: High speed core in Full Speed mode
NYX 0:85b3fd62ea1a 401 * @arg USB_OTG_SPEED_FULL: Full speed mode
NYX 0:85b3fd62ea1a 402 * @arg USB_OTG_SPEED_LOW: Low speed mode
NYX 0:85b3fd62ea1a 403 * @retval Hal status
NYX 0:85b3fd62ea1a 404 */
NYX 0:85b3fd62ea1a 405 HAL_StatusTypeDef USB_SetDevSpeed(USB_OTG_GlobalTypeDef *USBx , uint8_t speed)
NYX 0:85b3fd62ea1a 406 {
NYX 0:85b3fd62ea1a 407 USBx_DEVICE->DCFG |= speed;
NYX 0:85b3fd62ea1a 408 return HAL_OK;
NYX 0:85b3fd62ea1a 409 }
NYX 0:85b3fd62ea1a 410
NYX 0:85b3fd62ea1a 411 /**
NYX 0:85b3fd62ea1a 412 * @brief USB_GetDevSpeed :Return the Dev Speed
NYX 0:85b3fd62ea1a 413 * @param USBx : Selected device
NYX 0:85b3fd62ea1a 414 * @retval speed : device speed
NYX 0:85b3fd62ea1a 415 * This parameter can be one of these values:
NYX 0:85b3fd62ea1a 416 * @arg USB_OTG_SPEED_HIGH: High speed mode
NYX 0:85b3fd62ea1a 417 * @arg USB_OTG_SPEED_FULL: Full speed mode
NYX 0:85b3fd62ea1a 418 * @arg USB_OTG_SPEED_LOW: Low speed mode
NYX 0:85b3fd62ea1a 419 */
NYX 0:85b3fd62ea1a 420 uint8_t USB_GetDevSpeed(USB_OTG_GlobalTypeDef *USBx)
NYX 0:85b3fd62ea1a 421 {
NYX 0:85b3fd62ea1a 422 uint8_t speed = 0U;
NYX 0:85b3fd62ea1a 423
NYX 0:85b3fd62ea1a 424 if((USBx_DEVICE->DSTS & USB_OTG_DSTS_ENUMSPD) == DSTS_ENUMSPD_HS_PHY_30MHZ_OR_60MHZ)
NYX 0:85b3fd62ea1a 425 {
NYX 0:85b3fd62ea1a 426 speed = USB_OTG_SPEED_HIGH;
NYX 0:85b3fd62ea1a 427 }
NYX 0:85b3fd62ea1a 428 else if (((USBx_DEVICE->DSTS & USB_OTG_DSTS_ENUMSPD) == DSTS_ENUMSPD_FS_PHY_30MHZ_OR_60MHZ)||
NYX 0:85b3fd62ea1a 429 ((USBx_DEVICE->DSTS & USB_OTG_DSTS_ENUMSPD) == DSTS_ENUMSPD_FS_PHY_48MHZ))
NYX 0:85b3fd62ea1a 430 {
NYX 0:85b3fd62ea1a 431 speed = USB_OTG_SPEED_FULL;
NYX 0:85b3fd62ea1a 432 }
NYX 0:85b3fd62ea1a 433 else if((USBx_DEVICE->DSTS & USB_OTG_DSTS_ENUMSPD) == DSTS_ENUMSPD_LS_PHY_6MHZ)
NYX 0:85b3fd62ea1a 434 {
NYX 0:85b3fd62ea1a 435 speed = USB_OTG_SPEED_LOW;
NYX 0:85b3fd62ea1a 436 }
NYX 0:85b3fd62ea1a 437
NYX 0:85b3fd62ea1a 438 return speed;
NYX 0:85b3fd62ea1a 439 }
NYX 0:85b3fd62ea1a 440
NYX 0:85b3fd62ea1a 441 /**
NYX 0:85b3fd62ea1a 442 * @brief Activate and configure an endpoint
NYX 0:85b3fd62ea1a 443 * @param USBx : Selected device
NYX 0:85b3fd62ea1a 444 * @param ep: pointer to endpoint structure
NYX 0:85b3fd62ea1a 445 * @retval HAL status
NYX 0:85b3fd62ea1a 446 */
NYX 0:85b3fd62ea1a 447 HAL_StatusTypeDef USB_ActivateEndpoint(USB_OTG_GlobalTypeDef *USBx, USB_OTG_EPTypeDef *ep)
NYX 0:85b3fd62ea1a 448 {
NYX 0:85b3fd62ea1a 449 if (ep->is_in == 1U)
NYX 0:85b3fd62ea1a 450 {
NYX 0:85b3fd62ea1a 451 USBx_DEVICE->DAINTMSK |= USB_OTG_DAINTMSK_IEPM & ((1U << (ep->num)));
NYX 0:85b3fd62ea1a 452
NYX 0:85b3fd62ea1a 453 if (((USBx_INEP(ep->num)->DIEPCTL) & USB_OTG_DIEPCTL_USBAEP) == 0U)
NYX 0:85b3fd62ea1a 454 {
NYX 0:85b3fd62ea1a 455 USBx_INEP(ep->num)->DIEPCTL |= ((ep->maxpacket & USB_OTG_DIEPCTL_MPSIZ ) | (ep->type << 18U) |\
NYX 0:85b3fd62ea1a 456 ((ep->num) << 22U) | (USB_OTG_DIEPCTL_SD0PID_SEVNFRM) | (USB_OTG_DIEPCTL_USBAEP));
NYX 0:85b3fd62ea1a 457 }
NYX 0:85b3fd62ea1a 458 }
NYX 0:85b3fd62ea1a 459 else
NYX 0:85b3fd62ea1a 460 {
NYX 0:85b3fd62ea1a 461 USBx_DEVICE->DAINTMSK |= USB_OTG_DAINTMSK_OEPM & ((1U << (ep->num)) << 16U);
NYX 0:85b3fd62ea1a 462
NYX 0:85b3fd62ea1a 463 if (((USBx_OUTEP(ep->num)->DOEPCTL) & USB_OTG_DOEPCTL_USBAEP) == 0U)
NYX 0:85b3fd62ea1a 464 {
NYX 0:85b3fd62ea1a 465 USBx_OUTEP(ep->num)->DOEPCTL |= ((ep->maxpacket & USB_OTG_DOEPCTL_MPSIZ ) | (ep->type << 18U) |\
NYX 0:85b3fd62ea1a 466 (USB_OTG_DIEPCTL_SD0PID_SEVNFRM)| (USB_OTG_DOEPCTL_USBAEP));
NYX 0:85b3fd62ea1a 467 }
NYX 0:85b3fd62ea1a 468 }
NYX 0:85b3fd62ea1a 469 return HAL_OK;
NYX 0:85b3fd62ea1a 470 }
NYX 0:85b3fd62ea1a 471 /**
NYX 0:85b3fd62ea1a 472 * @brief Activate and configure a dedicated endpoint
NYX 0:85b3fd62ea1a 473 * @param USBx : Selected device
NYX 0:85b3fd62ea1a 474 * @param ep: pointer to endpoint structure
NYX 0:85b3fd62ea1a 475 * @retval HAL status
NYX 0:85b3fd62ea1a 476 */
NYX 0:85b3fd62ea1a 477 HAL_StatusTypeDef USB_ActivateDedicatedEndpoint(USB_OTG_GlobalTypeDef *USBx, USB_OTG_EPTypeDef *ep)
NYX 0:85b3fd62ea1a 478 {
NYX 0:85b3fd62ea1a 479 static __IO uint32_t debug = 0U;
NYX 0:85b3fd62ea1a 480
NYX 0:85b3fd62ea1a 481 /* Read DEPCTLn register */
NYX 0:85b3fd62ea1a 482 if (ep->is_in == 1U)
NYX 0:85b3fd62ea1a 483 {
NYX 0:85b3fd62ea1a 484 if (((USBx_INEP(ep->num)->DIEPCTL) & USB_OTG_DIEPCTL_USBAEP) == 0U)
NYX 0:85b3fd62ea1a 485 {
NYX 0:85b3fd62ea1a 486 USBx_INEP(ep->num)->DIEPCTL |= ((ep->maxpacket & USB_OTG_DIEPCTL_MPSIZ ) | (ep->type << 18U) |\
NYX 0:85b3fd62ea1a 487 ((ep->num) << 22U) | (USB_OTG_DIEPCTL_SD0PID_SEVNFRM) | (USB_OTG_DIEPCTL_USBAEP));
NYX 0:85b3fd62ea1a 488 }
NYX 0:85b3fd62ea1a 489
NYX 0:85b3fd62ea1a 490
NYX 0:85b3fd62ea1a 491 debug |= ((ep->maxpacket & USB_OTG_DIEPCTL_MPSIZ ) | (ep->type << 18U) |\
NYX 0:85b3fd62ea1a 492 ((ep->num) << 22U) | (USB_OTG_DIEPCTL_SD0PID_SEVNFRM) | (USB_OTG_DIEPCTL_USBAEP));
NYX 0:85b3fd62ea1a 493
NYX 0:85b3fd62ea1a 494 USBx_DEVICE->DEACHMSK |= USB_OTG_DAINTMSK_IEPM & ((1U << (ep->num)));
NYX 0:85b3fd62ea1a 495 }
NYX 0:85b3fd62ea1a 496 else
NYX 0:85b3fd62ea1a 497 {
NYX 0:85b3fd62ea1a 498 if (((USBx_OUTEP(ep->num)->DOEPCTL) & USB_OTG_DOEPCTL_USBAEP) == 0U)
NYX 0:85b3fd62ea1a 499 {
NYX 0:85b3fd62ea1a 500 USBx_OUTEP(ep->num)->DOEPCTL |= ((ep->maxpacket & USB_OTG_DOEPCTL_MPSIZ ) | (ep->type << 18U) |\
NYX 0:85b3fd62ea1a 501 ((ep->num) << 22U) | (USB_OTG_DOEPCTL_USBAEP));
NYX 0:85b3fd62ea1a 502
NYX 0:85b3fd62ea1a 503 debug = (uint32_t)(((uint32_t )USBx) + USB_OTG_OUT_ENDPOINT_BASE + (0U)*USB_OTG_EP_REG_SIZE);
NYX 0:85b3fd62ea1a 504 debug = (uint32_t )&USBx_OUTEP(ep->num)->DOEPCTL;
NYX 0:85b3fd62ea1a 505 debug |= ((ep->maxpacket & USB_OTG_DOEPCTL_MPSIZ ) | (ep->type << 18U) |\
NYX 0:85b3fd62ea1a 506 ((ep->num) << 22U) | (USB_OTG_DOEPCTL_USBAEP));
NYX 0:85b3fd62ea1a 507 }
NYX 0:85b3fd62ea1a 508
NYX 0:85b3fd62ea1a 509 USBx_DEVICE->DEACHMSK |= USB_OTG_DAINTMSK_OEPM & ((1U << (ep->num)) << 16U);
NYX 0:85b3fd62ea1a 510 }
NYX 0:85b3fd62ea1a 511
NYX 0:85b3fd62ea1a 512 return HAL_OK;
NYX 0:85b3fd62ea1a 513 }
NYX 0:85b3fd62ea1a 514 /**
NYX 0:85b3fd62ea1a 515 * @brief De-activate and de-initialize an endpoint
NYX 0:85b3fd62ea1a 516 * @param USBx : Selected device
NYX 0:85b3fd62ea1a 517 * @param ep: pointer to endpoint structure
NYX 0:85b3fd62ea1a 518 * @retval HAL status
NYX 0:85b3fd62ea1a 519 */
NYX 0:85b3fd62ea1a 520 HAL_StatusTypeDef USB_DeactivateEndpoint(USB_OTG_GlobalTypeDef *USBx, USB_OTG_EPTypeDef *ep)
NYX 0:85b3fd62ea1a 521 {
NYX 0:85b3fd62ea1a 522 uint32_t count = 0U;
NYX 0:85b3fd62ea1a 523
NYX 0:85b3fd62ea1a 524 /* Disable the IN endpoint */
NYX 0:85b3fd62ea1a 525 if (ep->is_in == 1U)
NYX 0:85b3fd62ea1a 526 {
NYX 0:85b3fd62ea1a 527 USBx_INEP(ep->num)->DIEPCTL &= ~USB_OTG_DIEPCTL_USBAEP;
NYX 0:85b3fd62ea1a 528
NYX 0:85b3fd62ea1a 529 /* sets the NAK bit for the IN endpoint */
NYX 0:85b3fd62ea1a 530 USBx_INEP(ep->num)->DIEPCTL = USB_OTG_DIEPCTL_SNAK;
NYX 0:85b3fd62ea1a 531
NYX 0:85b3fd62ea1a 532 /* Disable IN endpoint */
NYX 0:85b3fd62ea1a 533 USBx_INEP(ep->num)->DIEPCTL = USB_OTG_DIEPCTL_EPDIS;
NYX 0:85b3fd62ea1a 534
NYX 0:85b3fd62ea1a 535 do
NYX 0:85b3fd62ea1a 536 {
NYX 0:85b3fd62ea1a 537 if (++count > 200000U)
NYX 0:85b3fd62ea1a 538 {
NYX 0:85b3fd62ea1a 539 return HAL_TIMEOUT;
NYX 0:85b3fd62ea1a 540 }
NYX 0:85b3fd62ea1a 541 }
NYX 0:85b3fd62ea1a 542
NYX 0:85b3fd62ea1a 543 /*Wait for EPDISD endpoint disabled interrupt*/
NYX 0:85b3fd62ea1a 544 while ((USBx_INEP(ep->num)->DIEPINT & USB_OTG_DIEPCTL_EPDIS) == USB_OTG_DIEPCTL_EPDIS);
NYX 0:85b3fd62ea1a 545
NYX 0:85b3fd62ea1a 546
NYX 0:85b3fd62ea1a 547 /* Flush any data remaining in the TxFIFO */
NYX 0:85b3fd62ea1a 548 USB_FlushTxFifo(USBx , 0x10U);
NYX 0:85b3fd62ea1a 549
NYX 0:85b3fd62ea1a 550 /* Disable endpoint interrupts */
NYX 0:85b3fd62ea1a 551 USBx_DEVICE->DAINTMSK &= ~(USB_OTG_DAINTMSK_IEPM & ((1U << (ep->num))));
NYX 0:85b3fd62ea1a 552
NYX 0:85b3fd62ea1a 553 }
NYX 0:85b3fd62ea1a 554 else /* Disable the OUT endpoint */
NYX 0:85b3fd62ea1a 555 {
NYX 0:85b3fd62ea1a 556
NYX 0:85b3fd62ea1a 557 USBx_OUTEP(ep->num)->DOEPCTL &= ~USB_OTG_DOEPCTL_USBAEP;
NYX 0:85b3fd62ea1a 558
NYX 0:85b3fd62ea1a 559 /* sets the NAK bit for the OUT endpoint */
NYX 0:85b3fd62ea1a 560 USBx_OUTEP(ep->num)->DOEPCTL = USB_OTG_DOEPCTL_SNAK;
NYX 0:85b3fd62ea1a 561
NYX 0:85b3fd62ea1a 562 /* Disable OUT endpoint */
NYX 0:85b3fd62ea1a 563 USBx_OUTEP(ep->num)->DOEPCTL = USB_OTG_DOEPCTL_EPDIS;
NYX 0:85b3fd62ea1a 564
NYX 0:85b3fd62ea1a 565 do
NYX 0:85b3fd62ea1a 566 {
NYX 0:85b3fd62ea1a 567 if (++count > 200000U)
NYX 0:85b3fd62ea1a 568 {
NYX 0:85b3fd62ea1a 569 return HAL_TIMEOUT;
NYX 0:85b3fd62ea1a 570 }
NYX 0:85b3fd62ea1a 571 }
NYX 0:85b3fd62ea1a 572
NYX 0:85b3fd62ea1a 573 /*Wait for EPDISD endpoint disabled interrupt*/
NYX 0:85b3fd62ea1a 574 while ((USBx_OUTEP(ep->num)->DOEPINT & USB_OTG_DOEPINT_OTEPDIS) == USB_OTG_DOEPINT_OTEPDIS);
NYX 0:85b3fd62ea1a 575
NYX 0:85b3fd62ea1a 576 /* Set the "Clear the Global OUT NAK bit" to disable global OUT NAK mode */
NYX 0:85b3fd62ea1a 577 USBx_DEVICE->DCTL |= USB_OTG_DCTL_CGONAK;
NYX 0:85b3fd62ea1a 578
NYX 0:85b3fd62ea1a 579 /* Disable endpoint interrupts */
NYX 0:85b3fd62ea1a 580 USBx_DEVICE->DAINTMSK &= ~(USB_OTG_DAINTMSK_OEPM & ((1U << (ep->num)) << 16U));
NYX 0:85b3fd62ea1a 581 }
NYX 0:85b3fd62ea1a 582 return HAL_OK;
NYX 0:85b3fd62ea1a 583 }
NYX 0:85b3fd62ea1a 584
NYX 0:85b3fd62ea1a 585 /**
NYX 0:85b3fd62ea1a 586 * @brief De-activate and de-initialize a dedicated endpoint
NYX 0:85b3fd62ea1a 587 * @param USBx : Selected device
NYX 0:85b3fd62ea1a 588 * @param ep: pointer to endpoint structure
NYX 0:85b3fd62ea1a 589 * @retval HAL status
NYX 0:85b3fd62ea1a 590 */
NYX 0:85b3fd62ea1a 591 HAL_StatusTypeDef USB_DeactivateDedicatedEndpoint(USB_OTG_GlobalTypeDef *USBx, USB_OTG_EPTypeDef *ep)
NYX 0:85b3fd62ea1a 592 {
NYX 0:85b3fd62ea1a 593 uint32_t count = 0U;
NYX 0:85b3fd62ea1a 594
NYX 0:85b3fd62ea1a 595 /* Disable the IN endpoint */
NYX 0:85b3fd62ea1a 596 if (ep->is_in == 1U)
NYX 0:85b3fd62ea1a 597 {
NYX 0:85b3fd62ea1a 598 USBx_INEP(ep->num)->DIEPCTL &= ~USB_OTG_DIEPCTL_USBAEP;
NYX 0:85b3fd62ea1a 599
NYX 0:85b3fd62ea1a 600 /* sets the NAK bit for the IN endpoint */
NYX 0:85b3fd62ea1a 601 USBx_INEP(ep->num)->DIEPCTL = USB_OTG_DIEPCTL_SNAK;
NYX 0:85b3fd62ea1a 602
NYX 0:85b3fd62ea1a 603 /* Disable IN endpoint */
NYX 0:85b3fd62ea1a 604 USBx_INEP(ep->num)->DIEPCTL = USB_OTG_DIEPCTL_EPDIS;
NYX 0:85b3fd62ea1a 605
NYX 0:85b3fd62ea1a 606 do
NYX 0:85b3fd62ea1a 607 {
NYX 0:85b3fd62ea1a 608 if (++count > 200000U)
NYX 0:85b3fd62ea1a 609 {
NYX 0:85b3fd62ea1a 610 return HAL_TIMEOUT;
NYX 0:85b3fd62ea1a 611 }
NYX 0:85b3fd62ea1a 612 }
NYX 0:85b3fd62ea1a 613
NYX 0:85b3fd62ea1a 614 /*Wait for EPDISD endpoint disabled interrupt*/
NYX 0:85b3fd62ea1a 615 while ((USBx_INEP(ep->num)->DIEPINT & USB_OTG_DIEPCTL_EPDIS) == USB_OTG_DIEPCTL_EPDIS);
NYX 0:85b3fd62ea1a 616
NYX 0:85b3fd62ea1a 617
NYX 0:85b3fd62ea1a 618 /* Flush any data remaining in the TxFIFO */
NYX 0:85b3fd62ea1a 619 USB_FlushTxFifo(USBx , 0x10U);
NYX 0:85b3fd62ea1a 620
NYX 0:85b3fd62ea1a 621 /* Disable endpoint interrupts */
NYX 0:85b3fd62ea1a 622 USBx_DEVICE->DAINTMSK &= ~(USB_OTG_DAINTMSK_IEPM & ((1U << (ep->num))));
NYX 0:85b3fd62ea1a 623
NYX 0:85b3fd62ea1a 624 }
NYX 0:85b3fd62ea1a 625 else /* Disable the OUT endpoint */
NYX 0:85b3fd62ea1a 626 {
NYX 0:85b3fd62ea1a 627
NYX 0:85b3fd62ea1a 628 USBx_OUTEP(ep->num)->DOEPCTL &= ~USB_OTG_DOEPCTL_USBAEP;
NYX 0:85b3fd62ea1a 629
NYX 0:85b3fd62ea1a 630 /* sets the NAK bit for the OUT endpoint */
NYX 0:85b3fd62ea1a 631 USBx_OUTEP(ep->num)->DOEPCTL = USB_OTG_DOEPCTL_SNAK;
NYX 0:85b3fd62ea1a 632
NYX 0:85b3fd62ea1a 633 /* Disable OUT endpoint */
NYX 0:85b3fd62ea1a 634 USBx_OUTEP(ep->num)->DOEPCTL = USB_OTG_DOEPCTL_EPDIS;
NYX 0:85b3fd62ea1a 635
NYX 0:85b3fd62ea1a 636 do
NYX 0:85b3fd62ea1a 637 {
NYX 0:85b3fd62ea1a 638 if (++count > 200000U)
NYX 0:85b3fd62ea1a 639 {
NYX 0:85b3fd62ea1a 640 return HAL_TIMEOUT;
NYX 0:85b3fd62ea1a 641 }
NYX 0:85b3fd62ea1a 642 }
NYX 0:85b3fd62ea1a 643
NYX 0:85b3fd62ea1a 644 /*Wait for EPDISD endpoint disabled interrupt*/
NYX 0:85b3fd62ea1a 645 while ((USBx_OUTEP(ep->num)->DOEPINT & USB_OTG_DOEPINT_OTEPDIS) == USB_OTG_DOEPINT_OTEPDIS);
NYX 0:85b3fd62ea1a 646
NYX 0:85b3fd62ea1a 647 /* Set the "Clear the Global OUT NAK bit" to disable global OUT NAK mode */
NYX 0:85b3fd62ea1a 648 USBx_DEVICE->DCTL |= USB_OTG_DCTL_CGONAK;
NYX 0:85b3fd62ea1a 649
NYX 0:85b3fd62ea1a 650 /* Disable endpoint interrupts */
NYX 0:85b3fd62ea1a 651 USBx_DEVICE->DAINTMSK &= ~(USB_OTG_DAINTMSK_OEPM & ((1U << (ep->num)) << 16U));
NYX 0:85b3fd62ea1a 652 }
NYX 0:85b3fd62ea1a 653 return HAL_OK;
NYX 0:85b3fd62ea1a 654
NYX 0:85b3fd62ea1a 655 }
NYX 0:85b3fd62ea1a 656
NYX 0:85b3fd62ea1a 657 /**
NYX 0:85b3fd62ea1a 658 * @brief USB_EPStartXfer : setup and starts a transfer over an EP
NYX 0:85b3fd62ea1a 659 * @param USBx : Selected device
NYX 0:85b3fd62ea1a 660 * @param ep: pointer to endpoint structure
NYX 0:85b3fd62ea1a 661 * @param dma: USB dma enabled or disabled
NYX 0:85b3fd62ea1a 662 * This parameter can be one of these values:
NYX 0:85b3fd62ea1a 663 * 0 : DMA feature not used
NYX 0:85b3fd62ea1a 664 * 1 : DMA feature used
NYX 0:85b3fd62ea1a 665 * @retval HAL status
NYX 0:85b3fd62ea1a 666 */
NYX 0:85b3fd62ea1a 667 HAL_StatusTypeDef USB_EPStartXfer(USB_OTG_GlobalTypeDef *USBx , USB_OTG_EPTypeDef *ep, uint8_t dma)
NYX 0:85b3fd62ea1a 668 {
NYX 0:85b3fd62ea1a 669 uint16_t pktcnt = 0U;
NYX 0:85b3fd62ea1a 670
NYX 0:85b3fd62ea1a 671 /* IN endpoint */
NYX 0:85b3fd62ea1a 672 if (ep->is_in == 1U)
NYX 0:85b3fd62ea1a 673 {
NYX 0:85b3fd62ea1a 674 /* Zero Length Packet? */
NYX 0:85b3fd62ea1a 675 if (ep->xfer_len == 0U)
NYX 0:85b3fd62ea1a 676 {
NYX 0:85b3fd62ea1a 677 USBx_INEP(ep->num)->DIEPTSIZ &= ~(USB_OTG_DIEPTSIZ_PKTCNT);
NYX 0:85b3fd62ea1a 678 USBx_INEP(ep->num)->DIEPTSIZ |= (USB_OTG_DIEPTSIZ_PKTCNT & (1U << 19U)) ;
NYX 0:85b3fd62ea1a 679 USBx_INEP(ep->num)->DIEPTSIZ &= ~(USB_OTG_DIEPTSIZ_XFRSIZ);
NYX 0:85b3fd62ea1a 680 }
NYX 0:85b3fd62ea1a 681 else
NYX 0:85b3fd62ea1a 682 {
NYX 0:85b3fd62ea1a 683 /* Program the transfer size and packet count
NYX 0:85b3fd62ea1a 684 * as follows: xfersize = N * maxpacket +
NYX 0:85b3fd62ea1a 685 * short_packet pktcnt = N + (short_packet
NYX 0:85b3fd62ea1a 686 * exist ? 1 : 0)
NYX 0:85b3fd62ea1a 687 */
NYX 0:85b3fd62ea1a 688 USBx_INEP(ep->num)->DIEPTSIZ &= ~(USB_OTG_DIEPTSIZ_XFRSIZ);
NYX 0:85b3fd62ea1a 689 USBx_INEP(ep->num)->DIEPTSIZ &= ~(USB_OTG_DIEPTSIZ_PKTCNT);
NYX 0:85b3fd62ea1a 690 USBx_INEP(ep->num)->DIEPTSIZ |= (USB_OTG_DIEPTSIZ_PKTCNT & (((ep->xfer_len + ep->maxpacket -1U)/ ep->maxpacket) << 19U)) ;
NYX 0:85b3fd62ea1a 691 USBx_INEP(ep->num)->DIEPTSIZ |= (USB_OTG_DIEPTSIZ_XFRSIZ & ep->xfer_len);
NYX 0:85b3fd62ea1a 692
NYX 0:85b3fd62ea1a 693 if (ep->type == EP_TYPE_ISOC)
NYX 0:85b3fd62ea1a 694 {
NYX 0:85b3fd62ea1a 695 USBx_INEP(ep->num)->DIEPTSIZ &= ~(USB_OTG_DIEPTSIZ_MULCNT);
NYX 0:85b3fd62ea1a 696 USBx_INEP(ep->num)->DIEPTSIZ |= (USB_OTG_DIEPTSIZ_MULCNT & (1U << 29U));
NYX 0:85b3fd62ea1a 697 }
NYX 0:85b3fd62ea1a 698 }
NYX 0:85b3fd62ea1a 699
NYX 0:85b3fd62ea1a 700 if (dma == 1U)
NYX 0:85b3fd62ea1a 701 {
NYX 0:85b3fd62ea1a 702 USBx_INEP(ep->num)->DIEPDMA = (uint32_t)(ep->dma_addr);
NYX 0:85b3fd62ea1a 703 }
NYX 0:85b3fd62ea1a 704 else
NYX 0:85b3fd62ea1a 705 {
NYX 0:85b3fd62ea1a 706 if (ep->type != EP_TYPE_ISOC)
NYX 0:85b3fd62ea1a 707 {
NYX 0:85b3fd62ea1a 708 /* Enable the Tx FIFO Empty Interrupt for this EP */
NYX 0:85b3fd62ea1a 709 if (ep->xfer_len > 0U)
NYX 0:85b3fd62ea1a 710 {
NYX 0:85b3fd62ea1a 711 atomic_set_u32(&USBx_DEVICE->DIEPEMPMSK, 1U << ep->num);
NYX 0:85b3fd62ea1a 712 }
NYX 0:85b3fd62ea1a 713 }
NYX 0:85b3fd62ea1a 714 }
NYX 0:85b3fd62ea1a 715
NYX 0:85b3fd62ea1a 716 if (ep->type == EP_TYPE_ISOC)
NYX 0:85b3fd62ea1a 717 {
NYX 0:85b3fd62ea1a 718 if ((USBx_DEVICE->DSTS & ( 1U << 8U )) == 0U)
NYX 0:85b3fd62ea1a 719 {
NYX 0:85b3fd62ea1a 720 USBx_INEP(ep->num)->DIEPCTL |= USB_OTG_DIEPCTL_SODDFRM;
NYX 0:85b3fd62ea1a 721 }
NYX 0:85b3fd62ea1a 722 else
NYX 0:85b3fd62ea1a 723 {
NYX 0:85b3fd62ea1a 724 USBx_INEP(ep->num)->DIEPCTL |= USB_OTG_DIEPCTL_SD0PID_SEVNFRM;
NYX 0:85b3fd62ea1a 725 }
NYX 0:85b3fd62ea1a 726 }
NYX 0:85b3fd62ea1a 727
NYX 0:85b3fd62ea1a 728 /* EP enable, IN data in FIFO */
NYX 0:85b3fd62ea1a 729 USBx_INEP(ep->num)->DIEPCTL |= (USB_OTG_DIEPCTL_CNAK | USB_OTG_DIEPCTL_EPENA);
NYX 0:85b3fd62ea1a 730
NYX 0:85b3fd62ea1a 731 if (ep->type == EP_TYPE_ISOC)
NYX 0:85b3fd62ea1a 732 {
NYX 0:85b3fd62ea1a 733 USB_WritePacket(USBx, ep->xfer_buff, ep->num, ep->xfer_len, dma);
NYX 0:85b3fd62ea1a 734 }
NYX 0:85b3fd62ea1a 735 }
NYX 0:85b3fd62ea1a 736 else /* OUT endpoint */
NYX 0:85b3fd62ea1a 737 {
NYX 0:85b3fd62ea1a 738 /* Program the transfer size and packet count as follows:
NYX 0:85b3fd62ea1a 739 * pktcnt = N
NYX 0:85b3fd62ea1a 740 * xfersize = N * maxpacket
NYX 0:85b3fd62ea1a 741 */
NYX 0:85b3fd62ea1a 742 USBx_OUTEP(ep->num)->DOEPTSIZ &= ~(USB_OTG_DOEPTSIZ_XFRSIZ);
NYX 0:85b3fd62ea1a 743 USBx_OUTEP(ep->num)->DOEPTSIZ &= ~(USB_OTG_DOEPTSIZ_PKTCNT);
NYX 0:85b3fd62ea1a 744
NYX 0:85b3fd62ea1a 745 if (ep->xfer_len == 0U)
NYX 0:85b3fd62ea1a 746 {
NYX 0:85b3fd62ea1a 747 USBx_OUTEP(ep->num)->DOEPTSIZ |= (USB_OTG_DOEPTSIZ_XFRSIZ & ep->maxpacket);
NYX 0:85b3fd62ea1a 748 USBx_OUTEP(ep->num)->DOEPTSIZ |= (USB_OTG_DOEPTSIZ_PKTCNT & (1U << 19U));
NYX 0:85b3fd62ea1a 749 }
NYX 0:85b3fd62ea1a 750 else
NYX 0:85b3fd62ea1a 751 {
NYX 0:85b3fd62ea1a 752 pktcnt = (ep->xfer_len + ep->maxpacket -1U)/ ep->maxpacket;
NYX 0:85b3fd62ea1a 753 USBx_OUTEP(ep->num)->DOEPTSIZ |= (USB_OTG_DOEPTSIZ_PKTCNT & (pktcnt << 19U));
NYX 0:85b3fd62ea1a 754 USBx_OUTEP(ep->num)->DOEPTSIZ |= (USB_OTG_DOEPTSIZ_XFRSIZ & (ep->maxpacket * pktcnt));
NYX 0:85b3fd62ea1a 755 }
NYX 0:85b3fd62ea1a 756
NYX 0:85b3fd62ea1a 757 if (dma == 1U)
NYX 0:85b3fd62ea1a 758 {
NYX 0:85b3fd62ea1a 759 USBx_OUTEP(ep->num)->DOEPDMA = (uint32_t)ep->xfer_buff;
NYX 0:85b3fd62ea1a 760 }
NYX 0:85b3fd62ea1a 761
NYX 0:85b3fd62ea1a 762 if (ep->type == EP_TYPE_ISOC)
NYX 0:85b3fd62ea1a 763 {
NYX 0:85b3fd62ea1a 764 if ((USBx_DEVICE->DSTS & ( 1U << 8U )) == 0U)
NYX 0:85b3fd62ea1a 765 {
NYX 0:85b3fd62ea1a 766 USBx_OUTEP(ep->num)->DOEPCTL |= USB_OTG_DOEPCTL_SODDFRM;
NYX 0:85b3fd62ea1a 767 }
NYX 0:85b3fd62ea1a 768 else
NYX 0:85b3fd62ea1a 769 {
NYX 0:85b3fd62ea1a 770 USBx_OUTEP(ep->num)->DOEPCTL |= USB_OTG_DOEPCTL_SD0PID_SEVNFRM;
NYX 0:85b3fd62ea1a 771 }
NYX 0:85b3fd62ea1a 772 }
NYX 0:85b3fd62ea1a 773 /* EP enable */
NYX 0:85b3fd62ea1a 774 USBx_OUTEP(ep->num)->DOEPCTL |= (USB_OTG_DOEPCTL_CNAK | USB_OTG_DOEPCTL_EPENA);
NYX 0:85b3fd62ea1a 775 }
NYX 0:85b3fd62ea1a 776 return HAL_OK;
NYX 0:85b3fd62ea1a 777 }
NYX 0:85b3fd62ea1a 778
NYX 0:85b3fd62ea1a 779 /**
NYX 0:85b3fd62ea1a 780 * @brief USB_EP0StartXfer : setup and starts a transfer over the EP 0
NYX 0:85b3fd62ea1a 781 * @param USBx : Selected device
NYX 0:85b3fd62ea1a 782 * @param ep: pointer to endpoint structure
NYX 0:85b3fd62ea1a 783 * @param dma: USB dma enabled or disabled
NYX 0:85b3fd62ea1a 784 * This parameter can be one of these values:
NYX 0:85b3fd62ea1a 785 * 0 : DMA feature not used
NYX 0:85b3fd62ea1a 786 * 1 : DMA feature used
NYX 0:85b3fd62ea1a 787 * @retval HAL status
NYX 0:85b3fd62ea1a 788 */
NYX 0:85b3fd62ea1a 789 HAL_StatusTypeDef USB_EP0StartXfer(USB_OTG_GlobalTypeDef *USBx , USB_OTG_EPTypeDef *ep, uint8_t dma)
NYX 0:85b3fd62ea1a 790 {
NYX 0:85b3fd62ea1a 791 /* IN endpoint */
NYX 0:85b3fd62ea1a 792 if (ep->is_in == 1U)
NYX 0:85b3fd62ea1a 793 {
NYX 0:85b3fd62ea1a 794 /* Zero Length Packet? */
NYX 0:85b3fd62ea1a 795 if (ep->xfer_len == 0U)
NYX 0:85b3fd62ea1a 796 {
NYX 0:85b3fd62ea1a 797 USBx_INEP(ep->num)->DIEPTSIZ &= ~(USB_OTG_DIEPTSIZ_PKTCNT);
NYX 0:85b3fd62ea1a 798 USBx_INEP(ep->num)->DIEPTSIZ |= (USB_OTG_DIEPTSIZ_PKTCNT & (1U << 19U)) ;
NYX 0:85b3fd62ea1a 799 USBx_INEP(ep->num)->DIEPTSIZ &= ~(USB_OTG_DIEPTSIZ_XFRSIZ);
NYX 0:85b3fd62ea1a 800 }
NYX 0:85b3fd62ea1a 801 else
NYX 0:85b3fd62ea1a 802 {
NYX 0:85b3fd62ea1a 803 /* Program the transfer size and packet count
NYX 0:85b3fd62ea1a 804 * as follows: xfersize = N * maxpacket +
NYX 0:85b3fd62ea1a 805 * short_packet pktcnt = N + (short_packet
NYX 0:85b3fd62ea1a 806 * exist ? 1 : 0)
NYX 0:85b3fd62ea1a 807 */
NYX 0:85b3fd62ea1a 808 USBx_INEP(ep->num)->DIEPTSIZ &= ~(USB_OTG_DIEPTSIZ_XFRSIZ);
NYX 0:85b3fd62ea1a 809 USBx_INEP(ep->num)->DIEPTSIZ &= ~(USB_OTG_DIEPTSIZ_PKTCNT);
NYX 0:85b3fd62ea1a 810
NYX 0:85b3fd62ea1a 811 if(ep->xfer_len > ep->maxpacket)
NYX 0:85b3fd62ea1a 812 {
NYX 0:85b3fd62ea1a 813 ep->xfer_len = ep->maxpacket;
NYX 0:85b3fd62ea1a 814 }
NYX 0:85b3fd62ea1a 815 USBx_INEP(ep->num)->DIEPTSIZ |= (USB_OTG_DIEPTSIZ_PKTCNT & (1U << 19U)) ;
NYX 0:85b3fd62ea1a 816 USBx_INEP(ep->num)->DIEPTSIZ |= (USB_OTG_DIEPTSIZ_XFRSIZ & ep->xfer_len);
NYX 0:85b3fd62ea1a 817
NYX 0:85b3fd62ea1a 818 }
NYX 0:85b3fd62ea1a 819
NYX 0:85b3fd62ea1a 820 /* EP enable, IN data in FIFO */
NYX 0:85b3fd62ea1a 821 USBx_INEP(ep->num)->DIEPCTL |= (USB_OTG_DIEPCTL_CNAK | USB_OTG_DIEPCTL_EPENA);
NYX 0:85b3fd62ea1a 822
NYX 0:85b3fd62ea1a 823 if (dma == 1)
NYX 0:85b3fd62ea1a 824 {
NYX 0:85b3fd62ea1a 825 USBx_INEP(ep->num)->DIEPDMA = (uint32_t)(ep->dma_addr);
NYX 0:85b3fd62ea1a 826 }
NYX 0:85b3fd62ea1a 827 else
NYX 0:85b3fd62ea1a 828 {
NYX 0:85b3fd62ea1a 829 /* Enable the Tx FIFO Empty Interrupt for this EP */
NYX 0:85b3fd62ea1a 830 if (ep->xfer_len > 0U)
NYX 0:85b3fd62ea1a 831 {
NYX 0:85b3fd62ea1a 832 atomic_set_u32(&USBx_DEVICE->DIEPEMPMSK, 1U << (ep->num));
NYX 0:85b3fd62ea1a 833 }
NYX 0:85b3fd62ea1a 834 }
NYX 0:85b3fd62ea1a 835 }
NYX 0:85b3fd62ea1a 836
NYX 0:85b3fd62ea1a 837 else /* OUT endpoint */
NYX 0:85b3fd62ea1a 838 {
NYX 0:85b3fd62ea1a 839 /* Program the transfer size and packet count as follows:
NYX 0:85b3fd62ea1a 840 * pktcnt = N
NYX 0:85b3fd62ea1a 841 * xfersize = N * maxpacket
NYX 0:85b3fd62ea1a 842 */
NYX 0:85b3fd62ea1a 843 USBx_OUTEP(ep->num)->DOEPTSIZ &= ~(USB_OTG_DOEPTSIZ_XFRSIZ);
NYX 0:85b3fd62ea1a 844 USBx_OUTEP(ep->num)->DOEPTSIZ &= ~(USB_OTG_DOEPTSIZ_PKTCNT);
NYX 0:85b3fd62ea1a 845
NYX 0:85b3fd62ea1a 846 if (ep->xfer_len > 0U)
NYX 0:85b3fd62ea1a 847 {
NYX 0:85b3fd62ea1a 848 ep->xfer_len = ep->maxpacket;
NYX 0:85b3fd62ea1a 849 }
NYX 0:85b3fd62ea1a 850
NYX 0:85b3fd62ea1a 851 USBx_OUTEP(ep->num)->DOEPTSIZ |= (USB_OTG_DOEPTSIZ_PKTCNT & (1U << 19U));
NYX 0:85b3fd62ea1a 852 USBx_OUTEP(ep->num)->DOEPTSIZ |= (USB_OTG_DOEPTSIZ_XFRSIZ & (ep->maxpacket));
NYX 0:85b3fd62ea1a 853
NYX 0:85b3fd62ea1a 854
NYX 0:85b3fd62ea1a 855 if (dma == 1U)
NYX 0:85b3fd62ea1a 856 {
NYX 0:85b3fd62ea1a 857 USBx_OUTEP(ep->num)->DOEPDMA = (uint32_t)(ep->xfer_buff);
NYX 0:85b3fd62ea1a 858 }
NYX 0:85b3fd62ea1a 859
NYX 0:85b3fd62ea1a 860 /* EP enable */
NYX 0:85b3fd62ea1a 861 USBx_OUTEP(ep->num)->DOEPCTL |= (USB_OTG_DOEPCTL_CNAK | USB_OTG_DOEPCTL_EPENA);
NYX 0:85b3fd62ea1a 862 }
NYX 0:85b3fd62ea1a 863 return HAL_OK;
NYX 0:85b3fd62ea1a 864 }
NYX 0:85b3fd62ea1a 865
NYX 0:85b3fd62ea1a 866 /**
NYX 0:85b3fd62ea1a 867 * @brief USB_WritePacket : Writes a packet into the Tx FIFO associated
NYX 0:85b3fd62ea1a 868 * with the EP/channel
NYX 0:85b3fd62ea1a 869 * @param USBx : Selected device
NYX 0:85b3fd62ea1a 870 * @param src : pointer to source buffer
NYX 0:85b3fd62ea1a 871 * @param ch_ep_num : endpoint or host channel number
NYX 0:85b3fd62ea1a 872 * @param len : Number of bytes to write
NYX 0:85b3fd62ea1a 873 * @param dma: USB dma enabled or disabled
NYX 0:85b3fd62ea1a 874 * This parameter can be one of these values:
NYX 0:85b3fd62ea1a 875 * 0 : DMA feature not used
NYX 0:85b3fd62ea1a 876 * 1 : DMA feature used
NYX 0:85b3fd62ea1a 877 * @retval HAL status
NYX 0:85b3fd62ea1a 878 */
NYX 0:85b3fd62ea1a 879 HAL_StatusTypeDef USB_WritePacket(USB_OTG_GlobalTypeDef *USBx, uint8_t *src, uint8_t ch_ep_num, uint16_t len, uint8_t dma)
NYX 0:85b3fd62ea1a 880 {
NYX 0:85b3fd62ea1a 881 uint32_t count32b = 0U , i = 0U;
NYX 0:85b3fd62ea1a 882
NYX 0:85b3fd62ea1a 883 if (dma == 0U)
NYX 0:85b3fd62ea1a 884 {
NYX 0:85b3fd62ea1a 885 count32b = (len + 3U) / 4U;
NYX 0:85b3fd62ea1a 886 for (i = 0U; i < count32b; i++, src += 4U)
NYX 0:85b3fd62ea1a 887 {
NYX 0:85b3fd62ea1a 888 USBx_DFIFO(ch_ep_num) = *((__packed uint32_t *)src);
NYX 0:85b3fd62ea1a 889 }
NYX 0:85b3fd62ea1a 890 }
NYX 0:85b3fd62ea1a 891 return HAL_OK;
NYX 0:85b3fd62ea1a 892 }
NYX 0:85b3fd62ea1a 893
NYX 0:85b3fd62ea1a 894 /**
NYX 0:85b3fd62ea1a 895 * @brief USB_ReadPacket : read a packet from the Tx FIFO associated
NYX 0:85b3fd62ea1a 896 * with the EP/channel
NYX 0:85b3fd62ea1a 897 * @param USBx : Selected device
NYX 0:85b3fd62ea1a 898 * @param src : source pointer
NYX 0:85b3fd62ea1a 899 * @param ch_ep_num : endpoint or host channel number
NYX 0:85b3fd62ea1a 900 * @param len : Number of bytes to read
NYX 0:85b3fd62ea1a 901 * @param dma: USB dma enabled or disabled
NYX 0:85b3fd62ea1a 902 * This parameter can be one of these values:
NYX 0:85b3fd62ea1a 903 * 0 : DMA feature not used
NYX 0:85b3fd62ea1a 904 * 1 : DMA feature used
NYX 0:85b3fd62ea1a 905 * @retval pointer to destination buffer
NYX 0:85b3fd62ea1a 906 */
NYX 0:85b3fd62ea1a 907 void *USB_ReadPacket(USB_OTG_GlobalTypeDef *USBx, uint8_t *dest, uint16_t len)
NYX 0:85b3fd62ea1a 908 {
NYX 0:85b3fd62ea1a 909 uint32_t i=0U;
NYX 0:85b3fd62ea1a 910 uint32_t count32b = (len + 3U) / 4U;
NYX 0:85b3fd62ea1a 911
NYX 0:85b3fd62ea1a 912 for ( i = 0U; i < count32b; i++, dest += 4U )
NYX 0:85b3fd62ea1a 913 {
NYX 0:85b3fd62ea1a 914 *(__packed uint32_t *)dest = USBx_DFIFO(0U);
NYX 0:85b3fd62ea1a 915
NYX 0:85b3fd62ea1a 916 }
NYX 0:85b3fd62ea1a 917 return ((void *)dest);
NYX 0:85b3fd62ea1a 918 }
NYX 0:85b3fd62ea1a 919
NYX 0:85b3fd62ea1a 920 /**
NYX 0:85b3fd62ea1a 921 * @brief USB_EPSetStall : set a stall condition over an EP
NYX 0:85b3fd62ea1a 922 * @param USBx : Selected device
NYX 0:85b3fd62ea1a 923 * @param ep: pointer to endpoint structure
NYX 0:85b3fd62ea1a 924 * @retval HAL status
NYX 0:85b3fd62ea1a 925 */
NYX 0:85b3fd62ea1a 926 HAL_StatusTypeDef USB_EPSetStall(USB_OTG_GlobalTypeDef *USBx , USB_OTG_EPTypeDef *ep)
NYX 0:85b3fd62ea1a 927 {
NYX 0:85b3fd62ea1a 928 if (ep->is_in == 1U)
NYX 0:85b3fd62ea1a 929 {
NYX 0:85b3fd62ea1a 930 if (((USBx_INEP(ep->num)->DIEPCTL) & USB_OTG_DIEPCTL_EPENA) == 0U)
NYX 0:85b3fd62ea1a 931 {
NYX 0:85b3fd62ea1a 932 USBx_INEP(ep->num)->DIEPCTL &= ~(USB_OTG_DIEPCTL_EPDIS);
NYX 0:85b3fd62ea1a 933 }
NYX 0:85b3fd62ea1a 934 USBx_INEP(ep->num)->DIEPCTL |= USB_OTG_DIEPCTL_STALL;
NYX 0:85b3fd62ea1a 935 }
NYX 0:85b3fd62ea1a 936 else
NYX 0:85b3fd62ea1a 937 {
NYX 0:85b3fd62ea1a 938 if (((USBx_OUTEP(ep->num)->DOEPCTL) & USB_OTG_DOEPCTL_EPENA) == 0U)
NYX 0:85b3fd62ea1a 939 {
NYX 0:85b3fd62ea1a 940 USBx_OUTEP(ep->num)->DOEPCTL &= ~(USB_OTG_DOEPCTL_EPDIS);
NYX 0:85b3fd62ea1a 941 }
NYX 0:85b3fd62ea1a 942 USBx_OUTEP(ep->num)->DOEPCTL |= USB_OTG_DOEPCTL_STALL;
NYX 0:85b3fd62ea1a 943 }
NYX 0:85b3fd62ea1a 944 return HAL_OK;
NYX 0:85b3fd62ea1a 945 }
NYX 0:85b3fd62ea1a 946
NYX 0:85b3fd62ea1a 947
NYX 0:85b3fd62ea1a 948 /**
NYX 0:85b3fd62ea1a 949 * @brief USB_EPClearStall : Clear a stall condition over an EP
NYX 0:85b3fd62ea1a 950 * @param USBx : Selected device
NYX 0:85b3fd62ea1a 951 * @param ep: pointer to endpoint structure
NYX 0:85b3fd62ea1a 952 * @retval HAL status
NYX 0:85b3fd62ea1a 953 */
NYX 0:85b3fd62ea1a 954 HAL_StatusTypeDef USB_EPClearStall(USB_OTG_GlobalTypeDef *USBx, USB_OTG_EPTypeDef *ep)
NYX 0:85b3fd62ea1a 955 {
NYX 0:85b3fd62ea1a 956 if (ep->is_in == 1U)
NYX 0:85b3fd62ea1a 957 {
NYX 0:85b3fd62ea1a 958 USBx_INEP(ep->num)->DIEPCTL &= ~USB_OTG_DIEPCTL_STALL;
NYX 0:85b3fd62ea1a 959 if (ep->type == EP_TYPE_INTR || ep->type == EP_TYPE_BULK)
NYX 0:85b3fd62ea1a 960 {
NYX 0:85b3fd62ea1a 961 USBx_INEP(ep->num)->DIEPCTL |= USB_OTG_DIEPCTL_SD0PID_SEVNFRM; /* DATA0 */
NYX 0:85b3fd62ea1a 962 }
NYX 0:85b3fd62ea1a 963 }
NYX 0:85b3fd62ea1a 964 else
NYX 0:85b3fd62ea1a 965 {
NYX 0:85b3fd62ea1a 966 USBx_OUTEP(ep->num)->DOEPCTL &= ~USB_OTG_DOEPCTL_STALL;
NYX 0:85b3fd62ea1a 967 if (ep->type == EP_TYPE_INTR || ep->type == EP_TYPE_BULK)
NYX 0:85b3fd62ea1a 968 {
NYX 0:85b3fd62ea1a 969 USBx_OUTEP(ep->num)->DOEPCTL |= USB_OTG_DOEPCTL_SD0PID_SEVNFRM; /* DATA0 */
NYX 0:85b3fd62ea1a 970 }
NYX 0:85b3fd62ea1a 971 }
NYX 0:85b3fd62ea1a 972 return HAL_OK;
NYX 0:85b3fd62ea1a 973 }
NYX 0:85b3fd62ea1a 974
NYX 0:85b3fd62ea1a 975 /**
NYX 0:85b3fd62ea1a 976 * @brief USB_StopDevice : Stop the usb device mode
NYX 0:85b3fd62ea1a 977 * @param USBx : Selected device
NYX 0:85b3fd62ea1a 978 * @retval HAL status
NYX 0:85b3fd62ea1a 979 */
NYX 0:85b3fd62ea1a 980 HAL_StatusTypeDef USB_StopDevice(USB_OTG_GlobalTypeDef *USBx)
NYX 0:85b3fd62ea1a 981 {
NYX 0:85b3fd62ea1a 982 uint32_t i;
NYX 0:85b3fd62ea1a 983
NYX 0:85b3fd62ea1a 984 /* Clear Pending interrupt */
NYX 0:85b3fd62ea1a 985 for (i = 0U; i < 15U ; i++)
NYX 0:85b3fd62ea1a 986 {
NYX 0:85b3fd62ea1a 987 USBx_INEP(i)->DIEPINT = 0xFFU;
NYX 0:85b3fd62ea1a 988 USBx_OUTEP(i)->DOEPINT = 0xFFU;
NYX 0:85b3fd62ea1a 989 }
NYX 0:85b3fd62ea1a 990 USBx_DEVICE->DAINT = 0xFFFFFFFFU;
NYX 0:85b3fd62ea1a 991
NYX 0:85b3fd62ea1a 992 /* Clear interrupt masks */
NYX 0:85b3fd62ea1a 993 USBx_DEVICE->DIEPMSK = 0U;
NYX 0:85b3fd62ea1a 994 USBx_DEVICE->DOEPMSK = 0U;
NYX 0:85b3fd62ea1a 995 USBx_DEVICE->DAINTMSK = 0U;
NYX 0:85b3fd62ea1a 996
NYX 0:85b3fd62ea1a 997 /* Flush the FIFO */
NYX 0:85b3fd62ea1a 998 USB_FlushRxFifo(USBx);
NYX 0:85b3fd62ea1a 999 USB_FlushTxFifo(USBx , 0x10U);
NYX 0:85b3fd62ea1a 1000
NYX 0:85b3fd62ea1a 1001 return HAL_OK;
NYX 0:85b3fd62ea1a 1002 }
NYX 0:85b3fd62ea1a 1003
NYX 0:85b3fd62ea1a 1004 /**
NYX 0:85b3fd62ea1a 1005 * @brief USB_SetDevAddress : Stop the usb device mode
NYX 0:85b3fd62ea1a 1006 * @param USBx : Selected device
NYX 0:85b3fd62ea1a 1007 * @param address : new device address to be assigned
NYX 0:85b3fd62ea1a 1008 * This parameter can be a value from 0 to 255
NYX 0:85b3fd62ea1a 1009 * @retval HAL status
NYX 0:85b3fd62ea1a 1010 */
NYX 0:85b3fd62ea1a 1011 HAL_StatusTypeDef USB_SetDevAddress (USB_OTG_GlobalTypeDef *USBx, uint8_t address)
NYX 0:85b3fd62ea1a 1012 {
NYX 0:85b3fd62ea1a 1013 USBx_DEVICE->DCFG &= ~ (USB_OTG_DCFG_DAD);
NYX 0:85b3fd62ea1a 1014 USBx_DEVICE->DCFG |= (address << 4U) & USB_OTG_DCFG_DAD ;
NYX 0:85b3fd62ea1a 1015
NYX 0:85b3fd62ea1a 1016 return HAL_OK;
NYX 0:85b3fd62ea1a 1017 }
NYX 0:85b3fd62ea1a 1018
NYX 0:85b3fd62ea1a 1019 /**
NYX 0:85b3fd62ea1a 1020 * @brief USB_DevConnect : Connect the USB device by enabling the pull-up/pull-down
NYX 0:85b3fd62ea1a 1021 * @param USBx : Selected device
NYX 0:85b3fd62ea1a 1022 * @retval HAL status
NYX 0:85b3fd62ea1a 1023 */
NYX 0:85b3fd62ea1a 1024 HAL_StatusTypeDef USB_DevConnect (USB_OTG_GlobalTypeDef *USBx)
NYX 0:85b3fd62ea1a 1025 {
NYX 0:85b3fd62ea1a 1026 USBx_DEVICE->DCTL &= ~USB_OTG_DCTL_SDIS ;
NYX 0:85b3fd62ea1a 1027 HAL_Delay(3U);
NYX 0:85b3fd62ea1a 1028
NYX 0:85b3fd62ea1a 1029 return HAL_OK;
NYX 0:85b3fd62ea1a 1030 }
NYX 0:85b3fd62ea1a 1031
NYX 0:85b3fd62ea1a 1032 /**
NYX 0:85b3fd62ea1a 1033 * @brief USB_DevDisconnect : Disconnect the USB device by disabling the pull-up/pull-down
NYX 0:85b3fd62ea1a 1034 * @param USBx : Selected device
NYX 0:85b3fd62ea1a 1035 * @retval HAL status
NYX 0:85b3fd62ea1a 1036 */
NYX 0:85b3fd62ea1a 1037 HAL_StatusTypeDef USB_DevDisconnect (USB_OTG_GlobalTypeDef *USBx)
NYX 0:85b3fd62ea1a 1038 {
NYX 0:85b3fd62ea1a 1039 USBx_DEVICE->DCTL |= USB_OTG_DCTL_SDIS ;
NYX 0:85b3fd62ea1a 1040 HAL_Delay(3U);
NYX 0:85b3fd62ea1a 1041
NYX 0:85b3fd62ea1a 1042 return HAL_OK;
NYX 0:85b3fd62ea1a 1043 }
NYX 0:85b3fd62ea1a 1044
NYX 0:85b3fd62ea1a 1045 /**
NYX 0:85b3fd62ea1a 1046 * @brief USB_ReadInterrupts: return the global USB interrupt status
NYX 0:85b3fd62ea1a 1047 * @param USBx : Selected device
NYX 0:85b3fd62ea1a 1048 * @retval HAL status
NYX 0:85b3fd62ea1a 1049 */
NYX 0:85b3fd62ea1a 1050 uint32_t USB_ReadInterrupts (USB_OTG_GlobalTypeDef *USBx)
NYX 0:85b3fd62ea1a 1051 {
NYX 0:85b3fd62ea1a 1052 uint32_t v = 0U;
NYX 0:85b3fd62ea1a 1053
NYX 0:85b3fd62ea1a 1054 v = USBx->GINTSTS;
NYX 0:85b3fd62ea1a 1055 v &= USBx->GINTMSK;
NYX 0:85b3fd62ea1a 1056 return v;
NYX 0:85b3fd62ea1a 1057 }
NYX 0:85b3fd62ea1a 1058
NYX 0:85b3fd62ea1a 1059 /**
NYX 0:85b3fd62ea1a 1060 * @brief USB_ReadDevAllOutEpInterrupt: return the USB device OUT endpoints interrupt status
NYX 0:85b3fd62ea1a 1061 * @param USBx : Selected device
NYX 0:85b3fd62ea1a 1062 * @retval HAL status
NYX 0:85b3fd62ea1a 1063 */
NYX 0:85b3fd62ea1a 1064 uint32_t USB_ReadDevAllOutEpInterrupt (USB_OTG_GlobalTypeDef *USBx)
NYX 0:85b3fd62ea1a 1065 {
NYX 0:85b3fd62ea1a 1066 uint32_t v;
NYX 0:85b3fd62ea1a 1067 v = USBx_DEVICE->DAINT;
NYX 0:85b3fd62ea1a 1068 v &= USBx_DEVICE->DAINTMSK;
NYX 0:85b3fd62ea1a 1069 return ((v & 0xffff0000U) >> 16U);
NYX 0:85b3fd62ea1a 1070 }
NYX 0:85b3fd62ea1a 1071
NYX 0:85b3fd62ea1a 1072 /**
NYX 0:85b3fd62ea1a 1073 * @brief USB_ReadDevAllInEpInterrupt: return the USB device IN endpoints interrupt status
NYX 0:85b3fd62ea1a 1074 * @param USBx : Selected device
NYX 0:85b3fd62ea1a 1075 * @retval HAL status
NYX 0:85b3fd62ea1a 1076 */
NYX 0:85b3fd62ea1a 1077 uint32_t USB_ReadDevAllInEpInterrupt (USB_OTG_GlobalTypeDef *USBx)
NYX 0:85b3fd62ea1a 1078 {
NYX 0:85b3fd62ea1a 1079 uint32_t v;
NYX 0:85b3fd62ea1a 1080 v = USBx_DEVICE->DAINT;
NYX 0:85b3fd62ea1a 1081 v &= USBx_DEVICE->DAINTMSK;
NYX 0:85b3fd62ea1a 1082 return ((v & 0xFFFFU));
NYX 0:85b3fd62ea1a 1083 }
NYX 0:85b3fd62ea1a 1084
NYX 0:85b3fd62ea1a 1085 /**
NYX 0:85b3fd62ea1a 1086 * @brief Returns Device OUT EP Interrupt register
NYX 0:85b3fd62ea1a 1087 * @param USBx : Selected device
NYX 0:85b3fd62ea1a 1088 * @param epnum : endpoint number
NYX 0:85b3fd62ea1a 1089 * This parameter can be a value from 0 to 15
NYX 0:85b3fd62ea1a 1090 * @retval Device OUT EP Interrupt register
NYX 0:85b3fd62ea1a 1091 */
NYX 0:85b3fd62ea1a 1092 uint32_t USB_ReadDevOutEPInterrupt (USB_OTG_GlobalTypeDef *USBx , uint8_t epnum)
NYX 0:85b3fd62ea1a 1093 {
NYX 0:85b3fd62ea1a 1094 uint32_t v;
NYX 0:85b3fd62ea1a 1095 v = USBx_OUTEP(epnum)->DOEPINT;
NYX 0:85b3fd62ea1a 1096 v &= USBx_DEVICE->DOEPMSK;
NYX 0:85b3fd62ea1a 1097 return v;
NYX 0:85b3fd62ea1a 1098 }
NYX 0:85b3fd62ea1a 1099
NYX 0:85b3fd62ea1a 1100 /**
NYX 0:85b3fd62ea1a 1101 * @brief Returns Device IN EP Interrupt register
NYX 0:85b3fd62ea1a 1102 * @param USBx : Selected device
NYX 0:85b3fd62ea1a 1103 * @param epnum : endpoint number
NYX 0:85b3fd62ea1a 1104 * This parameter can be a value from 0 to 15
NYX 0:85b3fd62ea1a 1105 * @retval Device IN EP Interrupt register
NYX 0:85b3fd62ea1a 1106 */
NYX 0:85b3fd62ea1a 1107 uint32_t USB_ReadDevInEPInterrupt (USB_OTG_GlobalTypeDef *USBx , uint8_t epnum)
NYX 0:85b3fd62ea1a 1108 {
NYX 0:85b3fd62ea1a 1109 uint32_t v, msk, emp;
NYX 0:85b3fd62ea1a 1110
NYX 0:85b3fd62ea1a 1111 msk = USBx_DEVICE->DIEPMSK;
NYX 0:85b3fd62ea1a 1112 emp = USBx_DEVICE->DIEPEMPMSK;
NYX 0:85b3fd62ea1a 1113 msk |= ((emp >> epnum) & 0x1U) << 7U;
NYX 0:85b3fd62ea1a 1114 v = USBx_INEP(epnum)->DIEPINT & msk;
NYX 0:85b3fd62ea1a 1115 return v;
NYX 0:85b3fd62ea1a 1116 }
NYX 0:85b3fd62ea1a 1117
NYX 0:85b3fd62ea1a 1118 /**
NYX 0:85b3fd62ea1a 1119 * @brief USB_ClearInterrupts: clear a USB interrupt
NYX 0:85b3fd62ea1a 1120 * @param USBx : Selected device
NYX 0:85b3fd62ea1a 1121 * @param interrupt : interrupt flag
NYX 0:85b3fd62ea1a 1122 * @retval None
NYX 0:85b3fd62ea1a 1123 */
NYX 0:85b3fd62ea1a 1124 void USB_ClearInterrupts (USB_OTG_GlobalTypeDef *USBx, uint32_t interrupt)
NYX 0:85b3fd62ea1a 1125 {
NYX 0:85b3fd62ea1a 1126 USBx->GINTSTS |= interrupt;
NYX 0:85b3fd62ea1a 1127 }
NYX 0:85b3fd62ea1a 1128
NYX 0:85b3fd62ea1a 1129 /**
NYX 0:85b3fd62ea1a 1130 * @brief Returns USB core mode
NYX 0:85b3fd62ea1a 1131 * @param USBx : Selected device
NYX 0:85b3fd62ea1a 1132 * @retval return core mode : Host or Device
NYX 0:85b3fd62ea1a 1133 * This parameter can be one of these values:
NYX 0:85b3fd62ea1a 1134 * 0 : Host
NYX 0:85b3fd62ea1a 1135 * 1 : Device
NYX 0:85b3fd62ea1a 1136 */
NYX 0:85b3fd62ea1a 1137 uint32_t USB_GetMode(USB_OTG_GlobalTypeDef *USBx)
NYX 0:85b3fd62ea1a 1138 {
NYX 0:85b3fd62ea1a 1139 return ((USBx->GINTSTS ) & 0x1U);
NYX 0:85b3fd62ea1a 1140 }
NYX 0:85b3fd62ea1a 1141
NYX 0:85b3fd62ea1a 1142
NYX 0:85b3fd62ea1a 1143 /**
NYX 0:85b3fd62ea1a 1144 * @brief Activate EP0 for Setup transactions
NYX 0:85b3fd62ea1a 1145 * @param USBx : Selected device
NYX 0:85b3fd62ea1a 1146 * @retval HAL status
NYX 0:85b3fd62ea1a 1147 */
NYX 0:85b3fd62ea1a 1148 HAL_StatusTypeDef USB_ActivateSetup (USB_OTG_GlobalTypeDef *USBx)
NYX 0:85b3fd62ea1a 1149 {
NYX 0:85b3fd62ea1a 1150 /* Set the MPS of the IN EP based on the enumeration speed */
NYX 0:85b3fd62ea1a 1151 USBx_INEP(0U)->DIEPCTL &= ~USB_OTG_DIEPCTL_MPSIZ;
NYX 0:85b3fd62ea1a 1152
NYX 0:85b3fd62ea1a 1153 if((USBx_DEVICE->DSTS & USB_OTG_DSTS_ENUMSPD) == DSTS_ENUMSPD_LS_PHY_6MHZ)
NYX 0:85b3fd62ea1a 1154 {
NYX 0:85b3fd62ea1a 1155 USBx_INEP(0U)->DIEPCTL |= 3U;
NYX 0:85b3fd62ea1a 1156 }
NYX 0:85b3fd62ea1a 1157 USBx_DEVICE->DCTL |= USB_OTG_DCTL_CGINAK;
NYX 0:85b3fd62ea1a 1158
NYX 0:85b3fd62ea1a 1159 return HAL_OK;
NYX 0:85b3fd62ea1a 1160 }
NYX 0:85b3fd62ea1a 1161
NYX 0:85b3fd62ea1a 1162
NYX 0:85b3fd62ea1a 1163 /**
NYX 0:85b3fd62ea1a 1164 * @brief Prepare the EP0 to start the first control setup
NYX 0:85b3fd62ea1a 1165 * @param USBx : Selected device
NYX 0:85b3fd62ea1a 1166 * @param dma: USB dma enabled or disabled
NYX 0:85b3fd62ea1a 1167 * This parameter can be one of these values:
NYX 0:85b3fd62ea1a 1168 * 0 : DMA feature not used
NYX 0:85b3fd62ea1a 1169 * 1 : DMA feature used
NYX 0:85b3fd62ea1a 1170 * @param psetup : pointer to setup packet
NYX 0:85b3fd62ea1a 1171 * @retval HAL status
NYX 0:85b3fd62ea1a 1172 */
NYX 0:85b3fd62ea1a 1173 HAL_StatusTypeDef USB_EP0_OutStart(USB_OTG_GlobalTypeDef *USBx, uint8_t dma, uint8_t *psetup)
NYX 0:85b3fd62ea1a 1174 {
NYX 0:85b3fd62ea1a 1175 USBx_OUTEP(0U)->DOEPTSIZ = 0U;
NYX 0:85b3fd62ea1a 1176 USBx_OUTEP(0U)->DOEPTSIZ |= (USB_OTG_DOEPTSIZ_PKTCNT & (1U << 19U)) ;
NYX 0:85b3fd62ea1a 1177 USBx_OUTEP(0U)->DOEPTSIZ |= (3U * 8U);
NYX 0:85b3fd62ea1a 1178 USBx_OUTEP(0U)->DOEPTSIZ |= USB_OTG_DOEPTSIZ_STUPCNT;
NYX 0:85b3fd62ea1a 1179
NYX 0:85b3fd62ea1a 1180 if (dma == 1U)
NYX 0:85b3fd62ea1a 1181 {
NYX 0:85b3fd62ea1a 1182 USBx_OUTEP(0U)->DOEPDMA = (uint32_t)psetup;
NYX 0:85b3fd62ea1a 1183 /* EP enable */
NYX 0:85b3fd62ea1a 1184 USBx_OUTEP(0U)->DOEPCTL = 0x80008000U;
NYX 0:85b3fd62ea1a 1185 }
NYX 0:85b3fd62ea1a 1186
NYX 0:85b3fd62ea1a 1187 return HAL_OK;
NYX 0:85b3fd62ea1a 1188 }
NYX 0:85b3fd62ea1a 1189
NYX 0:85b3fd62ea1a 1190
NYX 0:85b3fd62ea1a 1191 /**
NYX 0:85b3fd62ea1a 1192 * @brief Reset the USB Core (needed after USB clock settings change)
NYX 0:85b3fd62ea1a 1193 * @param USBx : Selected device
NYX 0:85b3fd62ea1a 1194 * @retval HAL status
NYX 0:85b3fd62ea1a 1195 */
NYX 0:85b3fd62ea1a 1196 static HAL_StatusTypeDef USB_CoreReset(USB_OTG_GlobalTypeDef *USBx)
NYX 0:85b3fd62ea1a 1197 {
NYX 0:85b3fd62ea1a 1198 uint32_t count = 0U;
NYX 0:85b3fd62ea1a 1199
NYX 0:85b3fd62ea1a 1200 /* Wait for AHB master IDLE state. */
NYX 0:85b3fd62ea1a 1201 do
NYX 0:85b3fd62ea1a 1202 {
NYX 0:85b3fd62ea1a 1203 if (++count > 200000U)
NYX 0:85b3fd62ea1a 1204 {
NYX 0:85b3fd62ea1a 1205 return HAL_TIMEOUT;
NYX 0:85b3fd62ea1a 1206 }
NYX 0:85b3fd62ea1a 1207 }
NYX 0:85b3fd62ea1a 1208 while ((USBx->GRSTCTL & USB_OTG_GRSTCTL_AHBIDL) == 0U);
NYX 0:85b3fd62ea1a 1209
NYX 0:85b3fd62ea1a 1210 /* Core Soft Reset */
NYX 0:85b3fd62ea1a 1211 count = 0U;
NYX 0:85b3fd62ea1a 1212 USBx->GRSTCTL |= USB_OTG_GRSTCTL_CSRST;
NYX 0:85b3fd62ea1a 1213
NYX 0:85b3fd62ea1a 1214 do
NYX 0:85b3fd62ea1a 1215 {
NYX 0:85b3fd62ea1a 1216 if (++count > 200000U)
NYX 0:85b3fd62ea1a 1217 {
NYX 0:85b3fd62ea1a 1218 return HAL_TIMEOUT;
NYX 0:85b3fd62ea1a 1219 }
NYX 0:85b3fd62ea1a 1220 }
NYX 0:85b3fd62ea1a 1221 while ((USBx->GRSTCTL & USB_OTG_GRSTCTL_CSRST) == USB_OTG_GRSTCTL_CSRST);
NYX 0:85b3fd62ea1a 1222
NYX 0:85b3fd62ea1a 1223 return HAL_OK;
NYX 0:85b3fd62ea1a 1224 }
NYX 0:85b3fd62ea1a 1225
NYX 0:85b3fd62ea1a 1226
NYX 0:85b3fd62ea1a 1227 /**
NYX 0:85b3fd62ea1a 1228 * @brief USB_HostInit : Initializes the USB OTG controller registers
NYX 0:85b3fd62ea1a 1229 * for Host mode
NYX 0:85b3fd62ea1a 1230 * @param USBx : Selected device
NYX 0:85b3fd62ea1a 1231 * @param cfg : pointer to a USB_OTG_CfgTypeDef structure that contains
NYX 0:85b3fd62ea1a 1232 * the configuration information for the specified USBx peripheral.
NYX 0:85b3fd62ea1a 1233 * @retval HAL status
NYX 0:85b3fd62ea1a 1234 */
NYX 0:85b3fd62ea1a 1235 HAL_StatusTypeDef USB_HostInit (USB_OTG_GlobalTypeDef *USBx, USB_OTG_CfgTypeDef cfg)
NYX 0:85b3fd62ea1a 1236 {
NYX 0:85b3fd62ea1a 1237 uint32_t i;
NYX 0:85b3fd62ea1a 1238
NYX 0:85b3fd62ea1a 1239 /* Restart the Phy Clock */
NYX 0:85b3fd62ea1a 1240 USBx_PCGCCTL = 0U;
NYX 0:85b3fd62ea1a 1241
NYX 0:85b3fd62ea1a 1242 /* Activate VBUS Sensing B */
NYX 0:85b3fd62ea1a 1243 #if defined(STM32F446xx) || defined(STM32F469xx) || defined(STM32F479xx) || defined(STM32F412Zx) || defined(STM32F412Vx) || \
NYX 0:85b3fd62ea1a 1244 defined(STM32F412Rx) || defined(STM32F412Cx) || defined(STM32F413xx) || defined(STM32F423xx)
NYX 0:85b3fd62ea1a 1245 USBx->GCCFG |= USB_OTG_GCCFG_VBDEN;
NYX 0:85b3fd62ea1a 1246 #else
NYX 0:85b3fd62ea1a 1247 USBx->GCCFG &=~ (USB_OTG_GCCFG_VBUSASEN);
NYX 0:85b3fd62ea1a 1248 USBx->GCCFG &=~ (USB_OTG_GCCFG_VBUSBSEN);
NYX 0:85b3fd62ea1a 1249 USBx->GCCFG |= USB_OTG_GCCFG_NOVBUSSENS;
NYX 0:85b3fd62ea1a 1250 #endif /* STM32F446xx || STM32F469xx || STM32F479xx || STM32F412Zx || STM32F412Rx || STM32F412Vx || STM32F412Cx || STM32F413xx || STM32F423xx */
NYX 0:85b3fd62ea1a 1251
NYX 0:85b3fd62ea1a 1252 /* Disable the FS/LS support mode only */
NYX 0:85b3fd62ea1a 1253 if((cfg.speed == USB_OTG_SPEED_FULL)&&
NYX 0:85b3fd62ea1a 1254 (USBx != USB_OTG_FS))
NYX 0:85b3fd62ea1a 1255 {
NYX 0:85b3fd62ea1a 1256 USBx_HOST->HCFG |= USB_OTG_HCFG_FSLSS;
NYX 0:85b3fd62ea1a 1257 }
NYX 0:85b3fd62ea1a 1258 else
NYX 0:85b3fd62ea1a 1259 {
NYX 0:85b3fd62ea1a 1260 USBx_HOST->HCFG &= ~(USB_OTG_HCFG_FSLSS);
NYX 0:85b3fd62ea1a 1261 }
NYX 0:85b3fd62ea1a 1262
NYX 0:85b3fd62ea1a 1263 /* Make sure the FIFOs are flushed. */
NYX 0:85b3fd62ea1a 1264 USB_FlushTxFifo(USBx, 0x10U); /* all Tx FIFOs */
NYX 0:85b3fd62ea1a 1265 USB_FlushRxFifo(USBx);
NYX 0:85b3fd62ea1a 1266
NYX 0:85b3fd62ea1a 1267 /* Clear all pending HC Interrupts */
NYX 0:85b3fd62ea1a 1268 for (i = 0U; i < cfg.Host_channels; i++)
NYX 0:85b3fd62ea1a 1269 {
NYX 0:85b3fd62ea1a 1270 USBx_HC(i)->HCINT = 0xFFFFFFFFU;
NYX 0:85b3fd62ea1a 1271 USBx_HC(i)->HCINTMSK = 0U;
NYX 0:85b3fd62ea1a 1272 }
NYX 0:85b3fd62ea1a 1273
NYX 0:85b3fd62ea1a 1274 /* Enable VBUS driving */
NYX 0:85b3fd62ea1a 1275 USB_DriveVbus(USBx, 1U);
NYX 0:85b3fd62ea1a 1276
NYX 0:85b3fd62ea1a 1277 HAL_Delay(200U);
NYX 0:85b3fd62ea1a 1278
NYX 0:85b3fd62ea1a 1279 /* Disable all interrupts. */
NYX 0:85b3fd62ea1a 1280 USBx->GINTMSK = 0U;
NYX 0:85b3fd62ea1a 1281
NYX 0:85b3fd62ea1a 1282 /* Clear any pending interrupts */
NYX 0:85b3fd62ea1a 1283 USBx->GINTSTS = 0xFFFFFFFFU;
NYX 0:85b3fd62ea1a 1284
NYX 0:85b3fd62ea1a 1285 if(USBx == USB_OTG_FS)
NYX 0:85b3fd62ea1a 1286 {
NYX 0:85b3fd62ea1a 1287 /* set Rx FIFO size */
NYX 0:85b3fd62ea1a 1288 USBx->GRXFSIZ = 0x80U;
NYX 0:85b3fd62ea1a 1289 USBx->DIEPTXF0_HNPTXFSIZ = (uint32_t )(((0x60U << 16U)& USB_OTG_NPTXFD) | 0x80U);
NYX 0:85b3fd62ea1a 1290 USBx->HPTXFSIZ = (uint32_t )(((0x40U << 16U)& USB_OTG_HPTXFSIZ_PTXFD) | 0xE0U);
NYX 0:85b3fd62ea1a 1291 }
NYX 0:85b3fd62ea1a 1292 else
NYX 0:85b3fd62ea1a 1293 {
NYX 0:85b3fd62ea1a 1294 /* set Rx FIFO size */
NYX 0:85b3fd62ea1a 1295 USBx->GRXFSIZ = 0x200U;
NYX 0:85b3fd62ea1a 1296 USBx->DIEPTXF0_HNPTXFSIZ = (uint32_t )(((0x100U << 16U)& USB_OTG_NPTXFD) | 0x200U);
NYX 0:85b3fd62ea1a 1297 USBx->HPTXFSIZ = (uint32_t )(((0xE0U << 16U)& USB_OTG_HPTXFSIZ_PTXFD) | 0x300U);
NYX 0:85b3fd62ea1a 1298 }
NYX 0:85b3fd62ea1a 1299
NYX 0:85b3fd62ea1a 1300 /* Enable the common interrupts */
NYX 0:85b3fd62ea1a 1301 if (cfg.dma_enable == DISABLE)
NYX 0:85b3fd62ea1a 1302 {
NYX 0:85b3fd62ea1a 1303 USBx->GINTMSK |= USB_OTG_GINTMSK_RXFLVLM;
NYX 0:85b3fd62ea1a 1304 }
NYX 0:85b3fd62ea1a 1305
NYX 0:85b3fd62ea1a 1306 /* Enable interrupts matching to the Host mode ONLY */
NYX 0:85b3fd62ea1a 1307 USBx->GINTMSK |= (USB_OTG_GINTMSK_PRTIM | USB_OTG_GINTMSK_HCIM |\
NYX 0:85b3fd62ea1a 1308 USB_OTG_GINTMSK_SOFM |USB_OTG_GINTSTS_DISCINT|\
NYX 0:85b3fd62ea1a 1309 USB_OTG_GINTMSK_PXFRM_IISOOXFRM | USB_OTG_GINTMSK_WUIM);
NYX 0:85b3fd62ea1a 1310
NYX 0:85b3fd62ea1a 1311 return HAL_OK;
NYX 0:85b3fd62ea1a 1312 }
NYX 0:85b3fd62ea1a 1313
NYX 0:85b3fd62ea1a 1314 /**
NYX 0:85b3fd62ea1a 1315 * @brief USB_InitFSLSPClkSel : Initializes the FSLSPClkSel field of the
NYX 0:85b3fd62ea1a 1316 * HCFG register on the PHY type and set the right frame interval
NYX 0:85b3fd62ea1a 1317 * @param USBx : Selected device
NYX 0:85b3fd62ea1a 1318 * @param freq : clock frequency
NYX 0:85b3fd62ea1a 1319 * This parameter can be one of these values:
NYX 0:85b3fd62ea1a 1320 * HCFG_48_MHZ : Full Speed 48 MHz Clock
NYX 0:85b3fd62ea1a 1321 * HCFG_6_MHZ : Low Speed 6 MHz Clock
NYX 0:85b3fd62ea1a 1322 * @retval HAL status
NYX 0:85b3fd62ea1a 1323 */
NYX 0:85b3fd62ea1a 1324 HAL_StatusTypeDef USB_InitFSLSPClkSel(USB_OTG_GlobalTypeDef *USBx , uint8_t freq)
NYX 0:85b3fd62ea1a 1325 {
NYX 0:85b3fd62ea1a 1326 USBx_HOST->HCFG &= ~(USB_OTG_HCFG_FSLSPCS);
NYX 0:85b3fd62ea1a 1327 USBx_HOST->HCFG |= (freq & USB_OTG_HCFG_FSLSPCS);
NYX 0:85b3fd62ea1a 1328
NYX 0:85b3fd62ea1a 1329 if (freq == HCFG_48_MHZ)
NYX 0:85b3fd62ea1a 1330 {
NYX 0:85b3fd62ea1a 1331 USBx_HOST->HFIR = 48000U;
NYX 0:85b3fd62ea1a 1332 }
NYX 0:85b3fd62ea1a 1333 else if (freq == HCFG_6_MHZ)
NYX 0:85b3fd62ea1a 1334 {
NYX 0:85b3fd62ea1a 1335 USBx_HOST->HFIR = 6000U;
NYX 0:85b3fd62ea1a 1336 }
NYX 0:85b3fd62ea1a 1337 return HAL_OK;
NYX 0:85b3fd62ea1a 1338 }
NYX 0:85b3fd62ea1a 1339
NYX 0:85b3fd62ea1a 1340 /**
NYX 0:85b3fd62ea1a 1341 * @brief USB_OTG_ResetPort : Reset Host Port
NYX 0:85b3fd62ea1a 1342 * @param USBx : Selected device
NYX 0:85b3fd62ea1a 1343 * @retval HAL status
NYX 0:85b3fd62ea1a 1344 * @note (1)The application must wait at least 10 ms
NYX 0:85b3fd62ea1a 1345 * before clearing the reset bit.
NYX 0:85b3fd62ea1a 1346 */
NYX 0:85b3fd62ea1a 1347 HAL_StatusTypeDef USB_ResetPort(USB_OTG_GlobalTypeDef *USBx)
NYX 0:85b3fd62ea1a 1348 {
NYX 0:85b3fd62ea1a 1349 __IO uint32_t hprt0;
NYX 0:85b3fd62ea1a 1350
NYX 0:85b3fd62ea1a 1351 hprt0 = USBx_HPRT0;
NYX 0:85b3fd62ea1a 1352
NYX 0:85b3fd62ea1a 1353 hprt0 &= ~(USB_OTG_HPRT_PENA | USB_OTG_HPRT_PCDET |\
NYX 0:85b3fd62ea1a 1354 USB_OTG_HPRT_PENCHNG | USB_OTG_HPRT_POCCHNG );
NYX 0:85b3fd62ea1a 1355
NYX 0:85b3fd62ea1a 1356 USBx_HPRT0 = (USB_OTG_HPRT_PRST | hprt0);
NYX 0:85b3fd62ea1a 1357 HAL_Delay (10U); /* See Note #1 */
NYX 0:85b3fd62ea1a 1358 USBx_HPRT0 = ((~USB_OTG_HPRT_PRST) & hprt0);
NYX 0:85b3fd62ea1a 1359 return HAL_OK;
NYX 0:85b3fd62ea1a 1360 }
NYX 0:85b3fd62ea1a 1361
NYX 0:85b3fd62ea1a 1362 /**
NYX 0:85b3fd62ea1a 1363 * @brief USB_DriveVbus : activate or de-activate vbus
NYX 0:85b3fd62ea1a 1364 * @param state : VBUS state
NYX 0:85b3fd62ea1a 1365 * This parameter can be one of these values:
NYX 0:85b3fd62ea1a 1366 * 0 : VBUS Active
NYX 0:85b3fd62ea1a 1367 * 1 : VBUS Inactive
NYX 0:85b3fd62ea1a 1368 * @retval HAL status
NYX 0:85b3fd62ea1a 1369 */
NYX 0:85b3fd62ea1a 1370 HAL_StatusTypeDef USB_DriveVbus (USB_OTG_GlobalTypeDef *USBx, uint8_t state)
NYX 0:85b3fd62ea1a 1371 {
NYX 0:85b3fd62ea1a 1372 __IO uint32_t hprt0;
NYX 0:85b3fd62ea1a 1373
NYX 0:85b3fd62ea1a 1374 hprt0 = USBx_HPRT0;
NYX 0:85b3fd62ea1a 1375 hprt0 &= ~(USB_OTG_HPRT_PENA | USB_OTG_HPRT_PCDET |\
NYX 0:85b3fd62ea1a 1376 USB_OTG_HPRT_PENCHNG | USB_OTG_HPRT_POCCHNG );
NYX 0:85b3fd62ea1a 1377
NYX 0:85b3fd62ea1a 1378 if (((hprt0 & USB_OTG_HPRT_PPWR) == 0U) && (state == 1U))
NYX 0:85b3fd62ea1a 1379 {
NYX 0:85b3fd62ea1a 1380 USBx_HPRT0 = (USB_OTG_HPRT_PPWR | hprt0);
NYX 0:85b3fd62ea1a 1381 }
NYX 0:85b3fd62ea1a 1382 if (((hprt0 & USB_OTG_HPRT_PPWR) == USB_OTG_HPRT_PPWR) && (state == 0U))
NYX 0:85b3fd62ea1a 1383 {
NYX 0:85b3fd62ea1a 1384 USBx_HPRT0 = ((~USB_OTG_HPRT_PPWR) & hprt0);
NYX 0:85b3fd62ea1a 1385 }
NYX 0:85b3fd62ea1a 1386 return HAL_OK;
NYX 0:85b3fd62ea1a 1387 }
NYX 0:85b3fd62ea1a 1388
NYX 0:85b3fd62ea1a 1389 /**
NYX 0:85b3fd62ea1a 1390 * @brief Return Host Core speed
NYX 0:85b3fd62ea1a 1391 * @param USBx : Selected device
NYX 0:85b3fd62ea1a 1392 * @retval speed : Host speed
NYX 0:85b3fd62ea1a 1393 * This parameter can be one of these values:
NYX 0:85b3fd62ea1a 1394 * @arg USB_OTG_SPEED_HIGH: High speed mode
NYX 0:85b3fd62ea1a 1395 * @arg USB_OTG_SPEED_FULL: Full speed mode
NYX 0:85b3fd62ea1a 1396 * @arg USB_OTG_SPEED_LOW: Low speed mode
NYX 0:85b3fd62ea1a 1397 */
NYX 0:85b3fd62ea1a 1398 uint32_t USB_GetHostSpeed (USB_OTG_GlobalTypeDef *USBx)
NYX 0:85b3fd62ea1a 1399 {
NYX 0:85b3fd62ea1a 1400 __IO uint32_t hprt0;
NYX 0:85b3fd62ea1a 1401
NYX 0:85b3fd62ea1a 1402 hprt0 = USBx_HPRT0;
NYX 0:85b3fd62ea1a 1403 return ((hprt0 & USB_OTG_HPRT_PSPD) >> 17U);
NYX 0:85b3fd62ea1a 1404 }
NYX 0:85b3fd62ea1a 1405
NYX 0:85b3fd62ea1a 1406 /**
NYX 0:85b3fd62ea1a 1407 * @brief Return Host Current Frame number
NYX 0:85b3fd62ea1a 1408 * @param USBx : Selected device
NYX 0:85b3fd62ea1a 1409 * @retval current frame number
NYX 0:85b3fd62ea1a 1410 */
NYX 0:85b3fd62ea1a 1411 uint32_t USB_GetCurrentFrame (USB_OTG_GlobalTypeDef *USBx)
NYX 0:85b3fd62ea1a 1412 {
NYX 0:85b3fd62ea1a 1413 return (USBx_HOST->HFNUM & USB_OTG_HFNUM_FRNUM);
NYX 0:85b3fd62ea1a 1414 }
NYX 0:85b3fd62ea1a 1415
NYX 0:85b3fd62ea1a 1416 /**
NYX 0:85b3fd62ea1a 1417 * @brief Initialize a host channel
NYX 0:85b3fd62ea1a 1418 * @param USBx : Selected device
NYX 0:85b3fd62ea1a 1419 * @param ch_num : Channel number
NYX 0:85b3fd62ea1a 1420 * This parameter can be a value from 1 to 15
NYX 0:85b3fd62ea1a 1421 * @param epnum : Endpoint number
NYX 0:85b3fd62ea1a 1422 * This parameter can be a value from 1 to 15
NYX 0:85b3fd62ea1a 1423 * @param dev_address : Current device address
NYX 0:85b3fd62ea1a 1424 * This parameter can be a value from 0 to 255
NYX 0:85b3fd62ea1a 1425 * @param speed : Current device speed
NYX 0:85b3fd62ea1a 1426 * This parameter can be one of these values:
NYX 0:85b3fd62ea1a 1427 * @arg USB_OTG_SPEED_HIGH: High speed mode
NYX 0:85b3fd62ea1a 1428 * @arg USB_OTG_SPEED_FULL: Full speed mode
NYX 0:85b3fd62ea1a 1429 * @arg USB_OTG_SPEED_LOW: Low speed mode
NYX 0:85b3fd62ea1a 1430 * @param ep_type : Endpoint Type
NYX 0:85b3fd62ea1a 1431 * This parameter can be one of these values:
NYX 0:85b3fd62ea1a 1432 * @arg EP_TYPE_CTRL: Control type
NYX 0:85b3fd62ea1a 1433 * @arg EP_TYPE_ISOC: Isochronous type
NYX 0:85b3fd62ea1a 1434 * @arg EP_TYPE_BULK: Bulk type
NYX 0:85b3fd62ea1a 1435 * @arg EP_TYPE_INTR: Interrupt type
NYX 0:85b3fd62ea1a 1436 * @param mps : Max Packet Size
NYX 0:85b3fd62ea1a 1437 * This parameter can be a value from 0 to32K
NYX 0:85b3fd62ea1a 1438 * @retval HAL state
NYX 0:85b3fd62ea1a 1439 */
NYX 0:85b3fd62ea1a 1440 HAL_StatusTypeDef USB_HC_Init(USB_OTG_GlobalTypeDef *USBx,
NYX 0:85b3fd62ea1a 1441 uint8_t ch_num,
NYX 0:85b3fd62ea1a 1442 uint8_t epnum,
NYX 0:85b3fd62ea1a 1443 uint8_t dev_address,
NYX 0:85b3fd62ea1a 1444 uint8_t speed,
NYX 0:85b3fd62ea1a 1445 uint8_t ep_type,
NYX 0:85b3fd62ea1a 1446 uint16_t mps)
NYX 0:85b3fd62ea1a 1447 {
NYX 0:85b3fd62ea1a 1448
NYX 0:85b3fd62ea1a 1449 /* Clear old interrupt conditions for this host channel. */
NYX 0:85b3fd62ea1a 1450 USBx_HC(ch_num)->HCINT = 0xFFFFFFFFU;
NYX 0:85b3fd62ea1a 1451
NYX 0:85b3fd62ea1a 1452 /* Enable channel interrupts required for this transfer. */
NYX 0:85b3fd62ea1a 1453 switch (ep_type)
NYX 0:85b3fd62ea1a 1454 {
NYX 0:85b3fd62ea1a 1455 case EP_TYPE_CTRL:
NYX 0:85b3fd62ea1a 1456 case EP_TYPE_BULK:
NYX 0:85b3fd62ea1a 1457
NYX 0:85b3fd62ea1a 1458 USBx_HC(ch_num)->HCINTMSK = USB_OTG_HCINTMSK_XFRCM |\
NYX 0:85b3fd62ea1a 1459 USB_OTG_HCINTMSK_STALLM |\
NYX 0:85b3fd62ea1a 1460 USB_OTG_HCINTMSK_TXERRM |\
NYX 0:85b3fd62ea1a 1461 USB_OTG_HCINTMSK_DTERRM |\
NYX 0:85b3fd62ea1a 1462 USB_OTG_HCINTMSK_AHBERR |\
NYX 0:85b3fd62ea1a 1463 USB_OTG_HCINTMSK_NAKM ;
NYX 0:85b3fd62ea1a 1464
NYX 0:85b3fd62ea1a 1465 if (epnum & 0x80U)
NYX 0:85b3fd62ea1a 1466 {
NYX 0:85b3fd62ea1a 1467 USBx_HC(ch_num)->HCINTMSK |= USB_OTG_HCINTMSK_BBERRM;
NYX 0:85b3fd62ea1a 1468 }
NYX 0:85b3fd62ea1a 1469 else
NYX 0:85b3fd62ea1a 1470 {
NYX 0:85b3fd62ea1a 1471 if(USBx != USB_OTG_FS)
NYX 0:85b3fd62ea1a 1472 {
NYX 0:85b3fd62ea1a 1473 USBx_HC(ch_num)->HCINTMSK |= (USB_OTG_HCINTMSK_NYET | USB_OTG_HCINTMSK_ACKM);
NYX 0:85b3fd62ea1a 1474 }
NYX 0:85b3fd62ea1a 1475 }
NYX 0:85b3fd62ea1a 1476 break;
NYX 0:85b3fd62ea1a 1477
NYX 0:85b3fd62ea1a 1478 case EP_TYPE_INTR:
NYX 0:85b3fd62ea1a 1479
NYX 0:85b3fd62ea1a 1480 USBx_HC(ch_num)->HCINTMSK = USB_OTG_HCINTMSK_XFRCM |\
NYX 0:85b3fd62ea1a 1481 USB_OTG_HCINTMSK_STALLM |\
NYX 0:85b3fd62ea1a 1482 USB_OTG_HCINTMSK_TXERRM |\
NYX 0:85b3fd62ea1a 1483 USB_OTG_HCINTMSK_DTERRM |\
NYX 0:85b3fd62ea1a 1484 USB_OTG_HCINTMSK_NAKM |\
NYX 0:85b3fd62ea1a 1485 USB_OTG_HCINTMSK_AHBERR |\
NYX 0:85b3fd62ea1a 1486 USB_OTG_HCINTMSK_FRMORM ;
NYX 0:85b3fd62ea1a 1487
NYX 0:85b3fd62ea1a 1488 if (epnum & 0x80U)
NYX 0:85b3fd62ea1a 1489 {
NYX 0:85b3fd62ea1a 1490 USBx_HC(ch_num)->HCINTMSK |= USB_OTG_HCINTMSK_BBERRM;
NYX 0:85b3fd62ea1a 1491 }
NYX 0:85b3fd62ea1a 1492
NYX 0:85b3fd62ea1a 1493 break;
NYX 0:85b3fd62ea1a 1494 case EP_TYPE_ISOC:
NYX 0:85b3fd62ea1a 1495
NYX 0:85b3fd62ea1a 1496 USBx_HC(ch_num)->HCINTMSK = USB_OTG_HCINTMSK_XFRCM |\
NYX 0:85b3fd62ea1a 1497 USB_OTG_HCINTMSK_ACKM |\
NYX 0:85b3fd62ea1a 1498 USB_OTG_HCINTMSK_AHBERR |\
NYX 0:85b3fd62ea1a 1499 USB_OTG_HCINTMSK_FRMORM ;
NYX 0:85b3fd62ea1a 1500
NYX 0:85b3fd62ea1a 1501 if (epnum & 0x80U)
NYX 0:85b3fd62ea1a 1502 {
NYX 0:85b3fd62ea1a 1503 USBx_HC(ch_num)->HCINTMSK |= (USB_OTG_HCINTMSK_TXERRM | USB_OTG_HCINTMSK_BBERRM);
NYX 0:85b3fd62ea1a 1504 }
NYX 0:85b3fd62ea1a 1505 break;
NYX 0:85b3fd62ea1a 1506 }
NYX 0:85b3fd62ea1a 1507
NYX 0:85b3fd62ea1a 1508 /* Enable the top level host channel interrupt. */
NYX 0:85b3fd62ea1a 1509 USBx_HOST->HAINTMSK |= (1 << ch_num);
NYX 0:85b3fd62ea1a 1510
NYX 0:85b3fd62ea1a 1511 /* Make sure host channel interrupts are enabled. */
NYX 0:85b3fd62ea1a 1512 USBx->GINTMSK |= USB_OTG_GINTMSK_HCIM;
NYX 0:85b3fd62ea1a 1513
NYX 0:85b3fd62ea1a 1514 /* Program the HCCHAR register */
NYX 0:85b3fd62ea1a 1515 USBx_HC(ch_num)->HCCHAR = (((dev_address << 22U) & USB_OTG_HCCHAR_DAD) |\
NYX 0:85b3fd62ea1a 1516 (((epnum & 0x7FU)<< 11U) & USB_OTG_HCCHAR_EPNUM)|\
NYX 0:85b3fd62ea1a 1517 ((((epnum & 0x80U) == 0x80U)<< 15U) & USB_OTG_HCCHAR_EPDIR)|\
NYX 0:85b3fd62ea1a 1518 (((speed == USB_OTG_SPEED_LOW)<< 17U) & USB_OTG_HCCHAR_LSDEV)|\
NYX 0:85b3fd62ea1a 1519 ((ep_type << 18U) & USB_OTG_HCCHAR_EPTYP)|\
NYX 0:85b3fd62ea1a 1520 (mps & USB_OTG_HCCHAR_MPSIZ));
NYX 0:85b3fd62ea1a 1521
NYX 0:85b3fd62ea1a 1522 if (ep_type == EP_TYPE_INTR)
NYX 0:85b3fd62ea1a 1523 {
NYX 0:85b3fd62ea1a 1524 USBx_HC(ch_num)->HCCHAR |= USB_OTG_HCCHAR_ODDFRM ;
NYX 0:85b3fd62ea1a 1525 }
NYX 0:85b3fd62ea1a 1526
NYX 0:85b3fd62ea1a 1527 return HAL_OK;
NYX 0:85b3fd62ea1a 1528 }
NYX 0:85b3fd62ea1a 1529
NYX 0:85b3fd62ea1a 1530 /**
NYX 0:85b3fd62ea1a 1531 * @brief Start a transfer over a host channel
NYX 0:85b3fd62ea1a 1532 * @param USBx : Selected device
NYX 0:85b3fd62ea1a 1533 * @param hc : pointer to host channel structure
NYX 0:85b3fd62ea1a 1534 * @param dma: USB dma enabled or disabled
NYX 0:85b3fd62ea1a 1535 * This parameter can be one of these values:
NYX 0:85b3fd62ea1a 1536 * 0 : DMA feature not used
NYX 0:85b3fd62ea1a 1537 * 1 : DMA feature used
NYX 0:85b3fd62ea1a 1538 * @retval HAL state
NYX 0:85b3fd62ea1a 1539 */
NYX 0:85b3fd62ea1a 1540 #if defined (__CC_ARM) /*!< ARM Compiler */
NYX 0:85b3fd62ea1a 1541 #pragma O0
NYX 0:85b3fd62ea1a 1542 #elif defined (__GNUC__) /*!< GNU Compiler */
NYX 0:85b3fd62ea1a 1543 #pragma GCC optimize ("O0")
NYX 0:85b3fd62ea1a 1544 #endif /* __CC_ARM */
NYX 0:85b3fd62ea1a 1545 HAL_StatusTypeDef USB_HC_StartXfer(USB_OTG_GlobalTypeDef *USBx, USB_OTG_HCTypeDef *hc, uint8_t dma)
NYX 0:85b3fd62ea1a 1546 {
NYX 0:85b3fd62ea1a 1547 uint8_t is_oddframe = 0;
NYX 0:85b3fd62ea1a 1548 uint16_t len_words = 0;
NYX 0:85b3fd62ea1a 1549 uint16_t num_packets = 0;
NYX 0:85b3fd62ea1a 1550 uint16_t max_hc_pkt_count = 256;
NYX 0:85b3fd62ea1a 1551 uint32_t tmpreg = 0U;
NYX 0:85b3fd62ea1a 1552
NYX 0:85b3fd62ea1a 1553 if((USBx != USB_OTG_FS) && (hc->speed == USB_OTG_SPEED_HIGH))
NYX 0:85b3fd62ea1a 1554 {
NYX 0:85b3fd62ea1a 1555 if((dma == 0) && (hc->do_ping == 1U))
NYX 0:85b3fd62ea1a 1556 {
NYX 0:85b3fd62ea1a 1557 USB_DoPing(USBx, hc->ch_num);
NYX 0:85b3fd62ea1a 1558 return HAL_OK;
NYX 0:85b3fd62ea1a 1559 }
NYX 0:85b3fd62ea1a 1560 else if(dma == 1)
NYX 0:85b3fd62ea1a 1561 {
NYX 0:85b3fd62ea1a 1562 USBx_HC(hc->ch_num)->HCINTMSK &= ~(USB_OTG_HCINTMSK_NYET | USB_OTG_HCINTMSK_ACKM);
NYX 0:85b3fd62ea1a 1563 hc->do_ping = 0U;
NYX 0:85b3fd62ea1a 1564 }
NYX 0:85b3fd62ea1a 1565 }
NYX 0:85b3fd62ea1a 1566
NYX 0:85b3fd62ea1a 1567 /* Compute the expected number of packets associated to the transfer */
NYX 0:85b3fd62ea1a 1568 if (hc->xfer_len > 0U)
NYX 0:85b3fd62ea1a 1569 {
NYX 0:85b3fd62ea1a 1570 num_packets = (hc->xfer_len + hc->max_packet - 1U) / hc->max_packet;
NYX 0:85b3fd62ea1a 1571
NYX 0:85b3fd62ea1a 1572 if (num_packets > max_hc_pkt_count)
NYX 0:85b3fd62ea1a 1573 {
NYX 0:85b3fd62ea1a 1574 num_packets = max_hc_pkt_count;
NYX 0:85b3fd62ea1a 1575 hc->xfer_len = num_packets * hc->max_packet;
NYX 0:85b3fd62ea1a 1576 }
NYX 0:85b3fd62ea1a 1577 }
NYX 0:85b3fd62ea1a 1578 else
NYX 0:85b3fd62ea1a 1579 {
NYX 0:85b3fd62ea1a 1580 num_packets = 1;
NYX 0:85b3fd62ea1a 1581 }
NYX 0:85b3fd62ea1a 1582 if (hc->ep_is_in)
NYX 0:85b3fd62ea1a 1583 {
NYX 0:85b3fd62ea1a 1584 hc->xfer_len = num_packets * hc->max_packet;
NYX 0:85b3fd62ea1a 1585 }
NYX 0:85b3fd62ea1a 1586
NYX 0:85b3fd62ea1a 1587 /* Initialize the HCTSIZn register */
NYX 0:85b3fd62ea1a 1588 USBx_HC(hc->ch_num)->HCTSIZ = (((hc->xfer_len) & USB_OTG_HCTSIZ_XFRSIZ)) |\
NYX 0:85b3fd62ea1a 1589 ((num_packets << 19U) & USB_OTG_HCTSIZ_PKTCNT) |\
NYX 0:85b3fd62ea1a 1590 (((hc->data_pid) << 29U) & USB_OTG_HCTSIZ_DPID);
NYX 0:85b3fd62ea1a 1591
NYX 0:85b3fd62ea1a 1592 if (dma)
NYX 0:85b3fd62ea1a 1593 {
NYX 0:85b3fd62ea1a 1594 /* xfer_buff MUST be 32-bits aligned */
NYX 0:85b3fd62ea1a 1595 USBx_HC(hc->ch_num)->HCDMA = (uint32_t)hc->xfer_buff;
NYX 0:85b3fd62ea1a 1596 }
NYX 0:85b3fd62ea1a 1597
NYX 0:85b3fd62ea1a 1598 is_oddframe = (USBx_HOST->HFNUM & 0x01) ? 0 : 1;
NYX 0:85b3fd62ea1a 1599 USBx_HC(hc->ch_num)->HCCHAR &= ~USB_OTG_HCCHAR_ODDFRM;
NYX 0:85b3fd62ea1a 1600 USBx_HC(hc->ch_num)->HCCHAR |= (is_oddframe << 29);
NYX 0:85b3fd62ea1a 1601
NYX 0:85b3fd62ea1a 1602 /* Set host channel enable */
NYX 0:85b3fd62ea1a 1603 tmpreg = USBx_HC(hc->ch_num)->HCCHAR;
NYX 0:85b3fd62ea1a 1604 tmpreg &= ~USB_OTG_HCCHAR_CHDIS;
NYX 0:85b3fd62ea1a 1605 tmpreg |= USB_OTG_HCCHAR_CHENA;
NYX 0:85b3fd62ea1a 1606 USBx_HC(hc->ch_num)->HCCHAR = tmpreg;
NYX 0:85b3fd62ea1a 1607
NYX 0:85b3fd62ea1a 1608 if (dma == 0) /* Slave mode */
NYX 0:85b3fd62ea1a 1609 {
NYX 0:85b3fd62ea1a 1610 if((hc->ep_is_in == 0U) && (hc->xfer_len > 0U))
NYX 0:85b3fd62ea1a 1611 {
NYX 0:85b3fd62ea1a 1612 switch(hc->ep_type)
NYX 0:85b3fd62ea1a 1613 {
NYX 0:85b3fd62ea1a 1614 /* Non periodic transfer */
NYX 0:85b3fd62ea1a 1615 case EP_TYPE_CTRL:
NYX 0:85b3fd62ea1a 1616 case EP_TYPE_BULK:
NYX 0:85b3fd62ea1a 1617
NYX 0:85b3fd62ea1a 1618 len_words = (hc->xfer_len + 3) / 4;
NYX 0:85b3fd62ea1a 1619
NYX 0:85b3fd62ea1a 1620 /* check if there is enough space in FIFO space */
NYX 0:85b3fd62ea1a 1621 if(len_words > (USBx->HNPTXSTS & 0xFFFF))
NYX 0:85b3fd62ea1a 1622 {
NYX 0:85b3fd62ea1a 1623 /* need to process data in nptxfempty interrupt */
NYX 0:85b3fd62ea1a 1624 USBx->GINTMSK |= USB_OTG_GINTMSK_NPTXFEM;
NYX 0:85b3fd62ea1a 1625 }
NYX 0:85b3fd62ea1a 1626 break;
NYX 0:85b3fd62ea1a 1627 /* Periodic transfer */
NYX 0:85b3fd62ea1a 1628 case EP_TYPE_INTR:
NYX 0:85b3fd62ea1a 1629 case EP_TYPE_ISOC:
NYX 0:85b3fd62ea1a 1630 len_words = (hc->xfer_len + 3) / 4;
NYX 0:85b3fd62ea1a 1631 /* check if there is enough space in FIFO space */
NYX 0:85b3fd62ea1a 1632 if(len_words > (USBx_HOST->HPTXSTS & 0xFFFF)) /* split the transfer */
NYX 0:85b3fd62ea1a 1633 {
NYX 0:85b3fd62ea1a 1634 /* need to process data in ptxfempty interrupt */
NYX 0:85b3fd62ea1a 1635 USBx->GINTMSK |= USB_OTG_GINTMSK_PTXFEM;
NYX 0:85b3fd62ea1a 1636 }
NYX 0:85b3fd62ea1a 1637 break;
NYX 0:85b3fd62ea1a 1638
NYX 0:85b3fd62ea1a 1639 default:
NYX 0:85b3fd62ea1a 1640 break;
NYX 0:85b3fd62ea1a 1641 }
NYX 0:85b3fd62ea1a 1642
NYX 0:85b3fd62ea1a 1643 /* Write packet into the Tx FIFO. */
NYX 0:85b3fd62ea1a 1644 USB_WritePacket(USBx, hc->xfer_buff, hc->ch_num, hc->xfer_len, 0);
NYX 0:85b3fd62ea1a 1645 hc->xfer_count = hc->xfer_len;
NYX 0:85b3fd62ea1a 1646 }
NYX 0:85b3fd62ea1a 1647 }
NYX 0:85b3fd62ea1a 1648
NYX 0:85b3fd62ea1a 1649 return HAL_OK;
NYX 0:85b3fd62ea1a 1650 }
NYX 0:85b3fd62ea1a 1651
NYX 0:85b3fd62ea1a 1652 /**
NYX 0:85b3fd62ea1a 1653 * @brief Read all host channel interrupts status
NYX 0:85b3fd62ea1a 1654 * @param USBx : Selected device
NYX 0:85b3fd62ea1a 1655 * @retval HAL state
NYX 0:85b3fd62ea1a 1656 */
NYX 0:85b3fd62ea1a 1657 uint32_t USB_HC_ReadInterrupt (USB_OTG_GlobalTypeDef *USBx)
NYX 0:85b3fd62ea1a 1658 {
NYX 0:85b3fd62ea1a 1659 return ((USBx_HOST->HAINT) & 0xFFFFU);
NYX 0:85b3fd62ea1a 1660 }
NYX 0:85b3fd62ea1a 1661
NYX 0:85b3fd62ea1a 1662 /**
NYX 0:85b3fd62ea1a 1663 * @brief Halt a host channel
NYX 0:85b3fd62ea1a 1664 * @param USBx : Selected device
NYX 0:85b3fd62ea1a 1665 * @param hc_num : Host Channel number
NYX 0:85b3fd62ea1a 1666 * This parameter can be a value from 1 to 15
NYX 0:85b3fd62ea1a 1667 * @retval HAL state
NYX 0:85b3fd62ea1a 1668 */
NYX 0:85b3fd62ea1a 1669 HAL_StatusTypeDef USB_HC_Halt(USB_OTG_GlobalTypeDef *USBx , uint8_t hc_num)
NYX 0:85b3fd62ea1a 1670 {
NYX 0:85b3fd62ea1a 1671 uint32_t count = 0U;
NYX 0:85b3fd62ea1a 1672
NYX 0:85b3fd62ea1a 1673 /* Check for space in the request queue to issue the halt. */
NYX 0:85b3fd62ea1a 1674 if (((((USBx_HC(hc_num)->HCCHAR) & USB_OTG_HCCHAR_EPTYP) >> 18) == HCCHAR_CTRL) || (((((USBx_HC(hc_num)->HCCHAR) &
NYX 0:85b3fd62ea1a 1675 USB_OTG_HCCHAR_EPTYP) >> 18) == HCCHAR_BULK)))
NYX 0:85b3fd62ea1a 1676 {
NYX 0:85b3fd62ea1a 1677 USBx_HC(hc_num)->HCCHAR |= USB_OTG_HCCHAR_CHDIS;
NYX 0:85b3fd62ea1a 1678
NYX 0:85b3fd62ea1a 1679 if ((USBx->HNPTXSTS & 0xFF0000U) == 0U)
NYX 0:85b3fd62ea1a 1680 {
NYX 0:85b3fd62ea1a 1681 USBx_HC(hc_num)->HCCHAR &= ~USB_OTG_HCCHAR_CHENA;
NYX 0:85b3fd62ea1a 1682 USBx_HC(hc_num)->HCCHAR |= USB_OTG_HCCHAR_CHENA;
NYX 0:85b3fd62ea1a 1683 do
NYX 0:85b3fd62ea1a 1684 {
NYX 0:85b3fd62ea1a 1685 if (++count > 1000U)
NYX 0:85b3fd62ea1a 1686 {
NYX 0:85b3fd62ea1a 1687 break;
NYX 0:85b3fd62ea1a 1688 }
NYX 0:85b3fd62ea1a 1689 }
NYX 0:85b3fd62ea1a 1690 while ((USBx_HC(hc_num)->HCCHAR & USB_OTG_HCCHAR_CHENA) == USB_OTG_HCCHAR_CHENA);
NYX 0:85b3fd62ea1a 1691 }
NYX 0:85b3fd62ea1a 1692 else
NYX 0:85b3fd62ea1a 1693 {
NYX 0:85b3fd62ea1a 1694 USBx_HC(hc_num)->HCCHAR |= USB_OTG_HCCHAR_CHENA;
NYX 0:85b3fd62ea1a 1695 }
NYX 0:85b3fd62ea1a 1696 }
NYX 0:85b3fd62ea1a 1697 else
NYX 0:85b3fd62ea1a 1698 {
NYX 0:85b3fd62ea1a 1699 USBx_HC(hc_num)->HCCHAR |= USB_OTG_HCCHAR_CHDIS;
NYX 0:85b3fd62ea1a 1700
NYX 0:85b3fd62ea1a 1701 if ((USBx_HOST->HPTXSTS & 0xFFFFU) == 0U)
NYX 0:85b3fd62ea1a 1702 {
NYX 0:85b3fd62ea1a 1703 USBx_HC(hc_num)->HCCHAR &= ~USB_OTG_HCCHAR_CHENA;
NYX 0:85b3fd62ea1a 1704 USBx_HC(hc_num)->HCCHAR |= USB_OTG_HCCHAR_CHENA;
NYX 0:85b3fd62ea1a 1705 do
NYX 0:85b3fd62ea1a 1706 {
NYX 0:85b3fd62ea1a 1707 if (++count > 1000U)
NYX 0:85b3fd62ea1a 1708 {
NYX 0:85b3fd62ea1a 1709 break;
NYX 0:85b3fd62ea1a 1710 }
NYX 0:85b3fd62ea1a 1711 }
NYX 0:85b3fd62ea1a 1712 while ((USBx_HC(hc_num)->HCCHAR & USB_OTG_HCCHAR_CHENA) == USB_OTG_HCCHAR_CHENA);
NYX 0:85b3fd62ea1a 1713 }
NYX 0:85b3fd62ea1a 1714 else
NYX 0:85b3fd62ea1a 1715 {
NYX 0:85b3fd62ea1a 1716 USBx_HC(hc_num)->HCCHAR |= USB_OTG_HCCHAR_CHENA;
NYX 0:85b3fd62ea1a 1717 }
NYX 0:85b3fd62ea1a 1718 }
NYX 0:85b3fd62ea1a 1719
NYX 0:85b3fd62ea1a 1720 return HAL_OK;
NYX 0:85b3fd62ea1a 1721 }
NYX 0:85b3fd62ea1a 1722
NYX 0:85b3fd62ea1a 1723 /**
NYX 0:85b3fd62ea1a 1724 * @brief Initiate Do Ping protocol
NYX 0:85b3fd62ea1a 1725 * @param USBx : Selected device
NYX 0:85b3fd62ea1a 1726 * @param hc_num : Host Channel number
NYX 0:85b3fd62ea1a 1727 * This parameter can be a value from 1 to 15
NYX 0:85b3fd62ea1a 1728 * @retval HAL state
NYX 0:85b3fd62ea1a 1729 */
NYX 0:85b3fd62ea1a 1730 HAL_StatusTypeDef USB_DoPing(USB_OTG_GlobalTypeDef *USBx , uint8_t ch_num)
NYX 0:85b3fd62ea1a 1731 {
NYX 0:85b3fd62ea1a 1732 uint8_t num_packets = 1U;
NYX 0:85b3fd62ea1a 1733 uint32_t tmpreg = 0U;
NYX 0:85b3fd62ea1a 1734
NYX 0:85b3fd62ea1a 1735 USBx_HC(ch_num)->HCTSIZ = ((num_packets << 19U) & USB_OTG_HCTSIZ_PKTCNT) |\
NYX 0:85b3fd62ea1a 1736 USB_OTG_HCTSIZ_DOPING;
NYX 0:85b3fd62ea1a 1737
NYX 0:85b3fd62ea1a 1738 /* Set host channel enable */
NYX 0:85b3fd62ea1a 1739 tmpreg = USBx_HC(ch_num)->HCCHAR;
NYX 0:85b3fd62ea1a 1740 tmpreg &= ~USB_OTG_HCCHAR_CHDIS;
NYX 0:85b3fd62ea1a 1741 tmpreg |= USB_OTG_HCCHAR_CHENA;
NYX 0:85b3fd62ea1a 1742 USBx_HC(ch_num)->HCCHAR = tmpreg;
NYX 0:85b3fd62ea1a 1743
NYX 0:85b3fd62ea1a 1744 return HAL_OK;
NYX 0:85b3fd62ea1a 1745 }
NYX 0:85b3fd62ea1a 1746
NYX 0:85b3fd62ea1a 1747 /**
NYX 0:85b3fd62ea1a 1748 * @brief Stop Host Core
NYX 0:85b3fd62ea1a 1749 * @param USBx : Selected device
NYX 0:85b3fd62ea1a 1750 * @retval HAL state
NYX 0:85b3fd62ea1a 1751 */
NYX 0:85b3fd62ea1a 1752 HAL_StatusTypeDef USB_StopHost(USB_OTG_GlobalTypeDef *USBx)
NYX 0:85b3fd62ea1a 1753 {
NYX 0:85b3fd62ea1a 1754 uint8_t i;
NYX 0:85b3fd62ea1a 1755 uint32_t count = 0U;
NYX 0:85b3fd62ea1a 1756 uint32_t value;
NYX 0:85b3fd62ea1a 1757
NYX 0:85b3fd62ea1a 1758 USB_DisableGlobalInt(USBx);
NYX 0:85b3fd62ea1a 1759
NYX 0:85b3fd62ea1a 1760 /* Flush FIFO */
NYX 0:85b3fd62ea1a 1761 USB_FlushTxFifo(USBx, 0x10U);
NYX 0:85b3fd62ea1a 1762 USB_FlushRxFifo(USBx);
NYX 0:85b3fd62ea1a 1763
NYX 0:85b3fd62ea1a 1764 /* Flush out any leftover queued requests. */
NYX 0:85b3fd62ea1a 1765 for (i = 0; i <= 15; i++)
NYX 0:85b3fd62ea1a 1766 {
NYX 0:85b3fd62ea1a 1767
NYX 0:85b3fd62ea1a 1768 value = USBx_HC(i)->HCCHAR ;
NYX 0:85b3fd62ea1a 1769 value |= USB_OTG_HCCHAR_CHDIS;
NYX 0:85b3fd62ea1a 1770 value &= ~USB_OTG_HCCHAR_CHENA;
NYX 0:85b3fd62ea1a 1771 value &= ~USB_OTG_HCCHAR_EPDIR;
NYX 0:85b3fd62ea1a 1772 USBx_HC(i)->HCCHAR = value;
NYX 0:85b3fd62ea1a 1773 }
NYX 0:85b3fd62ea1a 1774
NYX 0:85b3fd62ea1a 1775 /* Halt all channels to put them into a known state. */
NYX 0:85b3fd62ea1a 1776 for (i = 0; i <= 15; i++)
NYX 0:85b3fd62ea1a 1777 {
NYX 0:85b3fd62ea1a 1778 value = USBx_HC(i)->HCCHAR ;
NYX 0:85b3fd62ea1a 1779
NYX 0:85b3fd62ea1a 1780 value |= USB_OTG_HCCHAR_CHDIS;
NYX 0:85b3fd62ea1a 1781 value |= USB_OTG_HCCHAR_CHENA;
NYX 0:85b3fd62ea1a 1782 value &= ~USB_OTG_HCCHAR_EPDIR;
NYX 0:85b3fd62ea1a 1783
NYX 0:85b3fd62ea1a 1784 USBx_HC(i)->HCCHAR = value;
NYX 0:85b3fd62ea1a 1785 do
NYX 0:85b3fd62ea1a 1786 {
NYX 0:85b3fd62ea1a 1787 if (++count > 1000U)
NYX 0:85b3fd62ea1a 1788 {
NYX 0:85b3fd62ea1a 1789 break;
NYX 0:85b3fd62ea1a 1790 }
NYX 0:85b3fd62ea1a 1791 }
NYX 0:85b3fd62ea1a 1792 while ((USBx_HC(i)->HCCHAR & USB_OTG_HCCHAR_CHENA) == USB_OTG_HCCHAR_CHENA);
NYX 0:85b3fd62ea1a 1793 }
NYX 0:85b3fd62ea1a 1794
NYX 0:85b3fd62ea1a 1795 /* Clear any pending Host interrupts */
NYX 0:85b3fd62ea1a 1796 USBx_HOST->HAINT = 0xFFFFFFFFU;
NYX 0:85b3fd62ea1a 1797 USBx->GINTSTS = 0xFFFFFFFFU;
NYX 0:85b3fd62ea1a 1798 USB_EnableGlobalInt(USBx);
NYX 0:85b3fd62ea1a 1799 return HAL_OK;
NYX 0:85b3fd62ea1a 1800 }
NYX 0:85b3fd62ea1a 1801 /**
NYX 0:85b3fd62ea1a 1802 * @}
NYX 0:85b3fd62ea1a 1803 */
NYX 0:85b3fd62ea1a 1804 #endif /* STM32F405xx || STM32F415xx || STM32F407xx || STM32F417xx || STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx ||
NYX 0:85b3fd62ea1a 1805 STM32F401xC || STM32F401xE || STM32F411xE || STM32F446xx || STM32F469xx || STM32F479xx || STM32F412Zx || STM32F412Rx ||
NYX 0:85b3fd62ea1a 1806 STM32F412Vx || STM32F412Cx || STM32F413xx || STM32F423xx */
NYX 0:85b3fd62ea1a 1807 #endif /* defined(HAL_PCD_MODULE_ENABLED) || defined(HAL_HCD_MODULE_ENABLED) */
NYX 0:85b3fd62ea1a 1808
NYX 0:85b3fd62ea1a 1809 /**
NYX 0:85b3fd62ea1a 1810 * @}
NYX 0:85b3fd62ea1a 1811 */
NYX 0:85b3fd62ea1a 1812
NYX 0:85b3fd62ea1a 1813 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/