Takaaki Numai
inport from local
Dependents: Hobbyking_Cheetah_0511
targets/TARGET_STM/TARGET_STM32F4/device/stm32f4xx_ll_spi.c@0:85b3fd62ea1a, 2020-03-16 (annotated)
- Committer:
- NYX
- Date:
- Mon Mar 16 06:35:48 2020 +0000
- Revision:
- 0:85b3fd62ea1a
reinport to mbed;
Who changed what in which revision?
| User | Revision | Line number | New contents of line |
|---|---|---|---|
| NYX | 0:85b3fd62ea1a | 1 | /** |
| NYX | 0:85b3fd62ea1a | 2 | ****************************************************************************** |
| NYX | 0:85b3fd62ea1a | 3 | * @file stm32f4xx_ll_spi.c |
| NYX | 0:85b3fd62ea1a | 4 | * @author MCD Application Team |
| NYX | 0:85b3fd62ea1a | 5 | * @version V1.7.1 |
| NYX | 0:85b3fd62ea1a | 6 | * @date 14-April-2017 |
| NYX | 0:85b3fd62ea1a | 7 | * @brief SPI LL module driver. |
| NYX | 0:85b3fd62ea1a | 8 | ****************************************************************************** |
| NYX | 0:85b3fd62ea1a | 9 | * @attention |
| NYX | 0:85b3fd62ea1a | 10 | * |
| NYX | 0:85b3fd62ea1a | 11 | * <h2><center>© COPYRIGHT(c) 2017 STMicroelectronics</center></h2> |
| NYX | 0:85b3fd62ea1a | 12 | * |
| NYX | 0:85b3fd62ea1a | 13 | * Redistribution and use in source and binary forms, with or without modification, |
| NYX | 0:85b3fd62ea1a | 14 | * are permitted provided that the following conditions are met: |
| NYX | 0:85b3fd62ea1a | 15 | * 1. Redistributions of source code must retain the above copyright notice, |
| NYX | 0:85b3fd62ea1a | 16 | * this list of conditions and the following disclaimer. |
| NYX | 0:85b3fd62ea1a | 17 | * 2. Redistributions in binary form must reproduce the above copyright notice, |
| NYX | 0:85b3fd62ea1a | 18 | * this list of conditions and the following disclaimer in the documentation |
| NYX | 0:85b3fd62ea1a | 19 | * and/or other materials provided with the distribution. |
| NYX | 0:85b3fd62ea1a | 20 | * 3. Neither the name of STMicroelectronics nor the names of its contributors |
| NYX | 0:85b3fd62ea1a | 21 | * may be used to endorse or promote products derived from this software |
| NYX | 0:85b3fd62ea1a | 22 | * without specific prior written permission. |
| NYX | 0:85b3fd62ea1a | 23 | * |
| NYX | 0:85b3fd62ea1a | 24 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
| NYX | 0:85b3fd62ea1a | 25 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
| NYX | 0:85b3fd62ea1a | 26 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
| NYX | 0:85b3fd62ea1a | 27 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE |
| NYX | 0:85b3fd62ea1a | 28 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
| NYX | 0:85b3fd62ea1a | 29 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR |
| NYX | 0:85b3fd62ea1a | 30 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
| NYX | 0:85b3fd62ea1a | 31 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
| NYX | 0:85b3fd62ea1a | 32 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
| NYX | 0:85b3fd62ea1a | 33 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
| NYX | 0:85b3fd62ea1a | 34 | * |
| NYX | 0:85b3fd62ea1a | 35 | ****************************************************************************** |
| NYX | 0:85b3fd62ea1a | 36 | */ |
| NYX | 0:85b3fd62ea1a | 37 | #if defined(USE_FULL_LL_DRIVER) |
| NYX | 0:85b3fd62ea1a | 38 | |
| NYX | 0:85b3fd62ea1a | 39 | /* Includes ------------------------------------------------------------------*/ |
| NYX | 0:85b3fd62ea1a | 40 | #include "stm32f4xx_ll_spi.h" |
| NYX | 0:85b3fd62ea1a | 41 | #include "stm32f4xx_ll_bus.h" |
| NYX | 0:85b3fd62ea1a | 42 | #include "stm32f4xx_ll_rcc.h" |
| NYX | 0:85b3fd62ea1a | 43 | |
| NYX | 0:85b3fd62ea1a | 44 | #ifdef USE_FULL_ASSERT |
| NYX | 0:85b3fd62ea1a | 45 | #include "stm32_assert.h" |
| NYX | 0:85b3fd62ea1a | 46 | #else |
| NYX | 0:85b3fd62ea1a | 47 | #define assert_param(expr) ((void)0U) |
| NYX | 0:85b3fd62ea1a | 48 | #endif |
| NYX | 0:85b3fd62ea1a | 49 | |
| NYX | 0:85b3fd62ea1a | 50 | /** @addtogroup STM32F4xx_LL_Driver |
| NYX | 0:85b3fd62ea1a | 51 | * @{ |
| NYX | 0:85b3fd62ea1a | 52 | */ |
| NYX | 0:85b3fd62ea1a | 53 | |
| NYX | 0:85b3fd62ea1a | 54 | #if defined (SPI1) || defined (SPI2) || defined (SPI3) || defined (SPI4) || defined (SPI5) || defined(SPI6) |
| NYX | 0:85b3fd62ea1a | 55 | |
| NYX | 0:85b3fd62ea1a | 56 | /** @addtogroup SPI_LL |
| NYX | 0:85b3fd62ea1a | 57 | * @{ |
| NYX | 0:85b3fd62ea1a | 58 | */ |
| NYX | 0:85b3fd62ea1a | 59 | |
| NYX | 0:85b3fd62ea1a | 60 | /* Private types -------------------------------------------------------------*/ |
| NYX | 0:85b3fd62ea1a | 61 | /* Private variables ---------------------------------------------------------*/ |
| NYX | 0:85b3fd62ea1a | 62 | |
| NYX | 0:85b3fd62ea1a | 63 | /* Private constants ---------------------------------------------------------*/ |
| NYX | 0:85b3fd62ea1a | 64 | /** @defgroup SPI_LL_Private_Constants SPI Private Constants |
| NYX | 0:85b3fd62ea1a | 65 | * @{ |
| NYX | 0:85b3fd62ea1a | 66 | */ |
| NYX | 0:85b3fd62ea1a | 67 | /* SPI registers Masks */ |
| NYX | 0:85b3fd62ea1a | 68 | #define SPI_CR1_CLEAR_MASK (SPI_CR1_CPHA | SPI_CR1_CPOL | SPI_CR1_MSTR | \ |
| NYX | 0:85b3fd62ea1a | 69 | SPI_CR1_BR | SPI_CR1_LSBFIRST | SPI_CR1_SSI | \ |
| NYX | 0:85b3fd62ea1a | 70 | SPI_CR1_SSM | SPI_CR1_RXONLY | SPI_CR1_DFF | \ |
| NYX | 0:85b3fd62ea1a | 71 | SPI_CR1_CRCNEXT | SPI_CR1_CRCEN | SPI_CR1_BIDIOE | \ |
| NYX | 0:85b3fd62ea1a | 72 | SPI_CR1_BIDIMODE) |
| NYX | 0:85b3fd62ea1a | 73 | /** |
| NYX | 0:85b3fd62ea1a | 74 | * @} |
| NYX | 0:85b3fd62ea1a | 75 | */ |
| NYX | 0:85b3fd62ea1a | 76 | |
| NYX | 0:85b3fd62ea1a | 77 | /* Private macros ------------------------------------------------------------*/ |
| NYX | 0:85b3fd62ea1a | 78 | /** @defgroup SPI_LL_Private_Macros SPI Private Macros |
| NYX | 0:85b3fd62ea1a | 79 | * @{ |
| NYX | 0:85b3fd62ea1a | 80 | */ |
| NYX | 0:85b3fd62ea1a | 81 | #define IS_LL_SPI_TRANSFER_DIRECTION(__VALUE__) (((__VALUE__) == LL_SPI_FULL_DUPLEX) \ |
| NYX | 0:85b3fd62ea1a | 82 | || ((__VALUE__) == LL_SPI_SIMPLEX_RX) \ |
| NYX | 0:85b3fd62ea1a | 83 | || ((__VALUE__) == LL_SPI_HALF_DUPLEX_RX) \ |
| NYX | 0:85b3fd62ea1a | 84 | || ((__VALUE__) == LL_SPI_HALF_DUPLEX_TX)) |
| NYX | 0:85b3fd62ea1a | 85 | |
| NYX | 0:85b3fd62ea1a | 86 | #define IS_LL_SPI_MODE(__VALUE__) (((__VALUE__) == LL_SPI_MODE_MASTER) \ |
| NYX | 0:85b3fd62ea1a | 87 | || ((__VALUE__) == LL_SPI_MODE_SLAVE)) |
| NYX | 0:85b3fd62ea1a | 88 | |
| NYX | 0:85b3fd62ea1a | 89 | #define IS_LL_SPI_DATAWIDTH(__VALUE__) (((__VALUE__) == LL_SPI_DATAWIDTH_8BIT) \ |
| NYX | 0:85b3fd62ea1a | 90 | || ((__VALUE__) == LL_SPI_DATAWIDTH_16BIT)) |
| NYX | 0:85b3fd62ea1a | 91 | |
| NYX | 0:85b3fd62ea1a | 92 | #define IS_LL_SPI_POLARITY(__VALUE__) (((__VALUE__) == LL_SPI_POLARITY_LOW) \ |
| NYX | 0:85b3fd62ea1a | 93 | || ((__VALUE__) == LL_SPI_POLARITY_HIGH)) |
| NYX | 0:85b3fd62ea1a | 94 | |
| NYX | 0:85b3fd62ea1a | 95 | #define IS_LL_SPI_PHASE(__VALUE__) (((__VALUE__) == LL_SPI_PHASE_1EDGE) \ |
| NYX | 0:85b3fd62ea1a | 96 | || ((__VALUE__) == LL_SPI_PHASE_2EDGE)) |
| NYX | 0:85b3fd62ea1a | 97 | |
| NYX | 0:85b3fd62ea1a | 98 | #define IS_LL_SPI_NSS(__VALUE__) (((__VALUE__) == LL_SPI_NSS_SOFT) \ |
| NYX | 0:85b3fd62ea1a | 99 | || ((__VALUE__) == LL_SPI_NSS_HARD_INPUT) \ |
| NYX | 0:85b3fd62ea1a | 100 | || ((__VALUE__) == LL_SPI_NSS_HARD_OUTPUT)) |
| NYX | 0:85b3fd62ea1a | 101 | |
| NYX | 0:85b3fd62ea1a | 102 | #define IS_LL_SPI_BAUDRATE(__VALUE__) (((__VALUE__) == LL_SPI_BAUDRATEPRESCALER_DIV2) \ |
| NYX | 0:85b3fd62ea1a | 103 | || ((__VALUE__) == LL_SPI_BAUDRATEPRESCALER_DIV4) \ |
| NYX | 0:85b3fd62ea1a | 104 | || ((__VALUE__) == LL_SPI_BAUDRATEPRESCALER_DIV8) \ |
| NYX | 0:85b3fd62ea1a | 105 | || ((__VALUE__) == LL_SPI_BAUDRATEPRESCALER_DIV16) \ |
| NYX | 0:85b3fd62ea1a | 106 | || ((__VALUE__) == LL_SPI_BAUDRATEPRESCALER_DIV32) \ |
| NYX | 0:85b3fd62ea1a | 107 | || ((__VALUE__) == LL_SPI_BAUDRATEPRESCALER_DIV64) \ |
| NYX | 0:85b3fd62ea1a | 108 | || ((__VALUE__) == LL_SPI_BAUDRATEPRESCALER_DIV128) \ |
| NYX | 0:85b3fd62ea1a | 109 | || ((__VALUE__) == LL_SPI_BAUDRATEPRESCALER_DIV256)) |
| NYX | 0:85b3fd62ea1a | 110 | |
| NYX | 0:85b3fd62ea1a | 111 | #define IS_LL_SPI_BITORDER(__VALUE__) (((__VALUE__) == LL_SPI_LSB_FIRST) \ |
| NYX | 0:85b3fd62ea1a | 112 | || ((__VALUE__) == LL_SPI_MSB_FIRST)) |
| NYX | 0:85b3fd62ea1a | 113 | |
| NYX | 0:85b3fd62ea1a | 114 | #define IS_LL_SPI_CRCCALCULATION(__VALUE__) (((__VALUE__) == LL_SPI_CRCCALCULATION_ENABLE) \ |
| NYX | 0:85b3fd62ea1a | 115 | || ((__VALUE__) == LL_SPI_CRCCALCULATION_DISABLE)) |
| NYX | 0:85b3fd62ea1a | 116 | |
| NYX | 0:85b3fd62ea1a | 117 | #define IS_LL_SPI_CRC_POLYNOMIAL(__VALUE__) ((__VALUE__) >= 0x1U) |
| NYX | 0:85b3fd62ea1a | 118 | |
| NYX | 0:85b3fd62ea1a | 119 | /** |
| NYX | 0:85b3fd62ea1a | 120 | * @} |
| NYX | 0:85b3fd62ea1a | 121 | */ |
| NYX | 0:85b3fd62ea1a | 122 | |
| NYX | 0:85b3fd62ea1a | 123 | /* Private function prototypes -----------------------------------------------*/ |
| NYX | 0:85b3fd62ea1a | 124 | |
| NYX | 0:85b3fd62ea1a | 125 | /* Exported functions --------------------------------------------------------*/ |
| NYX | 0:85b3fd62ea1a | 126 | /** @addtogroup SPI_LL_Exported_Functions |
| NYX | 0:85b3fd62ea1a | 127 | * @{ |
| NYX | 0:85b3fd62ea1a | 128 | */ |
| NYX | 0:85b3fd62ea1a | 129 | |
| NYX | 0:85b3fd62ea1a | 130 | /** @addtogroup SPI_LL_EF_Init |
| NYX | 0:85b3fd62ea1a | 131 | * @{ |
| NYX | 0:85b3fd62ea1a | 132 | */ |
| NYX | 0:85b3fd62ea1a | 133 | |
| NYX | 0:85b3fd62ea1a | 134 | /** |
| NYX | 0:85b3fd62ea1a | 135 | * @brief De-initialize the SPI registers to their default reset values. |
| NYX | 0:85b3fd62ea1a | 136 | * @param SPIx SPI Instance |
| NYX | 0:85b3fd62ea1a | 137 | * @retval An ErrorStatus enumeration value: |
| NYX | 0:85b3fd62ea1a | 138 | * - SUCCESS: SPI registers are de-initialized |
| NYX | 0:85b3fd62ea1a | 139 | * - ERROR: SPI registers are not de-initialized |
| NYX | 0:85b3fd62ea1a | 140 | */ |
| NYX | 0:85b3fd62ea1a | 141 | ErrorStatus LL_SPI_DeInit(SPI_TypeDef *SPIx) |
| NYX | 0:85b3fd62ea1a | 142 | { |
| NYX | 0:85b3fd62ea1a | 143 | ErrorStatus status = ERROR; |
| NYX | 0:85b3fd62ea1a | 144 | |
| NYX | 0:85b3fd62ea1a | 145 | /* Check the parameters */ |
| NYX | 0:85b3fd62ea1a | 146 | assert_param(IS_SPI_ALL_INSTANCE(SPIx)); |
| NYX | 0:85b3fd62ea1a | 147 | |
| NYX | 0:85b3fd62ea1a | 148 | #if defined(SPI1) |
| NYX | 0:85b3fd62ea1a | 149 | if (SPIx == SPI1) |
| NYX | 0:85b3fd62ea1a | 150 | { |
| NYX | 0:85b3fd62ea1a | 151 | /* Force reset of SPI clock */ |
| NYX | 0:85b3fd62ea1a | 152 | LL_APB2_GRP1_ForceReset(LL_APB2_GRP1_PERIPH_SPI1); |
| NYX | 0:85b3fd62ea1a | 153 | |
| NYX | 0:85b3fd62ea1a | 154 | /* Release reset of SPI clock */ |
| NYX | 0:85b3fd62ea1a | 155 | LL_APB2_GRP1_ReleaseReset(LL_APB2_GRP1_PERIPH_SPI1); |
| NYX | 0:85b3fd62ea1a | 156 | |
| NYX | 0:85b3fd62ea1a | 157 | status = SUCCESS; |
| NYX | 0:85b3fd62ea1a | 158 | } |
| NYX | 0:85b3fd62ea1a | 159 | #endif /* SPI1 */ |
| NYX | 0:85b3fd62ea1a | 160 | #if defined(SPI2) |
| NYX | 0:85b3fd62ea1a | 161 | if (SPIx == SPI2) |
| NYX | 0:85b3fd62ea1a | 162 | { |
| NYX | 0:85b3fd62ea1a | 163 | /* Force reset of SPI clock */ |
| NYX | 0:85b3fd62ea1a | 164 | LL_APB1_GRP1_ForceReset(LL_APB1_GRP1_PERIPH_SPI2); |
| NYX | 0:85b3fd62ea1a | 165 | |
| NYX | 0:85b3fd62ea1a | 166 | /* Release reset of SPI clock */ |
| NYX | 0:85b3fd62ea1a | 167 | LL_APB1_GRP1_ReleaseReset(LL_APB1_GRP1_PERIPH_SPI2); |
| NYX | 0:85b3fd62ea1a | 168 | |
| NYX | 0:85b3fd62ea1a | 169 | status = SUCCESS; |
| NYX | 0:85b3fd62ea1a | 170 | } |
| NYX | 0:85b3fd62ea1a | 171 | #endif /* SPI2 */ |
| NYX | 0:85b3fd62ea1a | 172 | #if defined(SPI3) |
| NYX | 0:85b3fd62ea1a | 173 | if (SPIx == SPI3) |
| NYX | 0:85b3fd62ea1a | 174 | { |
| NYX | 0:85b3fd62ea1a | 175 | /* Force reset of SPI clock */ |
| NYX | 0:85b3fd62ea1a | 176 | LL_APB1_GRP1_ForceReset(LL_APB1_GRP1_PERIPH_SPI3); |
| NYX | 0:85b3fd62ea1a | 177 | |
| NYX | 0:85b3fd62ea1a | 178 | /* Release reset of SPI clock */ |
| NYX | 0:85b3fd62ea1a | 179 | LL_APB1_GRP1_ReleaseReset(LL_APB1_GRP1_PERIPH_SPI3); |
| NYX | 0:85b3fd62ea1a | 180 | |
| NYX | 0:85b3fd62ea1a | 181 | status = SUCCESS; |
| NYX | 0:85b3fd62ea1a | 182 | } |
| NYX | 0:85b3fd62ea1a | 183 | #endif /* SPI3 */ |
| NYX | 0:85b3fd62ea1a | 184 | #if defined(SPI4) |
| NYX | 0:85b3fd62ea1a | 185 | if (SPIx == SPI4) |
| NYX | 0:85b3fd62ea1a | 186 | { |
| NYX | 0:85b3fd62ea1a | 187 | /* Force reset of SPI clock */ |
| NYX | 0:85b3fd62ea1a | 188 | LL_APB2_GRP1_ForceReset(LL_APB2_GRP1_PERIPH_SPI4); |
| NYX | 0:85b3fd62ea1a | 189 | |
| NYX | 0:85b3fd62ea1a | 190 | /* Release reset of SPI clock */ |
| NYX | 0:85b3fd62ea1a | 191 | LL_APB2_GRP1_ReleaseReset(LL_APB2_GRP1_PERIPH_SPI4); |
| NYX | 0:85b3fd62ea1a | 192 | |
| NYX | 0:85b3fd62ea1a | 193 | status = SUCCESS; |
| NYX | 0:85b3fd62ea1a | 194 | } |
| NYX | 0:85b3fd62ea1a | 195 | #endif /* SPI4 */ |
| NYX | 0:85b3fd62ea1a | 196 | #if defined(SPI5) |
| NYX | 0:85b3fd62ea1a | 197 | if (SPIx == SPI5) |
| NYX | 0:85b3fd62ea1a | 198 | { |
| NYX | 0:85b3fd62ea1a | 199 | /* Force reset of SPI clock */ |
| NYX | 0:85b3fd62ea1a | 200 | LL_APB2_GRP1_ForceReset(LL_APB2_GRP1_PERIPH_SPI5); |
| NYX | 0:85b3fd62ea1a | 201 | |
| NYX | 0:85b3fd62ea1a | 202 | /* Release reset of SPI clock */ |
| NYX | 0:85b3fd62ea1a | 203 | LL_APB2_GRP1_ReleaseReset(LL_APB2_GRP1_PERIPH_SPI5); |
| NYX | 0:85b3fd62ea1a | 204 | |
| NYX | 0:85b3fd62ea1a | 205 | status = SUCCESS; |
| NYX | 0:85b3fd62ea1a | 206 | } |
| NYX | 0:85b3fd62ea1a | 207 | #endif /* SPI5 */ |
| NYX | 0:85b3fd62ea1a | 208 | #if defined(SPI6) |
| NYX | 0:85b3fd62ea1a | 209 | if (SPIx == SPI6) |
| NYX | 0:85b3fd62ea1a | 210 | { |
| NYX | 0:85b3fd62ea1a | 211 | /* Force reset of SPI clock */ |
| NYX | 0:85b3fd62ea1a | 212 | LL_APB2_GRP1_ForceReset(LL_APB2_GRP1_PERIPH_SPI6); |
| NYX | 0:85b3fd62ea1a | 213 | |
| NYX | 0:85b3fd62ea1a | 214 | /* Release reset of SPI clock */ |
| NYX | 0:85b3fd62ea1a | 215 | LL_APB2_GRP1_ReleaseReset(LL_APB2_GRP1_PERIPH_SPI6); |
| NYX | 0:85b3fd62ea1a | 216 | |
| NYX | 0:85b3fd62ea1a | 217 | status = SUCCESS; |
| NYX | 0:85b3fd62ea1a | 218 | } |
| NYX | 0:85b3fd62ea1a | 219 | #endif /* SPI6 */ |
| NYX | 0:85b3fd62ea1a | 220 | |
| NYX | 0:85b3fd62ea1a | 221 | return status; |
| NYX | 0:85b3fd62ea1a | 222 | } |
| NYX | 0:85b3fd62ea1a | 223 | |
| NYX | 0:85b3fd62ea1a | 224 | /** |
| NYX | 0:85b3fd62ea1a | 225 | * @brief Initialize the SPI registers according to the specified parameters in SPI_InitStruct. |
| NYX | 0:85b3fd62ea1a | 226 | * @note As some bits in SPI configuration registers can only be written when the SPI is disabled (SPI_CR1_SPE bit =0), |
| NYX | 0:85b3fd62ea1a | 227 | * SPI IP should be in disabled state prior calling this function. Otherwise, ERROR result will be returned. |
| NYX | 0:85b3fd62ea1a | 228 | * @param SPIx SPI Instance |
| NYX | 0:85b3fd62ea1a | 229 | * @param SPI_InitStruct pointer to a @ref LL_SPI_InitTypeDef structure |
| NYX | 0:85b3fd62ea1a | 230 | * @retval An ErrorStatus enumeration value. (Return always SUCCESS) |
| NYX | 0:85b3fd62ea1a | 231 | */ |
| NYX | 0:85b3fd62ea1a | 232 | ErrorStatus LL_SPI_Init(SPI_TypeDef *SPIx, LL_SPI_InitTypeDef *SPI_InitStruct) |
| NYX | 0:85b3fd62ea1a | 233 | { |
| NYX | 0:85b3fd62ea1a | 234 | ErrorStatus status = ERROR; |
| NYX | 0:85b3fd62ea1a | 235 | |
| NYX | 0:85b3fd62ea1a | 236 | /* Check the SPI Instance SPIx*/ |
| NYX | 0:85b3fd62ea1a | 237 | assert_param(IS_SPI_ALL_INSTANCE(SPIx)); |
| NYX | 0:85b3fd62ea1a | 238 | |
| NYX | 0:85b3fd62ea1a | 239 | /* Check the SPI parameters from SPI_InitStruct*/ |
| NYX | 0:85b3fd62ea1a | 240 | assert_param(IS_LL_SPI_TRANSFER_DIRECTION(SPI_InitStruct->TransferDirection)); |
| NYX | 0:85b3fd62ea1a | 241 | assert_param(IS_LL_SPI_MODE(SPI_InitStruct->Mode)); |
| NYX | 0:85b3fd62ea1a | 242 | assert_param(IS_LL_SPI_DATAWIDTH(SPI_InitStruct->DataWidth)); |
| NYX | 0:85b3fd62ea1a | 243 | assert_param(IS_LL_SPI_POLARITY(SPI_InitStruct->ClockPolarity)); |
| NYX | 0:85b3fd62ea1a | 244 | assert_param(IS_LL_SPI_PHASE(SPI_InitStruct->ClockPhase)); |
| NYX | 0:85b3fd62ea1a | 245 | assert_param(IS_LL_SPI_NSS(SPI_InitStruct->NSS)); |
| NYX | 0:85b3fd62ea1a | 246 | assert_param(IS_LL_SPI_BAUDRATE(SPI_InitStruct->BaudRate)); |
| NYX | 0:85b3fd62ea1a | 247 | assert_param(IS_LL_SPI_BITORDER(SPI_InitStruct->BitOrder)); |
| NYX | 0:85b3fd62ea1a | 248 | assert_param(IS_LL_SPI_CRCCALCULATION(SPI_InitStruct->CRCCalculation)); |
| NYX | 0:85b3fd62ea1a | 249 | |
| NYX | 0:85b3fd62ea1a | 250 | if (LL_SPI_IsEnabled(SPIx) == 0x00000000U) |
| NYX | 0:85b3fd62ea1a | 251 | { |
| NYX | 0:85b3fd62ea1a | 252 | /*---------------------------- SPIx CR1 Configuration ------------------------ |
| NYX | 0:85b3fd62ea1a | 253 | * Configure SPIx CR1 with parameters: |
| NYX | 0:85b3fd62ea1a | 254 | * - TransferDirection: SPI_CR1_BIDIMODE, SPI_CR1_BIDIOE and SPI_CR1_RXONLY bits |
| NYX | 0:85b3fd62ea1a | 255 | * - Master/Slave Mode: SPI_CR1_MSTR bit |
| NYX | 0:85b3fd62ea1a | 256 | * - DataWidth: SPI_CR1_DFF bit |
| NYX | 0:85b3fd62ea1a | 257 | * - ClockPolarity: SPI_CR1_CPOL bit |
| NYX | 0:85b3fd62ea1a | 258 | * - ClockPhase: SPI_CR1_CPHA bit |
| NYX | 0:85b3fd62ea1a | 259 | * - NSS management: SPI_CR1_SSM bit |
| NYX | 0:85b3fd62ea1a | 260 | * - BaudRate prescaler: SPI_CR1_BR[2:0] bits |
| NYX | 0:85b3fd62ea1a | 261 | * - BitOrder: SPI_CR1_LSBFIRST bit |
| NYX | 0:85b3fd62ea1a | 262 | * - CRCCalculation: SPI_CR1_CRCEN bit |
| NYX | 0:85b3fd62ea1a | 263 | */ |
| NYX | 0:85b3fd62ea1a | 264 | MODIFY_REG(SPIx->CR1, |
| NYX | 0:85b3fd62ea1a | 265 | SPI_CR1_CLEAR_MASK, |
| NYX | 0:85b3fd62ea1a | 266 | SPI_InitStruct->TransferDirection | SPI_InitStruct->Mode | SPI_InitStruct->DataWidth | |
| NYX | 0:85b3fd62ea1a | 267 | SPI_InitStruct->ClockPolarity | SPI_InitStruct->ClockPhase | |
| NYX | 0:85b3fd62ea1a | 268 | SPI_InitStruct->NSS | SPI_InitStruct->BaudRate | |
| NYX | 0:85b3fd62ea1a | 269 | SPI_InitStruct->BitOrder | SPI_InitStruct->CRCCalculation); |
| NYX | 0:85b3fd62ea1a | 270 | |
| NYX | 0:85b3fd62ea1a | 271 | /*---------------------------- SPIx CR2 Configuration ------------------------ |
| NYX | 0:85b3fd62ea1a | 272 | * Configure SPIx CR2 with parameters: |
| NYX | 0:85b3fd62ea1a | 273 | * - NSS management: SSOE bit |
| NYX | 0:85b3fd62ea1a | 274 | */ |
| NYX | 0:85b3fd62ea1a | 275 | MODIFY_REG(SPIx->CR2, SPI_CR2_SSOE, (SPI_InitStruct->NSS >> 16U)); |
| NYX | 0:85b3fd62ea1a | 276 | |
| NYX | 0:85b3fd62ea1a | 277 | /*---------------------------- SPIx CRCPR Configuration ---------------------- |
| NYX | 0:85b3fd62ea1a | 278 | * Configure SPIx CRCPR with parameters: |
| NYX | 0:85b3fd62ea1a | 279 | * - CRCPoly: CRCPOLY[15:0] bits |
| NYX | 0:85b3fd62ea1a | 280 | */ |
| NYX | 0:85b3fd62ea1a | 281 | if (SPI_InitStruct->CRCCalculation == LL_SPI_CRCCALCULATION_ENABLE) |
| NYX | 0:85b3fd62ea1a | 282 | { |
| NYX | 0:85b3fd62ea1a | 283 | assert_param(IS_LL_SPI_CRC_POLYNOMIAL(SPI_InitStruct->CRCPoly)); |
| NYX | 0:85b3fd62ea1a | 284 | LL_SPI_SetCRCPolynomial(SPIx, SPI_InitStruct->CRCPoly); |
| NYX | 0:85b3fd62ea1a | 285 | } |
| NYX | 0:85b3fd62ea1a | 286 | status = SUCCESS; |
| NYX | 0:85b3fd62ea1a | 287 | } |
| NYX | 0:85b3fd62ea1a | 288 | |
| NYX | 0:85b3fd62ea1a | 289 | /* Activate the SPI mode (Reset I2SMOD bit in I2SCFGR register) */ |
| NYX | 0:85b3fd62ea1a | 290 | CLEAR_BIT(SPIx->I2SCFGR, SPI_I2SCFGR_I2SMOD); |
| NYX | 0:85b3fd62ea1a | 291 | return status; |
| NYX | 0:85b3fd62ea1a | 292 | } |
| NYX | 0:85b3fd62ea1a | 293 | |
| NYX | 0:85b3fd62ea1a | 294 | /** |
| NYX | 0:85b3fd62ea1a | 295 | * @brief Set each @ref LL_SPI_InitTypeDef field to default value. |
| NYX | 0:85b3fd62ea1a | 296 | * @param SPI_InitStruct pointer to a @ref LL_SPI_InitTypeDef structure |
| NYX | 0:85b3fd62ea1a | 297 | * whose fields will be set to default values. |
| NYX | 0:85b3fd62ea1a | 298 | * @retval None |
| NYX | 0:85b3fd62ea1a | 299 | */ |
| NYX | 0:85b3fd62ea1a | 300 | void LL_SPI_StructInit(LL_SPI_InitTypeDef *SPI_InitStruct) |
| NYX | 0:85b3fd62ea1a | 301 | { |
| NYX | 0:85b3fd62ea1a | 302 | /* Set SPI_InitStruct fields to default values */ |
| NYX | 0:85b3fd62ea1a | 303 | SPI_InitStruct->TransferDirection = LL_SPI_FULL_DUPLEX; |
| NYX | 0:85b3fd62ea1a | 304 | SPI_InitStruct->Mode = LL_SPI_MODE_SLAVE; |
| NYX | 0:85b3fd62ea1a | 305 | SPI_InitStruct->DataWidth = LL_SPI_DATAWIDTH_8BIT; |
| NYX | 0:85b3fd62ea1a | 306 | SPI_InitStruct->ClockPolarity = LL_SPI_POLARITY_LOW; |
| NYX | 0:85b3fd62ea1a | 307 | SPI_InitStruct->ClockPhase = LL_SPI_PHASE_1EDGE; |
| NYX | 0:85b3fd62ea1a | 308 | SPI_InitStruct->NSS = LL_SPI_NSS_HARD_INPUT; |
| NYX | 0:85b3fd62ea1a | 309 | SPI_InitStruct->BaudRate = LL_SPI_BAUDRATEPRESCALER_DIV2; |
| NYX | 0:85b3fd62ea1a | 310 | SPI_InitStruct->BitOrder = LL_SPI_MSB_FIRST; |
| NYX | 0:85b3fd62ea1a | 311 | SPI_InitStruct->CRCCalculation = LL_SPI_CRCCALCULATION_DISABLE; |
| NYX | 0:85b3fd62ea1a | 312 | SPI_InitStruct->CRCPoly = 7U; |
| NYX | 0:85b3fd62ea1a | 313 | } |
| NYX | 0:85b3fd62ea1a | 314 | |
| NYX | 0:85b3fd62ea1a | 315 | /** |
| NYX | 0:85b3fd62ea1a | 316 | * @} |
| NYX | 0:85b3fd62ea1a | 317 | */ |
| NYX | 0:85b3fd62ea1a | 318 | |
| NYX | 0:85b3fd62ea1a | 319 | /** |
| NYX | 0:85b3fd62ea1a | 320 | * @} |
| NYX | 0:85b3fd62ea1a | 321 | */ |
| NYX | 0:85b3fd62ea1a | 322 | |
| NYX | 0:85b3fd62ea1a | 323 | /** |
| NYX | 0:85b3fd62ea1a | 324 | * @} |
| NYX | 0:85b3fd62ea1a | 325 | */ |
| NYX | 0:85b3fd62ea1a | 326 | |
| NYX | 0:85b3fd62ea1a | 327 | /** @addtogroup I2S_LL |
| NYX | 0:85b3fd62ea1a | 328 | * @{ |
| NYX | 0:85b3fd62ea1a | 329 | */ |
| NYX | 0:85b3fd62ea1a | 330 | |
| NYX | 0:85b3fd62ea1a | 331 | /* Private types -------------------------------------------------------------*/ |
| NYX | 0:85b3fd62ea1a | 332 | /* Private variables ---------------------------------------------------------*/ |
| NYX | 0:85b3fd62ea1a | 333 | /* Private constants ---------------------------------------------------------*/ |
| NYX | 0:85b3fd62ea1a | 334 | /** @defgroup I2S_LL_Private_Constants I2S Private Constants |
| NYX | 0:85b3fd62ea1a | 335 | * @{ |
| NYX | 0:85b3fd62ea1a | 336 | */ |
| NYX | 0:85b3fd62ea1a | 337 | /* I2S registers Masks */ |
| NYX | 0:85b3fd62ea1a | 338 | #define I2S_I2SCFGR_CLEAR_MASK (SPI_I2SCFGR_CHLEN | SPI_I2SCFGR_DATLEN | \ |
| NYX | 0:85b3fd62ea1a | 339 | SPI_I2SCFGR_CKPOL | SPI_I2SCFGR_I2SSTD | \ |
| NYX | 0:85b3fd62ea1a | 340 | SPI_I2SCFGR_I2SCFG | SPI_I2SCFGR_I2SMOD ) |
| NYX | 0:85b3fd62ea1a | 341 | |
| NYX | 0:85b3fd62ea1a | 342 | #define I2S_I2SPR_CLEAR_MASK 0x0002U |
| NYX | 0:85b3fd62ea1a | 343 | /** |
| NYX | 0:85b3fd62ea1a | 344 | * @} |
| NYX | 0:85b3fd62ea1a | 345 | */ |
| NYX | 0:85b3fd62ea1a | 346 | /* Private macros ------------------------------------------------------------*/ |
| NYX | 0:85b3fd62ea1a | 347 | /** @defgroup I2S_LL_Private_Macros I2S Private Macros |
| NYX | 0:85b3fd62ea1a | 348 | * @{ |
| NYX | 0:85b3fd62ea1a | 349 | */ |
| NYX | 0:85b3fd62ea1a | 350 | |
| NYX | 0:85b3fd62ea1a | 351 | #define IS_LL_I2S_DATAFORMAT(__VALUE__) (((__VALUE__) == LL_I2S_DATAFORMAT_16B) \ |
| NYX | 0:85b3fd62ea1a | 352 | || ((__VALUE__) == LL_I2S_DATAFORMAT_16B_EXTENDED) \ |
| NYX | 0:85b3fd62ea1a | 353 | || ((__VALUE__) == LL_I2S_DATAFORMAT_24B) \ |
| NYX | 0:85b3fd62ea1a | 354 | || ((__VALUE__) == LL_I2S_DATAFORMAT_32B)) |
| NYX | 0:85b3fd62ea1a | 355 | |
| NYX | 0:85b3fd62ea1a | 356 | #define IS_LL_I2S_CPOL(__VALUE__) (((__VALUE__) == LL_I2S_POLARITY_LOW) \ |
| NYX | 0:85b3fd62ea1a | 357 | || ((__VALUE__) == LL_I2S_POLARITY_HIGH)) |
| NYX | 0:85b3fd62ea1a | 358 | |
| NYX | 0:85b3fd62ea1a | 359 | #define IS_LL_I2S_STANDARD(__VALUE__) (((__VALUE__) == LL_I2S_STANDARD_PHILIPS) \ |
| NYX | 0:85b3fd62ea1a | 360 | || ((__VALUE__) == LL_I2S_STANDARD_MSB) \ |
| NYX | 0:85b3fd62ea1a | 361 | || ((__VALUE__) == LL_I2S_STANDARD_LSB) \ |
| NYX | 0:85b3fd62ea1a | 362 | || ((__VALUE__) == LL_I2S_STANDARD_PCM_SHORT) \ |
| NYX | 0:85b3fd62ea1a | 363 | || ((__VALUE__) == LL_I2S_STANDARD_PCM_LONG)) |
| NYX | 0:85b3fd62ea1a | 364 | |
| NYX | 0:85b3fd62ea1a | 365 | #define IS_LL_I2S_MODE(__VALUE__) (((__VALUE__) == LL_I2S_MODE_SLAVE_TX) \ |
| NYX | 0:85b3fd62ea1a | 366 | || ((__VALUE__) == LL_I2S_MODE_SLAVE_RX) \ |
| NYX | 0:85b3fd62ea1a | 367 | || ((__VALUE__) == LL_I2S_MODE_MASTER_TX) \ |
| NYX | 0:85b3fd62ea1a | 368 | || ((__VALUE__) == LL_I2S_MODE_MASTER_RX)) |
| NYX | 0:85b3fd62ea1a | 369 | |
| NYX | 0:85b3fd62ea1a | 370 | #define IS_LL_I2S_MCLK_OUTPUT(__VALUE__) (((__VALUE__) == LL_I2S_MCLK_OUTPUT_ENABLE) \ |
| NYX | 0:85b3fd62ea1a | 371 | || ((__VALUE__) == LL_I2S_MCLK_OUTPUT_DISABLE)) |
| NYX | 0:85b3fd62ea1a | 372 | |
| NYX | 0:85b3fd62ea1a | 373 | #define IS_LL_I2S_AUDIO_FREQ(__VALUE__) ((((__VALUE__) >= LL_I2S_AUDIOFREQ_8K) \ |
| NYX | 0:85b3fd62ea1a | 374 | && ((__VALUE__) <= LL_I2S_AUDIOFREQ_192K)) \ |
| NYX | 0:85b3fd62ea1a | 375 | || ((__VALUE__) == LL_I2S_AUDIOFREQ_DEFAULT)) |
| NYX | 0:85b3fd62ea1a | 376 | |
| NYX | 0:85b3fd62ea1a | 377 | #define IS_LL_I2S_PRESCALER_LINEAR(__VALUE__) ((__VALUE__) >= 0x2U) |
| NYX | 0:85b3fd62ea1a | 378 | |
| NYX | 0:85b3fd62ea1a | 379 | #define IS_LL_I2S_PRESCALER_PARITY(__VALUE__) (((__VALUE__) == LL_I2S_PRESCALER_PARITY_EVEN) \ |
| NYX | 0:85b3fd62ea1a | 380 | || ((__VALUE__) == LL_I2S_PRESCALER_PARITY_ODD)) |
| NYX | 0:85b3fd62ea1a | 381 | /** |
| NYX | 0:85b3fd62ea1a | 382 | * @} |
| NYX | 0:85b3fd62ea1a | 383 | */ |
| NYX | 0:85b3fd62ea1a | 384 | |
| NYX | 0:85b3fd62ea1a | 385 | /* Private function prototypes -----------------------------------------------*/ |
| NYX | 0:85b3fd62ea1a | 386 | |
| NYX | 0:85b3fd62ea1a | 387 | /* Exported functions --------------------------------------------------------*/ |
| NYX | 0:85b3fd62ea1a | 388 | /** @addtogroup I2S_LL_Exported_Functions |
| NYX | 0:85b3fd62ea1a | 389 | * @{ |
| NYX | 0:85b3fd62ea1a | 390 | */ |
| NYX | 0:85b3fd62ea1a | 391 | |
| NYX | 0:85b3fd62ea1a | 392 | /** @addtogroup I2S_LL_EF_Init |
| NYX | 0:85b3fd62ea1a | 393 | * @{ |
| NYX | 0:85b3fd62ea1a | 394 | */ |
| NYX | 0:85b3fd62ea1a | 395 | |
| NYX | 0:85b3fd62ea1a | 396 | /** |
| NYX | 0:85b3fd62ea1a | 397 | * @brief De-initialize the SPI/I2S registers to their default reset values. |
| NYX | 0:85b3fd62ea1a | 398 | * @param SPIx SPI Instance |
| NYX | 0:85b3fd62ea1a | 399 | * @retval An ErrorStatus enumeration value: |
| NYX | 0:85b3fd62ea1a | 400 | * - SUCCESS: SPI registers are de-initialized |
| NYX | 0:85b3fd62ea1a | 401 | * - ERROR: SPI registers are not de-initialized |
| NYX | 0:85b3fd62ea1a | 402 | */ |
| NYX | 0:85b3fd62ea1a | 403 | ErrorStatus LL_I2S_DeInit(SPI_TypeDef *SPIx) |
| NYX | 0:85b3fd62ea1a | 404 | { |
| NYX | 0:85b3fd62ea1a | 405 | return LL_SPI_DeInit(SPIx); |
| NYX | 0:85b3fd62ea1a | 406 | } |
| NYX | 0:85b3fd62ea1a | 407 | |
| NYX | 0:85b3fd62ea1a | 408 | /** |
| NYX | 0:85b3fd62ea1a | 409 | * @brief Initializes the SPI/I2S registers according to the specified parameters in I2S_InitStruct. |
| NYX | 0:85b3fd62ea1a | 410 | * @note As some bits in SPI configuration registers can only be written when the SPI is disabled (SPI_CR1_SPE bit =0), |
| NYX | 0:85b3fd62ea1a | 411 | * SPI IP should be in disabled state prior calling this function. Otherwise, ERROR result will be returned. |
| NYX | 0:85b3fd62ea1a | 412 | * @param SPIx SPI Instance |
| NYX | 0:85b3fd62ea1a | 413 | * @param I2S_InitStruct pointer to a @ref LL_I2S_InitTypeDef structure |
| NYX | 0:85b3fd62ea1a | 414 | * @retval An ErrorStatus enumeration value: |
| NYX | 0:85b3fd62ea1a | 415 | * - SUCCESS: SPI registers are Initialized |
| NYX | 0:85b3fd62ea1a | 416 | * - ERROR: SPI registers are not Initialized |
| NYX | 0:85b3fd62ea1a | 417 | */ |
| NYX | 0:85b3fd62ea1a | 418 | ErrorStatus LL_I2S_Init(SPI_TypeDef *SPIx, LL_I2S_InitTypeDef *I2S_InitStruct) |
| NYX | 0:85b3fd62ea1a | 419 | { |
| NYX | 0:85b3fd62ea1a | 420 | uint16_t i2sdiv = 2U, i2sodd = 0U, packetlength = 1U; |
| NYX | 0:85b3fd62ea1a | 421 | uint32_t tmp = 0U; |
| NYX | 0:85b3fd62ea1a | 422 | uint32_t sourceclock = 0U; |
| NYX | 0:85b3fd62ea1a | 423 | ErrorStatus status = ERROR; |
| NYX | 0:85b3fd62ea1a | 424 | |
| NYX | 0:85b3fd62ea1a | 425 | /* Check the I2S parameters */ |
| NYX | 0:85b3fd62ea1a | 426 | assert_param(IS_I2S_ALL_INSTANCE(SPIx)); |
| NYX | 0:85b3fd62ea1a | 427 | assert_param(IS_LL_I2S_MODE(I2S_InitStruct->Mode)); |
| NYX | 0:85b3fd62ea1a | 428 | assert_param(IS_LL_I2S_STANDARD(I2S_InitStruct->Standard)); |
| NYX | 0:85b3fd62ea1a | 429 | assert_param(IS_LL_I2S_DATAFORMAT(I2S_InitStruct->DataFormat)); |
| NYX | 0:85b3fd62ea1a | 430 | assert_param(IS_LL_I2S_MCLK_OUTPUT(I2S_InitStruct->MCLKOutput)); |
| NYX | 0:85b3fd62ea1a | 431 | assert_param(IS_LL_I2S_AUDIO_FREQ(I2S_InitStruct->AudioFreq)); |
| NYX | 0:85b3fd62ea1a | 432 | assert_param(IS_LL_I2S_CPOL(I2S_InitStruct->ClockPolarity)); |
| NYX | 0:85b3fd62ea1a | 433 | |
| NYX | 0:85b3fd62ea1a | 434 | if (LL_I2S_IsEnabled(SPIx) == 0x00000000U) |
| NYX | 0:85b3fd62ea1a | 435 | { |
| NYX | 0:85b3fd62ea1a | 436 | /*---------------------------- SPIx I2SCFGR Configuration -------------------- |
| NYX | 0:85b3fd62ea1a | 437 | * Configure SPIx I2SCFGR with parameters: |
| NYX | 0:85b3fd62ea1a | 438 | * - Mode: SPI_I2SCFGR_I2SCFG[1:0] bit |
| NYX | 0:85b3fd62ea1a | 439 | * - Standard: SPI_I2SCFGR_I2SSTD[1:0] and SPI_I2SCFGR_PCMSYNC bits |
| NYX | 0:85b3fd62ea1a | 440 | * - DataFormat: SPI_I2SCFGR_CHLEN and SPI_I2SCFGR_DATLEN bits |
| NYX | 0:85b3fd62ea1a | 441 | * - ClockPolarity: SPI_I2SCFGR_CKPOL bit |
| NYX | 0:85b3fd62ea1a | 442 | */ |
| NYX | 0:85b3fd62ea1a | 443 | |
| NYX | 0:85b3fd62ea1a | 444 | /* Write to SPIx I2SCFGR */ |
| NYX | 0:85b3fd62ea1a | 445 | MODIFY_REG(SPIx->I2SCFGR, |
| NYX | 0:85b3fd62ea1a | 446 | I2S_I2SCFGR_CLEAR_MASK, |
| NYX | 0:85b3fd62ea1a | 447 | I2S_InitStruct->Mode | I2S_InitStruct->Standard | |
| NYX | 0:85b3fd62ea1a | 448 | I2S_InitStruct->DataFormat | I2S_InitStruct->ClockPolarity | |
| NYX | 0:85b3fd62ea1a | 449 | SPI_I2SCFGR_I2SMOD); |
| NYX | 0:85b3fd62ea1a | 450 | |
| NYX | 0:85b3fd62ea1a | 451 | /*---------------------------- SPIx I2SPR Configuration ---------------------- |
| NYX | 0:85b3fd62ea1a | 452 | * Configure SPIx I2SPR with parameters: |
| NYX | 0:85b3fd62ea1a | 453 | * - MCLKOutput: SPI_I2SPR_MCKOE bit |
| NYX | 0:85b3fd62ea1a | 454 | * - AudioFreq: SPI_I2SPR_I2SDIV[7:0] and SPI_I2SPR_ODD bits |
| NYX | 0:85b3fd62ea1a | 455 | */ |
| NYX | 0:85b3fd62ea1a | 456 | |
| NYX | 0:85b3fd62ea1a | 457 | /* If the requested audio frequency is not the default, compute the prescaler (i2sodd, i2sdiv) |
| NYX | 0:85b3fd62ea1a | 458 | * else, default values are used: i2sodd = 0U, i2sdiv = 2U. |
| NYX | 0:85b3fd62ea1a | 459 | */ |
| NYX | 0:85b3fd62ea1a | 460 | if (I2S_InitStruct->AudioFreq != LL_I2S_AUDIOFREQ_DEFAULT) |
| NYX | 0:85b3fd62ea1a | 461 | { |
| NYX | 0:85b3fd62ea1a | 462 | /* Check the frame length (For the Prescaler computing) |
| NYX | 0:85b3fd62ea1a | 463 | * Default value: LL_I2S_DATAFORMAT_16B (packetlength = 1U). |
| NYX | 0:85b3fd62ea1a | 464 | */ |
| NYX | 0:85b3fd62ea1a | 465 | if (I2S_InitStruct->DataFormat != LL_I2S_DATAFORMAT_16B) |
| NYX | 0:85b3fd62ea1a | 466 | { |
| NYX | 0:85b3fd62ea1a | 467 | /* Packet length is 32 bits */ |
| NYX | 0:85b3fd62ea1a | 468 | packetlength = 2U; |
| NYX | 0:85b3fd62ea1a | 469 | } |
| NYX | 0:85b3fd62ea1a | 470 | |
| NYX | 0:85b3fd62ea1a | 471 | /* If an external I2S clock has to be used, the specific define should be set |
| NYX | 0:85b3fd62ea1a | 472 | in the project configuration or in the stm32f4xx_ll_rcc.h file */ |
| NYX | 0:85b3fd62ea1a | 473 | /* Get the I2S source clock value */ |
| NYX | 0:85b3fd62ea1a | 474 | sourceclock = LL_RCC_GetI2SClockFreq(LL_RCC_I2S1_CLKSOURCE); |
| NYX | 0:85b3fd62ea1a | 475 | |
| NYX | 0:85b3fd62ea1a | 476 | /* Compute the Real divider depending on the MCLK output state with a floating point */ |
| NYX | 0:85b3fd62ea1a | 477 | if (I2S_InitStruct->MCLKOutput == LL_I2S_MCLK_OUTPUT_ENABLE) |
| NYX | 0:85b3fd62ea1a | 478 | { |
| NYX | 0:85b3fd62ea1a | 479 | /* MCLK output is enabled */ |
| NYX | 0:85b3fd62ea1a | 480 | tmp = (uint16_t)(((((sourceclock / 256U) * 10U) / I2S_InitStruct->AudioFreq)) + 5U); |
| NYX | 0:85b3fd62ea1a | 481 | } |
| NYX | 0:85b3fd62ea1a | 482 | else |
| NYX | 0:85b3fd62ea1a | 483 | { |
| NYX | 0:85b3fd62ea1a | 484 | /* MCLK output is disabled */ |
| NYX | 0:85b3fd62ea1a | 485 | tmp = (uint16_t)(((((sourceclock / (32U * packetlength)) * 10U) / I2S_InitStruct->AudioFreq)) + 5U); |
| NYX | 0:85b3fd62ea1a | 486 | } |
| NYX | 0:85b3fd62ea1a | 487 | |
| NYX | 0:85b3fd62ea1a | 488 | /* Remove the floating point */ |
| NYX | 0:85b3fd62ea1a | 489 | tmp = tmp / 10U; |
| NYX | 0:85b3fd62ea1a | 490 | |
| NYX | 0:85b3fd62ea1a | 491 | /* Check the parity of the divider */ |
| NYX | 0:85b3fd62ea1a | 492 | i2sodd = (uint16_t)(tmp & (uint16_t)0x0001U); |
| NYX | 0:85b3fd62ea1a | 493 | |
| NYX | 0:85b3fd62ea1a | 494 | /* Compute the i2sdiv prescaler */ |
| NYX | 0:85b3fd62ea1a | 495 | i2sdiv = (uint16_t)((tmp - i2sodd) / 2U); |
| NYX | 0:85b3fd62ea1a | 496 | |
| NYX | 0:85b3fd62ea1a | 497 | /* Get the Mask for the Odd bit (SPI_I2SPR[8]) register */ |
| NYX | 0:85b3fd62ea1a | 498 | i2sodd = (uint16_t)(i2sodd << 8U); |
| NYX | 0:85b3fd62ea1a | 499 | } |
| NYX | 0:85b3fd62ea1a | 500 | |
| NYX | 0:85b3fd62ea1a | 501 | /* Test if the divider is 1 or 0 or greater than 0xFF */ |
| NYX | 0:85b3fd62ea1a | 502 | if ((i2sdiv < 2U) || (i2sdiv > 0xFFU)) |
| NYX | 0:85b3fd62ea1a | 503 | { |
| NYX | 0:85b3fd62ea1a | 504 | /* Set the default values */ |
| NYX | 0:85b3fd62ea1a | 505 | i2sdiv = 2U; |
| NYX | 0:85b3fd62ea1a | 506 | i2sodd = 0U; |
| NYX | 0:85b3fd62ea1a | 507 | } |
| NYX | 0:85b3fd62ea1a | 508 | |
| NYX | 0:85b3fd62ea1a | 509 | /* Write to SPIx I2SPR register the computed value */ |
| NYX | 0:85b3fd62ea1a | 510 | WRITE_REG(SPIx->I2SPR, i2sdiv | i2sodd | I2S_InitStruct->MCLKOutput); |
| NYX | 0:85b3fd62ea1a | 511 | |
| NYX | 0:85b3fd62ea1a | 512 | status = SUCCESS; |
| NYX | 0:85b3fd62ea1a | 513 | } |
| NYX | 0:85b3fd62ea1a | 514 | return status; |
| NYX | 0:85b3fd62ea1a | 515 | } |
| NYX | 0:85b3fd62ea1a | 516 | |
| NYX | 0:85b3fd62ea1a | 517 | /** |
| NYX | 0:85b3fd62ea1a | 518 | * @brief Set each @ref LL_I2S_InitTypeDef field to default value. |
| NYX | 0:85b3fd62ea1a | 519 | * @param I2S_InitStruct pointer to a @ref LL_I2S_InitTypeDef structure |
| NYX | 0:85b3fd62ea1a | 520 | * whose fields will be set to default values. |
| NYX | 0:85b3fd62ea1a | 521 | * @retval None |
| NYX | 0:85b3fd62ea1a | 522 | */ |
| NYX | 0:85b3fd62ea1a | 523 | void LL_I2S_StructInit(LL_I2S_InitTypeDef *I2S_InitStruct) |
| NYX | 0:85b3fd62ea1a | 524 | { |
| NYX | 0:85b3fd62ea1a | 525 | /*--------------- Reset I2S init structure parameters values -----------------*/ |
| NYX | 0:85b3fd62ea1a | 526 | I2S_InitStruct->Mode = LL_I2S_MODE_SLAVE_TX; |
| NYX | 0:85b3fd62ea1a | 527 | I2S_InitStruct->Standard = LL_I2S_STANDARD_PHILIPS; |
| NYX | 0:85b3fd62ea1a | 528 | I2S_InitStruct->DataFormat = LL_I2S_DATAFORMAT_16B; |
| NYX | 0:85b3fd62ea1a | 529 | I2S_InitStruct->MCLKOutput = LL_I2S_MCLK_OUTPUT_DISABLE; |
| NYX | 0:85b3fd62ea1a | 530 | I2S_InitStruct->AudioFreq = LL_I2S_AUDIOFREQ_DEFAULT; |
| NYX | 0:85b3fd62ea1a | 531 | I2S_InitStruct->ClockPolarity = LL_I2S_POLARITY_LOW; |
| NYX | 0:85b3fd62ea1a | 532 | } |
| NYX | 0:85b3fd62ea1a | 533 | |
| NYX | 0:85b3fd62ea1a | 534 | /** |
| NYX | 0:85b3fd62ea1a | 535 | * @brief Set linear and parity prescaler. |
| NYX | 0:85b3fd62ea1a | 536 | * @note To calculate value of PrescalerLinear(I2SDIV[7:0] bits) and PrescalerParity(ODD bit)\n |
| NYX | 0:85b3fd62ea1a | 537 | * Check Audio frequency table and formulas inside Reference Manual (SPI/I2S). |
| NYX | 0:85b3fd62ea1a | 538 | * @param SPIx SPI Instance |
| NYX | 0:85b3fd62ea1a | 539 | * @param PrescalerLinear value: Min_Data=0x02 and Max_Data=0xFF. |
| NYX | 0:85b3fd62ea1a | 540 | * @param PrescalerParity This parameter can be one of the following values: |
| NYX | 0:85b3fd62ea1a | 541 | * @arg @ref LL_I2S_PRESCALER_PARITY_EVEN |
| NYX | 0:85b3fd62ea1a | 542 | * @arg @ref LL_I2S_PRESCALER_PARITY_ODD |
| NYX | 0:85b3fd62ea1a | 543 | * @retval None |
| NYX | 0:85b3fd62ea1a | 544 | */ |
| NYX | 0:85b3fd62ea1a | 545 | void LL_I2S_ConfigPrescaler(SPI_TypeDef *SPIx, uint32_t PrescalerLinear, uint32_t PrescalerParity) |
| NYX | 0:85b3fd62ea1a | 546 | { |
| NYX | 0:85b3fd62ea1a | 547 | /* Check the I2S parameters */ |
| NYX | 0:85b3fd62ea1a | 548 | assert_param(IS_I2S_ALL_INSTANCE(SPIx)); |
| NYX | 0:85b3fd62ea1a | 549 | assert_param(IS_LL_I2S_PRESCALER_LINEAR(PrescalerLinear)); |
| NYX | 0:85b3fd62ea1a | 550 | assert_param(IS_LL_I2S_PRESCALER_PARITY(PrescalerParity)); |
| NYX | 0:85b3fd62ea1a | 551 | |
| NYX | 0:85b3fd62ea1a | 552 | /* Write to SPIx I2SPR */ |
| NYX | 0:85b3fd62ea1a | 553 | MODIFY_REG(SPIx->I2SPR, SPI_I2SPR_I2SDIV | SPI_I2SPR_ODD, PrescalerLinear | (PrescalerParity << 8U)); |
| NYX | 0:85b3fd62ea1a | 554 | } |
| NYX | 0:85b3fd62ea1a | 555 | |
| NYX | 0:85b3fd62ea1a | 556 | #if defined (SPI_I2S_FULLDUPLEX_SUPPORT) |
| NYX | 0:85b3fd62ea1a | 557 | /** |
| NYX | 0:85b3fd62ea1a | 558 | * @brief Configures the full duplex mode for the I2Sx peripheral using its extension |
| NYX | 0:85b3fd62ea1a | 559 | * I2Sxext according to the specified parameters in the I2S_InitStruct. |
| NYX | 0:85b3fd62ea1a | 560 | * @note The structure pointed by I2S_InitStruct parameter should be the same |
| NYX | 0:85b3fd62ea1a | 561 | * used for the master I2S peripheral. In this case, if the master is |
| NYX | 0:85b3fd62ea1a | 562 | * configured as transmitter, the slave will be receiver and vice versa. |
| NYX | 0:85b3fd62ea1a | 563 | * Or you can force a different mode by modifying the field I2S_Mode to the |
| NYX | 0:85b3fd62ea1a | 564 | * value I2S_SlaveRx or I2S_SlaveTx independently of the master configuration. |
| NYX | 0:85b3fd62ea1a | 565 | * @param I2Sxext SPI Instance |
| NYX | 0:85b3fd62ea1a | 566 | * @param I2S_InitStruct pointer to a @ref LL_I2S_InitTypeDef structure |
| NYX | 0:85b3fd62ea1a | 567 | * @retval An ErrorStatus enumeration value: |
| NYX | 0:85b3fd62ea1a | 568 | * - SUCCESS: I2Sxext registers are Initialized |
| NYX | 0:85b3fd62ea1a | 569 | * - ERROR: I2Sxext registers are not Initialized |
| NYX | 0:85b3fd62ea1a | 570 | */ |
| NYX | 0:85b3fd62ea1a | 571 | ErrorStatus LL_I2S_InitFullDuplex(SPI_TypeDef *I2Sxext, LL_I2S_InitTypeDef *I2S_InitStruct) |
| NYX | 0:85b3fd62ea1a | 572 | { |
| NYX | 0:85b3fd62ea1a | 573 | uint16_t mode = 0U; |
| NYX | 0:85b3fd62ea1a | 574 | ErrorStatus status = ERROR; |
| NYX | 0:85b3fd62ea1a | 575 | |
| NYX | 0:85b3fd62ea1a | 576 | /* Check the I2S parameters */ |
| NYX | 0:85b3fd62ea1a | 577 | assert_param(IS_I2S_EXT_ALL_INSTANCE(I2Sxext)); |
| NYX | 0:85b3fd62ea1a | 578 | assert_param(IS_LL_I2S_MODE(I2S_InitStruct->Mode)); |
| NYX | 0:85b3fd62ea1a | 579 | assert_param(IS_LL_I2S_STANDARD(I2S_InitStruct->Standard)); |
| NYX | 0:85b3fd62ea1a | 580 | assert_param(IS_LL_I2S_DATAFORMAT(I2S_InitStruct->DataFormat)); |
| NYX | 0:85b3fd62ea1a | 581 | assert_param(IS_LL_I2S_CPOL(I2S_InitStruct->ClockPolarity)); |
| NYX | 0:85b3fd62ea1a | 582 | |
| NYX | 0:85b3fd62ea1a | 583 | if (LL_I2S_IsEnabled(I2Sxext) == 0x00000000U) |
| NYX | 0:85b3fd62ea1a | 584 | { |
| NYX | 0:85b3fd62ea1a | 585 | /*---------------------------- SPIx I2SCFGR Configuration -------------------- |
| NYX | 0:85b3fd62ea1a | 586 | * Configure SPIx I2SCFGR with parameters: |
| NYX | 0:85b3fd62ea1a | 587 | * - Mode: SPI_I2SCFGR_I2SCFG[1:0] bit |
| NYX | 0:85b3fd62ea1a | 588 | * - Standard: SPI_I2SCFGR_I2SSTD[1:0] and SPI_I2SCFGR_PCMSYNC bits |
| NYX | 0:85b3fd62ea1a | 589 | * - DataFormat: SPI_I2SCFGR_CHLEN and SPI_I2SCFGR_DATLEN bits |
| NYX | 0:85b3fd62ea1a | 590 | * - ClockPolarity: SPI_I2SCFGR_CKPOL bit |
| NYX | 0:85b3fd62ea1a | 591 | */ |
| NYX | 0:85b3fd62ea1a | 592 | |
| NYX | 0:85b3fd62ea1a | 593 | /* Reset I2SPR registers */ |
| NYX | 0:85b3fd62ea1a | 594 | WRITE_REG(I2Sxext->I2SPR, I2S_I2SPR_CLEAR_MASK); |
| NYX | 0:85b3fd62ea1a | 595 | |
| NYX | 0:85b3fd62ea1a | 596 | /* Get the mode to be configured for the extended I2S */ |
| NYX | 0:85b3fd62ea1a | 597 | if ((I2S_InitStruct->Mode == LL_I2S_MODE_MASTER_TX) || (I2S_InitStruct->Mode == LL_I2S_MODE_SLAVE_TX)) |
| NYX | 0:85b3fd62ea1a | 598 | { |
| NYX | 0:85b3fd62ea1a | 599 | mode = LL_I2S_MODE_SLAVE_RX; |
| NYX | 0:85b3fd62ea1a | 600 | } |
| NYX | 0:85b3fd62ea1a | 601 | else |
| NYX | 0:85b3fd62ea1a | 602 | { |
| NYX | 0:85b3fd62ea1a | 603 | if ((I2S_InitStruct->Mode == LL_I2S_MODE_MASTER_RX) || (I2S_InitStruct->Mode == LL_I2S_MODE_SLAVE_RX)) |
| NYX | 0:85b3fd62ea1a | 604 | { |
| NYX | 0:85b3fd62ea1a | 605 | mode = LL_I2S_MODE_SLAVE_TX; |
| NYX | 0:85b3fd62ea1a | 606 | } |
| NYX | 0:85b3fd62ea1a | 607 | } |
| NYX | 0:85b3fd62ea1a | 608 | |
| NYX | 0:85b3fd62ea1a | 609 | /* Write to SPIx I2SCFGR */ |
| NYX | 0:85b3fd62ea1a | 610 | MODIFY_REG(I2Sxext->I2SCFGR, |
| NYX | 0:85b3fd62ea1a | 611 | I2S_I2SCFGR_CLEAR_MASK, |
| NYX | 0:85b3fd62ea1a | 612 | I2S_InitStruct->Standard | |
| NYX | 0:85b3fd62ea1a | 613 | I2S_InitStruct->DataFormat | I2S_InitStruct->ClockPolarity | |
| NYX | 0:85b3fd62ea1a | 614 | SPI_I2SCFGR_I2SMOD | mode); |
| NYX | 0:85b3fd62ea1a | 615 | |
| NYX | 0:85b3fd62ea1a | 616 | status = SUCCESS; |
| NYX | 0:85b3fd62ea1a | 617 | } |
| NYX | 0:85b3fd62ea1a | 618 | return status; |
| NYX | 0:85b3fd62ea1a | 619 | } |
| NYX | 0:85b3fd62ea1a | 620 | #endif /* SPI_I2S_FULLDUPLEX_SUPPORT */ |
| NYX | 0:85b3fd62ea1a | 621 | |
| NYX | 0:85b3fd62ea1a | 622 | /** |
| NYX | 0:85b3fd62ea1a | 623 | * @} |
| NYX | 0:85b3fd62ea1a | 624 | */ |
| NYX | 0:85b3fd62ea1a | 625 | |
| NYX | 0:85b3fd62ea1a | 626 | /** |
| NYX | 0:85b3fd62ea1a | 627 | * @} |
| NYX | 0:85b3fd62ea1a | 628 | */ |
| NYX | 0:85b3fd62ea1a | 629 | |
| NYX | 0:85b3fd62ea1a | 630 | /** |
| NYX | 0:85b3fd62ea1a | 631 | * @} |
| NYX | 0:85b3fd62ea1a | 632 | */ |
| NYX | 0:85b3fd62ea1a | 633 | |
| NYX | 0:85b3fd62ea1a | 634 | #endif /* defined (SPI1) || defined (SPI2) || defined (SPI3) || defined (SPI4) || defined (SPI5) || defined(SPI6) */ |
| NYX | 0:85b3fd62ea1a | 635 | |
| NYX | 0:85b3fd62ea1a | 636 | /** |
| NYX | 0:85b3fd62ea1a | 637 | * @} |
| NYX | 0:85b3fd62ea1a | 638 | */ |
| NYX | 0:85b3fd62ea1a | 639 | |
| NYX | 0:85b3fd62ea1a | 640 | #endif /* USE_FULL_LL_DRIVER */ |
| NYX | 0:85b3fd62ea1a | 641 | |
| NYX | 0:85b3fd62ea1a | 642 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |