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targets/TARGET_STM/TARGET_STM32F4/device/stm32f4xx_ll_sdmmc.h@0:85b3fd62ea1a, 2020-03-16 (annotated)

Committer:: NYX
Date:: Mon Mar 16 06:35:48 2020 +0000
Revision:: 0:85b3fd62ea1a

reinport to mbed;

Who changed what in which revision?

User	Revision	Line number	New contents of line
NYX	0:85b3fd62ea1a	1	/**
NYX	0:85b3fd62ea1a	2	******************************************************************************
NYX	0:85b3fd62ea1a	3	* @file stm32f4xx_ll_sdmmc.h
NYX	0:85b3fd62ea1a	4	* @author MCD Application Team
NYX	0:85b3fd62ea1a	5	* @version V1.7.1
NYX	0:85b3fd62ea1a	6	* @date 14-April-2017
NYX	0:85b3fd62ea1a	7	* @brief Header file of SDMMC HAL module.
NYX	0:85b3fd62ea1a	8	******************************************************************************
NYX	0:85b3fd62ea1a	9	* @attention
NYX	0:85b3fd62ea1a	10	*
NYX	0:85b3fd62ea1a	11	* <h2><center>© COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
NYX	0:85b3fd62ea1a	12	*
NYX	0:85b3fd62ea1a	13	* Redistribution and use in source and binary forms, with or without modification,
NYX	0:85b3fd62ea1a	14	* are permitted provided that the following conditions are met:
NYX	0:85b3fd62ea1a	15	* 1. Redistributions of source code must retain the above copyright notice,
NYX	0:85b3fd62ea1a	16	* this list of conditions and the following disclaimer.
NYX	0:85b3fd62ea1a	17	* 2. Redistributions in binary form must reproduce the above copyright notice,
NYX	0:85b3fd62ea1a	18	* this list of conditions and the following disclaimer in the documentation
NYX	0:85b3fd62ea1a	19	* and/or other materials provided with the distribution.
NYX	0:85b3fd62ea1a	20	* 3. Neither the name of STMicroelectronics nor the names of its contributors
NYX	0:85b3fd62ea1a	21	* may be used to endorse or promote products derived from this software
NYX	0:85b3fd62ea1a	22	* without specific prior written permission.
NYX	0:85b3fd62ea1a	23	*
NYX	0:85b3fd62ea1a	24	* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
NYX	0:85b3fd62ea1a	25	* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
NYX	0:85b3fd62ea1a	26	* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
NYX	0:85b3fd62ea1a	27	* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
NYX	0:85b3fd62ea1a	28	* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
NYX	0:85b3fd62ea1a	29	* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
NYX	0:85b3fd62ea1a	30	* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
NYX	0:85b3fd62ea1a	31	* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
NYX	0:85b3fd62ea1a	32	* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
NYX	0:85b3fd62ea1a	33	* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
NYX	0:85b3fd62ea1a	34	*
NYX	0:85b3fd62ea1a	35	******************************************************************************
NYX	0:85b3fd62ea1a	36	*/
NYX	0:85b3fd62ea1a	37
NYX	0:85b3fd62ea1a	38	/* Define to prevent recursive inclusion -------------------------------------*/
NYX	0:85b3fd62ea1a	39	#ifndef __STM32F4xx_LL_SDMMC_H
NYX	0:85b3fd62ea1a	40	#define __STM32F4xx_LL_SDMMC_H
NYX	0:85b3fd62ea1a	41
NYX	0:85b3fd62ea1a	42	#ifdef __cplusplus
NYX	0:85b3fd62ea1a	43	extern "C" {
NYX	0:85b3fd62ea1a	44	#endif
NYX	0:85b3fd62ea1a	45
NYX	0:85b3fd62ea1a	46	#if defined(STM32F405xx) \|\| defined(STM32F415xx) \|\| defined(STM32F407xx) \|\| defined(STM32F417xx) \|\| \
NYX	0:85b3fd62ea1a	47	defined(STM32F427xx) \|\| defined(STM32F437xx) \|\| defined(STM32F429xx) \|\| defined(STM32F439xx) \|\| \
NYX	0:85b3fd62ea1a	48	defined(STM32F401xC) \|\| defined(STM32F401xE) \|\| defined(STM32F411xE) \|\| defined(STM32F446xx) \|\| \
NYX	0:85b3fd62ea1a	49	defined(STM32F469xx) \|\| defined(STM32F479xx) \|\| defined(STM32F412Zx) \|\| defined(STM32F412Vx) \|\| \
NYX	0:85b3fd62ea1a	50	defined(STM32F412Rx) \|\| defined(STM32F412Cx) \|\| defined(STM32F413xx) \|\| defined(STM32F423xx)
NYX	0:85b3fd62ea1a	51
NYX	0:85b3fd62ea1a	52	/* Includes ------------------------------------------------------------------*/
NYX	0:85b3fd62ea1a	53	#include "stm32f4xx_hal_def.h"
NYX	0:85b3fd62ea1a	54
NYX	0:85b3fd62ea1a	55	/** @addtogroup STM32F4xx_Driver
NYX	0:85b3fd62ea1a	56	* @{
NYX	0:85b3fd62ea1a	57	*/
NYX	0:85b3fd62ea1a	58
NYX	0:85b3fd62ea1a	59	/** @addtogroup SDMMC_LL
NYX	0:85b3fd62ea1a	60	* @{
NYX	0:85b3fd62ea1a	61	*/
NYX	0:85b3fd62ea1a	62
NYX	0:85b3fd62ea1a	63	/* Exported types ------------------------------------------------------------*/
NYX	0:85b3fd62ea1a	64	/** @defgroup SDMMC_LL_Exported_Types SDMMC_LL Exported Types
NYX	0:85b3fd62ea1a	65	* @{
NYX	0:85b3fd62ea1a	66	*/
NYX	0:85b3fd62ea1a	67
NYX	0:85b3fd62ea1a	68	/**
NYX	0:85b3fd62ea1a	69	* @brief SDMMC Configuration Structure definition
NYX	0:85b3fd62ea1a	70	*/
NYX	0:85b3fd62ea1a	71	typedef struct
NYX	0:85b3fd62ea1a	72	{
NYX	0:85b3fd62ea1a	73	uint32_t ClockEdge; /*!< Specifies the clock transition on which the bit capture is made.
NYX	0:85b3fd62ea1a	74	This parameter can be a value of @ref SDMMC_LL_Clock_Edge */
NYX	0:85b3fd62ea1a	75
NYX	0:85b3fd62ea1a	76	uint32_t ClockBypass; /*!< Specifies whether the SDMMC Clock divider bypass is
NYX	0:85b3fd62ea1a	77	enabled or disabled.
NYX	0:85b3fd62ea1a	78	This parameter can be a value of @ref SDMMC_LL_Clock_Bypass */
NYX	0:85b3fd62ea1a	79
NYX	0:85b3fd62ea1a	80	uint32_t ClockPowerSave; /*!< Specifies whether SDMMC Clock output is enabled or
NYX	0:85b3fd62ea1a	81	disabled when the bus is idle.
NYX	0:85b3fd62ea1a	82	This parameter can be a value of @ref SDMMC_LL_Clock_Power_Save */
NYX	0:85b3fd62ea1a	83
NYX	0:85b3fd62ea1a	84	uint32_t BusWide; /*!< Specifies the SDMMC bus width.
NYX	0:85b3fd62ea1a	85	This parameter can be a value of @ref SDMMC_LL_Bus_Wide */
NYX	0:85b3fd62ea1a	86
NYX	0:85b3fd62ea1a	87	uint32_t HardwareFlowControl; /*!< Specifies whether the SDMMC hardware flow control is enabled or disabled.
NYX	0:85b3fd62ea1a	88	This parameter can be a value of @ref SDMMC_LL_Hardware_Flow_Control */
NYX	0:85b3fd62ea1a	89
NYX	0:85b3fd62ea1a	90	uint32_t ClockDiv; /*!< Specifies the clock frequency of the SDMMC controller.
NYX	0:85b3fd62ea1a	91	This parameter can be a value between Min_Data = 0 and Max_Data = 255 */
NYX	0:85b3fd62ea1a	92
NYX	0:85b3fd62ea1a	93	}SDIO_InitTypeDef;
NYX	0:85b3fd62ea1a	94
NYX	0:85b3fd62ea1a	95
NYX	0:85b3fd62ea1a	96	/**
NYX	0:85b3fd62ea1a	97	* @brief SDMMC Command Control structure
NYX	0:85b3fd62ea1a	98	*/
NYX	0:85b3fd62ea1a	99	typedef struct
NYX	0:85b3fd62ea1a	100	{
NYX	0:85b3fd62ea1a	101	uint32_t Argument; /*!< Specifies the SDMMC command argument which is sent
NYX	0:85b3fd62ea1a	102	to a card as part of a command message. If a command
NYX	0:85b3fd62ea1a	103	contains an argument, it must be loaded into this register
NYX	0:85b3fd62ea1a	104	before writing the command to the command register. */
NYX	0:85b3fd62ea1a	105
NYX	0:85b3fd62ea1a	106	uint32_t CmdIndex; /*!< Specifies the SDMMC command index. It must be Min_Data = 0 and
NYX	0:85b3fd62ea1a	107	Max_Data = 64 */
NYX	0:85b3fd62ea1a	108
NYX	0:85b3fd62ea1a	109	uint32_t Response; /*!< Specifies the SDMMC response type.
NYX	0:85b3fd62ea1a	110	This parameter can be a value of @ref SDMMC_LL_Response_Type */
NYX	0:85b3fd62ea1a	111
NYX	0:85b3fd62ea1a	112	uint32_t WaitForInterrupt; /*!< Specifies whether SDMMC wait for interrupt request is
NYX	0:85b3fd62ea1a	113	enabled or disabled.
NYX	0:85b3fd62ea1a	114	This parameter can be a value of @ref SDMMC_LL_Wait_Interrupt_State */
NYX	0:85b3fd62ea1a	115
NYX	0:85b3fd62ea1a	116	uint32_t CPSM; /*!< Specifies whether SDMMC Command path state machine (CPSM)
NYX	0:85b3fd62ea1a	117	is enabled or disabled.
NYX	0:85b3fd62ea1a	118	This parameter can be a value of @ref SDMMC_LL_CPSM_State */
NYX	0:85b3fd62ea1a	119	}SDIO_CmdInitTypeDef;
NYX	0:85b3fd62ea1a	120
NYX	0:85b3fd62ea1a	121
NYX	0:85b3fd62ea1a	122	/**
NYX	0:85b3fd62ea1a	123	* @brief SDMMC Data Control structure
NYX	0:85b3fd62ea1a	124	*/
NYX	0:85b3fd62ea1a	125	typedef struct
NYX	0:85b3fd62ea1a	126	{
NYX	0:85b3fd62ea1a	127	uint32_t DataTimeOut; /!< Specifies the data timeout period in card bus clock periods. /
NYX	0:85b3fd62ea1a	128
NYX	0:85b3fd62ea1a	129	uint32_t DataLength; /!< Specifies the number of data bytes to be transferred. /
NYX	0:85b3fd62ea1a	130
NYX	0:85b3fd62ea1a	131	uint32_t DataBlockSize; /*!< Specifies the data block size for block transfer.
NYX	0:85b3fd62ea1a	132	This parameter can be a value of @ref SDMMC_LL_Data_Block_Size */
NYX	0:85b3fd62ea1a	133
NYX	0:85b3fd62ea1a	134	uint32_t TransferDir; /*!< Specifies the data transfer direction, whether the transfer
NYX	0:85b3fd62ea1a	135	is a read or write.
NYX	0:85b3fd62ea1a	136	This parameter can be a value of @ref SDMMC_LL_Transfer_Direction */
NYX	0:85b3fd62ea1a	137
NYX	0:85b3fd62ea1a	138	uint32_t TransferMode; /*!< Specifies whether data transfer is in stream or block mode.
NYX	0:85b3fd62ea1a	139	This parameter can be a value of @ref SDMMC_LL_Transfer_Type */
NYX	0:85b3fd62ea1a	140
NYX	0:85b3fd62ea1a	141	uint32_t DPSM; /*!< Specifies whether SDMMC Data path state machine (DPSM)
NYX	0:85b3fd62ea1a	142	is enabled or disabled.
NYX	0:85b3fd62ea1a	143	This parameter can be a value of @ref SDMMC_LL_DPSM_State */
NYX	0:85b3fd62ea1a	144	}SDIO_DataInitTypeDef;
NYX	0:85b3fd62ea1a	145
NYX	0:85b3fd62ea1a	146	/**
NYX	0:85b3fd62ea1a	147	* @}
NYX	0:85b3fd62ea1a	148	*/
NYX	0:85b3fd62ea1a	149
NYX	0:85b3fd62ea1a	150	/* Exported constants --------------------------------------------------------*/
NYX	0:85b3fd62ea1a	151	/** @defgroup SDMMC_LL_Exported_Constants SDMMC_LL Exported Constants
NYX	0:85b3fd62ea1a	152	* @{
NYX	0:85b3fd62ea1a	153	*/
NYX	0:85b3fd62ea1a	154	#define SDMMC_ERROR_NONE 0x00000000U /!< No error /
NYX	0:85b3fd62ea1a	155	#define SDMMC_ERROR_CMD_CRC_FAIL 0x00000001U /!< Command response received (but CRC check failed) /
NYX	0:85b3fd62ea1a	156	#define SDMMC_ERROR_DATA_CRC_FAIL 0x00000002U /!< Data block sent/received (CRC check failed) /
NYX	0:85b3fd62ea1a	157	#define SDMMC_ERROR_CMD_RSP_TIMEOUT 0x00000004U /!< Command response timeout /
NYX	0:85b3fd62ea1a	158	#define SDMMC_ERROR_DATA_TIMEOUT 0x00000008U /!< Data timeout /
NYX	0:85b3fd62ea1a	159	#define SDMMC_ERROR_TX_UNDERRUN 0x00000010U /!< Transmit FIFO underrun /
NYX	0:85b3fd62ea1a	160	#define SDMMC_ERROR_RX_OVERRUN 0x00000020U /!< Receive FIFO overrun /
NYX	0:85b3fd62ea1a	161	#define SDMMC_ERROR_ADDR_MISALIGNED 0x00000040U /!< Misaligned address /
NYX	0:85b3fd62ea1a	162	#define SDMMC_ERROR_BLOCK_LEN_ERR 0x00000080U /*!< Transferred block length is not allowed for the card or the
NYX	0:85b3fd62ea1a	163	number of transferred bytes does not match the block length */
NYX	0:85b3fd62ea1a	164	#define SDMMC_ERROR_ERASE_SEQ_ERR 0x00000100U /!< An error in the sequence of erase command occurs /
NYX	0:85b3fd62ea1a	165	#define SDMMC_ERROR_BAD_ERASE_PARAM 0x00000200U /!< An invalid selection for erase groups /
NYX	0:85b3fd62ea1a	166	#define SDMMC_ERROR_WRITE_PROT_VIOLATION 0x00000400U /!< Attempt to program a write protect block /
NYX	0:85b3fd62ea1a	167	#define SDMMC_ERROR_LOCK_UNLOCK_FAILED 0x00000800U /*!< Sequence or password error has been detected in unlock
NYX	0:85b3fd62ea1a	168	command or if there was an attempt to access a locked card */
NYX	0:85b3fd62ea1a	169	#define SDMMC_ERROR_COM_CRC_FAILED 0x00001000U /!< CRC check of the previous command failed /
NYX	0:85b3fd62ea1a	170	#define SDMMC_ERROR_ILLEGAL_CMD 0x00002000U /!< Command is not legal for the card state /
NYX	0:85b3fd62ea1a	171	#define SDMMC_ERROR_CARD_ECC_FAILED 0x00004000U /!< Card internal ECC was applied but failed to correct the data /
NYX	0:85b3fd62ea1a	172	#define SDMMC_ERROR_CC_ERR 0x00008000U /!< Internal card controller error /
NYX	0:85b3fd62ea1a	173	#define SDMMC_ERROR_GENERAL_UNKNOWN_ERR 0x00010000U /!< General or unknown error /
NYX	0:85b3fd62ea1a	174	#define SDMMC_ERROR_STREAM_READ_UNDERRUN 0x00020000U /!< The card could not sustain data reading in stream rmode /
NYX	0:85b3fd62ea1a	175	#define SDMMC_ERROR_STREAM_WRITE_OVERRUN 0x00040000U /!< The card could not sustain data programming in stream mode /
NYX	0:85b3fd62ea1a	176	#define SDMMC_ERROR_CID_CSD_OVERWRITE 0x00080000U /!< CID/CSD overwrite error /
NYX	0:85b3fd62ea1a	177	#define SDMMC_ERROR_WP_ERASE_SKIP 0x00100000U /!< Only partial address space was erased /
NYX	0:85b3fd62ea1a	178	#define SDMMC_ERROR_CARD_ECC_DISABLED 0x00200000U /!< Command has been executed without using internal ECC /
NYX	0:85b3fd62ea1a	179	#define SDMMC_ERROR_ERASE_RESET 0x00400000U /*!< Erase sequence was cleared before executing because an out
NYX	0:85b3fd62ea1a	180	of erase sequence command was received */
NYX	0:85b3fd62ea1a	181	#define SDMMC_ERROR_AKE_SEQ_ERR 0x00800000U /!< Error in sequence of authentication /
NYX	0:85b3fd62ea1a	182	#define SDMMC_ERROR_INVALID_VOLTRANGE 0x01000000U /!< Error in case of invalid voltage range /
NYX	0:85b3fd62ea1a	183	#define SDMMC_ERROR_ADDR_OUT_OF_RANGE 0x02000000U /!< Error when addressed block is out of range /
NYX	0:85b3fd62ea1a	184	#define SDMMC_ERROR_REQUEST_NOT_APPLICABLE 0x04000000U /!< Error when command request is not applicable /
NYX	0:85b3fd62ea1a	185	#define SDMMC_ERROR_INVALID_PARAMETER 0x08000000U /!< the used parameter is not valid /
NYX	0:85b3fd62ea1a	186	#define SDMMC_ERROR_UNSUPPORTED_FEATURE 0x10000000U /!< Error when feature is not insupported /
NYX	0:85b3fd62ea1a	187	#define SDMMC_ERROR_BUSY 0x20000000U /!< Error when transfer process is busy /
NYX	0:85b3fd62ea1a	188	#define SDMMC_ERROR_DMA 0x40000000U /!< Error while DMA transfer /
NYX	0:85b3fd62ea1a	189	#define SDMMC_ERROR_TIMEOUT 0x80000000U /!< Timeout error /
NYX	0:85b3fd62ea1a	190
NYX	0:85b3fd62ea1a	191	/**
NYX	0:85b3fd62ea1a	192	* @brief SDMMC Commands Index
NYX	0:85b3fd62ea1a	193	*/
NYX	0:85b3fd62ea1a	194	#define SDMMC_CMD_GO_IDLE_STATE ((uint8_t)0) /!< Resets the SD memory card. /
NYX	0:85b3fd62ea1a	195	#define SDMMC_CMD_SEND_OP_COND ((uint8_t)1) /!< Sends host capacity support information and activates the card's initialization process. /
NYX	0:85b3fd62ea1a	196	#define SDMMC_CMD_ALL_SEND_CID ((uint8_t)2) /!< Asks any card connected to the host to send the CID numbers on the CMD line. /
NYX	0:85b3fd62ea1a	197	#define SDMMC_CMD_SET_REL_ADDR ((uint8_t)3) /!< Asks the card to publish a new relative address (RCA). /
NYX	0:85b3fd62ea1a	198	#define SDMMC_CMD_SET_DSR ((uint8_t)4) /!< Programs the DSR of all cards. /
NYX	0:85b3fd62ea1a	199	#define SDMMC_CMD_SDMMC_SEN_OP_COND ((uint8_t)5) /*!< Sends host capacity support information (HCS) and asks the accessed card to send its
NYX	0:85b3fd62ea1a	200	operating condition register (OCR) content in the response on the CMD line. */
NYX	0:85b3fd62ea1a	201	#define SDMMC_CMD_HS_SWITCH ((uint8_t)6) /!< Checks switchable function (mode 0) and switch card function (mode 1). /
NYX	0:85b3fd62ea1a	202	#define SDMMC_CMD_SEL_DESEL_CARD ((uint8_t)7) /!< Selects the card by its own relative address and gets deselected by any other address /
NYX	0:85b3fd62ea1a	203	#define SDMMC_CMD_HS_SEND_EXT_CSD ((uint8_t)8) /*!< Sends SD Memory Card interface condition, which includes host supply voltage information
NYX	0:85b3fd62ea1a	204	and asks the card whether card supports voltage. */
NYX	0:85b3fd62ea1a	205	#define SDMMC_CMD_SEND_CSD ((uint8_t)9) /!< Addressed card sends its card specific data (CSD) on the CMD line. /
NYX	0:85b3fd62ea1a	206	#define SDMMC_CMD_SEND_CID ((uint8_t)10) /!< Addressed card sends its card identification (CID) on the CMD line. /
NYX	0:85b3fd62ea1a	207	#define SDMMC_CMD_READ_DAT_UNTIL_STOP ((uint8_t)11) /!< SD card doesn't support it. /
NYX	0:85b3fd62ea1a	208	#define SDMMC_CMD_STOP_TRANSMISSION ((uint8_t)12) /!< Forces the card to stop transmission. /
NYX	0:85b3fd62ea1a	209	#define SDMMC_CMD_SEND_STATUS ((uint8_t)13) /!< Addressed card sends its status register. /
NYX	0:85b3fd62ea1a	210	#define SDMMC_CMD_HS_BUSTEST_READ ((uint8_t)14) /!< Reserved /
NYX	0:85b3fd62ea1a	211	#define SDMMC_CMD_GO_INACTIVE_STATE ((uint8_t)15) /!< Sends an addressed card into the inactive state. /
NYX	0:85b3fd62ea1a	212	#define SDMMC_CMD_SET_BLOCKLEN ((uint8_t)16) /*!< Sets the block length (in bytes for SDSC) for all following block commands
NYX	0:85b3fd62ea1a	213	(read, write, lock). Default block length is fixed to 512 Bytes. Not effective
NYX	0:85b3fd62ea1a	214	for SDHS and SDXC. */
NYX	0:85b3fd62ea1a	215	#define SDMMC_CMD_READ_SINGLE_BLOCK ((uint8_t)17) /*!< Reads single block of size selected by SET_BLOCKLEN in case of SDSC, and a block of
NYX	0:85b3fd62ea1a	216	fixed 512 bytes in case of SDHC and SDXC. */
NYX	0:85b3fd62ea1a	217	#define SDMMC_CMD_READ_MULT_BLOCK ((uint8_t)18) /*!< Continuously transfers data blocks from card to host until interrupted by
NYX	0:85b3fd62ea1a	218	STOP_TRANSMISSION command. */
NYX	0:85b3fd62ea1a	219	#define SDMMC_CMD_HS_BUSTEST_WRITE ((uint8_t)19) /!< 64 bytes tuning pattern is sent for SDR50 and SDR104. /
NYX	0:85b3fd62ea1a	220	#define SDMMC_CMD_WRITE_DAT_UNTIL_STOP ((uint8_t)20) /!< Speed class control command. /
NYX	0:85b3fd62ea1a	221	#define SDMMC_CMD_SET_BLOCK_COUNT ((uint8_t)23) /!< Specify block count for CMD18 and CMD25. /
NYX	0:85b3fd62ea1a	222	#define SDMMC_CMD_WRITE_SINGLE_BLOCK ((uint8_t)24) /*!< Writes single block of size selected by SET_BLOCKLEN in case of SDSC, and a block of
NYX	0:85b3fd62ea1a	223	fixed 512 bytes in case of SDHC and SDXC. */
NYX	0:85b3fd62ea1a	224	#define SDMMC_CMD_WRITE_MULT_BLOCK ((uint8_t)25) /!< Continuously writes blocks of data until a STOP_TRANSMISSION follows. /
NYX	0:85b3fd62ea1a	225	#define SDMMC_CMD_PROG_CID ((uint8_t)26) /!< Reserved for manufacturers. /
NYX	0:85b3fd62ea1a	226	#define SDMMC_CMD_PROG_CSD ((uint8_t)27) /!< Programming of the programmable bits of the CSD. /
NYX	0:85b3fd62ea1a	227	#define SDMMC_CMD_SET_WRITE_PROT ((uint8_t)28) /!< Sets the write protection bit of the addressed group. /
NYX	0:85b3fd62ea1a	228	#define SDMMC_CMD_CLR_WRITE_PROT ((uint8_t)29) /!< Clears the write protection bit of the addressed group. /
NYX	0:85b3fd62ea1a	229	#define SDMMC_CMD_SEND_WRITE_PROT ((uint8_t)30) /!< Asks the card to send the status of the write protection bits. /
NYX	0:85b3fd62ea1a	230	#define SDMMC_CMD_SD_ERASE_GRP_START ((uint8_t)32) /!< Sets the address of the first write block to be erased. (For SD card only). /
NYX	0:85b3fd62ea1a	231	#define SDMMC_CMD_SD_ERASE_GRP_END ((uint8_t)33) /!< Sets the address of the last write block of the continuous range to be erased. /
NYX	0:85b3fd62ea1a	232	#define SDMMC_CMD_ERASE_GRP_START ((uint8_t)35) /*!< Sets the address of the first write block to be erased. Reserved for each command
NYX	0:85b3fd62ea1a	233	system set by switch function command (CMD6). */
NYX	0:85b3fd62ea1a	234	#define SDMMC_CMD_ERASE_GRP_END ((uint8_t)36) /*!< Sets the address of the last write block of the continuous range to be erased.
NYX	0:85b3fd62ea1a	235	Reserved for each command system set by switch function command (CMD6). */
NYX	0:85b3fd62ea1a	236	#define SDMMC_CMD_ERASE ((uint8_t)38) /!< Reserved for SD security applications. /
NYX	0:85b3fd62ea1a	237	#define SDMMC_CMD_FAST_IO ((uint8_t)39) /!< SD card doesn't support it (Reserved). /
NYX	0:85b3fd62ea1a	238	#define SDMMC_CMD_GO_IRQ_STATE ((uint8_t)40) /!< SD card doesn't support it (Reserved). /
NYX	0:85b3fd62ea1a	239	#define SDMMC_CMD_LOCK_UNLOCK ((uint8_t)42) /*!< Sets/resets the password or lock/unlock the card. The size of the data block is set by
NYX	0:85b3fd62ea1a	240	the SET_BLOCK_LEN command. */
NYX	0:85b3fd62ea1a	241	#define SDMMC_CMD_APP_CMD ((uint8_t)55) /*!< Indicates to the card that the next command is an application specific command rather
NYX	0:85b3fd62ea1a	242	than a standard command. */
NYX	0:85b3fd62ea1a	243	#define SDMMC_CMD_GEN_CMD ((uint8_t)56) /*!< Used either to transfer a data block to the card or to get a data block from the card
NYX	0:85b3fd62ea1a	244	for general purpose/application specific commands. */
NYX	0:85b3fd62ea1a	245	#define SDMMC_CMD_NO_CMD ((uint8_t)64) /!< No command /
NYX	0:85b3fd62ea1a	246
NYX	0:85b3fd62ea1a	247	/**
NYX	0:85b3fd62ea1a	248	* @brief Following commands are SD Card Specific commands.
NYX	0:85b3fd62ea1a	249	* SDMMC_APP_CMD should be sent before sending these commands.
NYX	0:85b3fd62ea1a	250	*/
NYX	0:85b3fd62ea1a	251	#define SDMMC_CMD_APP_SD_SET_BUSWIDTH ((uint8_t)6) /*!< (ACMD6) Defines the data bus width to be used for data transfer. The allowed data bus
NYX	0:85b3fd62ea1a	252	widths are given in SCR register. */
NYX	0:85b3fd62ea1a	253	#define SDMMC_CMD_SD_APP_STATUS ((uint8_t)13) /!< (ACMD13) Sends the SD status. /
NYX	0:85b3fd62ea1a	254	#define SDMMC_CMD_SD_APP_SEND_NUM_WRITE_BLOCKS ((uint8_t)22) /*!< (ACMD22) Sends the number of the written (without errors) write blocks. Responds with
NYX	0:85b3fd62ea1a	255	32bit+CRC data block. */
NYX	0:85b3fd62ea1a	256	#define SDMMC_CMD_SD_APP_OP_COND ((uint8_t)41) /*!< (ACMD41) Sends host capacity support information (HCS) and asks the accessed card to
NYX	0:85b3fd62ea1a	257	send its operating condition register (OCR) content in the response on the CMD line. */
NYX	0:85b3fd62ea1a	258	#define SDMMC_CMD_SD_APP_SET_CLR_CARD_DETECT ((uint8_t)42) /!< (ACMD42) Connect/Disconnect the 50 KOhm pull-up resistor on CD/DAT3 (pin 1) of the card /
NYX	0:85b3fd62ea1a	259	#define SDMMC_CMD_SD_APP_SEND_SCR ((uint8_t)51) /!< Reads the SD Configuration Register (SCR). /
NYX	0:85b3fd62ea1a	260	#define SDMMC_CMD_SDMMC_RW_DIRECT ((uint8_t)52) /!< For SD I/O card only, reserved for security specification. /
NYX	0:85b3fd62ea1a	261	#define SDMMC_CMD_SDMMC_RW_EXTENDED ((uint8_t)53) /!< For SD I/O card only, reserved for security specification. /
NYX	0:85b3fd62ea1a	262
NYX	0:85b3fd62ea1a	263	/**
NYX	0:85b3fd62ea1a	264	* @brief Following commands are SD Card Specific security commands.
NYX	0:85b3fd62ea1a	265	* SDMMC_CMD_APP_CMD should be sent before sending these commands.
NYX	0:85b3fd62ea1a	266	*/
NYX	0:85b3fd62ea1a	267	#define SDMMC_CMD_SD_APP_GET_MKB ((uint8_t)43)
NYX	0:85b3fd62ea1a	268	#define SDMMC_CMD_SD_APP_GET_MID ((uint8_t)44)
NYX	0:85b3fd62ea1a	269	#define SDMMC_CMD_SD_APP_SET_CER_RN1 ((uint8_t)45)
NYX	0:85b3fd62ea1a	270	#define SDMMC_CMD_SD_APP_GET_CER_RN2 ((uint8_t)46)
NYX	0:85b3fd62ea1a	271	#define SDMMC_CMD_SD_APP_SET_CER_RES2 ((uint8_t)47)
NYX	0:85b3fd62ea1a	272	#define SDMMC_CMD_SD_APP_GET_CER_RES1 ((uint8_t)48)
NYX	0:85b3fd62ea1a	273	#define SDMMC_CMD_SD_APP_SECURE_READ_MULTIPLE_BLOCK ((uint8_t)18)
NYX	0:85b3fd62ea1a	274	#define SDMMC_CMD_SD_APP_SECURE_WRITE_MULTIPLE_BLOCK ((uint8_t)25)
NYX	0:85b3fd62ea1a	275	#define SDMMC_CMD_SD_APP_SECURE_ERASE ((uint8_t)38)
NYX	0:85b3fd62ea1a	276	#define SDMMC_CMD_SD_APP_CHANGE_SECURE_AREA ((uint8_t)49)
NYX	0:85b3fd62ea1a	277	#define SDMMC_CMD_SD_APP_SECURE_WRITE_MKB ((uint8_t)48)
NYX	0:85b3fd62ea1a	278
NYX	0:85b3fd62ea1a	279	/**
NYX	0:85b3fd62ea1a	280	* @brief Masks for errors Card Status R1 (OCR Register)
NYX	0:85b3fd62ea1a	281	*/
NYX	0:85b3fd62ea1a	282	#define SDMMC_OCR_ADDR_OUT_OF_RANGE 0x80000000U
NYX	0:85b3fd62ea1a	283	#define SDMMC_OCR_ADDR_MISALIGNED 0x40000000U
NYX	0:85b3fd62ea1a	284	#define SDMMC_OCR_BLOCK_LEN_ERR 0x20000000U
NYX	0:85b3fd62ea1a	285	#define SDMMC_OCR_ERASE_SEQ_ERR 0x10000000U
NYX	0:85b3fd62ea1a	286	#define SDMMC_OCR_BAD_ERASE_PARAM 0x08000000U
NYX	0:85b3fd62ea1a	287	#define SDMMC_OCR_WRITE_PROT_VIOLATION 0x04000000U
NYX	0:85b3fd62ea1a	288	#define SDMMC_OCR_LOCK_UNLOCK_FAILED 0x01000000U
NYX	0:85b3fd62ea1a	289	#define SDMMC_OCR_COM_CRC_FAILED 0x00800000U
NYX	0:85b3fd62ea1a	290	#define SDMMC_OCR_ILLEGAL_CMD 0x00400000U
NYX	0:85b3fd62ea1a	291	#define SDMMC_OCR_CARD_ECC_FAILED 0x00200000U
NYX	0:85b3fd62ea1a	292	#define SDMMC_OCR_CC_ERROR 0x00100000U
NYX	0:85b3fd62ea1a	293	#define SDMMC_OCR_GENERAL_UNKNOWN_ERROR 0x00080000U
NYX	0:85b3fd62ea1a	294	#define SDMMC_OCR_STREAM_READ_UNDERRUN 0x00040000U
NYX	0:85b3fd62ea1a	295	#define SDMMC_OCR_STREAM_WRITE_OVERRUN 0x00020000U
NYX	0:85b3fd62ea1a	296	#define SDMMC_OCR_CID_CSD_OVERWRITE 0x00010000U
NYX	0:85b3fd62ea1a	297	#define SDMMC_OCR_WP_ERASE_SKIP 0x00008000U
NYX	0:85b3fd62ea1a	298	#define SDMMC_OCR_CARD_ECC_DISABLED 0x00004000U
NYX	0:85b3fd62ea1a	299	#define SDMMC_OCR_ERASE_RESET 0x00002000U
NYX	0:85b3fd62ea1a	300	#define SDMMC_OCR_AKE_SEQ_ERROR 0x00000008U
NYX	0:85b3fd62ea1a	301	#define SDMMC_OCR_ERRORBITS 0xFDFFE008U
NYX	0:85b3fd62ea1a	302
NYX	0:85b3fd62ea1a	303	/**
NYX	0:85b3fd62ea1a	304	* @brief Masks for R6 Response
NYX	0:85b3fd62ea1a	305	*/
NYX	0:85b3fd62ea1a	306	#define SDMMC_R6_GENERAL_UNKNOWN_ERROR 0x00002000U
NYX	0:85b3fd62ea1a	307	#define SDMMC_R6_ILLEGAL_CMD 0x00004000U
NYX	0:85b3fd62ea1a	308	#define SDMMC_R6_COM_CRC_FAILED 0x00008000U
NYX	0:85b3fd62ea1a	309
NYX	0:85b3fd62ea1a	310	#define SDMMC_VOLTAGE_WINDOW_SD 0x80100000U
NYX	0:85b3fd62ea1a	311	#define SDMMC_HIGH_CAPACITY 0x40000000U
NYX	0:85b3fd62ea1a	312	#define SDMMC_STD_CAPACITY 0x00000000U
NYX	0:85b3fd62ea1a	313	#define SDMMC_CHECK_PATTERN 0x000001AAU
NYX	0:85b3fd62ea1a	314
NYX	0:85b3fd62ea1a	315	#define SDMMC_MAX_VOLT_TRIAL 0x0000FFFFU
NYX	0:85b3fd62ea1a	316
NYX	0:85b3fd62ea1a	317	#define SDMMC_MAX_TRIAL 0x0000FFFFU
NYX	0:85b3fd62ea1a	318
NYX	0:85b3fd62ea1a	319	#define SDMMC_ALLZERO 0x00000000U
NYX	0:85b3fd62ea1a	320
NYX	0:85b3fd62ea1a	321	#define SDMMC_WIDE_BUS_SUPPORT 0x00040000U
NYX	0:85b3fd62ea1a	322	#define SDMMC_SINGLE_BUS_SUPPORT 0x00010000U
NYX	0:85b3fd62ea1a	323	#define SDMMC_CARD_LOCKED 0x02000000U
NYX	0:85b3fd62ea1a	324
NYX	0:85b3fd62ea1a	325	#define SDMMC_DATATIMEOUT 0xFFFFFFFFU
NYX	0:85b3fd62ea1a	326
NYX	0:85b3fd62ea1a	327	#define SDMMC_0TO7BITS 0x000000FFU
NYX	0:85b3fd62ea1a	328	#define SDMMC_8TO15BITS 0x0000FF00U
NYX	0:85b3fd62ea1a	329	#define SDMMC_16TO23BITS 0x00FF0000U
NYX	0:85b3fd62ea1a	330	#define SDMMC_24TO31BITS 0xFF000000U
NYX	0:85b3fd62ea1a	331	#define SDMMC_MAX_DATA_LENGTH 0x01FFFFFFU
NYX	0:85b3fd62ea1a	332
NYX	0:85b3fd62ea1a	333	#define SDMMC_HALFFIFO 0x00000008U
NYX	0:85b3fd62ea1a	334	#define SDMMC_HALFFIFOBYTES 0x00000020U
NYX	0:85b3fd62ea1a	335
NYX	0:85b3fd62ea1a	336	/**
NYX	0:85b3fd62ea1a	337	* @brief Command Class supported
NYX	0:85b3fd62ea1a	338	*/
NYX	0:85b3fd62ea1a	339	#define SDIO_CCCC_ERASE 0x00000020U
NYX	0:85b3fd62ea1a	340
NYX	0:85b3fd62ea1a	341	#define SDIO_CMDTIMEOUT 5000U /* Command send and response timeout */
NYX	0:85b3fd62ea1a	342	#define SDIO_MAXERASETIMEOUT 63000U /* Max erase Timeout 63 s */
NYX	0:85b3fd62ea1a	343
NYX	0:85b3fd62ea1a	344
NYX	0:85b3fd62ea1a	345	/** @defgroup SDIO_LL_Clock_Edge Clock Edge
NYX	0:85b3fd62ea1a	346	* @{
NYX	0:85b3fd62ea1a	347	*/
NYX	0:85b3fd62ea1a	348	#define SDIO_CLOCK_EDGE_RISING 0x00000000U
NYX	0:85b3fd62ea1a	349	#define SDIO_CLOCK_EDGE_FALLING SDIO_CLKCR_NEGEDGE
NYX	0:85b3fd62ea1a	350
NYX	0:85b3fd62ea1a	351	#define IS_SDIO_CLOCK_EDGE(EDGE) (((EDGE) == SDIO_CLOCK_EDGE_RISING) \|\| \
NYX	0:85b3fd62ea1a	352	((EDGE) == SDIO_CLOCK_EDGE_FALLING))
NYX	0:85b3fd62ea1a	353	/**
NYX	0:85b3fd62ea1a	354	* @}
NYX	0:85b3fd62ea1a	355	*/
NYX	0:85b3fd62ea1a	356
NYX	0:85b3fd62ea1a	357	/** @defgroup SDIO_LL_Clock_Bypass Clock Bypass
NYX	0:85b3fd62ea1a	358	* @{
NYX	0:85b3fd62ea1a	359	*/
NYX	0:85b3fd62ea1a	360	#define SDIO_CLOCK_BYPASS_DISABLE 0x00000000U
NYX	0:85b3fd62ea1a	361	#define SDIO_CLOCK_BYPASS_ENABLE SDIO_CLKCR_BYPASS
NYX	0:85b3fd62ea1a	362
NYX	0:85b3fd62ea1a	363	#define IS_SDIO_CLOCK_BYPASS(BYPASS) (((BYPASS) == SDIO_CLOCK_BYPASS_DISABLE) \|\| \
NYX	0:85b3fd62ea1a	364	((BYPASS) == SDIO_CLOCK_BYPASS_ENABLE))
NYX	0:85b3fd62ea1a	365	/**
NYX	0:85b3fd62ea1a	366	* @}
NYX	0:85b3fd62ea1a	367	*/
NYX	0:85b3fd62ea1a	368
NYX	0:85b3fd62ea1a	369	/** @defgroup SDIO_LL_Clock_Power_Save Clock Power Saving
NYX	0:85b3fd62ea1a	370	* @{
NYX	0:85b3fd62ea1a	371	*/
NYX	0:85b3fd62ea1a	372	#define SDIO_CLOCK_POWER_SAVE_DISABLE 0x00000000U
NYX	0:85b3fd62ea1a	373	#define SDIO_CLOCK_POWER_SAVE_ENABLE SDIO_CLKCR_PWRSAV
NYX	0:85b3fd62ea1a	374
NYX	0:85b3fd62ea1a	375	#define IS_SDIO_CLOCK_POWER_SAVE(SAVE) (((SAVE) == SDIO_CLOCK_POWER_SAVE_DISABLE) \|\| \
NYX	0:85b3fd62ea1a	376	((SAVE) == SDIO_CLOCK_POWER_SAVE_ENABLE))
NYX	0:85b3fd62ea1a	377	/**
NYX	0:85b3fd62ea1a	378	* @}
NYX	0:85b3fd62ea1a	379	*/
NYX	0:85b3fd62ea1a	380
NYX	0:85b3fd62ea1a	381	/** @defgroup SDIO_LL_Bus_Wide Bus Width
NYX	0:85b3fd62ea1a	382	* @{
NYX	0:85b3fd62ea1a	383	*/
NYX	0:85b3fd62ea1a	384	#define SDIO_BUS_WIDE_1B 0x00000000U
NYX	0:85b3fd62ea1a	385	#define SDIO_BUS_WIDE_4B SDIO_CLKCR_WIDBUS_0
NYX	0:85b3fd62ea1a	386	#define SDIO_BUS_WIDE_8B SDIO_CLKCR_WIDBUS_1
NYX	0:85b3fd62ea1a	387
NYX	0:85b3fd62ea1a	388	#define IS_SDIO_BUS_WIDE(WIDE) (((WIDE) == SDIO_BUS_WIDE_1B) \|\| \
NYX	0:85b3fd62ea1a	389	((WIDE) == SDIO_BUS_WIDE_4B) \|\| \
NYX	0:85b3fd62ea1a	390	((WIDE) == SDIO_BUS_WIDE_8B))
NYX	0:85b3fd62ea1a	391	/**
NYX	0:85b3fd62ea1a	392	* @}
NYX	0:85b3fd62ea1a	393	*/
NYX	0:85b3fd62ea1a	394
NYX	0:85b3fd62ea1a	395	/** @defgroup SDIO_LL_Hardware_Flow_Control Hardware Flow Control
NYX	0:85b3fd62ea1a	396	* @{
NYX	0:85b3fd62ea1a	397	*/
NYX	0:85b3fd62ea1a	398	#define SDIO_HARDWARE_FLOW_CONTROL_DISABLE 0x00000000U
NYX	0:85b3fd62ea1a	399	#define SDIO_HARDWARE_FLOW_CONTROL_ENABLE SDIO_CLKCR_HWFC_EN
NYX	0:85b3fd62ea1a	400
NYX	0:85b3fd62ea1a	401	#define IS_SDIO_HARDWARE_FLOW_CONTROL(CONTROL) (((CONTROL) == SDIO_HARDWARE_FLOW_CONTROL_DISABLE) \|\| \
NYX	0:85b3fd62ea1a	402	((CONTROL) == SDIO_HARDWARE_FLOW_CONTROL_ENABLE))
NYX	0:85b3fd62ea1a	403	/**
NYX	0:85b3fd62ea1a	404	* @}
NYX	0:85b3fd62ea1a	405	*/
NYX	0:85b3fd62ea1a	406
NYX	0:85b3fd62ea1a	407	/** @defgroup SDIO_LL_Clock_Division Clock Division
NYX	0:85b3fd62ea1a	408	* @{
NYX	0:85b3fd62ea1a	409	*/
NYX	0:85b3fd62ea1a	410	#define IS_SDIO_CLKDIV(DIV) ((DIV) <= 0xFFU)
NYX	0:85b3fd62ea1a	411	/**
NYX	0:85b3fd62ea1a	412	* @}
NYX	0:85b3fd62ea1a	413	*/
NYX	0:85b3fd62ea1a	414
NYX	0:85b3fd62ea1a	415	/** @defgroup SDIO_LL_Command_Index Command Index
NYX	0:85b3fd62ea1a	416	* @{
NYX	0:85b3fd62ea1a	417	*/
NYX	0:85b3fd62ea1a	418	#define IS_SDIO_CMD_INDEX(INDEX) ((INDEX) < 0x40U)
NYX	0:85b3fd62ea1a	419	/**
NYX	0:85b3fd62ea1a	420	* @}
NYX	0:85b3fd62ea1a	421	*/
NYX	0:85b3fd62ea1a	422
NYX	0:85b3fd62ea1a	423	/** @defgroup SDIO_LL_Response_Type Response Type
NYX	0:85b3fd62ea1a	424	* @{
NYX	0:85b3fd62ea1a	425	*/
NYX	0:85b3fd62ea1a	426	#define SDIO_RESPONSE_NO 0x00000000U
NYX	0:85b3fd62ea1a	427	#define SDIO_RESPONSE_SHORT SDIO_CMD_WAITRESP_0
NYX	0:85b3fd62ea1a	428	#define SDIO_RESPONSE_LONG SDIO_CMD_WAITRESP
NYX	0:85b3fd62ea1a	429
NYX	0:85b3fd62ea1a	430	#define IS_SDIO_RESPONSE(RESPONSE) (((RESPONSE) == SDIO_RESPONSE_NO) \|\| \
NYX	0:85b3fd62ea1a	431	((RESPONSE) == SDIO_RESPONSE_SHORT) \|\| \
NYX	0:85b3fd62ea1a	432	((RESPONSE) == SDIO_RESPONSE_LONG))
NYX	0:85b3fd62ea1a	433	/**
NYX	0:85b3fd62ea1a	434	* @}
NYX	0:85b3fd62ea1a	435	*/
NYX	0:85b3fd62ea1a	436
NYX	0:85b3fd62ea1a	437	/** @defgroup SDIO_LL_Wait_Interrupt_State Wait Interrupt
NYX	0:85b3fd62ea1a	438	* @{
NYX	0:85b3fd62ea1a	439	*/
NYX	0:85b3fd62ea1a	440	#define SDIO_WAIT_NO 0x00000000U
NYX	0:85b3fd62ea1a	441	#define SDIO_WAIT_IT SDIO_CMD_WAITINT
NYX	0:85b3fd62ea1a	442	#define SDIO_WAIT_PEND SDIO_CMD_WAITPEND
NYX	0:85b3fd62ea1a	443
NYX	0:85b3fd62ea1a	444	#define IS_SDIO_WAIT(WAIT) (((WAIT) == SDIO_WAIT_NO) \|\| \
NYX	0:85b3fd62ea1a	445	((WAIT) == SDIO_WAIT_IT) \|\| \
NYX	0:85b3fd62ea1a	446	((WAIT) == SDIO_WAIT_PEND))
NYX	0:85b3fd62ea1a	447	/**
NYX	0:85b3fd62ea1a	448	* @}
NYX	0:85b3fd62ea1a	449	*/
NYX	0:85b3fd62ea1a	450
NYX	0:85b3fd62ea1a	451	/** @defgroup SDIO_LL_CPSM_State CPSM State
NYX	0:85b3fd62ea1a	452	* @{
NYX	0:85b3fd62ea1a	453	*/
NYX	0:85b3fd62ea1a	454	#define SDIO_CPSM_DISABLE 0x00000000U
NYX	0:85b3fd62ea1a	455	#define SDIO_CPSM_ENABLE SDIO_CMD_CPSMEN
NYX	0:85b3fd62ea1a	456
NYX	0:85b3fd62ea1a	457	#define IS_SDIO_CPSM(CPSM) (((CPSM) == SDIO_CPSM_DISABLE) \|\| \
NYX	0:85b3fd62ea1a	458	((CPSM) == SDIO_CPSM_ENABLE))
NYX	0:85b3fd62ea1a	459	/**
NYX	0:85b3fd62ea1a	460	* @}
NYX	0:85b3fd62ea1a	461	*/
NYX	0:85b3fd62ea1a	462
NYX	0:85b3fd62ea1a	463	/** @defgroup SDIO_LL_Response_Registers Response Register
NYX	0:85b3fd62ea1a	464	* @{
NYX	0:85b3fd62ea1a	465	*/
NYX	0:85b3fd62ea1a	466	#define SDIO_RESP1 0x00000000U
NYX	0:85b3fd62ea1a	467	#define SDIO_RESP2 0x00000004U
NYX	0:85b3fd62ea1a	468	#define SDIO_RESP3 0x00000008U
NYX	0:85b3fd62ea1a	469	#define SDIO_RESP4 0x0000000CU
NYX	0:85b3fd62ea1a	470
NYX	0:85b3fd62ea1a	471	#define IS_SDIO_RESP(RESP) (((RESP) == SDIO_RESP1) \|\| \
NYX	0:85b3fd62ea1a	472	((RESP) == SDIO_RESP2) \|\| \
NYX	0:85b3fd62ea1a	473	((RESP) == SDIO_RESP3) \|\| \
NYX	0:85b3fd62ea1a	474	((RESP) == SDIO_RESP4))
NYX	0:85b3fd62ea1a	475	/**
NYX	0:85b3fd62ea1a	476	* @}
NYX	0:85b3fd62ea1a	477	*/
NYX	0:85b3fd62ea1a	478
NYX	0:85b3fd62ea1a	479	/** @defgroup SDIO_LL_Data_Length Data Lenght
NYX	0:85b3fd62ea1a	480	* @{
NYX	0:85b3fd62ea1a	481	*/
NYX	0:85b3fd62ea1a	482	#define IS_SDIO_DATA_LENGTH(LENGTH) ((LENGTH) <= 0x01FFFFFFU)
NYX	0:85b3fd62ea1a	483	/**
NYX	0:85b3fd62ea1a	484	* @}
NYX	0:85b3fd62ea1a	485	*/
NYX	0:85b3fd62ea1a	486
NYX	0:85b3fd62ea1a	487	/** @defgroup SDIO_LL_Data_Block_Size Data Block Size
NYX	0:85b3fd62ea1a	488	* @{
NYX	0:85b3fd62ea1a	489	*/
NYX	0:85b3fd62ea1a	490	#define SDIO_DATABLOCK_SIZE_1B 0x00000000U
NYX	0:85b3fd62ea1a	491	#define SDIO_DATABLOCK_SIZE_2B SDIO_DCTRL_DBLOCKSIZE_0
NYX	0:85b3fd62ea1a	492	#define SDIO_DATABLOCK_SIZE_4B SDIO_DCTRL_DBLOCKSIZE_1
NYX	0:85b3fd62ea1a	493	#define SDIO_DATABLOCK_SIZE_8B (SDIO_DCTRL_DBLOCKSIZE_0\|SDIO_DCTRL_DBLOCKSIZE_1)
NYX	0:85b3fd62ea1a	494	#define SDIO_DATABLOCK_SIZE_16B SDIO_DCTRL_DBLOCKSIZE_2
NYX	0:85b3fd62ea1a	495	#define SDIO_DATABLOCK_SIZE_32B (SDIO_DCTRL_DBLOCKSIZE_0\|SDIO_DCTRL_DBLOCKSIZE_2)
NYX	0:85b3fd62ea1a	496	#define SDIO_DATABLOCK_SIZE_64B (SDIO_DCTRL_DBLOCKSIZE_1\|SDIO_DCTRL_DBLOCKSIZE_2)
NYX	0:85b3fd62ea1a	497	#define SDIO_DATABLOCK_SIZE_128B (SDIO_DCTRL_DBLOCKSIZE_0\|SDIO_DCTRL_DBLOCKSIZE_1\|SDIO_DCTRL_DBLOCKSIZE_2)
NYX	0:85b3fd62ea1a	498	#define SDIO_DATABLOCK_SIZE_256B SDIO_DCTRL_DBLOCKSIZE_3
NYX	0:85b3fd62ea1a	499	#define SDIO_DATABLOCK_SIZE_512B (SDIO_DCTRL_DBLOCKSIZE_0\|SDIO_DCTRL_DBLOCKSIZE_3)
NYX	0:85b3fd62ea1a	500	#define SDIO_DATABLOCK_SIZE_1024B (SDIO_DCTRL_DBLOCKSIZE_1\|SDIO_DCTRL_DBLOCKSIZE_3)
NYX	0:85b3fd62ea1a	501	#define SDIO_DATABLOCK_SIZE_2048B (SDIO_DCTRL_DBLOCKSIZE_0\|SDIO_DCTRL_DBLOCKSIZE_1\|SDIO_DCTRL_DBLOCKSIZE_3)
NYX	0:85b3fd62ea1a	502	#define SDIO_DATABLOCK_SIZE_4096B (SDIO_DCTRL_DBLOCKSIZE_2\|SDIO_DCTRL_DBLOCKSIZE_3)
NYX	0:85b3fd62ea1a	503	#define SDIO_DATABLOCK_SIZE_8192B (SDIO_DCTRL_DBLOCKSIZE_0\|SDIO_DCTRL_DBLOCKSIZE_2\|SDIO_DCTRL_DBLOCKSIZE_3)
NYX	0:85b3fd62ea1a	504	#define SDIO_DATABLOCK_SIZE_16384B (SDIO_DCTRL_DBLOCKSIZE_1\|SDIO_DCTRL_DBLOCKSIZE_2\|SDIO_DCTRL_DBLOCKSIZE_3)
NYX	0:85b3fd62ea1a	505
NYX	0:85b3fd62ea1a	506	#define IS_SDIO_BLOCK_SIZE(SIZE) (((SIZE) == SDIO_DATABLOCK_SIZE_1B) \|\| \
NYX	0:85b3fd62ea1a	507	((SIZE) == SDIO_DATABLOCK_SIZE_2B) \|\| \
NYX	0:85b3fd62ea1a	508	((SIZE) == SDIO_DATABLOCK_SIZE_4B) \|\| \
NYX	0:85b3fd62ea1a	509	((SIZE) == SDIO_DATABLOCK_SIZE_8B) \|\| \
NYX	0:85b3fd62ea1a	510	((SIZE) == SDIO_DATABLOCK_SIZE_16B) \|\| \
NYX	0:85b3fd62ea1a	511	((SIZE) == SDIO_DATABLOCK_SIZE_32B) \|\| \
NYX	0:85b3fd62ea1a	512	((SIZE) == SDIO_DATABLOCK_SIZE_64B) \|\| \
NYX	0:85b3fd62ea1a	513	((SIZE) == SDIO_DATABLOCK_SIZE_128B) \|\| \
NYX	0:85b3fd62ea1a	514	((SIZE) == SDIO_DATABLOCK_SIZE_256B) \|\| \
NYX	0:85b3fd62ea1a	515	((SIZE) == SDIO_DATABLOCK_SIZE_512B) \|\| \
NYX	0:85b3fd62ea1a	516	((SIZE) == SDIO_DATABLOCK_SIZE_1024B) \|\| \
NYX	0:85b3fd62ea1a	517	((SIZE) == SDIO_DATABLOCK_SIZE_2048B) \|\| \
NYX	0:85b3fd62ea1a	518	((SIZE) == SDIO_DATABLOCK_SIZE_4096B) \|\| \
NYX	0:85b3fd62ea1a	519	((SIZE) == SDIO_DATABLOCK_SIZE_8192B) \|\| \
NYX	0:85b3fd62ea1a	520	((SIZE) == SDIO_DATABLOCK_SIZE_16384B))
NYX	0:85b3fd62ea1a	521	/**
NYX	0:85b3fd62ea1a	522	* @}
NYX	0:85b3fd62ea1a	523	*/
NYX	0:85b3fd62ea1a	524
NYX	0:85b3fd62ea1a	525	/** @defgroup SDIO_LL_Transfer_Direction Transfer Direction
NYX	0:85b3fd62ea1a	526	* @{
NYX	0:85b3fd62ea1a	527	*/
NYX	0:85b3fd62ea1a	528	#define SDIO_TRANSFER_DIR_TO_CARD 0x00000000U
NYX	0:85b3fd62ea1a	529	#define SDIO_TRANSFER_DIR_TO_SDIO SDIO_DCTRL_DTDIR
NYX	0:85b3fd62ea1a	530
NYX	0:85b3fd62ea1a	531	#define IS_SDIO_TRANSFER_DIR(DIR) (((DIR) == SDIO_TRANSFER_DIR_TO_CARD) \|\| \
NYX	0:85b3fd62ea1a	532	((DIR) == SDIO_TRANSFER_DIR_TO_SDIO))
NYX	0:85b3fd62ea1a	533	/**
NYX	0:85b3fd62ea1a	534	* @}
NYX	0:85b3fd62ea1a	535	*/
NYX	0:85b3fd62ea1a	536
NYX	0:85b3fd62ea1a	537	/** @defgroup SDIO_LL_Transfer_Type Transfer Type
NYX	0:85b3fd62ea1a	538	* @{
NYX	0:85b3fd62ea1a	539	*/
NYX	0:85b3fd62ea1a	540	#define SDIO_TRANSFER_MODE_BLOCK 0x00000000U
NYX	0:85b3fd62ea1a	541	#define SDIO_TRANSFER_MODE_STREAM SDIO_DCTRL_DTMODE
NYX	0:85b3fd62ea1a	542
NYX	0:85b3fd62ea1a	543	#define IS_SDIO_TRANSFER_MODE(MODE) (((MODE) == SDIO_TRANSFER_MODE_BLOCK) \|\| \
NYX	0:85b3fd62ea1a	544	((MODE) == SDIO_TRANSFER_MODE_STREAM))
NYX	0:85b3fd62ea1a	545	/**
NYX	0:85b3fd62ea1a	546	* @}
NYX	0:85b3fd62ea1a	547	*/
NYX	0:85b3fd62ea1a	548
NYX	0:85b3fd62ea1a	549	/** @defgroup SDIO_LL_DPSM_State DPSM State
NYX	0:85b3fd62ea1a	550	* @{
NYX	0:85b3fd62ea1a	551	*/
NYX	0:85b3fd62ea1a	552	#define SDIO_DPSM_DISABLE 0x00000000U
NYX	0:85b3fd62ea1a	553	#define SDIO_DPSM_ENABLE SDIO_DCTRL_DTEN
NYX	0:85b3fd62ea1a	554
NYX	0:85b3fd62ea1a	555	#define IS_SDIO_DPSM(DPSM) (((DPSM) == SDIO_DPSM_DISABLE) \|\|\
NYX	0:85b3fd62ea1a	556	((DPSM) == SDIO_DPSM_ENABLE))
NYX	0:85b3fd62ea1a	557	/**
NYX	0:85b3fd62ea1a	558	* @}
NYX	0:85b3fd62ea1a	559	*/
NYX	0:85b3fd62ea1a	560
NYX	0:85b3fd62ea1a	561	/** @defgroup SDIO_LL_Read_Wait_Mode Read Wait Mode
NYX	0:85b3fd62ea1a	562	* @{
NYX	0:85b3fd62ea1a	563	*/
NYX	0:85b3fd62ea1a	564	#define SDIO_READ_WAIT_MODE_DATA2 0x00000000U
NYX	0:85b3fd62ea1a	565	#define SDIO_READ_WAIT_MODE_CLK (SDIO_DCTRL_RWMOD)
NYX	0:85b3fd62ea1a	566
NYX	0:85b3fd62ea1a	567	#define IS_SDIO_READWAIT_MODE(MODE) (((MODE) == SDIO_READ_WAIT_MODE_CLK) \|\| \
NYX	0:85b3fd62ea1a	568	((MODE) == SDIO_READ_WAIT_MODE_DATA2))
NYX	0:85b3fd62ea1a	569	/**
NYX	0:85b3fd62ea1a	570	* @}
NYX	0:85b3fd62ea1a	571	*/
NYX	0:85b3fd62ea1a	572
NYX	0:85b3fd62ea1a	573	/** @defgroup SDIO_LL_Interrupt_sources Interrupt Sources
NYX	0:85b3fd62ea1a	574	* @{
NYX	0:85b3fd62ea1a	575	*/
NYX	0:85b3fd62ea1a	576	#define SDIO_IT_CCRCFAIL SDIO_STA_CCRCFAIL
NYX	0:85b3fd62ea1a	577	#define SDIO_IT_DCRCFAIL SDIO_STA_DCRCFAIL
NYX	0:85b3fd62ea1a	578	#define SDIO_IT_CTIMEOUT SDIO_STA_CTIMEOUT
NYX	0:85b3fd62ea1a	579	#define SDIO_IT_DTIMEOUT SDIO_STA_DTIMEOUT
NYX	0:85b3fd62ea1a	580	#define SDIO_IT_TXUNDERR SDIO_STA_TXUNDERR
NYX	0:85b3fd62ea1a	581	#define SDIO_IT_RXOVERR SDIO_STA_RXOVERR
NYX	0:85b3fd62ea1a	582	#define SDIO_IT_CMDREND SDIO_STA_CMDREND
NYX	0:85b3fd62ea1a	583	#define SDIO_IT_CMDSENT SDIO_STA_CMDSENT
NYX	0:85b3fd62ea1a	584	#define SDIO_IT_DATAEND SDIO_STA_DATAEND
NYX	0:85b3fd62ea1a	585	#define SDIO_IT_STBITERR SDIO_STA_STBITERR
NYX	0:85b3fd62ea1a	586	#define SDIO_IT_DBCKEND SDIO_STA_DBCKEND
NYX	0:85b3fd62ea1a	587	#define SDIO_IT_CMDACT SDIO_STA_CMDACT
NYX	0:85b3fd62ea1a	588	#define SDIO_IT_TXACT SDIO_STA_TXACT
NYX	0:85b3fd62ea1a	589	#define SDIO_IT_RXACT SDIO_STA_RXACT
NYX	0:85b3fd62ea1a	590	#define SDIO_IT_TXFIFOHE SDIO_STA_TXFIFOHE
NYX	0:85b3fd62ea1a	591	#define SDIO_IT_RXFIFOHF SDIO_STA_RXFIFOHF
NYX	0:85b3fd62ea1a	592	#define SDIO_IT_TXFIFOF SDIO_STA_TXFIFOF
NYX	0:85b3fd62ea1a	593	#define SDIO_IT_RXFIFOF SDIO_STA_RXFIFOF
NYX	0:85b3fd62ea1a	594	#define SDIO_IT_TXFIFOE SDIO_STA_TXFIFOE
NYX	0:85b3fd62ea1a	595	#define SDIO_IT_RXFIFOE SDIO_STA_RXFIFOE
NYX	0:85b3fd62ea1a	596	#define SDIO_IT_TXDAVL SDIO_STA_TXDAVL
NYX	0:85b3fd62ea1a	597	#define SDIO_IT_RXDAVL SDIO_STA_RXDAVL
NYX	0:85b3fd62ea1a	598	#define SDIO_IT_SDIOIT SDIO_STA_SDIOIT
NYX	0:85b3fd62ea1a	599	#define SDIO_IT_CEATAEND SDIO_STA_CEATAEND
NYX	0:85b3fd62ea1a	600	/**
NYX	0:85b3fd62ea1a	601	* @}
NYX	0:85b3fd62ea1a	602	*/
NYX	0:85b3fd62ea1a	603
NYX	0:85b3fd62ea1a	604	/** @defgroup SDIO_LL_Flags Flags
NYX	0:85b3fd62ea1a	605	* @{
NYX	0:85b3fd62ea1a	606	*/
NYX	0:85b3fd62ea1a	607	#define SDIO_FLAG_CCRCFAIL SDIO_STA_CCRCFAIL
NYX	0:85b3fd62ea1a	608	#define SDIO_FLAG_DCRCFAIL SDIO_STA_DCRCFAIL
NYX	0:85b3fd62ea1a	609	#define SDIO_FLAG_CTIMEOUT SDIO_STA_CTIMEOUT
NYX	0:85b3fd62ea1a	610	#define SDIO_FLAG_DTIMEOUT SDIO_STA_DTIMEOUT
NYX	0:85b3fd62ea1a	611	#define SDIO_FLAG_TXUNDERR SDIO_STA_TXUNDERR
NYX	0:85b3fd62ea1a	612	#define SDIO_FLAG_RXOVERR SDIO_STA_RXOVERR
NYX	0:85b3fd62ea1a	613	#define SDIO_FLAG_CMDREND SDIO_STA_CMDREND
NYX	0:85b3fd62ea1a	614	#define SDIO_FLAG_CMDSENT SDIO_STA_CMDSENT
NYX	0:85b3fd62ea1a	615	#define SDIO_FLAG_DATAEND SDIO_STA_DATAEND
NYX	0:85b3fd62ea1a	616	#define SDIO_FLAG_STBITERR SDIO_STA_STBITERR
NYX	0:85b3fd62ea1a	617	#define SDIO_FLAG_DBCKEND SDIO_STA_DBCKEND
NYX	0:85b3fd62ea1a	618	#define SDIO_FLAG_CMDACT SDIO_STA_CMDACT
NYX	0:85b3fd62ea1a	619	#define SDIO_FLAG_TXACT SDIO_STA_TXACT
NYX	0:85b3fd62ea1a	620	#define SDIO_FLAG_RXACT SDIO_STA_RXACT
NYX	0:85b3fd62ea1a	621	#define SDIO_FLAG_TXFIFOHE SDIO_STA_TXFIFOHE
NYX	0:85b3fd62ea1a	622	#define SDIO_FLAG_RXFIFOHF SDIO_STA_RXFIFOHF
NYX	0:85b3fd62ea1a	623	#define SDIO_FLAG_TXFIFOF SDIO_STA_TXFIFOF
NYX	0:85b3fd62ea1a	624	#define SDIO_FLAG_RXFIFOF SDIO_STA_RXFIFOF
NYX	0:85b3fd62ea1a	625	#define SDIO_FLAG_TXFIFOE SDIO_STA_TXFIFOE
NYX	0:85b3fd62ea1a	626	#define SDIO_FLAG_RXFIFOE SDIO_STA_RXFIFOE
NYX	0:85b3fd62ea1a	627	#define SDIO_FLAG_TXDAVL SDIO_STA_TXDAVL
NYX	0:85b3fd62ea1a	628	#define SDIO_FLAG_RXDAVL SDIO_STA_RXDAVL
NYX	0:85b3fd62ea1a	629	#define SDIO_FLAG_SDIOIT SDIO_STA_SDIOIT
NYX	0:85b3fd62ea1a	630	#define SDIO_FLAG_CEATAEND SDIO_STA_CEATAEND
NYX	0:85b3fd62ea1a	631	#define SDIO_STATIC_FLAGS ((uint32_t)(SDIO_FLAG_CCRCFAIL \| SDIO_FLAG_DCRCFAIL \| SDIO_FLAG_CTIMEOUT \|\
NYX	0:85b3fd62ea1a	632	SDIO_FLAG_DTIMEOUT \| SDIO_FLAG_TXUNDERR \| SDIO_FLAG_RXOVERR \|\
NYX	0:85b3fd62ea1a	633	SDIO_FLAG_CMDREND \| SDIO_FLAG_CMDSENT \| SDIO_FLAG_DATAEND \|\
NYX	0:85b3fd62ea1a	634	SDIO_FLAG_DBCKEND))
NYX	0:85b3fd62ea1a	635	/**
NYX	0:85b3fd62ea1a	636	* @}
NYX	0:85b3fd62ea1a	637	*/
NYX	0:85b3fd62ea1a	638
NYX	0:85b3fd62ea1a	639	/**
NYX	0:85b3fd62ea1a	640	* @}
NYX	0:85b3fd62ea1a	641	*/
NYX	0:85b3fd62ea1a	642
NYX	0:85b3fd62ea1a	643	/* Exported macro ------------------------------------------------------------*/
NYX	0:85b3fd62ea1a	644	/** @defgroup SDIO_LL_Exported_macros SDIO_LL Exported Macros
NYX	0:85b3fd62ea1a	645	* @{
NYX	0:85b3fd62ea1a	646	*/
NYX	0:85b3fd62ea1a	647
NYX	0:85b3fd62ea1a	648	/** @defgroup SDMMC_LL_Alias_Region Bit Address in the alias region
NYX	0:85b3fd62ea1a	649	* @{
NYX	0:85b3fd62ea1a	650	*/
NYX	0:85b3fd62ea1a	651	/* ------------ SDIO registers bit address in the alias region -------------- */
NYX	0:85b3fd62ea1a	652	#define SDIO_OFFSET (SDIO_BASE - PERIPH_BASE)
NYX	0:85b3fd62ea1a	653
NYX	0:85b3fd62ea1a	654	/* --- CLKCR Register ---*/
NYX	0:85b3fd62ea1a	655	/* Alias word address of CLKEN bit */
NYX	0:85b3fd62ea1a	656	#define CLKCR_OFFSET (SDIO_OFFSET + 0x04U)
NYX	0:85b3fd62ea1a	657	#define CLKEN_BITNUMBER 0x08U
NYX	0:85b3fd62ea1a	658	#define CLKCR_CLKEN_BB (PERIPH_BB_BASE + (CLKCR_OFFSET * 32U) + (CLKEN_BITNUMBER * 4U))
NYX	0:85b3fd62ea1a	659
NYX	0:85b3fd62ea1a	660	/* --- CMD Register ---*/
NYX	0:85b3fd62ea1a	661	/* Alias word address of SDIOSUSPEND bit */
NYX	0:85b3fd62ea1a	662	#define CMD_OFFSET (SDIO_OFFSET + 0x0CU)
NYX	0:85b3fd62ea1a	663	#define SDIOSUSPEND_BITNUMBER 0x0BU
NYX	0:85b3fd62ea1a	664	#define CMD_SDIOSUSPEND_BB (PERIPH_BB_BASE + (CMD_OFFSET * 32U) + (SDIOSUSPEND_BITNUMBER * 4U))
NYX	0:85b3fd62ea1a	665
NYX	0:85b3fd62ea1a	666	/* Alias word address of ENCMDCOMPL bit */
NYX	0:85b3fd62ea1a	667	#define ENCMDCOMPL_BITNUMBER 0x0CU
NYX	0:85b3fd62ea1a	668	#define CMD_ENCMDCOMPL_BB (PERIPH_BB_BASE + (CMD_OFFSET * 32U) + (ENCMDCOMPL_BITNUMBER * 4U))
NYX	0:85b3fd62ea1a	669
NYX	0:85b3fd62ea1a	670	/* Alias word address of NIEN bit */
NYX	0:85b3fd62ea1a	671	#define NIEN_BITNUMBER 0x0DU
NYX	0:85b3fd62ea1a	672	#define CMD_NIEN_BB (PERIPH_BB_BASE + (CMD_OFFSET * 32U) + (NIEN_BITNUMBER * 4U))
NYX	0:85b3fd62ea1a	673
NYX	0:85b3fd62ea1a	674	/* Alias word address of ATACMD bit */
NYX	0:85b3fd62ea1a	675	#define ATACMD_BITNUMBER 0x0EU
NYX	0:85b3fd62ea1a	676	#define CMD_ATACMD_BB (PERIPH_BB_BASE + (CMD_OFFSET * 32U) + (ATACMD_BITNUMBER * 4U))
NYX	0:85b3fd62ea1a	677
NYX	0:85b3fd62ea1a	678	/* --- DCTRL Register ---*/
NYX	0:85b3fd62ea1a	679	/* Alias word address of DMAEN bit */
NYX	0:85b3fd62ea1a	680	#define DCTRL_OFFSET (SDIO_OFFSET + 0x2CU)
NYX	0:85b3fd62ea1a	681	#define DMAEN_BITNUMBER 0x03U
NYX	0:85b3fd62ea1a	682	#define DCTRL_DMAEN_BB (PERIPH_BB_BASE + (DCTRL_OFFSET * 32U) + (DMAEN_BITNUMBER * 4U))
NYX	0:85b3fd62ea1a	683
NYX	0:85b3fd62ea1a	684	/* Alias word address of RWSTART bit */
NYX	0:85b3fd62ea1a	685	#define RWSTART_BITNUMBER 0x08U
NYX	0:85b3fd62ea1a	686	#define DCTRL_RWSTART_BB (PERIPH_BB_BASE + (DCTRL_OFFSET * 32U) + (RWSTART_BITNUMBER * 4U))
NYX	0:85b3fd62ea1a	687
NYX	0:85b3fd62ea1a	688	/* Alias word address of RWSTOP bit */
NYX	0:85b3fd62ea1a	689	#define RWSTOP_BITNUMBER 0x09U
NYX	0:85b3fd62ea1a	690	#define DCTRL_RWSTOP_BB (PERIPH_BB_BASE + (DCTRL_OFFSET * 32U) + (RWSTOP_BITNUMBER * 4U))
NYX	0:85b3fd62ea1a	691
NYX	0:85b3fd62ea1a	692	/* Alias word address of RWMOD bit */
NYX	0:85b3fd62ea1a	693	#define RWMOD_BITNUMBER 0x0AU
NYX	0:85b3fd62ea1a	694	#define DCTRL_RWMOD_BB (PERIPH_BB_BASE + (DCTRL_OFFSET * 32U) + (RWMOD_BITNUMBER * 4U))
NYX	0:85b3fd62ea1a	695
NYX	0:85b3fd62ea1a	696	/* Alias word address of SDIOEN bit */
NYX	0:85b3fd62ea1a	697	#define SDIOEN_BITNUMBER 0x0BU
NYX	0:85b3fd62ea1a	698	#define DCTRL_SDIOEN_BB (PERIPH_BB_BASE + (DCTRL_OFFSET * 32U) + (SDIOEN_BITNUMBER * 4U))
NYX	0:85b3fd62ea1a	699	/**
NYX	0:85b3fd62ea1a	700	* @}
NYX	0:85b3fd62ea1a	701	*/
NYX	0:85b3fd62ea1a	702
NYX	0:85b3fd62ea1a	703	/** @defgroup SDIO_LL_Register Bits And Addresses Definitions
NYX	0:85b3fd62ea1a	704	* @brief SDIO_LL registers bit address in the alias region
NYX	0:85b3fd62ea1a	705	* @{
NYX	0:85b3fd62ea1a	706	*/
NYX	0:85b3fd62ea1a	707	/* ---------------------- SDIO registers bit mask --------------------------- */
NYX	0:85b3fd62ea1a	708	/* --- CLKCR Register ---*/
NYX	0:85b3fd62ea1a	709	/* CLKCR register clear mask */
NYX	0:85b3fd62ea1a	710	#define CLKCR_CLEAR_MASK ((uint32_t)(SDIO_CLKCR_CLKDIV \| SDIO_CLKCR_PWRSAV \|\
NYX	0:85b3fd62ea1a	711	SDIO_CLKCR_BYPASS \| SDIO_CLKCR_WIDBUS \|\
NYX	0:85b3fd62ea1a	712	SDIO_CLKCR_NEGEDGE \| SDIO_CLKCR_HWFC_EN))
NYX	0:85b3fd62ea1a	713
NYX	0:85b3fd62ea1a	714	/* --- DCTRL Register ---*/
NYX	0:85b3fd62ea1a	715	/* SDIO DCTRL Clear Mask */
NYX	0:85b3fd62ea1a	716	#define DCTRL_CLEAR_MASK ((uint32_t)(SDIO_DCTRL_DTEN \| SDIO_DCTRL_DTDIR \|\
NYX	0:85b3fd62ea1a	717	SDIO_DCTRL_DTMODE \| SDIO_DCTRL_DBLOCKSIZE))
NYX	0:85b3fd62ea1a	718
NYX	0:85b3fd62ea1a	719	/* --- CMD Register ---*/
NYX	0:85b3fd62ea1a	720	/* CMD Register clear mask */
NYX	0:85b3fd62ea1a	721	#define CMD_CLEAR_MASK ((uint32_t)(SDIO_CMD_CMDINDEX \| SDIO_CMD_WAITRESP \|\
NYX	0:85b3fd62ea1a	722	SDIO_CMD_WAITINT \| SDIO_CMD_WAITPEND \|\
NYX	0:85b3fd62ea1a	723	SDIO_CMD_CPSMEN \| SDIO_CMD_SDIOSUSPEND))
NYX	0:85b3fd62ea1a	724
NYX	0:85b3fd62ea1a	725	/* SDIO Initialization Frequency (400KHz max) */
NYX	0:85b3fd62ea1a	726	#define SDIO_INIT_CLK_DIV ((uint8_t)0x76)
NYX	0:85b3fd62ea1a	727
NYX	0:85b3fd62ea1a	728	/* SDIO Data Transfer Frequency (25MHz max) */
NYX	0:85b3fd62ea1a	729	#define SDIO_TRANSFER_CLK_DIV ((uint8_t)0x0)
NYX	0:85b3fd62ea1a	730
NYX	0:85b3fd62ea1a	731	/**
NYX	0:85b3fd62ea1a	732	* @}
NYX	0:85b3fd62ea1a	733	*/
NYX	0:85b3fd62ea1a	734
NYX	0:85b3fd62ea1a	735	/** @defgroup SDIO_LL_Interrupt_Clock Interrupt And Clock Configuration
NYX	0:85b3fd62ea1a	736	* @brief macros to handle interrupts and specific clock configurations
NYX	0:85b3fd62ea1a	737	* @{
NYX	0:85b3fd62ea1a	738	*/
NYX	0:85b3fd62ea1a	739
NYX	0:85b3fd62ea1a	740	/**
NYX	0:85b3fd62ea1a	741	* @brief Enable the SDIO device.
NYX	0:85b3fd62ea1a	742	* @param __INSTANCE__: SDIO Instance
NYX	0:85b3fd62ea1a	743	* @retval None
NYX	0:85b3fd62ea1a	744	*/
NYX	0:85b3fd62ea1a	745	#define __SDIO_ENABLE(__INSTANCE__) ((__IO uint32_t )CLKCR_CLKEN_BB = ENABLE)
NYX	0:85b3fd62ea1a	746
NYX	0:85b3fd62ea1a	747	/**
NYX	0:85b3fd62ea1a	748	* @brief Disable the SDIO device.
NYX	0:85b3fd62ea1a	749	* @param __INSTANCE__: SDIO Instance
NYX	0:85b3fd62ea1a	750	* @retval None
NYX	0:85b3fd62ea1a	751	*/
NYX	0:85b3fd62ea1a	752	#define __SDIO_DISABLE(__INSTANCE__) ((__IO uint32_t )CLKCR_CLKEN_BB = DISABLE)
NYX	0:85b3fd62ea1a	753
NYX	0:85b3fd62ea1a	754	/**
NYX	0:85b3fd62ea1a	755	* @brief Enable the SDIO DMA transfer.
NYX	0:85b3fd62ea1a	756	* @param __INSTANCE__: SDIO Instance
NYX	0:85b3fd62ea1a	757	* @retval None
NYX	0:85b3fd62ea1a	758	*/
NYX	0:85b3fd62ea1a	759	#define __SDIO_DMA_ENABLE(__INSTANCE__) ((__IO uint32_t )DCTRL_DMAEN_BB = ENABLE)
NYX	0:85b3fd62ea1a	760	/**
NYX	0:85b3fd62ea1a	761	* @brief Disable the SDIO DMA transfer.
NYX	0:85b3fd62ea1a	762	* @param __INSTANCE__: SDIO Instance
NYX	0:85b3fd62ea1a	763	* @retval None
NYX	0:85b3fd62ea1a	764	*/
NYX	0:85b3fd62ea1a	765	#define __SDIO_DMA_DISABLE(__INSTANCE__) ((__IO uint32_t )DCTRL_DMAEN_BB = DISABLE)
NYX	0:85b3fd62ea1a	766
NYX	0:85b3fd62ea1a	767	/**
NYX	0:85b3fd62ea1a	768	* @brief Enable the SDIO device interrupt.
NYX	0:85b3fd62ea1a	769	* @param __INSTANCE__ : Pointer to SDIO register base
NYX	0:85b3fd62ea1a	770	* @param __INTERRUPT__ : specifies the SDIO interrupt sources to be enabled.
NYX	0:85b3fd62ea1a	771	* This parameter can be one or a combination of the following values:
NYX	0:85b3fd62ea1a	772	* @arg SDIO_IT_CCRCFAIL: Command response received (CRC check failed) interrupt
NYX	0:85b3fd62ea1a	773	* @arg SDIO_IT_DCRCFAIL: Data block sent/received (CRC check failed) interrupt
NYX	0:85b3fd62ea1a	774	* @arg SDIO_IT_CTIMEOUT: Command response timeout interrupt
NYX	0:85b3fd62ea1a	775	* @arg SDIO_IT_DTIMEOUT: Data timeout interrupt
NYX	0:85b3fd62ea1a	776	* @arg SDIO_IT_TXUNDERR: Transmit FIFO underrun error interrupt
NYX	0:85b3fd62ea1a	777	* @arg SDIO_IT_RXOVERR: Received FIFO overrun error interrupt
NYX	0:85b3fd62ea1a	778	* @arg SDIO_IT_CMDREND: Command response received (CRC check passed) interrupt
NYX	0:85b3fd62ea1a	779	* @arg SDIO_IT_CMDSENT: Command sent (no response required) interrupt
NYX	0:85b3fd62ea1a	780	* @arg SDIO_IT_DATAEND: Data end (data counter, SDIDCOUNT, is zero) interrupt
NYX	0:85b3fd62ea1a	781	* @arg SDIO_IT_DBCKEND: Data block sent/received (CRC check passed) interrupt
NYX	0:85b3fd62ea1a	782	* @arg SDIO_IT_CMDACT: Command transfer in progress interrupt
NYX	0:85b3fd62ea1a	783	* @arg SDIO_IT_TXACT: Data transmit in progress interrupt
NYX	0:85b3fd62ea1a	784	* @arg SDIO_IT_RXACT: Data receive in progress interrupt
NYX	0:85b3fd62ea1a	785	* @arg SDIO_IT_TXFIFOHE: Transmit FIFO Half Empty interrupt
NYX	0:85b3fd62ea1a	786	* @arg SDIO_IT_RXFIFOHF: Receive FIFO Half Full interrupt
NYX	0:85b3fd62ea1a	787	* @arg SDIO_IT_TXFIFOF: Transmit FIFO full interrupt
NYX	0:85b3fd62ea1a	788	* @arg SDIO_IT_RXFIFOF: Receive FIFO full interrupt
NYX	0:85b3fd62ea1a	789	* @arg SDIO_IT_TXFIFOE: Transmit FIFO empty interrupt
NYX	0:85b3fd62ea1a	790	* @arg SDIO_IT_RXFIFOE: Receive FIFO empty interrupt
NYX	0:85b3fd62ea1a	791	* @arg SDIO_IT_TXDAVL: Data available in transmit FIFO interrupt
NYX	0:85b3fd62ea1a	792	* @arg SDIO_IT_RXDAVL: Data available in receive FIFO interrupt
NYX	0:85b3fd62ea1a	793	* @arg SDIO_IT_SDIOIT: SD I/O interrupt received interrupt
NYX	0:85b3fd62ea1a	794	* @retval None
NYX	0:85b3fd62ea1a	795	*/
NYX	0:85b3fd62ea1a	796	#define __SDIO_ENABLE_IT(__INSTANCE__, __INTERRUPT__) ((__INSTANCE__)->MASK \|= (__INTERRUPT__))
NYX	0:85b3fd62ea1a	797
NYX	0:85b3fd62ea1a	798	/**
NYX	0:85b3fd62ea1a	799	* @brief Disable the SDIO device interrupt.
NYX	0:85b3fd62ea1a	800	* @param __INSTANCE__ : Pointer to SDIO register base
NYX	0:85b3fd62ea1a	801	* @param __INTERRUPT__ : specifies the SDIO interrupt sources to be disabled.
NYX	0:85b3fd62ea1a	802	* This parameter can be one or a combination of the following values:
NYX	0:85b3fd62ea1a	803	* @arg SDIO_IT_CCRCFAIL: Command response received (CRC check failed) interrupt
NYX	0:85b3fd62ea1a	804	* @arg SDIO_IT_DCRCFAIL: Data block sent/received (CRC check failed) interrupt
NYX	0:85b3fd62ea1a	805	* @arg SDIO_IT_CTIMEOUT: Command response timeout interrupt
NYX	0:85b3fd62ea1a	806	* @arg SDIO_IT_DTIMEOUT: Data timeout interrupt
NYX	0:85b3fd62ea1a	807	* @arg SDIO_IT_TXUNDERR: Transmit FIFO underrun error interrupt
NYX	0:85b3fd62ea1a	808	* @arg SDIO_IT_RXOVERR: Received FIFO overrun error interrupt
NYX	0:85b3fd62ea1a	809	* @arg SDIO_IT_CMDREND: Command response received (CRC check passed) interrupt
NYX	0:85b3fd62ea1a	810	* @arg SDIO_IT_CMDSENT: Command sent (no response required) interrupt
NYX	0:85b3fd62ea1a	811	* @arg SDIO_IT_DATAEND: Data end (data counter, SDIDCOUNT, is zero) interrupt
NYX	0:85b3fd62ea1a	812	* @arg SDIO_IT_DBCKEND: Data block sent/received (CRC check passed) interrupt
NYX	0:85b3fd62ea1a	813	* @arg SDIO_IT_CMDACT: Command transfer in progress interrupt
NYX	0:85b3fd62ea1a	814	* @arg SDIO_IT_TXACT: Data transmit in progress interrupt
NYX	0:85b3fd62ea1a	815	* @arg SDIO_IT_RXACT: Data receive in progress interrupt
NYX	0:85b3fd62ea1a	816	* @arg SDIO_IT_TXFIFOHE: Transmit FIFO Half Empty interrupt
NYX	0:85b3fd62ea1a	817	* @arg SDIO_IT_RXFIFOHF: Receive FIFO Half Full interrupt
NYX	0:85b3fd62ea1a	818	* @arg SDIO_IT_TXFIFOF: Transmit FIFO full interrupt
NYX	0:85b3fd62ea1a	819	* @arg SDIO_IT_RXFIFOF: Receive FIFO full interrupt
NYX	0:85b3fd62ea1a	820	* @arg SDIO_IT_TXFIFOE: Transmit FIFO empty interrupt
NYX	0:85b3fd62ea1a	821	* @arg SDIO_IT_RXFIFOE: Receive FIFO empty interrupt
NYX	0:85b3fd62ea1a	822	* @arg SDIO_IT_TXDAVL: Data available in transmit FIFO interrupt
NYX	0:85b3fd62ea1a	823	* @arg SDIO_IT_RXDAVL: Data available in receive FIFO interrupt
NYX	0:85b3fd62ea1a	824	* @arg SDIO_IT_SDIOIT: SD I/O interrupt received interrupt
NYX	0:85b3fd62ea1a	825	* @retval None
NYX	0:85b3fd62ea1a	826	*/
NYX	0:85b3fd62ea1a	827	#define __SDIO_DISABLE_IT(__INSTANCE__, __INTERRUPT__) ((__INSTANCE__)->MASK &= ~(__INTERRUPT__))
NYX	0:85b3fd62ea1a	828
NYX	0:85b3fd62ea1a	829	/**
NYX	0:85b3fd62ea1a	830	* @brief Checks whether the specified SDIO flag is set or not.
NYX	0:85b3fd62ea1a	831	* @param __INSTANCE__ : Pointer to SDIO register base
NYX	0:85b3fd62ea1a	832	* @param __FLAG__: specifies the flag to check.
NYX	0:85b3fd62ea1a	833	* This parameter can be one of the following values:
NYX	0:85b3fd62ea1a	834	* @arg SDIO_FLAG_CCRCFAIL: Command response received (CRC check failed)
NYX	0:85b3fd62ea1a	835	* @arg SDIO_FLAG_DCRCFAIL: Data block sent/received (CRC check failed)
NYX	0:85b3fd62ea1a	836	* @arg SDIO_FLAG_CTIMEOUT: Command response timeout
NYX	0:85b3fd62ea1a	837	* @arg SDIO_FLAG_DTIMEOUT: Data timeout
NYX	0:85b3fd62ea1a	838	* @arg SDIO_FLAG_TXUNDERR: Transmit FIFO underrun error
NYX	0:85b3fd62ea1a	839	* @arg SDIO_FLAG_RXOVERR: Received FIFO overrun error
NYX	0:85b3fd62ea1a	840	* @arg SDIO_FLAG_CMDREND: Command response received (CRC check passed)
NYX	0:85b3fd62ea1a	841	* @arg SDIO_FLAG_CMDSENT: Command sent (no response required)
NYX	0:85b3fd62ea1a	842	* @arg SDIO_FLAG_DATAEND: Data end (data counter, SDIDCOUNT, is zero)
NYX	0:85b3fd62ea1a	843	* @arg SDIO_FLAG_DBCKEND: Data block sent/received (CRC check passed)
NYX	0:85b3fd62ea1a	844	* @arg SDIO_FLAG_CMDACT: Command transfer in progress
NYX	0:85b3fd62ea1a	845	* @arg SDIO_FLAG_TXACT: Data transmit in progress
NYX	0:85b3fd62ea1a	846	* @arg SDIO_FLAG_RXACT: Data receive in progress
NYX	0:85b3fd62ea1a	847	* @arg SDIO_FLAG_TXFIFOHE: Transmit FIFO Half Empty
NYX	0:85b3fd62ea1a	848	* @arg SDIO_FLAG_RXFIFOHF: Receive FIFO Half Full
NYX	0:85b3fd62ea1a	849	* @arg SDIO_FLAG_TXFIFOF: Transmit FIFO full
NYX	0:85b3fd62ea1a	850	* @arg SDIO_FLAG_RXFIFOF: Receive FIFO full
NYX	0:85b3fd62ea1a	851	* @arg SDIO_FLAG_TXFIFOE: Transmit FIFO empty
NYX	0:85b3fd62ea1a	852	* @arg SDIO_FLAG_RXFIFOE: Receive FIFO empty
NYX	0:85b3fd62ea1a	853	* @arg SDIO_FLAG_TXDAVL: Data available in transmit FIFO
NYX	0:85b3fd62ea1a	854	* @arg SDIO_FLAG_RXDAVL: Data available in receive FIFO
NYX	0:85b3fd62ea1a	855	* @arg SDIO_FLAG_SDIOIT: SD I/O interrupt received
NYX	0:85b3fd62ea1a	856	* @retval The new state of SDIO_FLAG (SET or RESET).
NYX	0:85b3fd62ea1a	857	*/
NYX	0:85b3fd62ea1a	858	#define __SDIO_GET_FLAG(__INSTANCE__, __FLAG__) (((__INSTANCE__)->STA &(__FLAG__)) != RESET)
NYX	0:85b3fd62ea1a	859
NYX	0:85b3fd62ea1a	860
NYX	0:85b3fd62ea1a	861	/**
NYX	0:85b3fd62ea1a	862	* @brief Clears the SDIO pending flags.
NYX	0:85b3fd62ea1a	863	* @param __INSTANCE__ : Pointer to SDIO register base
NYX	0:85b3fd62ea1a	864	* @param __FLAG__: specifies the flag to clear.
NYX	0:85b3fd62ea1a	865	* This parameter can be one or a combination of the following values:
NYX	0:85b3fd62ea1a	866	* @arg SDIO_FLAG_CCRCFAIL: Command response received (CRC check failed)
NYX	0:85b3fd62ea1a	867	* @arg SDIO_FLAG_DCRCFAIL: Data block sent/received (CRC check failed)
NYX	0:85b3fd62ea1a	868	* @arg SDIO_FLAG_CTIMEOUT: Command response timeout
NYX	0:85b3fd62ea1a	869	* @arg SDIO_FLAG_DTIMEOUT: Data timeout
NYX	0:85b3fd62ea1a	870	* @arg SDIO_FLAG_TXUNDERR: Transmit FIFO underrun error
NYX	0:85b3fd62ea1a	871	* @arg SDIO_FLAG_RXOVERR: Received FIFO overrun error
NYX	0:85b3fd62ea1a	872	* @arg SDIO_FLAG_CMDREND: Command response received (CRC check passed)
NYX	0:85b3fd62ea1a	873	* @arg SDIO_FLAG_CMDSENT: Command sent (no response required)
NYX	0:85b3fd62ea1a	874	* @arg SDIO_FLAG_DATAEND: Data end (data counter, SDIDCOUNT, is zero)
NYX	0:85b3fd62ea1a	875	* @arg SDIO_FLAG_DBCKEND: Data block sent/received (CRC check passed)
NYX	0:85b3fd62ea1a	876	* @arg SDIO_FLAG_SDIOIT: SD I/O interrupt received
NYX	0:85b3fd62ea1a	877	* @retval None
NYX	0:85b3fd62ea1a	878	*/
NYX	0:85b3fd62ea1a	879	#define __SDIO_CLEAR_FLAG(__INSTANCE__, __FLAG__) ((__INSTANCE__)->ICR = (__FLAG__))
NYX	0:85b3fd62ea1a	880
NYX	0:85b3fd62ea1a	881	/**
NYX	0:85b3fd62ea1a	882	* @brief Checks whether the specified SDIO interrupt has occurred or not.
NYX	0:85b3fd62ea1a	883	* @param __INSTANCE__ : Pointer to SDIO register base
NYX	0:85b3fd62ea1a	884	* @param __INTERRUPT__: specifies the SDIO interrupt source to check.
NYX	0:85b3fd62ea1a	885	* This parameter can be one of the following values:
NYX	0:85b3fd62ea1a	886	* @arg SDIO_IT_CCRCFAIL: Command response received (CRC check failed) interrupt
NYX	0:85b3fd62ea1a	887	* @arg SDIO_IT_DCRCFAIL: Data block sent/received (CRC check failed) interrupt
NYX	0:85b3fd62ea1a	888	* @arg SDIO_IT_CTIMEOUT: Command response timeout interrupt
NYX	0:85b3fd62ea1a	889	* @arg SDIO_IT_DTIMEOUT: Data timeout interrupt
NYX	0:85b3fd62ea1a	890	* @arg SDIO_IT_TXUNDERR: Transmit FIFO underrun error interrupt
NYX	0:85b3fd62ea1a	891	* @arg SDIO_IT_RXOVERR: Received FIFO overrun error interrupt
NYX	0:85b3fd62ea1a	892	* @arg SDIO_IT_CMDREND: Command response received (CRC check passed) interrupt
NYX	0:85b3fd62ea1a	893	* @arg SDIO_IT_CMDSENT: Command sent (no response required) interrupt
NYX	0:85b3fd62ea1a	894	* @arg SDIO_IT_DATAEND: Data end (data counter, SDIDCOUNT, is zero) interrupt
NYX	0:85b3fd62ea1a	895	* @arg SDIO_IT_DBCKEND: Data block sent/received (CRC check passed) interrupt
NYX	0:85b3fd62ea1a	896	* @arg SDIO_IT_CMDACT: Command transfer in progress interrupt
NYX	0:85b3fd62ea1a	897	* @arg SDIO_IT_TXACT: Data transmit in progress interrupt
NYX	0:85b3fd62ea1a	898	* @arg SDIO_IT_RXACT: Data receive in progress interrupt
NYX	0:85b3fd62ea1a	899	* @arg SDIO_IT_TXFIFOHE: Transmit FIFO Half Empty interrupt
NYX	0:85b3fd62ea1a	900	* @arg SDIO_IT_RXFIFOHF: Receive FIFO Half Full interrupt
NYX	0:85b3fd62ea1a	901	* @arg SDIO_IT_TXFIFOF: Transmit FIFO full interrupt
NYX	0:85b3fd62ea1a	902	* @arg SDIO_IT_RXFIFOF: Receive FIFO full interrupt
NYX	0:85b3fd62ea1a	903	* @arg SDIO_IT_TXFIFOE: Transmit FIFO empty interrupt
NYX	0:85b3fd62ea1a	904	* @arg SDIO_IT_RXFIFOE: Receive FIFO empty interrupt
NYX	0:85b3fd62ea1a	905	* @arg SDIO_IT_TXDAVL: Data available in transmit FIFO interrupt
NYX	0:85b3fd62ea1a	906	* @arg SDIO_IT_RXDAVL: Data available in receive FIFO interrupt
NYX	0:85b3fd62ea1a	907	* @arg SDIO_IT_SDIOIT: SD I/O interrupt received interrupt
NYX	0:85b3fd62ea1a	908	* @retval The new state of SDIO_IT (SET or RESET).
NYX	0:85b3fd62ea1a	909	*/
NYX	0:85b3fd62ea1a	910	#define __SDIO_GET_IT (__INSTANCE__, __INTERRUPT__) (((__INSTANCE__)->STA &(__INTERRUPT__)) == (__INTERRUPT__))
NYX	0:85b3fd62ea1a	911
NYX	0:85b3fd62ea1a	912	/**
NYX	0:85b3fd62ea1a	913	* @brief Clears the SDIO's interrupt pending bits.
NYX	0:85b3fd62ea1a	914	* @param __INSTANCE__ : Pointer to SDIO register base
NYX	0:85b3fd62ea1a	915	* @param __INTERRUPT__: specifies the interrupt pending bit to clear.
NYX	0:85b3fd62ea1a	916	* This parameter can be one or a combination of the following values:
NYX	0:85b3fd62ea1a	917	* @arg SDIO_IT_CCRCFAIL: Command response received (CRC check failed) interrupt
NYX	0:85b3fd62ea1a	918	* @arg SDIO_IT_DCRCFAIL: Data block sent/received (CRC check failed) interrupt
NYX	0:85b3fd62ea1a	919	* @arg SDIO_IT_CTIMEOUT: Command response timeout interrupt
NYX	0:85b3fd62ea1a	920	* @arg SDIO_IT_DTIMEOUT: Data timeout interrupt
NYX	0:85b3fd62ea1a	921	* @arg SDIO_IT_TXUNDERR: Transmit FIFO underrun error interrupt
NYX	0:85b3fd62ea1a	922	* @arg SDIO_IT_RXOVERR: Received FIFO overrun error interrupt
NYX	0:85b3fd62ea1a	923	* @arg SDIO_IT_CMDREND: Command response received (CRC check passed) interrupt
NYX	0:85b3fd62ea1a	924	* @arg SDIO_IT_CMDSENT: Command sent (no response required) interrupt
NYX	0:85b3fd62ea1a	925	* @arg SDIO_IT_DATAEND: Data end (data counter, SDIO_DCOUNT, is zero) interrupt
NYX	0:85b3fd62ea1a	926	* @arg SDIO_IT_SDIOIT: SD I/O interrupt received interrupt
NYX	0:85b3fd62ea1a	927	* @retval None
NYX	0:85b3fd62ea1a	928	*/
NYX	0:85b3fd62ea1a	929	#define __SDIO_CLEAR_IT(__INSTANCE__, __INTERRUPT__) ((__INSTANCE__)->ICR = (__INTERRUPT__))
NYX	0:85b3fd62ea1a	930
NYX	0:85b3fd62ea1a	931	/**
NYX	0:85b3fd62ea1a	932	* @brief Enable Start the SD I/O Read Wait operation.
NYX	0:85b3fd62ea1a	933	* @param __INSTANCE__ : Pointer to SDIO register base
NYX	0:85b3fd62ea1a	934	* @retval None
NYX	0:85b3fd62ea1a	935	*/
NYX	0:85b3fd62ea1a	936	#define __SDIO_START_READWAIT_ENABLE(__INSTANCE__) ((__IO uint32_t ) DCTRL_RWSTART_BB = ENABLE)
NYX	0:85b3fd62ea1a	937
NYX	0:85b3fd62ea1a	938	/**
NYX	0:85b3fd62ea1a	939	* @brief Disable Start the SD I/O Read Wait operations.
NYX	0:85b3fd62ea1a	940	* @param __INSTANCE__ : Pointer to SDIO register base
NYX	0:85b3fd62ea1a	941	* @retval None
NYX	0:85b3fd62ea1a	942	*/
NYX	0:85b3fd62ea1a	943	#define __SDIO_START_READWAIT_DISABLE(__INSTANCE__) ((__IO uint32_t ) DCTRL_RWSTART_BB = DISABLE)
NYX	0:85b3fd62ea1a	944
NYX	0:85b3fd62ea1a	945	/**
NYX	0:85b3fd62ea1a	946	* @brief Enable Start the SD I/O Read Wait operation.
NYX	0:85b3fd62ea1a	947	* @param __INSTANCE__ : Pointer to SDIO register base
NYX	0:85b3fd62ea1a	948	* @retval None
NYX	0:85b3fd62ea1a	949	*/
NYX	0:85b3fd62ea1a	950	#define __SDIO_STOP_READWAIT_ENABLE(__INSTANCE__) ((__IO uint32_t ) DCTRL_RWSTOP_BB = ENABLE)
NYX	0:85b3fd62ea1a	951
NYX	0:85b3fd62ea1a	952	/**
NYX	0:85b3fd62ea1a	953	* @brief Disable Stop the SD I/O Read Wait operations.
NYX	0:85b3fd62ea1a	954	* @param __INSTANCE__ : Pointer to SDIO register base
NYX	0:85b3fd62ea1a	955	* @retval None
NYX	0:85b3fd62ea1a	956	*/
NYX	0:85b3fd62ea1a	957	#define __SDIO_STOP_READWAIT_DISABLE(__INSTANCE__) ((__IO uint32_t ) DCTRL_RWSTOP_BB = DISABLE)
NYX	0:85b3fd62ea1a	958
NYX	0:85b3fd62ea1a	959	/**
NYX	0:85b3fd62ea1a	960	* @brief Enable the SD I/O Mode Operation.
NYX	0:85b3fd62ea1a	961	* @param __INSTANCE__ : Pointer to SDIO register base
NYX	0:85b3fd62ea1a	962	* @retval None
NYX	0:85b3fd62ea1a	963	*/
NYX	0:85b3fd62ea1a	964	#define __SDIO_OPERATION_ENABLE(__INSTANCE__) ((__IO uint32_t ) DCTRL_SDIOEN_BB = ENABLE)
NYX	0:85b3fd62ea1a	965
NYX	0:85b3fd62ea1a	966	/**
NYX	0:85b3fd62ea1a	967	* @brief Disable the SD I/O Mode Operation.
NYX	0:85b3fd62ea1a	968	* @param __INSTANCE__ : Pointer to SDIO register base
NYX	0:85b3fd62ea1a	969	* @retval None
NYX	0:85b3fd62ea1a	970	*/
NYX	0:85b3fd62ea1a	971	#define __SDIO_OPERATION_DISABLE(__INSTANCE__) ((__IO uint32_t ) DCTRL_SDIOEN_BB = DISABLE)
NYX	0:85b3fd62ea1a	972
NYX	0:85b3fd62ea1a	973	/**
NYX	0:85b3fd62ea1a	974	* @brief Enable the SD I/O Suspend command sending.
NYX	0:85b3fd62ea1a	975	* @param __INSTANCE__ : Pointer to SDIO register base
NYX	0:85b3fd62ea1a	976	* @retval None
NYX	0:85b3fd62ea1a	977	*/
NYX	0:85b3fd62ea1a	978	#define __SDIO_SUSPEND_CMD_ENABLE(__INSTANCE__) ((__IO uint32_t ) CMD_SDIOSUSPEND_BB = ENABLE)
NYX	0:85b3fd62ea1a	979
NYX	0:85b3fd62ea1a	980	/**
NYX	0:85b3fd62ea1a	981	* @brief Disable the SD I/O Suspend command sending.
NYX	0:85b3fd62ea1a	982	* @param __INSTANCE__ : Pointer to SDIO register base
NYX	0:85b3fd62ea1a	983	* @retval None
NYX	0:85b3fd62ea1a	984	*/
NYX	0:85b3fd62ea1a	985	#define __SDIO_SUSPEND_CMD_DISABLE(__INSTANCE__) ((__IO uint32_t ) CMD_SDIOSUSPEND_BB = DISABLE)
NYX	0:85b3fd62ea1a	986
NYX	0:85b3fd62ea1a	987	#if defined(STM32F405xx) \|\| defined(STM32F415xx) \|\| defined(STM32F407xx) \|\| defined(STM32F417xx) \|\|\
NYX	0:85b3fd62ea1a	988	defined(STM32F427xx) \|\| defined(STM32F437xx) \|\| defined(STM32F429xx) \|\| defined(STM32F439xx) \|\|\
NYX	0:85b3fd62ea1a	989	defined(STM32F401xC) \|\| defined(STM32F401xE) \|\| defined(STM32F411xE)
NYX	0:85b3fd62ea1a	990	/**
NYX	0:85b3fd62ea1a	991	* @brief Enable the command completion signal.
NYX	0:85b3fd62ea1a	992	* @retval None
NYX	0:85b3fd62ea1a	993	*/
NYX	0:85b3fd62ea1a	994	#define __SDIO_CEATA_CMD_COMPLETION_ENABLE() ((__IO uint32_t ) CMD_ENCMDCOMPL_BB = ENABLE)
NYX	0:85b3fd62ea1a	995
NYX	0:85b3fd62ea1a	996	/**
NYX	0:85b3fd62ea1a	997	* @brief Disable the command completion signal.
NYX	0:85b3fd62ea1a	998	* @retval None
NYX	0:85b3fd62ea1a	999	*/
NYX	0:85b3fd62ea1a	1000	#define __SDIO_CEATA_CMD_COMPLETION_DISABLE() ((__IO uint32_t ) CMD_ENCMDCOMPL_BB = DISABLE)
NYX	0:85b3fd62ea1a	1001
NYX	0:85b3fd62ea1a	1002	/**
NYX	0:85b3fd62ea1a	1003	* @brief Enable the CE-ATA interrupt.
NYX	0:85b3fd62ea1a	1004	* @retval None
NYX	0:85b3fd62ea1a	1005	*/
NYX	0:85b3fd62ea1a	1006	#define __SDIO_CEATA_ENABLE_IT() ((__IO uint32_t ) CMD_NIEN_BB = (uint32_t)0U)
NYX	0:85b3fd62ea1a	1007
NYX	0:85b3fd62ea1a	1008	/**
NYX	0:85b3fd62ea1a	1009	* @brief Disable the CE-ATA interrupt.
NYX	0:85b3fd62ea1a	1010	* @retval None
NYX	0:85b3fd62ea1a	1011	*/
NYX	0:85b3fd62ea1a	1012	#define __SDIO_CEATA_DISABLE_IT() ((__IO uint32_t ) CMD_NIEN_BB = (uint32_t)1U)
NYX	0:85b3fd62ea1a	1013
NYX	0:85b3fd62ea1a	1014	/**
NYX	0:85b3fd62ea1a	1015	* @brief Enable send CE-ATA command (CMD61).
NYX	0:85b3fd62ea1a	1016	* @retval None
NYX	0:85b3fd62ea1a	1017	*/
NYX	0:85b3fd62ea1a	1018	#define __SDIO_CEATA_SENDCMD_ENABLE() ((__IO uint32_t ) CMD_ATACMD_BB = ENABLE)
NYX	0:85b3fd62ea1a	1019
NYX	0:85b3fd62ea1a	1020	/**
NYX	0:85b3fd62ea1a	1021	* @brief Disable send CE-ATA command (CMD61).
NYX	0:85b3fd62ea1a	1022	* @retval None
NYX	0:85b3fd62ea1a	1023	*/
NYX	0:85b3fd62ea1a	1024	#define __SDIO_CEATA_SENDCMD_DISABLE() ((__IO uint32_t ) CMD_ATACMD_BB = DISABLE)
NYX	0:85b3fd62ea1a	1025	#endif /* STM32F405xx \|\| STM32F415xx \|\| STM32F407xx \|\| STM32F417xx \|\| STM32F401xC \|\| STM32F401xE \|\| STM32F411xE \|\|\
NYX	0:85b3fd62ea1a	1026	STM32F427xx \|\| STM32F437xx \|\| STM32F429xx \|\| STM32F439xx */
NYX	0:85b3fd62ea1a	1027
NYX	0:85b3fd62ea1a	1028	/**
NYX	0:85b3fd62ea1a	1029	* @}
NYX	0:85b3fd62ea1a	1030	*/
NYX	0:85b3fd62ea1a	1031
NYX	0:85b3fd62ea1a	1032	/**
NYX	0:85b3fd62ea1a	1033	* @}
NYX	0:85b3fd62ea1a	1034	*/
NYX	0:85b3fd62ea1a	1035
NYX	0:85b3fd62ea1a	1036	/* Exported functions --------------------------------------------------------*/
NYX	0:85b3fd62ea1a	1037	/** @addtogroup SDMMC_LL_Exported_Functions
NYX	0:85b3fd62ea1a	1038	* @{
NYX	0:85b3fd62ea1a	1039	*/
NYX	0:85b3fd62ea1a	1040
NYX	0:85b3fd62ea1a	1041	/* Initialization/de-initialization functions **********************************/
NYX	0:85b3fd62ea1a	1042	/** @addtogroup HAL_SDMMC_LL_Group1
NYX	0:85b3fd62ea1a	1043	* @{
NYX	0:85b3fd62ea1a	1044	*/
NYX	0:85b3fd62ea1a	1045	HAL_StatusTypeDef SDIO_Init(SDIO_TypeDef *SDIOx, SDIO_InitTypeDef Init);
NYX	0:85b3fd62ea1a	1046	/**
NYX	0:85b3fd62ea1a	1047	* @}
NYX	0:85b3fd62ea1a	1048	*/
NYX	0:85b3fd62ea1a	1049
NYX	0:85b3fd62ea1a	1050	/* I/O operation functions *****************************************************/
NYX	0:85b3fd62ea1a	1051	/** @addtogroup HAL_SDMMC_LL_Group2
NYX	0:85b3fd62ea1a	1052	* @{
NYX	0:85b3fd62ea1a	1053	*/
NYX	0:85b3fd62ea1a	1054	uint32_t SDIO_ReadFIFO(SDIO_TypeDef *SDIOx);
NYX	0:85b3fd62ea1a	1055	HAL_StatusTypeDef SDIO_WriteFIFO(SDIO_TypeDef SDIOx, uint32_t pWriteData);
NYX	0:85b3fd62ea1a	1056	/**
NYX	0:85b3fd62ea1a	1057	* @}
NYX	0:85b3fd62ea1a	1058	*/
NYX	0:85b3fd62ea1a	1059
NYX	0:85b3fd62ea1a	1060	/* Peripheral Control functions ************************************************/
NYX	0:85b3fd62ea1a	1061	/** @addtogroup HAL_SDMMC_LL_Group3
NYX	0:85b3fd62ea1a	1062	* @{
NYX	0:85b3fd62ea1a	1063	*/
NYX	0:85b3fd62ea1a	1064	HAL_StatusTypeDef SDIO_PowerState_ON(SDIO_TypeDef *SDIOx);
NYX	0:85b3fd62ea1a	1065	HAL_StatusTypeDef SDIO_PowerState_OFF(SDIO_TypeDef *SDIOx);
NYX	0:85b3fd62ea1a	1066	uint32_t SDIO_GetPowerState(SDIO_TypeDef *SDIOx);
NYX	0:85b3fd62ea1a	1067
NYX	0:85b3fd62ea1a	1068	/* Command path state machine (CPSM) management functions */
NYX	0:85b3fd62ea1a	1069	HAL_StatusTypeDef SDIO_SendCommand(SDIO_TypeDef SDIOx, SDIO_CmdInitTypeDef Command);
NYX	0:85b3fd62ea1a	1070	uint8_t SDIO_GetCommandResponse(SDIO_TypeDef *SDIOx);
NYX	0:85b3fd62ea1a	1071	uint32_t SDIO_GetResponse(SDIO_TypeDef *SDIOx, uint32_t Response);
NYX	0:85b3fd62ea1a	1072
NYX	0:85b3fd62ea1a	1073	/* Data path state machine (DPSM) management functions */
NYX	0:85b3fd62ea1a	1074	HAL_StatusTypeDef SDIO_ConfigData(SDIO_TypeDef SDIOx, SDIO_DataInitTypeDef Data);
NYX	0:85b3fd62ea1a	1075	uint32_t SDIO_GetDataCounter(SDIO_TypeDef *SDIOx);
NYX	0:85b3fd62ea1a	1076	uint32_t SDIO_GetFIFOCount(SDIO_TypeDef *SDIOx);
NYX	0:85b3fd62ea1a	1077
NYX	0:85b3fd62ea1a	1078	/* SDMMC Cards mode management functions */
NYX	0:85b3fd62ea1a	1079	HAL_StatusTypeDef SDIO_SetSDMMCReadWaitMode(SDIO_TypeDef *SDIOx, uint32_t SDIO_ReadWaitMode);
NYX	0:85b3fd62ea1a	1080
NYX	0:85b3fd62ea1a	1081	/* SDMMC Commands management functions */
NYX	0:85b3fd62ea1a	1082	uint32_t SDMMC_CmdBlockLength(SDIO_TypeDef *SDIOx, uint32_t BlockSize);
NYX	0:85b3fd62ea1a	1083	uint32_t SDMMC_CmdReadSingleBlock(SDIO_TypeDef *SDIOx, uint32_t ReadAdd);
NYX	0:85b3fd62ea1a	1084	uint32_t SDMMC_CmdReadMultiBlock(SDIO_TypeDef *SDIOx, uint32_t ReadAdd);
NYX	0:85b3fd62ea1a	1085	uint32_t SDMMC_CmdWriteSingleBlock(SDIO_TypeDef *SDIOx, uint32_t WriteAdd);
NYX	0:85b3fd62ea1a	1086	uint32_t SDMMC_CmdWriteMultiBlock(SDIO_TypeDef *SDIOx, uint32_t WriteAdd);
NYX	0:85b3fd62ea1a	1087	uint32_t SDMMC_CmdSDEraseStartAdd(SDIO_TypeDef *SDIOx, uint32_t StartAdd);
NYX	0:85b3fd62ea1a	1088	uint32_t SDMMC_CmdSDEraseEndAdd(SDIO_TypeDef *SDIOx, uint32_t EndAdd);
NYX	0:85b3fd62ea1a	1089	uint32_t SDMMC_CmdErase(SDIO_TypeDef *SDIOx);
NYX	0:85b3fd62ea1a	1090	uint32_t SDMMC_CmdStopTransfer(SDIO_TypeDef *SDIOx);
NYX	0:85b3fd62ea1a	1091	uint32_t SDMMC_CmdSelDesel(SDIO_TypeDef *SDIOx, uint64_t Addr);
NYX	0:85b3fd62ea1a	1092	uint32_t SDMMC_CmdGoIdleState(SDIO_TypeDef *SDIOx);
NYX	0:85b3fd62ea1a	1093	uint32_t SDMMC_CmdOperCond(SDIO_TypeDef *SDIOx);
NYX	0:85b3fd62ea1a	1094	uint32_t SDMMC_CmdAppCommand(SDIO_TypeDef *SDIOx, uint32_t Argument);
NYX	0:85b3fd62ea1a	1095	uint32_t SDMMC_CmdAppOperCommand(SDIO_TypeDef *SDIOx, uint32_t SdType);
NYX	0:85b3fd62ea1a	1096	uint32_t SDMMC_CmdBusWidth(SDIO_TypeDef *SDIOx, uint32_t BusWidth);
NYX	0:85b3fd62ea1a	1097	uint32_t SDMMC_CmdSendSCR(SDIO_TypeDef *SDIOx);
NYX	0:85b3fd62ea1a	1098	uint32_t SDMMC_CmdSendCID(SDIO_TypeDef *SDIOx);
NYX	0:85b3fd62ea1a	1099	uint32_t SDMMC_CmdSendCSD(SDIO_TypeDef *SDIOx, uint32_t Argument);
NYX	0:85b3fd62ea1a	1100	uint32_t SDMMC_CmdSetRelAdd(SDIO_TypeDef SDIOx, uint16_t pRCA);
NYX	0:85b3fd62ea1a	1101	uint32_t SDMMC_CmdSendStatus(SDIO_TypeDef *SDIOx, uint32_t Argument);
NYX	0:85b3fd62ea1a	1102	uint32_t SDMMC_CmdStatusRegister(SDIO_TypeDef *SDIOx);
NYX	0:85b3fd62ea1a	1103
NYX	0:85b3fd62ea1a	1104	uint32_t SDMMC_CmdOpCondition(SDIO_TypeDef *SDIOx, uint32_t Argument);
NYX	0:85b3fd62ea1a	1105	uint32_t SDMMC_CmdSwitch(SDIO_TypeDef *SDIOx, uint32_t Argument);
NYX	0:85b3fd62ea1a	1106	uint32_t SDMMC_CmdEraseStartAdd(SDIO_TypeDef *SDIOx, uint32_t StartAdd);
NYX	0:85b3fd62ea1a	1107	uint32_t SDMMC_CmdEraseEndAdd(SDIO_TypeDef *SDIOx, uint32_t EndAdd);
NYX	0:85b3fd62ea1a	1108
NYX	0:85b3fd62ea1a	1109	/**
NYX	0:85b3fd62ea1a	1110	* @}
NYX	0:85b3fd62ea1a	1111	*/
NYX	0:85b3fd62ea1a	1112
NYX	0:85b3fd62ea1a	1113	/**
NYX	0:85b3fd62ea1a	1114	* @}
NYX	0:85b3fd62ea1a	1115	*/
NYX	0:85b3fd62ea1a	1116
NYX	0:85b3fd62ea1a	1117	/**
NYX	0:85b3fd62ea1a	1118	* @}
NYX	0:85b3fd62ea1a	1119	*/
NYX	0:85b3fd62ea1a	1120
NYX	0:85b3fd62ea1a	1121	/**
NYX	0:85b3fd62ea1a	1122	* @}
NYX	0:85b3fd62ea1a	1123	*/
NYX	0:85b3fd62ea1a	1124
NYX	0:85b3fd62ea1a	1125	#endif /* STM32F405xx \|\| STM32F415xx \|\| STM32F407xx \|\| STM32F417xx \|\| STM32F427xx \|\| STM32F437xx \|\| STM32F429xx \|\| STM32F439xx \|\|
NYX	0:85b3fd62ea1a	1126	STM32F401xC \|\| STM32F401xE \|\| STM32F411xE \|\| STM32F446xx \|\| STM32F469xx \|\| STM32F479xx \|\| STM32F412Zx \|\| STM32F412Vx \|\|
NYX	0:85b3fd62ea1a	1127	STM32F412Rx \|\| STM32F412Cx \|\| STM32F413xx \|\| STM32F423xx */
NYX	0:85b3fd62ea1a	1128
NYX	0:85b3fd62ea1a	1129	#ifdef __cplusplus
NYX	0:85b3fd62ea1a	1130	}
NYX	0:85b3fd62ea1a	1131	#endif
NYX	0:85b3fd62ea1a	1132
NYX	0:85b3fd62ea1a	1133	#endif /* __STM32F4xx_LL_SDMMC_H */
NYX	0:85b3fd62ea1a	1134
NYX	0:85b3fd62ea1a	1135	/********************** (C) COPYRIGHT STMicroelectronics *END OF FILE**/

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Type:	Library
Created:	16 Mar 2020
Imports:	73
Forks:	0
Commits:	1
Dependents:	1
Dependencies:	0
Followers:	2

targets/TARGET_STM/TARGET_STM32F4/device/stm32f4xx_ll_sdmmc.h@0:85b3fd62ea1a, 2020-03-16 (annotated)

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