inport from local
Dependents: Hobbyking_Cheetah_0511
targets/TARGET_STM/TARGET_STM32F4/device/stm32f4xx_ll_sdmmc.c@0:85b3fd62ea1a, 2020-03-16 (annotated)
- Committer:
- NYX
- Date:
- Mon Mar 16 06:35:48 2020 +0000
- Revision:
- 0:85b3fd62ea1a
reinport to mbed;
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
NYX | 0:85b3fd62ea1a | 1 | /** |
NYX | 0:85b3fd62ea1a | 2 | ****************************************************************************** |
NYX | 0:85b3fd62ea1a | 3 | * @file stm32f4xx_ll_sdmmc.c |
NYX | 0:85b3fd62ea1a | 4 | * @author MCD Application Team |
NYX | 0:85b3fd62ea1a | 5 | * @version V1.7.1 |
NYX | 0:85b3fd62ea1a | 6 | * @date 14-April-2017 |
NYX | 0:85b3fd62ea1a | 7 | * @brief SDMMC Low Layer HAL module driver. |
NYX | 0:85b3fd62ea1a | 8 | * |
NYX | 0:85b3fd62ea1a | 9 | * This file provides firmware functions to manage the following |
NYX | 0:85b3fd62ea1a | 10 | * functionalities of the SDMMC peripheral: |
NYX | 0:85b3fd62ea1a | 11 | * + Initialization/de-initialization functions |
NYX | 0:85b3fd62ea1a | 12 | * + I/O operation functions |
NYX | 0:85b3fd62ea1a | 13 | * + Peripheral Control functions |
NYX | 0:85b3fd62ea1a | 14 | * + Peripheral State functions |
NYX | 0:85b3fd62ea1a | 15 | * |
NYX | 0:85b3fd62ea1a | 16 | @verbatim |
NYX | 0:85b3fd62ea1a | 17 | ============================================================================== |
NYX | 0:85b3fd62ea1a | 18 | ##### SDMMC peripheral features ##### |
NYX | 0:85b3fd62ea1a | 19 | ============================================================================== |
NYX | 0:85b3fd62ea1a | 20 | [..] The SD/SDMMC MMC card host interface (SDMMC) provides an interface between the APB2 |
NYX | 0:85b3fd62ea1a | 21 | peripheral bus and MultiMedia cards (MMCs), SD memory cards, SDMMC cards and CE-ATA |
NYX | 0:85b3fd62ea1a | 22 | devices. |
NYX | 0:85b3fd62ea1a | 23 | |
NYX | 0:85b3fd62ea1a | 24 | [..] The SDMMC features include the following: |
NYX | 0:85b3fd62ea1a | 25 | (+) Full compliance with MultiMedia Card System Specification Version 4.2. Card support |
NYX | 0:85b3fd62ea1a | 26 | for three different databus modes: 1-bit (default), 4-bit and 8-bit |
NYX | 0:85b3fd62ea1a | 27 | (+) Full compatibility with previous versions of MultiMedia Cards (forward compatibility) |
NYX | 0:85b3fd62ea1a | 28 | (+) Full compliance with SD Memory Card Specifications Version 2.0 |
NYX | 0:85b3fd62ea1a | 29 | (+) Full compliance with SD I/O Card Specification Version 2.0: card support for two |
NYX | 0:85b3fd62ea1a | 30 | different data bus modes: 1-bit (default) and 4-bit |
NYX | 0:85b3fd62ea1a | 31 | (+) Full support of the CE-ATA features (full compliance with CE-ATA digital protocol |
NYX | 0:85b3fd62ea1a | 32 | Rev1.1) |
NYX | 0:85b3fd62ea1a | 33 | (+) Data transfer up to 48 MHz for the 8 bit mode |
NYX | 0:85b3fd62ea1a | 34 | (+) Data and command output enable signals to control external bidirectional drivers. |
NYX | 0:85b3fd62ea1a | 35 | |
NYX | 0:85b3fd62ea1a | 36 | |
NYX | 0:85b3fd62ea1a | 37 | ##### How to use this driver ##### |
NYX | 0:85b3fd62ea1a | 38 | ============================================================================== |
NYX | 0:85b3fd62ea1a | 39 | [..] |
NYX | 0:85b3fd62ea1a | 40 | This driver is a considered as a driver of service for external devices drivers |
NYX | 0:85b3fd62ea1a | 41 | that interfaces with the SDMMC peripheral. |
NYX | 0:85b3fd62ea1a | 42 | According to the device used (SD card/ MMC card / SDMMC card ...), a set of APIs |
NYX | 0:85b3fd62ea1a | 43 | is used in the device's driver to perform SDMMC operations and functionalities. |
NYX | 0:85b3fd62ea1a | 44 | |
NYX | 0:85b3fd62ea1a | 45 | This driver is almost transparent for the final user, it is only used to implement other |
NYX | 0:85b3fd62ea1a | 46 | functionalities of the external device. |
NYX | 0:85b3fd62ea1a | 47 | |
NYX | 0:85b3fd62ea1a | 48 | [..] |
NYX | 0:85b3fd62ea1a | 49 | (+) The SDMMC clock (SDMMCCLK = 48 MHz) is coming from a specific output of PLL |
NYX | 0:85b3fd62ea1a | 50 | (PLL48CLK). Before start working with SDMMC peripheral make sure that the |
NYX | 0:85b3fd62ea1a | 51 | PLL is well configured. |
NYX | 0:85b3fd62ea1a | 52 | The SDMMC peripheral uses two clock signals: |
NYX | 0:85b3fd62ea1a | 53 | (++) SDMMC adapter clock (SDMMCCLK = 48 MHz) |
NYX | 0:85b3fd62ea1a | 54 | (++) APB2 bus clock (PCLK2) |
NYX | 0:85b3fd62ea1a | 55 | |
NYX | 0:85b3fd62ea1a | 56 | -@@- PCLK2 and SDMMC_CK clock frequencies must respect the following condition: |
NYX | 0:85b3fd62ea1a | 57 | Frequency(PCLK2) >= (3 / 8 x Frequency(SDMMC_CK)) |
NYX | 0:85b3fd62ea1a | 58 | |
NYX | 0:85b3fd62ea1a | 59 | (+) Enable/Disable peripheral clock using RCC peripheral macros related to SDMMC |
NYX | 0:85b3fd62ea1a | 60 | peripheral. |
NYX | 0:85b3fd62ea1a | 61 | |
NYX | 0:85b3fd62ea1a | 62 | (+) Enable the Power ON State using the SDIO_PowerState_ON(SDIOx) |
NYX | 0:85b3fd62ea1a | 63 | function and disable it using the function SDIO_PowerState_ON(SDIOx). |
NYX | 0:85b3fd62ea1a | 64 | |
NYX | 0:85b3fd62ea1a | 65 | (+) Enable/Disable the clock using the __SDIO_ENABLE()/__SDIO_DISABLE() macros. |
NYX | 0:85b3fd62ea1a | 66 | |
NYX | 0:85b3fd62ea1a | 67 | (+) Enable/Disable the peripheral interrupts using the macros __SDIO_ENABLE_IT(hSDIO, IT) |
NYX | 0:85b3fd62ea1a | 68 | and __SDIO_DISABLE_IT(hSDIO, IT) if you need to use interrupt mode. |
NYX | 0:85b3fd62ea1a | 69 | |
NYX | 0:85b3fd62ea1a | 70 | (+) When using the DMA mode |
NYX | 0:85b3fd62ea1a | 71 | (++) Configure the DMA in the MSP layer of the external device |
NYX | 0:85b3fd62ea1a | 72 | (++) Active the needed channel Request |
NYX | 0:85b3fd62ea1a | 73 | (++) Enable the DMA using __SDIO_DMA_ENABLE() macro or Disable it using the macro |
NYX | 0:85b3fd62ea1a | 74 | __SDIO_DMA_DISABLE(). |
NYX | 0:85b3fd62ea1a | 75 | |
NYX | 0:85b3fd62ea1a | 76 | (+) To control the CPSM (Command Path State Machine) and send |
NYX | 0:85b3fd62ea1a | 77 | commands to the card use the SDIO_SendCommand(), |
NYX | 0:85b3fd62ea1a | 78 | SDIO_GetCommandResponse() and SDIO_GetResponse() functions. First, user has |
NYX | 0:85b3fd62ea1a | 79 | to fill the command structure (pointer to SDIO_CmdInitTypeDef) according |
NYX | 0:85b3fd62ea1a | 80 | to the selected command to be sent. |
NYX | 0:85b3fd62ea1a | 81 | The parameters that should be filled are: |
NYX | 0:85b3fd62ea1a | 82 | (++) Command Argument |
NYX | 0:85b3fd62ea1a | 83 | (++) Command Index |
NYX | 0:85b3fd62ea1a | 84 | (++) Command Response type |
NYX | 0:85b3fd62ea1a | 85 | (++) Command Wait |
NYX | 0:85b3fd62ea1a | 86 | (++) CPSM Status (Enable or Disable). |
NYX | 0:85b3fd62ea1a | 87 | |
NYX | 0:85b3fd62ea1a | 88 | -@@- To check if the command is well received, read the SDIO_CMDRESP |
NYX | 0:85b3fd62ea1a | 89 | register using the SDIO_GetCommandResponse(). |
NYX | 0:85b3fd62ea1a | 90 | The SDMMC responses registers (SDIO_RESP1 to SDIO_RESP2), use the |
NYX | 0:85b3fd62ea1a | 91 | SDIO_GetResponse() function. |
NYX | 0:85b3fd62ea1a | 92 | |
NYX | 0:85b3fd62ea1a | 93 | (+) To control the DPSM (Data Path State Machine) and send/receive |
NYX | 0:85b3fd62ea1a | 94 | data to/from the card use the SDIO_ConfigData(), SDIO_GetDataCounter(), |
NYX | 0:85b3fd62ea1a | 95 | SDIO_ReadFIFO(), SDIO_WriteFIFO() and SDIO_GetFIFOCount() functions. |
NYX | 0:85b3fd62ea1a | 96 | |
NYX | 0:85b3fd62ea1a | 97 | *** Read Operations *** |
NYX | 0:85b3fd62ea1a | 98 | ======================= |
NYX | 0:85b3fd62ea1a | 99 | [..] |
NYX | 0:85b3fd62ea1a | 100 | (#) First, user has to fill the data structure (pointer to |
NYX | 0:85b3fd62ea1a | 101 | SDIO_DataInitTypeDef) according to the selected data type to be received. |
NYX | 0:85b3fd62ea1a | 102 | The parameters that should be filled are: |
NYX | 0:85b3fd62ea1a | 103 | (++) Data TimeOut |
NYX | 0:85b3fd62ea1a | 104 | (++) Data Length |
NYX | 0:85b3fd62ea1a | 105 | (++) Data Block size |
NYX | 0:85b3fd62ea1a | 106 | (++) Data Transfer direction: should be from card (To SDMMC) |
NYX | 0:85b3fd62ea1a | 107 | (++) Data Transfer mode |
NYX | 0:85b3fd62ea1a | 108 | (++) DPSM Status (Enable or Disable) |
NYX | 0:85b3fd62ea1a | 109 | |
NYX | 0:85b3fd62ea1a | 110 | (#) Configure the SDMMC resources to receive the data from the card |
NYX | 0:85b3fd62ea1a | 111 | according to selected transfer mode (Refer to Step 8, 9 and 10). |
NYX | 0:85b3fd62ea1a | 112 | |
NYX | 0:85b3fd62ea1a | 113 | (#) Send the selected Read command (refer to step 11). |
NYX | 0:85b3fd62ea1a | 114 | |
NYX | 0:85b3fd62ea1a | 115 | (#) Use the SDIO flags/interrupts to check the transfer status. |
NYX | 0:85b3fd62ea1a | 116 | |
NYX | 0:85b3fd62ea1a | 117 | *** Write Operations *** |
NYX | 0:85b3fd62ea1a | 118 | ======================== |
NYX | 0:85b3fd62ea1a | 119 | [..] |
NYX | 0:85b3fd62ea1a | 120 | (#) First, user has to fill the data structure (pointer to |
NYX | 0:85b3fd62ea1a | 121 | SDIO_DataInitTypeDef) according to the selected data type to be received. |
NYX | 0:85b3fd62ea1a | 122 | The parameters that should be filled are: |
NYX | 0:85b3fd62ea1a | 123 | (++) Data TimeOut |
NYX | 0:85b3fd62ea1a | 124 | (++) Data Length |
NYX | 0:85b3fd62ea1a | 125 | (++) Data Block size |
NYX | 0:85b3fd62ea1a | 126 | (++) Data Transfer direction: should be to card (To CARD) |
NYX | 0:85b3fd62ea1a | 127 | (++) Data Transfer mode |
NYX | 0:85b3fd62ea1a | 128 | (++) DPSM Status (Enable or Disable) |
NYX | 0:85b3fd62ea1a | 129 | |
NYX | 0:85b3fd62ea1a | 130 | (#) Configure the SDMMC resources to send the data to the card according to |
NYX | 0:85b3fd62ea1a | 131 | selected transfer mode. |
NYX | 0:85b3fd62ea1a | 132 | |
NYX | 0:85b3fd62ea1a | 133 | (#) Send the selected Write command. |
NYX | 0:85b3fd62ea1a | 134 | |
NYX | 0:85b3fd62ea1a | 135 | (#) Use the SDIO flags/interrupts to check the transfer status. |
NYX | 0:85b3fd62ea1a | 136 | |
NYX | 0:85b3fd62ea1a | 137 | *** Command management operations *** |
NYX | 0:85b3fd62ea1a | 138 | ===================================== |
NYX | 0:85b3fd62ea1a | 139 | [..] |
NYX | 0:85b3fd62ea1a | 140 | (#) The commands used for Read/Write/Erase operations are managed in |
NYX | 0:85b3fd62ea1a | 141 | separate functions. |
NYX | 0:85b3fd62ea1a | 142 | Each function allows to send the needed command with the related argument, |
NYX | 0:85b3fd62ea1a | 143 | then check the response. |
NYX | 0:85b3fd62ea1a | 144 | By the same approach, you could implement a command and check the response. |
NYX | 0:85b3fd62ea1a | 145 | |
NYX | 0:85b3fd62ea1a | 146 | @endverbatim |
NYX | 0:85b3fd62ea1a | 147 | ****************************************************************************** |
NYX | 0:85b3fd62ea1a | 148 | * @attention |
NYX | 0:85b3fd62ea1a | 149 | * |
NYX | 0:85b3fd62ea1a | 150 | * <h2><center>© COPYRIGHT(c) 2017 STMicroelectronics</center></h2> |
NYX | 0:85b3fd62ea1a | 151 | * |
NYX | 0:85b3fd62ea1a | 152 | * Redistribution and use in source and binary forms, with or without modification, |
NYX | 0:85b3fd62ea1a | 153 | * are permitted provided that the following conditions are met: |
NYX | 0:85b3fd62ea1a | 154 | * 1. Redistributions of source code must retain the above copyright notice, |
NYX | 0:85b3fd62ea1a | 155 | * this list of conditions and the following disclaimer. |
NYX | 0:85b3fd62ea1a | 156 | * 2. Redistributions in binary form must reproduce the above copyright notice, |
NYX | 0:85b3fd62ea1a | 157 | * this list of conditions and the following disclaimer in the documentation |
NYX | 0:85b3fd62ea1a | 158 | * and/or other materials provided with the distribution. |
NYX | 0:85b3fd62ea1a | 159 | * 3. Neither the name of STMicroelectronics nor the names of its contributors |
NYX | 0:85b3fd62ea1a | 160 | * may be used to endorse or promote products derived from this software |
NYX | 0:85b3fd62ea1a | 161 | * without specific prior written permission. |
NYX | 0:85b3fd62ea1a | 162 | * |
NYX | 0:85b3fd62ea1a | 163 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
NYX | 0:85b3fd62ea1a | 164 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
NYX | 0:85b3fd62ea1a | 165 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
NYX | 0:85b3fd62ea1a | 166 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE |
NYX | 0:85b3fd62ea1a | 167 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
NYX | 0:85b3fd62ea1a | 168 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR |
NYX | 0:85b3fd62ea1a | 169 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
NYX | 0:85b3fd62ea1a | 170 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
NYX | 0:85b3fd62ea1a | 171 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
NYX | 0:85b3fd62ea1a | 172 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
NYX | 0:85b3fd62ea1a | 173 | * |
NYX | 0:85b3fd62ea1a | 174 | ****************************************************************************** |
NYX | 0:85b3fd62ea1a | 175 | */ |
NYX | 0:85b3fd62ea1a | 176 | |
NYX | 0:85b3fd62ea1a | 177 | /* Includes ------------------------------------------------------------------*/ |
NYX | 0:85b3fd62ea1a | 178 | #include "stm32f4xx_hal.h" |
NYX | 0:85b3fd62ea1a | 179 | |
NYX | 0:85b3fd62ea1a | 180 | /** @addtogroup STM32F4xx_HAL_Driver |
NYX | 0:85b3fd62ea1a | 181 | * @{ |
NYX | 0:85b3fd62ea1a | 182 | */ |
NYX | 0:85b3fd62ea1a | 183 | |
NYX | 0:85b3fd62ea1a | 184 | /** @defgroup SDMMC_LL SDMMC Low Layer |
NYX | 0:85b3fd62ea1a | 185 | * @brief Low layer module for SD |
NYX | 0:85b3fd62ea1a | 186 | * @{ |
NYX | 0:85b3fd62ea1a | 187 | */ |
NYX | 0:85b3fd62ea1a | 188 | |
NYX | 0:85b3fd62ea1a | 189 | #if defined(HAL_SD_MODULE_ENABLED) || defined(HAL_MMC_MODULE_ENABLED) |
NYX | 0:85b3fd62ea1a | 190 | #if defined(STM32F405xx) || defined(STM32F415xx) || defined(STM32F407xx) || defined(STM32F417xx) || \ |
NYX | 0:85b3fd62ea1a | 191 | defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx) || \ |
NYX | 0:85b3fd62ea1a | 192 | defined(STM32F401xC) || defined(STM32F401xE) || defined(STM32F411xE) || defined(STM32F446xx) || \ |
NYX | 0:85b3fd62ea1a | 193 | defined(STM32F469xx) || defined(STM32F479xx) || defined(STM32F412Zx) || defined(STM32F412Vx) || \ |
NYX | 0:85b3fd62ea1a | 194 | defined(STM32F412Rx) || defined(STM32F412Cx) || defined(STM32F413xx) || defined(STM32F423xx) |
NYX | 0:85b3fd62ea1a | 195 | |
NYX | 0:85b3fd62ea1a | 196 | /* Private typedef -----------------------------------------------------------*/ |
NYX | 0:85b3fd62ea1a | 197 | /* Private define ------------------------------------------------------------*/ |
NYX | 0:85b3fd62ea1a | 198 | /* Private macro -------------------------------------------------------------*/ |
NYX | 0:85b3fd62ea1a | 199 | /* Private variables ---------------------------------------------------------*/ |
NYX | 0:85b3fd62ea1a | 200 | /* Private function prototypes -----------------------------------------------*/ |
NYX | 0:85b3fd62ea1a | 201 | static uint32_t SDMMC_GetCmdError(SDIO_TypeDef *SDIOx); |
NYX | 0:85b3fd62ea1a | 202 | static uint32_t SDMMC_GetCmdResp1(SDIO_TypeDef *SDIOx, uint8_t SD_CMD, uint32_t Timeout); |
NYX | 0:85b3fd62ea1a | 203 | static uint32_t SDMMC_GetCmdResp2(SDIO_TypeDef *SDIOx); |
NYX | 0:85b3fd62ea1a | 204 | static uint32_t SDMMC_GetCmdResp3(SDIO_TypeDef *SDIOx); |
NYX | 0:85b3fd62ea1a | 205 | static uint32_t SDMMC_GetCmdResp7(SDIO_TypeDef *SDIOx); |
NYX | 0:85b3fd62ea1a | 206 | static uint32_t SDMMC_GetCmdResp6(SDIO_TypeDef *SDIOx, uint8_t SD_CMD, uint16_t *pRCA); |
NYX | 0:85b3fd62ea1a | 207 | |
NYX | 0:85b3fd62ea1a | 208 | /* Exported functions --------------------------------------------------------*/ |
NYX | 0:85b3fd62ea1a | 209 | |
NYX | 0:85b3fd62ea1a | 210 | /** @defgroup SDMMC_LL_Exported_Functions SDMMC Low Layer Exported Functions |
NYX | 0:85b3fd62ea1a | 211 | * @{ |
NYX | 0:85b3fd62ea1a | 212 | */ |
NYX | 0:85b3fd62ea1a | 213 | |
NYX | 0:85b3fd62ea1a | 214 | /** @defgroup HAL_SDMMC_LL_Group1 Initialization de-initialization functions |
NYX | 0:85b3fd62ea1a | 215 | * @brief Initialization and Configuration functions |
NYX | 0:85b3fd62ea1a | 216 | * |
NYX | 0:85b3fd62ea1a | 217 | @verbatim |
NYX | 0:85b3fd62ea1a | 218 | =============================================================================== |
NYX | 0:85b3fd62ea1a | 219 | ##### Initialization/de-initialization functions ##### |
NYX | 0:85b3fd62ea1a | 220 | =============================================================================== |
NYX | 0:85b3fd62ea1a | 221 | [..] This section provides functions allowing to: |
NYX | 0:85b3fd62ea1a | 222 | |
NYX | 0:85b3fd62ea1a | 223 | @endverbatim |
NYX | 0:85b3fd62ea1a | 224 | * @{ |
NYX | 0:85b3fd62ea1a | 225 | */ |
NYX | 0:85b3fd62ea1a | 226 | |
NYX | 0:85b3fd62ea1a | 227 | /** |
NYX | 0:85b3fd62ea1a | 228 | * @brief Initializes the SDMMC according to the specified |
NYX | 0:85b3fd62ea1a | 229 | * parameters in the SDMMC_InitTypeDef and create the associated handle. |
NYX | 0:85b3fd62ea1a | 230 | * @param SDIOx: Pointer to SDMMC register base |
NYX | 0:85b3fd62ea1a | 231 | * @param Init: SDMMC initialization structure |
NYX | 0:85b3fd62ea1a | 232 | * @retval HAL status |
NYX | 0:85b3fd62ea1a | 233 | */ |
NYX | 0:85b3fd62ea1a | 234 | HAL_StatusTypeDef SDIO_Init(SDIO_TypeDef *SDIOx, SDIO_InitTypeDef Init) |
NYX | 0:85b3fd62ea1a | 235 | { |
NYX | 0:85b3fd62ea1a | 236 | uint32_t tmpreg = 0U; |
NYX | 0:85b3fd62ea1a | 237 | |
NYX | 0:85b3fd62ea1a | 238 | /* Check the parameters */ |
NYX | 0:85b3fd62ea1a | 239 | assert_param(IS_SDIO_ALL_INSTANCE(SDIOx)); |
NYX | 0:85b3fd62ea1a | 240 | assert_param(IS_SDIO_CLOCK_EDGE(Init.ClockEdge)); |
NYX | 0:85b3fd62ea1a | 241 | assert_param(IS_SDIO_CLOCK_BYPASS(Init.ClockBypass)); |
NYX | 0:85b3fd62ea1a | 242 | assert_param(IS_SDIO_CLOCK_POWER_SAVE(Init.ClockPowerSave)); |
NYX | 0:85b3fd62ea1a | 243 | assert_param(IS_SDIO_BUS_WIDE(Init.BusWide)); |
NYX | 0:85b3fd62ea1a | 244 | assert_param(IS_SDIO_HARDWARE_FLOW_CONTROL(Init.HardwareFlowControl)); |
NYX | 0:85b3fd62ea1a | 245 | assert_param(IS_SDIO_CLKDIV(Init.ClockDiv)); |
NYX | 0:85b3fd62ea1a | 246 | |
NYX | 0:85b3fd62ea1a | 247 | /* Set SDMMC configuration parameters */ |
NYX | 0:85b3fd62ea1a | 248 | tmpreg |= (Init.ClockEdge |\ |
NYX | 0:85b3fd62ea1a | 249 | Init.ClockBypass |\ |
NYX | 0:85b3fd62ea1a | 250 | Init.ClockPowerSave |\ |
NYX | 0:85b3fd62ea1a | 251 | Init.BusWide |\ |
NYX | 0:85b3fd62ea1a | 252 | Init.HardwareFlowControl |\ |
NYX | 0:85b3fd62ea1a | 253 | Init.ClockDiv |
NYX | 0:85b3fd62ea1a | 254 | ); |
NYX | 0:85b3fd62ea1a | 255 | |
NYX | 0:85b3fd62ea1a | 256 | /* Write to SDMMC CLKCR */ |
NYX | 0:85b3fd62ea1a | 257 | MODIFY_REG(SDIOx->CLKCR, CLKCR_CLEAR_MASK, tmpreg); |
NYX | 0:85b3fd62ea1a | 258 | |
NYX | 0:85b3fd62ea1a | 259 | return HAL_OK; |
NYX | 0:85b3fd62ea1a | 260 | } |
NYX | 0:85b3fd62ea1a | 261 | |
NYX | 0:85b3fd62ea1a | 262 | |
NYX | 0:85b3fd62ea1a | 263 | /** |
NYX | 0:85b3fd62ea1a | 264 | * @} |
NYX | 0:85b3fd62ea1a | 265 | */ |
NYX | 0:85b3fd62ea1a | 266 | |
NYX | 0:85b3fd62ea1a | 267 | /** @defgroup HAL_SDMMC_LL_Group2 IO operation functions |
NYX | 0:85b3fd62ea1a | 268 | * @brief Data transfers functions |
NYX | 0:85b3fd62ea1a | 269 | * |
NYX | 0:85b3fd62ea1a | 270 | @verbatim |
NYX | 0:85b3fd62ea1a | 271 | =============================================================================== |
NYX | 0:85b3fd62ea1a | 272 | ##### I/O operation functions ##### |
NYX | 0:85b3fd62ea1a | 273 | =============================================================================== |
NYX | 0:85b3fd62ea1a | 274 | [..] |
NYX | 0:85b3fd62ea1a | 275 | This subsection provides a set of functions allowing to manage the SDMMC data |
NYX | 0:85b3fd62ea1a | 276 | transfers. |
NYX | 0:85b3fd62ea1a | 277 | |
NYX | 0:85b3fd62ea1a | 278 | @endverbatim |
NYX | 0:85b3fd62ea1a | 279 | * @{ |
NYX | 0:85b3fd62ea1a | 280 | */ |
NYX | 0:85b3fd62ea1a | 281 | |
NYX | 0:85b3fd62ea1a | 282 | /** |
NYX | 0:85b3fd62ea1a | 283 | * @brief Read data (word) from Rx FIFO in blocking mode (polling) |
NYX | 0:85b3fd62ea1a | 284 | * @param SDIOx: Pointer to SDMMC register base |
NYX | 0:85b3fd62ea1a | 285 | * @retval HAL status |
NYX | 0:85b3fd62ea1a | 286 | */ |
NYX | 0:85b3fd62ea1a | 287 | uint32_t SDIO_ReadFIFO(SDIO_TypeDef *SDIOx) |
NYX | 0:85b3fd62ea1a | 288 | { |
NYX | 0:85b3fd62ea1a | 289 | /* Read data from Rx FIFO */ |
NYX | 0:85b3fd62ea1a | 290 | return (SDIOx->FIFO); |
NYX | 0:85b3fd62ea1a | 291 | } |
NYX | 0:85b3fd62ea1a | 292 | |
NYX | 0:85b3fd62ea1a | 293 | /** |
NYX | 0:85b3fd62ea1a | 294 | * @brief Write data (word) to Tx FIFO in blocking mode (polling) |
NYX | 0:85b3fd62ea1a | 295 | * @param SDIOx: Pointer to SDMMC register base |
NYX | 0:85b3fd62ea1a | 296 | * @param pWriteData: pointer to data to write |
NYX | 0:85b3fd62ea1a | 297 | * @retval HAL status |
NYX | 0:85b3fd62ea1a | 298 | */ |
NYX | 0:85b3fd62ea1a | 299 | HAL_StatusTypeDef SDIO_WriteFIFO(SDIO_TypeDef *SDIOx, uint32_t *pWriteData) |
NYX | 0:85b3fd62ea1a | 300 | { |
NYX | 0:85b3fd62ea1a | 301 | /* Write data to FIFO */ |
NYX | 0:85b3fd62ea1a | 302 | SDIOx->FIFO = *pWriteData; |
NYX | 0:85b3fd62ea1a | 303 | |
NYX | 0:85b3fd62ea1a | 304 | return HAL_OK; |
NYX | 0:85b3fd62ea1a | 305 | } |
NYX | 0:85b3fd62ea1a | 306 | |
NYX | 0:85b3fd62ea1a | 307 | /** |
NYX | 0:85b3fd62ea1a | 308 | * @} |
NYX | 0:85b3fd62ea1a | 309 | */ |
NYX | 0:85b3fd62ea1a | 310 | |
NYX | 0:85b3fd62ea1a | 311 | /** @defgroup HAL_SDMMC_LL_Group3 Peripheral Control functions |
NYX | 0:85b3fd62ea1a | 312 | * @brief management functions |
NYX | 0:85b3fd62ea1a | 313 | * |
NYX | 0:85b3fd62ea1a | 314 | @verbatim |
NYX | 0:85b3fd62ea1a | 315 | =============================================================================== |
NYX | 0:85b3fd62ea1a | 316 | ##### Peripheral Control functions ##### |
NYX | 0:85b3fd62ea1a | 317 | =============================================================================== |
NYX | 0:85b3fd62ea1a | 318 | [..] |
NYX | 0:85b3fd62ea1a | 319 | This subsection provides a set of functions allowing to control the SDMMC data |
NYX | 0:85b3fd62ea1a | 320 | transfers. |
NYX | 0:85b3fd62ea1a | 321 | |
NYX | 0:85b3fd62ea1a | 322 | @endverbatim |
NYX | 0:85b3fd62ea1a | 323 | * @{ |
NYX | 0:85b3fd62ea1a | 324 | */ |
NYX | 0:85b3fd62ea1a | 325 | |
NYX | 0:85b3fd62ea1a | 326 | /** |
NYX | 0:85b3fd62ea1a | 327 | * @brief Set SDMMC Power state to ON. |
NYX | 0:85b3fd62ea1a | 328 | * @param SDIOx: Pointer to SDMMC register base |
NYX | 0:85b3fd62ea1a | 329 | * @retval HAL status |
NYX | 0:85b3fd62ea1a | 330 | */ |
NYX | 0:85b3fd62ea1a | 331 | HAL_StatusTypeDef SDIO_PowerState_ON(SDIO_TypeDef *SDIOx) |
NYX | 0:85b3fd62ea1a | 332 | { |
NYX | 0:85b3fd62ea1a | 333 | /* Set power state to ON */ |
NYX | 0:85b3fd62ea1a | 334 | SDIOx->POWER = SDIO_POWER_PWRCTRL; |
NYX | 0:85b3fd62ea1a | 335 | |
NYX | 0:85b3fd62ea1a | 336 | return HAL_OK; |
NYX | 0:85b3fd62ea1a | 337 | } |
NYX | 0:85b3fd62ea1a | 338 | |
NYX | 0:85b3fd62ea1a | 339 | /** |
NYX | 0:85b3fd62ea1a | 340 | * @brief Set SDMMC Power state to OFF. |
NYX | 0:85b3fd62ea1a | 341 | * @param SDIOx: Pointer to SDMMC register base |
NYX | 0:85b3fd62ea1a | 342 | * @retval HAL status |
NYX | 0:85b3fd62ea1a | 343 | */ |
NYX | 0:85b3fd62ea1a | 344 | HAL_StatusTypeDef SDIO_PowerState_OFF(SDIO_TypeDef *SDIOx) |
NYX | 0:85b3fd62ea1a | 345 | { |
NYX | 0:85b3fd62ea1a | 346 | /* Set power state to OFF */ |
NYX | 0:85b3fd62ea1a | 347 | SDIOx->POWER = 0x00000000U; |
NYX | 0:85b3fd62ea1a | 348 | |
NYX | 0:85b3fd62ea1a | 349 | return HAL_OK; |
NYX | 0:85b3fd62ea1a | 350 | } |
NYX | 0:85b3fd62ea1a | 351 | |
NYX | 0:85b3fd62ea1a | 352 | /** |
NYX | 0:85b3fd62ea1a | 353 | * @brief Get SDMMC Power state. |
NYX | 0:85b3fd62ea1a | 354 | * @param SDIOx: Pointer to SDMMC register base |
NYX | 0:85b3fd62ea1a | 355 | * @retval Power status of the controller. The returned value can be one of the |
NYX | 0:85b3fd62ea1a | 356 | * following values: |
NYX | 0:85b3fd62ea1a | 357 | * - 0x00: Power OFF |
NYX | 0:85b3fd62ea1a | 358 | * - 0x02: Power UP |
NYX | 0:85b3fd62ea1a | 359 | * - 0x03: Power ON |
NYX | 0:85b3fd62ea1a | 360 | */ |
NYX | 0:85b3fd62ea1a | 361 | uint32_t SDIO_GetPowerState(SDIO_TypeDef *SDIOx) |
NYX | 0:85b3fd62ea1a | 362 | { |
NYX | 0:85b3fd62ea1a | 363 | return (SDIOx->POWER & SDIO_POWER_PWRCTRL); |
NYX | 0:85b3fd62ea1a | 364 | } |
NYX | 0:85b3fd62ea1a | 365 | |
NYX | 0:85b3fd62ea1a | 366 | /** |
NYX | 0:85b3fd62ea1a | 367 | * @brief Configure the SDMMC command path according to the specified parameters in |
NYX | 0:85b3fd62ea1a | 368 | * SDIO_CmdInitTypeDef structure and send the command |
NYX | 0:85b3fd62ea1a | 369 | * @param SDIOx: Pointer to SDMMC register base |
NYX | 0:85b3fd62ea1a | 370 | * @param Command: pointer to a SDIO_CmdInitTypeDef structure that contains |
NYX | 0:85b3fd62ea1a | 371 | * the configuration information for the SDMMC command |
NYX | 0:85b3fd62ea1a | 372 | * @retval HAL status |
NYX | 0:85b3fd62ea1a | 373 | */ |
NYX | 0:85b3fd62ea1a | 374 | HAL_StatusTypeDef SDIO_SendCommand(SDIO_TypeDef *SDIOx, SDIO_CmdInitTypeDef *Command) |
NYX | 0:85b3fd62ea1a | 375 | { |
NYX | 0:85b3fd62ea1a | 376 | uint32_t tmpreg = 0U; |
NYX | 0:85b3fd62ea1a | 377 | |
NYX | 0:85b3fd62ea1a | 378 | /* Check the parameters */ |
NYX | 0:85b3fd62ea1a | 379 | assert_param(IS_SDIO_CMD_INDEX(Command->CmdIndex)); |
NYX | 0:85b3fd62ea1a | 380 | assert_param(IS_SDIO_RESPONSE(Command->Response)); |
NYX | 0:85b3fd62ea1a | 381 | assert_param(IS_SDIO_WAIT(Command->WaitForInterrupt)); |
NYX | 0:85b3fd62ea1a | 382 | assert_param(IS_SDIO_CPSM(Command->CPSM)); |
NYX | 0:85b3fd62ea1a | 383 | |
NYX | 0:85b3fd62ea1a | 384 | /* Set the SDMMC Argument value */ |
NYX | 0:85b3fd62ea1a | 385 | SDIOx->ARG = Command->Argument; |
NYX | 0:85b3fd62ea1a | 386 | |
NYX | 0:85b3fd62ea1a | 387 | /* Set SDMMC command parameters */ |
NYX | 0:85b3fd62ea1a | 388 | tmpreg |= (uint32_t)(Command->CmdIndex |\ |
NYX | 0:85b3fd62ea1a | 389 | Command->Response |\ |
NYX | 0:85b3fd62ea1a | 390 | Command->WaitForInterrupt |\ |
NYX | 0:85b3fd62ea1a | 391 | Command->CPSM); |
NYX | 0:85b3fd62ea1a | 392 | |
NYX | 0:85b3fd62ea1a | 393 | /* Write to SDMMC CMD register */ |
NYX | 0:85b3fd62ea1a | 394 | MODIFY_REG(SDIOx->CMD, CMD_CLEAR_MASK, tmpreg); |
NYX | 0:85b3fd62ea1a | 395 | |
NYX | 0:85b3fd62ea1a | 396 | return HAL_OK; |
NYX | 0:85b3fd62ea1a | 397 | } |
NYX | 0:85b3fd62ea1a | 398 | |
NYX | 0:85b3fd62ea1a | 399 | /** |
NYX | 0:85b3fd62ea1a | 400 | * @brief Return the command index of last command for which response received |
NYX | 0:85b3fd62ea1a | 401 | * @param SDIOx: Pointer to SDMMC register base |
NYX | 0:85b3fd62ea1a | 402 | * @retval Command index of the last command response received |
NYX | 0:85b3fd62ea1a | 403 | */ |
NYX | 0:85b3fd62ea1a | 404 | uint8_t SDIO_GetCommandResponse(SDIO_TypeDef *SDIOx) |
NYX | 0:85b3fd62ea1a | 405 | { |
NYX | 0:85b3fd62ea1a | 406 | return (uint8_t)(SDIOx->RESPCMD); |
NYX | 0:85b3fd62ea1a | 407 | } |
NYX | 0:85b3fd62ea1a | 408 | |
NYX | 0:85b3fd62ea1a | 409 | |
NYX | 0:85b3fd62ea1a | 410 | /** |
NYX | 0:85b3fd62ea1a | 411 | * @brief Return the response received from the card for the last command |
NYX | 0:85b3fd62ea1a | 412 | * @param SDIOx: Pointer to SDMMC register base |
NYX | 0:85b3fd62ea1a | 413 | * @param Response: Specifies the SDMMC response register. |
NYX | 0:85b3fd62ea1a | 414 | * This parameter can be one of the following values: |
NYX | 0:85b3fd62ea1a | 415 | * @arg SDIO_RESP1: Response Register 1 |
NYX | 0:85b3fd62ea1a | 416 | * @arg SDIO_RESP1: Response Register 2 |
NYX | 0:85b3fd62ea1a | 417 | * @arg SDIO_RESP1: Response Register 3 |
NYX | 0:85b3fd62ea1a | 418 | * @arg SDIO_RESP1: Response Register 4 |
NYX | 0:85b3fd62ea1a | 419 | * @retval The Corresponding response register value |
NYX | 0:85b3fd62ea1a | 420 | */ |
NYX | 0:85b3fd62ea1a | 421 | uint32_t SDIO_GetResponse(SDIO_TypeDef *SDIOx, uint32_t Response) |
NYX | 0:85b3fd62ea1a | 422 | { |
NYX | 0:85b3fd62ea1a | 423 | __IO uint32_t tmp = 0U; |
NYX | 0:85b3fd62ea1a | 424 | |
NYX | 0:85b3fd62ea1a | 425 | /* Check the parameters */ |
NYX | 0:85b3fd62ea1a | 426 | assert_param(IS_SDIO_RESP(Response)); |
NYX | 0:85b3fd62ea1a | 427 | |
NYX | 0:85b3fd62ea1a | 428 | /* Get the response */ |
NYX | 0:85b3fd62ea1a | 429 | tmp = (uint32_t)&(SDIOx->RESP1) + Response; |
NYX | 0:85b3fd62ea1a | 430 | |
NYX | 0:85b3fd62ea1a | 431 | return (*(__IO uint32_t *) tmp); |
NYX | 0:85b3fd62ea1a | 432 | } |
NYX | 0:85b3fd62ea1a | 433 | |
NYX | 0:85b3fd62ea1a | 434 | /** |
NYX | 0:85b3fd62ea1a | 435 | * @brief Configure the SDMMC data path according to the specified |
NYX | 0:85b3fd62ea1a | 436 | * parameters in the SDIO_DataInitTypeDef. |
NYX | 0:85b3fd62ea1a | 437 | * @param SDIOx: Pointer to SDMMC register base |
NYX | 0:85b3fd62ea1a | 438 | * @param Data : pointer to a SDIO_DataInitTypeDef structure |
NYX | 0:85b3fd62ea1a | 439 | * that contains the configuration information for the SDMMC data. |
NYX | 0:85b3fd62ea1a | 440 | * @retval HAL status |
NYX | 0:85b3fd62ea1a | 441 | */ |
NYX | 0:85b3fd62ea1a | 442 | HAL_StatusTypeDef SDIO_ConfigData(SDIO_TypeDef *SDIOx, SDIO_DataInitTypeDef* Data) |
NYX | 0:85b3fd62ea1a | 443 | { |
NYX | 0:85b3fd62ea1a | 444 | uint32_t tmpreg = 0U; |
NYX | 0:85b3fd62ea1a | 445 | |
NYX | 0:85b3fd62ea1a | 446 | /* Check the parameters */ |
NYX | 0:85b3fd62ea1a | 447 | assert_param(IS_SDIO_DATA_LENGTH(Data->DataLength)); |
NYX | 0:85b3fd62ea1a | 448 | assert_param(IS_SDIO_BLOCK_SIZE(Data->DataBlockSize)); |
NYX | 0:85b3fd62ea1a | 449 | assert_param(IS_SDIO_TRANSFER_DIR(Data->TransferDir)); |
NYX | 0:85b3fd62ea1a | 450 | assert_param(IS_SDIO_TRANSFER_MODE(Data->TransferMode)); |
NYX | 0:85b3fd62ea1a | 451 | assert_param(IS_SDIO_DPSM(Data->DPSM)); |
NYX | 0:85b3fd62ea1a | 452 | |
NYX | 0:85b3fd62ea1a | 453 | /* Set the SDMMC Data TimeOut value */ |
NYX | 0:85b3fd62ea1a | 454 | SDIOx->DTIMER = Data->DataTimeOut; |
NYX | 0:85b3fd62ea1a | 455 | |
NYX | 0:85b3fd62ea1a | 456 | /* Set the SDMMC DataLength value */ |
NYX | 0:85b3fd62ea1a | 457 | SDIOx->DLEN = Data->DataLength; |
NYX | 0:85b3fd62ea1a | 458 | |
NYX | 0:85b3fd62ea1a | 459 | /* Set the SDMMC data configuration parameters */ |
NYX | 0:85b3fd62ea1a | 460 | tmpreg |= (uint32_t)(Data->DataBlockSize |\ |
NYX | 0:85b3fd62ea1a | 461 | Data->TransferDir |\ |
NYX | 0:85b3fd62ea1a | 462 | Data->TransferMode |\ |
NYX | 0:85b3fd62ea1a | 463 | Data->DPSM); |
NYX | 0:85b3fd62ea1a | 464 | |
NYX | 0:85b3fd62ea1a | 465 | /* Write to SDMMC DCTRL */ |
NYX | 0:85b3fd62ea1a | 466 | MODIFY_REG(SDIOx->DCTRL, DCTRL_CLEAR_MASK, tmpreg); |
NYX | 0:85b3fd62ea1a | 467 | |
NYX | 0:85b3fd62ea1a | 468 | return HAL_OK; |
NYX | 0:85b3fd62ea1a | 469 | |
NYX | 0:85b3fd62ea1a | 470 | } |
NYX | 0:85b3fd62ea1a | 471 | |
NYX | 0:85b3fd62ea1a | 472 | /** |
NYX | 0:85b3fd62ea1a | 473 | * @brief Returns number of remaining data bytes to be transferred. |
NYX | 0:85b3fd62ea1a | 474 | * @param SDIOx: Pointer to SDMMC register base |
NYX | 0:85b3fd62ea1a | 475 | * @retval Number of remaining data bytes to be transferred |
NYX | 0:85b3fd62ea1a | 476 | */ |
NYX | 0:85b3fd62ea1a | 477 | uint32_t SDIO_GetDataCounter(SDIO_TypeDef *SDIOx) |
NYX | 0:85b3fd62ea1a | 478 | { |
NYX | 0:85b3fd62ea1a | 479 | return (SDIOx->DCOUNT); |
NYX | 0:85b3fd62ea1a | 480 | } |
NYX | 0:85b3fd62ea1a | 481 | |
NYX | 0:85b3fd62ea1a | 482 | /** |
NYX | 0:85b3fd62ea1a | 483 | * @brief Get the FIFO data |
NYX | 0:85b3fd62ea1a | 484 | * @param SDIOx: Pointer to SDMMC register base |
NYX | 0:85b3fd62ea1a | 485 | * @retval Data received |
NYX | 0:85b3fd62ea1a | 486 | */ |
NYX | 0:85b3fd62ea1a | 487 | uint32_t SDIO_GetFIFOCount(SDIO_TypeDef *SDIOx) |
NYX | 0:85b3fd62ea1a | 488 | { |
NYX | 0:85b3fd62ea1a | 489 | return (SDIOx->FIFO); |
NYX | 0:85b3fd62ea1a | 490 | } |
NYX | 0:85b3fd62ea1a | 491 | |
NYX | 0:85b3fd62ea1a | 492 | /** |
NYX | 0:85b3fd62ea1a | 493 | * @brief Sets one of the two options of inserting read wait interval. |
NYX | 0:85b3fd62ea1a | 494 | * @param SDIOx: Pointer to SDMMC register base |
NYX | 0:85b3fd62ea1a | 495 | * @param SDIO_ReadWaitMode: SDMMC Read Wait operation mode. |
NYX | 0:85b3fd62ea1a | 496 | * This parameter can be: |
NYX | 0:85b3fd62ea1a | 497 | * @arg SDIO_READ_WAIT_MODE_CLK: Read Wait control by stopping SDMMCCLK |
NYX | 0:85b3fd62ea1a | 498 | * @arg SDIO_READ_WAIT_MODE_DATA2: Read Wait control using SDMMC_DATA2 |
NYX | 0:85b3fd62ea1a | 499 | * @retval None |
NYX | 0:85b3fd62ea1a | 500 | */ |
NYX | 0:85b3fd62ea1a | 501 | HAL_StatusTypeDef SDIO_SetSDMMCReadWaitMode(SDIO_TypeDef *SDIOx, uint32_t SDIO_ReadWaitMode) |
NYX | 0:85b3fd62ea1a | 502 | { |
NYX | 0:85b3fd62ea1a | 503 | /* Check the parameters */ |
NYX | 0:85b3fd62ea1a | 504 | assert_param(IS_SDIO_READWAIT_MODE(SDIO_ReadWaitMode)); |
NYX | 0:85b3fd62ea1a | 505 | |
NYX | 0:85b3fd62ea1a | 506 | /* Set SDMMC read wait mode */ |
NYX | 0:85b3fd62ea1a | 507 | MODIFY_REG(SDIOx->DCTRL, SDIO_DCTRL_RWMOD, SDIO_ReadWaitMode); |
NYX | 0:85b3fd62ea1a | 508 | |
NYX | 0:85b3fd62ea1a | 509 | return HAL_OK; |
NYX | 0:85b3fd62ea1a | 510 | } |
NYX | 0:85b3fd62ea1a | 511 | |
NYX | 0:85b3fd62ea1a | 512 | /** |
NYX | 0:85b3fd62ea1a | 513 | * @} |
NYX | 0:85b3fd62ea1a | 514 | */ |
NYX | 0:85b3fd62ea1a | 515 | |
NYX | 0:85b3fd62ea1a | 516 | |
NYX | 0:85b3fd62ea1a | 517 | /** @defgroup HAL_SDMMC_LL_Group4 Command management functions |
NYX | 0:85b3fd62ea1a | 518 | * @brief Data transfers functions |
NYX | 0:85b3fd62ea1a | 519 | * |
NYX | 0:85b3fd62ea1a | 520 | @verbatim |
NYX | 0:85b3fd62ea1a | 521 | =============================================================================== |
NYX | 0:85b3fd62ea1a | 522 | ##### Commands management functions ##### |
NYX | 0:85b3fd62ea1a | 523 | =============================================================================== |
NYX | 0:85b3fd62ea1a | 524 | [..] |
NYX | 0:85b3fd62ea1a | 525 | This subsection provides a set of functions allowing to manage the needed commands. |
NYX | 0:85b3fd62ea1a | 526 | |
NYX | 0:85b3fd62ea1a | 527 | @endverbatim |
NYX | 0:85b3fd62ea1a | 528 | * @{ |
NYX | 0:85b3fd62ea1a | 529 | */ |
NYX | 0:85b3fd62ea1a | 530 | |
NYX | 0:85b3fd62ea1a | 531 | /** |
NYX | 0:85b3fd62ea1a | 532 | * @brief Send the Data Block Lenght command and check the response |
NYX | 0:85b3fd62ea1a | 533 | * @param SDIOx: Pointer to SDMMC register base |
NYX | 0:85b3fd62ea1a | 534 | * @retval HAL status |
NYX | 0:85b3fd62ea1a | 535 | */ |
NYX | 0:85b3fd62ea1a | 536 | uint32_t SDMMC_CmdBlockLength(SDIO_TypeDef *SDIOx, uint32_t BlockSize) |
NYX | 0:85b3fd62ea1a | 537 | { |
NYX | 0:85b3fd62ea1a | 538 | SDIO_CmdInitTypeDef sdmmc_cmdinit; |
NYX | 0:85b3fd62ea1a | 539 | uint32_t errorstate = SDMMC_ERROR_NONE; |
NYX | 0:85b3fd62ea1a | 540 | |
NYX | 0:85b3fd62ea1a | 541 | /* Set Block Size for Card */ |
NYX | 0:85b3fd62ea1a | 542 | sdmmc_cmdinit.Argument = (uint32_t)BlockSize; |
NYX | 0:85b3fd62ea1a | 543 | sdmmc_cmdinit.CmdIndex = SDMMC_CMD_SET_BLOCKLEN; |
NYX | 0:85b3fd62ea1a | 544 | sdmmc_cmdinit.Response = SDIO_RESPONSE_SHORT; |
NYX | 0:85b3fd62ea1a | 545 | sdmmc_cmdinit.WaitForInterrupt = SDIO_WAIT_NO; |
NYX | 0:85b3fd62ea1a | 546 | sdmmc_cmdinit.CPSM = SDIO_CPSM_ENABLE; |
NYX | 0:85b3fd62ea1a | 547 | SDIO_SendCommand(SDIOx, &sdmmc_cmdinit); |
NYX | 0:85b3fd62ea1a | 548 | |
NYX | 0:85b3fd62ea1a | 549 | /* Check for error conditions */ |
NYX | 0:85b3fd62ea1a | 550 | errorstate = SDMMC_GetCmdResp1(SDIOx, SDMMC_CMD_SET_BLOCKLEN, SDIO_CMDTIMEOUT); |
NYX | 0:85b3fd62ea1a | 551 | |
NYX | 0:85b3fd62ea1a | 552 | return errorstate; |
NYX | 0:85b3fd62ea1a | 553 | } |
NYX | 0:85b3fd62ea1a | 554 | |
NYX | 0:85b3fd62ea1a | 555 | /** |
NYX | 0:85b3fd62ea1a | 556 | * @brief Send the Read Single Block command and check the response |
NYX | 0:85b3fd62ea1a | 557 | * @param SDIOx: Pointer to SDMMC register base |
NYX | 0:85b3fd62ea1a | 558 | * @retval HAL status |
NYX | 0:85b3fd62ea1a | 559 | */ |
NYX | 0:85b3fd62ea1a | 560 | uint32_t SDMMC_CmdReadSingleBlock(SDIO_TypeDef *SDIOx, uint32_t ReadAdd) |
NYX | 0:85b3fd62ea1a | 561 | { |
NYX | 0:85b3fd62ea1a | 562 | SDIO_CmdInitTypeDef sdmmc_cmdinit; |
NYX | 0:85b3fd62ea1a | 563 | uint32_t errorstate = SDMMC_ERROR_NONE; |
NYX | 0:85b3fd62ea1a | 564 | |
NYX | 0:85b3fd62ea1a | 565 | /* Set Block Size for Card */ |
NYX | 0:85b3fd62ea1a | 566 | sdmmc_cmdinit.Argument = (uint32_t)ReadAdd; |
NYX | 0:85b3fd62ea1a | 567 | sdmmc_cmdinit.CmdIndex = SDMMC_CMD_READ_SINGLE_BLOCK; |
NYX | 0:85b3fd62ea1a | 568 | sdmmc_cmdinit.Response = SDIO_RESPONSE_SHORT; |
NYX | 0:85b3fd62ea1a | 569 | sdmmc_cmdinit.WaitForInterrupt = SDIO_WAIT_NO; |
NYX | 0:85b3fd62ea1a | 570 | sdmmc_cmdinit.CPSM = SDIO_CPSM_ENABLE; |
NYX | 0:85b3fd62ea1a | 571 | SDIO_SendCommand(SDIOx, &sdmmc_cmdinit); |
NYX | 0:85b3fd62ea1a | 572 | |
NYX | 0:85b3fd62ea1a | 573 | /* Check for error conditions */ |
NYX | 0:85b3fd62ea1a | 574 | errorstate = SDMMC_GetCmdResp1(SDIOx, SDMMC_CMD_READ_SINGLE_BLOCK, SDIO_CMDTIMEOUT); |
NYX | 0:85b3fd62ea1a | 575 | |
NYX | 0:85b3fd62ea1a | 576 | return errorstate; |
NYX | 0:85b3fd62ea1a | 577 | } |
NYX | 0:85b3fd62ea1a | 578 | |
NYX | 0:85b3fd62ea1a | 579 | /** |
NYX | 0:85b3fd62ea1a | 580 | * @brief Send the Read Multi Block command and check the response |
NYX | 0:85b3fd62ea1a | 581 | * @param SDIOx: Pointer to SDIO register base |
NYX | 0:85b3fd62ea1a | 582 | * @retval HAL status |
NYX | 0:85b3fd62ea1a | 583 | */ |
NYX | 0:85b3fd62ea1a | 584 | uint32_t SDMMC_CmdReadMultiBlock(SDIO_TypeDef *SDIOx, uint32_t ReadAdd) |
NYX | 0:85b3fd62ea1a | 585 | { |
NYX | 0:85b3fd62ea1a | 586 | SDIO_CmdInitTypeDef sdmmc_cmdinit; |
NYX | 0:85b3fd62ea1a | 587 | uint32_t errorstate = SDMMC_ERROR_NONE; |
NYX | 0:85b3fd62ea1a | 588 | |
NYX | 0:85b3fd62ea1a | 589 | /* Set Block Size for Card */ |
NYX | 0:85b3fd62ea1a | 590 | sdmmc_cmdinit.Argument = (uint32_t)ReadAdd; |
NYX | 0:85b3fd62ea1a | 591 | sdmmc_cmdinit.CmdIndex = SDMMC_CMD_READ_MULT_BLOCK; |
NYX | 0:85b3fd62ea1a | 592 | sdmmc_cmdinit.Response = SDIO_RESPONSE_SHORT; |
NYX | 0:85b3fd62ea1a | 593 | sdmmc_cmdinit.WaitForInterrupt = SDIO_WAIT_NO; |
NYX | 0:85b3fd62ea1a | 594 | sdmmc_cmdinit.CPSM = SDIO_CPSM_ENABLE; |
NYX | 0:85b3fd62ea1a | 595 | SDIO_SendCommand(SDIOx, &sdmmc_cmdinit); |
NYX | 0:85b3fd62ea1a | 596 | |
NYX | 0:85b3fd62ea1a | 597 | /* Check for error conditions */ |
NYX | 0:85b3fd62ea1a | 598 | errorstate = SDMMC_GetCmdResp1(SDIOx, SDMMC_CMD_READ_MULT_BLOCK, SDIO_CMDTIMEOUT); |
NYX | 0:85b3fd62ea1a | 599 | |
NYX | 0:85b3fd62ea1a | 600 | return errorstate; |
NYX | 0:85b3fd62ea1a | 601 | } |
NYX | 0:85b3fd62ea1a | 602 | |
NYX | 0:85b3fd62ea1a | 603 | /** |
NYX | 0:85b3fd62ea1a | 604 | * @brief Send the Write Single Block command and check the response |
NYX | 0:85b3fd62ea1a | 605 | * @param SDIOx: Pointer to SDIO register base |
NYX | 0:85b3fd62ea1a | 606 | * @retval HAL status |
NYX | 0:85b3fd62ea1a | 607 | */ |
NYX | 0:85b3fd62ea1a | 608 | uint32_t SDMMC_CmdWriteSingleBlock(SDIO_TypeDef *SDIOx, uint32_t WriteAdd) |
NYX | 0:85b3fd62ea1a | 609 | { |
NYX | 0:85b3fd62ea1a | 610 | SDIO_CmdInitTypeDef sdmmc_cmdinit; |
NYX | 0:85b3fd62ea1a | 611 | uint32_t errorstate = SDMMC_ERROR_NONE; |
NYX | 0:85b3fd62ea1a | 612 | |
NYX | 0:85b3fd62ea1a | 613 | /* Set Block Size for Card */ |
NYX | 0:85b3fd62ea1a | 614 | sdmmc_cmdinit.Argument = (uint32_t)WriteAdd; |
NYX | 0:85b3fd62ea1a | 615 | sdmmc_cmdinit.CmdIndex = SDMMC_CMD_WRITE_SINGLE_BLOCK; |
NYX | 0:85b3fd62ea1a | 616 | sdmmc_cmdinit.Response = SDIO_RESPONSE_SHORT; |
NYX | 0:85b3fd62ea1a | 617 | sdmmc_cmdinit.WaitForInterrupt = SDIO_WAIT_NO; |
NYX | 0:85b3fd62ea1a | 618 | sdmmc_cmdinit.CPSM = SDIO_CPSM_ENABLE; |
NYX | 0:85b3fd62ea1a | 619 | SDIO_SendCommand(SDIOx, &sdmmc_cmdinit); |
NYX | 0:85b3fd62ea1a | 620 | |
NYX | 0:85b3fd62ea1a | 621 | /* Check for error conditions */ |
NYX | 0:85b3fd62ea1a | 622 | errorstate = SDMMC_GetCmdResp1(SDIOx, SDMMC_CMD_WRITE_SINGLE_BLOCK, SDIO_CMDTIMEOUT); |
NYX | 0:85b3fd62ea1a | 623 | |
NYX | 0:85b3fd62ea1a | 624 | return errorstate; |
NYX | 0:85b3fd62ea1a | 625 | } |
NYX | 0:85b3fd62ea1a | 626 | |
NYX | 0:85b3fd62ea1a | 627 | /** |
NYX | 0:85b3fd62ea1a | 628 | * @brief Send the Write Multi Block command and check the response |
NYX | 0:85b3fd62ea1a | 629 | * @param SDIOx: Pointer to SDIO register base |
NYX | 0:85b3fd62ea1a | 630 | * @retval HAL status |
NYX | 0:85b3fd62ea1a | 631 | */ |
NYX | 0:85b3fd62ea1a | 632 | uint32_t SDMMC_CmdWriteMultiBlock(SDIO_TypeDef *SDIOx, uint32_t WriteAdd) |
NYX | 0:85b3fd62ea1a | 633 | { |
NYX | 0:85b3fd62ea1a | 634 | SDIO_CmdInitTypeDef sdmmc_cmdinit; |
NYX | 0:85b3fd62ea1a | 635 | uint32_t errorstate = SDMMC_ERROR_NONE; |
NYX | 0:85b3fd62ea1a | 636 | |
NYX | 0:85b3fd62ea1a | 637 | /* Set Block Size for Card */ |
NYX | 0:85b3fd62ea1a | 638 | sdmmc_cmdinit.Argument = (uint32_t)WriteAdd; |
NYX | 0:85b3fd62ea1a | 639 | sdmmc_cmdinit.CmdIndex = SDMMC_CMD_WRITE_MULT_BLOCK; |
NYX | 0:85b3fd62ea1a | 640 | sdmmc_cmdinit.Response = SDIO_RESPONSE_SHORT; |
NYX | 0:85b3fd62ea1a | 641 | sdmmc_cmdinit.WaitForInterrupt = SDIO_WAIT_NO; |
NYX | 0:85b3fd62ea1a | 642 | sdmmc_cmdinit.CPSM = SDIO_CPSM_ENABLE; |
NYX | 0:85b3fd62ea1a | 643 | SDIO_SendCommand(SDIOx, &sdmmc_cmdinit); |
NYX | 0:85b3fd62ea1a | 644 | |
NYX | 0:85b3fd62ea1a | 645 | /* Check for error conditions */ |
NYX | 0:85b3fd62ea1a | 646 | errorstate = SDMMC_GetCmdResp1(SDIOx, SDMMC_CMD_WRITE_MULT_BLOCK, SDIO_CMDTIMEOUT); |
NYX | 0:85b3fd62ea1a | 647 | |
NYX | 0:85b3fd62ea1a | 648 | return errorstate; |
NYX | 0:85b3fd62ea1a | 649 | } |
NYX | 0:85b3fd62ea1a | 650 | |
NYX | 0:85b3fd62ea1a | 651 | /** |
NYX | 0:85b3fd62ea1a | 652 | * @brief Send the Start Address Erase command for SD and check the response |
NYX | 0:85b3fd62ea1a | 653 | * @param SDIOx: Pointer to SDIO register base |
NYX | 0:85b3fd62ea1a | 654 | * @retval HAL status |
NYX | 0:85b3fd62ea1a | 655 | */ |
NYX | 0:85b3fd62ea1a | 656 | uint32_t SDMMC_CmdSDEraseStartAdd(SDIO_TypeDef *SDIOx, uint32_t StartAdd) |
NYX | 0:85b3fd62ea1a | 657 | { |
NYX | 0:85b3fd62ea1a | 658 | SDIO_CmdInitTypeDef sdmmc_cmdinit; |
NYX | 0:85b3fd62ea1a | 659 | uint32_t errorstate = SDMMC_ERROR_NONE; |
NYX | 0:85b3fd62ea1a | 660 | |
NYX | 0:85b3fd62ea1a | 661 | /* Set Block Size for Card */ |
NYX | 0:85b3fd62ea1a | 662 | sdmmc_cmdinit.Argument = (uint32_t)StartAdd; |
NYX | 0:85b3fd62ea1a | 663 | sdmmc_cmdinit.CmdIndex = SDMMC_CMD_SD_ERASE_GRP_START; |
NYX | 0:85b3fd62ea1a | 664 | sdmmc_cmdinit.Response = SDIO_RESPONSE_SHORT; |
NYX | 0:85b3fd62ea1a | 665 | sdmmc_cmdinit.WaitForInterrupt = SDIO_WAIT_NO; |
NYX | 0:85b3fd62ea1a | 666 | sdmmc_cmdinit.CPSM = SDIO_CPSM_ENABLE; |
NYX | 0:85b3fd62ea1a | 667 | SDIO_SendCommand(SDIOx, &sdmmc_cmdinit); |
NYX | 0:85b3fd62ea1a | 668 | |
NYX | 0:85b3fd62ea1a | 669 | /* Check for error conditions */ |
NYX | 0:85b3fd62ea1a | 670 | errorstate = SDMMC_GetCmdResp1(SDIOx, SDMMC_CMD_SD_ERASE_GRP_START, SDIO_CMDTIMEOUT); |
NYX | 0:85b3fd62ea1a | 671 | |
NYX | 0:85b3fd62ea1a | 672 | return errorstate; |
NYX | 0:85b3fd62ea1a | 673 | } |
NYX | 0:85b3fd62ea1a | 674 | |
NYX | 0:85b3fd62ea1a | 675 | /** |
NYX | 0:85b3fd62ea1a | 676 | * @brief Send the End Address Erase command for SD and check the response |
NYX | 0:85b3fd62ea1a | 677 | * @param SDIOx: Pointer to SDIO register base |
NYX | 0:85b3fd62ea1a | 678 | * @retval HAL status |
NYX | 0:85b3fd62ea1a | 679 | */ |
NYX | 0:85b3fd62ea1a | 680 | uint32_t SDMMC_CmdSDEraseEndAdd(SDIO_TypeDef *SDIOx, uint32_t EndAdd) |
NYX | 0:85b3fd62ea1a | 681 | { |
NYX | 0:85b3fd62ea1a | 682 | SDIO_CmdInitTypeDef sdmmc_cmdinit; |
NYX | 0:85b3fd62ea1a | 683 | uint32_t errorstate = SDMMC_ERROR_NONE; |
NYX | 0:85b3fd62ea1a | 684 | |
NYX | 0:85b3fd62ea1a | 685 | /* Set Block Size for Card */ |
NYX | 0:85b3fd62ea1a | 686 | sdmmc_cmdinit.Argument = (uint32_t)EndAdd; |
NYX | 0:85b3fd62ea1a | 687 | sdmmc_cmdinit.CmdIndex = SDMMC_CMD_SD_ERASE_GRP_END; |
NYX | 0:85b3fd62ea1a | 688 | sdmmc_cmdinit.Response = SDIO_RESPONSE_SHORT; |
NYX | 0:85b3fd62ea1a | 689 | sdmmc_cmdinit.WaitForInterrupt = SDIO_WAIT_NO; |
NYX | 0:85b3fd62ea1a | 690 | sdmmc_cmdinit.CPSM = SDIO_CPSM_ENABLE; |
NYX | 0:85b3fd62ea1a | 691 | SDIO_SendCommand(SDIOx, &sdmmc_cmdinit); |
NYX | 0:85b3fd62ea1a | 692 | |
NYX | 0:85b3fd62ea1a | 693 | /* Check for error conditions */ |
NYX | 0:85b3fd62ea1a | 694 | errorstate = SDMMC_GetCmdResp1(SDIOx, SDMMC_CMD_SD_ERASE_GRP_END, SDIO_CMDTIMEOUT); |
NYX | 0:85b3fd62ea1a | 695 | |
NYX | 0:85b3fd62ea1a | 696 | return errorstate; |
NYX | 0:85b3fd62ea1a | 697 | } |
NYX | 0:85b3fd62ea1a | 698 | |
NYX | 0:85b3fd62ea1a | 699 | /** |
NYX | 0:85b3fd62ea1a | 700 | * @brief Send the Start Address Erase command and check the response |
NYX | 0:85b3fd62ea1a | 701 | * @param SDIOx: Pointer to SDIO register base |
NYX | 0:85b3fd62ea1a | 702 | * @retval HAL status |
NYX | 0:85b3fd62ea1a | 703 | */ |
NYX | 0:85b3fd62ea1a | 704 | uint32_t SDMMC_CmdEraseStartAdd(SDIO_TypeDef *SDIOx, uint32_t StartAdd) |
NYX | 0:85b3fd62ea1a | 705 | { |
NYX | 0:85b3fd62ea1a | 706 | SDIO_CmdInitTypeDef sdmmc_cmdinit; |
NYX | 0:85b3fd62ea1a | 707 | uint32_t errorstate = SDMMC_ERROR_NONE; |
NYX | 0:85b3fd62ea1a | 708 | |
NYX | 0:85b3fd62ea1a | 709 | /* Set Block Size for Card */ |
NYX | 0:85b3fd62ea1a | 710 | sdmmc_cmdinit.Argument = (uint32_t)StartAdd; |
NYX | 0:85b3fd62ea1a | 711 | sdmmc_cmdinit.CmdIndex = SDMMC_CMD_ERASE_GRP_START; |
NYX | 0:85b3fd62ea1a | 712 | sdmmc_cmdinit.Response = SDIO_RESPONSE_SHORT; |
NYX | 0:85b3fd62ea1a | 713 | sdmmc_cmdinit.WaitForInterrupt = SDIO_WAIT_NO; |
NYX | 0:85b3fd62ea1a | 714 | sdmmc_cmdinit.CPSM = SDIO_CPSM_ENABLE; |
NYX | 0:85b3fd62ea1a | 715 | SDIO_SendCommand(SDIOx, &sdmmc_cmdinit); |
NYX | 0:85b3fd62ea1a | 716 | |
NYX | 0:85b3fd62ea1a | 717 | /* Check for error conditions */ |
NYX | 0:85b3fd62ea1a | 718 | errorstate = SDMMC_GetCmdResp1(SDIOx, SDMMC_CMD_ERASE_GRP_START, SDIO_CMDTIMEOUT); |
NYX | 0:85b3fd62ea1a | 719 | |
NYX | 0:85b3fd62ea1a | 720 | return errorstate; |
NYX | 0:85b3fd62ea1a | 721 | } |
NYX | 0:85b3fd62ea1a | 722 | |
NYX | 0:85b3fd62ea1a | 723 | /** |
NYX | 0:85b3fd62ea1a | 724 | * @brief Send the End Address Erase command and check the response |
NYX | 0:85b3fd62ea1a | 725 | * @param SDIOx: Pointer to SDIO register base |
NYX | 0:85b3fd62ea1a | 726 | * @retval HAL status |
NYX | 0:85b3fd62ea1a | 727 | */ |
NYX | 0:85b3fd62ea1a | 728 | uint32_t SDMMC_CmdEraseEndAdd(SDIO_TypeDef *SDIOx, uint32_t EndAdd) |
NYX | 0:85b3fd62ea1a | 729 | { |
NYX | 0:85b3fd62ea1a | 730 | SDIO_CmdInitTypeDef sdmmc_cmdinit; |
NYX | 0:85b3fd62ea1a | 731 | uint32_t errorstate = SDMMC_ERROR_NONE; |
NYX | 0:85b3fd62ea1a | 732 | |
NYX | 0:85b3fd62ea1a | 733 | /* Set Block Size for Card */ |
NYX | 0:85b3fd62ea1a | 734 | sdmmc_cmdinit.Argument = (uint32_t)EndAdd; |
NYX | 0:85b3fd62ea1a | 735 | sdmmc_cmdinit.CmdIndex = SDMMC_CMD_ERASE_GRP_END; |
NYX | 0:85b3fd62ea1a | 736 | sdmmc_cmdinit.Response = SDIO_RESPONSE_SHORT; |
NYX | 0:85b3fd62ea1a | 737 | sdmmc_cmdinit.WaitForInterrupt = SDIO_WAIT_NO; |
NYX | 0:85b3fd62ea1a | 738 | sdmmc_cmdinit.CPSM = SDIO_CPSM_ENABLE; |
NYX | 0:85b3fd62ea1a | 739 | SDIO_SendCommand(SDIOx, &sdmmc_cmdinit); |
NYX | 0:85b3fd62ea1a | 740 | |
NYX | 0:85b3fd62ea1a | 741 | /* Check for error conditions */ |
NYX | 0:85b3fd62ea1a | 742 | errorstate = SDMMC_GetCmdResp1(SDIOx, SDMMC_CMD_ERASE_GRP_END, SDIO_CMDTIMEOUT); |
NYX | 0:85b3fd62ea1a | 743 | |
NYX | 0:85b3fd62ea1a | 744 | return errorstate; |
NYX | 0:85b3fd62ea1a | 745 | } |
NYX | 0:85b3fd62ea1a | 746 | |
NYX | 0:85b3fd62ea1a | 747 | /** |
NYX | 0:85b3fd62ea1a | 748 | * @brief Send the Erase command and check the response |
NYX | 0:85b3fd62ea1a | 749 | * @param SDIOx: Pointer to SDIO register base |
NYX | 0:85b3fd62ea1a | 750 | * @retval HAL status |
NYX | 0:85b3fd62ea1a | 751 | */ |
NYX | 0:85b3fd62ea1a | 752 | uint32_t SDMMC_CmdErase(SDIO_TypeDef *SDIOx) |
NYX | 0:85b3fd62ea1a | 753 | { |
NYX | 0:85b3fd62ea1a | 754 | SDIO_CmdInitTypeDef sdmmc_cmdinit; |
NYX | 0:85b3fd62ea1a | 755 | uint32_t errorstate = SDMMC_ERROR_NONE; |
NYX | 0:85b3fd62ea1a | 756 | |
NYX | 0:85b3fd62ea1a | 757 | /* Set Block Size for Card */ |
NYX | 0:85b3fd62ea1a | 758 | sdmmc_cmdinit.Argument = 0U; |
NYX | 0:85b3fd62ea1a | 759 | sdmmc_cmdinit.CmdIndex = SDMMC_CMD_ERASE; |
NYX | 0:85b3fd62ea1a | 760 | sdmmc_cmdinit.Response = SDIO_RESPONSE_SHORT; |
NYX | 0:85b3fd62ea1a | 761 | sdmmc_cmdinit.WaitForInterrupt = SDIO_WAIT_NO; |
NYX | 0:85b3fd62ea1a | 762 | sdmmc_cmdinit.CPSM = SDIO_CPSM_ENABLE; |
NYX | 0:85b3fd62ea1a | 763 | SDIO_SendCommand(SDIOx, &sdmmc_cmdinit); |
NYX | 0:85b3fd62ea1a | 764 | |
NYX | 0:85b3fd62ea1a | 765 | /* Check for error conditions */ |
NYX | 0:85b3fd62ea1a | 766 | errorstate = SDMMC_GetCmdResp1(SDIOx, SDMMC_CMD_ERASE, SDIO_MAXERASETIMEOUT); |
NYX | 0:85b3fd62ea1a | 767 | |
NYX | 0:85b3fd62ea1a | 768 | return errorstate; |
NYX | 0:85b3fd62ea1a | 769 | } |
NYX | 0:85b3fd62ea1a | 770 | |
NYX | 0:85b3fd62ea1a | 771 | /** |
NYX | 0:85b3fd62ea1a | 772 | * @brief Send the Stop Transfer command and check the response. |
NYX | 0:85b3fd62ea1a | 773 | * @param SDIOx: Pointer to SDIO register base |
NYX | 0:85b3fd62ea1a | 774 | * @retval HAL status |
NYX | 0:85b3fd62ea1a | 775 | */ |
NYX | 0:85b3fd62ea1a | 776 | uint32_t SDMMC_CmdStopTransfer(SDIO_TypeDef *SDIOx) |
NYX | 0:85b3fd62ea1a | 777 | { |
NYX | 0:85b3fd62ea1a | 778 | SDIO_CmdInitTypeDef sdmmc_cmdinit; |
NYX | 0:85b3fd62ea1a | 779 | uint32_t errorstate = SDMMC_ERROR_NONE; |
NYX | 0:85b3fd62ea1a | 780 | |
NYX | 0:85b3fd62ea1a | 781 | /* Send CMD12 STOP_TRANSMISSION */ |
NYX | 0:85b3fd62ea1a | 782 | sdmmc_cmdinit.Argument = 0U; |
NYX | 0:85b3fd62ea1a | 783 | sdmmc_cmdinit.CmdIndex = SDMMC_CMD_STOP_TRANSMISSION; |
NYX | 0:85b3fd62ea1a | 784 | sdmmc_cmdinit.Response = SDIO_RESPONSE_SHORT; |
NYX | 0:85b3fd62ea1a | 785 | sdmmc_cmdinit.WaitForInterrupt = SDIO_WAIT_NO; |
NYX | 0:85b3fd62ea1a | 786 | sdmmc_cmdinit.CPSM = SDIO_CPSM_ENABLE; |
NYX | 0:85b3fd62ea1a | 787 | SDIO_SendCommand(SDIOx, &sdmmc_cmdinit); |
NYX | 0:85b3fd62ea1a | 788 | |
NYX | 0:85b3fd62ea1a | 789 | /* Check for error conditions */ |
NYX | 0:85b3fd62ea1a | 790 | errorstate = SDMMC_GetCmdResp1(SDIOx, SDMMC_CMD_STOP_TRANSMISSION, 100000000U); |
NYX | 0:85b3fd62ea1a | 791 | |
NYX | 0:85b3fd62ea1a | 792 | return errorstate; |
NYX | 0:85b3fd62ea1a | 793 | } |
NYX | 0:85b3fd62ea1a | 794 | |
NYX | 0:85b3fd62ea1a | 795 | /** |
NYX | 0:85b3fd62ea1a | 796 | * @brief Send the Select Deselect command and check the response. |
NYX | 0:85b3fd62ea1a | 797 | * @param SDIOx: Pointer to SDIO register base |
NYX | 0:85b3fd62ea1a | 798 | * @param addr: Address of the card to be selected |
NYX | 0:85b3fd62ea1a | 799 | * @retval HAL status |
NYX | 0:85b3fd62ea1a | 800 | */ |
NYX | 0:85b3fd62ea1a | 801 | uint32_t SDMMC_CmdSelDesel(SDIO_TypeDef *SDIOx, uint64_t Addr) |
NYX | 0:85b3fd62ea1a | 802 | { |
NYX | 0:85b3fd62ea1a | 803 | SDIO_CmdInitTypeDef sdmmc_cmdinit; |
NYX | 0:85b3fd62ea1a | 804 | uint32_t errorstate = SDMMC_ERROR_NONE; |
NYX | 0:85b3fd62ea1a | 805 | |
NYX | 0:85b3fd62ea1a | 806 | /* Send CMD7 SDMMC_SEL_DESEL_CARD */ |
NYX | 0:85b3fd62ea1a | 807 | sdmmc_cmdinit.Argument = (uint32_t)Addr; |
NYX | 0:85b3fd62ea1a | 808 | sdmmc_cmdinit.CmdIndex = SDMMC_CMD_SEL_DESEL_CARD; |
NYX | 0:85b3fd62ea1a | 809 | sdmmc_cmdinit.Response = SDIO_RESPONSE_SHORT; |
NYX | 0:85b3fd62ea1a | 810 | sdmmc_cmdinit.WaitForInterrupt = SDIO_WAIT_NO; |
NYX | 0:85b3fd62ea1a | 811 | sdmmc_cmdinit.CPSM = SDIO_CPSM_ENABLE; |
NYX | 0:85b3fd62ea1a | 812 | SDIO_SendCommand(SDIOx, &sdmmc_cmdinit); |
NYX | 0:85b3fd62ea1a | 813 | |
NYX | 0:85b3fd62ea1a | 814 | /* Check for error conditions */ |
NYX | 0:85b3fd62ea1a | 815 | errorstate = SDMMC_GetCmdResp1(SDIOx, SDMMC_CMD_SEL_DESEL_CARD, SDIO_CMDTIMEOUT); |
NYX | 0:85b3fd62ea1a | 816 | |
NYX | 0:85b3fd62ea1a | 817 | return errorstate; |
NYX | 0:85b3fd62ea1a | 818 | } |
NYX | 0:85b3fd62ea1a | 819 | |
NYX | 0:85b3fd62ea1a | 820 | /** |
NYX | 0:85b3fd62ea1a | 821 | * @brief Send the Go Idle State command and check the response. |
NYX | 0:85b3fd62ea1a | 822 | * @param SDIOx: Pointer to SDIO register base |
NYX | 0:85b3fd62ea1a | 823 | * @retval HAL status |
NYX | 0:85b3fd62ea1a | 824 | */ |
NYX | 0:85b3fd62ea1a | 825 | uint32_t SDMMC_CmdGoIdleState(SDIO_TypeDef *SDIOx) |
NYX | 0:85b3fd62ea1a | 826 | { |
NYX | 0:85b3fd62ea1a | 827 | SDIO_CmdInitTypeDef sdmmc_cmdinit; |
NYX | 0:85b3fd62ea1a | 828 | uint32_t errorstate = SDMMC_ERROR_NONE; |
NYX | 0:85b3fd62ea1a | 829 | |
NYX | 0:85b3fd62ea1a | 830 | sdmmc_cmdinit.Argument = 0U; |
NYX | 0:85b3fd62ea1a | 831 | sdmmc_cmdinit.CmdIndex = SDMMC_CMD_GO_IDLE_STATE; |
NYX | 0:85b3fd62ea1a | 832 | sdmmc_cmdinit.Response = SDIO_RESPONSE_NO; |
NYX | 0:85b3fd62ea1a | 833 | sdmmc_cmdinit.WaitForInterrupt = SDIO_WAIT_NO; |
NYX | 0:85b3fd62ea1a | 834 | sdmmc_cmdinit.CPSM = SDIO_CPSM_ENABLE; |
NYX | 0:85b3fd62ea1a | 835 | SDIO_SendCommand(SDIOx, &sdmmc_cmdinit); |
NYX | 0:85b3fd62ea1a | 836 | |
NYX | 0:85b3fd62ea1a | 837 | /* Check for error conditions */ |
NYX | 0:85b3fd62ea1a | 838 | errorstate = SDMMC_GetCmdError(SDIOx); |
NYX | 0:85b3fd62ea1a | 839 | |
NYX | 0:85b3fd62ea1a | 840 | return errorstate; |
NYX | 0:85b3fd62ea1a | 841 | } |
NYX | 0:85b3fd62ea1a | 842 | |
NYX | 0:85b3fd62ea1a | 843 | /** |
NYX | 0:85b3fd62ea1a | 844 | * @brief Send the Operating Condition command and check the response. |
NYX | 0:85b3fd62ea1a | 845 | * @param SDIOx: Pointer to SDIO register base |
NYX | 0:85b3fd62ea1a | 846 | * @retval HAL status |
NYX | 0:85b3fd62ea1a | 847 | */ |
NYX | 0:85b3fd62ea1a | 848 | uint32_t SDMMC_CmdOperCond(SDIO_TypeDef *SDIOx) |
NYX | 0:85b3fd62ea1a | 849 | { |
NYX | 0:85b3fd62ea1a | 850 | SDIO_CmdInitTypeDef sdmmc_cmdinit; |
NYX | 0:85b3fd62ea1a | 851 | uint32_t errorstate = SDMMC_ERROR_NONE; |
NYX | 0:85b3fd62ea1a | 852 | |
NYX | 0:85b3fd62ea1a | 853 | /* Send CMD8 to verify SD card interface operating condition */ |
NYX | 0:85b3fd62ea1a | 854 | /* Argument: - [31:12]: Reserved (shall be set to '0') |
NYX | 0:85b3fd62ea1a | 855 | - [11:8]: Supply Voltage (VHS) 0x1 (Range: 2.7-3.6 V) |
NYX | 0:85b3fd62ea1a | 856 | - [7:0]: Check Pattern (recommended 0xAA) */ |
NYX | 0:85b3fd62ea1a | 857 | /* CMD Response: R7 */ |
NYX | 0:85b3fd62ea1a | 858 | sdmmc_cmdinit.Argument = SDMMC_CHECK_PATTERN; |
NYX | 0:85b3fd62ea1a | 859 | sdmmc_cmdinit.CmdIndex = SDMMC_CMD_HS_SEND_EXT_CSD; |
NYX | 0:85b3fd62ea1a | 860 | sdmmc_cmdinit.Response = SDIO_RESPONSE_SHORT; |
NYX | 0:85b3fd62ea1a | 861 | sdmmc_cmdinit.WaitForInterrupt = SDIO_WAIT_NO; |
NYX | 0:85b3fd62ea1a | 862 | sdmmc_cmdinit.CPSM = SDIO_CPSM_ENABLE; |
NYX | 0:85b3fd62ea1a | 863 | SDIO_SendCommand(SDIOx, &sdmmc_cmdinit); |
NYX | 0:85b3fd62ea1a | 864 | |
NYX | 0:85b3fd62ea1a | 865 | /* Check for error conditions */ |
NYX | 0:85b3fd62ea1a | 866 | errorstate = SDMMC_GetCmdResp7(SDIOx); |
NYX | 0:85b3fd62ea1a | 867 | |
NYX | 0:85b3fd62ea1a | 868 | return errorstate; |
NYX | 0:85b3fd62ea1a | 869 | } |
NYX | 0:85b3fd62ea1a | 870 | |
NYX | 0:85b3fd62ea1a | 871 | /** |
NYX | 0:85b3fd62ea1a | 872 | * @brief Send the Application command to verify that that the next command |
NYX | 0:85b3fd62ea1a | 873 | * is an application specific com-mand rather than a standard command |
NYX | 0:85b3fd62ea1a | 874 | * and check the response. |
NYX | 0:85b3fd62ea1a | 875 | * @param SDIOx: Pointer to SDIO register base |
NYX | 0:85b3fd62ea1a | 876 | * @retval HAL status |
NYX | 0:85b3fd62ea1a | 877 | */ |
NYX | 0:85b3fd62ea1a | 878 | uint32_t SDMMC_CmdAppCommand(SDIO_TypeDef *SDIOx, uint32_t Argument) |
NYX | 0:85b3fd62ea1a | 879 | { |
NYX | 0:85b3fd62ea1a | 880 | SDIO_CmdInitTypeDef sdmmc_cmdinit; |
NYX | 0:85b3fd62ea1a | 881 | uint32_t errorstate = SDMMC_ERROR_NONE; |
NYX | 0:85b3fd62ea1a | 882 | |
NYX | 0:85b3fd62ea1a | 883 | sdmmc_cmdinit.Argument = (uint32_t)Argument; |
NYX | 0:85b3fd62ea1a | 884 | sdmmc_cmdinit.CmdIndex = SDMMC_CMD_APP_CMD; |
NYX | 0:85b3fd62ea1a | 885 | sdmmc_cmdinit.Response = SDIO_RESPONSE_SHORT; |
NYX | 0:85b3fd62ea1a | 886 | sdmmc_cmdinit.WaitForInterrupt = SDIO_WAIT_NO; |
NYX | 0:85b3fd62ea1a | 887 | sdmmc_cmdinit.CPSM = SDIO_CPSM_ENABLE; |
NYX | 0:85b3fd62ea1a | 888 | SDIO_SendCommand(SDIOx, &sdmmc_cmdinit); |
NYX | 0:85b3fd62ea1a | 889 | |
NYX | 0:85b3fd62ea1a | 890 | /* Check for error conditions */ |
NYX | 0:85b3fd62ea1a | 891 | /* If there is a HAL_ERROR, it is a MMC card, else |
NYX | 0:85b3fd62ea1a | 892 | it is a SD card: SD card 2.0 (voltage range mismatch) |
NYX | 0:85b3fd62ea1a | 893 | or SD card 1.x */ |
NYX | 0:85b3fd62ea1a | 894 | errorstate = SDMMC_GetCmdResp1(SDIOx, SDMMC_CMD_APP_CMD, SDIO_CMDTIMEOUT); |
NYX | 0:85b3fd62ea1a | 895 | |
NYX | 0:85b3fd62ea1a | 896 | return errorstate; |
NYX | 0:85b3fd62ea1a | 897 | } |
NYX | 0:85b3fd62ea1a | 898 | |
NYX | 0:85b3fd62ea1a | 899 | /** |
NYX | 0:85b3fd62ea1a | 900 | * @brief Send the command asking the accessed card to send its operating |
NYX | 0:85b3fd62ea1a | 901 | * condition register (OCR) |
NYX | 0:85b3fd62ea1a | 902 | * @param SDIOx: Pointer to SDIO register base |
NYX | 0:85b3fd62ea1a | 903 | * @retval HAL status |
NYX | 0:85b3fd62ea1a | 904 | */ |
NYX | 0:85b3fd62ea1a | 905 | uint32_t SDMMC_CmdAppOperCommand(SDIO_TypeDef *SDIOx, uint32_t SdType) |
NYX | 0:85b3fd62ea1a | 906 | { |
NYX | 0:85b3fd62ea1a | 907 | SDIO_CmdInitTypeDef sdmmc_cmdinit; |
NYX | 0:85b3fd62ea1a | 908 | uint32_t errorstate = SDMMC_ERROR_NONE; |
NYX | 0:85b3fd62ea1a | 909 | |
NYX | 0:85b3fd62ea1a | 910 | sdmmc_cmdinit.Argument = SDMMC_VOLTAGE_WINDOW_SD | SdType; |
NYX | 0:85b3fd62ea1a | 911 | sdmmc_cmdinit.CmdIndex = SDMMC_CMD_SD_APP_OP_COND; |
NYX | 0:85b3fd62ea1a | 912 | sdmmc_cmdinit.Response = SDIO_RESPONSE_SHORT; |
NYX | 0:85b3fd62ea1a | 913 | sdmmc_cmdinit.WaitForInterrupt = SDIO_WAIT_NO; |
NYX | 0:85b3fd62ea1a | 914 | sdmmc_cmdinit.CPSM = SDIO_CPSM_ENABLE; |
NYX | 0:85b3fd62ea1a | 915 | SDIO_SendCommand(SDIOx, &sdmmc_cmdinit); |
NYX | 0:85b3fd62ea1a | 916 | |
NYX | 0:85b3fd62ea1a | 917 | /* Check for error conditions */ |
NYX | 0:85b3fd62ea1a | 918 | errorstate = SDMMC_GetCmdResp3(SDIOx); |
NYX | 0:85b3fd62ea1a | 919 | |
NYX | 0:85b3fd62ea1a | 920 | return errorstate; |
NYX | 0:85b3fd62ea1a | 921 | } |
NYX | 0:85b3fd62ea1a | 922 | |
NYX | 0:85b3fd62ea1a | 923 | /** |
NYX | 0:85b3fd62ea1a | 924 | * @brief Send the Bus Width command and check the response. |
NYX | 0:85b3fd62ea1a | 925 | * @param SDIOx: Pointer to SDIO register base |
NYX | 0:85b3fd62ea1a | 926 | * @retval HAL status |
NYX | 0:85b3fd62ea1a | 927 | */ |
NYX | 0:85b3fd62ea1a | 928 | uint32_t SDMMC_CmdBusWidth(SDIO_TypeDef *SDIOx, uint32_t BusWidth) |
NYX | 0:85b3fd62ea1a | 929 | { |
NYX | 0:85b3fd62ea1a | 930 | SDIO_CmdInitTypeDef sdmmc_cmdinit; |
NYX | 0:85b3fd62ea1a | 931 | uint32_t errorstate = SDMMC_ERROR_NONE; |
NYX | 0:85b3fd62ea1a | 932 | |
NYX | 0:85b3fd62ea1a | 933 | sdmmc_cmdinit.Argument = (uint32_t)BusWidth; |
NYX | 0:85b3fd62ea1a | 934 | sdmmc_cmdinit.CmdIndex = SDMMC_CMD_APP_SD_SET_BUSWIDTH; |
NYX | 0:85b3fd62ea1a | 935 | sdmmc_cmdinit.Response = SDIO_RESPONSE_SHORT; |
NYX | 0:85b3fd62ea1a | 936 | sdmmc_cmdinit.WaitForInterrupt = SDIO_WAIT_NO; |
NYX | 0:85b3fd62ea1a | 937 | sdmmc_cmdinit.CPSM = SDIO_CPSM_ENABLE; |
NYX | 0:85b3fd62ea1a | 938 | SDIO_SendCommand(SDIOx, &sdmmc_cmdinit); |
NYX | 0:85b3fd62ea1a | 939 | |
NYX | 0:85b3fd62ea1a | 940 | /* Check for error conditions */ |
NYX | 0:85b3fd62ea1a | 941 | errorstate = SDMMC_GetCmdResp1(SDIOx, SDMMC_CMD_APP_SD_SET_BUSWIDTH, SDIO_CMDTIMEOUT); |
NYX | 0:85b3fd62ea1a | 942 | |
NYX | 0:85b3fd62ea1a | 943 | return errorstate; |
NYX | 0:85b3fd62ea1a | 944 | } |
NYX | 0:85b3fd62ea1a | 945 | |
NYX | 0:85b3fd62ea1a | 946 | /** |
NYX | 0:85b3fd62ea1a | 947 | * @brief Send the Send SCR command and check the response. |
NYX | 0:85b3fd62ea1a | 948 | * @param SDIOx: Pointer to SDMMC register base |
NYX | 0:85b3fd62ea1a | 949 | * @retval HAL status |
NYX | 0:85b3fd62ea1a | 950 | */ |
NYX | 0:85b3fd62ea1a | 951 | uint32_t SDMMC_CmdSendSCR(SDIO_TypeDef *SDIOx) |
NYX | 0:85b3fd62ea1a | 952 | { |
NYX | 0:85b3fd62ea1a | 953 | SDIO_CmdInitTypeDef sdmmc_cmdinit; |
NYX | 0:85b3fd62ea1a | 954 | uint32_t errorstate = SDMMC_ERROR_NONE; |
NYX | 0:85b3fd62ea1a | 955 | |
NYX | 0:85b3fd62ea1a | 956 | /* Send CMD51 SD_APP_SEND_SCR */ |
NYX | 0:85b3fd62ea1a | 957 | sdmmc_cmdinit.Argument = 0U; |
NYX | 0:85b3fd62ea1a | 958 | sdmmc_cmdinit.CmdIndex = SDMMC_CMD_SD_APP_SEND_SCR; |
NYX | 0:85b3fd62ea1a | 959 | sdmmc_cmdinit.Response = SDIO_RESPONSE_SHORT; |
NYX | 0:85b3fd62ea1a | 960 | sdmmc_cmdinit.WaitForInterrupt = SDIO_WAIT_NO; |
NYX | 0:85b3fd62ea1a | 961 | sdmmc_cmdinit.CPSM = SDIO_CPSM_ENABLE; |
NYX | 0:85b3fd62ea1a | 962 | SDIO_SendCommand(SDIOx, &sdmmc_cmdinit); |
NYX | 0:85b3fd62ea1a | 963 | |
NYX | 0:85b3fd62ea1a | 964 | /* Check for error conditions */ |
NYX | 0:85b3fd62ea1a | 965 | errorstate = SDMMC_GetCmdResp1(SDIOx, SDMMC_CMD_SD_APP_SEND_SCR, SDIO_CMDTIMEOUT); |
NYX | 0:85b3fd62ea1a | 966 | |
NYX | 0:85b3fd62ea1a | 967 | return errorstate; |
NYX | 0:85b3fd62ea1a | 968 | } |
NYX | 0:85b3fd62ea1a | 969 | |
NYX | 0:85b3fd62ea1a | 970 | /** |
NYX | 0:85b3fd62ea1a | 971 | * @brief Send the Send CID command and check the response. |
NYX | 0:85b3fd62ea1a | 972 | * @param SDIOx: Pointer to SDIO register base |
NYX | 0:85b3fd62ea1a | 973 | * @retval HAL status |
NYX | 0:85b3fd62ea1a | 974 | */ |
NYX | 0:85b3fd62ea1a | 975 | uint32_t SDMMC_CmdSendCID(SDIO_TypeDef *SDIOx) |
NYX | 0:85b3fd62ea1a | 976 | { |
NYX | 0:85b3fd62ea1a | 977 | SDIO_CmdInitTypeDef sdmmc_cmdinit; |
NYX | 0:85b3fd62ea1a | 978 | uint32_t errorstate = SDMMC_ERROR_NONE; |
NYX | 0:85b3fd62ea1a | 979 | |
NYX | 0:85b3fd62ea1a | 980 | /* Send CMD2 ALL_SEND_CID */ |
NYX | 0:85b3fd62ea1a | 981 | sdmmc_cmdinit.Argument = 0U; |
NYX | 0:85b3fd62ea1a | 982 | sdmmc_cmdinit.CmdIndex = SDMMC_CMD_ALL_SEND_CID; |
NYX | 0:85b3fd62ea1a | 983 | sdmmc_cmdinit.Response = SDIO_RESPONSE_LONG; |
NYX | 0:85b3fd62ea1a | 984 | sdmmc_cmdinit.WaitForInterrupt = SDIO_WAIT_NO; |
NYX | 0:85b3fd62ea1a | 985 | sdmmc_cmdinit.CPSM = SDIO_CPSM_ENABLE; |
NYX | 0:85b3fd62ea1a | 986 | SDIO_SendCommand(SDIOx, &sdmmc_cmdinit); |
NYX | 0:85b3fd62ea1a | 987 | |
NYX | 0:85b3fd62ea1a | 988 | /* Check for error conditions */ |
NYX | 0:85b3fd62ea1a | 989 | errorstate = SDMMC_GetCmdResp2(SDIOx); |
NYX | 0:85b3fd62ea1a | 990 | |
NYX | 0:85b3fd62ea1a | 991 | return errorstate; |
NYX | 0:85b3fd62ea1a | 992 | } |
NYX | 0:85b3fd62ea1a | 993 | |
NYX | 0:85b3fd62ea1a | 994 | /** |
NYX | 0:85b3fd62ea1a | 995 | * @brief Send the Send CSD command and check the response. |
NYX | 0:85b3fd62ea1a | 996 | * @param SDIOx: Pointer to SDIO register base |
NYX | 0:85b3fd62ea1a | 997 | * @retval HAL status |
NYX | 0:85b3fd62ea1a | 998 | */ |
NYX | 0:85b3fd62ea1a | 999 | uint32_t SDMMC_CmdSendCSD(SDIO_TypeDef *SDIOx, uint32_t Argument) |
NYX | 0:85b3fd62ea1a | 1000 | { |
NYX | 0:85b3fd62ea1a | 1001 | SDIO_CmdInitTypeDef sdmmc_cmdinit; |
NYX | 0:85b3fd62ea1a | 1002 | uint32_t errorstate = SDMMC_ERROR_NONE; |
NYX | 0:85b3fd62ea1a | 1003 | |
NYX | 0:85b3fd62ea1a | 1004 | /* Send CMD9 SEND_CSD */ |
NYX | 0:85b3fd62ea1a | 1005 | sdmmc_cmdinit.Argument = (uint32_t)Argument; |
NYX | 0:85b3fd62ea1a | 1006 | sdmmc_cmdinit.CmdIndex = SDMMC_CMD_SEND_CSD; |
NYX | 0:85b3fd62ea1a | 1007 | sdmmc_cmdinit.Response = SDIO_RESPONSE_LONG; |
NYX | 0:85b3fd62ea1a | 1008 | sdmmc_cmdinit.WaitForInterrupt = SDIO_WAIT_NO; |
NYX | 0:85b3fd62ea1a | 1009 | sdmmc_cmdinit.CPSM = SDIO_CPSM_ENABLE; |
NYX | 0:85b3fd62ea1a | 1010 | SDIO_SendCommand(SDIOx, &sdmmc_cmdinit); |
NYX | 0:85b3fd62ea1a | 1011 | |
NYX | 0:85b3fd62ea1a | 1012 | /* Check for error conditions */ |
NYX | 0:85b3fd62ea1a | 1013 | errorstate = SDMMC_GetCmdResp2(SDIOx); |
NYX | 0:85b3fd62ea1a | 1014 | |
NYX | 0:85b3fd62ea1a | 1015 | return errorstate; |
NYX | 0:85b3fd62ea1a | 1016 | } |
NYX | 0:85b3fd62ea1a | 1017 | |
NYX | 0:85b3fd62ea1a | 1018 | /** |
NYX | 0:85b3fd62ea1a | 1019 | * @brief Send the Send CSD command and check the response. |
NYX | 0:85b3fd62ea1a | 1020 | * @param SDIOx: Pointer to SDIO register base |
NYX | 0:85b3fd62ea1a | 1021 | * @retval HAL status |
NYX | 0:85b3fd62ea1a | 1022 | */ |
NYX | 0:85b3fd62ea1a | 1023 | uint32_t SDMMC_CmdSetRelAdd(SDIO_TypeDef *SDIOx, uint16_t *pRCA) |
NYX | 0:85b3fd62ea1a | 1024 | { |
NYX | 0:85b3fd62ea1a | 1025 | SDIO_CmdInitTypeDef sdmmc_cmdinit; |
NYX | 0:85b3fd62ea1a | 1026 | uint32_t errorstate = SDMMC_ERROR_NONE; |
NYX | 0:85b3fd62ea1a | 1027 | |
NYX | 0:85b3fd62ea1a | 1028 | /* Send CMD3 SD_CMD_SET_REL_ADDR */ |
NYX | 0:85b3fd62ea1a | 1029 | sdmmc_cmdinit.Argument = 0U; |
NYX | 0:85b3fd62ea1a | 1030 | sdmmc_cmdinit.CmdIndex = SDMMC_CMD_SET_REL_ADDR; |
NYX | 0:85b3fd62ea1a | 1031 | sdmmc_cmdinit.Response = SDIO_RESPONSE_SHORT; |
NYX | 0:85b3fd62ea1a | 1032 | sdmmc_cmdinit.WaitForInterrupt = SDIO_WAIT_NO; |
NYX | 0:85b3fd62ea1a | 1033 | sdmmc_cmdinit.CPSM = SDIO_CPSM_ENABLE; |
NYX | 0:85b3fd62ea1a | 1034 | SDIO_SendCommand(SDIOx, &sdmmc_cmdinit); |
NYX | 0:85b3fd62ea1a | 1035 | |
NYX | 0:85b3fd62ea1a | 1036 | /* Check for error conditions */ |
NYX | 0:85b3fd62ea1a | 1037 | errorstate = SDMMC_GetCmdResp6(SDIOx, SDMMC_CMD_SET_REL_ADDR, pRCA); |
NYX | 0:85b3fd62ea1a | 1038 | |
NYX | 0:85b3fd62ea1a | 1039 | return errorstate; |
NYX | 0:85b3fd62ea1a | 1040 | } |
NYX | 0:85b3fd62ea1a | 1041 | |
NYX | 0:85b3fd62ea1a | 1042 | /** |
NYX | 0:85b3fd62ea1a | 1043 | * @brief Send the Status command and check the response. |
NYX | 0:85b3fd62ea1a | 1044 | * @param SDIOx: Pointer to SDIO register base |
NYX | 0:85b3fd62ea1a | 1045 | * @retval HAL status |
NYX | 0:85b3fd62ea1a | 1046 | */ |
NYX | 0:85b3fd62ea1a | 1047 | uint32_t SDMMC_CmdSendStatus(SDIO_TypeDef *SDIOx, uint32_t Argument) |
NYX | 0:85b3fd62ea1a | 1048 | { |
NYX | 0:85b3fd62ea1a | 1049 | SDIO_CmdInitTypeDef sdmmc_cmdinit; |
NYX | 0:85b3fd62ea1a | 1050 | uint32_t errorstate = SDMMC_ERROR_NONE; |
NYX | 0:85b3fd62ea1a | 1051 | |
NYX | 0:85b3fd62ea1a | 1052 | sdmmc_cmdinit.Argument = (uint32_t)Argument; |
NYX | 0:85b3fd62ea1a | 1053 | sdmmc_cmdinit.CmdIndex = SDMMC_CMD_SEND_STATUS; |
NYX | 0:85b3fd62ea1a | 1054 | sdmmc_cmdinit.Response = SDIO_RESPONSE_SHORT; |
NYX | 0:85b3fd62ea1a | 1055 | sdmmc_cmdinit.WaitForInterrupt = SDIO_WAIT_NO; |
NYX | 0:85b3fd62ea1a | 1056 | sdmmc_cmdinit.CPSM = SDIO_CPSM_ENABLE; |
NYX | 0:85b3fd62ea1a | 1057 | SDIO_SendCommand(SDIOx, &sdmmc_cmdinit); |
NYX | 0:85b3fd62ea1a | 1058 | |
NYX | 0:85b3fd62ea1a | 1059 | /* Check for error conditions */ |
NYX | 0:85b3fd62ea1a | 1060 | errorstate = SDMMC_GetCmdResp1(SDIOx, SDMMC_CMD_SEND_STATUS, SDIO_CMDTIMEOUT); |
NYX | 0:85b3fd62ea1a | 1061 | |
NYX | 0:85b3fd62ea1a | 1062 | return errorstate; |
NYX | 0:85b3fd62ea1a | 1063 | } |
NYX | 0:85b3fd62ea1a | 1064 | |
NYX | 0:85b3fd62ea1a | 1065 | /** |
NYX | 0:85b3fd62ea1a | 1066 | * @brief Send the Status register command and check the response. |
NYX | 0:85b3fd62ea1a | 1067 | * @param SDIOx: Pointer to SDIO register base |
NYX | 0:85b3fd62ea1a | 1068 | * @retval HAL status |
NYX | 0:85b3fd62ea1a | 1069 | */ |
NYX | 0:85b3fd62ea1a | 1070 | uint32_t SDMMC_CmdStatusRegister(SDIO_TypeDef *SDIOx) |
NYX | 0:85b3fd62ea1a | 1071 | { |
NYX | 0:85b3fd62ea1a | 1072 | SDIO_CmdInitTypeDef sdmmc_cmdinit; |
NYX | 0:85b3fd62ea1a | 1073 | uint32_t errorstate = SDMMC_ERROR_NONE; |
NYX | 0:85b3fd62ea1a | 1074 | |
NYX | 0:85b3fd62ea1a | 1075 | sdmmc_cmdinit.Argument = 0U; |
NYX | 0:85b3fd62ea1a | 1076 | sdmmc_cmdinit.CmdIndex = SDMMC_CMD_SD_APP_STATUS; |
NYX | 0:85b3fd62ea1a | 1077 | sdmmc_cmdinit.Response = SDIO_RESPONSE_SHORT; |
NYX | 0:85b3fd62ea1a | 1078 | sdmmc_cmdinit.WaitForInterrupt = SDIO_WAIT_NO; |
NYX | 0:85b3fd62ea1a | 1079 | sdmmc_cmdinit.CPSM = SDIO_CPSM_ENABLE; |
NYX | 0:85b3fd62ea1a | 1080 | SDIO_SendCommand(SDIOx, &sdmmc_cmdinit); |
NYX | 0:85b3fd62ea1a | 1081 | |
NYX | 0:85b3fd62ea1a | 1082 | /* Check for error conditions */ |
NYX | 0:85b3fd62ea1a | 1083 | errorstate = SDMMC_GetCmdResp1(SDIOx, SDMMC_CMD_SD_APP_STATUS, SDIO_CMDTIMEOUT); |
NYX | 0:85b3fd62ea1a | 1084 | |
NYX | 0:85b3fd62ea1a | 1085 | return errorstate; |
NYX | 0:85b3fd62ea1a | 1086 | } |
NYX | 0:85b3fd62ea1a | 1087 | |
NYX | 0:85b3fd62ea1a | 1088 | /** |
NYX | 0:85b3fd62ea1a | 1089 | * @brief Sends host capacity support information and activates the card's |
NYX | 0:85b3fd62ea1a | 1090 | * initialization process. Send SDMMC_CMD_SEND_OP_COND command |
NYX | 0:85b3fd62ea1a | 1091 | * @param SDIOx: Pointer to SDIO register base |
NYX | 0:85b3fd62ea1a | 1092 | * @parame Argument: Argument used for the command |
NYX | 0:85b3fd62ea1a | 1093 | * @retval HAL status |
NYX | 0:85b3fd62ea1a | 1094 | */ |
NYX | 0:85b3fd62ea1a | 1095 | uint32_t SDMMC_CmdOpCondition(SDIO_TypeDef *SDIOx, uint32_t Argument) |
NYX | 0:85b3fd62ea1a | 1096 | { |
NYX | 0:85b3fd62ea1a | 1097 | SDIO_CmdInitTypeDef sdmmc_cmdinit; |
NYX | 0:85b3fd62ea1a | 1098 | uint32_t errorstate = SDMMC_ERROR_NONE; |
NYX | 0:85b3fd62ea1a | 1099 | |
NYX | 0:85b3fd62ea1a | 1100 | sdmmc_cmdinit.Argument = Argument; |
NYX | 0:85b3fd62ea1a | 1101 | sdmmc_cmdinit.CmdIndex = SDMMC_CMD_SEND_OP_COND; |
NYX | 0:85b3fd62ea1a | 1102 | sdmmc_cmdinit.Response = SDIO_RESPONSE_SHORT; |
NYX | 0:85b3fd62ea1a | 1103 | sdmmc_cmdinit.WaitForInterrupt = SDIO_WAIT_NO; |
NYX | 0:85b3fd62ea1a | 1104 | sdmmc_cmdinit.CPSM = SDIO_CPSM_ENABLE; |
NYX | 0:85b3fd62ea1a | 1105 | SDIO_SendCommand(SDIOx, &sdmmc_cmdinit); |
NYX | 0:85b3fd62ea1a | 1106 | |
NYX | 0:85b3fd62ea1a | 1107 | /* Check for error conditions */ |
NYX | 0:85b3fd62ea1a | 1108 | errorstate = SDMMC_GetCmdResp3(SDIOx); |
NYX | 0:85b3fd62ea1a | 1109 | |
NYX | 0:85b3fd62ea1a | 1110 | return errorstate; |
NYX | 0:85b3fd62ea1a | 1111 | } |
NYX | 0:85b3fd62ea1a | 1112 | |
NYX | 0:85b3fd62ea1a | 1113 | /** |
NYX | 0:85b3fd62ea1a | 1114 | * @brief Checks switchable function and switch card function. SDMMC_CMD_HS_SWITCH comand |
NYX | 0:85b3fd62ea1a | 1115 | * @param SDIOx: Pointer to SDIO register base |
NYX | 0:85b3fd62ea1a | 1116 | * @parame Argument: Argument used for the command |
NYX | 0:85b3fd62ea1a | 1117 | * @retval HAL status |
NYX | 0:85b3fd62ea1a | 1118 | */ |
NYX | 0:85b3fd62ea1a | 1119 | uint32_t SDMMC_CmdSwitch(SDIO_TypeDef *SDIOx, uint32_t Argument) |
NYX | 0:85b3fd62ea1a | 1120 | { |
NYX | 0:85b3fd62ea1a | 1121 | SDIO_CmdInitTypeDef sdmmc_cmdinit; |
NYX | 0:85b3fd62ea1a | 1122 | uint32_t errorstate = SDMMC_ERROR_NONE; |
NYX | 0:85b3fd62ea1a | 1123 | |
NYX | 0:85b3fd62ea1a | 1124 | sdmmc_cmdinit.Argument = Argument; |
NYX | 0:85b3fd62ea1a | 1125 | sdmmc_cmdinit.CmdIndex = SDMMC_CMD_HS_SWITCH; |
NYX | 0:85b3fd62ea1a | 1126 | sdmmc_cmdinit.Response = SDIO_RESPONSE_SHORT; |
NYX | 0:85b3fd62ea1a | 1127 | sdmmc_cmdinit.WaitForInterrupt = SDIO_WAIT_NO; |
NYX | 0:85b3fd62ea1a | 1128 | sdmmc_cmdinit.CPSM = SDIO_CPSM_ENABLE; |
NYX | 0:85b3fd62ea1a | 1129 | SDIO_SendCommand(SDIOx, &sdmmc_cmdinit); |
NYX | 0:85b3fd62ea1a | 1130 | |
NYX | 0:85b3fd62ea1a | 1131 | /* Check for error conditions */ |
NYX | 0:85b3fd62ea1a | 1132 | errorstate = SDMMC_GetCmdResp1(SDIOx, SDMMC_CMD_HS_SWITCH, SDIO_CMDTIMEOUT); |
NYX | 0:85b3fd62ea1a | 1133 | |
NYX | 0:85b3fd62ea1a | 1134 | return errorstate; |
NYX | 0:85b3fd62ea1a | 1135 | } |
NYX | 0:85b3fd62ea1a | 1136 | |
NYX | 0:85b3fd62ea1a | 1137 | /** |
NYX | 0:85b3fd62ea1a | 1138 | * @} |
NYX | 0:85b3fd62ea1a | 1139 | */ |
NYX | 0:85b3fd62ea1a | 1140 | |
NYX | 0:85b3fd62ea1a | 1141 | /* Private function ----------------------------------------------------------*/ |
NYX | 0:85b3fd62ea1a | 1142 | /** @addtogroup SD_Private_Functions |
NYX | 0:85b3fd62ea1a | 1143 | * @{ |
NYX | 0:85b3fd62ea1a | 1144 | */ |
NYX | 0:85b3fd62ea1a | 1145 | |
NYX | 0:85b3fd62ea1a | 1146 | /** |
NYX | 0:85b3fd62ea1a | 1147 | * @brief Checks for error conditions for CMD0. |
NYX | 0:85b3fd62ea1a | 1148 | * @param hsd: SD handle |
NYX | 0:85b3fd62ea1a | 1149 | * @retval SD Card error state |
NYX | 0:85b3fd62ea1a | 1150 | */ |
NYX | 0:85b3fd62ea1a | 1151 | static uint32_t SDMMC_GetCmdError(SDIO_TypeDef *SDIOx) |
NYX | 0:85b3fd62ea1a | 1152 | { |
NYX | 0:85b3fd62ea1a | 1153 | /* 8 is the number of required instructions cycles for the below loop statement. |
NYX | 0:85b3fd62ea1a | 1154 | The SDMMC_CMDTIMEOUT is expressed in ms */ |
NYX | 0:85b3fd62ea1a | 1155 | register uint32_t count = SDIO_CMDTIMEOUT * (SystemCoreClock / 8U /1000U); |
NYX | 0:85b3fd62ea1a | 1156 | |
NYX | 0:85b3fd62ea1a | 1157 | do |
NYX | 0:85b3fd62ea1a | 1158 | { |
NYX | 0:85b3fd62ea1a | 1159 | if (count-- == 0U) |
NYX | 0:85b3fd62ea1a | 1160 | { |
NYX | 0:85b3fd62ea1a | 1161 | return SDMMC_ERROR_TIMEOUT; |
NYX | 0:85b3fd62ea1a | 1162 | } |
NYX | 0:85b3fd62ea1a | 1163 | |
NYX | 0:85b3fd62ea1a | 1164 | }while(!__SDIO_GET_FLAG(SDIOx, SDIO_FLAG_CMDSENT)); |
NYX | 0:85b3fd62ea1a | 1165 | |
NYX | 0:85b3fd62ea1a | 1166 | /* Clear all the static flags */ |
NYX | 0:85b3fd62ea1a | 1167 | __SDIO_CLEAR_FLAG(SDIOx, SDIO_STATIC_FLAGS); |
NYX | 0:85b3fd62ea1a | 1168 | |
NYX | 0:85b3fd62ea1a | 1169 | return SDMMC_ERROR_NONE; |
NYX | 0:85b3fd62ea1a | 1170 | } |
NYX | 0:85b3fd62ea1a | 1171 | |
NYX | 0:85b3fd62ea1a | 1172 | /** |
NYX | 0:85b3fd62ea1a | 1173 | * @brief Checks for error conditions for R1 response. |
NYX | 0:85b3fd62ea1a | 1174 | * @param hsd: SD handle |
NYX | 0:85b3fd62ea1a | 1175 | * @param SD_CMD: The sent command index |
NYX | 0:85b3fd62ea1a | 1176 | * @retval SD Card error state |
NYX | 0:85b3fd62ea1a | 1177 | */ |
NYX | 0:85b3fd62ea1a | 1178 | static uint32_t SDMMC_GetCmdResp1(SDIO_TypeDef *SDIOx, uint8_t SD_CMD, uint32_t Timeout) |
NYX | 0:85b3fd62ea1a | 1179 | { |
NYX | 0:85b3fd62ea1a | 1180 | uint32_t response_r1; |
NYX | 0:85b3fd62ea1a | 1181 | |
NYX | 0:85b3fd62ea1a | 1182 | /* 8 is the number of required instructions cycles for the below loop statement. |
NYX | 0:85b3fd62ea1a | 1183 | The Timeout is expressed in ms */ |
NYX | 0:85b3fd62ea1a | 1184 | register uint32_t count = Timeout * (SystemCoreClock / 8U /1000U); |
NYX | 0:85b3fd62ea1a | 1185 | |
NYX | 0:85b3fd62ea1a | 1186 | do |
NYX | 0:85b3fd62ea1a | 1187 | { |
NYX | 0:85b3fd62ea1a | 1188 | if (count-- == 0U) |
NYX | 0:85b3fd62ea1a | 1189 | { |
NYX | 0:85b3fd62ea1a | 1190 | return SDMMC_ERROR_TIMEOUT; |
NYX | 0:85b3fd62ea1a | 1191 | } |
NYX | 0:85b3fd62ea1a | 1192 | |
NYX | 0:85b3fd62ea1a | 1193 | }while(!__SDIO_GET_FLAG(SDIOx, SDIO_FLAG_CCRCFAIL | SDIO_FLAG_CMDREND | SDIO_FLAG_CTIMEOUT)); |
NYX | 0:85b3fd62ea1a | 1194 | |
NYX | 0:85b3fd62ea1a | 1195 | if(__SDIO_GET_FLAG(SDIOx, SDIO_FLAG_CTIMEOUT)) |
NYX | 0:85b3fd62ea1a | 1196 | { |
NYX | 0:85b3fd62ea1a | 1197 | __SDIO_CLEAR_FLAG(SDIOx, SDIO_FLAG_CTIMEOUT); |
NYX | 0:85b3fd62ea1a | 1198 | |
NYX | 0:85b3fd62ea1a | 1199 | return SDMMC_ERROR_CMD_RSP_TIMEOUT; |
NYX | 0:85b3fd62ea1a | 1200 | } |
NYX | 0:85b3fd62ea1a | 1201 | else if(__SDIO_GET_FLAG(SDIOx, SDIO_FLAG_CCRCFAIL)) |
NYX | 0:85b3fd62ea1a | 1202 | { |
NYX | 0:85b3fd62ea1a | 1203 | __SDIO_CLEAR_FLAG(SDIOx, SDIO_FLAG_CCRCFAIL); |
NYX | 0:85b3fd62ea1a | 1204 | |
NYX | 0:85b3fd62ea1a | 1205 | return SDMMC_ERROR_CMD_CRC_FAIL; |
NYX | 0:85b3fd62ea1a | 1206 | } |
NYX | 0:85b3fd62ea1a | 1207 | |
NYX | 0:85b3fd62ea1a | 1208 | /* Check response received is of desired command */ |
NYX | 0:85b3fd62ea1a | 1209 | if(SDIO_GetCommandResponse(SDIOx) != SD_CMD) |
NYX | 0:85b3fd62ea1a | 1210 | { |
NYX | 0:85b3fd62ea1a | 1211 | return SDMMC_ERROR_CMD_CRC_FAIL; |
NYX | 0:85b3fd62ea1a | 1212 | } |
NYX | 0:85b3fd62ea1a | 1213 | |
NYX | 0:85b3fd62ea1a | 1214 | /* Clear all the static flags */ |
NYX | 0:85b3fd62ea1a | 1215 | __SDIO_CLEAR_FLAG(SDIOx, SDIO_STATIC_FLAGS); |
NYX | 0:85b3fd62ea1a | 1216 | |
NYX | 0:85b3fd62ea1a | 1217 | /* We have received response, retrieve it for analysis */ |
NYX | 0:85b3fd62ea1a | 1218 | response_r1 = SDIO_GetResponse(SDIOx, SDIO_RESP1); |
NYX | 0:85b3fd62ea1a | 1219 | |
NYX | 0:85b3fd62ea1a | 1220 | if((response_r1 & SDMMC_OCR_ERRORBITS) == SDMMC_ALLZERO) |
NYX | 0:85b3fd62ea1a | 1221 | { |
NYX | 0:85b3fd62ea1a | 1222 | return SDMMC_ERROR_NONE; |
NYX | 0:85b3fd62ea1a | 1223 | } |
NYX | 0:85b3fd62ea1a | 1224 | else if((response_r1 & SDMMC_OCR_ADDR_OUT_OF_RANGE) == SDMMC_OCR_ADDR_OUT_OF_RANGE) |
NYX | 0:85b3fd62ea1a | 1225 | { |
NYX | 0:85b3fd62ea1a | 1226 | return SDMMC_ERROR_ADDR_OUT_OF_RANGE; |
NYX | 0:85b3fd62ea1a | 1227 | } |
NYX | 0:85b3fd62ea1a | 1228 | else if((response_r1 & SDMMC_OCR_ADDR_MISALIGNED) == SDMMC_OCR_ADDR_MISALIGNED) |
NYX | 0:85b3fd62ea1a | 1229 | { |
NYX | 0:85b3fd62ea1a | 1230 | return SDMMC_ERROR_ADDR_MISALIGNED; |
NYX | 0:85b3fd62ea1a | 1231 | } |
NYX | 0:85b3fd62ea1a | 1232 | else if((response_r1 & SDMMC_OCR_BLOCK_LEN_ERR) == SDMMC_OCR_BLOCK_LEN_ERR) |
NYX | 0:85b3fd62ea1a | 1233 | { |
NYX | 0:85b3fd62ea1a | 1234 | return SDMMC_ERROR_BLOCK_LEN_ERR; |
NYX | 0:85b3fd62ea1a | 1235 | } |
NYX | 0:85b3fd62ea1a | 1236 | else if((response_r1 & SDMMC_OCR_ERASE_SEQ_ERR) == SDMMC_OCR_ERASE_SEQ_ERR) |
NYX | 0:85b3fd62ea1a | 1237 | { |
NYX | 0:85b3fd62ea1a | 1238 | return SDMMC_ERROR_ERASE_SEQ_ERR; |
NYX | 0:85b3fd62ea1a | 1239 | } |
NYX | 0:85b3fd62ea1a | 1240 | else if((response_r1 & SDMMC_OCR_BAD_ERASE_PARAM) == SDMMC_OCR_BAD_ERASE_PARAM) |
NYX | 0:85b3fd62ea1a | 1241 | { |
NYX | 0:85b3fd62ea1a | 1242 | return SDMMC_ERROR_BAD_ERASE_PARAM; |
NYX | 0:85b3fd62ea1a | 1243 | } |
NYX | 0:85b3fd62ea1a | 1244 | else if((response_r1 & SDMMC_OCR_WRITE_PROT_VIOLATION) == SDMMC_OCR_WRITE_PROT_VIOLATION) |
NYX | 0:85b3fd62ea1a | 1245 | { |
NYX | 0:85b3fd62ea1a | 1246 | return SDMMC_ERROR_WRITE_PROT_VIOLATION; |
NYX | 0:85b3fd62ea1a | 1247 | } |
NYX | 0:85b3fd62ea1a | 1248 | else if((response_r1 & SDMMC_OCR_LOCK_UNLOCK_FAILED) == SDMMC_OCR_LOCK_UNLOCK_FAILED) |
NYX | 0:85b3fd62ea1a | 1249 | { |
NYX | 0:85b3fd62ea1a | 1250 | return SDMMC_ERROR_LOCK_UNLOCK_FAILED; |
NYX | 0:85b3fd62ea1a | 1251 | } |
NYX | 0:85b3fd62ea1a | 1252 | else if((response_r1 & SDMMC_OCR_COM_CRC_FAILED) == SDMMC_OCR_COM_CRC_FAILED) |
NYX | 0:85b3fd62ea1a | 1253 | { |
NYX | 0:85b3fd62ea1a | 1254 | return SDMMC_ERROR_COM_CRC_FAILED; |
NYX | 0:85b3fd62ea1a | 1255 | } |
NYX | 0:85b3fd62ea1a | 1256 | else if((response_r1 & SDMMC_OCR_ILLEGAL_CMD) == SDMMC_OCR_ILLEGAL_CMD) |
NYX | 0:85b3fd62ea1a | 1257 | { |
NYX | 0:85b3fd62ea1a | 1258 | return SDMMC_ERROR_ILLEGAL_CMD; |
NYX | 0:85b3fd62ea1a | 1259 | } |
NYX | 0:85b3fd62ea1a | 1260 | else if((response_r1 & SDMMC_OCR_CARD_ECC_FAILED) == SDMMC_OCR_CARD_ECC_FAILED) |
NYX | 0:85b3fd62ea1a | 1261 | { |
NYX | 0:85b3fd62ea1a | 1262 | return SDMMC_ERROR_CARD_ECC_FAILED; |
NYX | 0:85b3fd62ea1a | 1263 | } |
NYX | 0:85b3fd62ea1a | 1264 | else if((response_r1 & SDMMC_OCR_CC_ERROR) == SDMMC_OCR_CC_ERROR) |
NYX | 0:85b3fd62ea1a | 1265 | { |
NYX | 0:85b3fd62ea1a | 1266 | return SDMMC_ERROR_CC_ERR; |
NYX | 0:85b3fd62ea1a | 1267 | } |
NYX | 0:85b3fd62ea1a | 1268 | else if((response_r1 & SDMMC_OCR_STREAM_READ_UNDERRUN) == SDMMC_OCR_STREAM_READ_UNDERRUN) |
NYX | 0:85b3fd62ea1a | 1269 | { |
NYX | 0:85b3fd62ea1a | 1270 | return SDMMC_ERROR_STREAM_READ_UNDERRUN; |
NYX | 0:85b3fd62ea1a | 1271 | } |
NYX | 0:85b3fd62ea1a | 1272 | else if((response_r1 & SDMMC_OCR_STREAM_WRITE_OVERRUN) == SDMMC_OCR_STREAM_WRITE_OVERRUN) |
NYX | 0:85b3fd62ea1a | 1273 | { |
NYX | 0:85b3fd62ea1a | 1274 | return SDMMC_ERROR_STREAM_WRITE_OVERRUN; |
NYX | 0:85b3fd62ea1a | 1275 | } |
NYX | 0:85b3fd62ea1a | 1276 | else if((response_r1 & SDMMC_OCR_CID_CSD_OVERWRITE) == SDMMC_OCR_CID_CSD_OVERWRITE) |
NYX | 0:85b3fd62ea1a | 1277 | { |
NYX | 0:85b3fd62ea1a | 1278 | return SDMMC_ERROR_CID_CSD_OVERWRITE; |
NYX | 0:85b3fd62ea1a | 1279 | } |
NYX | 0:85b3fd62ea1a | 1280 | else if((response_r1 & SDMMC_OCR_WP_ERASE_SKIP) == SDMMC_OCR_WP_ERASE_SKIP) |
NYX | 0:85b3fd62ea1a | 1281 | { |
NYX | 0:85b3fd62ea1a | 1282 | return SDMMC_ERROR_WP_ERASE_SKIP; |
NYX | 0:85b3fd62ea1a | 1283 | } |
NYX | 0:85b3fd62ea1a | 1284 | else if((response_r1 & SDMMC_OCR_CARD_ECC_DISABLED) == SDMMC_OCR_CARD_ECC_DISABLED) |
NYX | 0:85b3fd62ea1a | 1285 | { |
NYX | 0:85b3fd62ea1a | 1286 | return SDMMC_ERROR_CARD_ECC_DISABLED; |
NYX | 0:85b3fd62ea1a | 1287 | } |
NYX | 0:85b3fd62ea1a | 1288 | else if((response_r1 & SDMMC_OCR_ERASE_RESET) == SDMMC_OCR_ERASE_RESET) |
NYX | 0:85b3fd62ea1a | 1289 | { |
NYX | 0:85b3fd62ea1a | 1290 | return SDMMC_ERROR_ERASE_RESET; |
NYX | 0:85b3fd62ea1a | 1291 | } |
NYX | 0:85b3fd62ea1a | 1292 | else if((response_r1 & SDMMC_OCR_AKE_SEQ_ERROR) == SDMMC_OCR_AKE_SEQ_ERROR) |
NYX | 0:85b3fd62ea1a | 1293 | { |
NYX | 0:85b3fd62ea1a | 1294 | return SDMMC_ERROR_AKE_SEQ_ERR; |
NYX | 0:85b3fd62ea1a | 1295 | } |
NYX | 0:85b3fd62ea1a | 1296 | else |
NYX | 0:85b3fd62ea1a | 1297 | { |
NYX | 0:85b3fd62ea1a | 1298 | return SDMMC_ERROR_GENERAL_UNKNOWN_ERR; |
NYX | 0:85b3fd62ea1a | 1299 | } |
NYX | 0:85b3fd62ea1a | 1300 | } |
NYX | 0:85b3fd62ea1a | 1301 | |
NYX | 0:85b3fd62ea1a | 1302 | /** |
NYX | 0:85b3fd62ea1a | 1303 | * @brief Checks for error conditions for R2 (CID or CSD) response. |
NYX | 0:85b3fd62ea1a | 1304 | * @param hsd: SD handle |
NYX | 0:85b3fd62ea1a | 1305 | * @retval SD Card error state |
NYX | 0:85b3fd62ea1a | 1306 | */ |
NYX | 0:85b3fd62ea1a | 1307 | static uint32_t SDMMC_GetCmdResp2(SDIO_TypeDef *SDIOx) |
NYX | 0:85b3fd62ea1a | 1308 | { |
NYX | 0:85b3fd62ea1a | 1309 | /* 8 is the number of required instructions cycles for the below loop statement. |
NYX | 0:85b3fd62ea1a | 1310 | The SDMMC_CMDTIMEOUT is expressed in ms */ |
NYX | 0:85b3fd62ea1a | 1311 | register uint32_t count = SDIO_CMDTIMEOUT * (SystemCoreClock / 8U /1000U); |
NYX | 0:85b3fd62ea1a | 1312 | |
NYX | 0:85b3fd62ea1a | 1313 | do |
NYX | 0:85b3fd62ea1a | 1314 | { |
NYX | 0:85b3fd62ea1a | 1315 | if (count-- == 0U) |
NYX | 0:85b3fd62ea1a | 1316 | { |
NYX | 0:85b3fd62ea1a | 1317 | return SDMMC_ERROR_TIMEOUT; |
NYX | 0:85b3fd62ea1a | 1318 | } |
NYX | 0:85b3fd62ea1a | 1319 | |
NYX | 0:85b3fd62ea1a | 1320 | }while(!__SDIO_GET_FLAG(SDIOx, SDIO_FLAG_CCRCFAIL | SDIO_FLAG_CMDREND | SDIO_FLAG_CTIMEOUT)); |
NYX | 0:85b3fd62ea1a | 1321 | |
NYX | 0:85b3fd62ea1a | 1322 | if (__SDIO_GET_FLAG(SDIOx, SDIO_FLAG_CTIMEOUT)) |
NYX | 0:85b3fd62ea1a | 1323 | { |
NYX | 0:85b3fd62ea1a | 1324 | __SDIO_CLEAR_FLAG(SDIOx, SDIO_FLAG_CTIMEOUT); |
NYX | 0:85b3fd62ea1a | 1325 | |
NYX | 0:85b3fd62ea1a | 1326 | return SDMMC_ERROR_CMD_RSP_TIMEOUT; |
NYX | 0:85b3fd62ea1a | 1327 | } |
NYX | 0:85b3fd62ea1a | 1328 | else if (__SDIO_GET_FLAG(SDIOx, SDIO_FLAG_CCRCFAIL)) |
NYX | 0:85b3fd62ea1a | 1329 | { |
NYX | 0:85b3fd62ea1a | 1330 | __SDIO_CLEAR_FLAG(SDIOx, SDIO_FLAG_CCRCFAIL); |
NYX | 0:85b3fd62ea1a | 1331 | |
NYX | 0:85b3fd62ea1a | 1332 | return SDMMC_ERROR_CMD_CRC_FAIL; |
NYX | 0:85b3fd62ea1a | 1333 | } |
NYX | 0:85b3fd62ea1a | 1334 | else |
NYX | 0:85b3fd62ea1a | 1335 | { |
NYX | 0:85b3fd62ea1a | 1336 | /* No error flag set */ |
NYX | 0:85b3fd62ea1a | 1337 | /* Clear all the static flags */ |
NYX | 0:85b3fd62ea1a | 1338 | __SDIO_CLEAR_FLAG(SDIOx, SDIO_STATIC_FLAGS); |
NYX | 0:85b3fd62ea1a | 1339 | } |
NYX | 0:85b3fd62ea1a | 1340 | |
NYX | 0:85b3fd62ea1a | 1341 | return SDMMC_ERROR_NONE; |
NYX | 0:85b3fd62ea1a | 1342 | } |
NYX | 0:85b3fd62ea1a | 1343 | |
NYX | 0:85b3fd62ea1a | 1344 | /** |
NYX | 0:85b3fd62ea1a | 1345 | * @brief Checks for error conditions for R3 (OCR) response. |
NYX | 0:85b3fd62ea1a | 1346 | * @param hsd: SD handle |
NYX | 0:85b3fd62ea1a | 1347 | * @retval SD Card error state |
NYX | 0:85b3fd62ea1a | 1348 | */ |
NYX | 0:85b3fd62ea1a | 1349 | static uint32_t SDMMC_GetCmdResp3(SDIO_TypeDef *SDIOx) |
NYX | 0:85b3fd62ea1a | 1350 | { |
NYX | 0:85b3fd62ea1a | 1351 | /* 8 is the number of required instructions cycles for the below loop statement. |
NYX | 0:85b3fd62ea1a | 1352 | The SDMMC_CMDTIMEOUT is expressed in ms */ |
NYX | 0:85b3fd62ea1a | 1353 | register uint32_t count = SDIO_CMDTIMEOUT * (SystemCoreClock / 8U /1000U); |
NYX | 0:85b3fd62ea1a | 1354 | |
NYX | 0:85b3fd62ea1a | 1355 | do |
NYX | 0:85b3fd62ea1a | 1356 | { |
NYX | 0:85b3fd62ea1a | 1357 | if (count-- == 0U) |
NYX | 0:85b3fd62ea1a | 1358 | { |
NYX | 0:85b3fd62ea1a | 1359 | return SDMMC_ERROR_TIMEOUT; |
NYX | 0:85b3fd62ea1a | 1360 | } |
NYX | 0:85b3fd62ea1a | 1361 | |
NYX | 0:85b3fd62ea1a | 1362 | }while(!__SDIO_GET_FLAG(SDIOx, SDIO_FLAG_CCRCFAIL | SDIO_FLAG_CMDREND | SDIO_FLAG_CTIMEOUT)); |
NYX | 0:85b3fd62ea1a | 1363 | |
NYX | 0:85b3fd62ea1a | 1364 | if(__SDIO_GET_FLAG(SDIOx, SDIO_FLAG_CTIMEOUT)) |
NYX | 0:85b3fd62ea1a | 1365 | { |
NYX | 0:85b3fd62ea1a | 1366 | __SDIO_CLEAR_FLAG(SDIOx, SDIO_FLAG_CTIMEOUT); |
NYX | 0:85b3fd62ea1a | 1367 | |
NYX | 0:85b3fd62ea1a | 1368 | return SDMMC_ERROR_CMD_RSP_TIMEOUT; |
NYX | 0:85b3fd62ea1a | 1369 | } |
NYX | 0:85b3fd62ea1a | 1370 | else |
NYX | 0:85b3fd62ea1a | 1371 | |
NYX | 0:85b3fd62ea1a | 1372 | { |
NYX | 0:85b3fd62ea1a | 1373 | /* Clear all the static flags */ |
NYX | 0:85b3fd62ea1a | 1374 | __SDIO_CLEAR_FLAG(SDIOx, SDIO_STATIC_FLAGS); |
NYX | 0:85b3fd62ea1a | 1375 | } |
NYX | 0:85b3fd62ea1a | 1376 | |
NYX | 0:85b3fd62ea1a | 1377 | return SDMMC_ERROR_NONE; |
NYX | 0:85b3fd62ea1a | 1378 | } |
NYX | 0:85b3fd62ea1a | 1379 | |
NYX | 0:85b3fd62ea1a | 1380 | /** |
NYX | 0:85b3fd62ea1a | 1381 | * @brief Checks for error conditions for R6 (RCA) response. |
NYX | 0:85b3fd62ea1a | 1382 | * @param hsd: SD handle |
NYX | 0:85b3fd62ea1a | 1383 | * @param SD_CMD: The sent command index |
NYX | 0:85b3fd62ea1a | 1384 | * @param pRCA: Pointer to the variable that will contain the SD card relative |
NYX | 0:85b3fd62ea1a | 1385 | * address RCA |
NYX | 0:85b3fd62ea1a | 1386 | * @retval SD Card error state |
NYX | 0:85b3fd62ea1a | 1387 | */ |
NYX | 0:85b3fd62ea1a | 1388 | static uint32_t SDMMC_GetCmdResp6(SDIO_TypeDef *SDIOx, uint8_t SD_CMD, uint16_t *pRCA) |
NYX | 0:85b3fd62ea1a | 1389 | { |
NYX | 0:85b3fd62ea1a | 1390 | uint32_t response_r1; |
NYX | 0:85b3fd62ea1a | 1391 | |
NYX | 0:85b3fd62ea1a | 1392 | /* 8 is the number of required instructions cycles for the below loop statement. |
NYX | 0:85b3fd62ea1a | 1393 | The SDMMC_CMDTIMEOUT is expressed in ms */ |
NYX | 0:85b3fd62ea1a | 1394 | register uint32_t count = SDIO_CMDTIMEOUT * (SystemCoreClock / 8U /1000U); |
NYX | 0:85b3fd62ea1a | 1395 | |
NYX | 0:85b3fd62ea1a | 1396 | do |
NYX | 0:85b3fd62ea1a | 1397 | { |
NYX | 0:85b3fd62ea1a | 1398 | if (count-- == 0U) |
NYX | 0:85b3fd62ea1a | 1399 | { |
NYX | 0:85b3fd62ea1a | 1400 | return SDMMC_ERROR_TIMEOUT; |
NYX | 0:85b3fd62ea1a | 1401 | } |
NYX | 0:85b3fd62ea1a | 1402 | |
NYX | 0:85b3fd62ea1a | 1403 | }while(!__SDIO_GET_FLAG(SDIOx, SDIO_FLAG_CCRCFAIL | SDIO_FLAG_CMDREND | SDIO_FLAG_CTIMEOUT)); |
NYX | 0:85b3fd62ea1a | 1404 | |
NYX | 0:85b3fd62ea1a | 1405 | if(__SDIO_GET_FLAG(SDIOx, SDIO_FLAG_CTIMEOUT)) |
NYX | 0:85b3fd62ea1a | 1406 | { |
NYX | 0:85b3fd62ea1a | 1407 | __SDIO_CLEAR_FLAG(SDIOx, SDIO_FLAG_CTIMEOUT); |
NYX | 0:85b3fd62ea1a | 1408 | |
NYX | 0:85b3fd62ea1a | 1409 | return SDMMC_ERROR_CMD_RSP_TIMEOUT; |
NYX | 0:85b3fd62ea1a | 1410 | } |
NYX | 0:85b3fd62ea1a | 1411 | else if(__SDIO_GET_FLAG(SDIOx, SDIO_FLAG_CCRCFAIL)) |
NYX | 0:85b3fd62ea1a | 1412 | { |
NYX | 0:85b3fd62ea1a | 1413 | __SDIO_CLEAR_FLAG(SDIOx, SDIO_FLAG_CCRCFAIL); |
NYX | 0:85b3fd62ea1a | 1414 | |
NYX | 0:85b3fd62ea1a | 1415 | return SDMMC_ERROR_CMD_CRC_FAIL; |
NYX | 0:85b3fd62ea1a | 1416 | } |
NYX | 0:85b3fd62ea1a | 1417 | |
NYX | 0:85b3fd62ea1a | 1418 | /* Check response received is of desired command */ |
NYX | 0:85b3fd62ea1a | 1419 | if(SDIO_GetCommandResponse(SDIOx) != SD_CMD) |
NYX | 0:85b3fd62ea1a | 1420 | { |
NYX | 0:85b3fd62ea1a | 1421 | return SDMMC_ERROR_CMD_CRC_FAIL; |
NYX | 0:85b3fd62ea1a | 1422 | } |
NYX | 0:85b3fd62ea1a | 1423 | |
NYX | 0:85b3fd62ea1a | 1424 | /* Clear all the static flags */ |
NYX | 0:85b3fd62ea1a | 1425 | __SDIO_CLEAR_FLAG(SDIOx, SDIO_STATIC_FLAGS); |
NYX | 0:85b3fd62ea1a | 1426 | |
NYX | 0:85b3fd62ea1a | 1427 | /* We have received response, retrieve it. */ |
NYX | 0:85b3fd62ea1a | 1428 | response_r1 = SDIO_GetResponse(SDIOx, SDIO_RESP1); |
NYX | 0:85b3fd62ea1a | 1429 | |
NYX | 0:85b3fd62ea1a | 1430 | if((response_r1 & (SDMMC_R6_GENERAL_UNKNOWN_ERROR | SDMMC_R6_ILLEGAL_CMD | SDMMC_R6_COM_CRC_FAILED)) == SDMMC_ALLZERO) |
NYX | 0:85b3fd62ea1a | 1431 | { |
NYX | 0:85b3fd62ea1a | 1432 | *pRCA = (uint16_t) (response_r1 >> 16); |
NYX | 0:85b3fd62ea1a | 1433 | |
NYX | 0:85b3fd62ea1a | 1434 | return SDMMC_ERROR_NONE; |
NYX | 0:85b3fd62ea1a | 1435 | } |
NYX | 0:85b3fd62ea1a | 1436 | else if((response_r1 & SDMMC_R6_ILLEGAL_CMD) == SDMMC_R6_ILLEGAL_CMD) |
NYX | 0:85b3fd62ea1a | 1437 | { |
NYX | 0:85b3fd62ea1a | 1438 | return SDMMC_ERROR_ILLEGAL_CMD; |
NYX | 0:85b3fd62ea1a | 1439 | } |
NYX | 0:85b3fd62ea1a | 1440 | else if((response_r1 & SDMMC_R6_COM_CRC_FAILED) == SDMMC_R6_COM_CRC_FAILED) |
NYX | 0:85b3fd62ea1a | 1441 | { |
NYX | 0:85b3fd62ea1a | 1442 | return SDMMC_ERROR_COM_CRC_FAILED; |
NYX | 0:85b3fd62ea1a | 1443 | } |
NYX | 0:85b3fd62ea1a | 1444 | else |
NYX | 0:85b3fd62ea1a | 1445 | { |
NYX | 0:85b3fd62ea1a | 1446 | return SDMMC_ERROR_GENERAL_UNKNOWN_ERR; |
NYX | 0:85b3fd62ea1a | 1447 | } |
NYX | 0:85b3fd62ea1a | 1448 | } |
NYX | 0:85b3fd62ea1a | 1449 | |
NYX | 0:85b3fd62ea1a | 1450 | /** |
NYX | 0:85b3fd62ea1a | 1451 | * @brief Checks for error conditions for R7 response. |
NYX | 0:85b3fd62ea1a | 1452 | * @param hsd: SD handle |
NYX | 0:85b3fd62ea1a | 1453 | * @retval SD Card error state |
NYX | 0:85b3fd62ea1a | 1454 | */ |
NYX | 0:85b3fd62ea1a | 1455 | static uint32_t SDMMC_GetCmdResp7(SDIO_TypeDef *SDIOx) |
NYX | 0:85b3fd62ea1a | 1456 | { |
NYX | 0:85b3fd62ea1a | 1457 | /* 8 is the number of required instructions cycles for the below loop statement. |
NYX | 0:85b3fd62ea1a | 1458 | The SDIO_CMDTIMEOUT is expressed in ms */ |
NYX | 0:85b3fd62ea1a | 1459 | register uint32_t count = SDIO_CMDTIMEOUT * (SystemCoreClock / 8U /1000U); |
NYX | 0:85b3fd62ea1a | 1460 | |
NYX | 0:85b3fd62ea1a | 1461 | do |
NYX | 0:85b3fd62ea1a | 1462 | { |
NYX | 0:85b3fd62ea1a | 1463 | if (count-- == 0U) |
NYX | 0:85b3fd62ea1a | 1464 | { |
NYX | 0:85b3fd62ea1a | 1465 | return SDMMC_ERROR_TIMEOUT; |
NYX | 0:85b3fd62ea1a | 1466 | } |
NYX | 0:85b3fd62ea1a | 1467 | |
NYX | 0:85b3fd62ea1a | 1468 | }while(!__SDIO_GET_FLAG(SDIOx, SDIO_FLAG_CCRCFAIL | SDIO_FLAG_CMDREND | SDIO_FLAG_CTIMEOUT)); |
NYX | 0:85b3fd62ea1a | 1469 | |
NYX | 0:85b3fd62ea1a | 1470 | if(__SDIO_GET_FLAG(SDIOx, SDIO_FLAG_CTIMEOUT)) |
NYX | 0:85b3fd62ea1a | 1471 | { |
NYX | 0:85b3fd62ea1a | 1472 | /* Card is SD V2.0 compliant */ |
NYX | 0:85b3fd62ea1a | 1473 | __SDIO_CLEAR_FLAG(SDIOx, SDIO_FLAG_CMDREND); |
NYX | 0:85b3fd62ea1a | 1474 | |
NYX | 0:85b3fd62ea1a | 1475 | return SDMMC_ERROR_CMD_RSP_TIMEOUT; |
NYX | 0:85b3fd62ea1a | 1476 | } |
NYX | 0:85b3fd62ea1a | 1477 | |
NYX | 0:85b3fd62ea1a | 1478 | if(__SDIO_GET_FLAG(SDIOx, SDIO_FLAG_CMDREND)) |
NYX | 0:85b3fd62ea1a | 1479 | { |
NYX | 0:85b3fd62ea1a | 1480 | /* Card is SD V2.0 compliant */ |
NYX | 0:85b3fd62ea1a | 1481 | __SDIO_CLEAR_FLAG(SDIOx, SDIO_FLAG_CMDREND); |
NYX | 0:85b3fd62ea1a | 1482 | } |
NYX | 0:85b3fd62ea1a | 1483 | |
NYX | 0:85b3fd62ea1a | 1484 | return SDMMC_ERROR_NONE; |
NYX | 0:85b3fd62ea1a | 1485 | |
NYX | 0:85b3fd62ea1a | 1486 | } |
NYX | 0:85b3fd62ea1a | 1487 | |
NYX | 0:85b3fd62ea1a | 1488 | /** |
NYX | 0:85b3fd62ea1a | 1489 | * @} |
NYX | 0:85b3fd62ea1a | 1490 | */ |
NYX | 0:85b3fd62ea1a | 1491 | |
NYX | 0:85b3fd62ea1a | 1492 | /** |
NYX | 0:85b3fd62ea1a | 1493 | * @} |
NYX | 0:85b3fd62ea1a | 1494 | */ |
NYX | 0:85b3fd62ea1a | 1495 | |
NYX | 0:85b3fd62ea1a | 1496 | #endif /* STM32F405xx || STM32F415xx || STM32F407xx || STM32F417xx || STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || |
NYX | 0:85b3fd62ea1a | 1497 | STM32F401xC || STM32F401xE || STM32F411xE || STM32F446xx || STM32F469xx || STM32F479xx || STM32F412Zx || STM32F412Vx || |
NYX | 0:85b3fd62ea1a | 1498 | STM32F412Rx || STM32F412Cx || STM32F413xx || STM32F423xx */ |
NYX | 0:85b3fd62ea1a | 1499 | #endif /* (HAL_SD_MODULE_ENABLED) || (HAL_MMC_MODULE_ENABLED) */ |
NYX | 0:85b3fd62ea1a | 1500 | |
NYX | 0:85b3fd62ea1a | 1501 | /** |
NYX | 0:85b3fd62ea1a | 1502 | * @} |
NYX | 0:85b3fd62ea1a | 1503 | */ |
NYX | 0:85b3fd62ea1a | 1504 | |
NYX | 0:85b3fd62ea1a | 1505 | /** |
NYX | 0:85b3fd62ea1a | 1506 | * @} |
NYX | 0:85b3fd62ea1a | 1507 | */ |
NYX | 0:85b3fd62ea1a | 1508 | |
NYX | 0:85b3fd62ea1a | 1509 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |