Takaaki Numai / mbed-dev

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Dependents:   Hobbyking_Cheetah_0511

targets/TARGET_STM/TARGET_STM32F4/device/stm32f4xx_ll_i2c.c@0:85b3fd62ea1a, 2020-03-16 (annotated)

Committer:
NYX
Date:
Mon Mar 16 06:35:48 2020 +0000
Revision:
0:85b3fd62ea1a
reinport to mbed;

Who changed what in which revision?

UserRevisionLine numberNew contents of line
NYX 0:85b3fd62ea1a 1 /**
NYX 0:85b3fd62ea1a 2 ******************************************************************************
NYX 0:85b3fd62ea1a 3 * @file stm32f4xx_ll_i2c.c
NYX 0:85b3fd62ea1a 4 * @author MCD Application Team
NYX 0:85b3fd62ea1a 5 * @version V1.7.1
NYX 0:85b3fd62ea1a 6 * @date 14-April-2017
NYX 0:85b3fd62ea1a 7 * @brief I2C LL module driver.
NYX 0:85b3fd62ea1a 8 ******************************************************************************
NYX 0:85b3fd62ea1a 9 * @attention
NYX 0:85b3fd62ea1a 10 *
NYX 0:85b3fd62ea1a 11 * <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
NYX 0:85b3fd62ea1a 12 *
NYX 0:85b3fd62ea1a 13 * Redistribution and use in source and binary forms, with or without modification,
NYX 0:85b3fd62ea1a 14 * are permitted provided that the following conditions are met:
NYX 0:85b3fd62ea1a 15 * 1. Redistributions of source code must retain the above copyright notice,
NYX 0:85b3fd62ea1a 16 * this list of conditions and the following disclaimer.
NYX 0:85b3fd62ea1a 17 * 2. Redistributions in binary form must reproduce the above copyright notice,
NYX 0:85b3fd62ea1a 18 * this list of conditions and the following disclaimer in the documentation
NYX 0:85b3fd62ea1a 19 * and/or other materials provided with the distribution.
NYX 0:85b3fd62ea1a 20 * 3. Neither the name of STMicroelectronics nor the names of its contributors
NYX 0:85b3fd62ea1a 21 * may be used to endorse or promote products derived from this software
NYX 0:85b3fd62ea1a 22 * without specific prior written permission.
NYX 0:85b3fd62ea1a 23 *
NYX 0:85b3fd62ea1a 24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
NYX 0:85b3fd62ea1a 25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
NYX 0:85b3fd62ea1a 26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
NYX 0:85b3fd62ea1a 27 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
NYX 0:85b3fd62ea1a 28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
NYX 0:85b3fd62ea1a 29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
NYX 0:85b3fd62ea1a 30 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
NYX 0:85b3fd62ea1a 31 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
NYX 0:85b3fd62ea1a 32 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
NYX 0:85b3fd62ea1a 33 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
NYX 0:85b3fd62ea1a 34 *
NYX 0:85b3fd62ea1a 35 ******************************************************************************
NYX 0:85b3fd62ea1a 36 */
NYX 0:85b3fd62ea1a 37 #if defined(USE_FULL_LL_DRIVER)
NYX 0:85b3fd62ea1a 38
NYX 0:85b3fd62ea1a 39 /* Includes ------------------------------------------------------------------*/
NYX 0:85b3fd62ea1a 40 #include "stm32f4xx_ll_i2c.h"
NYX 0:85b3fd62ea1a 41 #include "stm32f4xx_ll_bus.h"
NYX 0:85b3fd62ea1a 42 #include "stm32f4xx_ll_rcc.h"
NYX 0:85b3fd62ea1a 43 #ifdef USE_FULL_ASSERT
NYX 0:85b3fd62ea1a 44 #include "stm32_assert.h"
NYX 0:85b3fd62ea1a 45 #else
NYX 0:85b3fd62ea1a 46 #define assert_param(expr) ((void)0U)
NYX 0:85b3fd62ea1a 47 #endif
NYX 0:85b3fd62ea1a 48
NYX 0:85b3fd62ea1a 49 /** @addtogroup STM32F4xx_LL_Driver
NYX 0:85b3fd62ea1a 50 * @{
NYX 0:85b3fd62ea1a 51 */
NYX 0:85b3fd62ea1a 52
NYX 0:85b3fd62ea1a 53 #if defined (I2C1) || defined (I2C2) || defined (I2C3)
NYX 0:85b3fd62ea1a 54
NYX 0:85b3fd62ea1a 55 /** @defgroup I2C_LL I2C
NYX 0:85b3fd62ea1a 56 * @{
NYX 0:85b3fd62ea1a 57 */
NYX 0:85b3fd62ea1a 58
NYX 0:85b3fd62ea1a 59 /* Private types -------------------------------------------------------------*/
NYX 0:85b3fd62ea1a 60 /* Private variables ---------------------------------------------------------*/
NYX 0:85b3fd62ea1a 61 /* Private constants ---------------------------------------------------------*/
NYX 0:85b3fd62ea1a 62 /* Private macros ------------------------------------------------------------*/
NYX 0:85b3fd62ea1a 63 /** @addtogroup I2C_LL_Private_Macros
NYX 0:85b3fd62ea1a 64 * @{
NYX 0:85b3fd62ea1a 65 */
NYX 0:85b3fd62ea1a 66
NYX 0:85b3fd62ea1a 67 #define IS_LL_I2C_PERIPHERAL_MODE(__VALUE__) (((__VALUE__) == LL_I2C_MODE_I2C) || \
NYX 0:85b3fd62ea1a 68 ((__VALUE__) == LL_I2C_MODE_SMBUS_HOST) || \
NYX 0:85b3fd62ea1a 69 ((__VALUE__) == LL_I2C_MODE_SMBUS_DEVICE) || \
NYX 0:85b3fd62ea1a 70 ((__VALUE__) == LL_I2C_MODE_SMBUS_DEVICE_ARP))
NYX 0:85b3fd62ea1a 71
NYX 0:85b3fd62ea1a 72 #define IS_I2C_CLOCK_SPEED(__VALUE__) (((__VALUE__) > 0U) && ((__VALUE__) <= LL_I2C_MAX_SPEED_FAST))
NYX 0:85b3fd62ea1a 73
NYX 0:85b3fd62ea1a 74 #define IS_I2C_DUTY_CYCLE(__VALUE__) (((__VALUE__) == LL_I2C_DUTYCYCLE_2) || \
NYX 0:85b3fd62ea1a 75 ((__VALUE__) == LL_I2C_DUTYCYCLE_16_9))
NYX 0:85b3fd62ea1a 76
NYX 0:85b3fd62ea1a 77 #if defined(I2C_FLTR_ANOFF)&&defined(I2C_FLTR_DNF)
NYX 0:85b3fd62ea1a 78 #define IS_LL_I2C_ANALOG_FILTER(__VALUE__) (((__VALUE__) == LL_I2C_ANALOGFILTER_ENABLE) || \
NYX 0:85b3fd62ea1a 79 ((__VALUE__) == LL_I2C_ANALOGFILTER_DISABLE))
NYX 0:85b3fd62ea1a 80
NYX 0:85b3fd62ea1a 81 #define IS_LL_I2C_DIGITAL_FILTER(__VALUE__) ((__VALUE__) <= 0x0000000FU)
NYX 0:85b3fd62ea1a 82
NYX 0:85b3fd62ea1a 83 #endif
NYX 0:85b3fd62ea1a 84 #define IS_LL_I2C_OWN_ADDRESS1(__VALUE__) ((__VALUE__) <= 0x000003FFU)
NYX 0:85b3fd62ea1a 85
NYX 0:85b3fd62ea1a 86 #define IS_LL_I2C_TYPE_ACKNOWLEDGE(__VALUE__) (((__VALUE__) == LL_I2C_ACK) || \
NYX 0:85b3fd62ea1a 87 ((__VALUE__) == LL_I2C_NACK))
NYX 0:85b3fd62ea1a 88
NYX 0:85b3fd62ea1a 89 #define IS_LL_I2C_OWN_ADDRSIZE(__VALUE__) (((__VALUE__) == LL_I2C_OWNADDRESS1_7BIT) || \
NYX 0:85b3fd62ea1a 90 ((__VALUE__) == LL_I2C_OWNADDRESS1_10BIT))
NYX 0:85b3fd62ea1a 91 /**
NYX 0:85b3fd62ea1a 92 * @}
NYX 0:85b3fd62ea1a 93 */
NYX 0:85b3fd62ea1a 94
NYX 0:85b3fd62ea1a 95 /* Private function prototypes -----------------------------------------------*/
NYX 0:85b3fd62ea1a 96
NYX 0:85b3fd62ea1a 97 /* Exported functions --------------------------------------------------------*/
NYX 0:85b3fd62ea1a 98 /** @addtogroup I2C_LL_Exported_Functions
NYX 0:85b3fd62ea1a 99 * @{
NYX 0:85b3fd62ea1a 100 */
NYX 0:85b3fd62ea1a 101
NYX 0:85b3fd62ea1a 102 /** @addtogroup I2C_LL_EF_Init
NYX 0:85b3fd62ea1a 103 * @{
NYX 0:85b3fd62ea1a 104 */
NYX 0:85b3fd62ea1a 105
NYX 0:85b3fd62ea1a 106 /**
NYX 0:85b3fd62ea1a 107 * @brief De-initialize the I2C registers to their default reset values.
NYX 0:85b3fd62ea1a 108 * @param I2Cx I2C Instance.
NYX 0:85b3fd62ea1a 109 * @retval An ErrorStatus enumeration value:
NYX 0:85b3fd62ea1a 110 * - SUCCESS: I2C registers are de-initialized
NYX 0:85b3fd62ea1a 111 * - ERROR: I2C registers are not de-initialized
NYX 0:85b3fd62ea1a 112 */
NYX 0:85b3fd62ea1a 113 uint32_t LL_I2C_DeInit(I2C_TypeDef *I2Cx)
NYX 0:85b3fd62ea1a 114 {
NYX 0:85b3fd62ea1a 115 ErrorStatus status = SUCCESS;
NYX 0:85b3fd62ea1a 116
NYX 0:85b3fd62ea1a 117 /* Check the I2C Instance I2Cx */
NYX 0:85b3fd62ea1a 118 assert_param(IS_I2C_ALL_INSTANCE(I2Cx));
NYX 0:85b3fd62ea1a 119
NYX 0:85b3fd62ea1a 120 if (I2Cx == I2C1)
NYX 0:85b3fd62ea1a 121 {
NYX 0:85b3fd62ea1a 122 /* Force reset of I2C clock */
NYX 0:85b3fd62ea1a 123 LL_APB1_GRP1_ForceReset(LL_APB1_GRP1_PERIPH_I2C1);
NYX 0:85b3fd62ea1a 124
NYX 0:85b3fd62ea1a 125 /* Release reset of I2C clock */
NYX 0:85b3fd62ea1a 126 LL_APB1_GRP1_ReleaseReset(LL_APB1_GRP1_PERIPH_I2C1);
NYX 0:85b3fd62ea1a 127 }
NYX 0:85b3fd62ea1a 128 else if (I2Cx == I2C2)
NYX 0:85b3fd62ea1a 129 {
NYX 0:85b3fd62ea1a 130 /* Force reset of I2C clock */
NYX 0:85b3fd62ea1a 131 LL_APB1_GRP1_ForceReset(LL_APB1_GRP1_PERIPH_I2C2);
NYX 0:85b3fd62ea1a 132
NYX 0:85b3fd62ea1a 133 /* Release reset of I2C clock */
NYX 0:85b3fd62ea1a 134 LL_APB1_GRP1_ReleaseReset(LL_APB1_GRP1_PERIPH_I2C2);
NYX 0:85b3fd62ea1a 135
NYX 0:85b3fd62ea1a 136 }
NYX 0:85b3fd62ea1a 137 #if defined(I2C3)
NYX 0:85b3fd62ea1a 138 else if (I2Cx == I2C3)
NYX 0:85b3fd62ea1a 139 {
NYX 0:85b3fd62ea1a 140 /* Force reset of I2C clock */
NYX 0:85b3fd62ea1a 141 LL_APB1_GRP1_ForceReset(LL_APB1_GRP1_PERIPH_I2C3);
NYX 0:85b3fd62ea1a 142
NYX 0:85b3fd62ea1a 143 /* Release reset of I2C clock */
NYX 0:85b3fd62ea1a 144 LL_APB1_GRP1_ReleaseReset(LL_APB1_GRP1_PERIPH_I2C3);
NYX 0:85b3fd62ea1a 145 }
NYX 0:85b3fd62ea1a 146 #endif
NYX 0:85b3fd62ea1a 147 else
NYX 0:85b3fd62ea1a 148 {
NYX 0:85b3fd62ea1a 149 status = ERROR;
NYX 0:85b3fd62ea1a 150 }
NYX 0:85b3fd62ea1a 151
NYX 0:85b3fd62ea1a 152 return status;
NYX 0:85b3fd62ea1a 153 }
NYX 0:85b3fd62ea1a 154
NYX 0:85b3fd62ea1a 155 /**
NYX 0:85b3fd62ea1a 156 * @brief Initialize the I2C registers according to the specified parameters in I2C_InitStruct.
NYX 0:85b3fd62ea1a 157 * @param I2Cx I2C Instance.
NYX 0:85b3fd62ea1a 158 * @param I2C_InitStruct pointer to a @ref LL_I2C_InitTypeDef structure.
NYX 0:85b3fd62ea1a 159 * @retval An ErrorStatus enumeration value:
NYX 0:85b3fd62ea1a 160 * - SUCCESS: I2C registers are initialized
NYX 0:85b3fd62ea1a 161 * - ERROR: Not applicable
NYX 0:85b3fd62ea1a 162 */
NYX 0:85b3fd62ea1a 163 uint32_t LL_I2C_Init(I2C_TypeDef *I2Cx, LL_I2C_InitTypeDef *I2C_InitStruct)
NYX 0:85b3fd62ea1a 164 {
NYX 0:85b3fd62ea1a 165 LL_RCC_ClocksTypeDef rcc_clocks;
NYX 0:85b3fd62ea1a 166
NYX 0:85b3fd62ea1a 167 /* Check the I2C Instance I2Cx */
NYX 0:85b3fd62ea1a 168 assert_param(IS_I2C_ALL_INSTANCE(I2Cx));
NYX 0:85b3fd62ea1a 169
NYX 0:85b3fd62ea1a 170 /* Check the I2C parameters from I2C_InitStruct */
NYX 0:85b3fd62ea1a 171 assert_param(IS_LL_I2C_PERIPHERAL_MODE(I2C_InitStruct->PeripheralMode));
NYX 0:85b3fd62ea1a 172 assert_param(IS_I2C_CLOCK_SPEED(I2C_InitStruct->ClockSpeed));
NYX 0:85b3fd62ea1a 173 assert_param(IS_I2C_DUTY_CYCLE(I2C_InitStruct->DutyCycle));
NYX 0:85b3fd62ea1a 174 #if defined(I2C_FLTR_ANOFF)&&defined(I2C_FLTR_DNF)
NYX 0:85b3fd62ea1a 175 assert_param(IS_LL_I2C_ANALOG_FILTER(I2C_InitStruct->AnalogFilter));
NYX 0:85b3fd62ea1a 176 assert_param(IS_LL_I2C_DIGITAL_FILTER(I2C_InitStruct->DigitalFilter));
NYX 0:85b3fd62ea1a 177 #endif
NYX 0:85b3fd62ea1a 178 assert_param(IS_LL_I2C_OWN_ADDRESS1(I2C_InitStruct->OwnAddress1));
NYX 0:85b3fd62ea1a 179 assert_param(IS_LL_I2C_TYPE_ACKNOWLEDGE(I2C_InitStruct->TypeAcknowledge));
NYX 0:85b3fd62ea1a 180 assert_param(IS_LL_I2C_OWN_ADDRSIZE(I2C_InitStruct->OwnAddrSize));
NYX 0:85b3fd62ea1a 181
NYX 0:85b3fd62ea1a 182 /* Disable the selected I2Cx Peripheral */
NYX 0:85b3fd62ea1a 183 LL_I2C_Disable(I2Cx);
NYX 0:85b3fd62ea1a 184
NYX 0:85b3fd62ea1a 185 /* Retrieve Clock frequencies */
NYX 0:85b3fd62ea1a 186 LL_RCC_GetSystemClocksFreq(&rcc_clocks);
NYX 0:85b3fd62ea1a 187
NYX 0:85b3fd62ea1a 188 #if defined(I2C_FLTR_ANOFF)&&defined(I2C_FLTR_DNF)
NYX 0:85b3fd62ea1a 189 /*---------------------------- I2Cx FLTR Configuration -----------------------
NYX 0:85b3fd62ea1a 190 * Configure the analog and digital noise filters with parameters :
NYX 0:85b3fd62ea1a 191 * - AnalogFilter: I2C_FLTR_ANFOFF bit
NYX 0:85b3fd62ea1a 192 * - DigitalFilter: I2C_FLTR_DNF[3:0] bits
NYX 0:85b3fd62ea1a 193 */
NYX 0:85b3fd62ea1a 194 LL_I2C_ConfigFilters(I2Cx, I2C_InitStruct->AnalogFilter, I2C_InitStruct->DigitalFilter);
NYX 0:85b3fd62ea1a 195
NYX 0:85b3fd62ea1a 196 #endif
NYX 0:85b3fd62ea1a 197 /*---------------------------- I2Cx SCL Clock Speed Configuration ------------
NYX 0:85b3fd62ea1a 198 * Configure the SCL speed :
NYX 0:85b3fd62ea1a 199 * - ClockSpeed: I2C_CR2_FREQ[5:0], I2C_TRISE_TRISE[5:0], I2C_CCR_FS,
NYX 0:85b3fd62ea1a 200 * and I2C_CCR_CCR[11:0] bits
NYX 0:85b3fd62ea1a 201 * - DutyCycle: I2C_CCR_DUTY[7:0] bits
NYX 0:85b3fd62ea1a 202 */
NYX 0:85b3fd62ea1a 203 LL_I2C_ConfigSpeed(I2Cx, rcc_clocks.PCLK1_Frequency, I2C_InitStruct->ClockSpeed, I2C_InitStruct->DutyCycle);
NYX 0:85b3fd62ea1a 204
NYX 0:85b3fd62ea1a 205 /*---------------------------- I2Cx OAR1 Configuration -----------------------
NYX 0:85b3fd62ea1a 206 * Disable, Configure and Enable I2Cx device own address 1 with parameters :
NYX 0:85b3fd62ea1a 207 * - OwnAddress1: I2C_OAR1_ADD[9:8], I2C_OAR1_ADD[7:1] and I2C_OAR1_ADD0 bits
NYX 0:85b3fd62ea1a 208 * - OwnAddrSize: I2C_OAR1_ADDMODE bit
NYX 0:85b3fd62ea1a 209 */
NYX 0:85b3fd62ea1a 210 LL_I2C_SetOwnAddress1(I2Cx, I2C_InitStruct->OwnAddress1, I2C_InitStruct->OwnAddrSize);
NYX 0:85b3fd62ea1a 211
NYX 0:85b3fd62ea1a 212 /*---------------------------- I2Cx MODE Configuration -----------------------
NYX 0:85b3fd62ea1a 213 * Configure I2Cx peripheral mode with parameter :
NYX 0:85b3fd62ea1a 214 * - PeripheralMode: I2C_CR1_SMBUS, I2C_CR1_SMBTYPE and I2C_CR1_ENARP bits
NYX 0:85b3fd62ea1a 215 */
NYX 0:85b3fd62ea1a 216 LL_I2C_SetMode(I2Cx, I2C_InitStruct->PeripheralMode);
NYX 0:85b3fd62ea1a 217
NYX 0:85b3fd62ea1a 218 /* Enable the selected I2Cx Peripheral */
NYX 0:85b3fd62ea1a 219 LL_I2C_Enable(I2Cx);
NYX 0:85b3fd62ea1a 220
NYX 0:85b3fd62ea1a 221 /*---------------------------- I2Cx CR2 Configuration ------------------------
NYX 0:85b3fd62ea1a 222 * Configure the ACKnowledge or Non ACKnowledge condition
NYX 0:85b3fd62ea1a 223 * after the address receive match code or next received byte with parameter :
NYX 0:85b3fd62ea1a 224 * - TypeAcknowledge: I2C_CR2_NACK bit
NYX 0:85b3fd62ea1a 225 */
NYX 0:85b3fd62ea1a 226 LL_I2C_AcknowledgeNextData(I2Cx, I2C_InitStruct->TypeAcknowledge);
NYX 0:85b3fd62ea1a 227
NYX 0:85b3fd62ea1a 228 return SUCCESS;
NYX 0:85b3fd62ea1a 229 }
NYX 0:85b3fd62ea1a 230
NYX 0:85b3fd62ea1a 231 /**
NYX 0:85b3fd62ea1a 232 * @brief Set each @ref LL_I2C_InitTypeDef field to default value.
NYX 0:85b3fd62ea1a 233 * @param I2C_InitStruct Pointer to a @ref LL_I2C_InitTypeDef structure.
NYX 0:85b3fd62ea1a 234 * @retval None
NYX 0:85b3fd62ea1a 235 */
NYX 0:85b3fd62ea1a 236 void LL_I2C_StructInit(LL_I2C_InitTypeDef *I2C_InitStruct)
NYX 0:85b3fd62ea1a 237 {
NYX 0:85b3fd62ea1a 238 /* Set I2C_InitStruct fields to default values */
NYX 0:85b3fd62ea1a 239 I2C_InitStruct->PeripheralMode = LL_I2C_MODE_I2C;
NYX 0:85b3fd62ea1a 240 I2C_InitStruct->ClockSpeed = 5000U;
NYX 0:85b3fd62ea1a 241 I2C_InitStruct->DutyCycle = LL_I2C_DUTYCYCLE_2;
NYX 0:85b3fd62ea1a 242 #if defined(I2C_FLTR_ANOFF)&&defined(I2C_FLTR_DNF)
NYX 0:85b3fd62ea1a 243 I2C_InitStruct->AnalogFilter = LL_I2C_ANALOGFILTER_ENABLE;
NYX 0:85b3fd62ea1a 244 I2C_InitStruct->DigitalFilter = 0U;
NYX 0:85b3fd62ea1a 245 #endif
NYX 0:85b3fd62ea1a 246 I2C_InitStruct->OwnAddress1 = 0U;
NYX 0:85b3fd62ea1a 247 I2C_InitStruct->TypeAcknowledge = LL_I2C_NACK;
NYX 0:85b3fd62ea1a 248 I2C_InitStruct->OwnAddrSize = LL_I2C_OWNADDRESS1_7BIT;
NYX 0:85b3fd62ea1a 249 }
NYX 0:85b3fd62ea1a 250
NYX 0:85b3fd62ea1a 251 /**
NYX 0:85b3fd62ea1a 252 * @}
NYX 0:85b3fd62ea1a 253 */
NYX 0:85b3fd62ea1a 254
NYX 0:85b3fd62ea1a 255 /**
NYX 0:85b3fd62ea1a 256 * @}
NYX 0:85b3fd62ea1a 257 */
NYX 0:85b3fd62ea1a 258
NYX 0:85b3fd62ea1a 259 /**
NYX 0:85b3fd62ea1a 260 * @}
NYX 0:85b3fd62ea1a 261 */
NYX 0:85b3fd62ea1a 262
NYX 0:85b3fd62ea1a 263 #endif /* I2C1 || I2C2 || I2C3 */
NYX 0:85b3fd62ea1a 264
NYX 0:85b3fd62ea1a 265 /**
NYX 0:85b3fd62ea1a 266 * @}
NYX 0:85b3fd62ea1a 267 */
NYX 0:85b3fd62ea1a 268
NYX 0:85b3fd62ea1a 269 #endif /* USE_FULL_LL_DRIVER */
NYX 0:85b3fd62ea1a 270
NYX 0:85b3fd62ea1a 271 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/