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targets/TARGET_STM/TARGET_STM32F4/device/stm32f4xx_ll_dma2d.h@0:85b3fd62ea1a, 2020-03-16 (annotated)

Committer:
NYX
Date:
Mon Mar 16 06:35:48 2020 +0000
Revision:
0:85b3fd62ea1a
reinport to mbed;

Who changed what in which revision?

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NYX 0:85b3fd62ea1a 1 /**
NYX 0:85b3fd62ea1a 2 ******************************************************************************
NYX 0:85b3fd62ea1a 3 * @file stm32f4xx_ll_dma2d.h
NYX 0:85b3fd62ea1a 4 * @author MCD Application Team
NYX 0:85b3fd62ea1a 5 * @version V1.7.1
NYX 0:85b3fd62ea1a 6 * @date 14-April-2017
NYX 0:85b3fd62ea1a 7 * @brief Header file of DMA2D LL module.
NYX 0:85b3fd62ea1a 8 ******************************************************************************
NYX 0:85b3fd62ea1a 9 * @attention
NYX 0:85b3fd62ea1a 10 *
NYX 0:85b3fd62ea1a 11 * <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
NYX 0:85b3fd62ea1a 12 *
NYX 0:85b3fd62ea1a 13 * Redistribution and use in source and binary forms, with or without modification,
NYX 0:85b3fd62ea1a 14 * are permitted provided that the following conditions are met:
NYX 0:85b3fd62ea1a 15 * 1. Redistributions of source code must retain the above copyright notice,
NYX 0:85b3fd62ea1a 16 * this list of conditions and the following disclaimer.
NYX 0:85b3fd62ea1a 17 * 2. Redistributions in binary form must reproduce the above copyright notice,
NYX 0:85b3fd62ea1a 18 * this list of conditions and the following disclaimer in the documentation
NYX 0:85b3fd62ea1a 19 * and/or other materials provided with the distribution.
NYX 0:85b3fd62ea1a 20 * 3. Neither the name of STMicroelectronics nor the names of its contributors
NYX 0:85b3fd62ea1a 21 * may be used to endorse or promote products derived from this software
NYX 0:85b3fd62ea1a 22 * without specific prior written permission.
NYX 0:85b3fd62ea1a 23 *
NYX 0:85b3fd62ea1a 24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
NYX 0:85b3fd62ea1a 25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
NYX 0:85b3fd62ea1a 26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
NYX 0:85b3fd62ea1a 27 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
NYX 0:85b3fd62ea1a 28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
NYX 0:85b3fd62ea1a 29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
NYX 0:85b3fd62ea1a 30 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
NYX 0:85b3fd62ea1a 31 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
NYX 0:85b3fd62ea1a 32 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
NYX 0:85b3fd62ea1a 33 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
NYX 0:85b3fd62ea1a 34 *
NYX 0:85b3fd62ea1a 35 ******************************************************************************
NYX 0:85b3fd62ea1a 36 */
NYX 0:85b3fd62ea1a 37
NYX 0:85b3fd62ea1a 38 /* Define to prevent recursive inclusion -------------------------------------*/
NYX 0:85b3fd62ea1a 39 #ifndef __STM32F4xx_LL_DMA2D_H
NYX 0:85b3fd62ea1a 40 #define __STM32F4xx_LL_DMA2D_H
NYX 0:85b3fd62ea1a 41
NYX 0:85b3fd62ea1a 42 #ifdef __cplusplus
NYX 0:85b3fd62ea1a 43 extern "C" {
NYX 0:85b3fd62ea1a 44 #endif
NYX 0:85b3fd62ea1a 45
NYX 0:85b3fd62ea1a 46 /* Includes ------------------------------------------------------------------*/
NYX 0:85b3fd62ea1a 47 #include "stm32f4xx.h"
NYX 0:85b3fd62ea1a 48
NYX 0:85b3fd62ea1a 49 /** @addtogroup STM32F4xx_LL_Driver
NYX 0:85b3fd62ea1a 50 * @{
NYX 0:85b3fd62ea1a 51 */
NYX 0:85b3fd62ea1a 52
NYX 0:85b3fd62ea1a 53 #if defined (DMA2D)
NYX 0:85b3fd62ea1a 54
NYX 0:85b3fd62ea1a 55 /** @defgroup DMA2D_LL DMA2D
NYX 0:85b3fd62ea1a 56 * @{
NYX 0:85b3fd62ea1a 57 */
NYX 0:85b3fd62ea1a 58
NYX 0:85b3fd62ea1a 59 /* Private types -------------------------------------------------------------*/
NYX 0:85b3fd62ea1a 60 /* Private variables ---------------------------------------------------------*/
NYX 0:85b3fd62ea1a 61 /* Private constants ---------------------------------------------------------*/
NYX 0:85b3fd62ea1a 62 /* Private macros ------------------------------------------------------------*/
NYX 0:85b3fd62ea1a 63 #if defined(USE_FULL_LL_DRIVER)
NYX 0:85b3fd62ea1a 64 /** @defgroup DMA2D_LL_Private_Macros DMA2D Private Macros
NYX 0:85b3fd62ea1a 65 * @{
NYX 0:85b3fd62ea1a 66 */
NYX 0:85b3fd62ea1a 67
NYX 0:85b3fd62ea1a 68 /**
NYX 0:85b3fd62ea1a 69 * @}
NYX 0:85b3fd62ea1a 70 */
NYX 0:85b3fd62ea1a 71 #endif /*USE_FULL_LL_DRIVER*/
NYX 0:85b3fd62ea1a 72
NYX 0:85b3fd62ea1a 73 /* Exported types ------------------------------------------------------------*/
NYX 0:85b3fd62ea1a 74 #if defined(USE_FULL_LL_DRIVER)
NYX 0:85b3fd62ea1a 75 /** @defgroup DMA2D_LL_ES_Init_Struct DMA2D Exported Init structures
NYX 0:85b3fd62ea1a 76 * @{
NYX 0:85b3fd62ea1a 77 */
NYX 0:85b3fd62ea1a 78
NYX 0:85b3fd62ea1a 79 /**
NYX 0:85b3fd62ea1a 80 * @brief LL DMA2D Init Structure Definition
NYX 0:85b3fd62ea1a 81 */
NYX 0:85b3fd62ea1a 82 typedef struct
NYX 0:85b3fd62ea1a 83 {
NYX 0:85b3fd62ea1a 84 uint32_t Mode; /*!< Specifies the DMA2D transfer mode.
NYX 0:85b3fd62ea1a 85 - This parameter can be one value of @ref DMA2D_LL_EC_MODE.
NYX 0:85b3fd62ea1a 86
NYX 0:85b3fd62ea1a 87 This parameter can be modified afterwards using unitary function @ref LL_DMA2D_SetMode().*/
NYX 0:85b3fd62ea1a 88
NYX 0:85b3fd62ea1a 89 uint32_t ColorMode; /*!< Specifies the color format of the output image.
NYX 0:85b3fd62ea1a 90 - This parameter can be one value of @ref DMA2D_LL_EC_OUTPUT_COLOR_MODE.
NYX 0:85b3fd62ea1a 91
NYX 0:85b3fd62ea1a 92 This parameter can be modified afterwards using unitary function @ref LL_DMA2D_SetOutputColorMode(). */
NYX 0:85b3fd62ea1a 93
NYX 0:85b3fd62ea1a 94 uint32_t OutputBlue; /*!< Specifies the Blue value of the output image.
NYX 0:85b3fd62ea1a 95 - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF if ARGB8888 color mode is selected.
NYX 0:85b3fd62ea1a 96 - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF if RGB888 color mode is selected.
NYX 0:85b3fd62ea1a 97 - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0x1F if RGB565 color mode is selected.
NYX 0:85b3fd62ea1a 98 - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0x1F if ARGB1555 color mode is selected.
NYX 0:85b3fd62ea1a 99 - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0x0F if ARGB4444 color mode is selected.
NYX 0:85b3fd62ea1a 100
NYX 0:85b3fd62ea1a 101 This parameter can be modified afterwards using unitary function @ref LL_DMA2D_SetOutputColor() or configuration
NYX 0:85b3fd62ea1a 102 function @ref LL_DMA2D_ConfigOutputColor(). */
NYX 0:85b3fd62ea1a 103
NYX 0:85b3fd62ea1a 104 uint32_t OutputGreen; /*!< Specifies the Green value of the output image.
NYX 0:85b3fd62ea1a 105 - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF if ARGB8888 color mode is selected.
NYX 0:85b3fd62ea1a 106 - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF if RGB888 color mode is selected.
NYX 0:85b3fd62ea1a 107 - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0x3F if RGB565 color mode is selected.
NYX 0:85b3fd62ea1a 108 - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0x1F if ARGB1555 color mode is selected.
NYX 0:85b3fd62ea1a 109 - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0x0F if ARGB4444 color mode is selected.
NYX 0:85b3fd62ea1a 110
NYX 0:85b3fd62ea1a 111 This parameter can be modified afterwards using unitary function @ref LL_DMA2D_SetOutputColor() or configuration
NYX 0:85b3fd62ea1a 112 function @ref LL_DMA2D_ConfigOutputColor(). */
NYX 0:85b3fd62ea1a 113
NYX 0:85b3fd62ea1a 114 uint32_t OutputRed; /*!< Specifies the Red value of the output image.
NYX 0:85b3fd62ea1a 115 - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF if ARGB8888 color mode is selected.
NYX 0:85b3fd62ea1a 116 - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF if RGB888 color mode is selected.
NYX 0:85b3fd62ea1a 117 - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0x1F if RGB565 color mode is selected.
NYX 0:85b3fd62ea1a 118 - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0x1F if ARGB1555 color mode is selected.
NYX 0:85b3fd62ea1a 119 - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0x0F if ARGB4444 color mode is selected.
NYX 0:85b3fd62ea1a 120
NYX 0:85b3fd62ea1a 121 This parameter can be modified afterwards using unitary function @ref LL_DMA2D_SetOutputColor() or configuration
NYX 0:85b3fd62ea1a 122 function @ref LL_DMA2D_ConfigOutputColor(). */
NYX 0:85b3fd62ea1a 123
NYX 0:85b3fd62ea1a 124 uint32_t OutputAlpha; /*!< Specifies the Alpha channel of the output image.
NYX 0:85b3fd62ea1a 125 - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF if ARGB8888 color mode is selected.
NYX 0:85b3fd62ea1a 126 - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0x01 if ARGB1555 color mode is selected.
NYX 0:85b3fd62ea1a 127 - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0x0F if ARGB4444 color mode is selected.
NYX 0:85b3fd62ea1a 128 - This parameter is not considered if RGB888 or RGB565 color mode is selected.
NYX 0:85b3fd62ea1a 129
NYX 0:85b3fd62ea1a 130 This parameter can be modified afterwards using unitary function @ref LL_DMA2D_SetOutputColor() or configuration
NYX 0:85b3fd62ea1a 131 function @ref LL_DMA2D_ConfigOutputColor(). */
NYX 0:85b3fd62ea1a 132
NYX 0:85b3fd62ea1a 133 uint32_t OutputMemoryAddress; /*!< Specifies the memory address.
NYX 0:85b3fd62ea1a 134 - This parameter must be a number between Min_Data = 0x0000 and Max_Data = 0xFFFFFFFF.
NYX 0:85b3fd62ea1a 135
NYX 0:85b3fd62ea1a 136 This parameter can be modified afterwards using unitary function @ref LL_DMA2D_SetOutputMemAddr(). */
NYX 0:85b3fd62ea1a 137
NYX 0:85b3fd62ea1a 138 uint32_t LineOffset; /*!< Specifies the output line offset value.
NYX 0:85b3fd62ea1a 139 - This parameter must be a number between Min_Data = 0x0000 and Max_Data = 0x3FFF.
NYX 0:85b3fd62ea1a 140
NYX 0:85b3fd62ea1a 141 This parameter can be modified afterwards using unitary function @ref LL_DMA2D_SetLineOffset(). */
NYX 0:85b3fd62ea1a 142
NYX 0:85b3fd62ea1a 143 uint32_t NbrOfLines; /*!< Specifies the number of lines of the area to be transferred.
NYX 0:85b3fd62ea1a 144 - This parameter must be a number between Min_Data = 0x0000 and Max_Data = 0xFFFF.
NYX 0:85b3fd62ea1a 145
NYX 0:85b3fd62ea1a 146 This parameter can be modified afterwards using unitary function @ref LL_DMA2D_SetNbrOfLines(). */
NYX 0:85b3fd62ea1a 147
NYX 0:85b3fd62ea1a 148 uint32_t NbrOfPixelsPerLines; /*!< Specifies the number of pixels per lines of the area to be transfered.
NYX 0:85b3fd62ea1a 149 - This parameter must be a number between Min_Data = 0x0000 and Max_Data = 0x3FFF.
NYX 0:85b3fd62ea1a 150
NYX 0:85b3fd62ea1a 151 This parameter can be modified afterwards using unitary function @ref LL_DMA2D_SetNbrOfPixelsPerLines(). */
NYX 0:85b3fd62ea1a 152
NYX 0:85b3fd62ea1a 153 } LL_DMA2D_InitTypeDef;
NYX 0:85b3fd62ea1a 154
NYX 0:85b3fd62ea1a 155 /**
NYX 0:85b3fd62ea1a 156 * @brief LL DMA2D Layer Configuration Structure Definition
NYX 0:85b3fd62ea1a 157 */
NYX 0:85b3fd62ea1a 158 typedef struct
NYX 0:85b3fd62ea1a 159 {
NYX 0:85b3fd62ea1a 160 uint32_t MemoryAddress; /*!< Specifies the foreground or background memory address.
NYX 0:85b3fd62ea1a 161 - This parameter must be a number between Min_Data = 0x0000 and Max_Data = 0xFFFFFFFF.
NYX 0:85b3fd62ea1a 162
NYX 0:85b3fd62ea1a 163 This parameter can be modified afterwards using unitary functions
NYX 0:85b3fd62ea1a 164 - @ref LL_DMA2D_FGND_SetMemAddr() for foreground layer,
NYX 0:85b3fd62ea1a 165 - @ref LL_DMA2D_BGND_SetMemAddr() for background layer. */
NYX 0:85b3fd62ea1a 166
NYX 0:85b3fd62ea1a 167 uint32_t LineOffset; /*!< Specifies the foreground or background line offset value.
NYX 0:85b3fd62ea1a 168 - This parameter must be a number between Min_Data = 0x0000 and Max_Data = 0x3FFF.
NYX 0:85b3fd62ea1a 169
NYX 0:85b3fd62ea1a 170 This parameter can be modified afterwards using unitary functions
NYX 0:85b3fd62ea1a 171 - @ref LL_DMA2D_FGND_SetLineOffset() for foreground layer,
NYX 0:85b3fd62ea1a 172 - @ref LL_DMA2D_BGND_SetLineOffset() for background layer. */
NYX 0:85b3fd62ea1a 173
NYX 0:85b3fd62ea1a 174 uint32_t ColorMode; /*!< Specifies the foreground or background color mode.
NYX 0:85b3fd62ea1a 175 - This parameter can be one value of @ref DMA2D_LL_EC_INPUT_COLOR_MODE.
NYX 0:85b3fd62ea1a 176
NYX 0:85b3fd62ea1a 177 This parameter can be modified afterwards using unitary functions
NYX 0:85b3fd62ea1a 178 - @ref LL_DMA2D_FGND_SetColorMode() for foreground layer,
NYX 0:85b3fd62ea1a 179 - @ref LL_DMA2D_BGND_SetColorMode() for background layer. */
NYX 0:85b3fd62ea1a 180
NYX 0:85b3fd62ea1a 181 uint32_t CLUTColorMode; /*!< Specifies the foreground or background CLUT color mode.
NYX 0:85b3fd62ea1a 182 - This parameter can be one value of @ref DMA2D_LL_EC_CLUT_COLOR_MODE.
NYX 0:85b3fd62ea1a 183
NYX 0:85b3fd62ea1a 184 This parameter can be modified afterwards using unitary functions
NYX 0:85b3fd62ea1a 185 - @ref LL_DMA2D_FGND_SetCLUTColorMode() for foreground layer,
NYX 0:85b3fd62ea1a 186 - @ref LL_DMA2D_BGND_SetCLUTColorMode() for background layer. */
NYX 0:85b3fd62ea1a 187
NYX 0:85b3fd62ea1a 188 uint32_t CLUTSize; /*!< Specifies the foreground or background CLUT size.
NYX 0:85b3fd62ea1a 189 - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF.
NYX 0:85b3fd62ea1a 190
NYX 0:85b3fd62ea1a 191 This parameter can be modified afterwards using unitary functions
NYX 0:85b3fd62ea1a 192 - @ref LL_DMA2D_FGND_SetCLUTSize() for foreground layer,
NYX 0:85b3fd62ea1a 193 - @ref LL_DMA2D_BGND_SetCLUTSize() for background layer. */
NYX 0:85b3fd62ea1a 194
NYX 0:85b3fd62ea1a 195 uint32_t AlphaMode; /*!< Specifies the foreground or background alpha mode.
NYX 0:85b3fd62ea1a 196 - This parameter can be one value of @ref DMA2D_LL_EC_ALPHA_MODE.
NYX 0:85b3fd62ea1a 197
NYX 0:85b3fd62ea1a 198 This parameter can be modified afterwards using unitary functions
NYX 0:85b3fd62ea1a 199 - @ref LL_DMA2D_FGND_SetAlphaMode() for foreground layer,
NYX 0:85b3fd62ea1a 200 - @ref LL_DMA2D_BGND_SetAlphaMode() for background layer. */
NYX 0:85b3fd62ea1a 201
NYX 0:85b3fd62ea1a 202 uint32_t Alpha; /*!< Specifies the foreground or background Alpha value.
NYX 0:85b3fd62ea1a 203 - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF.
NYX 0:85b3fd62ea1a 204
NYX 0:85b3fd62ea1a 205 This parameter can be modified afterwards using unitary functions
NYX 0:85b3fd62ea1a 206 - @ref LL_DMA2D_FGND_SetAlpha() for foreground layer,
NYX 0:85b3fd62ea1a 207 - @ref LL_DMA2D_BGND_SetAlpha() for background layer. */
NYX 0:85b3fd62ea1a 208
NYX 0:85b3fd62ea1a 209 uint32_t Blue; /*!< Specifies the foreground or background Blue color value.
NYX 0:85b3fd62ea1a 210 - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF.
NYX 0:85b3fd62ea1a 211
NYX 0:85b3fd62ea1a 212 This parameter can be modified afterwards using unitary functions
NYX 0:85b3fd62ea1a 213 - @ref LL_DMA2D_FGND_SetBlueColor() for foreground layer,
NYX 0:85b3fd62ea1a 214 - @ref LL_DMA2D_BGND_SetBlueColor() for background layer. */
NYX 0:85b3fd62ea1a 215
NYX 0:85b3fd62ea1a 216 uint32_t Green; /*!< Specifies the foreground or background Green color value.
NYX 0:85b3fd62ea1a 217 - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF.
NYX 0:85b3fd62ea1a 218
NYX 0:85b3fd62ea1a 219 This parameter can be modified afterwards using unitary functions
NYX 0:85b3fd62ea1a 220 - @ref LL_DMA2D_FGND_SetGreenColor() for foreground layer,
NYX 0:85b3fd62ea1a 221 - @ref LL_DMA2D_BGND_SetGreenColor() for background layer. */
NYX 0:85b3fd62ea1a 222
NYX 0:85b3fd62ea1a 223 uint32_t Red; /*!< Specifies the foreground or background Red color value.
NYX 0:85b3fd62ea1a 224 - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF.
NYX 0:85b3fd62ea1a 225
NYX 0:85b3fd62ea1a 226 This parameter can be modified afterwards using unitary functions
NYX 0:85b3fd62ea1a 227 - @ref LL_DMA2D_FGND_SetRedColor() for foreground layer,
NYX 0:85b3fd62ea1a 228 - @ref LL_DMA2D_BGND_SetRedColor() for background layer. */
NYX 0:85b3fd62ea1a 229
NYX 0:85b3fd62ea1a 230 uint32_t CLUTMemoryAddress; /*!< Specifies the foreground or background CLUT memory address.
NYX 0:85b3fd62ea1a 231 - This parameter must be a number between Min_Data = 0x0000 and Max_Data = 0xFFFFFFFF.
NYX 0:85b3fd62ea1a 232
NYX 0:85b3fd62ea1a 233 This parameter can be modified afterwards using unitary functions
NYX 0:85b3fd62ea1a 234 - @ref LL_DMA2D_FGND_SetCLUTMemAddr() for foreground layer,
NYX 0:85b3fd62ea1a 235 - @ref LL_DMA2D_BGND_SetCLUTMemAddr() for background layer. */
NYX 0:85b3fd62ea1a 236
NYX 0:85b3fd62ea1a 237 } LL_DMA2D_LayerCfgTypeDef;
NYX 0:85b3fd62ea1a 238
NYX 0:85b3fd62ea1a 239 /**
NYX 0:85b3fd62ea1a 240 * @brief LL DMA2D Output Color Structure Definition
NYX 0:85b3fd62ea1a 241 */
NYX 0:85b3fd62ea1a 242 typedef struct
NYX 0:85b3fd62ea1a 243 {
NYX 0:85b3fd62ea1a 244 uint32_t ColorMode; /*!< Specifies the color format of the output image.
NYX 0:85b3fd62ea1a 245 - This parameter can be one value of @ref DMA2D_LL_EC_OUTPUT_COLOR_MODE.
NYX 0:85b3fd62ea1a 246
NYX 0:85b3fd62ea1a 247 This parameter can be modified afterwards using unitary function @ref LL_DMA2D_SetOutputColorMode(). */
NYX 0:85b3fd62ea1a 248
NYX 0:85b3fd62ea1a 249 uint32_t OutputBlue; /*!< Specifies the Blue value of the output image.
NYX 0:85b3fd62ea1a 250 - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF if ARGB8888 color mode is selected.
NYX 0:85b3fd62ea1a 251 - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF if RGB888 color mode is selected.
NYX 0:85b3fd62ea1a 252 - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0x1F if RGB565 color mode is selected.
NYX 0:85b3fd62ea1a 253 - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0x1F if ARGB1555 color mode is selected.
NYX 0:85b3fd62ea1a 254 - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0x0F if ARGB4444 color mode is selected.
NYX 0:85b3fd62ea1a 255
NYX 0:85b3fd62ea1a 256 This parameter can be modified afterwards using unitary function @ref LL_DMA2D_SetOutputColor() or configuration
NYX 0:85b3fd62ea1a 257 function @ref LL_DMA2D_ConfigOutputColor(). */
NYX 0:85b3fd62ea1a 258
NYX 0:85b3fd62ea1a 259 uint32_t OutputGreen; /*!< Specifies the Green value of the output image.
NYX 0:85b3fd62ea1a 260 - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF if ARGB8888 color mode is selected.
NYX 0:85b3fd62ea1a 261 - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF if RGB888 color mode is selected.
NYX 0:85b3fd62ea1a 262 - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0x3F if RGB565 color mode is selected.
NYX 0:85b3fd62ea1a 263 - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0x1F if ARGB1555 color mode is selected.
NYX 0:85b3fd62ea1a 264 - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0x0F if ARGB4444 color mode is selected.
NYX 0:85b3fd62ea1a 265
NYX 0:85b3fd62ea1a 266 This parameter can be modified afterwards using unitary function @ref LL_DMA2D_SetOutputColor() or configuration
NYX 0:85b3fd62ea1a 267 function @ref LL_DMA2D_ConfigOutputColor(). */
NYX 0:85b3fd62ea1a 268
NYX 0:85b3fd62ea1a 269 uint32_t OutputRed; /*!< Specifies the Red value of the output image.
NYX 0:85b3fd62ea1a 270 - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF if ARGB8888 color mode is selected.
NYX 0:85b3fd62ea1a 271 - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF if RGB888 color mode is selected.
NYX 0:85b3fd62ea1a 272 - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0x1F if RGB565 color mode is selected.
NYX 0:85b3fd62ea1a 273 - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0x1F if ARGB1555 color mode is selected.
NYX 0:85b3fd62ea1a 274 - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0x0F if ARGB4444 color mode is selected.
NYX 0:85b3fd62ea1a 275
NYX 0:85b3fd62ea1a 276 This parameter can be modified afterwards using unitary function @ref LL_DMA2D_SetOutputColor() or configuration
NYX 0:85b3fd62ea1a 277 function @ref LL_DMA2D_ConfigOutputColor(). */
NYX 0:85b3fd62ea1a 278
NYX 0:85b3fd62ea1a 279 uint32_t OutputAlpha; /*!< Specifies the Alpha channel of the output image.
NYX 0:85b3fd62ea1a 280 - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF if ARGB8888 color mode is selected.
NYX 0:85b3fd62ea1a 281 - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0x01 if ARGB1555 color mode is selected.
NYX 0:85b3fd62ea1a 282 - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0x0F if ARGB4444 color mode is selected.
NYX 0:85b3fd62ea1a 283 - This parameter is not considered if RGB888 or RGB565 color mode is selected.
NYX 0:85b3fd62ea1a 284
NYX 0:85b3fd62ea1a 285 This parameter can be modified afterwards using unitary function @ref LL_DMA2D_SetOutputColor() or configuration
NYX 0:85b3fd62ea1a 286 function @ref LL_DMA2D_ConfigOutputColor(). */
NYX 0:85b3fd62ea1a 287
NYX 0:85b3fd62ea1a 288 } LL_DMA2D_ColorTypeDef;
NYX 0:85b3fd62ea1a 289
NYX 0:85b3fd62ea1a 290 /**
NYX 0:85b3fd62ea1a 291 * @}
NYX 0:85b3fd62ea1a 292 */
NYX 0:85b3fd62ea1a 293 #endif /* USE_FULL_LL_DRIVER */
NYX 0:85b3fd62ea1a 294
NYX 0:85b3fd62ea1a 295 /* Exported constants --------------------------------------------------------*/
NYX 0:85b3fd62ea1a 296 /** @defgroup DMA2D_LL_Exported_Constants DMA2D Exported Constants
NYX 0:85b3fd62ea1a 297 * @{
NYX 0:85b3fd62ea1a 298 */
NYX 0:85b3fd62ea1a 299
NYX 0:85b3fd62ea1a 300 /** @defgroup DMA2D_LL_EC_GET_FLAG Get Flags Defines
NYX 0:85b3fd62ea1a 301 * @brief Flags defines which can be used with LL_DMA2D_ReadReg function
NYX 0:85b3fd62ea1a 302 * @{
NYX 0:85b3fd62ea1a 303 */
NYX 0:85b3fd62ea1a 304 #define LL_DMA2D_FLAG_CEIF DMA2D_ISR_CEIF /*!< Configuration Error Interrupt Flag */
NYX 0:85b3fd62ea1a 305 #define LL_DMA2D_FLAG_CTCIF DMA2D_ISR_CTCIF /*!< CLUT Transfer Complete Interrupt Flag */
NYX 0:85b3fd62ea1a 306 #define LL_DMA2D_FLAG_CAEIF DMA2D_ISR_CAEIF /*!< CLUT Access Error Interrupt Flag */
NYX 0:85b3fd62ea1a 307 #define LL_DMA2D_FLAG_TWIF DMA2D_ISR_TWIF /*!< Transfer Watermark Interrupt Flag */
NYX 0:85b3fd62ea1a 308 #define LL_DMA2D_FLAG_TCIF DMA2D_ISR_TCIF /*!< Transfer Complete Interrupt Flag */
NYX 0:85b3fd62ea1a 309 #define LL_DMA2D_FLAG_TEIF DMA2D_ISR_TEIF /*!< Transfer Error Interrupt Flag */
NYX 0:85b3fd62ea1a 310 /**
NYX 0:85b3fd62ea1a 311 * @}
NYX 0:85b3fd62ea1a 312 */
NYX 0:85b3fd62ea1a 313
NYX 0:85b3fd62ea1a 314 /** @defgroup DMA2D_LL_EC_IT IT Defines
NYX 0:85b3fd62ea1a 315 * @brief IT defines which can be used with LL_DMA2D_ReadReg and LL_DMA2D_WriteReg functions
NYX 0:85b3fd62ea1a 316 * @{
NYX 0:85b3fd62ea1a 317 */
NYX 0:85b3fd62ea1a 318 #define LL_DMA2D_IT_CEIE DMA2D_CR_CEIE /*!< Configuration Error Interrupt */
NYX 0:85b3fd62ea1a 319 #define LL_DMA2D_IT_CTCIE DMA2D_CR_CTCIE /*!< CLUT Transfer Complete Interrupt */
NYX 0:85b3fd62ea1a 320 #define LL_DMA2D_IT_CAEIE DMA2D_CR_CAEIE /*!< CLUT Access Error Interrupt */
NYX 0:85b3fd62ea1a 321 #define LL_DMA2D_IT_TWIE DMA2D_CR_TWIE /*!< Transfer Watermark Interrupt */
NYX 0:85b3fd62ea1a 322 #define LL_DMA2D_IT_TCIE DMA2D_CR_TCIE /*!< Transfer Complete Interrupt */
NYX 0:85b3fd62ea1a 323 #define LL_DMA2D_IT_TEIE DMA2D_CR_TEIE /*!< Transfer Error Interrupt */
NYX 0:85b3fd62ea1a 324 /**
NYX 0:85b3fd62ea1a 325 * @}
NYX 0:85b3fd62ea1a 326 */
NYX 0:85b3fd62ea1a 327
NYX 0:85b3fd62ea1a 328 /** @defgroup DMA2D_LL_EC_MODE Mode
NYX 0:85b3fd62ea1a 329 * @{
NYX 0:85b3fd62ea1a 330 */
NYX 0:85b3fd62ea1a 331 #define LL_DMA2D_MODE_M2M 0x00000000U /*!< DMA2D memory to memory transfer mode */
NYX 0:85b3fd62ea1a 332 #define LL_DMA2D_MODE_M2M_PFC DMA2D_CR_MODE_0 /*!< DMA2D memory to memory with pixel format conversion transfer mode */
NYX 0:85b3fd62ea1a 333 #define LL_DMA2D_MODE_M2M_BLEND DMA2D_CR_MODE_1 /*!< DMA2D memory to memory with blending transfer mode */
NYX 0:85b3fd62ea1a 334 #define LL_DMA2D_MODE_R2M DMA2D_CR_MODE /*!< DMA2D register to memory transfer mode */
NYX 0:85b3fd62ea1a 335 /**
NYX 0:85b3fd62ea1a 336 * @}
NYX 0:85b3fd62ea1a 337 */
NYX 0:85b3fd62ea1a 338
NYX 0:85b3fd62ea1a 339 /** @defgroup DMA2D_LL_EC_OUTPUT_COLOR_MODE Output Color Mode
NYX 0:85b3fd62ea1a 340 * @{
NYX 0:85b3fd62ea1a 341 */
NYX 0:85b3fd62ea1a 342 #define LL_DMA2D_OUTPUT_MODE_ARGB8888 0x00000000U /*!< ARGB8888 */
NYX 0:85b3fd62ea1a 343 #define LL_DMA2D_OUTPUT_MODE_RGB888 DMA2D_OPFCCR_CM_0 /*!< RGB888 */
NYX 0:85b3fd62ea1a 344 #define LL_DMA2D_OUTPUT_MODE_RGB565 DMA2D_OPFCCR_CM_1 /*!< RGB565 */
NYX 0:85b3fd62ea1a 345 #define LL_DMA2D_OUTPUT_MODE_ARGB1555 (DMA2D_OPFCCR_CM_0|DMA2D_OPFCCR_CM_1) /*!< ARGB1555 */
NYX 0:85b3fd62ea1a 346 #define LL_DMA2D_OUTPUT_MODE_ARGB4444 DMA2D_OPFCCR_CM_2 /*!< ARGB4444 */
NYX 0:85b3fd62ea1a 347 /**
NYX 0:85b3fd62ea1a 348 * @}
NYX 0:85b3fd62ea1a 349 */
NYX 0:85b3fd62ea1a 350
NYX 0:85b3fd62ea1a 351 /** @defgroup DMA2D_LL_EC_INPUT_COLOR_MODE Input Color Mode
NYX 0:85b3fd62ea1a 352 * @{
NYX 0:85b3fd62ea1a 353 */
NYX 0:85b3fd62ea1a 354 #define LL_DMA2D_INPUT_MODE_ARGB8888 0x00000000U /*!< ARGB8888 */
NYX 0:85b3fd62ea1a 355 #define LL_DMA2D_INPUT_MODE_RGB888 DMA2D_FGPFCCR_CM_0 /*!< RGB888 */
NYX 0:85b3fd62ea1a 356 #define LL_DMA2D_INPUT_MODE_RGB565 DMA2D_FGPFCCR_CM_1 /*!< RGB565 */
NYX 0:85b3fd62ea1a 357 #define LL_DMA2D_INPUT_MODE_ARGB1555 (DMA2D_FGPFCCR_CM_0|DMA2D_FGPFCCR_CM_1) /*!< ARGB1555 */
NYX 0:85b3fd62ea1a 358 #define LL_DMA2D_INPUT_MODE_ARGB4444 DMA2D_FGPFCCR_CM_2 /*!< ARGB4444 */
NYX 0:85b3fd62ea1a 359 #define LL_DMA2D_INPUT_MODE_L8 (DMA2D_FGPFCCR_CM_0|DMA2D_FGPFCCR_CM_2) /*!< L8 */
NYX 0:85b3fd62ea1a 360 #define LL_DMA2D_INPUT_MODE_AL44 (DMA2D_FGPFCCR_CM_1|DMA2D_FGPFCCR_CM_2) /*!< AL44 */
NYX 0:85b3fd62ea1a 361 #define LL_DMA2D_INPUT_MODE_AL88 (DMA2D_FGPFCCR_CM_0|DMA2D_FGPFCCR_CM_1|DMA2D_FGPFCCR_CM_2) /*!< AL88 */
NYX 0:85b3fd62ea1a 362 #define LL_DMA2D_INPUT_MODE_L4 DMA2D_FGPFCCR_CM_3 /*!< L4 */
NYX 0:85b3fd62ea1a 363 #define LL_DMA2D_INPUT_MODE_A8 (DMA2D_FGPFCCR_CM_0|DMA2D_FGPFCCR_CM_3) /*!< A8 */
NYX 0:85b3fd62ea1a 364 #define LL_DMA2D_INPUT_MODE_A4 (DMA2D_FGPFCCR_CM_1|DMA2D_FGPFCCR_CM_3) /*!< A4 */
NYX 0:85b3fd62ea1a 365 /**
NYX 0:85b3fd62ea1a 366 * @}
NYX 0:85b3fd62ea1a 367 */
NYX 0:85b3fd62ea1a 368
NYX 0:85b3fd62ea1a 369 /** @defgroup DMA2D_LL_EC_ALPHA_MODE Alpha Mode
NYX 0:85b3fd62ea1a 370 * @{
NYX 0:85b3fd62ea1a 371 */
NYX 0:85b3fd62ea1a 372 #define LL_DMA2D_ALPHA_MODE_NO_MODIF 0x00000000U /*!< No modification of the alpha channel value */
NYX 0:85b3fd62ea1a 373 #define LL_DMA2D_ALPHA_MODE_REPLACE DMA2D_FGPFCCR_AM_0 /*!< Replace original alpha channel value by programmed alpha value */
NYX 0:85b3fd62ea1a 374 #define LL_DMA2D_ALPHA_MODE_COMBINE DMA2D_FGPFCCR_AM_1 /*!< Replace original alpha channel value by programmed alpha value
NYX 0:85b3fd62ea1a 375 with original alpha channel value */
NYX 0:85b3fd62ea1a 376 /**
NYX 0:85b3fd62ea1a 377 * @}
NYX 0:85b3fd62ea1a 378 */
NYX 0:85b3fd62ea1a 379
NYX 0:85b3fd62ea1a 380 /** @defgroup DMA2D_LL_EC_CLUT_COLOR_MODE CLUT Color Mode
NYX 0:85b3fd62ea1a 381 * @{
NYX 0:85b3fd62ea1a 382 */
NYX 0:85b3fd62ea1a 383 #define LL_DMA2D_CLUT_COLOR_MODE_ARGB8888 0x00000000U /*!< ARGB8888 */
NYX 0:85b3fd62ea1a 384 #define LL_DMA2D_CLUT_COLOR_MODE_RGB888 DMA2D_FGPFCCR_CCM /*!< RGB888 */
NYX 0:85b3fd62ea1a 385 /**
NYX 0:85b3fd62ea1a 386 * @}
NYX 0:85b3fd62ea1a 387 */
NYX 0:85b3fd62ea1a 388
NYX 0:85b3fd62ea1a 389 /**
NYX 0:85b3fd62ea1a 390 * @}
NYX 0:85b3fd62ea1a 391 */
NYX 0:85b3fd62ea1a 392
NYX 0:85b3fd62ea1a 393 /* Exported macro ------------------------------------------------------------*/
NYX 0:85b3fd62ea1a 394 /** @defgroup DMA2D_LL_Exported_Macros DMA2D Exported Macros
NYX 0:85b3fd62ea1a 395 * @{
NYX 0:85b3fd62ea1a 396 */
NYX 0:85b3fd62ea1a 397
NYX 0:85b3fd62ea1a 398 /** @defgroup DMA2D_LL_EM_WRITE_READ Common Write and read registers Macros
NYX 0:85b3fd62ea1a 399 * @{
NYX 0:85b3fd62ea1a 400 */
NYX 0:85b3fd62ea1a 401
NYX 0:85b3fd62ea1a 402 /**
NYX 0:85b3fd62ea1a 403 * @brief Write a value in DMA2D register.
NYX 0:85b3fd62ea1a 404 * @param __INSTANCE__ DMA2D Instance
NYX 0:85b3fd62ea1a 405 * @param __REG__ Register to be written
NYX 0:85b3fd62ea1a 406 * @param __VALUE__ Value to be written in the register
NYX 0:85b3fd62ea1a 407 * @retval None
NYX 0:85b3fd62ea1a 408 */
NYX 0:85b3fd62ea1a 409 #define LL_DMA2D_WriteReg(__INSTANCE__, __REG__, __VALUE__) WRITE_REG(__INSTANCE__->__REG__, (__VALUE__))
NYX 0:85b3fd62ea1a 410
NYX 0:85b3fd62ea1a 411 /**
NYX 0:85b3fd62ea1a 412 * @brief Read a value in DMA2D register.
NYX 0:85b3fd62ea1a 413 * @param __INSTANCE__ DMA2D Instance
NYX 0:85b3fd62ea1a 414 * @param __REG__ Register to be read
NYX 0:85b3fd62ea1a 415 * @retval Register value
NYX 0:85b3fd62ea1a 416 */
NYX 0:85b3fd62ea1a 417 #define LL_DMA2D_ReadReg(__INSTANCE__, __REG__) READ_REG(__INSTANCE__->__REG__)
NYX 0:85b3fd62ea1a 418 /**
NYX 0:85b3fd62ea1a 419 * @}
NYX 0:85b3fd62ea1a 420 */
NYX 0:85b3fd62ea1a 421
NYX 0:85b3fd62ea1a 422 /**
NYX 0:85b3fd62ea1a 423 * @}
NYX 0:85b3fd62ea1a 424 */
NYX 0:85b3fd62ea1a 425
NYX 0:85b3fd62ea1a 426 /* Exported functions --------------------------------------------------------*/
NYX 0:85b3fd62ea1a 427 /** @defgroup DMA2D_LL_Exported_Functions DMA2D Exported Functions
NYX 0:85b3fd62ea1a 428 * @{
NYX 0:85b3fd62ea1a 429 */
NYX 0:85b3fd62ea1a 430
NYX 0:85b3fd62ea1a 431 /** @defgroup DMA2D_LL_EF_Configuration Configuration Functions
NYX 0:85b3fd62ea1a 432 * @{
NYX 0:85b3fd62ea1a 433 */
NYX 0:85b3fd62ea1a 434
NYX 0:85b3fd62ea1a 435 /**
NYX 0:85b3fd62ea1a 436 * @brief Start a DMA2D transfer.
NYX 0:85b3fd62ea1a 437 * @rmtoll CR START LL_DMA2D_Start
NYX 0:85b3fd62ea1a 438 * @param DMA2Dx DMA2D Instance
NYX 0:85b3fd62ea1a 439 * @retval None
NYX 0:85b3fd62ea1a 440 */
NYX 0:85b3fd62ea1a 441 __STATIC_INLINE void LL_DMA2D_Start(DMA2D_TypeDef *DMA2Dx)
NYX 0:85b3fd62ea1a 442 {
NYX 0:85b3fd62ea1a 443 SET_BIT(DMA2Dx->CR, DMA2D_CR_START);
NYX 0:85b3fd62ea1a 444 }
NYX 0:85b3fd62ea1a 445
NYX 0:85b3fd62ea1a 446 /**
NYX 0:85b3fd62ea1a 447 * @brief Indicate if a DMA2D transfer is ongoing.
NYX 0:85b3fd62ea1a 448 * @rmtoll CR START LL_DMA2D_IsTransferOngoing
NYX 0:85b3fd62ea1a 449 * @param DMA2Dx DMA2D Instance
NYX 0:85b3fd62ea1a 450 * @retval State of bit (1 or 0).
NYX 0:85b3fd62ea1a 451 */
NYX 0:85b3fd62ea1a 452 __STATIC_INLINE uint32_t LL_DMA2D_IsTransferOngoing(DMA2D_TypeDef *DMA2Dx)
NYX 0:85b3fd62ea1a 453 {
NYX 0:85b3fd62ea1a 454 return (READ_BIT(DMA2Dx->CR, DMA2D_CR_START) == (DMA2D_CR_START));
NYX 0:85b3fd62ea1a 455 }
NYX 0:85b3fd62ea1a 456
NYX 0:85b3fd62ea1a 457 /**
NYX 0:85b3fd62ea1a 458 * @brief Suspend DMA2D transfer.
NYX 0:85b3fd62ea1a 459 * @note This API can be used to suspend automatic foreground or background CLUT loading.
NYX 0:85b3fd62ea1a 460 * @rmtoll CR SUSP LL_DMA2D_Suspend
NYX 0:85b3fd62ea1a 461 * @param DMA2Dx DMA2D Instance
NYX 0:85b3fd62ea1a 462 * @retval None
NYX 0:85b3fd62ea1a 463 */
NYX 0:85b3fd62ea1a 464 __STATIC_INLINE void LL_DMA2D_Suspend(DMA2D_TypeDef *DMA2Dx)
NYX 0:85b3fd62ea1a 465 {
NYX 0:85b3fd62ea1a 466 MODIFY_REG(DMA2Dx->CR, DMA2D_CR_SUSP | DMA2D_CR_START, DMA2D_CR_SUSP);
NYX 0:85b3fd62ea1a 467 }
NYX 0:85b3fd62ea1a 468
NYX 0:85b3fd62ea1a 469 /**
NYX 0:85b3fd62ea1a 470 * @brief Resume DMA2D transfer.
NYX 0:85b3fd62ea1a 471 * @note This API can be used to resume automatic foreground or background CLUT loading.
NYX 0:85b3fd62ea1a 472 * @rmtoll CR SUSP LL_DMA2D_Resume
NYX 0:85b3fd62ea1a 473 * @param DMA2Dx DMA2D Instance
NYX 0:85b3fd62ea1a 474 * @retval None
NYX 0:85b3fd62ea1a 475 */
NYX 0:85b3fd62ea1a 476 __STATIC_INLINE void LL_DMA2D_Resume(DMA2D_TypeDef *DMA2Dx)
NYX 0:85b3fd62ea1a 477 {
NYX 0:85b3fd62ea1a 478 CLEAR_BIT(DMA2Dx->CR, DMA2D_CR_SUSP | DMA2D_CR_START);
NYX 0:85b3fd62ea1a 479 }
NYX 0:85b3fd62ea1a 480
NYX 0:85b3fd62ea1a 481 /**
NYX 0:85b3fd62ea1a 482 * @brief Indicate if DMA2D transfer is suspended.
NYX 0:85b3fd62ea1a 483 * @note This API can be used to indicate whether or not automatic foreground or
NYX 0:85b3fd62ea1a 484 * background CLUT loading is suspended.
NYX 0:85b3fd62ea1a 485 * @rmtoll CR SUSP LL_DMA2D_IsSuspended
NYX 0:85b3fd62ea1a 486 * @param DMA2Dx DMA2D Instance
NYX 0:85b3fd62ea1a 487 * @retval State of bit (1 or 0).
NYX 0:85b3fd62ea1a 488 */
NYX 0:85b3fd62ea1a 489 __STATIC_INLINE uint32_t LL_DMA2D_IsSuspended(DMA2D_TypeDef *DMA2Dx)
NYX 0:85b3fd62ea1a 490 {
NYX 0:85b3fd62ea1a 491 return (READ_BIT(DMA2Dx->CR, DMA2D_CR_SUSP) == (DMA2D_CR_SUSP));
NYX 0:85b3fd62ea1a 492 }
NYX 0:85b3fd62ea1a 493
NYX 0:85b3fd62ea1a 494 /**
NYX 0:85b3fd62ea1a 495 * @brief Abort DMA2D transfer.
NYX 0:85b3fd62ea1a 496 * @note This API can be used to abort automatic foreground or background CLUT loading.
NYX 0:85b3fd62ea1a 497 * @rmtoll CR ABORT LL_DMA2D_Abort
NYX 0:85b3fd62ea1a 498 * @param DMA2Dx DMA2D Instance
NYX 0:85b3fd62ea1a 499 * @retval None
NYX 0:85b3fd62ea1a 500 */
NYX 0:85b3fd62ea1a 501 __STATIC_INLINE void LL_DMA2D_Abort(DMA2D_TypeDef *DMA2Dx)
NYX 0:85b3fd62ea1a 502 {
NYX 0:85b3fd62ea1a 503 MODIFY_REG(DMA2Dx->CR, DMA2D_CR_ABORT | DMA2D_CR_START, DMA2D_CR_ABORT);
NYX 0:85b3fd62ea1a 504 }
NYX 0:85b3fd62ea1a 505
NYX 0:85b3fd62ea1a 506 /**
NYX 0:85b3fd62ea1a 507 * @brief Indicate if DMA2D transfer is aborted.
NYX 0:85b3fd62ea1a 508 * @note This API can be used to indicate whether or not automatic foreground or
NYX 0:85b3fd62ea1a 509 * background CLUT loading is aborted.
NYX 0:85b3fd62ea1a 510 * @rmtoll CR ABORT LL_DMA2D_IsAborted
NYX 0:85b3fd62ea1a 511 * @param DMA2Dx DMA2D Instance
NYX 0:85b3fd62ea1a 512 * @retval State of bit (1 or 0).
NYX 0:85b3fd62ea1a 513 */
NYX 0:85b3fd62ea1a 514 __STATIC_INLINE uint32_t LL_DMA2D_IsAborted(DMA2D_TypeDef *DMA2Dx)
NYX 0:85b3fd62ea1a 515 {
NYX 0:85b3fd62ea1a 516 return (READ_BIT(DMA2Dx->CR, DMA2D_CR_ABORT) == (DMA2D_CR_ABORT));
NYX 0:85b3fd62ea1a 517 }
NYX 0:85b3fd62ea1a 518
NYX 0:85b3fd62ea1a 519 /**
NYX 0:85b3fd62ea1a 520 * @brief Set DMA2D mode.
NYX 0:85b3fd62ea1a 521 * @rmtoll CR MODE LL_DMA2D_SetMode
NYX 0:85b3fd62ea1a 522 * @param DMA2Dx DMA2D Instance
NYX 0:85b3fd62ea1a 523 * @param Mode This parameter can be one of the following values:
NYX 0:85b3fd62ea1a 524 * @arg @ref LL_DMA2D_MODE_M2M
NYX 0:85b3fd62ea1a 525 * @arg @ref LL_DMA2D_MODE_M2M_PFC
NYX 0:85b3fd62ea1a 526 * @arg @ref LL_DMA2D_MODE_M2M_BLEND
NYX 0:85b3fd62ea1a 527 * @arg @ref LL_DMA2D_MODE_R2M
NYX 0:85b3fd62ea1a 528 * @retval None
NYX 0:85b3fd62ea1a 529 */
NYX 0:85b3fd62ea1a 530 __STATIC_INLINE void LL_DMA2D_SetMode(DMA2D_TypeDef *DMA2Dx, uint32_t Mode)
NYX 0:85b3fd62ea1a 531 {
NYX 0:85b3fd62ea1a 532 MODIFY_REG(DMA2Dx->CR, DMA2D_CR_MODE, Mode);
NYX 0:85b3fd62ea1a 533 }
NYX 0:85b3fd62ea1a 534
NYX 0:85b3fd62ea1a 535 /**
NYX 0:85b3fd62ea1a 536 * @brief Return DMA2D mode
NYX 0:85b3fd62ea1a 537 * @rmtoll CR MODE LL_DMA2D_GetMode
NYX 0:85b3fd62ea1a 538 * @param DMA2Dx DMA2D Instance
NYX 0:85b3fd62ea1a 539 * @retval Returned value can be one of the following values:
NYX 0:85b3fd62ea1a 540 * @arg @ref LL_DMA2D_MODE_M2M
NYX 0:85b3fd62ea1a 541 * @arg @ref LL_DMA2D_MODE_M2M_PFC
NYX 0:85b3fd62ea1a 542 * @arg @ref LL_DMA2D_MODE_M2M_BLEND
NYX 0:85b3fd62ea1a 543 * @arg @ref LL_DMA2D_MODE_R2M
NYX 0:85b3fd62ea1a 544 */
NYX 0:85b3fd62ea1a 545 __STATIC_INLINE uint32_t LL_DMA2D_GetMode(DMA2D_TypeDef *DMA2Dx)
NYX 0:85b3fd62ea1a 546 {
NYX 0:85b3fd62ea1a 547 return (uint32_t)(READ_BIT(DMA2Dx->CR, DMA2D_CR_MODE));
NYX 0:85b3fd62ea1a 548 }
NYX 0:85b3fd62ea1a 549
NYX 0:85b3fd62ea1a 550 /**
NYX 0:85b3fd62ea1a 551 * @brief Set DMA2D output color mode.
NYX 0:85b3fd62ea1a 552 * @rmtoll OPFCCR CM LL_DMA2D_SetOutputColorMode
NYX 0:85b3fd62ea1a 553 * @param DMA2Dx DMA2D Instance
NYX 0:85b3fd62ea1a 554 * @param ColorMode This parameter can be one of the following values:
NYX 0:85b3fd62ea1a 555 * @arg @ref LL_DMA2D_OUTPUT_MODE_ARGB8888
NYX 0:85b3fd62ea1a 556 * @arg @ref LL_DMA2D_OUTPUT_MODE_RGB888
NYX 0:85b3fd62ea1a 557 * @arg @ref LL_DMA2D_OUTPUT_MODE_RGB565
NYX 0:85b3fd62ea1a 558 * @arg @ref LL_DMA2D_OUTPUT_MODE_ARGB1555
NYX 0:85b3fd62ea1a 559 * @arg @ref LL_DMA2D_OUTPUT_MODE_ARGB4444
NYX 0:85b3fd62ea1a 560 * @retval None
NYX 0:85b3fd62ea1a 561 */
NYX 0:85b3fd62ea1a 562 __STATIC_INLINE void LL_DMA2D_SetOutputColorMode(DMA2D_TypeDef *DMA2Dx, uint32_t ColorMode)
NYX 0:85b3fd62ea1a 563 {
NYX 0:85b3fd62ea1a 564 MODIFY_REG(DMA2Dx->OPFCCR, DMA2D_OPFCCR_CM, ColorMode);
NYX 0:85b3fd62ea1a 565 }
NYX 0:85b3fd62ea1a 566
NYX 0:85b3fd62ea1a 567 /**
NYX 0:85b3fd62ea1a 568 * @brief Return DMA2D output color mode.
NYX 0:85b3fd62ea1a 569 * @rmtoll OPFCCR CM LL_DMA2D_GetOutputColorMode
NYX 0:85b3fd62ea1a 570 * @param DMA2Dx DMA2D Instance
NYX 0:85b3fd62ea1a 571 * @retval Returned value can be one of the following values:
NYX 0:85b3fd62ea1a 572 * @arg @ref LL_DMA2D_OUTPUT_MODE_ARGB8888
NYX 0:85b3fd62ea1a 573 * @arg @ref LL_DMA2D_OUTPUT_MODE_RGB888
NYX 0:85b3fd62ea1a 574 * @arg @ref LL_DMA2D_OUTPUT_MODE_RGB565
NYX 0:85b3fd62ea1a 575 * @arg @ref LL_DMA2D_OUTPUT_MODE_ARGB1555
NYX 0:85b3fd62ea1a 576 * @arg @ref LL_DMA2D_OUTPUT_MODE_ARGB4444
NYX 0:85b3fd62ea1a 577 */
NYX 0:85b3fd62ea1a 578 __STATIC_INLINE uint32_t LL_DMA2D_GetOutputColorMode(DMA2D_TypeDef *DMA2Dx)
NYX 0:85b3fd62ea1a 579 {
NYX 0:85b3fd62ea1a 580 return (uint32_t)(READ_BIT(DMA2Dx->OPFCCR, DMA2D_OPFCCR_CM));
NYX 0:85b3fd62ea1a 581 }
NYX 0:85b3fd62ea1a 582
NYX 0:85b3fd62ea1a 583 /**
NYX 0:85b3fd62ea1a 584 * @brief Set DMA2D line offset, expressed on 14 bits ([13:0] bits).
NYX 0:85b3fd62ea1a 585 * @rmtoll OOR LO LL_DMA2D_SetLineOffset
NYX 0:85b3fd62ea1a 586 * @param DMA2Dx DMA2D Instance
NYX 0:85b3fd62ea1a 587 * @param LineOffset Value between Min_Data=0 and Max_Data=0x3FFF
NYX 0:85b3fd62ea1a 588 * @retval None
NYX 0:85b3fd62ea1a 589 */
NYX 0:85b3fd62ea1a 590 __STATIC_INLINE void LL_DMA2D_SetLineOffset(DMA2D_TypeDef *DMA2Dx, uint32_t LineOffset)
NYX 0:85b3fd62ea1a 591 {
NYX 0:85b3fd62ea1a 592 MODIFY_REG(DMA2Dx->OOR, DMA2D_OOR_LO, LineOffset);
NYX 0:85b3fd62ea1a 593 }
NYX 0:85b3fd62ea1a 594
NYX 0:85b3fd62ea1a 595 /**
NYX 0:85b3fd62ea1a 596 * @brief Return DMA2D line offset, expressed on 14 bits ([13:0] bits).
NYX 0:85b3fd62ea1a 597 * @rmtoll OOR LO LL_DMA2D_GetLineOffset
NYX 0:85b3fd62ea1a 598 * @param DMA2Dx DMA2D Instance
NYX 0:85b3fd62ea1a 599 * @retval Line offset value between Min_Data=0 and Max_Data=0x3FFF
NYX 0:85b3fd62ea1a 600 */
NYX 0:85b3fd62ea1a 601 __STATIC_INLINE uint32_t LL_DMA2D_GetLineOffset(DMA2D_TypeDef *DMA2Dx)
NYX 0:85b3fd62ea1a 602 {
NYX 0:85b3fd62ea1a 603 return (uint32_t)(READ_BIT(DMA2Dx->OOR, DMA2D_OOR_LO));
NYX 0:85b3fd62ea1a 604 }
NYX 0:85b3fd62ea1a 605
NYX 0:85b3fd62ea1a 606 /**
NYX 0:85b3fd62ea1a 607 * @brief Set DMA2D number of pixels per lines, expressed on 14 bits ([13:0] bits).
NYX 0:85b3fd62ea1a 608 * @rmtoll NLR PL LL_DMA2D_SetNbrOfPixelsPerLines
NYX 0:85b3fd62ea1a 609 * @param DMA2Dx DMA2D Instance
NYX 0:85b3fd62ea1a 610 * @param NbrOfPixelsPerLines Value between Min_Data=0 and Max_Data=0x3FFF
NYX 0:85b3fd62ea1a 611 * @retval None
NYX 0:85b3fd62ea1a 612 */
NYX 0:85b3fd62ea1a 613 __STATIC_INLINE void LL_DMA2D_SetNbrOfPixelsPerLines(DMA2D_TypeDef *DMA2Dx, uint32_t NbrOfPixelsPerLines)
NYX 0:85b3fd62ea1a 614 {
NYX 0:85b3fd62ea1a 615 MODIFY_REG(DMA2Dx->NLR, DMA2D_NLR_PL, (NbrOfPixelsPerLines << DMA2D_NLR_PL_Pos));
NYX 0:85b3fd62ea1a 616 }
NYX 0:85b3fd62ea1a 617
NYX 0:85b3fd62ea1a 618 /**
NYX 0:85b3fd62ea1a 619 * @brief Return DMA2D number of pixels per lines, expressed on 14 bits ([13:0] bits)
NYX 0:85b3fd62ea1a 620 * @rmtoll NLR PL LL_DMA2D_GetNbrOfPixelsPerLines
NYX 0:85b3fd62ea1a 621 * @param DMA2Dx DMA2D Instance
NYX 0:85b3fd62ea1a 622 * @retval Number of pixels per lines value between Min_Data=0 and Max_Data=0x3FFF
NYX 0:85b3fd62ea1a 623 */
NYX 0:85b3fd62ea1a 624 __STATIC_INLINE uint32_t LL_DMA2D_GetNbrOfPixelsPerLines(DMA2D_TypeDef *DMA2Dx)
NYX 0:85b3fd62ea1a 625 {
NYX 0:85b3fd62ea1a 626 return (uint32_t)(READ_BIT(DMA2Dx->NLR, DMA2D_NLR_PL) >> DMA2D_NLR_PL_Pos);
NYX 0:85b3fd62ea1a 627 }
NYX 0:85b3fd62ea1a 628
NYX 0:85b3fd62ea1a 629 /**
NYX 0:85b3fd62ea1a 630 * @brief Set DMA2D number of lines, expressed on 16 bits ([15:0] bits).
NYX 0:85b3fd62ea1a 631 * @rmtoll NLR NL LL_DMA2D_SetNbrOfLines
NYX 0:85b3fd62ea1a 632 * @param DMA2Dx DMA2D Instance
NYX 0:85b3fd62ea1a 633 * @param NbrOfLines Value between Min_Data=0 and Max_Data=0xFFFF
NYX 0:85b3fd62ea1a 634 * @retval None
NYX 0:85b3fd62ea1a 635 */
NYX 0:85b3fd62ea1a 636 __STATIC_INLINE void LL_DMA2D_SetNbrOfLines(DMA2D_TypeDef *DMA2Dx, uint32_t NbrOfLines)
NYX 0:85b3fd62ea1a 637 {
NYX 0:85b3fd62ea1a 638 MODIFY_REG(DMA2Dx->NLR, DMA2D_NLR_NL, NbrOfLines);
NYX 0:85b3fd62ea1a 639 }
NYX 0:85b3fd62ea1a 640
NYX 0:85b3fd62ea1a 641 /**
NYX 0:85b3fd62ea1a 642 * @brief Return DMA2D number of lines, expressed on 16 bits ([15:0] bits).
NYX 0:85b3fd62ea1a 643 * @rmtoll NLR NL LL_DMA2D_GetNbrOfLines
NYX 0:85b3fd62ea1a 644 * @param DMA2Dx DMA2D Instance
NYX 0:85b3fd62ea1a 645 * @retval Number of lines value between Min_Data=0 and Max_Data=0xFFFF
NYX 0:85b3fd62ea1a 646 */
NYX 0:85b3fd62ea1a 647 __STATIC_INLINE uint32_t LL_DMA2D_GetNbrOfLines(DMA2D_TypeDef *DMA2Dx)
NYX 0:85b3fd62ea1a 648 {
NYX 0:85b3fd62ea1a 649 return (uint32_t)(READ_BIT(DMA2Dx->NLR, DMA2D_NLR_NL));
NYX 0:85b3fd62ea1a 650 }
NYX 0:85b3fd62ea1a 651
NYX 0:85b3fd62ea1a 652 /**
NYX 0:85b3fd62ea1a 653 * @brief Set DMA2D output memory address, expressed on 32 bits ([31:0] bits).
NYX 0:85b3fd62ea1a 654 * @rmtoll OMAR MA LL_DMA2D_SetOutputMemAddr
NYX 0:85b3fd62ea1a 655 * @param DMA2Dx DMA2D Instance
NYX 0:85b3fd62ea1a 656 * @param OutputMemoryAddress Value between Min_Data=0 and Max_Data=0xFFFFFFFF
NYX 0:85b3fd62ea1a 657 * @retval None
NYX 0:85b3fd62ea1a 658 */
NYX 0:85b3fd62ea1a 659 __STATIC_INLINE void LL_DMA2D_SetOutputMemAddr(DMA2D_TypeDef *DMA2Dx, uint32_t OutputMemoryAddress)
NYX 0:85b3fd62ea1a 660 {
NYX 0:85b3fd62ea1a 661 LL_DMA2D_WriteReg(DMA2Dx, OMAR, OutputMemoryAddress);
NYX 0:85b3fd62ea1a 662 }
NYX 0:85b3fd62ea1a 663
NYX 0:85b3fd62ea1a 664 /**
NYX 0:85b3fd62ea1a 665 * @brief Get DMA2D output memory address, expressed on 32 bits ([31:0] bits).
NYX 0:85b3fd62ea1a 666 * @rmtoll OMAR MA LL_DMA2D_GetOutputMemAddr
NYX 0:85b3fd62ea1a 667 * @param DMA2Dx DMA2D Instance
NYX 0:85b3fd62ea1a 668 * @retval Output memory address value between Min_Data=0 and Max_Data=0xFFFFFFFF
NYX 0:85b3fd62ea1a 669 */
NYX 0:85b3fd62ea1a 670 __STATIC_INLINE uint32_t LL_DMA2D_GetOutputMemAddr(DMA2D_TypeDef *DMA2Dx)
NYX 0:85b3fd62ea1a 671 {
NYX 0:85b3fd62ea1a 672 return (uint32_t)(LL_DMA2D_ReadReg(DMA2Dx, OMAR));
NYX 0:85b3fd62ea1a 673 }
NYX 0:85b3fd62ea1a 674
NYX 0:85b3fd62ea1a 675 /**
NYX 0:85b3fd62ea1a 676 * @brief Set DMA2D output color, expressed on 32 bits ([31:0] bits).
NYX 0:85b3fd62ea1a 677 * @note Output color format depends on output color mode, ARGB8888, RGB888,
NYX 0:85b3fd62ea1a 678 * RGB565, ARGB1555 or ARGB4444.
NYX 0:85b3fd62ea1a 679 * @note LL_DMA2D_ConfigOutputColor() API may be used instead if colors values formatting
NYX 0:85b3fd62ea1a 680 * with respect to color mode is not done by the user code.
NYX 0:85b3fd62ea1a 681 * @rmtoll OCOLR BLUE LL_DMA2D_SetOutputColor\n
NYX 0:85b3fd62ea1a 682 * OCOLR GREEN LL_DMA2D_SetOutputColor\n
NYX 0:85b3fd62ea1a 683 * OCOLR RED LL_DMA2D_SetOutputColor\n
NYX 0:85b3fd62ea1a 684 * OCOLR ALPHA LL_DMA2D_SetOutputColor
NYX 0:85b3fd62ea1a 685 * @param DMA2Dx DMA2D Instance
NYX 0:85b3fd62ea1a 686 * @param OutputColor Value between Min_Data=0 and Max_Data=0xFFFFFFFF
NYX 0:85b3fd62ea1a 687 * @retval None
NYX 0:85b3fd62ea1a 688 */
NYX 0:85b3fd62ea1a 689 __STATIC_INLINE void LL_DMA2D_SetOutputColor(DMA2D_TypeDef *DMA2Dx, uint32_t OutputColor)
NYX 0:85b3fd62ea1a 690 {
NYX 0:85b3fd62ea1a 691 MODIFY_REG(DMA2Dx->OCOLR, (DMA2D_OCOLR_BLUE_1 | DMA2D_OCOLR_GREEN_1 | DMA2D_OCOLR_RED_1 | DMA2D_OCOLR_ALPHA_1), \
NYX 0:85b3fd62ea1a 692 OutputColor);
NYX 0:85b3fd62ea1a 693 }
NYX 0:85b3fd62ea1a 694
NYX 0:85b3fd62ea1a 695 /**
NYX 0:85b3fd62ea1a 696 * @brief Get DMA2D output color, expressed on 32 bits ([31:0] bits).
NYX 0:85b3fd62ea1a 697 * @note Alpha channel and red, green, blue color values must be retrieved from the returned
NYX 0:85b3fd62ea1a 698 * value based on the output color mode (ARGB8888, RGB888, RGB565, ARGB1555 or ARGB4444)
NYX 0:85b3fd62ea1a 699 * as set by @ref LL_DMA2D_SetOutputColorMode.
NYX 0:85b3fd62ea1a 700 * @rmtoll OCOLR BLUE LL_DMA2D_GetOutputColor\n
NYX 0:85b3fd62ea1a 701 * OCOLR GREEN LL_DMA2D_GetOutputColor\n
NYX 0:85b3fd62ea1a 702 * OCOLR RED LL_DMA2D_GetOutputColor\n
NYX 0:85b3fd62ea1a 703 * OCOLR ALPHA LL_DMA2D_GetOutputColor
NYX 0:85b3fd62ea1a 704 * @param DMA2Dx DMA2D Instance
NYX 0:85b3fd62ea1a 705 * @retval Output color value between Min_Data=0 and Max_Data=0xFFFFFFFF
NYX 0:85b3fd62ea1a 706 */
NYX 0:85b3fd62ea1a 707 __STATIC_INLINE uint32_t LL_DMA2D_GetOutputColor(DMA2D_TypeDef *DMA2Dx)
NYX 0:85b3fd62ea1a 708 {
NYX 0:85b3fd62ea1a 709 return (uint32_t)(READ_BIT(DMA2Dx->OCOLR, \
NYX 0:85b3fd62ea1a 710 (DMA2D_OCOLR_BLUE_1 | DMA2D_OCOLR_GREEN_1 | DMA2D_OCOLR_RED_1 | DMA2D_OCOLR_ALPHA_1)));
NYX 0:85b3fd62ea1a 711 }
NYX 0:85b3fd62ea1a 712
NYX 0:85b3fd62ea1a 713 /**
NYX 0:85b3fd62ea1a 714 * @brief Set DMA2D line watermark, expressed on 16 bits ([15:0] bits).
NYX 0:85b3fd62ea1a 715 * @rmtoll LWR LW LL_DMA2D_SetLineWatermark
NYX 0:85b3fd62ea1a 716 * @param DMA2Dx DMA2D Instance
NYX 0:85b3fd62ea1a 717 * @param LineWatermark Value between Min_Data=0 and Max_Data=0xFFFF
NYX 0:85b3fd62ea1a 718 * @retval None
NYX 0:85b3fd62ea1a 719 */
NYX 0:85b3fd62ea1a 720 __STATIC_INLINE void LL_DMA2D_SetLineWatermark(DMA2D_TypeDef *DMA2Dx, uint32_t LineWatermark)
NYX 0:85b3fd62ea1a 721 {
NYX 0:85b3fd62ea1a 722 MODIFY_REG(DMA2Dx->LWR, DMA2D_LWR_LW, LineWatermark);
NYX 0:85b3fd62ea1a 723 }
NYX 0:85b3fd62ea1a 724
NYX 0:85b3fd62ea1a 725 /**
NYX 0:85b3fd62ea1a 726 * @brief Return DMA2D line watermark, expressed on 16 bits ([15:0] bits).
NYX 0:85b3fd62ea1a 727 * @rmtoll LWR LW LL_DMA2D_GetLineWatermark
NYX 0:85b3fd62ea1a 728 * @param DMA2Dx DMA2D Instance
NYX 0:85b3fd62ea1a 729 * @retval Line watermark value between Min_Data=0 and Max_Data=0xFFFF
NYX 0:85b3fd62ea1a 730 */
NYX 0:85b3fd62ea1a 731 __STATIC_INLINE uint32_t LL_DMA2D_GetLineWatermark(DMA2D_TypeDef *DMA2Dx)
NYX 0:85b3fd62ea1a 732 {
NYX 0:85b3fd62ea1a 733 return (uint32_t)(READ_BIT(DMA2Dx->LWR, DMA2D_LWR_LW));
NYX 0:85b3fd62ea1a 734 }
NYX 0:85b3fd62ea1a 735
NYX 0:85b3fd62ea1a 736 /**
NYX 0:85b3fd62ea1a 737 * @brief Set DMA2D dead time, expressed on 8 bits ([7:0] bits).
NYX 0:85b3fd62ea1a 738 * @rmtoll AMTCR DT LL_DMA2D_SetDeadTime
NYX 0:85b3fd62ea1a 739 * @param DMA2Dx DMA2D Instance
NYX 0:85b3fd62ea1a 740 * @param DeadTime Value between Min_Data=0 and Max_Data=0xFF
NYX 0:85b3fd62ea1a 741 * @retval None
NYX 0:85b3fd62ea1a 742 */
NYX 0:85b3fd62ea1a 743 __STATIC_INLINE void LL_DMA2D_SetDeadTime(DMA2D_TypeDef *DMA2Dx, uint32_t DeadTime)
NYX 0:85b3fd62ea1a 744 {
NYX 0:85b3fd62ea1a 745 MODIFY_REG(DMA2Dx->AMTCR, DMA2D_AMTCR_DT, (DeadTime << DMA2D_AMTCR_DT_Pos));
NYX 0:85b3fd62ea1a 746 }
NYX 0:85b3fd62ea1a 747
NYX 0:85b3fd62ea1a 748 /**
NYX 0:85b3fd62ea1a 749 * @brief Return DMA2D dead time, expressed on 8 bits ([7:0] bits).
NYX 0:85b3fd62ea1a 750 * @rmtoll AMTCR DT LL_DMA2D_GetDeadTime
NYX 0:85b3fd62ea1a 751 * @param DMA2Dx DMA2D Instance
NYX 0:85b3fd62ea1a 752 * @retval Dead time value between Min_Data=0 and Max_Data=0xFF
NYX 0:85b3fd62ea1a 753 */
NYX 0:85b3fd62ea1a 754 __STATIC_INLINE uint32_t LL_DMA2D_GetDeadTime(DMA2D_TypeDef *DMA2Dx)
NYX 0:85b3fd62ea1a 755 {
NYX 0:85b3fd62ea1a 756 return (uint32_t)(READ_BIT(DMA2Dx->AMTCR, DMA2D_AMTCR_DT) >> DMA2D_AMTCR_DT_Pos);
NYX 0:85b3fd62ea1a 757 }
NYX 0:85b3fd62ea1a 758
NYX 0:85b3fd62ea1a 759 /**
NYX 0:85b3fd62ea1a 760 * @brief Enable DMA2D dead time functionality.
NYX 0:85b3fd62ea1a 761 * @rmtoll AMTCR EN LL_DMA2D_EnableDeadTime
NYX 0:85b3fd62ea1a 762 * @param DMA2Dx DMA2D Instance
NYX 0:85b3fd62ea1a 763 * @retval None
NYX 0:85b3fd62ea1a 764 */
NYX 0:85b3fd62ea1a 765 __STATIC_INLINE void LL_DMA2D_EnableDeadTime(DMA2D_TypeDef *DMA2Dx)
NYX 0:85b3fd62ea1a 766 {
NYX 0:85b3fd62ea1a 767 SET_BIT(DMA2Dx->AMTCR, DMA2D_AMTCR_EN);
NYX 0:85b3fd62ea1a 768 }
NYX 0:85b3fd62ea1a 769
NYX 0:85b3fd62ea1a 770 /**
NYX 0:85b3fd62ea1a 771 * @brief Disable DMA2D dead time functionality.
NYX 0:85b3fd62ea1a 772 * @rmtoll AMTCR EN LL_DMA2D_DisableDeadTime
NYX 0:85b3fd62ea1a 773 * @param DMA2Dx DMA2D Instance
NYX 0:85b3fd62ea1a 774 * @retval None
NYX 0:85b3fd62ea1a 775 */
NYX 0:85b3fd62ea1a 776 __STATIC_INLINE void LL_DMA2D_DisableDeadTime(DMA2D_TypeDef *DMA2Dx)
NYX 0:85b3fd62ea1a 777 {
NYX 0:85b3fd62ea1a 778 CLEAR_BIT(DMA2Dx->AMTCR, DMA2D_AMTCR_EN);
NYX 0:85b3fd62ea1a 779 }
NYX 0:85b3fd62ea1a 780
NYX 0:85b3fd62ea1a 781 /**
NYX 0:85b3fd62ea1a 782 * @brief Indicate if DMA2D dead time functionality is enabled.
NYX 0:85b3fd62ea1a 783 * @rmtoll AMTCR EN LL_DMA2D_IsEnabledDeadTime
NYX 0:85b3fd62ea1a 784 * @param DMA2Dx DMA2D Instance
NYX 0:85b3fd62ea1a 785 * @retval State of bit (1 or 0).
NYX 0:85b3fd62ea1a 786 */
NYX 0:85b3fd62ea1a 787 __STATIC_INLINE uint32_t LL_DMA2D_IsEnabledDeadTime(DMA2D_TypeDef *DMA2Dx)
NYX 0:85b3fd62ea1a 788 {
NYX 0:85b3fd62ea1a 789 return (READ_BIT(DMA2Dx->AMTCR, DMA2D_AMTCR_EN) == (DMA2D_AMTCR_EN));
NYX 0:85b3fd62ea1a 790 }
NYX 0:85b3fd62ea1a 791
NYX 0:85b3fd62ea1a 792 /** @defgroup DMA2D_LL_EF_FGND_Configuration Foreground Configuration Functions
NYX 0:85b3fd62ea1a 793 * @{
NYX 0:85b3fd62ea1a 794 */
NYX 0:85b3fd62ea1a 795
NYX 0:85b3fd62ea1a 796 /**
NYX 0:85b3fd62ea1a 797 * @brief Set DMA2D foreground memory address, expressed on 32 bits ([31:0] bits).
NYX 0:85b3fd62ea1a 798 * @rmtoll FGMAR MA LL_DMA2D_FGND_SetMemAddr
NYX 0:85b3fd62ea1a 799 * @param DMA2Dx DMA2D Instance
NYX 0:85b3fd62ea1a 800 * @param MemoryAddress Value between Min_Data=0 and Max_Data=0xFFFFFFFF
NYX 0:85b3fd62ea1a 801 * @retval None
NYX 0:85b3fd62ea1a 802 */
NYX 0:85b3fd62ea1a 803 __STATIC_INLINE void LL_DMA2D_FGND_SetMemAddr(DMA2D_TypeDef *DMA2Dx, uint32_t MemoryAddress)
NYX 0:85b3fd62ea1a 804 {
NYX 0:85b3fd62ea1a 805 LL_DMA2D_WriteReg(DMA2Dx, FGMAR, MemoryAddress);
NYX 0:85b3fd62ea1a 806 }
NYX 0:85b3fd62ea1a 807
NYX 0:85b3fd62ea1a 808 /**
NYX 0:85b3fd62ea1a 809 * @brief Get DMA2D foreground memory address, expressed on 32 bits ([31:0] bits).
NYX 0:85b3fd62ea1a 810 * @rmtoll FGMAR MA LL_DMA2D_FGND_GetMemAddr
NYX 0:85b3fd62ea1a 811 * @param DMA2Dx DMA2D Instance
NYX 0:85b3fd62ea1a 812 * @retval Foreground memory address value between Min_Data=0 and Max_Data=0xFFFFFFFF
NYX 0:85b3fd62ea1a 813 */
NYX 0:85b3fd62ea1a 814 __STATIC_INLINE uint32_t LL_DMA2D_FGND_GetMemAddr(DMA2D_TypeDef *DMA2Dx)
NYX 0:85b3fd62ea1a 815 {
NYX 0:85b3fd62ea1a 816 return (uint32_t)(LL_DMA2D_ReadReg(DMA2Dx, FGMAR));
NYX 0:85b3fd62ea1a 817 }
NYX 0:85b3fd62ea1a 818
NYX 0:85b3fd62ea1a 819 /**
NYX 0:85b3fd62ea1a 820 * @brief Enable DMA2D foreground CLUT loading.
NYX 0:85b3fd62ea1a 821 * @rmtoll FGPFCCR START LL_DMA2D_FGND_EnableCLUTLoad
NYX 0:85b3fd62ea1a 822 * @param DMA2Dx DMA2D Instance
NYX 0:85b3fd62ea1a 823 * @retval None
NYX 0:85b3fd62ea1a 824 */
NYX 0:85b3fd62ea1a 825 __STATIC_INLINE void LL_DMA2D_FGND_EnableCLUTLoad(DMA2D_TypeDef *DMA2Dx)
NYX 0:85b3fd62ea1a 826 {
NYX 0:85b3fd62ea1a 827 SET_BIT(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_START);
NYX 0:85b3fd62ea1a 828 }
NYX 0:85b3fd62ea1a 829
NYX 0:85b3fd62ea1a 830 /**
NYX 0:85b3fd62ea1a 831 * @brief Indicate if DMA2D foreground CLUT loading is enabled.
NYX 0:85b3fd62ea1a 832 * @rmtoll FGPFCCR START LL_DMA2D_FGND_IsEnabledCLUTLoad
NYX 0:85b3fd62ea1a 833 * @param DMA2Dx DMA2D Instance
NYX 0:85b3fd62ea1a 834 * @retval State of bit (1 or 0).
NYX 0:85b3fd62ea1a 835 */
NYX 0:85b3fd62ea1a 836 __STATIC_INLINE uint32_t LL_DMA2D_FGND_IsEnabledCLUTLoad(DMA2D_TypeDef *DMA2Dx)
NYX 0:85b3fd62ea1a 837 {
NYX 0:85b3fd62ea1a 838 return (READ_BIT(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_START) == (DMA2D_FGPFCCR_START));
NYX 0:85b3fd62ea1a 839 }
NYX 0:85b3fd62ea1a 840
NYX 0:85b3fd62ea1a 841 /**
NYX 0:85b3fd62ea1a 842 * @brief Set DMA2D foreground color mode.
NYX 0:85b3fd62ea1a 843 * @rmtoll FGPFCCR CM LL_DMA2D_FGND_SetColorMode
NYX 0:85b3fd62ea1a 844 * @param DMA2Dx DMA2D Instance
NYX 0:85b3fd62ea1a 845 * @param ColorMode This parameter can be one of the following values:
NYX 0:85b3fd62ea1a 846 * @arg @ref LL_DMA2D_INPUT_MODE_ARGB8888
NYX 0:85b3fd62ea1a 847 * @arg @ref LL_DMA2D_INPUT_MODE_RGB888
NYX 0:85b3fd62ea1a 848 * @arg @ref LL_DMA2D_INPUT_MODE_RGB565
NYX 0:85b3fd62ea1a 849 * @arg @ref LL_DMA2D_INPUT_MODE_ARGB1555
NYX 0:85b3fd62ea1a 850 * @arg @ref LL_DMA2D_INPUT_MODE_ARGB4444
NYX 0:85b3fd62ea1a 851 * @arg @ref LL_DMA2D_INPUT_MODE_L8
NYX 0:85b3fd62ea1a 852 * @arg @ref LL_DMA2D_INPUT_MODE_AL44
NYX 0:85b3fd62ea1a 853 * @arg @ref LL_DMA2D_INPUT_MODE_AL88
NYX 0:85b3fd62ea1a 854 * @arg @ref LL_DMA2D_INPUT_MODE_L4
NYX 0:85b3fd62ea1a 855 * @arg @ref LL_DMA2D_INPUT_MODE_A8
NYX 0:85b3fd62ea1a 856 * @arg @ref LL_DMA2D_INPUT_MODE_A4
NYX 0:85b3fd62ea1a 857 * @retval None
NYX 0:85b3fd62ea1a 858 */
NYX 0:85b3fd62ea1a 859 __STATIC_INLINE void LL_DMA2D_FGND_SetColorMode(DMA2D_TypeDef *DMA2Dx, uint32_t ColorMode)
NYX 0:85b3fd62ea1a 860 {
NYX 0:85b3fd62ea1a 861 MODIFY_REG(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_CM, ColorMode);
NYX 0:85b3fd62ea1a 862 }
NYX 0:85b3fd62ea1a 863
NYX 0:85b3fd62ea1a 864 /**
NYX 0:85b3fd62ea1a 865 * @brief Return DMA2D foreground color mode.
NYX 0:85b3fd62ea1a 866 * @rmtoll FGPFCCR CM LL_DMA2D_FGND_GetColorMode
NYX 0:85b3fd62ea1a 867 * @param DMA2Dx DMA2D Instance
NYX 0:85b3fd62ea1a 868 * @retval Returned value can be one of the following values:
NYX 0:85b3fd62ea1a 869 * @arg @ref LL_DMA2D_INPUT_MODE_ARGB8888
NYX 0:85b3fd62ea1a 870 * @arg @ref LL_DMA2D_INPUT_MODE_RGB888
NYX 0:85b3fd62ea1a 871 * @arg @ref LL_DMA2D_INPUT_MODE_RGB565
NYX 0:85b3fd62ea1a 872 * @arg @ref LL_DMA2D_INPUT_MODE_ARGB1555
NYX 0:85b3fd62ea1a 873 * @arg @ref LL_DMA2D_INPUT_MODE_ARGB4444
NYX 0:85b3fd62ea1a 874 * @arg @ref LL_DMA2D_INPUT_MODE_L8
NYX 0:85b3fd62ea1a 875 * @arg @ref LL_DMA2D_INPUT_MODE_AL44
NYX 0:85b3fd62ea1a 876 * @arg @ref LL_DMA2D_INPUT_MODE_AL88
NYX 0:85b3fd62ea1a 877 * @arg @ref LL_DMA2D_INPUT_MODE_L4
NYX 0:85b3fd62ea1a 878 * @arg @ref LL_DMA2D_INPUT_MODE_A8
NYX 0:85b3fd62ea1a 879 * @arg @ref LL_DMA2D_INPUT_MODE_A4
NYX 0:85b3fd62ea1a 880 */
NYX 0:85b3fd62ea1a 881 __STATIC_INLINE uint32_t LL_DMA2D_FGND_GetColorMode(DMA2D_TypeDef *DMA2Dx)
NYX 0:85b3fd62ea1a 882 {
NYX 0:85b3fd62ea1a 883 return (uint32_t)(READ_BIT(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_CM));
NYX 0:85b3fd62ea1a 884 }
NYX 0:85b3fd62ea1a 885
NYX 0:85b3fd62ea1a 886 /**
NYX 0:85b3fd62ea1a 887 * @brief Set DMA2D foreground alpha mode.
NYX 0:85b3fd62ea1a 888 * @rmtoll FGPFCCR AM LL_DMA2D_FGND_SetAlphaMode
NYX 0:85b3fd62ea1a 889 * @param DMA2Dx DMA2D Instance
NYX 0:85b3fd62ea1a 890 * @param AphaMode This parameter can be one of the following values:
NYX 0:85b3fd62ea1a 891 * @arg @ref LL_DMA2D_ALPHA_MODE_NO_MODIF
NYX 0:85b3fd62ea1a 892 * @arg @ref LL_DMA2D_ALPHA_MODE_REPLACE
NYX 0:85b3fd62ea1a 893 * @arg @ref LL_DMA2D_ALPHA_MODE_COMBINE
NYX 0:85b3fd62ea1a 894 * @retval None
NYX 0:85b3fd62ea1a 895 */
NYX 0:85b3fd62ea1a 896 __STATIC_INLINE void LL_DMA2D_FGND_SetAlphaMode(DMA2D_TypeDef *DMA2Dx, uint32_t AphaMode)
NYX 0:85b3fd62ea1a 897 {
NYX 0:85b3fd62ea1a 898 MODIFY_REG(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_AM, AphaMode);
NYX 0:85b3fd62ea1a 899 }
NYX 0:85b3fd62ea1a 900
NYX 0:85b3fd62ea1a 901 /**
NYX 0:85b3fd62ea1a 902 * @brief Return DMA2D foreground alpha mode.
NYX 0:85b3fd62ea1a 903 * @rmtoll FGPFCCR AM LL_DMA2D_FGND_GetAlphaMode
NYX 0:85b3fd62ea1a 904 * @param DMA2Dx DMA2D Instance
NYX 0:85b3fd62ea1a 905 * @retval Returned value can be one of the following values:
NYX 0:85b3fd62ea1a 906 * @arg @ref LL_DMA2D_ALPHA_MODE_NO_MODIF
NYX 0:85b3fd62ea1a 907 * @arg @ref LL_DMA2D_ALPHA_MODE_REPLACE
NYX 0:85b3fd62ea1a 908 * @arg @ref LL_DMA2D_ALPHA_MODE_COMBINE
NYX 0:85b3fd62ea1a 909 */
NYX 0:85b3fd62ea1a 910 __STATIC_INLINE uint32_t LL_DMA2D_FGND_GetAlphaMode(DMA2D_TypeDef *DMA2Dx)
NYX 0:85b3fd62ea1a 911 {
NYX 0:85b3fd62ea1a 912 return (uint32_t)(READ_BIT(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_AM));
NYX 0:85b3fd62ea1a 913 }
NYX 0:85b3fd62ea1a 914
NYX 0:85b3fd62ea1a 915 /**
NYX 0:85b3fd62ea1a 916 * @brief Set DMA2D foreground alpha value, expressed on 8 bits ([7:0] bits).
NYX 0:85b3fd62ea1a 917 * @rmtoll FGPFCCR ALPHA LL_DMA2D_FGND_SetAlpha
NYX 0:85b3fd62ea1a 918 * @param DMA2Dx DMA2D Instance
NYX 0:85b3fd62ea1a 919 * @param Alpha Value between Min_Data=0 and Max_Data=0xFF
NYX 0:85b3fd62ea1a 920 * @retval None
NYX 0:85b3fd62ea1a 921 */
NYX 0:85b3fd62ea1a 922 __STATIC_INLINE void LL_DMA2D_FGND_SetAlpha(DMA2D_TypeDef *DMA2Dx, uint32_t Alpha)
NYX 0:85b3fd62ea1a 923 {
NYX 0:85b3fd62ea1a 924 MODIFY_REG(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_ALPHA, (Alpha << DMA2D_FGPFCCR_ALPHA_Pos));
NYX 0:85b3fd62ea1a 925 }
NYX 0:85b3fd62ea1a 926
NYX 0:85b3fd62ea1a 927 /**
NYX 0:85b3fd62ea1a 928 * @brief Return DMA2D foreground alpha value, expressed on 8 bits ([7:0] bits).
NYX 0:85b3fd62ea1a 929 * @rmtoll FGPFCCR ALPHA LL_DMA2D_FGND_GetAlpha
NYX 0:85b3fd62ea1a 930 * @param DMA2Dx DMA2D Instance
NYX 0:85b3fd62ea1a 931 * @retval Alpha value between Min_Data=0 and Max_Data=0xFF
NYX 0:85b3fd62ea1a 932 */
NYX 0:85b3fd62ea1a 933 __STATIC_INLINE uint32_t LL_DMA2D_FGND_GetAlpha(DMA2D_TypeDef *DMA2Dx)
NYX 0:85b3fd62ea1a 934 {
NYX 0:85b3fd62ea1a 935 return (uint32_t)(READ_BIT(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_ALPHA) >> DMA2D_FGPFCCR_ALPHA_Pos);
NYX 0:85b3fd62ea1a 936 }
NYX 0:85b3fd62ea1a 937
NYX 0:85b3fd62ea1a 938 /**
NYX 0:85b3fd62ea1a 939 * @brief Set DMA2D foreground line offset, expressed on 14 bits ([13:0] bits).
NYX 0:85b3fd62ea1a 940 * @rmtoll FGOR LO LL_DMA2D_FGND_SetLineOffset
NYX 0:85b3fd62ea1a 941 * @param DMA2Dx DMA2D Instance
NYX 0:85b3fd62ea1a 942 * @param LineOffset Value between Min_Data=0 and Max_Data=0x3FF
NYX 0:85b3fd62ea1a 943 * @retval None
NYX 0:85b3fd62ea1a 944 */
NYX 0:85b3fd62ea1a 945 __STATIC_INLINE void LL_DMA2D_FGND_SetLineOffset(DMA2D_TypeDef *DMA2Dx, uint32_t LineOffset)
NYX 0:85b3fd62ea1a 946 {
NYX 0:85b3fd62ea1a 947 MODIFY_REG(DMA2Dx->FGOR, DMA2D_FGOR_LO, LineOffset);
NYX 0:85b3fd62ea1a 948 }
NYX 0:85b3fd62ea1a 949
NYX 0:85b3fd62ea1a 950 /**
NYX 0:85b3fd62ea1a 951 * @brief Return DMA2D foreground line offset, expressed on 14 bits ([13:0] bits).
NYX 0:85b3fd62ea1a 952 * @rmtoll FGOR LO LL_DMA2D_FGND_GetLineOffset
NYX 0:85b3fd62ea1a 953 * @param DMA2Dx DMA2D Instance
NYX 0:85b3fd62ea1a 954 * @retval Foreground line offset value between Min_Data=0 and Max_Data=0x3FF
NYX 0:85b3fd62ea1a 955 */
NYX 0:85b3fd62ea1a 956 __STATIC_INLINE uint32_t LL_DMA2D_FGND_GetLineOffset(DMA2D_TypeDef *DMA2Dx)
NYX 0:85b3fd62ea1a 957 {
NYX 0:85b3fd62ea1a 958 return (uint32_t)(READ_BIT(DMA2Dx->FGOR, DMA2D_FGOR_LO));
NYX 0:85b3fd62ea1a 959 }
NYX 0:85b3fd62ea1a 960
NYX 0:85b3fd62ea1a 961 /**
NYX 0:85b3fd62ea1a 962 * @brief Set DMA2D foreground color values, expressed on 24 bits ([23:0] bits).
NYX 0:85b3fd62ea1a 963 * @rmtoll FGCOLR RED LL_DMA2D_FGND_SetColor
NYX 0:85b3fd62ea1a 964 * @rmtoll FGCOLR GREEN LL_DMA2D_FGND_SetColor
NYX 0:85b3fd62ea1a 965 * @rmtoll FGCOLR BLUE LL_DMA2D_FGND_SetColor
NYX 0:85b3fd62ea1a 966 * @param DMA2Dx DMA2D Instance
NYX 0:85b3fd62ea1a 967 * @param Red Value between Min_Data=0 and Max_Data=0xFF
NYX 0:85b3fd62ea1a 968 * @param Green Value between Min_Data=0 and Max_Data=0xFF
NYX 0:85b3fd62ea1a 969 * @param Blue Value between Min_Data=0 and Max_Data=0xFF
NYX 0:85b3fd62ea1a 970 * @retval None
NYX 0:85b3fd62ea1a 971 */
NYX 0:85b3fd62ea1a 972 __STATIC_INLINE void LL_DMA2D_FGND_SetColor(DMA2D_TypeDef *DMA2Dx, uint32_t Red, uint32_t Green, uint32_t Blue)
NYX 0:85b3fd62ea1a 973 {
NYX 0:85b3fd62ea1a 974 MODIFY_REG(DMA2Dx->FGCOLR, (DMA2D_FGCOLR_RED | DMA2D_FGCOLR_GREEN | DMA2D_FGCOLR_BLUE), \
NYX 0:85b3fd62ea1a 975 ((Red << DMA2D_FGCOLR_RED_Pos) | (Green << DMA2D_FGCOLR_GREEN_Pos) | Blue));
NYX 0:85b3fd62ea1a 976 }
NYX 0:85b3fd62ea1a 977
NYX 0:85b3fd62ea1a 978 /**
NYX 0:85b3fd62ea1a 979 * @brief Set DMA2D foreground red color value, expressed on 8 bits ([7:0] bits).
NYX 0:85b3fd62ea1a 980 * @rmtoll FGCOLR RED LL_DMA2D_FGND_SetRedColor
NYX 0:85b3fd62ea1a 981 * @param DMA2Dx DMA2D Instance
NYX 0:85b3fd62ea1a 982 * @param Red Value between Min_Data=0 and Max_Data=0xFF
NYX 0:85b3fd62ea1a 983 * @retval None
NYX 0:85b3fd62ea1a 984 */
NYX 0:85b3fd62ea1a 985 __STATIC_INLINE void LL_DMA2D_FGND_SetRedColor(DMA2D_TypeDef *DMA2Dx, uint32_t Red)
NYX 0:85b3fd62ea1a 986 {
NYX 0:85b3fd62ea1a 987 MODIFY_REG(DMA2Dx->FGCOLR, DMA2D_FGCOLR_RED, (Red << DMA2D_FGCOLR_RED_Pos));
NYX 0:85b3fd62ea1a 988 }
NYX 0:85b3fd62ea1a 989
NYX 0:85b3fd62ea1a 990 /**
NYX 0:85b3fd62ea1a 991 * @brief Return DMA2D foreground red color value, expressed on 8 bits ([7:0] bits).
NYX 0:85b3fd62ea1a 992 * @rmtoll FGCOLR RED LL_DMA2D_FGND_GetRedColor
NYX 0:85b3fd62ea1a 993 * @param DMA2Dx DMA2D Instance
NYX 0:85b3fd62ea1a 994 * @retval Red color value between Min_Data=0 and Max_Data=0xFF
NYX 0:85b3fd62ea1a 995 */
NYX 0:85b3fd62ea1a 996 __STATIC_INLINE uint32_t LL_DMA2D_FGND_GetRedColor(DMA2D_TypeDef *DMA2Dx)
NYX 0:85b3fd62ea1a 997 {
NYX 0:85b3fd62ea1a 998 return (uint32_t)(READ_BIT(DMA2Dx->FGCOLR, DMA2D_FGCOLR_RED) >> DMA2D_FGCOLR_RED_Pos);
NYX 0:85b3fd62ea1a 999 }
NYX 0:85b3fd62ea1a 1000
NYX 0:85b3fd62ea1a 1001 /**
NYX 0:85b3fd62ea1a 1002 * @brief Set DMA2D foreground green color value, expressed on 8 bits ([7:0] bits).
NYX 0:85b3fd62ea1a 1003 * @rmtoll FGCOLR GREEN LL_DMA2D_FGND_SetGreenColor
NYX 0:85b3fd62ea1a 1004 * @param DMA2Dx DMA2D Instance
NYX 0:85b3fd62ea1a 1005 * @param Green Value between Min_Data=0 and Max_Data=0xFF
NYX 0:85b3fd62ea1a 1006 * @retval None
NYX 0:85b3fd62ea1a 1007 */
NYX 0:85b3fd62ea1a 1008 __STATIC_INLINE void LL_DMA2D_FGND_SetGreenColor(DMA2D_TypeDef *DMA2Dx, uint32_t Green)
NYX 0:85b3fd62ea1a 1009 {
NYX 0:85b3fd62ea1a 1010 MODIFY_REG(DMA2Dx->FGCOLR, DMA2D_FGCOLR_GREEN, (Green << DMA2D_FGCOLR_GREEN_Pos));
NYX 0:85b3fd62ea1a 1011 }
NYX 0:85b3fd62ea1a 1012
NYX 0:85b3fd62ea1a 1013 /**
NYX 0:85b3fd62ea1a 1014 * @brief Return DMA2D foreground green color value, expressed on 8 bits ([7:0] bits).
NYX 0:85b3fd62ea1a 1015 * @rmtoll FGCOLR GREEN LL_DMA2D_FGND_GetGreenColor
NYX 0:85b3fd62ea1a 1016 * @param DMA2Dx DMA2D Instance
NYX 0:85b3fd62ea1a 1017 * @retval Green color value between Min_Data=0 and Max_Data=0xFF
NYX 0:85b3fd62ea1a 1018 */
NYX 0:85b3fd62ea1a 1019 __STATIC_INLINE uint32_t LL_DMA2D_FGND_GetGreenColor(DMA2D_TypeDef *DMA2Dx)
NYX 0:85b3fd62ea1a 1020 {
NYX 0:85b3fd62ea1a 1021 return (uint32_t)(READ_BIT(DMA2Dx->FGCOLR, DMA2D_FGCOLR_GREEN) >> DMA2D_FGCOLR_GREEN_Pos);
NYX 0:85b3fd62ea1a 1022 }
NYX 0:85b3fd62ea1a 1023
NYX 0:85b3fd62ea1a 1024 /**
NYX 0:85b3fd62ea1a 1025 * @brief Set DMA2D foreground blue color value, expressed on 8 bits ([7:0] bits).
NYX 0:85b3fd62ea1a 1026 * @rmtoll FGCOLR BLUE LL_DMA2D_FGND_SetBlueColor
NYX 0:85b3fd62ea1a 1027 * @param DMA2Dx DMA2D Instance
NYX 0:85b3fd62ea1a 1028 * @param Blue Value between Min_Data=0 and Max_Data=0xFF
NYX 0:85b3fd62ea1a 1029 * @retval None
NYX 0:85b3fd62ea1a 1030 */
NYX 0:85b3fd62ea1a 1031 __STATIC_INLINE void LL_DMA2D_FGND_SetBlueColor(DMA2D_TypeDef *DMA2Dx, uint32_t Blue)
NYX 0:85b3fd62ea1a 1032 {
NYX 0:85b3fd62ea1a 1033 MODIFY_REG(DMA2Dx->FGCOLR, DMA2D_FGCOLR_BLUE, Blue);
NYX 0:85b3fd62ea1a 1034 }
NYX 0:85b3fd62ea1a 1035
NYX 0:85b3fd62ea1a 1036 /**
NYX 0:85b3fd62ea1a 1037 * @brief Return DMA2D foreground blue color value, expressed on 8 bits ([7:0] bits).
NYX 0:85b3fd62ea1a 1038 * @rmtoll FGCOLR BLUE LL_DMA2D_FGND_GetBlueColor
NYX 0:85b3fd62ea1a 1039 * @param DMA2Dx DMA2D Instance
NYX 0:85b3fd62ea1a 1040 * @retval Blue color value between Min_Data=0 and Max_Data=0xFF
NYX 0:85b3fd62ea1a 1041 */
NYX 0:85b3fd62ea1a 1042 __STATIC_INLINE uint32_t LL_DMA2D_FGND_GetBlueColor(DMA2D_TypeDef *DMA2Dx)
NYX 0:85b3fd62ea1a 1043 {
NYX 0:85b3fd62ea1a 1044 return (uint32_t)(READ_BIT(DMA2Dx->FGCOLR, DMA2D_FGCOLR_BLUE));
NYX 0:85b3fd62ea1a 1045 }
NYX 0:85b3fd62ea1a 1046
NYX 0:85b3fd62ea1a 1047 /**
NYX 0:85b3fd62ea1a 1048 * @brief Set DMA2D foreground CLUT memory address, expressed on 32 bits ([31:0] bits).
NYX 0:85b3fd62ea1a 1049 * @rmtoll FGCMAR MA LL_DMA2D_FGND_SetCLUTMemAddr
NYX 0:85b3fd62ea1a 1050 * @param DMA2Dx DMA2D Instance
NYX 0:85b3fd62ea1a 1051 * @param CLUTMemoryAddress Value between Min_Data=0 and Max_Data=0xFFFFFFFF
NYX 0:85b3fd62ea1a 1052 * @retval None
NYX 0:85b3fd62ea1a 1053 */
NYX 0:85b3fd62ea1a 1054 __STATIC_INLINE void LL_DMA2D_FGND_SetCLUTMemAddr(DMA2D_TypeDef *DMA2Dx, uint32_t CLUTMemoryAddress)
NYX 0:85b3fd62ea1a 1055 {
NYX 0:85b3fd62ea1a 1056 LL_DMA2D_WriteReg(DMA2Dx, FGCMAR, CLUTMemoryAddress);
NYX 0:85b3fd62ea1a 1057 }
NYX 0:85b3fd62ea1a 1058
NYX 0:85b3fd62ea1a 1059 /**
NYX 0:85b3fd62ea1a 1060 * @brief Get DMA2D foreground CLUT memory address, expressed on 32 bits ([31:0] bits).
NYX 0:85b3fd62ea1a 1061 * @rmtoll FGCMAR MA LL_DMA2D_FGND_GetCLUTMemAddr
NYX 0:85b3fd62ea1a 1062 * @param DMA2Dx DMA2D Instance
NYX 0:85b3fd62ea1a 1063 * @retval Foreground CLUT memory address value between Min_Data=0 and Max_Data=0xFFFFFFFF
NYX 0:85b3fd62ea1a 1064 */
NYX 0:85b3fd62ea1a 1065 __STATIC_INLINE uint32_t LL_DMA2D_FGND_GetCLUTMemAddr(DMA2D_TypeDef *DMA2Dx)
NYX 0:85b3fd62ea1a 1066 {
NYX 0:85b3fd62ea1a 1067 return (uint32_t)(LL_DMA2D_ReadReg(DMA2Dx, FGCMAR));
NYX 0:85b3fd62ea1a 1068 }
NYX 0:85b3fd62ea1a 1069
NYX 0:85b3fd62ea1a 1070 /**
NYX 0:85b3fd62ea1a 1071 * @brief Set DMA2D foreground CLUT size, expressed on 8 bits ([7:0] bits).
NYX 0:85b3fd62ea1a 1072 * @rmtoll FGPFCCR CS LL_DMA2D_FGND_SetCLUTSize
NYX 0:85b3fd62ea1a 1073 * @param DMA2Dx DMA2D Instance
NYX 0:85b3fd62ea1a 1074 * @param CLUTSize Value between Min_Data=0 and Max_Data=0xFF
NYX 0:85b3fd62ea1a 1075 * @retval None
NYX 0:85b3fd62ea1a 1076 */
NYX 0:85b3fd62ea1a 1077 __STATIC_INLINE void LL_DMA2D_FGND_SetCLUTSize(DMA2D_TypeDef *DMA2Dx, uint32_t CLUTSize)
NYX 0:85b3fd62ea1a 1078 {
NYX 0:85b3fd62ea1a 1079 MODIFY_REG(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_CS, (CLUTSize << DMA2D_FGPFCCR_CS_Pos));
NYX 0:85b3fd62ea1a 1080 }
NYX 0:85b3fd62ea1a 1081
NYX 0:85b3fd62ea1a 1082 /**
NYX 0:85b3fd62ea1a 1083 * @brief Get DMA2D foreground CLUT size, expressed on 8 bits ([7:0] bits).
NYX 0:85b3fd62ea1a 1084 * @rmtoll FGPFCCR CS LL_DMA2D_FGND_GetCLUTSize
NYX 0:85b3fd62ea1a 1085 * @param DMA2Dx DMA2D Instance
NYX 0:85b3fd62ea1a 1086 * @retval Foreground CLUT size value between Min_Data=0 and Max_Data=0xFF
NYX 0:85b3fd62ea1a 1087 */
NYX 0:85b3fd62ea1a 1088 __STATIC_INLINE uint32_t LL_DMA2D_FGND_GetCLUTSize(DMA2D_TypeDef *DMA2Dx)
NYX 0:85b3fd62ea1a 1089 {
NYX 0:85b3fd62ea1a 1090 return (uint32_t)(READ_BIT(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_CS) >> DMA2D_FGPFCCR_CS_Pos);
NYX 0:85b3fd62ea1a 1091 }
NYX 0:85b3fd62ea1a 1092
NYX 0:85b3fd62ea1a 1093 /**
NYX 0:85b3fd62ea1a 1094 * @brief Set DMA2D foreground CLUT color mode.
NYX 0:85b3fd62ea1a 1095 * @rmtoll FGPFCCR CCM LL_DMA2D_FGND_SetCLUTColorMode
NYX 0:85b3fd62ea1a 1096 * @param DMA2Dx DMA2D Instance
NYX 0:85b3fd62ea1a 1097 * @param CLUTColorMode This parameter can be one of the following values:
NYX 0:85b3fd62ea1a 1098 * @arg @ref LL_DMA2D_CLUT_COLOR_MODE_ARGB8888
NYX 0:85b3fd62ea1a 1099 * @arg @ref LL_DMA2D_CLUT_COLOR_MODE_RGB888
NYX 0:85b3fd62ea1a 1100 * @retval None
NYX 0:85b3fd62ea1a 1101 */
NYX 0:85b3fd62ea1a 1102 __STATIC_INLINE void LL_DMA2D_FGND_SetCLUTColorMode(DMA2D_TypeDef *DMA2Dx, uint32_t CLUTColorMode)
NYX 0:85b3fd62ea1a 1103 {
NYX 0:85b3fd62ea1a 1104 MODIFY_REG(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_CCM, CLUTColorMode);
NYX 0:85b3fd62ea1a 1105 }
NYX 0:85b3fd62ea1a 1106
NYX 0:85b3fd62ea1a 1107 /**
NYX 0:85b3fd62ea1a 1108 * @brief Return DMA2D foreground CLUT color mode.
NYX 0:85b3fd62ea1a 1109 * @rmtoll FGPFCCR CCM LL_DMA2D_FGND_GetCLUTColorMode
NYX 0:85b3fd62ea1a 1110 * @param DMA2Dx DMA2D Instance
NYX 0:85b3fd62ea1a 1111 * @retval Returned value can be one of the following values:
NYX 0:85b3fd62ea1a 1112 * @arg @ref LL_DMA2D_CLUT_COLOR_MODE_ARGB8888
NYX 0:85b3fd62ea1a 1113 * @arg @ref LL_DMA2D_CLUT_COLOR_MODE_RGB888
NYX 0:85b3fd62ea1a 1114 */
NYX 0:85b3fd62ea1a 1115 __STATIC_INLINE uint32_t LL_DMA2D_FGND_GetCLUTColorMode(DMA2D_TypeDef *DMA2Dx)
NYX 0:85b3fd62ea1a 1116 {
NYX 0:85b3fd62ea1a 1117 return (uint32_t)(READ_BIT(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_CCM));
NYX 0:85b3fd62ea1a 1118 }
NYX 0:85b3fd62ea1a 1119
NYX 0:85b3fd62ea1a 1120 /**
NYX 0:85b3fd62ea1a 1121 * @}
NYX 0:85b3fd62ea1a 1122 */
NYX 0:85b3fd62ea1a 1123
NYX 0:85b3fd62ea1a 1124 /** @defgroup DMA2D_LL_EF_BGND_Configuration Background Configuration Functions
NYX 0:85b3fd62ea1a 1125 * @{
NYX 0:85b3fd62ea1a 1126 */
NYX 0:85b3fd62ea1a 1127
NYX 0:85b3fd62ea1a 1128 /**
NYX 0:85b3fd62ea1a 1129 * @brief Set DMA2D background memory address, expressed on 32 bits ([31:0] bits).
NYX 0:85b3fd62ea1a 1130 * @rmtoll BGMAR MA LL_DMA2D_BGND_SetMemAddr
NYX 0:85b3fd62ea1a 1131 * @param DMA2Dx DMA2D Instance
NYX 0:85b3fd62ea1a 1132 * @param MemoryAddress Value between Min_Data=0 and Max_Data=0xFFFFFFFF
NYX 0:85b3fd62ea1a 1133 * @retval None
NYX 0:85b3fd62ea1a 1134 */
NYX 0:85b3fd62ea1a 1135 __STATIC_INLINE void LL_DMA2D_BGND_SetMemAddr(DMA2D_TypeDef *DMA2Dx, uint32_t MemoryAddress)
NYX 0:85b3fd62ea1a 1136 {
NYX 0:85b3fd62ea1a 1137 LL_DMA2D_WriteReg(DMA2Dx, BGMAR, MemoryAddress);
NYX 0:85b3fd62ea1a 1138 }
NYX 0:85b3fd62ea1a 1139
NYX 0:85b3fd62ea1a 1140 /**
NYX 0:85b3fd62ea1a 1141 * @brief Get DMA2D background memory address, expressed on 32 bits ([31:0] bits).
NYX 0:85b3fd62ea1a 1142 * @rmtoll BGMAR MA LL_DMA2D_BGND_GetMemAddr
NYX 0:85b3fd62ea1a 1143 * @param DMA2Dx DMA2D Instance
NYX 0:85b3fd62ea1a 1144 * @retval Background memory address value between Min_Data=0 and Max_Data=0xFFFFFFFF
NYX 0:85b3fd62ea1a 1145 */
NYX 0:85b3fd62ea1a 1146 __STATIC_INLINE uint32_t LL_DMA2D_BGND_GetMemAddr(DMA2D_TypeDef *DMA2Dx)
NYX 0:85b3fd62ea1a 1147 {
NYX 0:85b3fd62ea1a 1148 return (uint32_t)(LL_DMA2D_ReadReg(DMA2Dx, BGMAR));
NYX 0:85b3fd62ea1a 1149 }
NYX 0:85b3fd62ea1a 1150
NYX 0:85b3fd62ea1a 1151 /**
NYX 0:85b3fd62ea1a 1152 * @brief Enable DMA2D background CLUT loading.
NYX 0:85b3fd62ea1a 1153 * @rmtoll BGPFCCR START LL_DMA2D_BGND_EnableCLUTLoad
NYX 0:85b3fd62ea1a 1154 * @param DMA2Dx DMA2D Instance
NYX 0:85b3fd62ea1a 1155 * @retval None
NYX 0:85b3fd62ea1a 1156 */
NYX 0:85b3fd62ea1a 1157 __STATIC_INLINE void LL_DMA2D_BGND_EnableCLUTLoad(DMA2D_TypeDef *DMA2Dx)
NYX 0:85b3fd62ea1a 1158 {
NYX 0:85b3fd62ea1a 1159 SET_BIT(DMA2Dx->BGPFCCR, DMA2D_BGPFCCR_START);
NYX 0:85b3fd62ea1a 1160 }
NYX 0:85b3fd62ea1a 1161
NYX 0:85b3fd62ea1a 1162 /**
NYX 0:85b3fd62ea1a 1163 * @brief Indicate if DMA2D background CLUT loading is enabled.
NYX 0:85b3fd62ea1a 1164 * @rmtoll BGPFCCR START LL_DMA2D_BGND_IsEnabledCLUTLoad
NYX 0:85b3fd62ea1a 1165 * @param DMA2Dx DMA2D Instance
NYX 0:85b3fd62ea1a 1166 * @retval State of bit (1 or 0).
NYX 0:85b3fd62ea1a 1167 */
NYX 0:85b3fd62ea1a 1168 __STATIC_INLINE uint32_t LL_DMA2D_BGND_IsEnabledCLUTLoad(DMA2D_TypeDef *DMA2Dx)
NYX 0:85b3fd62ea1a 1169 {
NYX 0:85b3fd62ea1a 1170 return (READ_BIT(DMA2Dx->BGPFCCR, DMA2D_BGPFCCR_START) == (DMA2D_BGPFCCR_START));
NYX 0:85b3fd62ea1a 1171 }
NYX 0:85b3fd62ea1a 1172
NYX 0:85b3fd62ea1a 1173 /**
NYX 0:85b3fd62ea1a 1174 * @brief Set DMA2D background color mode.
NYX 0:85b3fd62ea1a 1175 * @rmtoll BGPFCCR CM LL_DMA2D_BGND_SetColorMode
NYX 0:85b3fd62ea1a 1176 * @param DMA2Dx DMA2D Instance
NYX 0:85b3fd62ea1a 1177 * @param ColorMode This parameter can be one of the following values:
NYX 0:85b3fd62ea1a 1178 * @arg @ref LL_DMA2D_INPUT_MODE_ARGB8888
NYX 0:85b3fd62ea1a 1179 * @arg @ref LL_DMA2D_INPUT_MODE_RGB888
NYX 0:85b3fd62ea1a 1180 * @arg @ref LL_DMA2D_INPUT_MODE_RGB565
NYX 0:85b3fd62ea1a 1181 * @arg @ref LL_DMA2D_INPUT_MODE_ARGB1555
NYX 0:85b3fd62ea1a 1182 * @arg @ref LL_DMA2D_INPUT_MODE_ARGB4444
NYX 0:85b3fd62ea1a 1183 * @arg @ref LL_DMA2D_INPUT_MODE_L8
NYX 0:85b3fd62ea1a 1184 * @arg @ref LL_DMA2D_INPUT_MODE_AL44
NYX 0:85b3fd62ea1a 1185 * @arg @ref LL_DMA2D_INPUT_MODE_AL88
NYX 0:85b3fd62ea1a 1186 * @arg @ref LL_DMA2D_INPUT_MODE_L4
NYX 0:85b3fd62ea1a 1187 * @arg @ref LL_DMA2D_INPUT_MODE_A8
NYX 0:85b3fd62ea1a 1188 * @arg @ref LL_DMA2D_INPUT_MODE_A4
NYX 0:85b3fd62ea1a 1189 * @retval None
NYX 0:85b3fd62ea1a 1190 */
NYX 0:85b3fd62ea1a 1191 __STATIC_INLINE void LL_DMA2D_BGND_SetColorMode(DMA2D_TypeDef *DMA2Dx, uint32_t ColorMode)
NYX 0:85b3fd62ea1a 1192 {
NYX 0:85b3fd62ea1a 1193 MODIFY_REG(DMA2Dx->BGPFCCR, DMA2D_BGPFCCR_CM, ColorMode);
NYX 0:85b3fd62ea1a 1194 }
NYX 0:85b3fd62ea1a 1195
NYX 0:85b3fd62ea1a 1196 /**
NYX 0:85b3fd62ea1a 1197 * @brief Return DMA2D background color mode.
NYX 0:85b3fd62ea1a 1198 * @rmtoll BGPFCCR CM LL_DMA2D_BGND_GetColorMode
NYX 0:85b3fd62ea1a 1199 * @param DMA2Dx DMA2D Instance
NYX 0:85b3fd62ea1a 1200 * @retval Returned value can be one of the following values:
NYX 0:85b3fd62ea1a 1201 * @arg @ref LL_DMA2D_INPUT_MODE_ARGB8888
NYX 0:85b3fd62ea1a 1202 * @arg @ref LL_DMA2D_INPUT_MODE_RGB888
NYX 0:85b3fd62ea1a 1203 * @arg @ref LL_DMA2D_INPUT_MODE_RGB565
NYX 0:85b3fd62ea1a 1204 * @arg @ref LL_DMA2D_INPUT_MODE_ARGB1555
NYX 0:85b3fd62ea1a 1205 * @arg @ref LL_DMA2D_INPUT_MODE_ARGB4444
NYX 0:85b3fd62ea1a 1206 * @arg @ref LL_DMA2D_INPUT_MODE_L8
NYX 0:85b3fd62ea1a 1207 * @arg @ref LL_DMA2D_INPUT_MODE_AL44
NYX 0:85b3fd62ea1a 1208 * @arg @ref LL_DMA2D_INPUT_MODE_AL88
NYX 0:85b3fd62ea1a 1209 * @arg @ref LL_DMA2D_INPUT_MODE_L4
NYX 0:85b3fd62ea1a 1210 * @arg @ref LL_DMA2D_INPUT_MODE_A8
NYX 0:85b3fd62ea1a 1211 * @arg @ref LL_DMA2D_INPUT_MODE_A4
NYX 0:85b3fd62ea1a 1212 */
NYX 0:85b3fd62ea1a 1213 __STATIC_INLINE uint32_t LL_DMA2D_BGND_GetColorMode(DMA2D_TypeDef *DMA2Dx)
NYX 0:85b3fd62ea1a 1214 {
NYX 0:85b3fd62ea1a 1215 return (uint32_t)(READ_BIT(DMA2Dx->BGPFCCR, DMA2D_BGPFCCR_CM));
NYX 0:85b3fd62ea1a 1216 }
NYX 0:85b3fd62ea1a 1217
NYX 0:85b3fd62ea1a 1218 /**
NYX 0:85b3fd62ea1a 1219 * @brief Set DMA2D background alpha mode.
NYX 0:85b3fd62ea1a 1220 * @rmtoll BGPFCCR AM LL_DMA2D_BGND_SetAlphaMode
NYX 0:85b3fd62ea1a 1221 * @param DMA2Dx DMA2D Instance
NYX 0:85b3fd62ea1a 1222 * @param AphaMode This parameter can be one of the following values:
NYX 0:85b3fd62ea1a 1223 * @arg @ref LL_DMA2D_ALPHA_MODE_NO_MODIF
NYX 0:85b3fd62ea1a 1224 * @arg @ref LL_DMA2D_ALPHA_MODE_REPLACE
NYX 0:85b3fd62ea1a 1225 * @arg @ref LL_DMA2D_ALPHA_MODE_COMBINE
NYX 0:85b3fd62ea1a 1226 * @retval None
NYX 0:85b3fd62ea1a 1227 */
NYX 0:85b3fd62ea1a 1228 __STATIC_INLINE void LL_DMA2D_BGND_SetAlphaMode(DMA2D_TypeDef *DMA2Dx, uint32_t AphaMode)
NYX 0:85b3fd62ea1a 1229 {
NYX 0:85b3fd62ea1a 1230 MODIFY_REG(DMA2Dx->BGPFCCR, DMA2D_BGPFCCR_AM, AphaMode);
NYX 0:85b3fd62ea1a 1231 }
NYX 0:85b3fd62ea1a 1232
NYX 0:85b3fd62ea1a 1233 /**
NYX 0:85b3fd62ea1a 1234 * @brief Return DMA2D background alpha mode.
NYX 0:85b3fd62ea1a 1235 * @rmtoll BGPFCCR AM LL_DMA2D_BGND_GetAlphaMode
NYX 0:85b3fd62ea1a 1236 * @param DMA2Dx DMA2D Instance
NYX 0:85b3fd62ea1a 1237 * @retval Returned value can be one of the following values:
NYX 0:85b3fd62ea1a 1238 * @arg @ref LL_DMA2D_ALPHA_MODE_NO_MODIF
NYX 0:85b3fd62ea1a 1239 * @arg @ref LL_DMA2D_ALPHA_MODE_REPLACE
NYX 0:85b3fd62ea1a 1240 * @arg @ref LL_DMA2D_ALPHA_MODE_COMBINE
NYX 0:85b3fd62ea1a 1241 */
NYX 0:85b3fd62ea1a 1242 __STATIC_INLINE uint32_t LL_DMA2D_BGND_GetAlphaMode(DMA2D_TypeDef *DMA2Dx)
NYX 0:85b3fd62ea1a 1243 {
NYX 0:85b3fd62ea1a 1244 return (uint32_t)(READ_BIT(DMA2Dx->BGPFCCR, DMA2D_BGPFCCR_AM));
NYX 0:85b3fd62ea1a 1245 }
NYX 0:85b3fd62ea1a 1246
NYX 0:85b3fd62ea1a 1247 /**
NYX 0:85b3fd62ea1a 1248 * @brief Set DMA2D background alpha value, expressed on 8 bits ([7:0] bits).
NYX 0:85b3fd62ea1a 1249 * @rmtoll BGPFCCR ALPHA LL_DMA2D_BGND_SetAlpha
NYX 0:85b3fd62ea1a 1250 * @param DMA2Dx DMA2D Instance
NYX 0:85b3fd62ea1a 1251 * @param Alpha Value between Min_Data=0 and Max_Data=0xFF
NYX 0:85b3fd62ea1a 1252 * @retval None
NYX 0:85b3fd62ea1a 1253 */
NYX 0:85b3fd62ea1a 1254 __STATIC_INLINE void LL_DMA2D_BGND_SetAlpha(DMA2D_TypeDef *DMA2Dx, uint32_t Alpha)
NYX 0:85b3fd62ea1a 1255 {
NYX 0:85b3fd62ea1a 1256 MODIFY_REG(DMA2Dx->BGPFCCR, DMA2D_BGPFCCR_ALPHA, (Alpha << DMA2D_BGPFCCR_ALPHA_Pos));
NYX 0:85b3fd62ea1a 1257 }
NYX 0:85b3fd62ea1a 1258
NYX 0:85b3fd62ea1a 1259 /**
NYX 0:85b3fd62ea1a 1260 * @brief Return DMA2D background alpha value, expressed on 8 bits ([7:0] bits).
NYX 0:85b3fd62ea1a 1261 * @rmtoll BGPFCCR ALPHA LL_DMA2D_BGND_GetAlpha
NYX 0:85b3fd62ea1a 1262 * @param DMA2Dx DMA2D Instance
NYX 0:85b3fd62ea1a 1263 * @retval Alpha value between Min_Data=0 and Max_Data=0xFF
NYX 0:85b3fd62ea1a 1264 */
NYX 0:85b3fd62ea1a 1265 __STATIC_INLINE uint32_t LL_DMA2D_BGND_GetAlpha(DMA2D_TypeDef *DMA2Dx)
NYX 0:85b3fd62ea1a 1266 {
NYX 0:85b3fd62ea1a 1267 return (uint32_t)(READ_BIT(DMA2Dx->BGPFCCR, DMA2D_BGPFCCR_ALPHA) >> DMA2D_BGPFCCR_ALPHA_Pos);
NYX 0:85b3fd62ea1a 1268 }
NYX 0:85b3fd62ea1a 1269
NYX 0:85b3fd62ea1a 1270 /**
NYX 0:85b3fd62ea1a 1271 * @brief Set DMA2D background line offset, expressed on 14 bits ([13:0] bits).
NYX 0:85b3fd62ea1a 1272 * @rmtoll BGOR LO LL_DMA2D_BGND_SetLineOffset
NYX 0:85b3fd62ea1a 1273 * @param DMA2Dx DMA2D Instance
NYX 0:85b3fd62ea1a 1274 * @param LineOffset Value between Min_Data=0 and Max_Data=0x3FF
NYX 0:85b3fd62ea1a 1275 * @retval None
NYX 0:85b3fd62ea1a 1276 */
NYX 0:85b3fd62ea1a 1277 __STATIC_INLINE void LL_DMA2D_BGND_SetLineOffset(DMA2D_TypeDef *DMA2Dx, uint32_t LineOffset)
NYX 0:85b3fd62ea1a 1278 {
NYX 0:85b3fd62ea1a 1279 MODIFY_REG(DMA2Dx->BGOR, DMA2D_BGOR_LO, LineOffset);
NYX 0:85b3fd62ea1a 1280 }
NYX 0:85b3fd62ea1a 1281
NYX 0:85b3fd62ea1a 1282 /**
NYX 0:85b3fd62ea1a 1283 * @brief Return DMA2D background line offset, expressed on 14 bits ([13:0] bits).
NYX 0:85b3fd62ea1a 1284 * @rmtoll BGOR LO LL_DMA2D_BGND_GetLineOffset
NYX 0:85b3fd62ea1a 1285 * @param DMA2Dx DMA2D Instance
NYX 0:85b3fd62ea1a 1286 * @retval Background line offset value between Min_Data=0 and Max_Data=0x3FF
NYX 0:85b3fd62ea1a 1287 */
NYX 0:85b3fd62ea1a 1288 __STATIC_INLINE uint32_t LL_DMA2D_BGND_GetLineOffset(DMA2D_TypeDef *DMA2Dx)
NYX 0:85b3fd62ea1a 1289 {
NYX 0:85b3fd62ea1a 1290 return (uint32_t)(READ_BIT(DMA2Dx->BGOR, DMA2D_BGOR_LO));
NYX 0:85b3fd62ea1a 1291 }
NYX 0:85b3fd62ea1a 1292
NYX 0:85b3fd62ea1a 1293 /**
NYX 0:85b3fd62ea1a 1294 * @brief Set DMA2D background color values, expressed on 24 bits ([23:0] bits).
NYX 0:85b3fd62ea1a 1295 * @rmtoll BGCOLR RED LL_DMA2D_BGND_SetColor
NYX 0:85b3fd62ea1a 1296 * @rmtoll BGCOLR GREEN LL_DMA2D_BGND_SetColor
NYX 0:85b3fd62ea1a 1297 * @rmtoll BGCOLR BLUE LL_DMA2D_BGND_SetColor
NYX 0:85b3fd62ea1a 1298 * @param DMA2Dx DMA2D Instance
NYX 0:85b3fd62ea1a 1299 * @param Red Value between Min_Data=0 and Max_Data=0xFF
NYX 0:85b3fd62ea1a 1300 * @param Green Value between Min_Data=0 and Max_Data=0xFF
NYX 0:85b3fd62ea1a 1301 * @param Blue Value between Min_Data=0 and Max_Data=0xFF
NYX 0:85b3fd62ea1a 1302 * @retval None
NYX 0:85b3fd62ea1a 1303 */
NYX 0:85b3fd62ea1a 1304 __STATIC_INLINE void LL_DMA2D_BGND_SetColor(DMA2D_TypeDef *DMA2Dx, uint32_t Red, uint32_t Green, uint32_t Blue)
NYX 0:85b3fd62ea1a 1305 {
NYX 0:85b3fd62ea1a 1306 MODIFY_REG(DMA2Dx->BGCOLR, (DMA2D_BGCOLR_RED | DMA2D_BGCOLR_GREEN | DMA2D_BGCOLR_BLUE), \
NYX 0:85b3fd62ea1a 1307 ((Red << DMA2D_BGCOLR_RED_Pos) | (Green << DMA2D_BGCOLR_GREEN_Pos) | Blue));
NYX 0:85b3fd62ea1a 1308 }
NYX 0:85b3fd62ea1a 1309
NYX 0:85b3fd62ea1a 1310 /**
NYX 0:85b3fd62ea1a 1311 * @brief Set DMA2D background red color value, expressed on 8 bits ([7:0] bits).
NYX 0:85b3fd62ea1a 1312 * @rmtoll BGCOLR RED LL_DMA2D_BGND_SetRedColor
NYX 0:85b3fd62ea1a 1313 * @param DMA2Dx DMA2D Instance
NYX 0:85b3fd62ea1a 1314 * @param Red Value between Min_Data=0 and Max_Data=0xFF
NYX 0:85b3fd62ea1a 1315 * @retval None
NYX 0:85b3fd62ea1a 1316 */
NYX 0:85b3fd62ea1a 1317 __STATIC_INLINE void LL_DMA2D_BGND_SetRedColor(DMA2D_TypeDef *DMA2Dx, uint32_t Red)
NYX 0:85b3fd62ea1a 1318 {
NYX 0:85b3fd62ea1a 1319 MODIFY_REG(DMA2Dx->BGCOLR, DMA2D_BGCOLR_RED, (Red << DMA2D_BGCOLR_RED_Pos));
NYX 0:85b3fd62ea1a 1320 }
NYX 0:85b3fd62ea1a 1321
NYX 0:85b3fd62ea1a 1322 /**
NYX 0:85b3fd62ea1a 1323 * @brief Return DMA2D background red color value, expressed on 8 bits ([7:0] bits).
NYX 0:85b3fd62ea1a 1324 * @rmtoll BGCOLR RED LL_DMA2D_BGND_GetRedColor
NYX 0:85b3fd62ea1a 1325 * @param DMA2Dx DMA2D Instance
NYX 0:85b3fd62ea1a 1326 * @retval Red color value between Min_Data=0 and Max_Data=0xFF
NYX 0:85b3fd62ea1a 1327 */
NYX 0:85b3fd62ea1a 1328 __STATIC_INLINE uint32_t LL_DMA2D_BGND_GetRedColor(DMA2D_TypeDef *DMA2Dx)
NYX 0:85b3fd62ea1a 1329 {
NYX 0:85b3fd62ea1a 1330 return (uint32_t)(READ_BIT(DMA2Dx->BGCOLR, DMA2D_BGCOLR_RED) >> DMA2D_BGCOLR_RED_Pos);
NYX 0:85b3fd62ea1a 1331 }
NYX 0:85b3fd62ea1a 1332
NYX 0:85b3fd62ea1a 1333 /**
NYX 0:85b3fd62ea1a 1334 * @brief Set DMA2D background green color value, expressed on 8 bits ([7:0] bits).
NYX 0:85b3fd62ea1a 1335 * @rmtoll BGCOLR GREEN LL_DMA2D_BGND_SetGreenColor
NYX 0:85b3fd62ea1a 1336 * @param DMA2Dx DMA2D Instance
NYX 0:85b3fd62ea1a 1337 * @param Green Value between Min_Data=0 and Max_Data=0xFF
NYX 0:85b3fd62ea1a 1338 * @retval None
NYX 0:85b3fd62ea1a 1339 */
NYX 0:85b3fd62ea1a 1340 __STATIC_INLINE void LL_DMA2D_BGND_SetGreenColor(DMA2D_TypeDef *DMA2Dx, uint32_t Green)
NYX 0:85b3fd62ea1a 1341 {
NYX 0:85b3fd62ea1a 1342 MODIFY_REG(DMA2Dx->BGCOLR, DMA2D_BGCOLR_GREEN, (Green << DMA2D_BGCOLR_GREEN_Pos));
NYX 0:85b3fd62ea1a 1343 }
NYX 0:85b3fd62ea1a 1344
NYX 0:85b3fd62ea1a 1345 /**
NYX 0:85b3fd62ea1a 1346 * @brief Return DMA2D background green color value, expressed on 8 bits ([7:0] bits).
NYX 0:85b3fd62ea1a 1347 * @rmtoll BGCOLR GREEN LL_DMA2D_BGND_GetGreenColor
NYX 0:85b3fd62ea1a 1348 * @param DMA2Dx DMA2D Instance
NYX 0:85b3fd62ea1a 1349 * @retval Green color value between Min_Data=0 and Max_Data=0xFF
NYX 0:85b3fd62ea1a 1350 */
NYX 0:85b3fd62ea1a 1351 __STATIC_INLINE uint32_t LL_DMA2D_BGND_GetGreenColor(DMA2D_TypeDef *DMA2Dx)
NYX 0:85b3fd62ea1a 1352 {
NYX 0:85b3fd62ea1a 1353 return (uint32_t)(READ_BIT(DMA2Dx->BGCOLR, DMA2D_BGCOLR_GREEN) >> DMA2D_BGCOLR_GREEN_Pos);
NYX 0:85b3fd62ea1a 1354 }
NYX 0:85b3fd62ea1a 1355
NYX 0:85b3fd62ea1a 1356 /**
NYX 0:85b3fd62ea1a 1357 * @brief Set DMA2D background blue color value, expressed on 8 bits ([7:0] bits).
NYX 0:85b3fd62ea1a 1358 * @rmtoll BGCOLR BLUE LL_DMA2D_BGND_SetBlueColor
NYX 0:85b3fd62ea1a 1359 * @param DMA2Dx DMA2D Instance
NYX 0:85b3fd62ea1a 1360 * @param Blue Value between Min_Data=0 and Max_Data=0xFF
NYX 0:85b3fd62ea1a 1361 * @retval None
NYX 0:85b3fd62ea1a 1362 */
NYX 0:85b3fd62ea1a 1363 __STATIC_INLINE void LL_DMA2D_BGND_SetBlueColor(DMA2D_TypeDef *DMA2Dx, uint32_t Blue)
NYX 0:85b3fd62ea1a 1364 {
NYX 0:85b3fd62ea1a 1365 MODIFY_REG(DMA2Dx->BGCOLR, DMA2D_BGCOLR_BLUE, Blue);
NYX 0:85b3fd62ea1a 1366 }
NYX 0:85b3fd62ea1a 1367
NYX 0:85b3fd62ea1a 1368 /**
NYX 0:85b3fd62ea1a 1369 * @brief Return DMA2D background blue color value, expressed on 8 bits ([7:0] bits).
NYX 0:85b3fd62ea1a 1370 * @rmtoll BGCOLR BLUE LL_DMA2D_BGND_GetBlueColor
NYX 0:85b3fd62ea1a 1371 * @param DMA2Dx DMA2D Instance
NYX 0:85b3fd62ea1a 1372 * @retval Blue color value between Min_Data=0 and Max_Data=0xFF
NYX 0:85b3fd62ea1a 1373 */
NYX 0:85b3fd62ea1a 1374 __STATIC_INLINE uint32_t LL_DMA2D_BGND_GetBlueColor(DMA2D_TypeDef *DMA2Dx)
NYX 0:85b3fd62ea1a 1375 {
NYX 0:85b3fd62ea1a 1376 return (uint32_t)(READ_BIT(DMA2Dx->BGCOLR, DMA2D_BGCOLR_BLUE));
NYX 0:85b3fd62ea1a 1377 }
NYX 0:85b3fd62ea1a 1378
NYX 0:85b3fd62ea1a 1379 /**
NYX 0:85b3fd62ea1a 1380 * @brief Set DMA2D background CLUT memory address, expressed on 32 bits ([31:0] bits).
NYX 0:85b3fd62ea1a 1381 * @rmtoll BGCMAR MA LL_DMA2D_BGND_SetCLUTMemAddr
NYX 0:85b3fd62ea1a 1382 * @param DMA2Dx DMA2D Instance
NYX 0:85b3fd62ea1a 1383 * @param CLUTMemoryAddress Value between Min_Data=0 and Max_Data=0xFFFFFFFF
NYX 0:85b3fd62ea1a 1384 * @retval None
NYX 0:85b3fd62ea1a 1385 */
NYX 0:85b3fd62ea1a 1386 __STATIC_INLINE void LL_DMA2D_BGND_SetCLUTMemAddr(DMA2D_TypeDef *DMA2Dx, uint32_t CLUTMemoryAddress)
NYX 0:85b3fd62ea1a 1387 {
NYX 0:85b3fd62ea1a 1388 LL_DMA2D_WriteReg(DMA2Dx, BGCMAR, CLUTMemoryAddress);
NYX 0:85b3fd62ea1a 1389 }
NYX 0:85b3fd62ea1a 1390
NYX 0:85b3fd62ea1a 1391 /**
NYX 0:85b3fd62ea1a 1392 * @brief Get DMA2D background CLUT memory address, expressed on 32 bits ([31:0] bits).
NYX 0:85b3fd62ea1a 1393 * @rmtoll BGCMAR MA LL_DMA2D_BGND_GetCLUTMemAddr
NYX 0:85b3fd62ea1a 1394 * @param DMA2Dx DMA2D Instance
NYX 0:85b3fd62ea1a 1395 * @retval Background CLUT memory address value between Min_Data=0 and Max_Data=0xFFFFFFFF
NYX 0:85b3fd62ea1a 1396 */
NYX 0:85b3fd62ea1a 1397 __STATIC_INLINE uint32_t LL_DMA2D_BGND_GetCLUTMemAddr(DMA2D_TypeDef *DMA2Dx)
NYX 0:85b3fd62ea1a 1398 {
NYX 0:85b3fd62ea1a 1399 return (uint32_t)(LL_DMA2D_ReadReg(DMA2Dx, BGCMAR));
NYX 0:85b3fd62ea1a 1400 }
NYX 0:85b3fd62ea1a 1401
NYX 0:85b3fd62ea1a 1402 /**
NYX 0:85b3fd62ea1a 1403 * @brief Set DMA2D background CLUT size, expressed on 8 bits ([7:0] bits).
NYX 0:85b3fd62ea1a 1404 * @rmtoll BGPFCCR CS LL_DMA2D_BGND_SetCLUTSize
NYX 0:85b3fd62ea1a 1405 * @param DMA2Dx DMA2D Instance
NYX 0:85b3fd62ea1a 1406 * @param CLUTSize Value between Min_Data=0 and Max_Data=0xFF
NYX 0:85b3fd62ea1a 1407 * @retval None
NYX 0:85b3fd62ea1a 1408 */
NYX 0:85b3fd62ea1a 1409 __STATIC_INLINE void LL_DMA2D_BGND_SetCLUTSize(DMA2D_TypeDef *DMA2Dx, uint32_t CLUTSize)
NYX 0:85b3fd62ea1a 1410 {
NYX 0:85b3fd62ea1a 1411 MODIFY_REG(DMA2Dx->BGPFCCR, DMA2D_BGPFCCR_CS, (CLUTSize << DMA2D_BGPFCCR_CS_Pos));
NYX 0:85b3fd62ea1a 1412 }
NYX 0:85b3fd62ea1a 1413
NYX 0:85b3fd62ea1a 1414 /**
NYX 0:85b3fd62ea1a 1415 * @brief Get DMA2D background CLUT size, expressed on 8 bits ([7:0] bits).
NYX 0:85b3fd62ea1a 1416 * @rmtoll BGPFCCR CS LL_DMA2D_BGND_GetCLUTSize
NYX 0:85b3fd62ea1a 1417 * @param DMA2Dx DMA2D Instance
NYX 0:85b3fd62ea1a 1418 * @retval Background CLUT size value between Min_Data=0 and Max_Data=0xFF
NYX 0:85b3fd62ea1a 1419 */
NYX 0:85b3fd62ea1a 1420 __STATIC_INLINE uint32_t LL_DMA2D_BGND_GetCLUTSize(DMA2D_TypeDef *DMA2Dx)
NYX 0:85b3fd62ea1a 1421 {
NYX 0:85b3fd62ea1a 1422 return (uint32_t)(READ_BIT(DMA2Dx->BGPFCCR, DMA2D_BGPFCCR_CS) >> DMA2D_BGPFCCR_CS_Pos);
NYX 0:85b3fd62ea1a 1423 }
NYX 0:85b3fd62ea1a 1424
NYX 0:85b3fd62ea1a 1425 /**
NYX 0:85b3fd62ea1a 1426 * @brief Set DMA2D background CLUT color mode.
NYX 0:85b3fd62ea1a 1427 * @rmtoll BGPFCCR CCM LL_DMA2D_BGND_SetCLUTColorMode
NYX 0:85b3fd62ea1a 1428 * @param DMA2Dx DMA2D Instance
NYX 0:85b3fd62ea1a 1429 * @param CLUTColorMode This parameter can be one of the following values:
NYX 0:85b3fd62ea1a 1430 * @arg @ref LL_DMA2D_CLUT_COLOR_MODE_ARGB8888
NYX 0:85b3fd62ea1a 1431 * @arg @ref LL_DMA2D_CLUT_COLOR_MODE_RGB888
NYX 0:85b3fd62ea1a 1432 * @retval None
NYX 0:85b3fd62ea1a 1433 */
NYX 0:85b3fd62ea1a 1434 __STATIC_INLINE void LL_DMA2D_BGND_SetCLUTColorMode(DMA2D_TypeDef *DMA2Dx, uint32_t CLUTColorMode)
NYX 0:85b3fd62ea1a 1435 {
NYX 0:85b3fd62ea1a 1436 MODIFY_REG(DMA2Dx->BGPFCCR, DMA2D_BGPFCCR_CCM, CLUTColorMode);
NYX 0:85b3fd62ea1a 1437 }
NYX 0:85b3fd62ea1a 1438
NYX 0:85b3fd62ea1a 1439 /**
NYX 0:85b3fd62ea1a 1440 * @brief Return DMA2D background CLUT color mode.
NYX 0:85b3fd62ea1a 1441 * @rmtoll BGPFCCR CCM LL_DMA2D_BGND_GetCLUTColorMode
NYX 0:85b3fd62ea1a 1442 * @param DMA2Dx DMA2D Instance
NYX 0:85b3fd62ea1a 1443 * @retval Returned value can be one of the following values:
NYX 0:85b3fd62ea1a 1444 * @arg @ref LL_DMA2D_CLUT_COLOR_MODE_ARGB8888
NYX 0:85b3fd62ea1a 1445 * @arg @ref LL_DMA2D_CLUT_COLOR_MODE_RGB888
NYX 0:85b3fd62ea1a 1446 */
NYX 0:85b3fd62ea1a 1447 __STATIC_INLINE uint32_t LL_DMA2D_BGND_GetCLUTColorMode(DMA2D_TypeDef *DMA2Dx)
NYX 0:85b3fd62ea1a 1448 {
NYX 0:85b3fd62ea1a 1449 return (uint32_t)(READ_BIT(DMA2Dx->BGPFCCR, DMA2D_BGPFCCR_CCM));
NYX 0:85b3fd62ea1a 1450 }
NYX 0:85b3fd62ea1a 1451
NYX 0:85b3fd62ea1a 1452 /**
NYX 0:85b3fd62ea1a 1453 * @}
NYX 0:85b3fd62ea1a 1454 */
NYX 0:85b3fd62ea1a 1455
NYX 0:85b3fd62ea1a 1456 /**
NYX 0:85b3fd62ea1a 1457 * @}
NYX 0:85b3fd62ea1a 1458 */
NYX 0:85b3fd62ea1a 1459
NYX 0:85b3fd62ea1a 1460
NYX 0:85b3fd62ea1a 1461 /** @defgroup DMA2D_LL_EF_FLAG_MANAGEMENT Flag Management
NYX 0:85b3fd62ea1a 1462 * @{
NYX 0:85b3fd62ea1a 1463 */
NYX 0:85b3fd62ea1a 1464
NYX 0:85b3fd62ea1a 1465 /**
NYX 0:85b3fd62ea1a 1466 * @brief Check if the DMA2D Configuration Error Interrupt Flag is set or not
NYX 0:85b3fd62ea1a 1467 * @rmtoll ISR CEIF LL_DMA2D_IsActiveFlag_CE
NYX 0:85b3fd62ea1a 1468 * @param DMA2Dx DMA2D Instance
NYX 0:85b3fd62ea1a 1469 * @retval State of bit (1 or 0).
NYX 0:85b3fd62ea1a 1470 */
NYX 0:85b3fd62ea1a 1471 __STATIC_INLINE uint32_t LL_DMA2D_IsActiveFlag_CE(DMA2D_TypeDef *DMA2Dx)
NYX 0:85b3fd62ea1a 1472 {
NYX 0:85b3fd62ea1a 1473 return (READ_BIT(DMA2Dx->ISR, DMA2D_ISR_CEIF) == (DMA2D_ISR_CEIF));
NYX 0:85b3fd62ea1a 1474 }
NYX 0:85b3fd62ea1a 1475
NYX 0:85b3fd62ea1a 1476 /**
NYX 0:85b3fd62ea1a 1477 * @brief Check if the DMA2D CLUT Transfer Complete Interrupt Flag is set or not
NYX 0:85b3fd62ea1a 1478 * @rmtoll ISR CTCIF LL_DMA2D_IsActiveFlag_CTC
NYX 0:85b3fd62ea1a 1479 * @param DMA2Dx DMA2D Instance
NYX 0:85b3fd62ea1a 1480 * @retval State of bit (1 or 0).
NYX 0:85b3fd62ea1a 1481 */
NYX 0:85b3fd62ea1a 1482 __STATIC_INLINE uint32_t LL_DMA2D_IsActiveFlag_CTC(DMA2D_TypeDef *DMA2Dx)
NYX 0:85b3fd62ea1a 1483 {
NYX 0:85b3fd62ea1a 1484 return (READ_BIT(DMA2Dx->ISR, DMA2D_ISR_CTCIF) == (DMA2D_ISR_CTCIF));
NYX 0:85b3fd62ea1a 1485 }
NYX 0:85b3fd62ea1a 1486
NYX 0:85b3fd62ea1a 1487 /**
NYX 0:85b3fd62ea1a 1488 * @brief Check if the DMA2D CLUT Access Error Interrupt Flag is set or not
NYX 0:85b3fd62ea1a 1489 * @rmtoll ISR CAEIF LL_DMA2D_IsActiveFlag_CAE
NYX 0:85b3fd62ea1a 1490 * @param DMA2Dx DMA2D Instance
NYX 0:85b3fd62ea1a 1491 * @retval State of bit (1 or 0).
NYX 0:85b3fd62ea1a 1492 */
NYX 0:85b3fd62ea1a 1493 __STATIC_INLINE uint32_t LL_DMA2D_IsActiveFlag_CAE(DMA2D_TypeDef *DMA2Dx)
NYX 0:85b3fd62ea1a 1494 {
NYX 0:85b3fd62ea1a 1495 return (READ_BIT(DMA2Dx->ISR, DMA2D_ISR_CAEIF) == (DMA2D_ISR_CAEIF));
NYX 0:85b3fd62ea1a 1496 }
NYX 0:85b3fd62ea1a 1497
NYX 0:85b3fd62ea1a 1498 /**
NYX 0:85b3fd62ea1a 1499 * @brief Check if the DMA2D Transfer Watermark Interrupt Flag is set or not
NYX 0:85b3fd62ea1a 1500 * @rmtoll ISR TWIF LL_DMA2D_IsActiveFlag_TW
NYX 0:85b3fd62ea1a 1501 * @param DMA2Dx DMA2D Instance
NYX 0:85b3fd62ea1a 1502 * @retval State of bit (1 or 0).
NYX 0:85b3fd62ea1a 1503 */
NYX 0:85b3fd62ea1a 1504 __STATIC_INLINE uint32_t LL_DMA2D_IsActiveFlag_TW(DMA2D_TypeDef *DMA2Dx)
NYX 0:85b3fd62ea1a 1505 {
NYX 0:85b3fd62ea1a 1506 return (READ_BIT(DMA2Dx->ISR, DMA2D_ISR_TWIF) == (DMA2D_ISR_TWIF));
NYX 0:85b3fd62ea1a 1507 }
NYX 0:85b3fd62ea1a 1508
NYX 0:85b3fd62ea1a 1509 /**
NYX 0:85b3fd62ea1a 1510 * @brief Check if the DMA2D Transfer Complete Interrupt Flag is set or not
NYX 0:85b3fd62ea1a 1511 * @rmtoll ISR TCIF LL_DMA2D_IsActiveFlag_TC
NYX 0:85b3fd62ea1a 1512 * @param DMA2Dx DMA2D Instance
NYX 0:85b3fd62ea1a 1513 * @retval State of bit (1 or 0).
NYX 0:85b3fd62ea1a 1514 */
NYX 0:85b3fd62ea1a 1515 __STATIC_INLINE uint32_t LL_DMA2D_IsActiveFlag_TC(DMA2D_TypeDef *DMA2Dx)
NYX 0:85b3fd62ea1a 1516 {
NYX 0:85b3fd62ea1a 1517 return (READ_BIT(DMA2Dx->ISR, DMA2D_ISR_TCIF) == (DMA2D_ISR_TCIF));
NYX 0:85b3fd62ea1a 1518 }
NYX 0:85b3fd62ea1a 1519
NYX 0:85b3fd62ea1a 1520 /**
NYX 0:85b3fd62ea1a 1521 * @brief Check if the DMA2D Transfer Error Interrupt Flag is set or not
NYX 0:85b3fd62ea1a 1522 * @rmtoll ISR TEIF LL_DMA2D_IsActiveFlag_TE
NYX 0:85b3fd62ea1a 1523 * @param DMA2Dx DMA2D Instance
NYX 0:85b3fd62ea1a 1524 * @retval State of bit (1 or 0).
NYX 0:85b3fd62ea1a 1525 */
NYX 0:85b3fd62ea1a 1526 __STATIC_INLINE uint32_t LL_DMA2D_IsActiveFlag_TE(DMA2D_TypeDef *DMA2Dx)
NYX 0:85b3fd62ea1a 1527 {
NYX 0:85b3fd62ea1a 1528 return (READ_BIT(DMA2Dx->ISR, DMA2D_ISR_TEIF) == (DMA2D_ISR_TEIF));
NYX 0:85b3fd62ea1a 1529 }
NYX 0:85b3fd62ea1a 1530
NYX 0:85b3fd62ea1a 1531 /**
NYX 0:85b3fd62ea1a 1532 * @brief Clear DMA2D Configuration Error Interrupt Flag
NYX 0:85b3fd62ea1a 1533 * @rmtoll IFCR CCEIF LL_DMA2D_ClearFlag_CE
NYX 0:85b3fd62ea1a 1534 * @param DMA2Dx DMA2D Instance
NYX 0:85b3fd62ea1a 1535 * @retval None
NYX 0:85b3fd62ea1a 1536 */
NYX 0:85b3fd62ea1a 1537 __STATIC_INLINE void LL_DMA2D_ClearFlag_CE(DMA2D_TypeDef *DMA2Dx)
NYX 0:85b3fd62ea1a 1538 {
NYX 0:85b3fd62ea1a 1539 WRITE_REG(DMA2Dx->IFCR, DMA2D_IFCR_CCEIF);
NYX 0:85b3fd62ea1a 1540 }
NYX 0:85b3fd62ea1a 1541
NYX 0:85b3fd62ea1a 1542 /**
NYX 0:85b3fd62ea1a 1543 * @brief Clear DMA2D CLUT Transfer Complete Interrupt Flag
NYX 0:85b3fd62ea1a 1544 * @rmtoll IFCR CCTCIF LL_DMA2D_ClearFlag_CTC
NYX 0:85b3fd62ea1a 1545 * @param DMA2Dx DMA2D Instance
NYX 0:85b3fd62ea1a 1546 * @retval None
NYX 0:85b3fd62ea1a 1547 */
NYX 0:85b3fd62ea1a 1548 __STATIC_INLINE void LL_DMA2D_ClearFlag_CTC(DMA2D_TypeDef *DMA2Dx)
NYX 0:85b3fd62ea1a 1549 {
NYX 0:85b3fd62ea1a 1550 WRITE_REG(DMA2Dx->IFCR, DMA2D_IFCR_CCTCIF);
NYX 0:85b3fd62ea1a 1551 }
NYX 0:85b3fd62ea1a 1552
NYX 0:85b3fd62ea1a 1553 /**
NYX 0:85b3fd62ea1a 1554 * @brief Clear DMA2D CLUT Access Error Interrupt Flag
NYX 0:85b3fd62ea1a 1555 * @rmtoll IFCR CAECIF LL_DMA2D_ClearFlag_CAE
NYX 0:85b3fd62ea1a 1556 * @param DMA2Dx DMA2D Instance
NYX 0:85b3fd62ea1a 1557 * @retval None
NYX 0:85b3fd62ea1a 1558 */
NYX 0:85b3fd62ea1a 1559 __STATIC_INLINE void LL_DMA2D_ClearFlag_CAE(DMA2D_TypeDef *DMA2Dx)
NYX 0:85b3fd62ea1a 1560 {
NYX 0:85b3fd62ea1a 1561 WRITE_REG(DMA2Dx->IFCR, DMA2D_IFCR_CAECIF);
NYX 0:85b3fd62ea1a 1562 }
NYX 0:85b3fd62ea1a 1563
NYX 0:85b3fd62ea1a 1564 /**
NYX 0:85b3fd62ea1a 1565 * @brief Clear DMA2D Transfer Watermark Interrupt Flag
NYX 0:85b3fd62ea1a 1566 * @rmtoll IFCR CTWIF LL_DMA2D_ClearFlag_TW
NYX 0:85b3fd62ea1a 1567 * @param DMA2Dx DMA2D Instance
NYX 0:85b3fd62ea1a 1568 * @retval None
NYX 0:85b3fd62ea1a 1569 */
NYX 0:85b3fd62ea1a 1570 __STATIC_INLINE void LL_DMA2D_ClearFlag_TW(DMA2D_TypeDef *DMA2Dx)
NYX 0:85b3fd62ea1a 1571 {
NYX 0:85b3fd62ea1a 1572 WRITE_REG(DMA2Dx->IFCR, DMA2D_IFCR_CTWIF);
NYX 0:85b3fd62ea1a 1573 }
NYX 0:85b3fd62ea1a 1574
NYX 0:85b3fd62ea1a 1575 /**
NYX 0:85b3fd62ea1a 1576 * @brief Clear DMA2D Transfer Complete Interrupt Flag
NYX 0:85b3fd62ea1a 1577 * @rmtoll IFCR CTCIF LL_DMA2D_ClearFlag_TC
NYX 0:85b3fd62ea1a 1578 * @param DMA2Dx DMA2D Instance
NYX 0:85b3fd62ea1a 1579 * @retval None
NYX 0:85b3fd62ea1a 1580 */
NYX 0:85b3fd62ea1a 1581 __STATIC_INLINE void LL_DMA2D_ClearFlag_TC(DMA2D_TypeDef *DMA2Dx)
NYX 0:85b3fd62ea1a 1582 {
NYX 0:85b3fd62ea1a 1583 WRITE_REG(DMA2Dx->IFCR, DMA2D_IFCR_CTCIF);
NYX 0:85b3fd62ea1a 1584 }
NYX 0:85b3fd62ea1a 1585
NYX 0:85b3fd62ea1a 1586 /**
NYX 0:85b3fd62ea1a 1587 * @brief Clear DMA2D Transfer Error Interrupt Flag
NYX 0:85b3fd62ea1a 1588 * @rmtoll IFCR CTEIF LL_DMA2D_ClearFlag_TE
NYX 0:85b3fd62ea1a 1589 * @param DMA2Dx DMA2D Instance
NYX 0:85b3fd62ea1a 1590 * @retval None
NYX 0:85b3fd62ea1a 1591 */
NYX 0:85b3fd62ea1a 1592 __STATIC_INLINE void LL_DMA2D_ClearFlag_TE(DMA2D_TypeDef *DMA2Dx)
NYX 0:85b3fd62ea1a 1593 {
NYX 0:85b3fd62ea1a 1594 WRITE_REG(DMA2Dx->IFCR, DMA2D_IFCR_CTEIF);
NYX 0:85b3fd62ea1a 1595 }
NYX 0:85b3fd62ea1a 1596
NYX 0:85b3fd62ea1a 1597 /**
NYX 0:85b3fd62ea1a 1598 * @}
NYX 0:85b3fd62ea1a 1599 */
NYX 0:85b3fd62ea1a 1600
NYX 0:85b3fd62ea1a 1601 /** @defgroup DMA2D_LL_EF_IT_MANAGEMENT Interruption Management
NYX 0:85b3fd62ea1a 1602 * @{
NYX 0:85b3fd62ea1a 1603 */
NYX 0:85b3fd62ea1a 1604
NYX 0:85b3fd62ea1a 1605 /**
NYX 0:85b3fd62ea1a 1606 * @brief Enable Configuration Error Interrupt
NYX 0:85b3fd62ea1a 1607 * @rmtoll CR CEIE LL_DMA2D_EnableIT_CE
NYX 0:85b3fd62ea1a 1608 * @param DMA2Dx DMA2D Instance
NYX 0:85b3fd62ea1a 1609 * @retval None
NYX 0:85b3fd62ea1a 1610 */
NYX 0:85b3fd62ea1a 1611 __STATIC_INLINE void LL_DMA2D_EnableIT_CE(DMA2D_TypeDef *DMA2Dx)
NYX 0:85b3fd62ea1a 1612 {
NYX 0:85b3fd62ea1a 1613 SET_BIT(DMA2Dx->CR, DMA2D_CR_CEIE);
NYX 0:85b3fd62ea1a 1614 }
NYX 0:85b3fd62ea1a 1615
NYX 0:85b3fd62ea1a 1616 /**
NYX 0:85b3fd62ea1a 1617 * @brief Enable CLUT Transfer Complete Interrupt
NYX 0:85b3fd62ea1a 1618 * @rmtoll CR CTCIE LL_DMA2D_EnableIT_CTC
NYX 0:85b3fd62ea1a 1619 * @param DMA2Dx DMA2D Instance
NYX 0:85b3fd62ea1a 1620 * @retval None
NYX 0:85b3fd62ea1a 1621 */
NYX 0:85b3fd62ea1a 1622 __STATIC_INLINE void LL_DMA2D_EnableIT_CTC(DMA2D_TypeDef *DMA2Dx)
NYX 0:85b3fd62ea1a 1623 {
NYX 0:85b3fd62ea1a 1624 SET_BIT(DMA2Dx->CR, DMA2D_CR_CTCIE);
NYX 0:85b3fd62ea1a 1625 }
NYX 0:85b3fd62ea1a 1626
NYX 0:85b3fd62ea1a 1627 /**
NYX 0:85b3fd62ea1a 1628 * @brief Enable CLUT Access Error Interrupt
NYX 0:85b3fd62ea1a 1629 * @rmtoll CR CAEIE LL_DMA2D_EnableIT_CAE
NYX 0:85b3fd62ea1a 1630 * @param DMA2Dx DMA2D Instance
NYX 0:85b3fd62ea1a 1631 * @retval None
NYX 0:85b3fd62ea1a 1632 */
NYX 0:85b3fd62ea1a 1633 __STATIC_INLINE void LL_DMA2D_EnableIT_CAE(DMA2D_TypeDef *DMA2Dx)
NYX 0:85b3fd62ea1a 1634 {
NYX 0:85b3fd62ea1a 1635 SET_BIT(DMA2Dx->CR, DMA2D_CR_CAEIE);
NYX 0:85b3fd62ea1a 1636 }
NYX 0:85b3fd62ea1a 1637
NYX 0:85b3fd62ea1a 1638 /**
NYX 0:85b3fd62ea1a 1639 * @brief Enable Transfer Watermark Interrupt
NYX 0:85b3fd62ea1a 1640 * @rmtoll CR TWIE LL_DMA2D_EnableIT_TW
NYX 0:85b3fd62ea1a 1641 * @param DMA2Dx DMA2D Instance
NYX 0:85b3fd62ea1a 1642 * @retval None
NYX 0:85b3fd62ea1a 1643 */
NYX 0:85b3fd62ea1a 1644 __STATIC_INLINE void LL_DMA2D_EnableIT_TW(DMA2D_TypeDef *DMA2Dx)
NYX 0:85b3fd62ea1a 1645 {
NYX 0:85b3fd62ea1a 1646 SET_BIT(DMA2Dx->CR, DMA2D_CR_TWIE);
NYX 0:85b3fd62ea1a 1647 }
NYX 0:85b3fd62ea1a 1648
NYX 0:85b3fd62ea1a 1649 /**
NYX 0:85b3fd62ea1a 1650 * @brief Enable Transfer Complete Interrupt
NYX 0:85b3fd62ea1a 1651 * @rmtoll CR TCIE LL_DMA2D_EnableIT_TC
NYX 0:85b3fd62ea1a 1652 * @param DMA2Dx DMA2D Instance
NYX 0:85b3fd62ea1a 1653 * @retval None
NYX 0:85b3fd62ea1a 1654 */
NYX 0:85b3fd62ea1a 1655 __STATIC_INLINE void LL_DMA2D_EnableIT_TC(DMA2D_TypeDef *DMA2Dx)
NYX 0:85b3fd62ea1a 1656 {
NYX 0:85b3fd62ea1a 1657 SET_BIT(DMA2Dx->CR, DMA2D_CR_TCIE);
NYX 0:85b3fd62ea1a 1658 }
NYX 0:85b3fd62ea1a 1659
NYX 0:85b3fd62ea1a 1660 /**
NYX 0:85b3fd62ea1a 1661 * @brief Enable Transfer Error Interrupt
NYX 0:85b3fd62ea1a 1662 * @rmtoll CR TEIE LL_DMA2D_EnableIT_TE
NYX 0:85b3fd62ea1a 1663 * @param DMA2Dx DMA2D Instance
NYX 0:85b3fd62ea1a 1664 * @retval None
NYX 0:85b3fd62ea1a 1665 */
NYX 0:85b3fd62ea1a 1666 __STATIC_INLINE void LL_DMA2D_EnableIT_TE(DMA2D_TypeDef *DMA2Dx)
NYX 0:85b3fd62ea1a 1667 {
NYX 0:85b3fd62ea1a 1668 SET_BIT(DMA2Dx->CR, DMA2D_CR_TEIE);
NYX 0:85b3fd62ea1a 1669 }
NYX 0:85b3fd62ea1a 1670
NYX 0:85b3fd62ea1a 1671 /**
NYX 0:85b3fd62ea1a 1672 * @brief Disable Configuration Error Interrupt
NYX 0:85b3fd62ea1a 1673 * @rmtoll CR CEIE LL_DMA2D_DisableIT_CE
NYX 0:85b3fd62ea1a 1674 * @param DMA2Dx DMA2D Instance
NYX 0:85b3fd62ea1a 1675 * @retval None
NYX 0:85b3fd62ea1a 1676 */
NYX 0:85b3fd62ea1a 1677 __STATIC_INLINE void LL_DMA2D_DisableIT_CE(DMA2D_TypeDef *DMA2Dx)
NYX 0:85b3fd62ea1a 1678 {
NYX 0:85b3fd62ea1a 1679 CLEAR_BIT(DMA2Dx->CR, DMA2D_CR_CEIE);
NYX 0:85b3fd62ea1a 1680 }
NYX 0:85b3fd62ea1a 1681
NYX 0:85b3fd62ea1a 1682 /**
NYX 0:85b3fd62ea1a 1683 * @brief Disable CLUT Transfer Complete Interrupt
NYX 0:85b3fd62ea1a 1684 * @rmtoll CR CTCIE LL_DMA2D_DisableIT_CTC
NYX 0:85b3fd62ea1a 1685 * @param DMA2Dx DMA2D Instance
NYX 0:85b3fd62ea1a 1686 * @retval None
NYX 0:85b3fd62ea1a 1687 */
NYX 0:85b3fd62ea1a 1688 __STATIC_INLINE void LL_DMA2D_DisableIT_CTC(DMA2D_TypeDef *DMA2Dx)
NYX 0:85b3fd62ea1a 1689 {
NYX 0:85b3fd62ea1a 1690 CLEAR_BIT(DMA2Dx->CR, DMA2D_CR_CTCIE);
NYX 0:85b3fd62ea1a 1691 }
NYX 0:85b3fd62ea1a 1692
NYX 0:85b3fd62ea1a 1693 /**
NYX 0:85b3fd62ea1a 1694 * @brief Disable CLUT Access Error Interrupt
NYX 0:85b3fd62ea1a 1695 * @rmtoll CR CAEIE LL_DMA2D_DisableIT_CAE
NYX 0:85b3fd62ea1a 1696 * @param DMA2Dx DMA2D Instance
NYX 0:85b3fd62ea1a 1697 * @retval None
NYX 0:85b3fd62ea1a 1698 */
NYX 0:85b3fd62ea1a 1699 __STATIC_INLINE void LL_DMA2D_DisableIT_CAE(DMA2D_TypeDef *DMA2Dx)
NYX 0:85b3fd62ea1a 1700 {
NYX 0:85b3fd62ea1a 1701 CLEAR_BIT(DMA2Dx->CR, DMA2D_CR_CAEIE);
NYX 0:85b3fd62ea1a 1702 }
NYX 0:85b3fd62ea1a 1703
NYX 0:85b3fd62ea1a 1704 /**
NYX 0:85b3fd62ea1a 1705 * @brief Disable Transfer Watermark Interrupt
NYX 0:85b3fd62ea1a 1706 * @rmtoll CR TWIE LL_DMA2D_DisableIT_TW
NYX 0:85b3fd62ea1a 1707 * @param DMA2Dx DMA2D Instance
NYX 0:85b3fd62ea1a 1708 * @retval None
NYX 0:85b3fd62ea1a 1709 */
NYX 0:85b3fd62ea1a 1710 __STATIC_INLINE void LL_DMA2D_DisableIT_TW(DMA2D_TypeDef *DMA2Dx)
NYX 0:85b3fd62ea1a 1711 {
NYX 0:85b3fd62ea1a 1712 CLEAR_BIT(DMA2Dx->CR, DMA2D_CR_TWIE);
NYX 0:85b3fd62ea1a 1713 }
NYX 0:85b3fd62ea1a 1714
NYX 0:85b3fd62ea1a 1715 /**
NYX 0:85b3fd62ea1a 1716 * @brief Disable Transfer Complete Interrupt
NYX 0:85b3fd62ea1a 1717 * @rmtoll CR TCIE LL_DMA2D_DisableIT_TC
NYX 0:85b3fd62ea1a 1718 * @param DMA2Dx DMA2D Instance
NYX 0:85b3fd62ea1a 1719 * @retval None
NYX 0:85b3fd62ea1a 1720 */
NYX 0:85b3fd62ea1a 1721 __STATIC_INLINE void LL_DMA2D_DisableIT_TC(DMA2D_TypeDef *DMA2Dx)
NYX 0:85b3fd62ea1a 1722 {
NYX 0:85b3fd62ea1a 1723 CLEAR_BIT(DMA2Dx->CR, DMA2D_CR_TCIE);
NYX 0:85b3fd62ea1a 1724 }
NYX 0:85b3fd62ea1a 1725
NYX 0:85b3fd62ea1a 1726 /**
NYX 0:85b3fd62ea1a 1727 * @brief Disable Transfer Error Interrupt
NYX 0:85b3fd62ea1a 1728 * @rmtoll CR TEIE LL_DMA2D_DisableIT_TE
NYX 0:85b3fd62ea1a 1729 * @param DMA2Dx DMA2D Instance
NYX 0:85b3fd62ea1a 1730 * @retval None
NYX 0:85b3fd62ea1a 1731 */
NYX 0:85b3fd62ea1a 1732 __STATIC_INLINE void LL_DMA2D_DisableIT_TE(DMA2D_TypeDef *DMA2Dx)
NYX 0:85b3fd62ea1a 1733 {
NYX 0:85b3fd62ea1a 1734 CLEAR_BIT(DMA2Dx->CR, DMA2D_CR_TEIE);
NYX 0:85b3fd62ea1a 1735 }
NYX 0:85b3fd62ea1a 1736
NYX 0:85b3fd62ea1a 1737 /**
NYX 0:85b3fd62ea1a 1738 * @brief Check if the DMA2D Configuration Error interrupt source is enabled or disabled.
NYX 0:85b3fd62ea1a 1739 * @rmtoll CR CEIE LL_DMA2D_IsEnabledIT_CE
NYX 0:85b3fd62ea1a 1740 * @param DMA2Dx DMA2D Instance
NYX 0:85b3fd62ea1a 1741 * @retval State of bit (1 or 0).
NYX 0:85b3fd62ea1a 1742 */
NYX 0:85b3fd62ea1a 1743 __STATIC_INLINE uint32_t LL_DMA2D_IsEnabledIT_CE(DMA2D_TypeDef *DMA2Dx)
NYX 0:85b3fd62ea1a 1744 {
NYX 0:85b3fd62ea1a 1745 return (READ_BIT(DMA2Dx->CR, DMA2D_CR_CEIE) == (DMA2D_CR_CEIE));
NYX 0:85b3fd62ea1a 1746 }
NYX 0:85b3fd62ea1a 1747
NYX 0:85b3fd62ea1a 1748 /**
NYX 0:85b3fd62ea1a 1749 * @brief Check if the DMA2D CLUT Transfer Complete interrupt source is enabled or disabled.
NYX 0:85b3fd62ea1a 1750 * @rmtoll CR CTCIE LL_DMA2D_IsEnabledIT_CTC
NYX 0:85b3fd62ea1a 1751 * @param DMA2Dx DMA2D Instance
NYX 0:85b3fd62ea1a 1752 * @retval State of bit (1 or 0).
NYX 0:85b3fd62ea1a 1753 */
NYX 0:85b3fd62ea1a 1754 __STATIC_INLINE uint32_t LL_DMA2D_IsEnabledIT_CTC(DMA2D_TypeDef *DMA2Dx)
NYX 0:85b3fd62ea1a 1755 {
NYX 0:85b3fd62ea1a 1756 return (READ_BIT(DMA2Dx->CR, DMA2D_CR_CTCIE) == (DMA2D_CR_CTCIE));
NYX 0:85b3fd62ea1a 1757 }
NYX 0:85b3fd62ea1a 1758
NYX 0:85b3fd62ea1a 1759 /**
NYX 0:85b3fd62ea1a 1760 * @brief Check if the DMA2D CLUT Access Error interrupt source is enabled or disabled.
NYX 0:85b3fd62ea1a 1761 * @rmtoll CR CAEIE LL_DMA2D_IsEnabledIT_CAE
NYX 0:85b3fd62ea1a 1762 * @param DMA2Dx DMA2D Instance
NYX 0:85b3fd62ea1a 1763 * @retval State of bit (1 or 0).
NYX 0:85b3fd62ea1a 1764 */
NYX 0:85b3fd62ea1a 1765 __STATIC_INLINE uint32_t LL_DMA2D_IsEnabledIT_CAE(DMA2D_TypeDef *DMA2Dx)
NYX 0:85b3fd62ea1a 1766 {
NYX 0:85b3fd62ea1a 1767 return (READ_BIT(DMA2Dx->CR, DMA2D_CR_CAEIE) == (DMA2D_CR_CAEIE));
NYX 0:85b3fd62ea1a 1768 }
NYX 0:85b3fd62ea1a 1769
NYX 0:85b3fd62ea1a 1770 /**
NYX 0:85b3fd62ea1a 1771 * @brief Check if the DMA2D Transfer Watermark interrupt source is enabled or disabled.
NYX 0:85b3fd62ea1a 1772 * @rmtoll CR TWIE LL_DMA2D_IsEnabledIT_TW
NYX 0:85b3fd62ea1a 1773 * @param DMA2Dx DMA2D Instance
NYX 0:85b3fd62ea1a 1774 * @retval State of bit (1 or 0).
NYX 0:85b3fd62ea1a 1775 */
NYX 0:85b3fd62ea1a 1776 __STATIC_INLINE uint32_t LL_DMA2D_IsEnabledIT_TW(DMA2D_TypeDef *DMA2Dx)
NYX 0:85b3fd62ea1a 1777 {
NYX 0:85b3fd62ea1a 1778 return (READ_BIT(DMA2Dx->CR, DMA2D_CR_TWIE) == (DMA2D_CR_TWIE));
NYX 0:85b3fd62ea1a 1779 }
NYX 0:85b3fd62ea1a 1780
NYX 0:85b3fd62ea1a 1781 /**
NYX 0:85b3fd62ea1a 1782 * @brief Check if the DMA2D Transfer Complete interrupt source is enabled or disabled.
NYX 0:85b3fd62ea1a 1783 * @rmtoll CR TCIE LL_DMA2D_IsEnabledIT_TC
NYX 0:85b3fd62ea1a 1784 * @param DMA2Dx DMA2D Instance
NYX 0:85b3fd62ea1a 1785 * @retval State of bit (1 or 0).
NYX 0:85b3fd62ea1a 1786 */
NYX 0:85b3fd62ea1a 1787 __STATIC_INLINE uint32_t LL_DMA2D_IsEnabledIT_TC(DMA2D_TypeDef *DMA2Dx)
NYX 0:85b3fd62ea1a 1788 {
NYX 0:85b3fd62ea1a 1789 return (READ_BIT(DMA2Dx->CR, DMA2D_CR_TCIE) == (DMA2D_CR_TCIE));
NYX 0:85b3fd62ea1a 1790 }
NYX 0:85b3fd62ea1a 1791
NYX 0:85b3fd62ea1a 1792 /**
NYX 0:85b3fd62ea1a 1793 * @brief Check if the DMA2D Transfer Error interrupt source is enabled or disabled.
NYX 0:85b3fd62ea1a 1794 * @rmtoll CR TEIE LL_DMA2D_IsEnabledIT_TE
NYX 0:85b3fd62ea1a 1795 * @param DMA2Dx DMA2D Instance
NYX 0:85b3fd62ea1a 1796 * @retval State of bit (1 or 0).
NYX 0:85b3fd62ea1a 1797 */
NYX 0:85b3fd62ea1a 1798 __STATIC_INLINE uint32_t LL_DMA2D_IsEnabledIT_TE(DMA2D_TypeDef *DMA2Dx)
NYX 0:85b3fd62ea1a 1799 {
NYX 0:85b3fd62ea1a 1800 return (READ_BIT(DMA2Dx->CR, DMA2D_CR_TEIE) == (DMA2D_CR_TEIE));
NYX 0:85b3fd62ea1a 1801 }
NYX 0:85b3fd62ea1a 1802
NYX 0:85b3fd62ea1a 1803
NYX 0:85b3fd62ea1a 1804
NYX 0:85b3fd62ea1a 1805 /**
NYX 0:85b3fd62ea1a 1806 * @}
NYX 0:85b3fd62ea1a 1807 */
NYX 0:85b3fd62ea1a 1808
NYX 0:85b3fd62ea1a 1809 #if defined(USE_FULL_LL_DRIVER)
NYX 0:85b3fd62ea1a 1810 /** @defgroup DMA2D_LL_EF_Init_Functions Initialization and De-initialization Functions
NYX 0:85b3fd62ea1a 1811 * @{
NYX 0:85b3fd62ea1a 1812 */
NYX 0:85b3fd62ea1a 1813
NYX 0:85b3fd62ea1a 1814 ErrorStatus LL_DMA2D_DeInit(DMA2D_TypeDef *DMA2Dx);
NYX 0:85b3fd62ea1a 1815 ErrorStatus LL_DMA2D_Init(DMA2D_TypeDef *DMA2Dx, LL_DMA2D_InitTypeDef *DMA2D_InitStruct);
NYX 0:85b3fd62ea1a 1816 void LL_DMA2D_StructInit(LL_DMA2D_InitTypeDef *DMA2D_InitStruct);
NYX 0:85b3fd62ea1a 1817 void LL_DMA2D_ConfigLayer(DMA2D_TypeDef *DMA2Dx, LL_DMA2D_LayerCfgTypeDef *DMA2D_LayerCfg, uint32_t LayerIdx);
NYX 0:85b3fd62ea1a 1818 void LL_DMA2D_LayerCfgStructInit(LL_DMA2D_LayerCfgTypeDef *DMA2D_LayerCfg);
NYX 0:85b3fd62ea1a 1819 void LL_DMA2D_ConfigOutputColor(DMA2D_TypeDef *DMA2Dx, LL_DMA2D_ColorTypeDef *DMA2D_ColorStruct);
NYX 0:85b3fd62ea1a 1820 uint32_t LL_DMA2D_GetOutputBlueColor(DMA2D_TypeDef *DMA2Dx, uint32_t ColorMode);
NYX 0:85b3fd62ea1a 1821 uint32_t LL_DMA2D_GetOutputGreenColor(DMA2D_TypeDef *DMA2Dx, uint32_t ColorMode);
NYX 0:85b3fd62ea1a 1822 uint32_t LL_DMA2D_GetOutputRedColor(DMA2D_TypeDef *DMA2Dx, uint32_t ColorMode);
NYX 0:85b3fd62ea1a 1823 uint32_t LL_DMA2D_GetOutputAlphaColor(DMA2D_TypeDef *DMA2Dx, uint32_t ColorMode);
NYX 0:85b3fd62ea1a 1824 void LL_DMA2D_ConfigSize(DMA2D_TypeDef *DMA2Dx, uint32_t NbrOfLines, uint32_t NbrOfPixelsPerLines);
NYX 0:85b3fd62ea1a 1825
NYX 0:85b3fd62ea1a 1826 /**
NYX 0:85b3fd62ea1a 1827 * @}
NYX 0:85b3fd62ea1a 1828 */
NYX 0:85b3fd62ea1a 1829 #endif /* USE_FULL_LL_DRIVER */
NYX 0:85b3fd62ea1a 1830
NYX 0:85b3fd62ea1a 1831 /**
NYX 0:85b3fd62ea1a 1832 * @}
NYX 0:85b3fd62ea1a 1833 */
NYX 0:85b3fd62ea1a 1834
NYX 0:85b3fd62ea1a 1835 /**
NYX 0:85b3fd62ea1a 1836 * @}
NYX 0:85b3fd62ea1a 1837 */
NYX 0:85b3fd62ea1a 1838
NYX 0:85b3fd62ea1a 1839 #endif /* defined (DMA2D) */
NYX 0:85b3fd62ea1a 1840
NYX 0:85b3fd62ea1a 1841 /**
NYX 0:85b3fd62ea1a 1842 * @}
NYX 0:85b3fd62ea1a 1843 */
NYX 0:85b3fd62ea1a 1844
NYX 0:85b3fd62ea1a 1845 #ifdef __cplusplus
NYX 0:85b3fd62ea1a 1846 }
NYX 0:85b3fd62ea1a 1847 #endif
NYX 0:85b3fd62ea1a 1848
NYX 0:85b3fd62ea1a 1849 #endif /* __STM32F4xx_LL_DMA2D_H */
NYX 0:85b3fd62ea1a 1850
NYX 0:85b3fd62ea1a 1851 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/