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targets/TARGET_STM/TARGET_STM32F4/device/stm32f4xx_hal_spi.h@0:85b3fd62ea1a, 2020-03-16 (annotated)

Committer:
NYX
Date:
Mon Mar 16 06:35:48 2020 +0000
Revision:
0:85b3fd62ea1a
reinport to mbed;

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NYX 0:85b3fd62ea1a 1 /**
NYX 0:85b3fd62ea1a 2 ******************************************************************************
NYX 0:85b3fd62ea1a 3 * @file stm32f4xx_hal_spi.h
NYX 0:85b3fd62ea1a 4 * @author MCD Application Team
NYX 0:85b3fd62ea1a 5 * @version V1.7.1
NYX 0:85b3fd62ea1a 6 * @date 14-April-2017
NYX 0:85b3fd62ea1a 7 * @brief Header file of SPI HAL module.
NYX 0:85b3fd62ea1a 8 ******************************************************************************
NYX 0:85b3fd62ea1a 9 * @attention
NYX 0:85b3fd62ea1a 10 *
NYX 0:85b3fd62ea1a 11 * <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
NYX 0:85b3fd62ea1a 12 *
NYX 0:85b3fd62ea1a 13 * Redistribution and use in source and binary forms, with or without modification,
NYX 0:85b3fd62ea1a 14 * are permitted provided that the following conditions are met:
NYX 0:85b3fd62ea1a 15 * 1. Redistributions of source code must retain the above copyright notice,
NYX 0:85b3fd62ea1a 16 * this list of conditions and the following disclaimer.
NYX 0:85b3fd62ea1a 17 * 2. Redistributions in binary form must reproduce the above copyright notice,
NYX 0:85b3fd62ea1a 18 * this list of conditions and the following disclaimer in the documentation
NYX 0:85b3fd62ea1a 19 * and/or other materials provided with the distribution.
NYX 0:85b3fd62ea1a 20 * 3. Neither the name of STMicroelectronics nor the names of its contributors
NYX 0:85b3fd62ea1a 21 * may be used to endorse or promote products derived from this software
NYX 0:85b3fd62ea1a 22 * without specific prior written permission.
NYX 0:85b3fd62ea1a 23 *
NYX 0:85b3fd62ea1a 24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
NYX 0:85b3fd62ea1a 25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
NYX 0:85b3fd62ea1a 26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
NYX 0:85b3fd62ea1a 27 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
NYX 0:85b3fd62ea1a 28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
NYX 0:85b3fd62ea1a 29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
NYX 0:85b3fd62ea1a 30 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
NYX 0:85b3fd62ea1a 31 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
NYX 0:85b3fd62ea1a 32 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
NYX 0:85b3fd62ea1a 33 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
NYX 0:85b3fd62ea1a 34 *
NYX 0:85b3fd62ea1a 35 ******************************************************************************
NYX 0:85b3fd62ea1a 36 */
NYX 0:85b3fd62ea1a 37
NYX 0:85b3fd62ea1a 38 /* Define to prevent recursive inclusion -------------------------------------*/
NYX 0:85b3fd62ea1a 39 #ifndef __STM32F4xx_HAL_SPI_H
NYX 0:85b3fd62ea1a 40 #define __STM32F4xx_HAL_SPI_H
NYX 0:85b3fd62ea1a 41
NYX 0:85b3fd62ea1a 42 #ifdef __cplusplus
NYX 0:85b3fd62ea1a 43 extern "C" {
NYX 0:85b3fd62ea1a 44 #endif
NYX 0:85b3fd62ea1a 45
NYX 0:85b3fd62ea1a 46 /* Includes ------------------------------------------------------------------*/
NYX 0:85b3fd62ea1a 47 #include "stm32f4xx_hal_def.h"
NYX 0:85b3fd62ea1a 48
NYX 0:85b3fd62ea1a 49 /** @addtogroup STM32F4xx_HAL_Driver
NYX 0:85b3fd62ea1a 50 * @{
NYX 0:85b3fd62ea1a 51 */
NYX 0:85b3fd62ea1a 52
NYX 0:85b3fd62ea1a 53 /** @addtogroup SPI
NYX 0:85b3fd62ea1a 54 * @{
NYX 0:85b3fd62ea1a 55 */
NYX 0:85b3fd62ea1a 56
NYX 0:85b3fd62ea1a 57 /* Exported types ------------------------------------------------------------*/
NYX 0:85b3fd62ea1a 58 /** @defgroup SPI_Exported_Types SPI Exported Types
NYX 0:85b3fd62ea1a 59 * @{
NYX 0:85b3fd62ea1a 60 */
NYX 0:85b3fd62ea1a 61
NYX 0:85b3fd62ea1a 62 /**
NYX 0:85b3fd62ea1a 63 * @brief SPI Configuration Structure definition
NYX 0:85b3fd62ea1a 64 */
NYX 0:85b3fd62ea1a 65 typedef struct
NYX 0:85b3fd62ea1a 66 {
NYX 0:85b3fd62ea1a 67 uint32_t Mode; /*!< Specifies the SPI operating mode.
NYX 0:85b3fd62ea1a 68 This parameter can be a value of @ref SPI_Mode */
NYX 0:85b3fd62ea1a 69
NYX 0:85b3fd62ea1a 70 uint32_t Direction; /*!< Specifies the SPI bidirectional mode state.
NYX 0:85b3fd62ea1a 71 This parameter can be a value of @ref SPI_Direction */
NYX 0:85b3fd62ea1a 72
NYX 0:85b3fd62ea1a 73 uint32_t DataSize; /*!< Specifies the SPI data size.
NYX 0:85b3fd62ea1a 74 This parameter can be a value of @ref SPI_Data_Size */
NYX 0:85b3fd62ea1a 75
NYX 0:85b3fd62ea1a 76 uint32_t CLKPolarity; /*!< Specifies the serial clock steady state.
NYX 0:85b3fd62ea1a 77 This parameter can be a value of @ref SPI_Clock_Polarity */
NYX 0:85b3fd62ea1a 78
NYX 0:85b3fd62ea1a 79 uint32_t CLKPhase; /*!< Specifies the clock active edge for the bit capture.
NYX 0:85b3fd62ea1a 80 This parameter can be a value of @ref SPI_Clock_Phase */
NYX 0:85b3fd62ea1a 81
NYX 0:85b3fd62ea1a 82 uint32_t NSS; /*!< Specifies whether the NSS signal is managed by
NYX 0:85b3fd62ea1a 83 hardware (NSS pin) or by software using the SSI bit.
NYX 0:85b3fd62ea1a 84 This parameter can be a value of @ref SPI_Slave_Select_management */
NYX 0:85b3fd62ea1a 85
NYX 0:85b3fd62ea1a 86 uint32_t BaudRatePrescaler; /*!< Specifies the Baud Rate prescaler value which will be
NYX 0:85b3fd62ea1a 87 used to configure the transmit and receive SCK clock.
NYX 0:85b3fd62ea1a 88 This parameter can be a value of @ref SPI_BaudRate_Prescaler
NYX 0:85b3fd62ea1a 89 @note The communication clock is derived from the master
NYX 0:85b3fd62ea1a 90 clock. The slave clock does not need to be set. */
NYX 0:85b3fd62ea1a 91
NYX 0:85b3fd62ea1a 92 uint32_t FirstBit; /*!< Specifies whether data transfers start from MSB or LSB bit.
NYX 0:85b3fd62ea1a 93 This parameter can be a value of @ref SPI_MSB_LSB_transmission */
NYX 0:85b3fd62ea1a 94
NYX 0:85b3fd62ea1a 95 uint32_t TIMode; /*!< Specifies if the TI mode is enabled or not.
NYX 0:85b3fd62ea1a 96 This parameter can be a value of @ref SPI_TI_mode */
NYX 0:85b3fd62ea1a 97
NYX 0:85b3fd62ea1a 98 uint32_t CRCCalculation; /*!< Specifies if the CRC calculation is enabled or not.
NYX 0:85b3fd62ea1a 99 This parameter can be a value of @ref SPI_CRC_Calculation */
NYX 0:85b3fd62ea1a 100
NYX 0:85b3fd62ea1a 101 uint32_t CRCPolynomial; /*!< Specifies the polynomial used for the CRC calculation.
NYX 0:85b3fd62ea1a 102 This parameter must be a number between Min_Data = 0 and Max_Data = 65535 */
NYX 0:85b3fd62ea1a 103 }SPI_InitTypeDef;
NYX 0:85b3fd62ea1a 104
NYX 0:85b3fd62ea1a 105 /**
NYX 0:85b3fd62ea1a 106 * @brief HAL SPI State structure definition
NYX 0:85b3fd62ea1a 107 */
NYX 0:85b3fd62ea1a 108 typedef enum
NYX 0:85b3fd62ea1a 109 {
NYX 0:85b3fd62ea1a 110 HAL_SPI_STATE_RESET = 0x00U, /*!< Peripheral not Initialized */
NYX 0:85b3fd62ea1a 111 HAL_SPI_STATE_READY = 0x01U, /*!< Peripheral Initialized and ready for use */
NYX 0:85b3fd62ea1a 112 HAL_SPI_STATE_BUSY = 0x02U, /*!< an internal process is ongoing */
NYX 0:85b3fd62ea1a 113 HAL_SPI_STATE_BUSY_TX = 0x03U, /*!< Data Transmission process is ongoing */
NYX 0:85b3fd62ea1a 114 HAL_SPI_STATE_BUSY_RX = 0x04U, /*!< Data Reception process is ongoing */
NYX 0:85b3fd62ea1a 115 HAL_SPI_STATE_BUSY_TX_RX = 0x05U, /*!< Data Transmission and Reception process is ongoing */
NYX 0:85b3fd62ea1a 116 HAL_SPI_STATE_ERROR = 0x06U /*!< SPI error state */
NYX 0:85b3fd62ea1a 117 }HAL_SPI_StateTypeDef;
NYX 0:85b3fd62ea1a 118
NYX 0:85b3fd62ea1a 119 /**
NYX 0:85b3fd62ea1a 120 * @brief SPI handle Structure definition
NYX 0:85b3fd62ea1a 121 */
NYX 0:85b3fd62ea1a 122 typedef struct __SPI_HandleTypeDef
NYX 0:85b3fd62ea1a 123 {
NYX 0:85b3fd62ea1a 124 SPI_TypeDef *Instance; /* SPI registers base address */
NYX 0:85b3fd62ea1a 125
NYX 0:85b3fd62ea1a 126 SPI_InitTypeDef Init; /* SPI communication parameters */
NYX 0:85b3fd62ea1a 127
NYX 0:85b3fd62ea1a 128 uint8_t *pTxBuffPtr; /* Pointer to SPI Tx transfer Buffer */
NYX 0:85b3fd62ea1a 129
NYX 0:85b3fd62ea1a 130 uint16_t TxXferSize; /* SPI Tx Transfer size */
NYX 0:85b3fd62ea1a 131
NYX 0:85b3fd62ea1a 132 __IO uint16_t TxXferCount; /* SPI Tx Transfer Counter */
NYX 0:85b3fd62ea1a 133
NYX 0:85b3fd62ea1a 134 uint8_t *pRxBuffPtr; /* Pointer to SPI Rx transfer Buffer */
NYX 0:85b3fd62ea1a 135
NYX 0:85b3fd62ea1a 136 uint16_t RxXferSize; /* SPI Rx Transfer size */
NYX 0:85b3fd62ea1a 137
NYX 0:85b3fd62ea1a 138 __IO uint16_t RxXferCount; /* SPI Rx Transfer Counter */
NYX 0:85b3fd62ea1a 139
NYX 0:85b3fd62ea1a 140 void (*RxISR)(struct __SPI_HandleTypeDef * hspi); /* function pointer on Rx ISR */
NYX 0:85b3fd62ea1a 141
NYX 0:85b3fd62ea1a 142 void (*TxISR)(struct __SPI_HandleTypeDef * hspi); /* function pointer on Tx ISR */
NYX 0:85b3fd62ea1a 143
NYX 0:85b3fd62ea1a 144 DMA_HandleTypeDef *hdmatx; /* SPI Tx DMA Handle parameters */
NYX 0:85b3fd62ea1a 145
NYX 0:85b3fd62ea1a 146 DMA_HandleTypeDef *hdmarx; /* SPI Rx DMA Handle parameters */
NYX 0:85b3fd62ea1a 147
NYX 0:85b3fd62ea1a 148 HAL_LockTypeDef Lock; /* Locking object */
NYX 0:85b3fd62ea1a 149
NYX 0:85b3fd62ea1a 150 __IO HAL_SPI_StateTypeDef State; /* SPI communication state */
NYX 0:85b3fd62ea1a 151
NYX 0:85b3fd62ea1a 152 __IO uint32_t ErrorCode; /* SPI Error code */
NYX 0:85b3fd62ea1a 153
NYX 0:85b3fd62ea1a 154 }SPI_HandleTypeDef;
NYX 0:85b3fd62ea1a 155
NYX 0:85b3fd62ea1a 156 /**
NYX 0:85b3fd62ea1a 157 * @}
NYX 0:85b3fd62ea1a 158 */
NYX 0:85b3fd62ea1a 159
NYX 0:85b3fd62ea1a 160 /* Exported constants --------------------------------------------------------*/
NYX 0:85b3fd62ea1a 161 /** @defgroup SPI_Exported_Constants SPI Exported Constants
NYX 0:85b3fd62ea1a 162 * @{
NYX 0:85b3fd62ea1a 163 */
NYX 0:85b3fd62ea1a 164
NYX 0:85b3fd62ea1a 165 /** @defgroup SPI_Error_Code SPI Error Code
NYX 0:85b3fd62ea1a 166 * @{
NYX 0:85b3fd62ea1a 167 */
NYX 0:85b3fd62ea1a 168 #define HAL_SPI_ERROR_NONE 0x00000000U /*!< No error */
NYX 0:85b3fd62ea1a 169 #define HAL_SPI_ERROR_MODF 0x00000001U /*!< MODF error */
NYX 0:85b3fd62ea1a 170 #define HAL_SPI_ERROR_CRC 0x00000002U /*!< CRC error */
NYX 0:85b3fd62ea1a 171 #define HAL_SPI_ERROR_OVR 0x00000004U /*!< OVR error */
NYX 0:85b3fd62ea1a 172 #define HAL_SPI_ERROR_FRE 0x00000008U /*!< FRE error */
NYX 0:85b3fd62ea1a 173 #define HAL_SPI_ERROR_DMA 0x00000010U /*!< DMA transfer error */
NYX 0:85b3fd62ea1a 174 #define HAL_SPI_ERROR_FLAG 0x00000020U /*!< Flag: RXNE,TXE, BSY */
NYX 0:85b3fd62ea1a 175 /**
NYX 0:85b3fd62ea1a 176 * @}
NYX 0:85b3fd62ea1a 177 */
NYX 0:85b3fd62ea1a 178
NYX 0:85b3fd62ea1a 179 /** @defgroup SPI_Mode SPI Mode
NYX 0:85b3fd62ea1a 180 * @{
NYX 0:85b3fd62ea1a 181 */
NYX 0:85b3fd62ea1a 182 #define SPI_MODE_SLAVE 0x00000000U
NYX 0:85b3fd62ea1a 183 #define SPI_MODE_MASTER (SPI_CR1_MSTR | SPI_CR1_SSI)
NYX 0:85b3fd62ea1a 184 /**
NYX 0:85b3fd62ea1a 185 * @}
NYX 0:85b3fd62ea1a 186 */
NYX 0:85b3fd62ea1a 187
NYX 0:85b3fd62ea1a 188 /** @defgroup SPI_Direction SPI Direction Mode
NYX 0:85b3fd62ea1a 189 * @{
NYX 0:85b3fd62ea1a 190 */
NYX 0:85b3fd62ea1a 191 #define SPI_DIRECTION_2LINES 0x00000000U
NYX 0:85b3fd62ea1a 192 #define SPI_DIRECTION_2LINES_RXONLY SPI_CR1_RXONLY
NYX 0:85b3fd62ea1a 193 #define SPI_DIRECTION_1LINE SPI_CR1_BIDIMODE
NYX 0:85b3fd62ea1a 194 /**
NYX 0:85b3fd62ea1a 195 * @}
NYX 0:85b3fd62ea1a 196 */
NYX 0:85b3fd62ea1a 197
NYX 0:85b3fd62ea1a 198 /** @defgroup SPI_Data_Size SPI Data Size
NYX 0:85b3fd62ea1a 199 * @{
NYX 0:85b3fd62ea1a 200 */
NYX 0:85b3fd62ea1a 201 #define SPI_DATASIZE_8BIT 0x00000000U
NYX 0:85b3fd62ea1a 202 #define SPI_DATASIZE_16BIT SPI_CR1_DFF
NYX 0:85b3fd62ea1a 203 /**
NYX 0:85b3fd62ea1a 204 * @}
NYX 0:85b3fd62ea1a 205 */
NYX 0:85b3fd62ea1a 206
NYX 0:85b3fd62ea1a 207 /** @defgroup SPI_Clock_Polarity SPI Clock Polarity
NYX 0:85b3fd62ea1a 208 * @{
NYX 0:85b3fd62ea1a 209 */
NYX 0:85b3fd62ea1a 210 #define SPI_POLARITY_LOW 0x00000000U
NYX 0:85b3fd62ea1a 211 #define SPI_POLARITY_HIGH SPI_CR1_CPOL
NYX 0:85b3fd62ea1a 212 /**
NYX 0:85b3fd62ea1a 213 * @}
NYX 0:85b3fd62ea1a 214 */
NYX 0:85b3fd62ea1a 215
NYX 0:85b3fd62ea1a 216 /** @defgroup SPI_Clock_Phase SPI Clock Phase
NYX 0:85b3fd62ea1a 217 * @{
NYX 0:85b3fd62ea1a 218 */
NYX 0:85b3fd62ea1a 219 #define SPI_PHASE_1EDGE 0x00000000U
NYX 0:85b3fd62ea1a 220 #define SPI_PHASE_2EDGE SPI_CR1_CPHA
NYX 0:85b3fd62ea1a 221 /**
NYX 0:85b3fd62ea1a 222 * @}
NYX 0:85b3fd62ea1a 223 */
NYX 0:85b3fd62ea1a 224
NYX 0:85b3fd62ea1a 225 /** @defgroup SPI_Slave_Select_management SPI Slave Select Management
NYX 0:85b3fd62ea1a 226 * @{
NYX 0:85b3fd62ea1a 227 */
NYX 0:85b3fd62ea1a 228 #define SPI_NSS_SOFT SPI_CR1_SSM
NYX 0:85b3fd62ea1a 229 #define SPI_NSS_HARD_INPUT 0x00000000U
NYX 0:85b3fd62ea1a 230 #define SPI_NSS_HARD_OUTPUT 0x00040000U
NYX 0:85b3fd62ea1a 231 /**
NYX 0:85b3fd62ea1a 232 * @}
NYX 0:85b3fd62ea1a 233 */
NYX 0:85b3fd62ea1a 234
NYX 0:85b3fd62ea1a 235 /** @defgroup SPI_BaudRate_Prescaler SPI BaudRate Prescaler
NYX 0:85b3fd62ea1a 236 * @{
NYX 0:85b3fd62ea1a 237 */
NYX 0:85b3fd62ea1a 238 #define SPI_BAUDRATEPRESCALER_2 0x00000000U
NYX 0:85b3fd62ea1a 239 #define SPI_BAUDRATEPRESCALER_4 0x00000008U
NYX 0:85b3fd62ea1a 240 #define SPI_BAUDRATEPRESCALER_8 0x00000010U
NYX 0:85b3fd62ea1a 241 #define SPI_BAUDRATEPRESCALER_16 0x00000018U
NYX 0:85b3fd62ea1a 242 #define SPI_BAUDRATEPRESCALER_32 0x00000020U
NYX 0:85b3fd62ea1a 243 #define SPI_BAUDRATEPRESCALER_64 0x00000028U
NYX 0:85b3fd62ea1a 244 #define SPI_BAUDRATEPRESCALER_128 0x00000030U
NYX 0:85b3fd62ea1a 245 #define SPI_BAUDRATEPRESCALER_256 0x00000038U
NYX 0:85b3fd62ea1a 246 /**
NYX 0:85b3fd62ea1a 247 * @}
NYX 0:85b3fd62ea1a 248 */
NYX 0:85b3fd62ea1a 249
NYX 0:85b3fd62ea1a 250 /** @defgroup SPI_MSB_LSB_transmission SPI MSB LSB Transmission
NYX 0:85b3fd62ea1a 251 * @{
NYX 0:85b3fd62ea1a 252 */
NYX 0:85b3fd62ea1a 253 #define SPI_FIRSTBIT_MSB 0x00000000U
NYX 0:85b3fd62ea1a 254 #define SPI_FIRSTBIT_LSB SPI_CR1_LSBFIRST
NYX 0:85b3fd62ea1a 255 /**
NYX 0:85b3fd62ea1a 256 * @}
NYX 0:85b3fd62ea1a 257 */
NYX 0:85b3fd62ea1a 258
NYX 0:85b3fd62ea1a 259 /** @defgroup SPI_TI_mode SPI TI Mode
NYX 0:85b3fd62ea1a 260 * @{
NYX 0:85b3fd62ea1a 261 */
NYX 0:85b3fd62ea1a 262 #define SPI_TIMODE_DISABLE 0x00000000U
NYX 0:85b3fd62ea1a 263 #define SPI_TIMODE_ENABLE SPI_CR2_FRF
NYX 0:85b3fd62ea1a 264 /**
NYX 0:85b3fd62ea1a 265 * @}
NYX 0:85b3fd62ea1a 266 */
NYX 0:85b3fd62ea1a 267
NYX 0:85b3fd62ea1a 268 /** @defgroup SPI_CRC_Calculation SPI CRC Calculation
NYX 0:85b3fd62ea1a 269 * @{
NYX 0:85b3fd62ea1a 270 */
NYX 0:85b3fd62ea1a 271 #define SPI_CRCCALCULATION_DISABLE 0x00000000U
NYX 0:85b3fd62ea1a 272 #define SPI_CRCCALCULATION_ENABLE SPI_CR1_CRCEN
NYX 0:85b3fd62ea1a 273 /**
NYX 0:85b3fd62ea1a 274 * @}
NYX 0:85b3fd62ea1a 275 */
NYX 0:85b3fd62ea1a 276
NYX 0:85b3fd62ea1a 277 /** @defgroup SPI_Interrupt_definition SPI Interrupt Definition
NYX 0:85b3fd62ea1a 278 * @{
NYX 0:85b3fd62ea1a 279 */
NYX 0:85b3fd62ea1a 280 #define SPI_IT_TXE SPI_CR2_TXEIE
NYX 0:85b3fd62ea1a 281 #define SPI_IT_RXNE SPI_CR2_RXNEIE
NYX 0:85b3fd62ea1a 282 #define SPI_IT_ERR SPI_CR2_ERRIE
NYX 0:85b3fd62ea1a 283 /**
NYX 0:85b3fd62ea1a 284 * @}
NYX 0:85b3fd62ea1a 285 */
NYX 0:85b3fd62ea1a 286
NYX 0:85b3fd62ea1a 287 /** @defgroup SPI_Flags_definition SPI Flags Definition
NYX 0:85b3fd62ea1a 288 * @{
NYX 0:85b3fd62ea1a 289 */
NYX 0:85b3fd62ea1a 290 #define SPI_FLAG_RXNE SPI_SR_RXNE /* SPI status flag: Rx buffer not empty flag */
NYX 0:85b3fd62ea1a 291 #define SPI_FLAG_TXE SPI_SR_TXE /* SPI status flag: Tx buffer empty flag */
NYX 0:85b3fd62ea1a 292 #define SPI_FLAG_BSY SPI_SR_BSY /* SPI status flag: Busy flag */
NYX 0:85b3fd62ea1a 293 #define SPI_FLAG_CRCERR SPI_SR_CRCERR /* SPI Error flag: CRC error flag */
NYX 0:85b3fd62ea1a 294 #define SPI_FLAG_MODF SPI_SR_MODF /* SPI Error flag: Mode fault flag */
NYX 0:85b3fd62ea1a 295 #define SPI_FLAG_OVR SPI_SR_OVR /* SPI Error flag: Overrun flag */
NYX 0:85b3fd62ea1a 296 #define SPI_FLAG_FRE SPI_SR_FRE /* SPI Error flag: TI mode frame format error flag */
NYX 0:85b3fd62ea1a 297 /**
NYX 0:85b3fd62ea1a 298 * @}
NYX 0:85b3fd62ea1a 299 */
NYX 0:85b3fd62ea1a 300
NYX 0:85b3fd62ea1a 301 /**
NYX 0:85b3fd62ea1a 302 * @}
NYX 0:85b3fd62ea1a 303 */
NYX 0:85b3fd62ea1a 304
NYX 0:85b3fd62ea1a 305 /* Exported macro ------------------------------------------------------------*/
NYX 0:85b3fd62ea1a 306 /** @defgroup SPI_Exported_Macros SPI Exported Macros
NYX 0:85b3fd62ea1a 307 * @{
NYX 0:85b3fd62ea1a 308 */
NYX 0:85b3fd62ea1a 309
NYX 0:85b3fd62ea1a 310 /** @brief Reset SPI handle state.
NYX 0:85b3fd62ea1a 311 * @param __HANDLE__: specifies the SPI Handle.
NYX 0:85b3fd62ea1a 312 * This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral.
NYX 0:85b3fd62ea1a 313 * @retval None
NYX 0:85b3fd62ea1a 314 */
NYX 0:85b3fd62ea1a 315 #define __HAL_SPI_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_SPI_STATE_RESET)
NYX 0:85b3fd62ea1a 316
NYX 0:85b3fd62ea1a 317 /** @brief Enable or disable the specified SPI interrupts.
NYX 0:85b3fd62ea1a 318 * @param __HANDLE__: specifies the SPI Handle.
NYX 0:85b3fd62ea1a 319 * This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral.
NYX 0:85b3fd62ea1a 320 * @param __INTERRUPT__: specifies the interrupt source to enable or disable.
NYX 0:85b3fd62ea1a 321 * This parameter can be one of the following values:
NYX 0:85b3fd62ea1a 322 * @arg SPI_IT_TXE: Tx buffer empty interrupt enable
NYX 0:85b3fd62ea1a 323 * @arg SPI_IT_RXNE: RX buffer not empty interrupt enable
NYX 0:85b3fd62ea1a 324 * @arg SPI_IT_ERR: Error interrupt enable
NYX 0:85b3fd62ea1a 325 * @retval None
NYX 0:85b3fd62ea1a 326 */
NYX 0:85b3fd62ea1a 327 #define __HAL_SPI_ENABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->CR2 |= (__INTERRUPT__))
NYX 0:85b3fd62ea1a 328 #define __HAL_SPI_DISABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->CR2 &= (~(__INTERRUPT__)))
NYX 0:85b3fd62ea1a 329
NYX 0:85b3fd62ea1a 330 /** @brief Check whether the specified SPI interrupt source is enabled or not.
NYX 0:85b3fd62ea1a 331 * @param __HANDLE__: specifies the SPI Handle.
NYX 0:85b3fd62ea1a 332 * This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral.
NYX 0:85b3fd62ea1a 333 * @param __INTERRUPT__: specifies the SPI interrupt source to check.
NYX 0:85b3fd62ea1a 334 * This parameter can be one of the following values:
NYX 0:85b3fd62ea1a 335 * @arg SPI_IT_TXE: Tx buffer empty interrupt enable
NYX 0:85b3fd62ea1a 336 * @arg SPI_IT_RXNE: RX buffer not empty interrupt enable
NYX 0:85b3fd62ea1a 337 * @arg SPI_IT_ERR: Error interrupt enable
NYX 0:85b3fd62ea1a 338 * @retval The new state of __IT__ (TRUE or FALSE).
NYX 0:85b3fd62ea1a 339 */
NYX 0:85b3fd62ea1a 340 #define __HAL_SPI_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) ((((__HANDLE__)->Instance->CR2 & (__INTERRUPT__)) == (__INTERRUPT__)) ? SET : RESET)
NYX 0:85b3fd62ea1a 341
NYX 0:85b3fd62ea1a 342 /** @brief Check whether the specified SPI flag is set or not.
NYX 0:85b3fd62ea1a 343 * @param __HANDLE__: specifies the SPI Handle.
NYX 0:85b3fd62ea1a 344 * This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral.
NYX 0:85b3fd62ea1a 345 * @param __FLAG__: specifies the flag to check.
NYX 0:85b3fd62ea1a 346 * This parameter can be one of the following values:
NYX 0:85b3fd62ea1a 347 * @arg SPI_FLAG_RXNE: Receive buffer not empty flag
NYX 0:85b3fd62ea1a 348 * @arg SPI_FLAG_TXE: Transmit buffer empty flag
NYX 0:85b3fd62ea1a 349 * @arg SPI_FLAG_CRCERR: CRC error flag
NYX 0:85b3fd62ea1a 350 * @arg SPI_FLAG_MODF: Mode fault flag
NYX 0:85b3fd62ea1a 351 * @arg SPI_FLAG_OVR: Overrun flag
NYX 0:85b3fd62ea1a 352 * @arg SPI_FLAG_BSY: Busy flag
NYX 0:85b3fd62ea1a 353 * @arg SPI_FLAG_FRE: Frame format error flag
NYX 0:85b3fd62ea1a 354 * @retval The new state of __FLAG__ (TRUE or FALSE).
NYX 0:85b3fd62ea1a 355 */
NYX 0:85b3fd62ea1a 356 #define __HAL_SPI_GET_FLAG(__HANDLE__, __FLAG__) ((((__HANDLE__)->Instance->SR) & (__FLAG__)) == (__FLAG__))
NYX 0:85b3fd62ea1a 357
NYX 0:85b3fd62ea1a 358 /** @brief Clear the SPI CRCERR pending flag.
NYX 0:85b3fd62ea1a 359 * @param __HANDLE__: specifies the SPI Handle.
NYX 0:85b3fd62ea1a 360 * This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral.
NYX 0:85b3fd62ea1a 361 * @retval None
NYX 0:85b3fd62ea1a 362 */
NYX 0:85b3fd62ea1a 363 #define __HAL_SPI_CLEAR_CRCERRFLAG(__HANDLE__) ((__HANDLE__)->Instance->SR = (uint16_t)(~SPI_FLAG_CRCERR))
NYX 0:85b3fd62ea1a 364
NYX 0:85b3fd62ea1a 365 /** @brief Clear the SPI MODF pending flag.
NYX 0:85b3fd62ea1a 366 * @param __HANDLE__: specifies the SPI Handle.
NYX 0:85b3fd62ea1a 367 * This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral.
NYX 0:85b3fd62ea1a 368 * @retval None
NYX 0:85b3fd62ea1a 369 */
NYX 0:85b3fd62ea1a 370 #define __HAL_SPI_CLEAR_MODFFLAG(__HANDLE__) \
NYX 0:85b3fd62ea1a 371 do{ \
NYX 0:85b3fd62ea1a 372 __IO uint32_t tmpreg_modf = 0x00U; \
NYX 0:85b3fd62ea1a 373 tmpreg_modf = (__HANDLE__)->Instance->SR; \
NYX 0:85b3fd62ea1a 374 (__HANDLE__)->Instance->CR1 &= (~SPI_CR1_SPE); \
NYX 0:85b3fd62ea1a 375 UNUSED(tmpreg_modf); \
NYX 0:85b3fd62ea1a 376 } while(0U)
NYX 0:85b3fd62ea1a 377
NYX 0:85b3fd62ea1a 378 /** @brief Clear the SPI OVR pending flag.
NYX 0:85b3fd62ea1a 379 * @param __HANDLE__: specifies the SPI Handle.
NYX 0:85b3fd62ea1a 380 * This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral.
NYX 0:85b3fd62ea1a 381 * @retval None
NYX 0:85b3fd62ea1a 382 */
NYX 0:85b3fd62ea1a 383 #define __HAL_SPI_CLEAR_OVRFLAG(__HANDLE__) \
NYX 0:85b3fd62ea1a 384 do{ \
NYX 0:85b3fd62ea1a 385 __IO uint32_t tmpreg_ovr = 0x00U; \
NYX 0:85b3fd62ea1a 386 tmpreg_ovr = (__HANDLE__)->Instance->DR; \
NYX 0:85b3fd62ea1a 387 tmpreg_ovr = (__HANDLE__)->Instance->SR; \
NYX 0:85b3fd62ea1a 388 UNUSED(tmpreg_ovr); \
NYX 0:85b3fd62ea1a 389 } while(0U)
NYX 0:85b3fd62ea1a 390
NYX 0:85b3fd62ea1a 391 /** @brief Clear the SPI FRE pending flag.
NYX 0:85b3fd62ea1a 392 * @param __HANDLE__: specifies the SPI Handle.
NYX 0:85b3fd62ea1a 393 * This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral.
NYX 0:85b3fd62ea1a 394 * @retval None
NYX 0:85b3fd62ea1a 395 */
NYX 0:85b3fd62ea1a 396 #define __HAL_SPI_CLEAR_FREFLAG(__HANDLE__) \
NYX 0:85b3fd62ea1a 397 do{ \
NYX 0:85b3fd62ea1a 398 __IO uint32_t tmpreg_fre = 0x00U; \
NYX 0:85b3fd62ea1a 399 tmpreg_fre = (__HANDLE__)->Instance->SR; \
NYX 0:85b3fd62ea1a 400 UNUSED(tmpreg_fre); \
NYX 0:85b3fd62ea1a 401 }while(0U)
NYX 0:85b3fd62ea1a 402
NYX 0:85b3fd62ea1a 403 /** @brief Enable the SPI peripheral.
NYX 0:85b3fd62ea1a 404 * @param __HANDLE__: specifies the SPI Handle.
NYX 0:85b3fd62ea1a 405 * This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral.
NYX 0:85b3fd62ea1a 406 * @retval None
NYX 0:85b3fd62ea1a 407 */
NYX 0:85b3fd62ea1a 408 #define __HAL_SPI_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR1 |= SPI_CR1_SPE)
NYX 0:85b3fd62ea1a 409
NYX 0:85b3fd62ea1a 410 /** @brief Disable the SPI peripheral.
NYX 0:85b3fd62ea1a 411 * @param __HANDLE__: specifies the SPI Handle.
NYX 0:85b3fd62ea1a 412 * This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral.
NYX 0:85b3fd62ea1a 413 * @retval None
NYX 0:85b3fd62ea1a 414 */
NYX 0:85b3fd62ea1a 415 #define __HAL_SPI_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR1 &= (~SPI_CR1_SPE))
NYX 0:85b3fd62ea1a 416 /**
NYX 0:85b3fd62ea1a 417 * @}
NYX 0:85b3fd62ea1a 418 */
NYX 0:85b3fd62ea1a 419
NYX 0:85b3fd62ea1a 420 /* Exported functions --------------------------------------------------------*/
NYX 0:85b3fd62ea1a 421 /** @addtogroup SPI_Exported_Functions
NYX 0:85b3fd62ea1a 422 * @{
NYX 0:85b3fd62ea1a 423 */
NYX 0:85b3fd62ea1a 424
NYX 0:85b3fd62ea1a 425 /** @addtogroup SPI_Exported_Functions_Group1
NYX 0:85b3fd62ea1a 426 * @{
NYX 0:85b3fd62ea1a 427 */
NYX 0:85b3fd62ea1a 428 /* Initialization/de-initialization functions **********************************/
NYX 0:85b3fd62ea1a 429 HAL_StatusTypeDef HAL_SPI_Init(SPI_HandleTypeDef *hspi);
NYX 0:85b3fd62ea1a 430 HAL_StatusTypeDef HAL_SPI_DeInit (SPI_HandleTypeDef *hspi);
NYX 0:85b3fd62ea1a 431 void HAL_SPI_MspInit(SPI_HandleTypeDef *hspi);
NYX 0:85b3fd62ea1a 432 void HAL_SPI_MspDeInit(SPI_HandleTypeDef *hspi);
NYX 0:85b3fd62ea1a 433 /**
NYX 0:85b3fd62ea1a 434 * @}
NYX 0:85b3fd62ea1a 435 */
NYX 0:85b3fd62ea1a 436
NYX 0:85b3fd62ea1a 437 /** @addtogroup SPI_Exported_Functions_Group2
NYX 0:85b3fd62ea1a 438 * @{
NYX 0:85b3fd62ea1a 439 */
NYX 0:85b3fd62ea1a 440 /* I/O operation functions *****************************************************/
NYX 0:85b3fd62ea1a 441 HAL_StatusTypeDef HAL_SPI_Transmit(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size, uint32_t Timeout);
NYX 0:85b3fd62ea1a 442 HAL_StatusTypeDef HAL_SPI_Receive(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size, uint32_t Timeout);
NYX 0:85b3fd62ea1a 443 HAL_StatusTypeDef HAL_SPI_TransmitReceive(SPI_HandleTypeDef *hspi, uint8_t *pTxData, uint8_t *pRxData, uint16_t Size, uint32_t Timeout);
NYX 0:85b3fd62ea1a 444 HAL_StatusTypeDef HAL_SPI_Transmit_IT(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size);
NYX 0:85b3fd62ea1a 445 HAL_StatusTypeDef HAL_SPI_Receive_IT(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size);
NYX 0:85b3fd62ea1a 446 HAL_StatusTypeDef HAL_SPI_TransmitReceive_IT(SPI_HandleTypeDef *hspi, uint8_t *pTxData, uint8_t *pRxData, uint16_t Size);
NYX 0:85b3fd62ea1a 447 HAL_StatusTypeDef HAL_SPI_Transmit_DMA(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size);
NYX 0:85b3fd62ea1a 448 HAL_StatusTypeDef HAL_SPI_Receive_DMA(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size);
NYX 0:85b3fd62ea1a 449 HAL_StatusTypeDef HAL_SPI_TransmitReceive_DMA(SPI_HandleTypeDef *hspi, uint8_t *pTxData, uint8_t *pRxData, uint16_t Size);
NYX 0:85b3fd62ea1a 450 HAL_StatusTypeDef HAL_SPI_DMAPause(SPI_HandleTypeDef *hspi);
NYX 0:85b3fd62ea1a 451 HAL_StatusTypeDef HAL_SPI_DMAResume(SPI_HandleTypeDef *hspi);
NYX 0:85b3fd62ea1a 452 HAL_StatusTypeDef HAL_SPI_DMAStop(SPI_HandleTypeDef *hspi);
NYX 0:85b3fd62ea1a 453 /* Transfer Abort functions */
NYX 0:85b3fd62ea1a 454 HAL_StatusTypeDef HAL_SPI_Abort(SPI_HandleTypeDef *hspi);
NYX 0:85b3fd62ea1a 455 HAL_StatusTypeDef HAL_SPI_Abort_IT(SPI_HandleTypeDef *hspi);
NYX 0:85b3fd62ea1a 456
NYX 0:85b3fd62ea1a 457 void HAL_SPI_IRQHandler(SPI_HandleTypeDef *hspi);
NYX 0:85b3fd62ea1a 458 void HAL_SPI_TxCpltCallback(SPI_HandleTypeDef *hspi);
NYX 0:85b3fd62ea1a 459 void HAL_SPI_RxCpltCallback(SPI_HandleTypeDef *hspi);
NYX 0:85b3fd62ea1a 460 void HAL_SPI_TxRxCpltCallback(SPI_HandleTypeDef *hspi);
NYX 0:85b3fd62ea1a 461 void HAL_SPI_TxHalfCpltCallback(SPI_HandleTypeDef *hspi);
NYX 0:85b3fd62ea1a 462 void HAL_SPI_RxHalfCpltCallback(SPI_HandleTypeDef *hspi);
NYX 0:85b3fd62ea1a 463 void HAL_SPI_TxRxHalfCpltCallback(SPI_HandleTypeDef *hspi);
NYX 0:85b3fd62ea1a 464 void HAL_SPI_ErrorCallback(SPI_HandleTypeDef *hspi);
NYX 0:85b3fd62ea1a 465 void HAL_SPI_AbortCpltCallback(SPI_HandleTypeDef *hspi);
NYX 0:85b3fd62ea1a 466 /**
NYX 0:85b3fd62ea1a 467 * @}
NYX 0:85b3fd62ea1a 468 */
NYX 0:85b3fd62ea1a 469
NYX 0:85b3fd62ea1a 470 /** @addtogroup SPI_Exported_Functions_Group3
NYX 0:85b3fd62ea1a 471 * @{
NYX 0:85b3fd62ea1a 472 */
NYX 0:85b3fd62ea1a 473 /* Peripheral State and Error functions ***************************************/
NYX 0:85b3fd62ea1a 474 HAL_SPI_StateTypeDef HAL_SPI_GetState(SPI_HandleTypeDef *hspi);
NYX 0:85b3fd62ea1a 475 uint32_t HAL_SPI_GetError(SPI_HandleTypeDef *hspi);
NYX 0:85b3fd62ea1a 476 /**
NYX 0:85b3fd62ea1a 477 * @}
NYX 0:85b3fd62ea1a 478 */
NYX 0:85b3fd62ea1a 479
NYX 0:85b3fd62ea1a 480 /**
NYX 0:85b3fd62ea1a 481 * @}
NYX 0:85b3fd62ea1a 482 */
NYX 0:85b3fd62ea1a 483
NYX 0:85b3fd62ea1a 484 /* Private types -------------------------------------------------------------*/
NYX 0:85b3fd62ea1a 485 /* Private variables ---------------------------------------------------------*/
NYX 0:85b3fd62ea1a 486 /* Private constants ---------------------------------------------------------*/
NYX 0:85b3fd62ea1a 487
NYX 0:85b3fd62ea1a 488 /* Private macros ------------------------------------------------------------*/
NYX 0:85b3fd62ea1a 489 /** @defgroup SPI_Private_Macros SPI Private Macros
NYX 0:85b3fd62ea1a 490 * @{
NYX 0:85b3fd62ea1a 491 */
NYX 0:85b3fd62ea1a 492
NYX 0:85b3fd62ea1a 493 /** @brief Set the SPI transmit-only mode.
NYX 0:85b3fd62ea1a 494 * @param __HANDLE__: specifies the SPI Handle.
NYX 0:85b3fd62ea1a 495 * This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral.
NYX 0:85b3fd62ea1a 496 * @retval None
NYX 0:85b3fd62ea1a 497 */
NYX 0:85b3fd62ea1a 498 #define SPI_1LINE_TX(__HANDLE__) ((__HANDLE__)->Instance->CR1 |= SPI_CR1_BIDIOE)
NYX 0:85b3fd62ea1a 499
NYX 0:85b3fd62ea1a 500 /** @brief Set the SPI receive-only mode.
NYX 0:85b3fd62ea1a 501 * @param __HANDLE__: specifies the SPI Handle.
NYX 0:85b3fd62ea1a 502 * This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral.
NYX 0:85b3fd62ea1a 503 * @retval None
NYX 0:85b3fd62ea1a 504 */
NYX 0:85b3fd62ea1a 505 #define SPI_1LINE_RX(__HANDLE__) ((__HANDLE__)->Instance->CR1 &= (~SPI_CR1_BIDIOE))
NYX 0:85b3fd62ea1a 506
NYX 0:85b3fd62ea1a 507 /** @brief Reset the CRC calculation of the SPI.
NYX 0:85b3fd62ea1a 508 * @param __HANDLE__: specifies the SPI Handle.
NYX 0:85b3fd62ea1a 509 * This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral.
NYX 0:85b3fd62ea1a 510 * @retval None
NYX 0:85b3fd62ea1a 511 */
NYX 0:85b3fd62ea1a 512 #define SPI_RESET_CRC(__HANDLE__) do{(__HANDLE__)->Instance->CR1 &= (uint16_t)(~SPI_CR1_CRCEN);\
NYX 0:85b3fd62ea1a 513 (__HANDLE__)->Instance->CR1 |= SPI_CR1_CRCEN;}while(0U)
NYX 0:85b3fd62ea1a 514
NYX 0:85b3fd62ea1a 515 #define IS_SPI_MODE(MODE) (((MODE) == SPI_MODE_SLAVE) || \
NYX 0:85b3fd62ea1a 516 ((MODE) == SPI_MODE_MASTER))
NYX 0:85b3fd62ea1a 517
NYX 0:85b3fd62ea1a 518 #define IS_SPI_DIRECTION(MODE) (((MODE) == SPI_DIRECTION_2LINES) || \
NYX 0:85b3fd62ea1a 519 ((MODE) == SPI_DIRECTION_2LINES_RXONLY) || \
NYX 0:85b3fd62ea1a 520 ((MODE) == SPI_DIRECTION_1LINE))
NYX 0:85b3fd62ea1a 521
NYX 0:85b3fd62ea1a 522 #define IS_SPI_DIRECTION_2LINES(MODE) ((MODE) == SPI_DIRECTION_2LINES)
NYX 0:85b3fd62ea1a 523
NYX 0:85b3fd62ea1a 524 #define IS_SPI_DIRECTION_2LINES_OR_1LINE(MODE) (((MODE) == SPI_DIRECTION_2LINES) || \
NYX 0:85b3fd62ea1a 525 ((MODE) == SPI_DIRECTION_1LINE))
NYX 0:85b3fd62ea1a 526
NYX 0:85b3fd62ea1a 527 #define IS_SPI_DATASIZE(DATASIZE) (((DATASIZE) == SPI_DATASIZE_16BIT) || \
NYX 0:85b3fd62ea1a 528 ((DATASIZE) == SPI_DATASIZE_8BIT))
NYX 0:85b3fd62ea1a 529
NYX 0:85b3fd62ea1a 530 #define IS_SPI_CPOL(CPOL) (((CPOL) == SPI_POLARITY_LOW) || \
NYX 0:85b3fd62ea1a 531 ((CPOL) == SPI_POLARITY_HIGH))
NYX 0:85b3fd62ea1a 532
NYX 0:85b3fd62ea1a 533 #define IS_SPI_CPHA(CPHA) (((CPHA) == SPI_PHASE_1EDGE) || \
NYX 0:85b3fd62ea1a 534 ((CPHA) == SPI_PHASE_2EDGE))
NYX 0:85b3fd62ea1a 535
NYX 0:85b3fd62ea1a 536 #define IS_SPI_NSS(NSS) (((NSS) == SPI_NSS_SOFT) || \
NYX 0:85b3fd62ea1a 537 ((NSS) == SPI_NSS_HARD_INPUT) || \
NYX 0:85b3fd62ea1a 538 ((NSS) == SPI_NSS_HARD_OUTPUT))
NYX 0:85b3fd62ea1a 539
NYX 0:85b3fd62ea1a 540 #define IS_SPI_BAUDRATE_PRESCALER(PRESCALER) (((PRESCALER) == SPI_BAUDRATEPRESCALER_2) || \
NYX 0:85b3fd62ea1a 541 ((PRESCALER) == SPI_BAUDRATEPRESCALER_4) || \
NYX 0:85b3fd62ea1a 542 ((PRESCALER) == SPI_BAUDRATEPRESCALER_8) || \
NYX 0:85b3fd62ea1a 543 ((PRESCALER) == SPI_BAUDRATEPRESCALER_16) || \
NYX 0:85b3fd62ea1a 544 ((PRESCALER) == SPI_BAUDRATEPRESCALER_32) || \
NYX 0:85b3fd62ea1a 545 ((PRESCALER) == SPI_BAUDRATEPRESCALER_64) || \
NYX 0:85b3fd62ea1a 546 ((PRESCALER) == SPI_BAUDRATEPRESCALER_128) || \
NYX 0:85b3fd62ea1a 547 ((PRESCALER) == SPI_BAUDRATEPRESCALER_256))
NYX 0:85b3fd62ea1a 548
NYX 0:85b3fd62ea1a 549 #define IS_SPI_FIRST_BIT(BIT) (((BIT) == SPI_FIRSTBIT_MSB) || \
NYX 0:85b3fd62ea1a 550 ((BIT) == SPI_FIRSTBIT_LSB))
NYX 0:85b3fd62ea1a 551
NYX 0:85b3fd62ea1a 552 #define IS_SPI_TIMODE(MODE) (((MODE) == SPI_TIMODE_DISABLE) || \
NYX 0:85b3fd62ea1a 553 ((MODE) == SPI_TIMODE_ENABLE))
NYX 0:85b3fd62ea1a 554
NYX 0:85b3fd62ea1a 555 #define IS_SPI_CRC_CALCULATION(CALCULATION) (((CALCULATION) == SPI_CRCCALCULATION_DISABLE) || \
NYX 0:85b3fd62ea1a 556 ((CALCULATION) == SPI_CRCCALCULATION_ENABLE))
NYX 0:85b3fd62ea1a 557
NYX 0:85b3fd62ea1a 558 #define IS_SPI_CRC_POLYNOMIAL(POLYNOMIAL) (((POLYNOMIAL) >= 0x01U) && ((POLYNOMIAL) <= 0xFFFFU))
NYX 0:85b3fd62ea1a 559
NYX 0:85b3fd62ea1a 560 /**
NYX 0:85b3fd62ea1a 561 * @}
NYX 0:85b3fd62ea1a 562 */
NYX 0:85b3fd62ea1a 563
NYX 0:85b3fd62ea1a 564 /* Private functions ---------------------------------------------------------*/
NYX 0:85b3fd62ea1a 565 /** @defgroup SPI_Private_Functions SPI Private Functions
NYX 0:85b3fd62ea1a 566 * @{
NYX 0:85b3fd62ea1a 567 */
NYX 0:85b3fd62ea1a 568
NYX 0:85b3fd62ea1a 569 /**
NYX 0:85b3fd62ea1a 570 * @}
NYX 0:85b3fd62ea1a 571 */
NYX 0:85b3fd62ea1a 572
NYX 0:85b3fd62ea1a 573 /**
NYX 0:85b3fd62ea1a 574 * @}
NYX 0:85b3fd62ea1a 575 */
NYX 0:85b3fd62ea1a 576
NYX 0:85b3fd62ea1a 577 /**
NYX 0:85b3fd62ea1a 578 * @}
NYX 0:85b3fd62ea1a 579 */
NYX 0:85b3fd62ea1a 580
NYX 0:85b3fd62ea1a 581 #ifdef __cplusplus
NYX 0:85b3fd62ea1a 582 }
NYX 0:85b3fd62ea1a 583 #endif
NYX 0:85b3fd62ea1a 584
NYX 0:85b3fd62ea1a 585 #endif /* __STM32F4xx_HAL_SPI_H */
NYX 0:85b3fd62ea1a 586
NYX 0:85b3fd62ea1a 587 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/