Takaaki Numai / mbed-dev

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targets/TARGET_STM/TARGET_STM32F4/device/stm32f4xx_hal_sdram.h@0:85b3fd62ea1a, 2020-03-16 (annotated)

Committer:
NYX
Date:
Mon Mar 16 06:35:48 2020 +0000
Revision:
0:85b3fd62ea1a
reinport to mbed;

Who changed what in which revision?

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NYX 0:85b3fd62ea1a 1 /**
NYX 0:85b3fd62ea1a 2 ******************************************************************************
NYX 0:85b3fd62ea1a 3 * @file stm32f4xx_hal_sdram.h
NYX 0:85b3fd62ea1a 4 * @author MCD Application Team
NYX 0:85b3fd62ea1a 5 * @version V1.7.1
NYX 0:85b3fd62ea1a 6 * @date 14-April-2017
NYX 0:85b3fd62ea1a 7 * @brief Header file of SDRAM HAL module.
NYX 0:85b3fd62ea1a 8 ******************************************************************************
NYX 0:85b3fd62ea1a 9 * @attention
NYX 0:85b3fd62ea1a 10 *
NYX 0:85b3fd62ea1a 11 * <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
NYX 0:85b3fd62ea1a 12 *
NYX 0:85b3fd62ea1a 13 * Redistribution and use in source and binary forms, with or without modification,
NYX 0:85b3fd62ea1a 14 * are permitted provided that the following conditions are met:
NYX 0:85b3fd62ea1a 15 * 1. Redistributions of source code must retain the above copyright notice,
NYX 0:85b3fd62ea1a 16 * this list of conditions and the following disclaimer.
NYX 0:85b3fd62ea1a 17 * 2. Redistributions in binary form must reproduce the above copyright notice,
NYX 0:85b3fd62ea1a 18 * this list of conditions and the following disclaimer in the documentation
NYX 0:85b3fd62ea1a 19 * and/or other materials provided with the distribution.
NYX 0:85b3fd62ea1a 20 * 3. Neither the name of STMicroelectronics nor the names of its contributors
NYX 0:85b3fd62ea1a 21 * may be used to endorse or promote products derived from this software
NYX 0:85b3fd62ea1a 22 * without specific prior written permission.
NYX 0:85b3fd62ea1a 23 *
NYX 0:85b3fd62ea1a 24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
NYX 0:85b3fd62ea1a 25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
NYX 0:85b3fd62ea1a 26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
NYX 0:85b3fd62ea1a 27 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
NYX 0:85b3fd62ea1a 28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
NYX 0:85b3fd62ea1a 29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
NYX 0:85b3fd62ea1a 30 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
NYX 0:85b3fd62ea1a 31 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
NYX 0:85b3fd62ea1a 32 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
NYX 0:85b3fd62ea1a 33 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
NYX 0:85b3fd62ea1a 34 *
NYX 0:85b3fd62ea1a 35 ******************************************************************************
NYX 0:85b3fd62ea1a 36 */
NYX 0:85b3fd62ea1a 37
NYX 0:85b3fd62ea1a 38 /* Define to prevent recursive inclusion -------------------------------------*/
NYX 0:85b3fd62ea1a 39 #ifndef __STM32F4xx_HAL_SDRAM_H
NYX 0:85b3fd62ea1a 40 #define __STM32F4xx_HAL_SDRAM_H
NYX 0:85b3fd62ea1a 41
NYX 0:85b3fd62ea1a 42 #ifdef __cplusplus
NYX 0:85b3fd62ea1a 43 extern "C" {
NYX 0:85b3fd62ea1a 44 #endif
NYX 0:85b3fd62ea1a 45
NYX 0:85b3fd62ea1a 46 #if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx) ||\
NYX 0:85b3fd62ea1a 47 defined(STM32F446xx) || defined(STM32F469xx) || defined(STM32F479xx)
NYX 0:85b3fd62ea1a 48
NYX 0:85b3fd62ea1a 49 /* Includes ------------------------------------------------------------------*/
NYX 0:85b3fd62ea1a 50 #include "stm32f4xx_ll_fmc.h"
NYX 0:85b3fd62ea1a 51
NYX 0:85b3fd62ea1a 52 /** @addtogroup STM32F4xx_HAL_Driver
NYX 0:85b3fd62ea1a 53 * @{
NYX 0:85b3fd62ea1a 54 */
NYX 0:85b3fd62ea1a 55
NYX 0:85b3fd62ea1a 56 /** @addtogroup SDRAM
NYX 0:85b3fd62ea1a 57 * @{
NYX 0:85b3fd62ea1a 58 */
NYX 0:85b3fd62ea1a 59
NYX 0:85b3fd62ea1a 60 /* Exported typedef ----------------------------------------------------------*/
NYX 0:85b3fd62ea1a 61 /** @defgroup SDRAM_Exported_Types SDRAM Exported Types
NYX 0:85b3fd62ea1a 62 * @{
NYX 0:85b3fd62ea1a 63 */
NYX 0:85b3fd62ea1a 64
NYX 0:85b3fd62ea1a 65 /**
NYX 0:85b3fd62ea1a 66 * @brief HAL SDRAM State structure definition
NYX 0:85b3fd62ea1a 67 */
NYX 0:85b3fd62ea1a 68 typedef enum
NYX 0:85b3fd62ea1a 69 {
NYX 0:85b3fd62ea1a 70 HAL_SDRAM_STATE_RESET = 0x00U, /*!< SDRAM not yet initialized or disabled */
NYX 0:85b3fd62ea1a 71 HAL_SDRAM_STATE_READY = 0x01U, /*!< SDRAM initialized and ready for use */
NYX 0:85b3fd62ea1a 72 HAL_SDRAM_STATE_BUSY = 0x02U, /*!< SDRAM internal process is ongoing */
NYX 0:85b3fd62ea1a 73 HAL_SDRAM_STATE_ERROR = 0x03U, /*!< SDRAM error state */
NYX 0:85b3fd62ea1a 74 HAL_SDRAM_STATE_WRITE_PROTECTED = 0x04U, /*!< SDRAM device write protected */
NYX 0:85b3fd62ea1a 75 HAL_SDRAM_STATE_PRECHARGED = 0x05U /*!< SDRAM device precharged */
NYX 0:85b3fd62ea1a 76
NYX 0:85b3fd62ea1a 77 }HAL_SDRAM_StateTypeDef;
NYX 0:85b3fd62ea1a 78
NYX 0:85b3fd62ea1a 79 /**
NYX 0:85b3fd62ea1a 80 * @brief SDRAM handle Structure definition
NYX 0:85b3fd62ea1a 81 */
NYX 0:85b3fd62ea1a 82 typedef struct
NYX 0:85b3fd62ea1a 83 {
NYX 0:85b3fd62ea1a 84 FMC_SDRAM_TypeDef *Instance; /*!< Register base address */
NYX 0:85b3fd62ea1a 85
NYX 0:85b3fd62ea1a 86 FMC_SDRAM_InitTypeDef Init; /*!< SDRAM device configuration parameters */
NYX 0:85b3fd62ea1a 87
NYX 0:85b3fd62ea1a 88 __IO HAL_SDRAM_StateTypeDef State; /*!< SDRAM access state */
NYX 0:85b3fd62ea1a 89
NYX 0:85b3fd62ea1a 90 HAL_LockTypeDef Lock; /*!< SDRAM locking object */
NYX 0:85b3fd62ea1a 91
NYX 0:85b3fd62ea1a 92 DMA_HandleTypeDef *hdma; /*!< Pointer DMA handler */
NYX 0:85b3fd62ea1a 93
NYX 0:85b3fd62ea1a 94 }SDRAM_HandleTypeDef;
NYX 0:85b3fd62ea1a 95 /**
NYX 0:85b3fd62ea1a 96 * @}
NYX 0:85b3fd62ea1a 97 */
NYX 0:85b3fd62ea1a 98
NYX 0:85b3fd62ea1a 99 /* Exported constants --------------------------------------------------------*/
NYX 0:85b3fd62ea1a 100 /* Exported macro ------------------------------------------------------------*/
NYX 0:85b3fd62ea1a 101 /** @defgroup SDRAM_Exported_Macros SDRAM Exported Macros
NYX 0:85b3fd62ea1a 102 * @{
NYX 0:85b3fd62ea1a 103 */
NYX 0:85b3fd62ea1a 104
NYX 0:85b3fd62ea1a 105 /** @brief Reset SDRAM handle state
NYX 0:85b3fd62ea1a 106 * @param __HANDLE__: specifies the SDRAM handle.
NYX 0:85b3fd62ea1a 107 * @retval None
NYX 0:85b3fd62ea1a 108 */
NYX 0:85b3fd62ea1a 109 #define __HAL_SDRAM_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_SDRAM_STATE_RESET)
NYX 0:85b3fd62ea1a 110 /**
NYX 0:85b3fd62ea1a 111 * @}
NYX 0:85b3fd62ea1a 112 */
NYX 0:85b3fd62ea1a 113
NYX 0:85b3fd62ea1a 114 /* Exported functions --------------------------------------------------------*/
NYX 0:85b3fd62ea1a 115 /** @addtogroup SDRAM_Exported_Functions SDRAM Exported Functions
NYX 0:85b3fd62ea1a 116 * @{
NYX 0:85b3fd62ea1a 117 */
NYX 0:85b3fd62ea1a 118
NYX 0:85b3fd62ea1a 119 /** @addtogroup SDRAM_Exported_Functions_Group1
NYX 0:85b3fd62ea1a 120 * @{
NYX 0:85b3fd62ea1a 121 */
NYX 0:85b3fd62ea1a 122
NYX 0:85b3fd62ea1a 123 /* Initialization/de-initialization functions *********************************/
NYX 0:85b3fd62ea1a 124 HAL_StatusTypeDef HAL_SDRAM_Init(SDRAM_HandleTypeDef *hsdram, FMC_SDRAM_TimingTypeDef *Timing);
NYX 0:85b3fd62ea1a 125 HAL_StatusTypeDef HAL_SDRAM_DeInit(SDRAM_HandleTypeDef *hsdram);
NYX 0:85b3fd62ea1a 126 void HAL_SDRAM_MspInit(SDRAM_HandleTypeDef *hsdram);
NYX 0:85b3fd62ea1a 127 void HAL_SDRAM_MspDeInit(SDRAM_HandleTypeDef *hsdram);
NYX 0:85b3fd62ea1a 128
NYX 0:85b3fd62ea1a 129 void HAL_SDRAM_IRQHandler(SDRAM_HandleTypeDef *hsdram);
NYX 0:85b3fd62ea1a 130 void HAL_SDRAM_RefreshErrorCallback(SDRAM_HandleTypeDef *hsdram);
NYX 0:85b3fd62ea1a 131 void HAL_SDRAM_DMA_XferCpltCallback(DMA_HandleTypeDef *hdma);
NYX 0:85b3fd62ea1a 132 void HAL_SDRAM_DMA_XferErrorCallback(DMA_HandleTypeDef *hdma);
NYX 0:85b3fd62ea1a 133 /**
NYX 0:85b3fd62ea1a 134 * @}
NYX 0:85b3fd62ea1a 135 */
NYX 0:85b3fd62ea1a 136
NYX 0:85b3fd62ea1a 137 /** @addtogroup SDRAM_Exported_Functions_Group2
NYX 0:85b3fd62ea1a 138 * @{
NYX 0:85b3fd62ea1a 139 */
NYX 0:85b3fd62ea1a 140 /* I/O operation functions ****************************************************/
NYX 0:85b3fd62ea1a 141 HAL_StatusTypeDef HAL_SDRAM_Read_8b(SDRAM_HandleTypeDef *hsdram, uint32_t *pAddress, uint8_t *pDstBuffer, uint32_t BufferSize);
NYX 0:85b3fd62ea1a 142 HAL_StatusTypeDef HAL_SDRAM_Write_8b(SDRAM_HandleTypeDef *hsdram, uint32_t *pAddress, uint8_t *pSrcBuffer, uint32_t BufferSize);
NYX 0:85b3fd62ea1a 143 HAL_StatusTypeDef HAL_SDRAM_Read_16b(SDRAM_HandleTypeDef *hsdram, uint32_t *pAddress, uint16_t *pDstBuffer, uint32_t BufferSize);
NYX 0:85b3fd62ea1a 144 HAL_StatusTypeDef HAL_SDRAM_Write_16b(SDRAM_HandleTypeDef *hsdram, uint32_t *pAddress, uint16_t *pSrcBuffer, uint32_t BufferSize);
NYX 0:85b3fd62ea1a 145 HAL_StatusTypeDef HAL_SDRAM_Read_32b(SDRAM_HandleTypeDef *hsdram, uint32_t *pAddress, uint32_t *pDstBuffer, uint32_t BufferSize);
NYX 0:85b3fd62ea1a 146 HAL_StatusTypeDef HAL_SDRAM_Write_32b(SDRAM_HandleTypeDef *hsdram, uint32_t *pAddress, uint32_t *pSrcBuffer, uint32_t BufferSize);
NYX 0:85b3fd62ea1a 147
NYX 0:85b3fd62ea1a 148 HAL_StatusTypeDef HAL_SDRAM_Read_DMA(SDRAM_HandleTypeDef *hsdram, uint32_t * pAddress, uint32_t *pDstBuffer, uint32_t BufferSize);
NYX 0:85b3fd62ea1a 149 HAL_StatusTypeDef HAL_SDRAM_Write_DMA(SDRAM_HandleTypeDef *hsdram, uint32_t *pAddress, uint32_t *pSrcBuffer, uint32_t BufferSize);
NYX 0:85b3fd62ea1a 150 /**
NYX 0:85b3fd62ea1a 151 * @}
NYX 0:85b3fd62ea1a 152 */
NYX 0:85b3fd62ea1a 153
NYX 0:85b3fd62ea1a 154 /** @addtogroup SDRAM_Exported_Functions_Group3
NYX 0:85b3fd62ea1a 155 * @{
NYX 0:85b3fd62ea1a 156 */
NYX 0:85b3fd62ea1a 157 /* SDRAM Control functions *****************************************************/
NYX 0:85b3fd62ea1a 158 HAL_StatusTypeDef HAL_SDRAM_WriteProtection_Enable(SDRAM_HandleTypeDef *hsdram);
NYX 0:85b3fd62ea1a 159 HAL_StatusTypeDef HAL_SDRAM_WriteProtection_Disable(SDRAM_HandleTypeDef *hsdram);
NYX 0:85b3fd62ea1a 160 HAL_StatusTypeDef HAL_SDRAM_SendCommand(SDRAM_HandleTypeDef *hsdram, FMC_SDRAM_CommandTypeDef *Command, uint32_t Timeout);
NYX 0:85b3fd62ea1a 161 HAL_StatusTypeDef HAL_SDRAM_ProgramRefreshRate(SDRAM_HandleTypeDef *hsdram, uint32_t RefreshRate);
NYX 0:85b3fd62ea1a 162 HAL_StatusTypeDef HAL_SDRAM_SetAutoRefreshNumber(SDRAM_HandleTypeDef *hsdram, uint32_t AutoRefreshNumber);
NYX 0:85b3fd62ea1a 163 uint32_t HAL_SDRAM_GetModeStatus(SDRAM_HandleTypeDef *hsdram);
NYX 0:85b3fd62ea1a 164 /**
NYX 0:85b3fd62ea1a 165 * @}
NYX 0:85b3fd62ea1a 166 */
NYX 0:85b3fd62ea1a 167
NYX 0:85b3fd62ea1a 168 /** @addtogroup SDRAM_Exported_Functions_Group4
NYX 0:85b3fd62ea1a 169 * @{
NYX 0:85b3fd62ea1a 170 */
NYX 0:85b3fd62ea1a 171 /* SDRAM State functions ********************************************************/
NYX 0:85b3fd62ea1a 172 HAL_SDRAM_StateTypeDef HAL_SDRAM_GetState(SDRAM_HandleTypeDef *hsdram);
NYX 0:85b3fd62ea1a 173 /**
NYX 0:85b3fd62ea1a 174 * @}
NYX 0:85b3fd62ea1a 175 */
NYX 0:85b3fd62ea1a 176
NYX 0:85b3fd62ea1a 177 /**
NYX 0:85b3fd62ea1a 178 * @}
NYX 0:85b3fd62ea1a 179 */
NYX 0:85b3fd62ea1a 180
NYX 0:85b3fd62ea1a 181 /**
NYX 0:85b3fd62ea1a 182 * @}
NYX 0:85b3fd62ea1a 183 */
NYX 0:85b3fd62ea1a 184
NYX 0:85b3fd62ea1a 185 #endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || STM32F446xx || STM32F469xx || STM32F479xx */
NYX 0:85b3fd62ea1a 186
NYX 0:85b3fd62ea1a 187 /**
NYX 0:85b3fd62ea1a 188 * @}
NYX 0:85b3fd62ea1a 189 */
NYX 0:85b3fd62ea1a 190
NYX 0:85b3fd62ea1a 191 #ifdef __cplusplus
NYX 0:85b3fd62ea1a 192 }
NYX 0:85b3fd62ea1a 193 #endif
NYX 0:85b3fd62ea1a 194
NYX 0:85b3fd62ea1a 195 #endif /* __STM32F4xx_HAL_SDRAM_H */
NYX 0:85b3fd62ea1a 196
NYX 0:85b3fd62ea1a 197 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/