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targets/TARGET_STM/TARGET_STM32F4/device/stm32f4xx_hal_pwr_ex.h@0:85b3fd62ea1a, 2020-03-16 (annotated)

Committer:
NYX
Date:
Mon Mar 16 06:35:48 2020 +0000
Revision:
0:85b3fd62ea1a
reinport to mbed;

Who changed what in which revision?

UserRevisionLine numberNew contents of line
NYX 0:85b3fd62ea1a 1 /**
NYX 0:85b3fd62ea1a 2 ******************************************************************************
NYX 0:85b3fd62ea1a 3 * @file stm32f4xx_hal_pwr_ex.h
NYX 0:85b3fd62ea1a 4 * @author MCD Application Team
NYX 0:85b3fd62ea1a 5 * @version V1.7.1
NYX 0:85b3fd62ea1a 6 * @date 14-April-2017
NYX 0:85b3fd62ea1a 7 * @brief Header file of PWR HAL Extension module.
NYX 0:85b3fd62ea1a 8 ******************************************************************************
NYX 0:85b3fd62ea1a 9 * @attention
NYX 0:85b3fd62ea1a 10 *
NYX 0:85b3fd62ea1a 11 * <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
NYX 0:85b3fd62ea1a 12 *
NYX 0:85b3fd62ea1a 13 * Redistribution and use in source and binary forms, with or without modification,
NYX 0:85b3fd62ea1a 14 * are permitted provided that the following conditions are met:
NYX 0:85b3fd62ea1a 15 * 1. Redistributions of source code must retain the above copyright notice,
NYX 0:85b3fd62ea1a 16 * this list of conditions and the following disclaimer.
NYX 0:85b3fd62ea1a 17 * 2. Redistributions in binary form must reproduce the above copyright notice,
NYX 0:85b3fd62ea1a 18 * this list of conditions and the following disclaimer in the documentation
NYX 0:85b3fd62ea1a 19 * and/or other materials provided with the distribution.
NYX 0:85b3fd62ea1a 20 * 3. Neither the name of STMicroelectronics nor the names of its contributors
NYX 0:85b3fd62ea1a 21 * may be used to endorse or promote products derived from this software
NYX 0:85b3fd62ea1a 22 * without specific prior written permission.
NYX 0:85b3fd62ea1a 23 *
NYX 0:85b3fd62ea1a 24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
NYX 0:85b3fd62ea1a 25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
NYX 0:85b3fd62ea1a 26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
NYX 0:85b3fd62ea1a 27 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
NYX 0:85b3fd62ea1a 28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
NYX 0:85b3fd62ea1a 29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
NYX 0:85b3fd62ea1a 30 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
NYX 0:85b3fd62ea1a 31 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
NYX 0:85b3fd62ea1a 32 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
NYX 0:85b3fd62ea1a 33 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
NYX 0:85b3fd62ea1a 34 *
NYX 0:85b3fd62ea1a 35 ******************************************************************************
NYX 0:85b3fd62ea1a 36 */
NYX 0:85b3fd62ea1a 37
NYX 0:85b3fd62ea1a 38 /* Define to prevent recursive inclusion -------------------------------------*/
NYX 0:85b3fd62ea1a 39 #ifndef __STM32F4xx_HAL_PWR_EX_H
NYX 0:85b3fd62ea1a 40 #define __STM32F4xx_HAL_PWR_EX_H
NYX 0:85b3fd62ea1a 41
NYX 0:85b3fd62ea1a 42 #ifdef __cplusplus
NYX 0:85b3fd62ea1a 43 extern "C" {
NYX 0:85b3fd62ea1a 44 #endif
NYX 0:85b3fd62ea1a 45
NYX 0:85b3fd62ea1a 46 /* Includes ------------------------------------------------------------------*/
NYX 0:85b3fd62ea1a 47 #include "stm32f4xx_hal_def.h"
NYX 0:85b3fd62ea1a 48
NYX 0:85b3fd62ea1a 49 /** @addtogroup STM32F4xx_HAL_Driver
NYX 0:85b3fd62ea1a 50 * @{
NYX 0:85b3fd62ea1a 51 */
NYX 0:85b3fd62ea1a 52
NYX 0:85b3fd62ea1a 53 /** @addtogroup PWREx
NYX 0:85b3fd62ea1a 54 * @{
NYX 0:85b3fd62ea1a 55 */
NYX 0:85b3fd62ea1a 56
NYX 0:85b3fd62ea1a 57 /* Exported types ------------------------------------------------------------*/
NYX 0:85b3fd62ea1a 58 /* Exported constants --------------------------------------------------------*/
NYX 0:85b3fd62ea1a 59 /** @defgroup PWREx_Exported_Constants PWREx Exported Constants
NYX 0:85b3fd62ea1a 60 * @{
NYX 0:85b3fd62ea1a 61 */
NYX 0:85b3fd62ea1a 62 #if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx) ||\
NYX 0:85b3fd62ea1a 63 defined(STM32F446xx) || defined(STM32F469xx) || defined(STM32F479xx)
NYX 0:85b3fd62ea1a 64
NYX 0:85b3fd62ea1a 65 /** @defgroup PWREx_Regulator_state_in_UnderDrive_mode PWREx Regulator state in UnderDrive mode
NYX 0:85b3fd62ea1a 66 * @{
NYX 0:85b3fd62ea1a 67 */
NYX 0:85b3fd62ea1a 68 #define PWR_MAINREGULATOR_UNDERDRIVE_ON PWR_CR_MRUDS
NYX 0:85b3fd62ea1a 69 #define PWR_LOWPOWERREGULATOR_UNDERDRIVE_ON ((uint32_t)(PWR_CR_LPDS | PWR_CR_LPUDS))
NYX 0:85b3fd62ea1a 70 /**
NYX 0:85b3fd62ea1a 71 * @}
NYX 0:85b3fd62ea1a 72 */
NYX 0:85b3fd62ea1a 73
NYX 0:85b3fd62ea1a 74 /** @defgroup PWREx_Over_Under_Drive_Flag PWREx Over Under Drive Flag
NYX 0:85b3fd62ea1a 75 * @{
NYX 0:85b3fd62ea1a 76 */
NYX 0:85b3fd62ea1a 77 #define PWR_FLAG_ODRDY PWR_CSR_ODRDY
NYX 0:85b3fd62ea1a 78 #define PWR_FLAG_ODSWRDY PWR_CSR_ODSWRDY
NYX 0:85b3fd62ea1a 79 #define PWR_FLAG_UDRDY PWR_CSR_UDSWRDY
NYX 0:85b3fd62ea1a 80 /**
NYX 0:85b3fd62ea1a 81 * @}
NYX 0:85b3fd62ea1a 82 */
NYX 0:85b3fd62ea1a 83 #endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || STM32F446xx || STM32F469xx || STM32F479xx */
NYX 0:85b3fd62ea1a 84
NYX 0:85b3fd62ea1a 85 /** @defgroup PWREx_Regulator_Voltage_Scale PWREx Regulator Voltage Scale
NYX 0:85b3fd62ea1a 86 * @{
NYX 0:85b3fd62ea1a 87 */
NYX 0:85b3fd62ea1a 88 #if defined(STM32F405xx) || defined(STM32F407xx) || defined(STM32F415xx) || defined(STM32F417xx)
NYX 0:85b3fd62ea1a 89 #define PWR_REGULATOR_VOLTAGE_SCALE1 PWR_CR_VOS /* Scale 1 mode(default value at reset): the maximum value of fHCLK = 168 MHz. */
NYX 0:85b3fd62ea1a 90 #define PWR_REGULATOR_VOLTAGE_SCALE2 0x00000000U /* Scale 2 mode: the maximum value of fHCLK = 144 MHz. */
NYX 0:85b3fd62ea1a 91 #else
NYX 0:85b3fd62ea1a 92 #define PWR_REGULATOR_VOLTAGE_SCALE1 PWR_CR_VOS /* Scale 1 mode(default value at reset): the maximum value of fHCLK is 168 MHz. It can be extended to
NYX 0:85b3fd62ea1a 93 180 MHz by activating the over-drive mode. */
NYX 0:85b3fd62ea1a 94 #define PWR_REGULATOR_VOLTAGE_SCALE2 PWR_CR_VOS_1 /* Scale 2 mode: the maximum value of fHCLK is 144 MHz. It can be extended to
NYX 0:85b3fd62ea1a 95 168 MHz by activating the over-drive mode. */
NYX 0:85b3fd62ea1a 96 #define PWR_REGULATOR_VOLTAGE_SCALE3 PWR_CR_VOS_0 /* Scale 3 mode: the maximum value of fHCLK is 120 MHz. */
NYX 0:85b3fd62ea1a 97 #endif /* STM32F405xx || STM32F407xx || STM32F415xx || STM32F417xx */
NYX 0:85b3fd62ea1a 98 /**
NYX 0:85b3fd62ea1a 99 * @}
NYX 0:85b3fd62ea1a 100 */
NYX 0:85b3fd62ea1a 101 #if defined(STM32F410Tx) || defined(STM32F410Cx) || defined(STM32F410Rx) || defined(STM32F446xx) || defined(STM32F412Zx) || defined(STM32F412Vx) || \
NYX 0:85b3fd62ea1a 102 defined(STM32F412Rx) || defined(STM32F412Cx) || defined(STM32F413xx) || defined(STM32F423xx)
NYX 0:85b3fd62ea1a 103 /** @defgroup PWREx_WakeUp_Pins PWREx WakeUp Pins
NYX 0:85b3fd62ea1a 104 * @{
NYX 0:85b3fd62ea1a 105 */
NYX 0:85b3fd62ea1a 106 #define PWR_WAKEUP_PIN2 0x00000080U
NYX 0:85b3fd62ea1a 107 #if defined(STM32F410Tx) || defined(STM32F410Cx) || defined(STM32F410Rx) || defined(STM32F412Zx) || defined(STM32F412Vx) || \
NYX 0:85b3fd62ea1a 108 defined(STM32F412Rx) || defined(STM32F412Cx) || defined(STM32F413xx) || defined(STM32F423xx)
NYX 0:85b3fd62ea1a 109 #define PWR_WAKEUP_PIN3 0x00000040U
NYX 0:85b3fd62ea1a 110 #endif /* STM32F410xx || STM32F412Zx || STM32F412Vx || STM32F412Rx || STM32F412Zx || STM32F412Vx || \
NYX 0:85b3fd62ea1a 111 STM32F412Rx || STM32F412Cx || STM32F413xx || STM32F423xx */
NYX 0:85b3fd62ea1a 112 /**
NYX 0:85b3fd62ea1a 113 * @}
NYX 0:85b3fd62ea1a 114 */
NYX 0:85b3fd62ea1a 115 #endif /* STM32F410xx || STM32F446xx || STM32F412Zx || STM32F412Vx || STM32F412Rx || STM32F412Cx ||
NYX 0:85b3fd62ea1a 116 STM32F413xx || STM32F423xx */
NYX 0:85b3fd62ea1a 117
NYX 0:85b3fd62ea1a 118 /**
NYX 0:85b3fd62ea1a 119 * @}
NYX 0:85b3fd62ea1a 120 */
NYX 0:85b3fd62ea1a 121
NYX 0:85b3fd62ea1a 122 /* Exported macro ------------------------------------------------------------*/
NYX 0:85b3fd62ea1a 123 /** @defgroup PWREx_Exported_Constants PWREx Exported Constants
NYX 0:85b3fd62ea1a 124 * @{
NYX 0:85b3fd62ea1a 125 */
NYX 0:85b3fd62ea1a 126
NYX 0:85b3fd62ea1a 127 #if defined(STM32F405xx) || defined(STM32F407xx) || defined(STM32F415xx) || defined(STM32F417xx)
NYX 0:85b3fd62ea1a 128 /** @brief macros configure the main internal regulator output voltage.
NYX 0:85b3fd62ea1a 129 * @param __REGULATOR__: specifies the regulator output voltage to achieve
NYX 0:85b3fd62ea1a 130 * a tradeoff between performance and power consumption when the device does
NYX 0:85b3fd62ea1a 131 * not operate at the maximum frequency (refer to the datasheets for more details).
NYX 0:85b3fd62ea1a 132 * This parameter can be one of the following values:
NYX 0:85b3fd62ea1a 133 * @arg PWR_REGULATOR_VOLTAGE_SCALE1: Regulator voltage output Scale 1 mode
NYX 0:85b3fd62ea1a 134 * @arg PWR_REGULATOR_VOLTAGE_SCALE2: Regulator voltage output Scale 2 mode
NYX 0:85b3fd62ea1a 135 * @retval None
NYX 0:85b3fd62ea1a 136 */
NYX 0:85b3fd62ea1a 137 #define __HAL_PWR_VOLTAGESCALING_CONFIG(__REGULATOR__) do { \
NYX 0:85b3fd62ea1a 138 __IO uint32_t tmpreg = 0x00U; \
NYX 0:85b3fd62ea1a 139 MODIFY_REG(PWR->CR, PWR_CR_VOS, (__REGULATOR__)); \
NYX 0:85b3fd62ea1a 140 /* Delay after an RCC peripheral clock enabling */ \
NYX 0:85b3fd62ea1a 141 tmpreg = READ_BIT(PWR->CR, PWR_CR_VOS); \
NYX 0:85b3fd62ea1a 142 UNUSED(tmpreg); \
NYX 0:85b3fd62ea1a 143 } while(0U)
NYX 0:85b3fd62ea1a 144 #else
NYX 0:85b3fd62ea1a 145 /** @brief macros configure the main internal regulator output voltage.
NYX 0:85b3fd62ea1a 146 * @param __REGULATOR__: specifies the regulator output voltage to achieve
NYX 0:85b3fd62ea1a 147 * a tradeoff between performance and power consumption when the device does
NYX 0:85b3fd62ea1a 148 * not operate at the maximum frequency (refer to the datasheets for more details).
NYX 0:85b3fd62ea1a 149 * This parameter can be one of the following values:
NYX 0:85b3fd62ea1a 150 * @arg PWR_REGULATOR_VOLTAGE_SCALE1: Regulator voltage output Scale 1 mode
NYX 0:85b3fd62ea1a 151 * @arg PWR_REGULATOR_VOLTAGE_SCALE2: Regulator voltage output Scale 2 mode
NYX 0:85b3fd62ea1a 152 * @arg PWR_REGULATOR_VOLTAGE_SCALE3: Regulator voltage output Scale 3 mode
NYX 0:85b3fd62ea1a 153 * @retval None
NYX 0:85b3fd62ea1a 154 */
NYX 0:85b3fd62ea1a 155 #define __HAL_PWR_VOLTAGESCALING_CONFIG(__REGULATOR__) do { \
NYX 0:85b3fd62ea1a 156 __IO uint32_t tmpreg = 0x00U; \
NYX 0:85b3fd62ea1a 157 MODIFY_REG(PWR->CR, PWR_CR_VOS, (__REGULATOR__)); \
NYX 0:85b3fd62ea1a 158 /* Delay after an RCC peripheral clock enabling */ \
NYX 0:85b3fd62ea1a 159 tmpreg = READ_BIT(PWR->CR, PWR_CR_VOS); \
NYX 0:85b3fd62ea1a 160 UNUSED(tmpreg); \
NYX 0:85b3fd62ea1a 161 } while(0U)
NYX 0:85b3fd62ea1a 162 #endif /* STM32F405xx || STM32F407xx || STM32F415xx || STM32F417xx */
NYX 0:85b3fd62ea1a 163
NYX 0:85b3fd62ea1a 164 #if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx) ||\
NYX 0:85b3fd62ea1a 165 defined(STM32F446xx) || defined(STM32F469xx) || defined(STM32F479xx)
NYX 0:85b3fd62ea1a 166 /** @brief Macros to enable or disable the Over drive mode.
NYX 0:85b3fd62ea1a 167 * @note These macros can be used only for STM32F42xx/STM3243xx devices.
NYX 0:85b3fd62ea1a 168 */
NYX 0:85b3fd62ea1a 169 #define __HAL_PWR_OVERDRIVE_ENABLE() (*(__IO uint32_t *) CR_ODEN_BB = ENABLE)
NYX 0:85b3fd62ea1a 170 #define __HAL_PWR_OVERDRIVE_DISABLE() (*(__IO uint32_t *) CR_ODEN_BB = DISABLE)
NYX 0:85b3fd62ea1a 171
NYX 0:85b3fd62ea1a 172 /** @brief Macros to enable or disable the Over drive switching.
NYX 0:85b3fd62ea1a 173 * @note These macros can be used only for STM32F42xx/STM3243xx devices.
NYX 0:85b3fd62ea1a 174 */
NYX 0:85b3fd62ea1a 175 #define __HAL_PWR_OVERDRIVESWITCHING_ENABLE() (*(__IO uint32_t *) CR_ODSWEN_BB = ENABLE)
NYX 0:85b3fd62ea1a 176 #define __HAL_PWR_OVERDRIVESWITCHING_DISABLE() (*(__IO uint32_t *) CR_ODSWEN_BB = DISABLE)
NYX 0:85b3fd62ea1a 177
NYX 0:85b3fd62ea1a 178 /** @brief Macros to enable or disable the Under drive mode.
NYX 0:85b3fd62ea1a 179 * @note This mode is enabled only with STOP low power mode.
NYX 0:85b3fd62ea1a 180 * In this mode, the 1.2V domain is preserved in reduced leakage mode. This
NYX 0:85b3fd62ea1a 181 * mode is only available when the main regulator or the low power regulator
NYX 0:85b3fd62ea1a 182 * is in low voltage mode.
NYX 0:85b3fd62ea1a 183 * @note If the Under-drive mode was enabled, it is automatically disabled after
NYX 0:85b3fd62ea1a 184 * exiting Stop mode.
NYX 0:85b3fd62ea1a 185 * When the voltage regulator operates in Under-drive mode, an additional
NYX 0:85b3fd62ea1a 186 * startup delay is induced when waking up from Stop mode.
NYX 0:85b3fd62ea1a 187 */
NYX 0:85b3fd62ea1a 188 #define __HAL_PWR_UNDERDRIVE_ENABLE() (PWR->CR |= (uint32_t)PWR_CR_UDEN)
NYX 0:85b3fd62ea1a 189 #define __HAL_PWR_UNDERDRIVE_DISABLE() (PWR->CR &= (uint32_t)(~PWR_CR_UDEN))
NYX 0:85b3fd62ea1a 190
NYX 0:85b3fd62ea1a 191 /** @brief Check PWR flag is set or not.
NYX 0:85b3fd62ea1a 192 * @note These macros can be used only for STM32F42xx/STM3243xx devices.
NYX 0:85b3fd62ea1a 193 * @param __FLAG__: specifies the flag to check.
NYX 0:85b3fd62ea1a 194 * This parameter can be one of the following values:
NYX 0:85b3fd62ea1a 195 * @arg PWR_FLAG_ODRDY: This flag indicates that the Over-drive mode
NYX 0:85b3fd62ea1a 196 * is ready
NYX 0:85b3fd62ea1a 197 * @arg PWR_FLAG_ODSWRDY: This flag indicates that the Over-drive mode
NYX 0:85b3fd62ea1a 198 * switching is ready
NYX 0:85b3fd62ea1a 199 * @arg PWR_FLAG_UDRDY: This flag indicates that the Under-drive mode
NYX 0:85b3fd62ea1a 200 * is enabled in Stop mode
NYX 0:85b3fd62ea1a 201 * @retval The new state of __FLAG__ (TRUE or FALSE).
NYX 0:85b3fd62ea1a 202 */
NYX 0:85b3fd62ea1a 203 #define __HAL_PWR_GET_ODRUDR_FLAG(__FLAG__) ((PWR->CSR & (__FLAG__)) == (__FLAG__))
NYX 0:85b3fd62ea1a 204
NYX 0:85b3fd62ea1a 205 /** @brief Clear the Under-Drive Ready flag.
NYX 0:85b3fd62ea1a 206 * @note These macros can be used only for STM32F42xx/STM3243xx devices.
NYX 0:85b3fd62ea1a 207 */
NYX 0:85b3fd62ea1a 208 #define __HAL_PWR_CLEAR_ODRUDR_FLAG() (PWR->CSR |= PWR_FLAG_UDRDY)
NYX 0:85b3fd62ea1a 209
NYX 0:85b3fd62ea1a 210 #endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || STM32F446xx || STM32F469xx || STM32F479xx */
NYX 0:85b3fd62ea1a 211 /**
NYX 0:85b3fd62ea1a 212 * @}
NYX 0:85b3fd62ea1a 213 */
NYX 0:85b3fd62ea1a 214
NYX 0:85b3fd62ea1a 215 /* Exported functions --------------------------------------------------------*/
NYX 0:85b3fd62ea1a 216 /** @addtogroup PWREx_Exported_Functions PWREx Exported Functions
NYX 0:85b3fd62ea1a 217 * @{
NYX 0:85b3fd62ea1a 218 */
NYX 0:85b3fd62ea1a 219
NYX 0:85b3fd62ea1a 220 /** @addtogroup PWREx_Exported_Functions_Group1
NYX 0:85b3fd62ea1a 221 * @{
NYX 0:85b3fd62ea1a 222 */
NYX 0:85b3fd62ea1a 223 void HAL_PWREx_EnableFlashPowerDown(void);
NYX 0:85b3fd62ea1a 224 void HAL_PWREx_DisableFlashPowerDown(void);
NYX 0:85b3fd62ea1a 225 HAL_StatusTypeDef HAL_PWREx_EnableBkUpReg(void);
NYX 0:85b3fd62ea1a 226 HAL_StatusTypeDef HAL_PWREx_DisableBkUpReg(void);
NYX 0:85b3fd62ea1a 227 uint32_t HAL_PWREx_GetVoltageRange(void);
NYX 0:85b3fd62ea1a 228 HAL_StatusTypeDef HAL_PWREx_ControlVoltageScaling(uint32_t VoltageScaling);
NYX 0:85b3fd62ea1a 229
NYX 0:85b3fd62ea1a 230 #if defined(STM32F469xx) || defined(STM32F479xx)
NYX 0:85b3fd62ea1a 231 void HAL_PWREx_EnableWakeUpPinPolarityRisingEdge(void);
NYX 0:85b3fd62ea1a 232 void HAL_PWREx_EnableWakeUpPinPolarityFallingEdge(void);
NYX 0:85b3fd62ea1a 233 #endif /* STM32F469xx || STM32F479xx */
NYX 0:85b3fd62ea1a 234
NYX 0:85b3fd62ea1a 235 #if defined(STM32F410Tx) || defined(STM32F410Cx) || defined(STM32F410Rx) || defined(STM32F401xC) ||\
NYX 0:85b3fd62ea1a 236 defined(STM32F401xE) || defined(STM32F411xE) || defined(STM32F412Zx) || defined(STM32F412Vx) ||\
NYX 0:85b3fd62ea1a 237 defined(STM32F412Rx) || defined(STM32F412Cx) || defined(STM32F413xx) || defined(STM32F423xx)
NYX 0:85b3fd62ea1a 238 void HAL_PWREx_EnableMainRegulatorLowVoltage(void);
NYX 0:85b3fd62ea1a 239 void HAL_PWREx_DisableMainRegulatorLowVoltage(void);
NYX 0:85b3fd62ea1a 240 void HAL_PWREx_EnableLowRegulatorLowVoltage(void);
NYX 0:85b3fd62ea1a 241 void HAL_PWREx_DisableLowRegulatorLowVoltage(void);
NYX 0:85b3fd62ea1a 242 #endif /* STM32F410xx || STM32F401xC || STM32F401xE || STM32F411xE || STM32F412Zx || STM32F412Vx ||\
NYX 0:85b3fd62ea1a 243 STM32F412Rx || STM32F412Cx || STM32F413xx || STM32F423xx */
NYX 0:85b3fd62ea1a 244
NYX 0:85b3fd62ea1a 245 #if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx) || defined(STM32F446xx) ||\
NYX 0:85b3fd62ea1a 246 defined(STM32F469xx) || defined(STM32F479xx)
NYX 0:85b3fd62ea1a 247 HAL_StatusTypeDef HAL_PWREx_EnableOverDrive(void);
NYX 0:85b3fd62ea1a 248 HAL_StatusTypeDef HAL_PWREx_DisableOverDrive(void);
NYX 0:85b3fd62ea1a 249 HAL_StatusTypeDef HAL_PWREx_EnterUnderDriveSTOPMode(uint32_t Regulator, uint8_t STOPEntry);
NYX 0:85b3fd62ea1a 250 #endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || STM32F446xx || STM32F469xx || STM32F479xx */
NYX 0:85b3fd62ea1a 251
NYX 0:85b3fd62ea1a 252 /**
NYX 0:85b3fd62ea1a 253 * @}
NYX 0:85b3fd62ea1a 254 */
NYX 0:85b3fd62ea1a 255
NYX 0:85b3fd62ea1a 256 /**
NYX 0:85b3fd62ea1a 257 * @}
NYX 0:85b3fd62ea1a 258 */
NYX 0:85b3fd62ea1a 259 /* Private types -------------------------------------------------------------*/
NYX 0:85b3fd62ea1a 260 /* Private variables ---------------------------------------------------------*/
NYX 0:85b3fd62ea1a 261 /* Private constants ---------------------------------------------------------*/
NYX 0:85b3fd62ea1a 262 /** @defgroup PWREx_Private_Constants PWREx Private Constants
NYX 0:85b3fd62ea1a 263 * @{
NYX 0:85b3fd62ea1a 264 */
NYX 0:85b3fd62ea1a 265
NYX 0:85b3fd62ea1a 266 /** @defgroup PWREx_register_alias_address PWREx Register alias address
NYX 0:85b3fd62ea1a 267 * @{
NYX 0:85b3fd62ea1a 268 */
NYX 0:85b3fd62ea1a 269 /* ------------- PWR registers bit address in the alias region ---------------*/
NYX 0:85b3fd62ea1a 270 /* --- CR Register ---*/
NYX 0:85b3fd62ea1a 271 /* Alias word address of FPDS bit */
NYX 0:85b3fd62ea1a 272 #define FPDS_BIT_NUMBER POSITION_VAL(PWR_CR_FPDS)
NYX 0:85b3fd62ea1a 273 #define CR_FPDS_BB (uint32_t)(PERIPH_BB_BASE + (PWR_CR_OFFSET_BB * 32U) + (FPDS_BIT_NUMBER * 4U))
NYX 0:85b3fd62ea1a 274
NYX 0:85b3fd62ea1a 275 /* Alias word address of ODEN bit */
NYX 0:85b3fd62ea1a 276 #define ODEN_BIT_NUMBER POSITION_VAL(PWR_CR_ODEN)
NYX 0:85b3fd62ea1a 277 #define CR_ODEN_BB (uint32_t)(PERIPH_BB_BASE + (PWR_CR_OFFSET_BB * 32U) + (ODEN_BIT_NUMBER * 4U))
NYX 0:85b3fd62ea1a 278
NYX 0:85b3fd62ea1a 279 /* Alias word address of ODSWEN bit */
NYX 0:85b3fd62ea1a 280 #define ODSWEN_BIT_NUMBER POSITION_VAL(PWR_CR_ODSWEN)
NYX 0:85b3fd62ea1a 281 #define CR_ODSWEN_BB (uint32_t)(PERIPH_BB_BASE + (PWR_CR_OFFSET_BB * 32U) + (ODSWEN_BIT_NUMBER * 4U))
NYX 0:85b3fd62ea1a 282
NYX 0:85b3fd62ea1a 283 /* Alias word address of MRLVDS bit */
NYX 0:85b3fd62ea1a 284 #define MRLVDS_BIT_NUMBER POSITION_VAL(PWR_CR_MRLVDS)
NYX 0:85b3fd62ea1a 285 #define CR_MRLVDS_BB (uint32_t)(PERIPH_BB_BASE + (PWR_CR_OFFSET_BB * 32U) + (MRLVDS_BIT_NUMBER * 4U))
NYX 0:85b3fd62ea1a 286
NYX 0:85b3fd62ea1a 287 /* Alias word address of LPLVDS bit */
NYX 0:85b3fd62ea1a 288 #define LPLVDS_BIT_NUMBER POSITION_VAL(PWR_CR_LPLVDS)
NYX 0:85b3fd62ea1a 289 #define CR_LPLVDS_BB (uint32_t)(PERIPH_BB_BASE + (PWR_CR_OFFSET_BB * 32U) + (LPLVDS_BIT_NUMBER * 4U))
NYX 0:85b3fd62ea1a 290
NYX 0:85b3fd62ea1a 291 /**
NYX 0:85b3fd62ea1a 292 * @}
NYX 0:85b3fd62ea1a 293 */
NYX 0:85b3fd62ea1a 294
NYX 0:85b3fd62ea1a 295 /** @defgroup PWREx_CSR_register_alias PWRx CSR Register alias address
NYX 0:85b3fd62ea1a 296 * @{
NYX 0:85b3fd62ea1a 297 */
NYX 0:85b3fd62ea1a 298 /* --- CSR Register ---*/
NYX 0:85b3fd62ea1a 299 /* Alias word address of BRE bit */
NYX 0:85b3fd62ea1a 300 #define BRE_BIT_NUMBER POSITION_VAL(PWR_CSR_BRE)
NYX 0:85b3fd62ea1a 301 #define CSR_BRE_BB (uint32_t)(PERIPH_BB_BASE + (PWR_CSR_OFFSET_BB * 32U) + (BRE_BIT_NUMBER * 4U))
NYX 0:85b3fd62ea1a 302
NYX 0:85b3fd62ea1a 303 #if defined(STM32F469xx) || defined(STM32F479xx)
NYX 0:85b3fd62ea1a 304 /* Alias word address of WUPP bit */
NYX 0:85b3fd62ea1a 305 #define WUPP_BIT_NUMBER POSITION_VAL(PWR_CSR_WUPP)
NYX 0:85b3fd62ea1a 306 #define CSR_WUPP_BB (PERIPH_BB_BASE + (PWR_CSR_OFFSET_BB * 32U) + (WUPP_BIT_NUMBER * 4U))
NYX 0:85b3fd62ea1a 307 #endif /* STM32F469xx || STM32F479xx */
NYX 0:85b3fd62ea1a 308 /**
NYX 0:85b3fd62ea1a 309 * @}
NYX 0:85b3fd62ea1a 310 */
NYX 0:85b3fd62ea1a 311
NYX 0:85b3fd62ea1a 312 /**
NYX 0:85b3fd62ea1a 313 * @}
NYX 0:85b3fd62ea1a 314 */
NYX 0:85b3fd62ea1a 315
NYX 0:85b3fd62ea1a 316 /* Private macros ------------------------------------------------------------*/
NYX 0:85b3fd62ea1a 317 /** @defgroup PWREx_Private_Macros PWREx Private Macros
NYX 0:85b3fd62ea1a 318 * @{
NYX 0:85b3fd62ea1a 319 */
NYX 0:85b3fd62ea1a 320
NYX 0:85b3fd62ea1a 321 /** @defgroup PWREx_IS_PWR_Definitions PWREx Private macros to check input parameters
NYX 0:85b3fd62ea1a 322 * @{
NYX 0:85b3fd62ea1a 323 */
NYX 0:85b3fd62ea1a 324 #if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx) ||\
NYX 0:85b3fd62ea1a 325 defined(STM32F446xx) || defined(STM32F469xx) || defined(STM32F479xx)
NYX 0:85b3fd62ea1a 326 #define IS_PWR_REGULATOR_UNDERDRIVE(REGULATOR) (((REGULATOR) == PWR_MAINREGULATOR_UNDERDRIVE_ON) || \
NYX 0:85b3fd62ea1a 327 ((REGULATOR) == PWR_LOWPOWERREGULATOR_UNDERDRIVE_ON))
NYX 0:85b3fd62ea1a 328 #endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || STM32F446xx || STM32F469xx || STM32F479xx */
NYX 0:85b3fd62ea1a 329
NYX 0:85b3fd62ea1a 330 #if defined(STM32F405xx) || defined(STM32F407xx) || defined(STM32F415xx) || defined(STM32F417xx)
NYX 0:85b3fd62ea1a 331 #define IS_PWR_VOLTAGE_SCALING_RANGE(VOLTAGE) (((VOLTAGE) == PWR_REGULATOR_VOLTAGE_SCALE1) || \
NYX 0:85b3fd62ea1a 332 ((VOLTAGE) == PWR_REGULATOR_VOLTAGE_SCALE2))
NYX 0:85b3fd62ea1a 333 #else
NYX 0:85b3fd62ea1a 334 #define IS_PWR_VOLTAGE_SCALING_RANGE(VOLTAGE) (((VOLTAGE) == PWR_REGULATOR_VOLTAGE_SCALE1) || \
NYX 0:85b3fd62ea1a 335 ((VOLTAGE) == PWR_REGULATOR_VOLTAGE_SCALE2) || \
NYX 0:85b3fd62ea1a 336 ((VOLTAGE) == PWR_REGULATOR_VOLTAGE_SCALE3))
NYX 0:85b3fd62ea1a 337 #endif /* STM32F405xx || STM32F407xx || STM32F415xx || STM32F417xx */
NYX 0:85b3fd62ea1a 338
NYX 0:85b3fd62ea1a 339 #if defined(STM32F446xx)
NYX 0:85b3fd62ea1a 340 #define IS_PWR_WAKEUP_PIN(PIN) (((PIN) == PWR_WAKEUP_PIN1) || ((PIN) == PWR_WAKEUP_PIN2))
NYX 0:85b3fd62ea1a 341 #elif defined(STM32F410Tx) || defined(STM32F410Cx) || defined(STM32F410Rx) || defined(STM32F412Zx) ||\
NYX 0:85b3fd62ea1a 342 defined(STM32F412Vx) || defined(STM32F412Rx) || defined(STM32F412Cx) || defined(STM32F413xx) ||\
NYX 0:85b3fd62ea1a 343 defined(STM32F423xx)
NYX 0:85b3fd62ea1a 344 #define IS_PWR_WAKEUP_PIN(PIN) (((PIN) == PWR_WAKEUP_PIN1) || ((PIN) == PWR_WAKEUP_PIN2) || \
NYX 0:85b3fd62ea1a 345 ((PIN) == PWR_WAKEUP_PIN3))
NYX 0:85b3fd62ea1a 346 #else
NYX 0:85b3fd62ea1a 347 #define IS_PWR_WAKEUP_PIN(PIN) ((PIN) == PWR_WAKEUP_PIN1)
NYX 0:85b3fd62ea1a 348 #endif /* STM32F446xx */
NYX 0:85b3fd62ea1a 349 /**
NYX 0:85b3fd62ea1a 350 * @}
NYX 0:85b3fd62ea1a 351 */
NYX 0:85b3fd62ea1a 352
NYX 0:85b3fd62ea1a 353 /**
NYX 0:85b3fd62ea1a 354 * @}
NYX 0:85b3fd62ea1a 355 */
NYX 0:85b3fd62ea1a 356
NYX 0:85b3fd62ea1a 357 /**
NYX 0:85b3fd62ea1a 358 * @}
NYX 0:85b3fd62ea1a 359 */
NYX 0:85b3fd62ea1a 360
NYX 0:85b3fd62ea1a 361 /**
NYX 0:85b3fd62ea1a 362 * @}
NYX 0:85b3fd62ea1a 363 */
NYX 0:85b3fd62ea1a 364
NYX 0:85b3fd62ea1a 365 #ifdef __cplusplus
NYX 0:85b3fd62ea1a 366 }
NYX 0:85b3fd62ea1a 367 #endif
NYX 0:85b3fd62ea1a 368
NYX 0:85b3fd62ea1a 369
NYX 0:85b3fd62ea1a 370 #endif /* __STM32F4xx_HAL_PWR_EX_H */
NYX 0:85b3fd62ea1a 371
NYX 0:85b3fd62ea1a 372 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/