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targets/TARGET_STM/TARGET_STM32F4/device/stm32f4xx_hal_pwr_ex.c@0:85b3fd62ea1a, 2020-03-16 (annotated)

Committer:
NYX
Date:
Mon Mar 16 06:35:48 2020 +0000
Revision:
0:85b3fd62ea1a
reinport to mbed;

Who changed what in which revision?

UserRevisionLine numberNew contents of line
NYX 0:85b3fd62ea1a 1 /**
NYX 0:85b3fd62ea1a 2 ******************************************************************************
NYX 0:85b3fd62ea1a 3 * @file stm32f4xx_hal_pwr_ex.c
NYX 0:85b3fd62ea1a 4 * @author MCD Application Team
NYX 0:85b3fd62ea1a 5 * @version V1.7.1
NYX 0:85b3fd62ea1a 6 * @date 14-April-2017
NYX 0:85b3fd62ea1a 7 * @brief Extended PWR HAL module driver.
NYX 0:85b3fd62ea1a 8 * This file provides firmware functions to manage the following
NYX 0:85b3fd62ea1a 9 * functionalities of PWR extension peripheral:
NYX 0:85b3fd62ea1a 10 * + Peripheral Extended features functions
NYX 0:85b3fd62ea1a 11 *
NYX 0:85b3fd62ea1a 12 ******************************************************************************
NYX 0:85b3fd62ea1a 13 * @attention
NYX 0:85b3fd62ea1a 14 *
NYX 0:85b3fd62ea1a 15 * <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
NYX 0:85b3fd62ea1a 16 *
NYX 0:85b3fd62ea1a 17 * Redistribution and use in source and binary forms, with or without modification,
NYX 0:85b3fd62ea1a 18 * are permitted provided that the following conditions are met:
NYX 0:85b3fd62ea1a 19 * 1. Redistributions of source code must retain the above copyright notice,
NYX 0:85b3fd62ea1a 20 * this list of conditions and the following disclaimer.
NYX 0:85b3fd62ea1a 21 * 2. Redistributions in binary form must reproduce the above copyright notice,
NYX 0:85b3fd62ea1a 22 * this list of conditions and the following disclaimer in the documentation
NYX 0:85b3fd62ea1a 23 * and/or other materials provided with the distribution.
NYX 0:85b3fd62ea1a 24 * 3. Neither the name of STMicroelectronics nor the names of its contributors
NYX 0:85b3fd62ea1a 25 * may be used to endorse or promote products derived from this software
NYX 0:85b3fd62ea1a 26 * without specific prior written permission.
NYX 0:85b3fd62ea1a 27 *
NYX 0:85b3fd62ea1a 28 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
NYX 0:85b3fd62ea1a 29 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
NYX 0:85b3fd62ea1a 30 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
NYX 0:85b3fd62ea1a 31 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
NYX 0:85b3fd62ea1a 32 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
NYX 0:85b3fd62ea1a 33 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
NYX 0:85b3fd62ea1a 34 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
NYX 0:85b3fd62ea1a 35 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
NYX 0:85b3fd62ea1a 36 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
NYX 0:85b3fd62ea1a 37 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
NYX 0:85b3fd62ea1a 38 *
NYX 0:85b3fd62ea1a 39 ******************************************************************************
NYX 0:85b3fd62ea1a 40 */
NYX 0:85b3fd62ea1a 41
NYX 0:85b3fd62ea1a 42 /* Includes ------------------------------------------------------------------*/
NYX 0:85b3fd62ea1a 43 #include "stm32f4xx_hal.h"
NYX 0:85b3fd62ea1a 44
NYX 0:85b3fd62ea1a 45 /** @addtogroup STM32F4xx_HAL_Driver
NYX 0:85b3fd62ea1a 46 * @{
NYX 0:85b3fd62ea1a 47 */
NYX 0:85b3fd62ea1a 48
NYX 0:85b3fd62ea1a 49 /** @defgroup PWREx PWREx
NYX 0:85b3fd62ea1a 50 * @brief PWR HAL module driver
NYX 0:85b3fd62ea1a 51 * @{
NYX 0:85b3fd62ea1a 52 */
NYX 0:85b3fd62ea1a 53
NYX 0:85b3fd62ea1a 54 #ifdef HAL_PWR_MODULE_ENABLED
NYX 0:85b3fd62ea1a 55
NYX 0:85b3fd62ea1a 56 /* Private typedef -----------------------------------------------------------*/
NYX 0:85b3fd62ea1a 57 /* Private define ------------------------------------------------------------*/
NYX 0:85b3fd62ea1a 58 /** @addtogroup PWREx_Private_Constants
NYX 0:85b3fd62ea1a 59 * @{
NYX 0:85b3fd62ea1a 60 */
NYX 0:85b3fd62ea1a 61 #define PWR_OVERDRIVE_TIMEOUT_VALUE 1000U
NYX 0:85b3fd62ea1a 62 #define PWR_UDERDRIVE_TIMEOUT_VALUE 1000U
NYX 0:85b3fd62ea1a 63 #define PWR_BKPREG_TIMEOUT_VALUE 1000U
NYX 0:85b3fd62ea1a 64 #define PWR_VOSRDY_TIMEOUT_VALUE 1000U
NYX 0:85b3fd62ea1a 65 /**
NYX 0:85b3fd62ea1a 66 * @}
NYX 0:85b3fd62ea1a 67 */
NYX 0:85b3fd62ea1a 68
NYX 0:85b3fd62ea1a 69
NYX 0:85b3fd62ea1a 70 /* Private macro -------------------------------------------------------------*/
NYX 0:85b3fd62ea1a 71 /* Private variables ---------------------------------------------------------*/
NYX 0:85b3fd62ea1a 72 /* Private function prototypes -----------------------------------------------*/
NYX 0:85b3fd62ea1a 73 /* Private functions ---------------------------------------------------------*/
NYX 0:85b3fd62ea1a 74 /** @defgroup PWREx_Exported_Functions PWREx Exported Functions
NYX 0:85b3fd62ea1a 75 * @{
NYX 0:85b3fd62ea1a 76 */
NYX 0:85b3fd62ea1a 77
NYX 0:85b3fd62ea1a 78 /** @defgroup PWREx_Exported_Functions_Group1 Peripheral Extended features functions
NYX 0:85b3fd62ea1a 79 * @brief Peripheral Extended features functions
NYX 0:85b3fd62ea1a 80 *
NYX 0:85b3fd62ea1a 81 @verbatim
NYX 0:85b3fd62ea1a 82
NYX 0:85b3fd62ea1a 83 ===============================================================================
NYX 0:85b3fd62ea1a 84 ##### Peripheral extended features functions #####
NYX 0:85b3fd62ea1a 85 ===============================================================================
NYX 0:85b3fd62ea1a 86
NYX 0:85b3fd62ea1a 87 *** Main and Backup Regulators configuration ***
NYX 0:85b3fd62ea1a 88 ================================================
NYX 0:85b3fd62ea1a 89 [..]
NYX 0:85b3fd62ea1a 90 (+) The backup domain includes 4 Kbytes of backup SRAM accessible only from
NYX 0:85b3fd62ea1a 91 the CPU, and address in 32-bit, 16-bit or 8-bit mode. Its content is
NYX 0:85b3fd62ea1a 92 retained even in Standby or VBAT mode when the low power backup regulator
NYX 0:85b3fd62ea1a 93 is enabled. It can be considered as an internal EEPROM when VBAT is
NYX 0:85b3fd62ea1a 94 always present. You can use the HAL_PWREx_EnableBkUpReg() function to
NYX 0:85b3fd62ea1a 95 enable the low power backup regulator.
NYX 0:85b3fd62ea1a 96
NYX 0:85b3fd62ea1a 97 (+) When the backup domain is supplied by VDD (analog switch connected to VDD)
NYX 0:85b3fd62ea1a 98 the backup SRAM is powered from VDD which replaces the VBAT power supply to
NYX 0:85b3fd62ea1a 99 save battery life.
NYX 0:85b3fd62ea1a 100
NYX 0:85b3fd62ea1a 101 (+) The backup SRAM is not mass erased by a tamper event. It is read
NYX 0:85b3fd62ea1a 102 protected to prevent confidential data, such as cryptographic private
NYX 0:85b3fd62ea1a 103 key, from being accessed. The backup SRAM can be erased only through
NYX 0:85b3fd62ea1a 104 the Flash interface when a protection level change from level 1 to
NYX 0:85b3fd62ea1a 105 level 0 is requested.
NYX 0:85b3fd62ea1a 106 -@- Refer to the description of Read protection (RDP) in the Flash
NYX 0:85b3fd62ea1a 107 programming manual.
NYX 0:85b3fd62ea1a 108
NYX 0:85b3fd62ea1a 109 (+) The main internal regulator can be configured to have a tradeoff between
NYX 0:85b3fd62ea1a 110 performance and power consumption when the device does not operate at
NYX 0:85b3fd62ea1a 111 the maximum frequency. This is done through __HAL_PWR_MAINREGULATORMODE_CONFIG()
NYX 0:85b3fd62ea1a 112 macro which configure VOS bit in PWR_CR register
NYX 0:85b3fd62ea1a 113
NYX 0:85b3fd62ea1a 114 Refer to the product datasheets for more details.
NYX 0:85b3fd62ea1a 115
NYX 0:85b3fd62ea1a 116 *** FLASH Power Down configuration ****
NYX 0:85b3fd62ea1a 117 =======================================
NYX 0:85b3fd62ea1a 118 [..]
NYX 0:85b3fd62ea1a 119 (+) By setting the FPDS bit in the PWR_CR register by using the
NYX 0:85b3fd62ea1a 120 HAL_PWREx_EnableFlashPowerDown() function, the Flash memory also enters power
NYX 0:85b3fd62ea1a 121 down mode when the device enters Stop mode. When the Flash memory
NYX 0:85b3fd62ea1a 122 is in power down mode, an additional startup delay is incurred when
NYX 0:85b3fd62ea1a 123 waking up from Stop mode.
NYX 0:85b3fd62ea1a 124
NYX 0:85b3fd62ea1a 125 (+) For STM32F42xxx/43xxx/446xx/469xx/479xx Devices, the scale can be modified only when the PLL
NYX 0:85b3fd62ea1a 126 is OFF and the HSI or HSE clock source is selected as system clock.
NYX 0:85b3fd62ea1a 127 The new value programmed is active only when the PLL is ON.
NYX 0:85b3fd62ea1a 128 When the PLL is OFF, the voltage scale 3 is automatically selected.
NYX 0:85b3fd62ea1a 129 Refer to the datasheets for more details.
NYX 0:85b3fd62ea1a 130
NYX 0:85b3fd62ea1a 131 *** Over-Drive and Under-Drive configuration ****
NYX 0:85b3fd62ea1a 132 =================================================
NYX 0:85b3fd62ea1a 133 [..]
NYX 0:85b3fd62ea1a 134 (+) For STM32F42xxx/43xxx/446xx/469xx/479xx Devices, in Run mode: the main regulator has
NYX 0:85b3fd62ea1a 135 2 operating modes available:
NYX 0:85b3fd62ea1a 136 (++) Normal mode: The CPU and core logic operate at maximum frequency at a given
NYX 0:85b3fd62ea1a 137 voltage scaling (scale 1, scale 2 or scale 3)
NYX 0:85b3fd62ea1a 138 (++) Over-drive mode: This mode allows the CPU and the core logic to operate at a
NYX 0:85b3fd62ea1a 139 higher frequency than the normal mode for a given voltage scaling (scale 1,
NYX 0:85b3fd62ea1a 140 scale 2 or scale 3). This mode is enabled through HAL_PWREx_EnableOverDrive() function and
NYX 0:85b3fd62ea1a 141 disabled by HAL_PWREx_DisableOverDrive() function, to enter or exit from Over-drive mode please follow
NYX 0:85b3fd62ea1a 142 the sequence described in Reference manual.
NYX 0:85b3fd62ea1a 143
NYX 0:85b3fd62ea1a 144 (+) For STM32F42xxx/43xxx/446xx/469xx/479xx Devices, in Stop mode: the main regulator or low power regulator
NYX 0:85b3fd62ea1a 145 supplies a low power voltage to the 1.2V domain, thus preserving the content of registers
NYX 0:85b3fd62ea1a 146 and internal SRAM. 2 operating modes are available:
NYX 0:85b3fd62ea1a 147 (++) Normal mode: the 1.2V domain is preserved in nominal leakage mode. This mode is only
NYX 0:85b3fd62ea1a 148 available when the main regulator or the low power regulator is used in Scale 3 or
NYX 0:85b3fd62ea1a 149 low voltage mode.
NYX 0:85b3fd62ea1a 150 (++) Under-drive mode: the 1.2V domain is preserved in reduced leakage mode. This mode is only
NYX 0:85b3fd62ea1a 151 available when the main regulator or the low power regulator is in low voltage mode.
NYX 0:85b3fd62ea1a 152
NYX 0:85b3fd62ea1a 153 @endverbatim
NYX 0:85b3fd62ea1a 154 * @{
NYX 0:85b3fd62ea1a 155 */
NYX 0:85b3fd62ea1a 156
NYX 0:85b3fd62ea1a 157 /**
NYX 0:85b3fd62ea1a 158 * @brief Enables the Backup Regulator.
NYX 0:85b3fd62ea1a 159 * @retval HAL status
NYX 0:85b3fd62ea1a 160 */
NYX 0:85b3fd62ea1a 161 HAL_StatusTypeDef HAL_PWREx_EnableBkUpReg(void)
NYX 0:85b3fd62ea1a 162 {
NYX 0:85b3fd62ea1a 163 uint32_t tickstart = 0U;
NYX 0:85b3fd62ea1a 164
NYX 0:85b3fd62ea1a 165 *(__IO uint32_t *) CSR_BRE_BB = (uint32_t)ENABLE;
NYX 0:85b3fd62ea1a 166
NYX 0:85b3fd62ea1a 167 /* Get tick */
NYX 0:85b3fd62ea1a 168 tickstart = HAL_GetTick();
NYX 0:85b3fd62ea1a 169
NYX 0:85b3fd62ea1a 170 /* Wait till Backup regulator ready flag is set */
NYX 0:85b3fd62ea1a 171 while(__HAL_PWR_GET_FLAG(PWR_FLAG_BRR) == RESET)
NYX 0:85b3fd62ea1a 172 {
NYX 0:85b3fd62ea1a 173 if((HAL_GetTick() - tickstart ) > PWR_BKPREG_TIMEOUT_VALUE)
NYX 0:85b3fd62ea1a 174 {
NYX 0:85b3fd62ea1a 175 return HAL_TIMEOUT;
NYX 0:85b3fd62ea1a 176 }
NYX 0:85b3fd62ea1a 177 }
NYX 0:85b3fd62ea1a 178 return HAL_OK;
NYX 0:85b3fd62ea1a 179 }
NYX 0:85b3fd62ea1a 180
NYX 0:85b3fd62ea1a 181 /**
NYX 0:85b3fd62ea1a 182 * @brief Disables the Backup Regulator.
NYX 0:85b3fd62ea1a 183 * @retval HAL status
NYX 0:85b3fd62ea1a 184 */
NYX 0:85b3fd62ea1a 185 HAL_StatusTypeDef HAL_PWREx_DisableBkUpReg(void)
NYX 0:85b3fd62ea1a 186 {
NYX 0:85b3fd62ea1a 187 uint32_t tickstart = 0U;
NYX 0:85b3fd62ea1a 188
NYX 0:85b3fd62ea1a 189 *(__IO uint32_t *) CSR_BRE_BB = (uint32_t)DISABLE;
NYX 0:85b3fd62ea1a 190
NYX 0:85b3fd62ea1a 191 /* Get tick */
NYX 0:85b3fd62ea1a 192 tickstart = HAL_GetTick();
NYX 0:85b3fd62ea1a 193
NYX 0:85b3fd62ea1a 194 /* Wait till Backup regulator ready flag is set */
NYX 0:85b3fd62ea1a 195 while(__HAL_PWR_GET_FLAG(PWR_FLAG_BRR) != RESET)
NYX 0:85b3fd62ea1a 196 {
NYX 0:85b3fd62ea1a 197 if((HAL_GetTick() - tickstart ) > PWR_BKPREG_TIMEOUT_VALUE)
NYX 0:85b3fd62ea1a 198 {
NYX 0:85b3fd62ea1a 199 return HAL_TIMEOUT;
NYX 0:85b3fd62ea1a 200 }
NYX 0:85b3fd62ea1a 201 }
NYX 0:85b3fd62ea1a 202 return HAL_OK;
NYX 0:85b3fd62ea1a 203 }
NYX 0:85b3fd62ea1a 204
NYX 0:85b3fd62ea1a 205 /**
NYX 0:85b3fd62ea1a 206 * @brief Enables the Flash Power Down in Stop mode.
NYX 0:85b3fd62ea1a 207 * @retval None
NYX 0:85b3fd62ea1a 208 */
NYX 0:85b3fd62ea1a 209 void HAL_PWREx_EnableFlashPowerDown(void)
NYX 0:85b3fd62ea1a 210 {
NYX 0:85b3fd62ea1a 211 *(__IO uint32_t *) CR_FPDS_BB = (uint32_t)ENABLE;
NYX 0:85b3fd62ea1a 212 }
NYX 0:85b3fd62ea1a 213
NYX 0:85b3fd62ea1a 214 /**
NYX 0:85b3fd62ea1a 215 * @brief Disables the Flash Power Down in Stop mode.
NYX 0:85b3fd62ea1a 216 * @retval None
NYX 0:85b3fd62ea1a 217 */
NYX 0:85b3fd62ea1a 218 void HAL_PWREx_DisableFlashPowerDown(void)
NYX 0:85b3fd62ea1a 219 {
NYX 0:85b3fd62ea1a 220 *(__IO uint32_t *) CR_FPDS_BB = (uint32_t)DISABLE;
NYX 0:85b3fd62ea1a 221 }
NYX 0:85b3fd62ea1a 222
NYX 0:85b3fd62ea1a 223 /**
NYX 0:85b3fd62ea1a 224 * @brief Return Voltage Scaling Range.
NYX 0:85b3fd62ea1a 225 * @retval The configured scale for the regulator voltage(VOS bit field).
NYX 0:85b3fd62ea1a 226 * The returned value can be one of the following:
NYX 0:85b3fd62ea1a 227 * - @arg PWR_REGULATOR_VOLTAGE_SCALE1: Regulator voltage output Scale 1 mode
NYX 0:85b3fd62ea1a 228 * - @arg PWR_REGULATOR_VOLTAGE_SCALE2: Regulator voltage output Scale 2 mode
NYX 0:85b3fd62ea1a 229 * - @arg PWR_REGULATOR_VOLTAGE_SCALE3: Regulator voltage output Scale 3 mode
NYX 0:85b3fd62ea1a 230 */
NYX 0:85b3fd62ea1a 231 uint32_t HAL_PWREx_GetVoltageRange(void)
NYX 0:85b3fd62ea1a 232 {
NYX 0:85b3fd62ea1a 233 return (PWR->CR & PWR_CR_VOS);
NYX 0:85b3fd62ea1a 234 }
NYX 0:85b3fd62ea1a 235
NYX 0:85b3fd62ea1a 236 #if defined(STM32F405xx) || defined(STM32F415xx) || defined(STM32F407xx) || defined(STM32F417xx)
NYX 0:85b3fd62ea1a 237 /**
NYX 0:85b3fd62ea1a 238 * @brief Configures the main internal regulator output voltage.
NYX 0:85b3fd62ea1a 239 * @param VoltageScaling: specifies the regulator output voltage to achieve
NYX 0:85b3fd62ea1a 240 * a tradeoff between performance and power consumption.
NYX 0:85b3fd62ea1a 241 * This parameter can be one of the following values:
NYX 0:85b3fd62ea1a 242 * @arg PWR_REGULATOR_VOLTAGE_SCALE1: Regulator voltage output range 1 mode,
NYX 0:85b3fd62ea1a 243 * the maximum value of fHCLK = 168 MHz.
NYX 0:85b3fd62ea1a 244 * @arg PWR_REGULATOR_VOLTAGE_SCALE2: Regulator voltage output range 2 mode,
NYX 0:85b3fd62ea1a 245 * the maximum value of fHCLK = 144 MHz.
NYX 0:85b3fd62ea1a 246 * @note When moving from Range 1 to Range 2, the system frequency must be decreased to
NYX 0:85b3fd62ea1a 247 * a value below 144 MHz before calling HAL_PWREx_ConfigVoltageScaling() API.
NYX 0:85b3fd62ea1a 248 * When moving from Range 2 to Range 1, the system frequency can be increased to
NYX 0:85b3fd62ea1a 249 * a value up to 168 MHz after calling HAL_PWREx_ConfigVoltageScaling() API.
NYX 0:85b3fd62ea1a 250 * @retval HAL Status
NYX 0:85b3fd62ea1a 251 */
NYX 0:85b3fd62ea1a 252 HAL_StatusTypeDef HAL_PWREx_ControlVoltageScaling(uint32_t VoltageScaling)
NYX 0:85b3fd62ea1a 253 {
NYX 0:85b3fd62ea1a 254 uint32_t tickstart = 0U;
NYX 0:85b3fd62ea1a 255
NYX 0:85b3fd62ea1a 256 assert_param(IS_PWR_VOLTAGE_SCALING_RANGE(VoltageScaling));
NYX 0:85b3fd62ea1a 257
NYX 0:85b3fd62ea1a 258 /* Enable PWR RCC Clock Peripheral */
NYX 0:85b3fd62ea1a 259 __HAL_RCC_PWR_CLK_ENABLE();
NYX 0:85b3fd62ea1a 260
NYX 0:85b3fd62ea1a 261 /* Set Range */
NYX 0:85b3fd62ea1a 262 __HAL_PWR_VOLTAGESCALING_CONFIG(VoltageScaling);
NYX 0:85b3fd62ea1a 263
NYX 0:85b3fd62ea1a 264 /* Get Start Tick*/
NYX 0:85b3fd62ea1a 265 tickstart = HAL_GetTick();
NYX 0:85b3fd62ea1a 266 while((__HAL_PWR_GET_FLAG(PWR_FLAG_VOSRDY) == RESET))
NYX 0:85b3fd62ea1a 267 {
NYX 0:85b3fd62ea1a 268 if((HAL_GetTick() - tickstart ) > PWR_VOSRDY_TIMEOUT_VALUE)
NYX 0:85b3fd62ea1a 269 {
NYX 0:85b3fd62ea1a 270 return HAL_TIMEOUT;
NYX 0:85b3fd62ea1a 271 }
NYX 0:85b3fd62ea1a 272 }
NYX 0:85b3fd62ea1a 273
NYX 0:85b3fd62ea1a 274 return HAL_OK;
NYX 0:85b3fd62ea1a 275 }
NYX 0:85b3fd62ea1a 276
NYX 0:85b3fd62ea1a 277 #elif defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx) || \
NYX 0:85b3fd62ea1a 278 defined(STM32F401xC) || defined(STM32F401xE) || defined(STM32F410Tx) || defined(STM32F410Cx) || \
NYX 0:85b3fd62ea1a 279 defined(STM32F410Rx) || defined(STM32F411xE) || defined(STM32F446xx) || defined(STM32F469xx) || \
NYX 0:85b3fd62ea1a 280 defined(STM32F479xx) || defined(STM32F412Zx) || defined(STM32F412Vx) || defined(STM32F412Rx) || \
NYX 0:85b3fd62ea1a 281 defined(STM32F412Cx) || defined(STM32F413xx) || defined(STM32F423xx)
NYX 0:85b3fd62ea1a 282 /**
NYX 0:85b3fd62ea1a 283 * @brief Configures the main internal regulator output voltage.
NYX 0:85b3fd62ea1a 284 * @param VoltageScaling: specifies the regulator output voltage to achieve
NYX 0:85b3fd62ea1a 285 * a tradeoff between performance and power consumption.
NYX 0:85b3fd62ea1a 286 * This parameter can be one of the following values:
NYX 0:85b3fd62ea1a 287 * @arg PWR_REGULATOR_VOLTAGE_SCALE1: Regulator voltage output range 1 mode,
NYX 0:85b3fd62ea1a 288 * the maximum value of fHCLK is 168 MHz. It can be extended to
NYX 0:85b3fd62ea1a 289 * 180 MHz by activating the over-drive mode.
NYX 0:85b3fd62ea1a 290 * @arg PWR_REGULATOR_VOLTAGE_SCALE2: Regulator voltage output range 2 mode,
NYX 0:85b3fd62ea1a 291 * the maximum value of fHCLK is 144 MHz. It can be extended to,
NYX 0:85b3fd62ea1a 292 * 168 MHz by activating the over-drive mode.
NYX 0:85b3fd62ea1a 293 * @arg PWR_REGULATOR_VOLTAGE_SCALE3: Regulator voltage output range 3 mode,
NYX 0:85b3fd62ea1a 294 * the maximum value of fHCLK is 120 MHz.
NYX 0:85b3fd62ea1a 295 * @note To update the system clock frequency(SYSCLK):
NYX 0:85b3fd62ea1a 296 * - Set the HSI or HSE as system clock frequency using the HAL_RCC_ClockConfig().
NYX 0:85b3fd62ea1a 297 * - Call the HAL_RCC_OscConfig() to configure the PLL.
NYX 0:85b3fd62ea1a 298 * - Call HAL_PWREx_ConfigVoltageScaling() API to adjust the voltage scale.
NYX 0:85b3fd62ea1a 299 * - Set the new system clock frequency using the HAL_RCC_ClockConfig().
NYX 0:85b3fd62ea1a 300 * @note The scale can be modified only when the HSI or HSE clock source is selected
NYX 0:85b3fd62ea1a 301 * as system clock source, otherwise the API returns HAL_ERROR.
NYX 0:85b3fd62ea1a 302 * @note When the PLL is OFF, the voltage scale 3 is automatically selected and the VOS bits
NYX 0:85b3fd62ea1a 303 * value in the PWR_CR1 register are not taken in account.
NYX 0:85b3fd62ea1a 304 * @note This API forces the PLL state ON to allow the possibility to configure the voltage scale 1 or 2.
NYX 0:85b3fd62ea1a 305 * @note The new voltage scale is active only when the PLL is ON.
NYX 0:85b3fd62ea1a 306 * @retval HAL Status
NYX 0:85b3fd62ea1a 307 */
NYX 0:85b3fd62ea1a 308 HAL_StatusTypeDef HAL_PWREx_ControlVoltageScaling(uint32_t VoltageScaling)
NYX 0:85b3fd62ea1a 309 {
NYX 0:85b3fd62ea1a 310 uint32_t tickstart = 0U;
NYX 0:85b3fd62ea1a 311
NYX 0:85b3fd62ea1a 312 assert_param(IS_PWR_VOLTAGE_SCALING_RANGE(VoltageScaling));
NYX 0:85b3fd62ea1a 313
NYX 0:85b3fd62ea1a 314 /* Enable PWR RCC Clock Peripheral */
NYX 0:85b3fd62ea1a 315 __HAL_RCC_PWR_CLK_ENABLE();
NYX 0:85b3fd62ea1a 316
NYX 0:85b3fd62ea1a 317 /* Check if the PLL is used as system clock or not */
NYX 0:85b3fd62ea1a 318 if(__HAL_RCC_GET_SYSCLK_SOURCE() != RCC_CFGR_SWS_PLL)
NYX 0:85b3fd62ea1a 319 {
NYX 0:85b3fd62ea1a 320 /* Disable the main PLL */
NYX 0:85b3fd62ea1a 321 __HAL_RCC_PLL_DISABLE();
NYX 0:85b3fd62ea1a 322
NYX 0:85b3fd62ea1a 323 /* Get Start Tick */
NYX 0:85b3fd62ea1a 324 tickstart = HAL_GetTick();
NYX 0:85b3fd62ea1a 325 /* Wait till PLL is disabled */
NYX 0:85b3fd62ea1a 326 while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET)
NYX 0:85b3fd62ea1a 327 {
NYX 0:85b3fd62ea1a 328 if((HAL_GetTick() - tickstart ) > PLL_TIMEOUT_VALUE)
NYX 0:85b3fd62ea1a 329 {
NYX 0:85b3fd62ea1a 330 return HAL_TIMEOUT;
NYX 0:85b3fd62ea1a 331 }
NYX 0:85b3fd62ea1a 332 }
NYX 0:85b3fd62ea1a 333
NYX 0:85b3fd62ea1a 334 /* Set Range */
NYX 0:85b3fd62ea1a 335 __HAL_PWR_VOLTAGESCALING_CONFIG(VoltageScaling);
NYX 0:85b3fd62ea1a 336
NYX 0:85b3fd62ea1a 337 /* Enable the main PLL */
NYX 0:85b3fd62ea1a 338 __HAL_RCC_PLL_ENABLE();
NYX 0:85b3fd62ea1a 339
NYX 0:85b3fd62ea1a 340 /* Get Start Tick */
NYX 0:85b3fd62ea1a 341 tickstart = HAL_GetTick();
NYX 0:85b3fd62ea1a 342 /* Wait till PLL is ready */
NYX 0:85b3fd62ea1a 343 while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == RESET)
NYX 0:85b3fd62ea1a 344 {
NYX 0:85b3fd62ea1a 345 if((HAL_GetTick() - tickstart ) > PLL_TIMEOUT_VALUE)
NYX 0:85b3fd62ea1a 346 {
NYX 0:85b3fd62ea1a 347 return HAL_TIMEOUT;
NYX 0:85b3fd62ea1a 348 }
NYX 0:85b3fd62ea1a 349 }
NYX 0:85b3fd62ea1a 350
NYX 0:85b3fd62ea1a 351 /* Get Start Tick */
NYX 0:85b3fd62ea1a 352 tickstart = HAL_GetTick();
NYX 0:85b3fd62ea1a 353 while((__HAL_PWR_GET_FLAG(PWR_FLAG_VOSRDY) == RESET))
NYX 0:85b3fd62ea1a 354 {
NYX 0:85b3fd62ea1a 355 if((HAL_GetTick() - tickstart ) > PWR_VOSRDY_TIMEOUT_VALUE)
NYX 0:85b3fd62ea1a 356 {
NYX 0:85b3fd62ea1a 357 return HAL_TIMEOUT;
NYX 0:85b3fd62ea1a 358 }
NYX 0:85b3fd62ea1a 359 }
NYX 0:85b3fd62ea1a 360 }
NYX 0:85b3fd62ea1a 361 else
NYX 0:85b3fd62ea1a 362 {
NYX 0:85b3fd62ea1a 363 return HAL_ERROR;
NYX 0:85b3fd62ea1a 364 }
NYX 0:85b3fd62ea1a 365
NYX 0:85b3fd62ea1a 366 return HAL_OK;
NYX 0:85b3fd62ea1a 367 }
NYX 0:85b3fd62ea1a 368 #endif /* STM32F405xx || STM32F415xx || STM32F407xx || STM32F417xx */
NYX 0:85b3fd62ea1a 369
NYX 0:85b3fd62ea1a 370 #if defined(STM32F469xx) || defined(STM32F479xx)
NYX 0:85b3fd62ea1a 371 /**
NYX 0:85b3fd62ea1a 372 * @brief Enables Wakeup Pin Detection on high level (rising edge).
NYX 0:85b3fd62ea1a 373 * @retval None
NYX 0:85b3fd62ea1a 374 */
NYX 0:85b3fd62ea1a 375 void HAL_PWREx_EnableWakeUpPinPolarityRisingEdge(void)
NYX 0:85b3fd62ea1a 376 {
NYX 0:85b3fd62ea1a 377 *(__IO uint32_t *) CSR_WUPP_BB = (uint32_t)DISABLE;
NYX 0:85b3fd62ea1a 378 }
NYX 0:85b3fd62ea1a 379
NYX 0:85b3fd62ea1a 380 /**
NYX 0:85b3fd62ea1a 381 * @brief Enables Wakeup Pin Detection on low level (falling edge).
NYX 0:85b3fd62ea1a 382 * @retval None
NYX 0:85b3fd62ea1a 383 */
NYX 0:85b3fd62ea1a 384 void HAL_PWREx_EnableWakeUpPinPolarityFallingEdge(void)
NYX 0:85b3fd62ea1a 385 {
NYX 0:85b3fd62ea1a 386 *(__IO uint32_t *) CSR_WUPP_BB = (uint32_t)ENABLE;
NYX 0:85b3fd62ea1a 387 }
NYX 0:85b3fd62ea1a 388 #endif /* STM32F469xx || STM32F479xx */
NYX 0:85b3fd62ea1a 389
NYX 0:85b3fd62ea1a 390 #if defined(STM32F401xC) || defined(STM32F401xE) || defined(STM32F410Tx) || defined(STM32F410Cx) || defined(STM32F410Rx) ||\
NYX 0:85b3fd62ea1a 391 defined(STM32F411xE) || defined(STM32F412Zx) || defined(STM32F412Vx) || defined(STM32F412Rx) || defined(STM32F412Cx) ||\
NYX 0:85b3fd62ea1a 392 defined(STM32F413xx) || defined(STM32F423xx)
NYX 0:85b3fd62ea1a 393 /**
NYX 0:85b3fd62ea1a 394 * @brief Enables Main Regulator low voltage mode.
NYX 0:85b3fd62ea1a 395 * @note This mode is only available for STM32F401xx/STM32F410xx/STM32F411xx/STM32F412Zx/STM32F412Rx/STM32F412Vx/STM32F412Cx/
NYX 0:85b3fd62ea1a 396 * STM32F413xx/STM32F423xx devices.
NYX 0:85b3fd62ea1a 397 * @retval None
NYX 0:85b3fd62ea1a 398 */
NYX 0:85b3fd62ea1a 399 void HAL_PWREx_EnableMainRegulatorLowVoltage(void)
NYX 0:85b3fd62ea1a 400 {
NYX 0:85b3fd62ea1a 401 *(__IO uint32_t *) CR_MRLVDS_BB = (uint32_t)ENABLE;
NYX 0:85b3fd62ea1a 402 }
NYX 0:85b3fd62ea1a 403
NYX 0:85b3fd62ea1a 404 /**
NYX 0:85b3fd62ea1a 405 * @brief Disables Main Regulator low voltage mode.
NYX 0:85b3fd62ea1a 406 * @note This mode is only available for STM32F401xx/STM32F410xx/STM32F411xx/STM32F412Zx/STM32F412Rx/STM32F412Vx/STM32F412Cx/
NYX 0:85b3fd62ea1a 407 * STM32F413xx/STM32F423xxdevices.
NYX 0:85b3fd62ea1a 408 * @retval None
NYX 0:85b3fd62ea1a 409 */
NYX 0:85b3fd62ea1a 410 void HAL_PWREx_DisableMainRegulatorLowVoltage(void)
NYX 0:85b3fd62ea1a 411 {
NYX 0:85b3fd62ea1a 412 *(__IO uint32_t *) CR_MRLVDS_BB = (uint32_t)DISABLE;
NYX 0:85b3fd62ea1a 413 }
NYX 0:85b3fd62ea1a 414
NYX 0:85b3fd62ea1a 415 /**
NYX 0:85b3fd62ea1a 416 * @brief Enables Low Power Regulator low voltage mode.
NYX 0:85b3fd62ea1a 417 * @note This mode is only available for STM32F401xx/STM32F410xx/STM32F411xx/STM32F412Zx/STM32F412Rx/STM32F412Vx/STM32F412Cx/
NYX 0:85b3fd62ea1a 418 * STM32F413xx/STM32F423xx devices.
NYX 0:85b3fd62ea1a 419 * @retval None
NYX 0:85b3fd62ea1a 420 */
NYX 0:85b3fd62ea1a 421 void HAL_PWREx_EnableLowRegulatorLowVoltage(void)
NYX 0:85b3fd62ea1a 422 {
NYX 0:85b3fd62ea1a 423 *(__IO uint32_t *) CR_LPLVDS_BB = (uint32_t)ENABLE;
NYX 0:85b3fd62ea1a 424 }
NYX 0:85b3fd62ea1a 425
NYX 0:85b3fd62ea1a 426 /**
NYX 0:85b3fd62ea1a 427 * @brief Disables Low Power Regulator low voltage mode.
NYX 0:85b3fd62ea1a 428 * @note This mode is only available for STM32F401xx/STM32F410xx/STM32F411xx/STM32F412Zx/STM32F412Rx/STM32F412Vx/STM32F412Cx/
NYX 0:85b3fd62ea1a 429 * STM32F413xx/STM32F423xx devices.
NYX 0:85b3fd62ea1a 430 * @retval None
NYX 0:85b3fd62ea1a 431 */
NYX 0:85b3fd62ea1a 432 void HAL_PWREx_DisableLowRegulatorLowVoltage(void)
NYX 0:85b3fd62ea1a 433 {
NYX 0:85b3fd62ea1a 434 *(__IO uint32_t *) CR_LPLVDS_BB = (uint32_t)DISABLE;
NYX 0:85b3fd62ea1a 435 }
NYX 0:85b3fd62ea1a 436
NYX 0:85b3fd62ea1a 437 #endif /* STM32F401xC || STM32F401xE || STM32F410xx || STM32F411xE || STM32F412Zx || STM32F412Rx || STM32F412Vx || STM32F412Cx ||
NYX 0:85b3fd62ea1a 438 STM32F413xx || STM32F423xx */
NYX 0:85b3fd62ea1a 439
NYX 0:85b3fd62ea1a 440 #if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx) ||\
NYX 0:85b3fd62ea1a 441 defined(STM32F446xx) || defined(STM32F469xx) || defined(STM32F479xx)
NYX 0:85b3fd62ea1a 442 /**
NYX 0:85b3fd62ea1a 443 * @brief Activates the Over-Drive mode.
NYX 0:85b3fd62ea1a 444 * @note This function can be used only for STM32F42xx/STM32F43xx/STM32F446xx/STM32F469xx/STM32F479xx devices.
NYX 0:85b3fd62ea1a 445 * This mode allows the CPU and the core logic to operate at a higher frequency
NYX 0:85b3fd62ea1a 446 * than the normal mode for a given voltage scaling (scale 1, scale 2 or scale 3).
NYX 0:85b3fd62ea1a 447 * @note It is recommended to enter or exit Over-drive mode when the application is not running
NYX 0:85b3fd62ea1a 448 * critical tasks and when the system clock source is either HSI or HSE.
NYX 0:85b3fd62ea1a 449 * During the Over-drive switch activation, no peripheral clocks should be enabled.
NYX 0:85b3fd62ea1a 450 * The peripheral clocks must be enabled once the Over-drive mode is activated.
NYX 0:85b3fd62ea1a 451 * @retval HAL status
NYX 0:85b3fd62ea1a 452 */
NYX 0:85b3fd62ea1a 453 HAL_StatusTypeDef HAL_PWREx_EnableOverDrive(void)
NYX 0:85b3fd62ea1a 454 {
NYX 0:85b3fd62ea1a 455 uint32_t tickstart = 0U;
NYX 0:85b3fd62ea1a 456
NYX 0:85b3fd62ea1a 457 __HAL_RCC_PWR_CLK_ENABLE();
NYX 0:85b3fd62ea1a 458
NYX 0:85b3fd62ea1a 459 /* Enable the Over-drive to extend the clock frequency to 180 Mhz */
NYX 0:85b3fd62ea1a 460 __HAL_PWR_OVERDRIVE_ENABLE();
NYX 0:85b3fd62ea1a 461
NYX 0:85b3fd62ea1a 462 /* Get tick */
NYX 0:85b3fd62ea1a 463 tickstart = HAL_GetTick();
NYX 0:85b3fd62ea1a 464
NYX 0:85b3fd62ea1a 465 while(!__HAL_PWR_GET_FLAG(PWR_FLAG_ODRDY))
NYX 0:85b3fd62ea1a 466 {
NYX 0:85b3fd62ea1a 467 if((HAL_GetTick() - tickstart) > PWR_OVERDRIVE_TIMEOUT_VALUE)
NYX 0:85b3fd62ea1a 468 {
NYX 0:85b3fd62ea1a 469 return HAL_TIMEOUT;
NYX 0:85b3fd62ea1a 470 }
NYX 0:85b3fd62ea1a 471 }
NYX 0:85b3fd62ea1a 472
NYX 0:85b3fd62ea1a 473 /* Enable the Over-drive switch */
NYX 0:85b3fd62ea1a 474 __HAL_PWR_OVERDRIVESWITCHING_ENABLE();
NYX 0:85b3fd62ea1a 475
NYX 0:85b3fd62ea1a 476 /* Get tick */
NYX 0:85b3fd62ea1a 477 tickstart = HAL_GetTick();
NYX 0:85b3fd62ea1a 478
NYX 0:85b3fd62ea1a 479 while(!__HAL_PWR_GET_FLAG(PWR_FLAG_ODSWRDY))
NYX 0:85b3fd62ea1a 480 {
NYX 0:85b3fd62ea1a 481 if((HAL_GetTick() - tickstart ) > PWR_OVERDRIVE_TIMEOUT_VALUE)
NYX 0:85b3fd62ea1a 482 {
NYX 0:85b3fd62ea1a 483 return HAL_TIMEOUT;
NYX 0:85b3fd62ea1a 484 }
NYX 0:85b3fd62ea1a 485 }
NYX 0:85b3fd62ea1a 486 return HAL_OK;
NYX 0:85b3fd62ea1a 487 }
NYX 0:85b3fd62ea1a 488
NYX 0:85b3fd62ea1a 489 /**
NYX 0:85b3fd62ea1a 490 * @brief Deactivates the Over-Drive mode.
NYX 0:85b3fd62ea1a 491 * @note This function can be used only for STM32F42xx/STM32F43xx/STM32F446xx/STM32F469xx/STM32F479xx devices.
NYX 0:85b3fd62ea1a 492 * This mode allows the CPU and the core logic to operate at a higher frequency
NYX 0:85b3fd62ea1a 493 * than the normal mode for a given voltage scaling (scale 1, scale 2 or scale 3).
NYX 0:85b3fd62ea1a 494 * @note It is recommended to enter or exit Over-drive mode when the application is not running
NYX 0:85b3fd62ea1a 495 * critical tasks and when the system clock source is either HSI or HSE.
NYX 0:85b3fd62ea1a 496 * During the Over-drive switch activation, no peripheral clocks should be enabled.
NYX 0:85b3fd62ea1a 497 * The peripheral clocks must be enabled once the Over-drive mode is activated.
NYX 0:85b3fd62ea1a 498 * @retval HAL status
NYX 0:85b3fd62ea1a 499 */
NYX 0:85b3fd62ea1a 500 HAL_StatusTypeDef HAL_PWREx_DisableOverDrive(void)
NYX 0:85b3fd62ea1a 501 {
NYX 0:85b3fd62ea1a 502 uint32_t tickstart = 0U;
NYX 0:85b3fd62ea1a 503
NYX 0:85b3fd62ea1a 504 __HAL_RCC_PWR_CLK_ENABLE();
NYX 0:85b3fd62ea1a 505
NYX 0:85b3fd62ea1a 506 /* Disable the Over-drive switch */
NYX 0:85b3fd62ea1a 507 __HAL_PWR_OVERDRIVESWITCHING_DISABLE();
NYX 0:85b3fd62ea1a 508
NYX 0:85b3fd62ea1a 509 /* Get tick */
NYX 0:85b3fd62ea1a 510 tickstart = HAL_GetTick();
NYX 0:85b3fd62ea1a 511
NYX 0:85b3fd62ea1a 512 while(__HAL_PWR_GET_FLAG(PWR_FLAG_ODSWRDY))
NYX 0:85b3fd62ea1a 513 {
NYX 0:85b3fd62ea1a 514 if((HAL_GetTick() - tickstart) > PWR_OVERDRIVE_TIMEOUT_VALUE)
NYX 0:85b3fd62ea1a 515 {
NYX 0:85b3fd62ea1a 516 return HAL_TIMEOUT;
NYX 0:85b3fd62ea1a 517 }
NYX 0:85b3fd62ea1a 518 }
NYX 0:85b3fd62ea1a 519
NYX 0:85b3fd62ea1a 520 /* Disable the Over-drive */
NYX 0:85b3fd62ea1a 521 __HAL_PWR_OVERDRIVE_DISABLE();
NYX 0:85b3fd62ea1a 522
NYX 0:85b3fd62ea1a 523 /* Get tick */
NYX 0:85b3fd62ea1a 524 tickstart = HAL_GetTick();
NYX 0:85b3fd62ea1a 525
NYX 0:85b3fd62ea1a 526 while(__HAL_PWR_GET_FLAG(PWR_FLAG_ODRDY))
NYX 0:85b3fd62ea1a 527 {
NYX 0:85b3fd62ea1a 528 if((HAL_GetTick() - tickstart) > PWR_OVERDRIVE_TIMEOUT_VALUE)
NYX 0:85b3fd62ea1a 529 {
NYX 0:85b3fd62ea1a 530 return HAL_TIMEOUT;
NYX 0:85b3fd62ea1a 531 }
NYX 0:85b3fd62ea1a 532 }
NYX 0:85b3fd62ea1a 533
NYX 0:85b3fd62ea1a 534 return HAL_OK;
NYX 0:85b3fd62ea1a 535 }
NYX 0:85b3fd62ea1a 536
NYX 0:85b3fd62ea1a 537 /**
NYX 0:85b3fd62ea1a 538 * @brief Enters in Under-Drive STOP mode.
NYX 0:85b3fd62ea1a 539 *
NYX 0:85b3fd62ea1a 540 * @note This mode is only available for STM32F42xxx/STM32F43xxx/STM32F446xx/STM32F469xx/STM32F479xx devices.
NYX 0:85b3fd62ea1a 541 *
NYX 0:85b3fd62ea1a 542 * @note This mode can be selected only when the Under-Drive is already active
NYX 0:85b3fd62ea1a 543 *
NYX 0:85b3fd62ea1a 544 * @note This mode is enabled only with STOP low power mode.
NYX 0:85b3fd62ea1a 545 * In this mode, the 1.2V domain is preserved in reduced leakage mode. This
NYX 0:85b3fd62ea1a 546 * mode is only available when the main regulator or the low power regulator
NYX 0:85b3fd62ea1a 547 * is in low voltage mode
NYX 0:85b3fd62ea1a 548 *
NYX 0:85b3fd62ea1a 549 * @note If the Under-drive mode was enabled, it is automatically disabled after
NYX 0:85b3fd62ea1a 550 * exiting Stop mode.
NYX 0:85b3fd62ea1a 551 * When the voltage regulator operates in Under-drive mode, an additional
NYX 0:85b3fd62ea1a 552 * startup delay is induced when waking up from Stop mode.
NYX 0:85b3fd62ea1a 553 *
NYX 0:85b3fd62ea1a 554 * @note In Stop mode, all I/O pins keep the same state as in Run mode.
NYX 0:85b3fd62ea1a 555 *
NYX 0:85b3fd62ea1a 556 * @note When exiting Stop mode by issuing an interrupt or a wake-up event,
NYX 0:85b3fd62ea1a 557 * the HSI RC oscillator is selected as system clock.
NYX 0:85b3fd62ea1a 558 *
NYX 0:85b3fd62ea1a 559 * @note When the voltage regulator operates in low power mode, an additional
NYX 0:85b3fd62ea1a 560 * startup delay is incurred when waking up from Stop mode.
NYX 0:85b3fd62ea1a 561 * By keeping the internal regulator ON during Stop mode, the consumption
NYX 0:85b3fd62ea1a 562 * is higher although the startup time is reduced.
NYX 0:85b3fd62ea1a 563 *
NYX 0:85b3fd62ea1a 564 * @param Regulator: specifies the regulator state in STOP mode.
NYX 0:85b3fd62ea1a 565 * This parameter can be one of the following values:
NYX 0:85b3fd62ea1a 566 * @arg PWR_MAINREGULATOR_UNDERDRIVE_ON: Main Regulator in under-drive mode
NYX 0:85b3fd62ea1a 567 * and Flash memory in power-down when the device is in Stop under-drive mode
NYX 0:85b3fd62ea1a 568 * @arg PWR_LOWPOWERREGULATOR_UNDERDRIVE_ON: Low Power Regulator in under-drive mode
NYX 0:85b3fd62ea1a 569 * and Flash memory in power-down when the device is in Stop under-drive mode
NYX 0:85b3fd62ea1a 570 * @param STOPEntry: specifies if STOP mode in entered with WFI or WFE instruction.
NYX 0:85b3fd62ea1a 571 * This parameter can be one of the following values:
NYX 0:85b3fd62ea1a 572 * @arg PWR_SLEEPENTRY_WFI: enter STOP mode with WFI instruction
NYX 0:85b3fd62ea1a 573 * @arg PWR_SLEEPENTRY_WFE: enter STOP mode with WFE instruction
NYX 0:85b3fd62ea1a 574 * @retval None
NYX 0:85b3fd62ea1a 575 */
NYX 0:85b3fd62ea1a 576 HAL_StatusTypeDef HAL_PWREx_EnterUnderDriveSTOPMode(uint32_t Regulator, uint8_t STOPEntry)
NYX 0:85b3fd62ea1a 577 {
NYX 0:85b3fd62ea1a 578 uint32_t tmpreg1 = 0U;
NYX 0:85b3fd62ea1a 579
NYX 0:85b3fd62ea1a 580 /* Check the parameters */
NYX 0:85b3fd62ea1a 581 assert_param(IS_PWR_REGULATOR_UNDERDRIVE(Regulator));
NYX 0:85b3fd62ea1a 582 assert_param(IS_PWR_STOP_ENTRY(STOPEntry));
NYX 0:85b3fd62ea1a 583
NYX 0:85b3fd62ea1a 584 /* Enable Power ctrl clock */
NYX 0:85b3fd62ea1a 585 __HAL_RCC_PWR_CLK_ENABLE();
NYX 0:85b3fd62ea1a 586 /* Enable the Under-drive Mode ---------------------------------------------*/
NYX 0:85b3fd62ea1a 587 /* Clear Under-drive flag */
NYX 0:85b3fd62ea1a 588 __HAL_PWR_CLEAR_ODRUDR_FLAG();
NYX 0:85b3fd62ea1a 589
NYX 0:85b3fd62ea1a 590 /* Enable the Under-drive */
NYX 0:85b3fd62ea1a 591 __HAL_PWR_UNDERDRIVE_ENABLE();
NYX 0:85b3fd62ea1a 592
NYX 0:85b3fd62ea1a 593 /* Select the regulator state in STOP mode ---------------------------------*/
NYX 0:85b3fd62ea1a 594 tmpreg1 = PWR->CR;
NYX 0:85b3fd62ea1a 595 /* Clear PDDS, LPDS, MRLUDS and LPLUDS bits */
NYX 0:85b3fd62ea1a 596 tmpreg1 &= (uint32_t)~(PWR_CR_PDDS | PWR_CR_LPDS | PWR_CR_LPUDS | PWR_CR_MRUDS);
NYX 0:85b3fd62ea1a 597
NYX 0:85b3fd62ea1a 598 /* Set LPDS, MRLUDS and LPLUDS bits according to PWR_Regulator value */
NYX 0:85b3fd62ea1a 599 tmpreg1 |= Regulator;
NYX 0:85b3fd62ea1a 600
NYX 0:85b3fd62ea1a 601 /* Store the new value */
NYX 0:85b3fd62ea1a 602 PWR->CR = tmpreg1;
NYX 0:85b3fd62ea1a 603
NYX 0:85b3fd62ea1a 604 /* Set SLEEPDEEP bit of Cortex System Control Register */
NYX 0:85b3fd62ea1a 605 SCB->SCR |= SCB_SCR_SLEEPDEEP_Msk;
NYX 0:85b3fd62ea1a 606
NYX 0:85b3fd62ea1a 607 /* Select STOP mode entry --------------------------------------------------*/
NYX 0:85b3fd62ea1a 608 if(STOPEntry == PWR_SLEEPENTRY_WFI)
NYX 0:85b3fd62ea1a 609 {
NYX 0:85b3fd62ea1a 610 /* Request Wait For Interrupt */
NYX 0:85b3fd62ea1a 611 __WFI();
NYX 0:85b3fd62ea1a 612 }
NYX 0:85b3fd62ea1a 613 else
NYX 0:85b3fd62ea1a 614 {
NYX 0:85b3fd62ea1a 615 /* Request Wait For Event */
NYX 0:85b3fd62ea1a 616 __WFE();
NYX 0:85b3fd62ea1a 617 }
NYX 0:85b3fd62ea1a 618 /* Reset SLEEPDEEP bit of Cortex System Control Register */
NYX 0:85b3fd62ea1a 619 SCB->SCR &= (uint32_t)~((uint32_t)SCB_SCR_SLEEPDEEP_Msk);
NYX 0:85b3fd62ea1a 620
NYX 0:85b3fd62ea1a 621 return HAL_OK;
NYX 0:85b3fd62ea1a 622 }
NYX 0:85b3fd62ea1a 623
NYX 0:85b3fd62ea1a 624 #endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || STM32F446xx || STM32F469xx || STM32F479xx */
NYX 0:85b3fd62ea1a 625 /**
NYX 0:85b3fd62ea1a 626 * @}
NYX 0:85b3fd62ea1a 627 */
NYX 0:85b3fd62ea1a 628
NYX 0:85b3fd62ea1a 629 /**
NYX 0:85b3fd62ea1a 630 * @}
NYX 0:85b3fd62ea1a 631 */
NYX 0:85b3fd62ea1a 632
NYX 0:85b3fd62ea1a 633 #endif /* HAL_PWR_MODULE_ENABLED */
NYX 0:85b3fd62ea1a 634 /**
NYX 0:85b3fd62ea1a 635 * @}
NYX 0:85b3fd62ea1a 636 */
NYX 0:85b3fd62ea1a 637
NYX 0:85b3fd62ea1a 638 /**
NYX 0:85b3fd62ea1a 639 * @}
NYX 0:85b3fd62ea1a 640 */
NYX 0:85b3fd62ea1a 641
NYX 0:85b3fd62ea1a 642 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/