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targets/TARGET_STM/TARGET_STM32F4/device/stm32f4xx_hal_pwr.c@0:85b3fd62ea1a, 2020-03-16 (annotated)

Committer:
NYX
Date:
Mon Mar 16 06:35:48 2020 +0000
Revision:
0:85b3fd62ea1a
reinport to mbed;

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NYX 0:85b3fd62ea1a 1 /**
NYX 0:85b3fd62ea1a 2 ******************************************************************************
NYX 0:85b3fd62ea1a 3 * @file stm32f4xx_hal_pwr.c
NYX 0:85b3fd62ea1a 4 * @author MCD Application Team
NYX 0:85b3fd62ea1a 5 * @version V1.7.1
NYX 0:85b3fd62ea1a 6 * @date 14-April-2017
NYX 0:85b3fd62ea1a 7 * @brief PWR HAL module driver.
NYX 0:85b3fd62ea1a 8 * This file provides firmware functions to manage the following
NYX 0:85b3fd62ea1a 9 * functionalities of the Power Controller (PWR) peripheral:
NYX 0:85b3fd62ea1a 10 * + Initialization and de-initialization functions
NYX 0:85b3fd62ea1a 11 * + Peripheral Control functions
NYX 0:85b3fd62ea1a 12 *
NYX 0:85b3fd62ea1a 13 ******************************************************************************
NYX 0:85b3fd62ea1a 14 * @attention
NYX 0:85b3fd62ea1a 15 *
NYX 0:85b3fd62ea1a 16 * <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
NYX 0:85b3fd62ea1a 17 *
NYX 0:85b3fd62ea1a 18 * Redistribution and use in source and binary forms, with or without modification,
NYX 0:85b3fd62ea1a 19 * are permitted provided that the following conditions are met:
NYX 0:85b3fd62ea1a 20 * 1. Redistributions of source code must retain the above copyright notice,
NYX 0:85b3fd62ea1a 21 * this list of conditions and the following disclaimer.
NYX 0:85b3fd62ea1a 22 * 2. Redistributions in binary form must reproduce the above copyright notice,
NYX 0:85b3fd62ea1a 23 * this list of conditions and the following disclaimer in the documentation
NYX 0:85b3fd62ea1a 24 * and/or other materials provided with the distribution.
NYX 0:85b3fd62ea1a 25 * 3. Neither the name of STMicroelectronics nor the names of its contributors
NYX 0:85b3fd62ea1a 26 * may be used to endorse or promote products derived from this software
NYX 0:85b3fd62ea1a 27 * without specific prior written permission.
NYX 0:85b3fd62ea1a 28 *
NYX 0:85b3fd62ea1a 29 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
NYX 0:85b3fd62ea1a 30 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
NYX 0:85b3fd62ea1a 31 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
NYX 0:85b3fd62ea1a 32 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
NYX 0:85b3fd62ea1a 33 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
NYX 0:85b3fd62ea1a 34 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
NYX 0:85b3fd62ea1a 35 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
NYX 0:85b3fd62ea1a 36 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
NYX 0:85b3fd62ea1a 37 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
NYX 0:85b3fd62ea1a 38 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
NYX 0:85b3fd62ea1a 39 *
NYX 0:85b3fd62ea1a 40 ******************************************************************************
NYX 0:85b3fd62ea1a 41 */
NYX 0:85b3fd62ea1a 42
NYX 0:85b3fd62ea1a 43 /* Includes ------------------------------------------------------------------*/
NYX 0:85b3fd62ea1a 44 #include "stm32f4xx_hal.h"
NYX 0:85b3fd62ea1a 45
NYX 0:85b3fd62ea1a 46 /** @addtogroup STM32F4xx_HAL_Driver
NYX 0:85b3fd62ea1a 47 * @{
NYX 0:85b3fd62ea1a 48 */
NYX 0:85b3fd62ea1a 49
NYX 0:85b3fd62ea1a 50 /** @defgroup PWR PWR
NYX 0:85b3fd62ea1a 51 * @brief PWR HAL module driver
NYX 0:85b3fd62ea1a 52 * @{
NYX 0:85b3fd62ea1a 53 */
NYX 0:85b3fd62ea1a 54
NYX 0:85b3fd62ea1a 55 #ifdef HAL_PWR_MODULE_ENABLED
NYX 0:85b3fd62ea1a 56
NYX 0:85b3fd62ea1a 57 /* Private typedef -----------------------------------------------------------*/
NYX 0:85b3fd62ea1a 58 /* Private define ------------------------------------------------------------*/
NYX 0:85b3fd62ea1a 59 /** @addtogroup PWR_Private_Constants
NYX 0:85b3fd62ea1a 60 * @{
NYX 0:85b3fd62ea1a 61 */
NYX 0:85b3fd62ea1a 62
NYX 0:85b3fd62ea1a 63 /** @defgroup PWR_PVD_Mode_Mask PWR PVD Mode Mask
NYX 0:85b3fd62ea1a 64 * @{
NYX 0:85b3fd62ea1a 65 */
NYX 0:85b3fd62ea1a 66 #define PVD_MODE_IT 0x00010000U
NYX 0:85b3fd62ea1a 67 #define PVD_MODE_EVT 0x00020000U
NYX 0:85b3fd62ea1a 68 #define PVD_RISING_EDGE 0x00000001U
NYX 0:85b3fd62ea1a 69 #define PVD_FALLING_EDGE 0x00000002U
NYX 0:85b3fd62ea1a 70 /**
NYX 0:85b3fd62ea1a 71 * @}
NYX 0:85b3fd62ea1a 72 */
NYX 0:85b3fd62ea1a 73
NYX 0:85b3fd62ea1a 74 /**
NYX 0:85b3fd62ea1a 75 * @}
NYX 0:85b3fd62ea1a 76 */
NYX 0:85b3fd62ea1a 77 /* Private macro -------------------------------------------------------------*/
NYX 0:85b3fd62ea1a 78 /* Private variables ---------------------------------------------------------*/
NYX 0:85b3fd62ea1a 79 /* Private function prototypes -----------------------------------------------*/
NYX 0:85b3fd62ea1a 80 /* Private functions ---------------------------------------------------------*/
NYX 0:85b3fd62ea1a 81
NYX 0:85b3fd62ea1a 82 /** @defgroup PWR_Exported_Functions PWR Exported Functions
NYX 0:85b3fd62ea1a 83 * @{
NYX 0:85b3fd62ea1a 84 */
NYX 0:85b3fd62ea1a 85
NYX 0:85b3fd62ea1a 86 /** @defgroup PWR_Exported_Functions_Group1 Initialization and de-initialization functions
NYX 0:85b3fd62ea1a 87 * @brief Initialization and de-initialization functions
NYX 0:85b3fd62ea1a 88 *
NYX 0:85b3fd62ea1a 89 @verbatim
NYX 0:85b3fd62ea1a 90 ===============================================================================
NYX 0:85b3fd62ea1a 91 ##### Initialization and de-initialization functions #####
NYX 0:85b3fd62ea1a 92 ===============================================================================
NYX 0:85b3fd62ea1a 93 [..]
NYX 0:85b3fd62ea1a 94 After reset, the backup domain (RTC registers, RTC backup data
NYX 0:85b3fd62ea1a 95 registers and backup SRAM) is protected against possible unwanted
NYX 0:85b3fd62ea1a 96 write accesses.
NYX 0:85b3fd62ea1a 97 To enable access to the RTC Domain and RTC registers, proceed as follows:
NYX 0:85b3fd62ea1a 98 (+) Enable the Power Controller (PWR) APB1 interface clock using the
NYX 0:85b3fd62ea1a 99 __HAL_RCC_PWR_CLK_ENABLE() macro.
NYX 0:85b3fd62ea1a 100 (+) Enable access to RTC domain using the HAL_PWR_EnableBkUpAccess() function.
NYX 0:85b3fd62ea1a 101
NYX 0:85b3fd62ea1a 102 @endverbatim
NYX 0:85b3fd62ea1a 103 * @{
NYX 0:85b3fd62ea1a 104 */
NYX 0:85b3fd62ea1a 105
NYX 0:85b3fd62ea1a 106 /**
NYX 0:85b3fd62ea1a 107 * @brief Deinitializes the HAL PWR peripheral registers to their default reset values.
NYX 0:85b3fd62ea1a 108 * @retval None
NYX 0:85b3fd62ea1a 109 */
NYX 0:85b3fd62ea1a 110 void HAL_PWR_DeInit(void)
NYX 0:85b3fd62ea1a 111 {
NYX 0:85b3fd62ea1a 112 __HAL_RCC_PWR_FORCE_RESET();
NYX 0:85b3fd62ea1a 113 __HAL_RCC_PWR_RELEASE_RESET();
NYX 0:85b3fd62ea1a 114 }
NYX 0:85b3fd62ea1a 115
NYX 0:85b3fd62ea1a 116 /**
NYX 0:85b3fd62ea1a 117 * @brief Enables access to the backup domain (RTC registers, RTC
NYX 0:85b3fd62ea1a 118 * backup data registers and backup SRAM).
NYX 0:85b3fd62ea1a 119 * @note If the HSE divided by 2, 3, ..31 is used as the RTC clock, the
NYX 0:85b3fd62ea1a 120 * Backup Domain Access should be kept enabled.
NYX 0:85b3fd62ea1a 121 * @retval None
NYX 0:85b3fd62ea1a 122 */
NYX 0:85b3fd62ea1a 123 void HAL_PWR_EnableBkUpAccess(void)
NYX 0:85b3fd62ea1a 124 {
NYX 0:85b3fd62ea1a 125 *(__IO uint32_t *) CR_DBP_BB = (uint32_t)ENABLE;
NYX 0:85b3fd62ea1a 126 }
NYX 0:85b3fd62ea1a 127
NYX 0:85b3fd62ea1a 128 /**
NYX 0:85b3fd62ea1a 129 * @brief Disables access to the backup domain (RTC registers, RTC
NYX 0:85b3fd62ea1a 130 * backup data registers and backup SRAM).
NYX 0:85b3fd62ea1a 131 * @note If the HSE divided by 2, 3, ..31 is used as the RTC clock, the
NYX 0:85b3fd62ea1a 132 * Backup Domain Access should be kept enabled.
NYX 0:85b3fd62ea1a 133 * @retval None
NYX 0:85b3fd62ea1a 134 */
NYX 0:85b3fd62ea1a 135 void HAL_PWR_DisableBkUpAccess(void)
NYX 0:85b3fd62ea1a 136 {
NYX 0:85b3fd62ea1a 137 *(__IO uint32_t *) CR_DBP_BB = (uint32_t)DISABLE;
NYX 0:85b3fd62ea1a 138 }
NYX 0:85b3fd62ea1a 139
NYX 0:85b3fd62ea1a 140 /**
NYX 0:85b3fd62ea1a 141 * @}
NYX 0:85b3fd62ea1a 142 */
NYX 0:85b3fd62ea1a 143
NYX 0:85b3fd62ea1a 144 /** @defgroup PWR_Exported_Functions_Group2 Peripheral Control functions
NYX 0:85b3fd62ea1a 145 * @brief Low Power modes configuration functions
NYX 0:85b3fd62ea1a 146 *
NYX 0:85b3fd62ea1a 147 @verbatim
NYX 0:85b3fd62ea1a 148
NYX 0:85b3fd62ea1a 149 ===============================================================================
NYX 0:85b3fd62ea1a 150 ##### Peripheral Control functions #####
NYX 0:85b3fd62ea1a 151 ===============================================================================
NYX 0:85b3fd62ea1a 152
NYX 0:85b3fd62ea1a 153 *** PVD configuration ***
NYX 0:85b3fd62ea1a 154 =========================
NYX 0:85b3fd62ea1a 155 [..]
NYX 0:85b3fd62ea1a 156 (+) The PVD is used to monitor the VDD power supply by comparing it to a
NYX 0:85b3fd62ea1a 157 threshold selected by the PVD Level (PLS[2:0] bits in the PWR_CR).
NYX 0:85b3fd62ea1a 158 (+) A PVDO flag is available to indicate if VDD/VDDA is higher or lower
NYX 0:85b3fd62ea1a 159 than the PVD threshold. This event is internally connected to the EXTI
NYX 0:85b3fd62ea1a 160 line16 and can generate an interrupt if enabled. This is done through
NYX 0:85b3fd62ea1a 161 __HAL_PWR_PVD_EXTI_ENABLE_IT() macro.
NYX 0:85b3fd62ea1a 162 (+) The PVD is stopped in Standby mode.
NYX 0:85b3fd62ea1a 163
NYX 0:85b3fd62ea1a 164 *** Wake-up pin configuration ***
NYX 0:85b3fd62ea1a 165 ================================
NYX 0:85b3fd62ea1a 166 [..]
NYX 0:85b3fd62ea1a 167 (+) Wake-up pin is used to wake up the system from Standby mode. This pin is
NYX 0:85b3fd62ea1a 168 forced in input pull-down configuration and is active on rising edges.
NYX 0:85b3fd62ea1a 169 (+) There is one Wake-up pin: Wake-up Pin 1 on PA.00.
NYX 0:85b3fd62ea1a 170 (++) For STM32F446xx there are two Wake-Up pins: Pin1 on PA.00 and Pin2 on PC.13
NYX 0:85b3fd62ea1a 171 (++) For STM32F410xx/STM32F412Zx/STM32F412Rx/STM32F412Vx/STM32F412Cx there are three Wake-Up pins: Pin1 on PA.00, Pin2 on PC.00 and Pin3 on PC.01
NYX 0:85b3fd62ea1a 172
NYX 0:85b3fd62ea1a 173 *** Low Power modes configuration ***
NYX 0:85b3fd62ea1a 174 =====================================
NYX 0:85b3fd62ea1a 175 [..]
NYX 0:85b3fd62ea1a 176 The devices feature 3 low-power modes:
NYX 0:85b3fd62ea1a 177 (+) Sleep mode: Cortex-M4 core stopped, peripherals kept running.
NYX 0:85b3fd62ea1a 178 (+) Stop mode: all clocks are stopped, regulator running, regulator
NYX 0:85b3fd62ea1a 179 in low power mode
NYX 0:85b3fd62ea1a 180 (+) Standby mode: 1.2V domain powered off.
NYX 0:85b3fd62ea1a 181
NYX 0:85b3fd62ea1a 182 *** Sleep mode ***
NYX 0:85b3fd62ea1a 183 ==================
NYX 0:85b3fd62ea1a 184 [..]
NYX 0:85b3fd62ea1a 185 (+) Entry:
NYX 0:85b3fd62ea1a 186 The Sleep mode is entered by using the HAL_PWR_EnterSLEEPMode(PWR_MAINREGULATOR_ON, PWR_SLEEPENTRY_WFI)
NYX 0:85b3fd62ea1a 187 functions with
NYX 0:85b3fd62ea1a 188 (++) PWR_SLEEPENTRY_WFI: enter SLEEP mode with WFI instruction
NYX 0:85b3fd62ea1a 189 (++) PWR_SLEEPENTRY_WFE: enter SLEEP mode with WFE instruction
NYX 0:85b3fd62ea1a 190
NYX 0:85b3fd62ea1a 191 -@@- The Regulator parameter is not used for the STM32F4 family
NYX 0:85b3fd62ea1a 192 and is kept as parameter just to maintain compatibility with the
NYX 0:85b3fd62ea1a 193 lower power families (STM32L).
NYX 0:85b3fd62ea1a 194 (+) Exit:
NYX 0:85b3fd62ea1a 195 Any peripheral interrupt acknowledged by the nested vectored interrupt
NYX 0:85b3fd62ea1a 196 controller (NVIC) can wake up the device from Sleep mode.
NYX 0:85b3fd62ea1a 197
NYX 0:85b3fd62ea1a 198 *** Stop mode ***
NYX 0:85b3fd62ea1a 199 =================
NYX 0:85b3fd62ea1a 200 [..]
NYX 0:85b3fd62ea1a 201 In Stop mode, all clocks in the 1.2V domain are stopped, the PLL, the HSI,
NYX 0:85b3fd62ea1a 202 and the HSE RC oscillators are disabled. Internal SRAM and register contents
NYX 0:85b3fd62ea1a 203 are preserved.
NYX 0:85b3fd62ea1a 204 The voltage regulator can be configured either in normal or low-power mode.
NYX 0:85b3fd62ea1a 205 To minimize the consumption In Stop mode, FLASH can be powered off before
NYX 0:85b3fd62ea1a 206 entering the Stop mode using the HAL_PWREx_EnableFlashPowerDown() function.
NYX 0:85b3fd62ea1a 207 It can be switched on again by software after exiting the Stop mode using
NYX 0:85b3fd62ea1a 208 the HAL_PWREx_DisableFlashPowerDown() function.
NYX 0:85b3fd62ea1a 209
NYX 0:85b3fd62ea1a 210 (+) Entry:
NYX 0:85b3fd62ea1a 211 The Stop mode is entered using the HAL_PWR_EnterSTOPMode(PWR_MAINREGULATOR_ON)
NYX 0:85b3fd62ea1a 212 function with:
NYX 0:85b3fd62ea1a 213 (++) Main regulator ON.
NYX 0:85b3fd62ea1a 214 (++) Low Power regulator ON.
NYX 0:85b3fd62ea1a 215 (+) Exit:
NYX 0:85b3fd62ea1a 216 Any EXTI Line (Internal or External) configured in Interrupt/Event mode.
NYX 0:85b3fd62ea1a 217
NYX 0:85b3fd62ea1a 218 *** Standby mode ***
NYX 0:85b3fd62ea1a 219 ====================
NYX 0:85b3fd62ea1a 220 [..]
NYX 0:85b3fd62ea1a 221 (+)
NYX 0:85b3fd62ea1a 222 The Standby mode allows to achieve the lowest power consumption. It is based
NYX 0:85b3fd62ea1a 223 on the Cortex-M4 deep sleep mode, with the voltage regulator disabled.
NYX 0:85b3fd62ea1a 224 The 1.2V domain is consequently powered off. The PLL, the HSI oscillator and
NYX 0:85b3fd62ea1a 225 the HSE oscillator are also switched off. SRAM and register contents are lost
NYX 0:85b3fd62ea1a 226 except for the RTC registers, RTC backup registers, backup SRAM and Standby
NYX 0:85b3fd62ea1a 227 circuitry.
NYX 0:85b3fd62ea1a 228
NYX 0:85b3fd62ea1a 229 The voltage regulator is OFF.
NYX 0:85b3fd62ea1a 230
NYX 0:85b3fd62ea1a 231 (++) Entry:
NYX 0:85b3fd62ea1a 232 (+++) The Standby mode is entered using the HAL_PWR_EnterSTANDBYMode() function.
NYX 0:85b3fd62ea1a 233 (++) Exit:
NYX 0:85b3fd62ea1a 234 (+++) WKUP pin rising edge, RTC alarm (Alarm A and Alarm B), RTC wake-up,
NYX 0:85b3fd62ea1a 235 tamper event, time-stamp event, external reset in NRST pin, IWDG reset.
NYX 0:85b3fd62ea1a 236
NYX 0:85b3fd62ea1a 237 *** Auto-wake-up (AWU) from low-power mode ***
NYX 0:85b3fd62ea1a 238 =============================================
NYX 0:85b3fd62ea1a 239 [..]
NYX 0:85b3fd62ea1a 240
NYX 0:85b3fd62ea1a 241 (+) The MCU can be woken up from low-power mode by an RTC Alarm event, an RTC
NYX 0:85b3fd62ea1a 242 Wake-up event, a tamper event or a time-stamp event, without depending on
NYX 0:85b3fd62ea1a 243 an external interrupt (Auto-wake-up mode).
NYX 0:85b3fd62ea1a 244
NYX 0:85b3fd62ea1a 245 (+) RTC auto-wake-up (AWU) from the Stop and Standby modes
NYX 0:85b3fd62ea1a 246
NYX 0:85b3fd62ea1a 247 (++) To wake up from the Stop mode with an RTC alarm event, it is necessary to
NYX 0:85b3fd62ea1a 248 configure the RTC to generate the RTC alarm using the HAL_RTC_SetAlarm_IT() function.
NYX 0:85b3fd62ea1a 249
NYX 0:85b3fd62ea1a 250 (++) To wake up from the Stop mode with an RTC Tamper or time stamp event, it
NYX 0:85b3fd62ea1a 251 is necessary to configure the RTC to detect the tamper or time stamp event using the
NYX 0:85b3fd62ea1a 252 HAL_RTCEx_SetTimeStamp_IT() or HAL_RTCEx_SetTamper_IT() functions.
NYX 0:85b3fd62ea1a 253
NYX 0:85b3fd62ea1a 254 (++) To wake up from the Stop mode with an RTC Wake-up event, it is necessary to
NYX 0:85b3fd62ea1a 255 configure the RTC to generate the RTC Wake-up event using the HAL_RTCEx_SetWakeUpTimer_IT() function.
NYX 0:85b3fd62ea1a 256
NYX 0:85b3fd62ea1a 257 @endverbatim
NYX 0:85b3fd62ea1a 258 * @{
NYX 0:85b3fd62ea1a 259 */
NYX 0:85b3fd62ea1a 260
NYX 0:85b3fd62ea1a 261 /**
NYX 0:85b3fd62ea1a 262 * @brief Configures the voltage threshold detected by the Power Voltage Detector(PVD).
NYX 0:85b3fd62ea1a 263 * @param sConfigPVD: pointer to an PWR_PVDTypeDef structure that contains the configuration
NYX 0:85b3fd62ea1a 264 * information for the PVD.
NYX 0:85b3fd62ea1a 265 * @note Refer to the electrical characteristics of your device datasheet for
NYX 0:85b3fd62ea1a 266 * more details about the voltage threshold corresponding to each
NYX 0:85b3fd62ea1a 267 * detection level.
NYX 0:85b3fd62ea1a 268 * @retval None
NYX 0:85b3fd62ea1a 269 */
NYX 0:85b3fd62ea1a 270 void HAL_PWR_ConfigPVD(PWR_PVDTypeDef *sConfigPVD)
NYX 0:85b3fd62ea1a 271 {
NYX 0:85b3fd62ea1a 272 /* Check the parameters */
NYX 0:85b3fd62ea1a 273 assert_param(IS_PWR_PVD_LEVEL(sConfigPVD->PVDLevel));
NYX 0:85b3fd62ea1a 274 assert_param(IS_PWR_PVD_MODE(sConfigPVD->Mode));
NYX 0:85b3fd62ea1a 275
NYX 0:85b3fd62ea1a 276 /* Set PLS[7:5] bits according to PVDLevel value */
NYX 0:85b3fd62ea1a 277 MODIFY_REG(PWR->CR, PWR_CR_PLS, sConfigPVD->PVDLevel);
NYX 0:85b3fd62ea1a 278
NYX 0:85b3fd62ea1a 279 /* Clear any previous config. Keep it clear if no event or IT mode is selected */
NYX 0:85b3fd62ea1a 280 __HAL_PWR_PVD_EXTI_DISABLE_EVENT();
NYX 0:85b3fd62ea1a 281 __HAL_PWR_PVD_EXTI_DISABLE_IT();
NYX 0:85b3fd62ea1a 282 __HAL_PWR_PVD_EXTI_DISABLE_RISING_EDGE();
NYX 0:85b3fd62ea1a 283 __HAL_PWR_PVD_EXTI_DISABLE_FALLING_EDGE();
NYX 0:85b3fd62ea1a 284
NYX 0:85b3fd62ea1a 285 /* Configure interrupt mode */
NYX 0:85b3fd62ea1a 286 if((sConfigPVD->Mode & PVD_MODE_IT) == PVD_MODE_IT)
NYX 0:85b3fd62ea1a 287 {
NYX 0:85b3fd62ea1a 288 __HAL_PWR_PVD_EXTI_ENABLE_IT();
NYX 0:85b3fd62ea1a 289 }
NYX 0:85b3fd62ea1a 290
NYX 0:85b3fd62ea1a 291 /* Configure event mode */
NYX 0:85b3fd62ea1a 292 if((sConfigPVD->Mode & PVD_MODE_EVT) == PVD_MODE_EVT)
NYX 0:85b3fd62ea1a 293 {
NYX 0:85b3fd62ea1a 294 __HAL_PWR_PVD_EXTI_ENABLE_EVENT();
NYX 0:85b3fd62ea1a 295 }
NYX 0:85b3fd62ea1a 296
NYX 0:85b3fd62ea1a 297 /* Configure the edge */
NYX 0:85b3fd62ea1a 298 if((sConfigPVD->Mode & PVD_RISING_EDGE) == PVD_RISING_EDGE)
NYX 0:85b3fd62ea1a 299 {
NYX 0:85b3fd62ea1a 300 __HAL_PWR_PVD_EXTI_ENABLE_RISING_EDGE();
NYX 0:85b3fd62ea1a 301 }
NYX 0:85b3fd62ea1a 302
NYX 0:85b3fd62ea1a 303 if((sConfigPVD->Mode & PVD_FALLING_EDGE) == PVD_FALLING_EDGE)
NYX 0:85b3fd62ea1a 304 {
NYX 0:85b3fd62ea1a 305 __HAL_PWR_PVD_EXTI_ENABLE_FALLING_EDGE();
NYX 0:85b3fd62ea1a 306 }
NYX 0:85b3fd62ea1a 307 }
NYX 0:85b3fd62ea1a 308
NYX 0:85b3fd62ea1a 309 /**
NYX 0:85b3fd62ea1a 310 * @brief Enables the Power Voltage Detector(PVD).
NYX 0:85b3fd62ea1a 311 * @retval None
NYX 0:85b3fd62ea1a 312 */
NYX 0:85b3fd62ea1a 313 void HAL_PWR_EnablePVD(void)
NYX 0:85b3fd62ea1a 314 {
NYX 0:85b3fd62ea1a 315 *(__IO uint32_t *) CR_PVDE_BB = (uint32_t)ENABLE;
NYX 0:85b3fd62ea1a 316 }
NYX 0:85b3fd62ea1a 317
NYX 0:85b3fd62ea1a 318 /**
NYX 0:85b3fd62ea1a 319 * @brief Disables the Power Voltage Detector(PVD).
NYX 0:85b3fd62ea1a 320 * @retval None
NYX 0:85b3fd62ea1a 321 */
NYX 0:85b3fd62ea1a 322 void HAL_PWR_DisablePVD(void)
NYX 0:85b3fd62ea1a 323 {
NYX 0:85b3fd62ea1a 324 *(__IO uint32_t *) CR_PVDE_BB = (uint32_t)DISABLE;
NYX 0:85b3fd62ea1a 325 }
NYX 0:85b3fd62ea1a 326
NYX 0:85b3fd62ea1a 327 /**
NYX 0:85b3fd62ea1a 328 * @brief Enables the Wake-up PINx functionality.
NYX 0:85b3fd62ea1a 329 * @param WakeUpPinx: Specifies the Power Wake-Up pin to enable.
NYX 0:85b3fd62ea1a 330 * This parameter can be one of the following values:
NYX 0:85b3fd62ea1a 331 * @arg PWR_WAKEUP_PIN1
NYX 0:85b3fd62ea1a 332 * @arg PWR_WAKEUP_PIN2 available only on STM32F410xx/STM32F446xx/STM32F412Zx/STM32F412Rx/STM32F412Vx/STM32F412Cx devices
NYX 0:85b3fd62ea1a 333 * @arg PWR_WAKEUP_PIN3 available only on STM32F410xx/STM32F412xx devices
NYX 0:85b3fd62ea1a 334 * @retval None
NYX 0:85b3fd62ea1a 335 */
NYX 0:85b3fd62ea1a 336 void HAL_PWR_EnableWakeUpPin(uint32_t WakeUpPinx)
NYX 0:85b3fd62ea1a 337 {
NYX 0:85b3fd62ea1a 338 /* Check the parameter */
NYX 0:85b3fd62ea1a 339 assert_param(IS_PWR_WAKEUP_PIN(WakeUpPinx));
NYX 0:85b3fd62ea1a 340
NYX 0:85b3fd62ea1a 341 /* Enable the wake up pin */
NYX 0:85b3fd62ea1a 342 SET_BIT(PWR->CSR, WakeUpPinx);
NYX 0:85b3fd62ea1a 343 }
NYX 0:85b3fd62ea1a 344
NYX 0:85b3fd62ea1a 345 /**
NYX 0:85b3fd62ea1a 346 * @brief Disables the Wake-up PINx functionality.
NYX 0:85b3fd62ea1a 347 * @param WakeUpPinx: Specifies the Power Wake-Up pin to disable.
NYX 0:85b3fd62ea1a 348 * This parameter can be one of the following values:
NYX 0:85b3fd62ea1a 349 * @arg PWR_WAKEUP_PIN1
NYX 0:85b3fd62ea1a 350 * @arg PWR_WAKEUP_PIN2 available only on STM32F410xx/STM32F446xx/STM32F412Zx/STM32F412Rx/STM32F412Vx/STM32F412Cx devices
NYX 0:85b3fd62ea1a 351 * @arg PWR_WAKEUP_PIN3 available only on STM32F410xx/STM32F412Zx/STM32F412Rx/STM32F412Vx/STM32F412Cx devices
NYX 0:85b3fd62ea1a 352 * @retval None
NYX 0:85b3fd62ea1a 353 */
NYX 0:85b3fd62ea1a 354 void HAL_PWR_DisableWakeUpPin(uint32_t WakeUpPinx)
NYX 0:85b3fd62ea1a 355 {
NYX 0:85b3fd62ea1a 356 /* Check the parameter */
NYX 0:85b3fd62ea1a 357 assert_param(IS_PWR_WAKEUP_PIN(WakeUpPinx));
NYX 0:85b3fd62ea1a 358
NYX 0:85b3fd62ea1a 359 /* Disable the wake up pin */
NYX 0:85b3fd62ea1a 360 CLEAR_BIT(PWR->CSR, WakeUpPinx);
NYX 0:85b3fd62ea1a 361 }
NYX 0:85b3fd62ea1a 362
NYX 0:85b3fd62ea1a 363 /**
NYX 0:85b3fd62ea1a 364 * @brief Enters Sleep mode.
NYX 0:85b3fd62ea1a 365 *
NYX 0:85b3fd62ea1a 366 * @note In Sleep mode, all I/O pins keep the same state as in Run mode.
NYX 0:85b3fd62ea1a 367 *
NYX 0:85b3fd62ea1a 368 * @note In Sleep mode, the systick is stopped to avoid exit from this mode with
NYX 0:85b3fd62ea1a 369 * systick interrupt when used as time base for Timeout
NYX 0:85b3fd62ea1a 370 *
NYX 0:85b3fd62ea1a 371 * @param Regulator: Specifies the regulator state in SLEEP mode.
NYX 0:85b3fd62ea1a 372 * This parameter can be one of the following values:
NYX 0:85b3fd62ea1a 373 * @arg PWR_MAINREGULATOR_ON: SLEEP mode with regulator ON
NYX 0:85b3fd62ea1a 374 * @arg PWR_LOWPOWERREGULATOR_ON: SLEEP mode with low power regulator ON
NYX 0:85b3fd62ea1a 375 * @note This parameter is not used for the STM32F4 family and is kept as parameter
NYX 0:85b3fd62ea1a 376 * just to maintain compatibility with the lower power families.
NYX 0:85b3fd62ea1a 377 * @param SLEEPEntry: Specifies if SLEEP mode in entered with WFI or WFE instruction.
NYX 0:85b3fd62ea1a 378 * This parameter can be one of the following values:
NYX 0:85b3fd62ea1a 379 * @arg PWR_SLEEPENTRY_WFI: enter SLEEP mode with WFI instruction
NYX 0:85b3fd62ea1a 380 * @arg PWR_SLEEPENTRY_WFE: enter SLEEP mode with WFE instruction
NYX 0:85b3fd62ea1a 381 * @retval None
NYX 0:85b3fd62ea1a 382 */
NYX 0:85b3fd62ea1a 383 void HAL_PWR_EnterSLEEPMode(uint32_t Regulator, uint8_t SLEEPEntry)
NYX 0:85b3fd62ea1a 384 {
NYX 0:85b3fd62ea1a 385 /* Check the parameters */
NYX 0:85b3fd62ea1a 386 assert_param(IS_PWR_REGULATOR(Regulator));
NYX 0:85b3fd62ea1a 387 assert_param(IS_PWR_SLEEP_ENTRY(SLEEPEntry));
NYX 0:85b3fd62ea1a 388
NYX 0:85b3fd62ea1a 389 /* Clear SLEEPDEEP bit of Cortex System Control Register */
NYX 0:85b3fd62ea1a 390 CLEAR_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SLEEPDEEP_Msk));
NYX 0:85b3fd62ea1a 391
NYX 0:85b3fd62ea1a 392 /* Select SLEEP mode entry -------------------------------------------------*/
NYX 0:85b3fd62ea1a 393 if(SLEEPEntry == PWR_SLEEPENTRY_WFI)
NYX 0:85b3fd62ea1a 394 {
NYX 0:85b3fd62ea1a 395 /* Request Wait For Interrupt */
NYX 0:85b3fd62ea1a 396 __WFI();
NYX 0:85b3fd62ea1a 397 }
NYX 0:85b3fd62ea1a 398 else
NYX 0:85b3fd62ea1a 399 {
NYX 0:85b3fd62ea1a 400 /* Request Wait For Event */
NYX 0:85b3fd62ea1a 401 __SEV();
NYX 0:85b3fd62ea1a 402 __WFE();
NYX 0:85b3fd62ea1a 403 __WFE();
NYX 0:85b3fd62ea1a 404 }
NYX 0:85b3fd62ea1a 405 }
NYX 0:85b3fd62ea1a 406
NYX 0:85b3fd62ea1a 407 /**
NYX 0:85b3fd62ea1a 408 * @brief Enters Stop mode.
NYX 0:85b3fd62ea1a 409 * @note In Stop mode, all I/O pins keep the same state as in Run mode.
NYX 0:85b3fd62ea1a 410 * @note When exiting Stop mode by issuing an interrupt or a wake-up event,
NYX 0:85b3fd62ea1a 411 * the HSI RC oscillator is selected as system clock.
NYX 0:85b3fd62ea1a 412 * @note When the voltage regulator operates in low power mode, an additional
NYX 0:85b3fd62ea1a 413 * startup delay is incurred when waking up from Stop mode.
NYX 0:85b3fd62ea1a 414 * By keeping the internal regulator ON during Stop mode, the consumption
NYX 0:85b3fd62ea1a 415 * is higher although the startup time is reduced.
NYX 0:85b3fd62ea1a 416 * @param Regulator: Specifies the regulator state in Stop mode.
NYX 0:85b3fd62ea1a 417 * This parameter can be one of the following values:
NYX 0:85b3fd62ea1a 418 * @arg PWR_MAINREGULATOR_ON: Stop mode with regulator ON
NYX 0:85b3fd62ea1a 419 * @arg PWR_LOWPOWERREGULATOR_ON: Stop mode with low power regulator ON
NYX 0:85b3fd62ea1a 420 * @param STOPEntry: Specifies if Stop mode in entered with WFI or WFE instruction.
NYX 0:85b3fd62ea1a 421 * This parameter can be one of the following values:
NYX 0:85b3fd62ea1a 422 * @arg PWR_STOPENTRY_WFI: Enter Stop mode with WFI instruction
NYX 0:85b3fd62ea1a 423 * @arg PWR_STOPENTRY_WFE: Enter Stop mode with WFE instruction
NYX 0:85b3fd62ea1a 424 * @retval None
NYX 0:85b3fd62ea1a 425 */
NYX 0:85b3fd62ea1a 426 void HAL_PWR_EnterSTOPMode(uint32_t Regulator, uint8_t STOPEntry)
NYX 0:85b3fd62ea1a 427 {
NYX 0:85b3fd62ea1a 428 /* Check the parameters */
NYX 0:85b3fd62ea1a 429 assert_param(IS_PWR_REGULATOR(Regulator));
NYX 0:85b3fd62ea1a 430 assert_param(IS_PWR_STOP_ENTRY(STOPEntry));
NYX 0:85b3fd62ea1a 431
NYX 0:85b3fd62ea1a 432 /* Select the regulator state in Stop mode: Set PDDS and LPDS bits according to PWR_Regulator value */
NYX 0:85b3fd62ea1a 433 MODIFY_REG(PWR->CR, (PWR_CR_PDDS | PWR_CR_LPDS), Regulator);
NYX 0:85b3fd62ea1a 434
NYX 0:85b3fd62ea1a 435 /* Set SLEEPDEEP bit of Cortex System Control Register */
NYX 0:85b3fd62ea1a 436 SET_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SLEEPDEEP_Msk));
NYX 0:85b3fd62ea1a 437
NYX 0:85b3fd62ea1a 438 /* Select Stop mode entry --------------------------------------------------*/
NYX 0:85b3fd62ea1a 439 if(STOPEntry == PWR_STOPENTRY_WFI)
NYX 0:85b3fd62ea1a 440 {
NYX 0:85b3fd62ea1a 441 /* Request Wait For Interrupt */
NYX 0:85b3fd62ea1a 442 __WFI();
NYX 0:85b3fd62ea1a 443 }
NYX 0:85b3fd62ea1a 444 else
NYX 0:85b3fd62ea1a 445 {
NYX 0:85b3fd62ea1a 446 /* Request Wait For Event */
NYX 0:85b3fd62ea1a 447 __SEV();
NYX 0:85b3fd62ea1a 448 __WFE();
NYX 0:85b3fd62ea1a 449 __WFE();
NYX 0:85b3fd62ea1a 450 }
NYX 0:85b3fd62ea1a 451 /* Reset SLEEPDEEP bit of Cortex System Control Register */
NYX 0:85b3fd62ea1a 452 CLEAR_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SLEEPDEEP_Msk));
NYX 0:85b3fd62ea1a 453 }
NYX 0:85b3fd62ea1a 454
NYX 0:85b3fd62ea1a 455 /**
NYX 0:85b3fd62ea1a 456 * @brief Enters Standby mode.
NYX 0:85b3fd62ea1a 457 * @note In Standby mode, all I/O pins are high impedance except for:
NYX 0:85b3fd62ea1a 458 * - Reset pad (still available)
NYX 0:85b3fd62ea1a 459 * - RTC_AF1 pin (PC13) if configured for tamper, time-stamp, RTC
NYX 0:85b3fd62ea1a 460 * Alarm out, or RTC clock calibration out.
NYX 0:85b3fd62ea1a 461 * - RTC_AF2 pin (PI8) if configured for tamper or time-stamp.
NYX 0:85b3fd62ea1a 462 * - WKUP pin 1 (PA0) if enabled.
NYX 0:85b3fd62ea1a 463 * @retval None
NYX 0:85b3fd62ea1a 464 */
NYX 0:85b3fd62ea1a 465 void HAL_PWR_EnterSTANDBYMode(void)
NYX 0:85b3fd62ea1a 466 {
NYX 0:85b3fd62ea1a 467 /* Select Standby mode */
NYX 0:85b3fd62ea1a 468 SET_BIT(PWR->CR, PWR_CR_PDDS);
NYX 0:85b3fd62ea1a 469
NYX 0:85b3fd62ea1a 470 /* Set SLEEPDEEP bit of Cortex System Control Register */
NYX 0:85b3fd62ea1a 471 SET_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SLEEPDEEP_Msk));
NYX 0:85b3fd62ea1a 472
NYX 0:85b3fd62ea1a 473 /* This option is used to ensure that store operations are completed */
NYX 0:85b3fd62ea1a 474 #if defined ( __CC_ARM)
NYX 0:85b3fd62ea1a 475 __force_stores();
NYX 0:85b3fd62ea1a 476 #endif
NYX 0:85b3fd62ea1a 477 /* Request Wait For Interrupt */
NYX 0:85b3fd62ea1a 478 __WFI();
NYX 0:85b3fd62ea1a 479 }
NYX 0:85b3fd62ea1a 480
NYX 0:85b3fd62ea1a 481 /**
NYX 0:85b3fd62ea1a 482 * @brief This function handles the PWR PVD interrupt request.
NYX 0:85b3fd62ea1a 483 * @note This API should be called under the PVD_IRQHandler().
NYX 0:85b3fd62ea1a 484 * @retval None
NYX 0:85b3fd62ea1a 485 */
NYX 0:85b3fd62ea1a 486 void HAL_PWR_PVD_IRQHandler(void)
NYX 0:85b3fd62ea1a 487 {
NYX 0:85b3fd62ea1a 488 /* Check PWR Exti flag */
NYX 0:85b3fd62ea1a 489 if(__HAL_PWR_PVD_EXTI_GET_FLAG() != RESET)
NYX 0:85b3fd62ea1a 490 {
NYX 0:85b3fd62ea1a 491 /* PWR PVD interrupt user callback */
NYX 0:85b3fd62ea1a 492 HAL_PWR_PVDCallback();
NYX 0:85b3fd62ea1a 493
NYX 0:85b3fd62ea1a 494 /* Clear PWR Exti pending bit */
NYX 0:85b3fd62ea1a 495 __HAL_PWR_PVD_EXTI_CLEAR_FLAG();
NYX 0:85b3fd62ea1a 496 }
NYX 0:85b3fd62ea1a 497 }
NYX 0:85b3fd62ea1a 498
NYX 0:85b3fd62ea1a 499 /**
NYX 0:85b3fd62ea1a 500 * @brief PWR PVD interrupt callback
NYX 0:85b3fd62ea1a 501 * @retval None
NYX 0:85b3fd62ea1a 502 */
NYX 0:85b3fd62ea1a 503 __weak void HAL_PWR_PVDCallback(void)
NYX 0:85b3fd62ea1a 504 {
NYX 0:85b3fd62ea1a 505 /* NOTE : This function Should not be modified, when the callback is needed,
NYX 0:85b3fd62ea1a 506 the HAL_PWR_PVDCallback could be implemented in the user file
NYX 0:85b3fd62ea1a 507 */
NYX 0:85b3fd62ea1a 508 }
NYX 0:85b3fd62ea1a 509
NYX 0:85b3fd62ea1a 510 /**
NYX 0:85b3fd62ea1a 511 * @brief Indicates Sleep-On-Exit when returning from Handler mode to Thread mode.
NYX 0:85b3fd62ea1a 512 * @note Set SLEEPONEXIT bit of SCR register. When this bit is set, the processor
NYX 0:85b3fd62ea1a 513 * re-enters SLEEP mode when an interruption handling is over.
NYX 0:85b3fd62ea1a 514 * Setting this bit is useful when the processor is expected to run only on
NYX 0:85b3fd62ea1a 515 * interruptions handling.
NYX 0:85b3fd62ea1a 516 * @retval None
NYX 0:85b3fd62ea1a 517 */
NYX 0:85b3fd62ea1a 518 void HAL_PWR_EnableSleepOnExit(void)
NYX 0:85b3fd62ea1a 519 {
NYX 0:85b3fd62ea1a 520 /* Set SLEEPONEXIT bit of Cortex System Control Register */
NYX 0:85b3fd62ea1a 521 SET_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SLEEPONEXIT_Msk));
NYX 0:85b3fd62ea1a 522 }
NYX 0:85b3fd62ea1a 523
NYX 0:85b3fd62ea1a 524 /**
NYX 0:85b3fd62ea1a 525 * @brief Disables Sleep-On-Exit feature when returning from Handler mode to Thread mode.
NYX 0:85b3fd62ea1a 526 * @note Clears SLEEPONEXIT bit of SCR register. When this bit is set, the processor
NYX 0:85b3fd62ea1a 527 * re-enters SLEEP mode when an interruption handling is over.
NYX 0:85b3fd62ea1a 528 * @retval None
NYX 0:85b3fd62ea1a 529 */
NYX 0:85b3fd62ea1a 530 void HAL_PWR_DisableSleepOnExit(void)
NYX 0:85b3fd62ea1a 531 {
NYX 0:85b3fd62ea1a 532 /* Clear SLEEPONEXIT bit of Cortex System Control Register */
NYX 0:85b3fd62ea1a 533 CLEAR_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SLEEPONEXIT_Msk));
NYX 0:85b3fd62ea1a 534 }
NYX 0:85b3fd62ea1a 535
NYX 0:85b3fd62ea1a 536 /**
NYX 0:85b3fd62ea1a 537 * @brief Enables CORTEX M4 SEVONPEND bit.
NYX 0:85b3fd62ea1a 538 * @note Sets SEVONPEND bit of SCR register. When this bit is set, this causes
NYX 0:85b3fd62ea1a 539 * WFE to wake up when an interrupt moves from inactive to pended.
NYX 0:85b3fd62ea1a 540 * @retval None
NYX 0:85b3fd62ea1a 541 */
NYX 0:85b3fd62ea1a 542 void HAL_PWR_EnableSEVOnPend(void)
NYX 0:85b3fd62ea1a 543 {
NYX 0:85b3fd62ea1a 544 /* Set SEVONPEND bit of Cortex System Control Register */
NYX 0:85b3fd62ea1a 545 SET_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SEVONPEND_Msk));
NYX 0:85b3fd62ea1a 546 }
NYX 0:85b3fd62ea1a 547
NYX 0:85b3fd62ea1a 548 /**
NYX 0:85b3fd62ea1a 549 * @brief Disables CORTEX M4 SEVONPEND bit.
NYX 0:85b3fd62ea1a 550 * @note Clears SEVONPEND bit of SCR register. When this bit is set, this causes
NYX 0:85b3fd62ea1a 551 * WFE to wake up when an interrupt moves from inactive to pended.
NYX 0:85b3fd62ea1a 552 * @retval None
NYX 0:85b3fd62ea1a 553 */
NYX 0:85b3fd62ea1a 554 void HAL_PWR_DisableSEVOnPend(void)
NYX 0:85b3fd62ea1a 555 {
NYX 0:85b3fd62ea1a 556 /* Clear SEVONPEND bit of Cortex System Control Register */
NYX 0:85b3fd62ea1a 557 CLEAR_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SEVONPEND_Msk));
NYX 0:85b3fd62ea1a 558 }
NYX 0:85b3fd62ea1a 559
NYX 0:85b3fd62ea1a 560 /**
NYX 0:85b3fd62ea1a 561 * @}
NYX 0:85b3fd62ea1a 562 */
NYX 0:85b3fd62ea1a 563
NYX 0:85b3fd62ea1a 564 /**
NYX 0:85b3fd62ea1a 565 * @}
NYX 0:85b3fd62ea1a 566 */
NYX 0:85b3fd62ea1a 567
NYX 0:85b3fd62ea1a 568 #endif /* HAL_PWR_MODULE_ENABLED */
NYX 0:85b3fd62ea1a 569 /**
NYX 0:85b3fd62ea1a 570 * @}
NYX 0:85b3fd62ea1a 571 */
NYX 0:85b3fd62ea1a 572
NYX 0:85b3fd62ea1a 573 /**
NYX 0:85b3fd62ea1a 574 * @}
NYX 0:85b3fd62ea1a 575 */
NYX 0:85b3fd62ea1a 576
NYX 0:85b3fd62ea1a 577 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/