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targets/TARGET_STM/TARGET_STM32F4/device/stm32f4xx_hal_nor.h@0:85b3fd62ea1a, 2020-03-16 (annotated)

Committer:
NYX
Date:
Mon Mar 16 06:35:48 2020 +0000
Revision:
0:85b3fd62ea1a
reinport to mbed;

Who changed what in which revision?

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NYX 0:85b3fd62ea1a 1 /**
NYX 0:85b3fd62ea1a 2 ******************************************************************************
NYX 0:85b3fd62ea1a 3 * @file stm32f4xx_hal_nor.h
NYX 0:85b3fd62ea1a 4 * @author MCD Application Team
NYX 0:85b3fd62ea1a 5 * @version V1.7.1
NYX 0:85b3fd62ea1a 6 * @date 14-April-2017
NYX 0:85b3fd62ea1a 7 * @brief Header file of NOR HAL module.
NYX 0:85b3fd62ea1a 8 ******************************************************************************
NYX 0:85b3fd62ea1a 9 * @attention
NYX 0:85b3fd62ea1a 10 *
NYX 0:85b3fd62ea1a 11 * <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
NYX 0:85b3fd62ea1a 12 *
NYX 0:85b3fd62ea1a 13 * Redistribution and use in source and binary forms, with or without modification,
NYX 0:85b3fd62ea1a 14 * are permitted provided that the following conditions are met:
NYX 0:85b3fd62ea1a 15 * 1. Redistributions of source code must retain the above copyright notice,
NYX 0:85b3fd62ea1a 16 * this list of conditions and the following disclaimer.
NYX 0:85b3fd62ea1a 17 * 2. Redistributions in binary form must reproduce the above copyright notice,
NYX 0:85b3fd62ea1a 18 * this list of conditions and the following disclaimer in the documentation
NYX 0:85b3fd62ea1a 19 * and/or other materials provided with the distribution.
NYX 0:85b3fd62ea1a 20 * 3. Neither the name of STMicroelectronics nor the names of its contributors
NYX 0:85b3fd62ea1a 21 * may be used to endorse or promote products derived from this software
NYX 0:85b3fd62ea1a 22 * without specific prior written permission.
NYX 0:85b3fd62ea1a 23 *
NYX 0:85b3fd62ea1a 24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
NYX 0:85b3fd62ea1a 25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
NYX 0:85b3fd62ea1a 26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
NYX 0:85b3fd62ea1a 27 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
NYX 0:85b3fd62ea1a 28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
NYX 0:85b3fd62ea1a 29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
NYX 0:85b3fd62ea1a 30 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
NYX 0:85b3fd62ea1a 31 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
NYX 0:85b3fd62ea1a 32 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
NYX 0:85b3fd62ea1a 33 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
NYX 0:85b3fd62ea1a 34 *
NYX 0:85b3fd62ea1a 35 ******************************************************************************
NYX 0:85b3fd62ea1a 36 */
NYX 0:85b3fd62ea1a 37
NYX 0:85b3fd62ea1a 38 /* Define to prevent recursive inclusion -------------------------------------*/
NYX 0:85b3fd62ea1a 39 #ifndef __STM32F4xx_HAL_NOR_H
NYX 0:85b3fd62ea1a 40 #define __STM32F4xx_HAL_NOR_H
NYX 0:85b3fd62ea1a 41
NYX 0:85b3fd62ea1a 42 #ifdef __cplusplus
NYX 0:85b3fd62ea1a 43 extern "C" {
NYX 0:85b3fd62ea1a 44 #endif
NYX 0:85b3fd62ea1a 45
NYX 0:85b3fd62ea1a 46 /* Includes ------------------------------------------------------------------*/
NYX 0:85b3fd62ea1a 47 #if defined(STM32F405xx) || defined(STM32F415xx) || defined(STM32F407xx) || defined(STM32F417xx) || defined(STM32F412Zx) ||\
NYX 0:85b3fd62ea1a 48 defined(STM32F412Vx) || defined(STM32F413xx) || defined(STM32F423xx)
NYX 0:85b3fd62ea1a 49 #include "stm32f4xx_ll_fsmc.h"
NYX 0:85b3fd62ea1a 50 #endif /* STM32F405xx || STM32F415xx || STM32F407xx || STM32F417xx || STM32F412Zx || STM32F412Vx || STM32F413xx || STM32F423xx */
NYX 0:85b3fd62ea1a 51
NYX 0:85b3fd62ea1a 52 #if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx) ||\
NYX 0:85b3fd62ea1a 53 defined(STM32F446xx) || defined(STM32F469xx) || defined(STM32F479xx)
NYX 0:85b3fd62ea1a 54 #include "stm32f4xx_ll_fmc.h"
NYX 0:85b3fd62ea1a 55 #endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || STM32F446xx || STM32F469xx || STM32F479xx */
NYX 0:85b3fd62ea1a 56
NYX 0:85b3fd62ea1a 57 /** @addtogroup STM32F4xx_HAL_Driver
NYX 0:85b3fd62ea1a 58 * @{
NYX 0:85b3fd62ea1a 59 */
NYX 0:85b3fd62ea1a 60
NYX 0:85b3fd62ea1a 61 /** @addtogroup NOR
NYX 0:85b3fd62ea1a 62 * @{
NYX 0:85b3fd62ea1a 63 */
NYX 0:85b3fd62ea1a 64
NYX 0:85b3fd62ea1a 65 #if defined(STM32F405xx) || defined(STM32F415xx) || defined(STM32F407xx) || defined(STM32F417xx) ||\
NYX 0:85b3fd62ea1a 66 defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx) ||\
NYX 0:85b3fd62ea1a 67 defined(STM32F446xx) || defined(STM32F469xx) || defined(STM32F479xx) || defined(STM32F412Zx) ||\
NYX 0:85b3fd62ea1a 68 defined(STM32F412Vx) || defined(STM32F413xx) || defined(STM32F423xx)
NYX 0:85b3fd62ea1a 69
NYX 0:85b3fd62ea1a 70 /* Exported typedef ----------------------------------------------------------*/
NYX 0:85b3fd62ea1a 71 /** @defgroup NOR_Exported_Types NOR Exported Types
NYX 0:85b3fd62ea1a 72 * @{
NYX 0:85b3fd62ea1a 73 */
NYX 0:85b3fd62ea1a 74
NYX 0:85b3fd62ea1a 75 /**
NYX 0:85b3fd62ea1a 76 * @brief HAL SRAM State structures definition
NYX 0:85b3fd62ea1a 77 */
NYX 0:85b3fd62ea1a 78 typedef enum
NYX 0:85b3fd62ea1a 79 {
NYX 0:85b3fd62ea1a 80 HAL_NOR_STATE_RESET = 0x00U, /*!< NOR not yet initialized or disabled */
NYX 0:85b3fd62ea1a 81 HAL_NOR_STATE_READY = 0x01U, /*!< NOR initialized and ready for use */
NYX 0:85b3fd62ea1a 82 HAL_NOR_STATE_BUSY = 0x02U, /*!< NOR internal processing is ongoing */
NYX 0:85b3fd62ea1a 83 HAL_NOR_STATE_ERROR = 0x03U, /*!< NOR error state */
NYX 0:85b3fd62ea1a 84 HAL_NOR_STATE_PROTECTED = 0x04U /*!< NOR NORSRAM device write protected */
NYX 0:85b3fd62ea1a 85 }HAL_NOR_StateTypeDef;
NYX 0:85b3fd62ea1a 86
NYX 0:85b3fd62ea1a 87 /**
NYX 0:85b3fd62ea1a 88 * @brief FMC NOR Status typedef
NYX 0:85b3fd62ea1a 89 */
NYX 0:85b3fd62ea1a 90 typedef enum
NYX 0:85b3fd62ea1a 91 {
NYX 0:85b3fd62ea1a 92 HAL_NOR_STATUS_SUCCESS = 0U,
NYX 0:85b3fd62ea1a 93 HAL_NOR_STATUS_ONGOING,
NYX 0:85b3fd62ea1a 94 HAL_NOR_STATUS_ERROR,
NYX 0:85b3fd62ea1a 95 HAL_NOR_STATUS_TIMEOUT
NYX 0:85b3fd62ea1a 96 }HAL_NOR_StatusTypeDef;
NYX 0:85b3fd62ea1a 97
NYX 0:85b3fd62ea1a 98 /**
NYX 0:85b3fd62ea1a 99 * @brief FMC NOR ID typedef
NYX 0:85b3fd62ea1a 100 */
NYX 0:85b3fd62ea1a 101 typedef struct
NYX 0:85b3fd62ea1a 102 {
NYX 0:85b3fd62ea1a 103 uint16_t Manufacturer_Code; /*!< Defines the device's manufacturer code used to identify the memory */
NYX 0:85b3fd62ea1a 104
NYX 0:85b3fd62ea1a 105 uint16_t Device_Code1;
NYX 0:85b3fd62ea1a 106
NYX 0:85b3fd62ea1a 107 uint16_t Device_Code2;
NYX 0:85b3fd62ea1a 108
NYX 0:85b3fd62ea1a 109 uint16_t Device_Code3; /*!< Defines the device's codes used to identify the memory.
NYX 0:85b3fd62ea1a 110 These codes can be accessed by performing read operations with specific
NYX 0:85b3fd62ea1a 111 control signals and addresses set.They can also be accessed by issuing
NYX 0:85b3fd62ea1a 112 an Auto Select command */
NYX 0:85b3fd62ea1a 113 }NOR_IDTypeDef;
NYX 0:85b3fd62ea1a 114
NYX 0:85b3fd62ea1a 115 /**
NYX 0:85b3fd62ea1a 116 * @brief FMC NOR CFI typedef
NYX 0:85b3fd62ea1a 117 */
NYX 0:85b3fd62ea1a 118 typedef struct
NYX 0:85b3fd62ea1a 119 {
NYX 0:85b3fd62ea1a 120 /*!< Defines the information stored in the memory's Common flash interface
NYX 0:85b3fd62ea1a 121 which contains a description of various electrical and timing parameters,
NYX 0:85b3fd62ea1a 122 density information and functions supported by the memory */
NYX 0:85b3fd62ea1a 123
NYX 0:85b3fd62ea1a 124 uint16_t CFI_1;
NYX 0:85b3fd62ea1a 125
NYX 0:85b3fd62ea1a 126 uint16_t CFI_2;
NYX 0:85b3fd62ea1a 127
NYX 0:85b3fd62ea1a 128 uint16_t CFI_3;
NYX 0:85b3fd62ea1a 129
NYX 0:85b3fd62ea1a 130 uint16_t CFI_4;
NYX 0:85b3fd62ea1a 131 }NOR_CFITypeDef;
NYX 0:85b3fd62ea1a 132
NYX 0:85b3fd62ea1a 133 /**
NYX 0:85b3fd62ea1a 134 * @brief NOR handle Structure definition
NYX 0:85b3fd62ea1a 135 */
NYX 0:85b3fd62ea1a 136 typedef struct
NYX 0:85b3fd62ea1a 137 {
NYX 0:85b3fd62ea1a 138 FMC_NORSRAM_TypeDef *Instance; /*!< Register base address */
NYX 0:85b3fd62ea1a 139
NYX 0:85b3fd62ea1a 140 FMC_NORSRAM_EXTENDED_TypeDef *Extended; /*!< Extended mode register base address */
NYX 0:85b3fd62ea1a 141
NYX 0:85b3fd62ea1a 142 FMC_NORSRAM_InitTypeDef Init; /*!< NOR device control configuration parameters */
NYX 0:85b3fd62ea1a 143
NYX 0:85b3fd62ea1a 144 HAL_LockTypeDef Lock; /*!< NOR locking object */
NYX 0:85b3fd62ea1a 145
NYX 0:85b3fd62ea1a 146 __IO HAL_NOR_StateTypeDef State; /*!< NOR device access state */
NYX 0:85b3fd62ea1a 147
NYX 0:85b3fd62ea1a 148 }NOR_HandleTypeDef;
NYX 0:85b3fd62ea1a 149 /**
NYX 0:85b3fd62ea1a 150 * @}
NYX 0:85b3fd62ea1a 151 */
NYX 0:85b3fd62ea1a 152
NYX 0:85b3fd62ea1a 153 /* Exported constants --------------------------------------------------------*/
NYX 0:85b3fd62ea1a 154 /* Exported macros ------------------------------------------------------------*/
NYX 0:85b3fd62ea1a 155 /** @defgroup NOR_Exported_Macros NOR Exported Macros
NYX 0:85b3fd62ea1a 156 * @{
NYX 0:85b3fd62ea1a 157 */
NYX 0:85b3fd62ea1a 158 /** @brief Reset NOR handle state
NYX 0:85b3fd62ea1a 159 * @param __HANDLE__: specifies the NOR handle.
NYX 0:85b3fd62ea1a 160 * @retval None
NYX 0:85b3fd62ea1a 161 */
NYX 0:85b3fd62ea1a 162 #define __HAL_NOR_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_NOR_STATE_RESET)
NYX 0:85b3fd62ea1a 163 /**
NYX 0:85b3fd62ea1a 164 * @}
NYX 0:85b3fd62ea1a 165 */
NYX 0:85b3fd62ea1a 166
NYX 0:85b3fd62ea1a 167 /* Exported functions --------------------------------------------------------*/
NYX 0:85b3fd62ea1a 168 /** @addtogroup NOR_Exported_Functions
NYX 0:85b3fd62ea1a 169 * @{
NYX 0:85b3fd62ea1a 170 */
NYX 0:85b3fd62ea1a 171
NYX 0:85b3fd62ea1a 172 /** @addtogroup NOR_Exported_Functions_Group1
NYX 0:85b3fd62ea1a 173 * @{
NYX 0:85b3fd62ea1a 174 */
NYX 0:85b3fd62ea1a 175 /* Initialization/de-initialization functions ********************************/
NYX 0:85b3fd62ea1a 176 HAL_StatusTypeDef HAL_NOR_Init(NOR_HandleTypeDef *hnor, FMC_NORSRAM_TimingTypeDef *Timing, FMC_NORSRAM_TimingTypeDef *ExtTiming);
NYX 0:85b3fd62ea1a 177 HAL_StatusTypeDef HAL_NOR_DeInit(NOR_HandleTypeDef *hnor);
NYX 0:85b3fd62ea1a 178 void HAL_NOR_MspInit(NOR_HandleTypeDef *hnor);
NYX 0:85b3fd62ea1a 179 void HAL_NOR_MspDeInit(NOR_HandleTypeDef *hnor);
NYX 0:85b3fd62ea1a 180 void HAL_NOR_MspWait(NOR_HandleTypeDef *hnor, uint32_t Timeout);
NYX 0:85b3fd62ea1a 181 /**
NYX 0:85b3fd62ea1a 182 * @}
NYX 0:85b3fd62ea1a 183 */
NYX 0:85b3fd62ea1a 184
NYX 0:85b3fd62ea1a 185 /** @addtogroup NOR_Exported_Functions_Group2
NYX 0:85b3fd62ea1a 186 * @{
NYX 0:85b3fd62ea1a 187 */
NYX 0:85b3fd62ea1a 188 /* I/O operation functions ***************************************************/
NYX 0:85b3fd62ea1a 189 HAL_StatusTypeDef HAL_NOR_Read_ID(NOR_HandleTypeDef *hnor, NOR_IDTypeDef *pNOR_ID);
NYX 0:85b3fd62ea1a 190 HAL_StatusTypeDef HAL_NOR_ReturnToReadMode(NOR_HandleTypeDef *hnor);
NYX 0:85b3fd62ea1a 191 HAL_StatusTypeDef HAL_NOR_Read(NOR_HandleTypeDef *hnor, uint32_t *pAddress, uint16_t *pData);
NYX 0:85b3fd62ea1a 192 HAL_StatusTypeDef HAL_NOR_Program(NOR_HandleTypeDef *hnor, uint32_t *pAddress, uint16_t *pData);
NYX 0:85b3fd62ea1a 193
NYX 0:85b3fd62ea1a 194 HAL_StatusTypeDef HAL_NOR_ReadBuffer(NOR_HandleTypeDef *hnor, uint32_t uwAddress, uint16_t *pData, uint32_t uwBufferSize);
NYX 0:85b3fd62ea1a 195 HAL_StatusTypeDef HAL_NOR_ProgramBuffer(NOR_HandleTypeDef *hnor, uint32_t uwAddress, uint16_t *pData, uint32_t uwBufferSize);
NYX 0:85b3fd62ea1a 196
NYX 0:85b3fd62ea1a 197 HAL_StatusTypeDef HAL_NOR_Erase_Block(NOR_HandleTypeDef *hnor, uint32_t BlockAddress, uint32_t Address);
NYX 0:85b3fd62ea1a 198 HAL_StatusTypeDef HAL_NOR_Erase_Chip(NOR_HandleTypeDef *hnor, uint32_t Address);
NYX 0:85b3fd62ea1a 199 HAL_StatusTypeDef HAL_NOR_Read_CFI(NOR_HandleTypeDef *hnor, NOR_CFITypeDef *pNOR_CFI);
NYX 0:85b3fd62ea1a 200 /**
NYX 0:85b3fd62ea1a 201 * @}
NYX 0:85b3fd62ea1a 202 */
NYX 0:85b3fd62ea1a 203
NYX 0:85b3fd62ea1a 204 /** @addtogroup NOR_Exported_Functions_Group3
NYX 0:85b3fd62ea1a 205 * @{
NYX 0:85b3fd62ea1a 206 */
NYX 0:85b3fd62ea1a 207 /* NOR Control functions *****************************************************/
NYX 0:85b3fd62ea1a 208 HAL_StatusTypeDef HAL_NOR_WriteOperation_Enable(NOR_HandleTypeDef *hnor);
NYX 0:85b3fd62ea1a 209 HAL_StatusTypeDef HAL_NOR_WriteOperation_Disable(NOR_HandleTypeDef *hnor);
NYX 0:85b3fd62ea1a 210 /**
NYX 0:85b3fd62ea1a 211 * @}
NYX 0:85b3fd62ea1a 212 */
NYX 0:85b3fd62ea1a 213
NYX 0:85b3fd62ea1a 214 /** @addtogroup NOR_Exported_Functions_Group4
NYX 0:85b3fd62ea1a 215 * @{
NYX 0:85b3fd62ea1a 216 */
NYX 0:85b3fd62ea1a 217 /* NOR State functions ********************************************************/
NYX 0:85b3fd62ea1a 218 HAL_NOR_StateTypeDef HAL_NOR_GetState(NOR_HandleTypeDef *hnor);
NYX 0:85b3fd62ea1a 219 HAL_NOR_StatusTypeDef HAL_NOR_GetStatus(NOR_HandleTypeDef *hnor, uint32_t Address, uint32_t Timeout);
NYX 0:85b3fd62ea1a 220 /**
NYX 0:85b3fd62ea1a 221 * @}
NYX 0:85b3fd62ea1a 222 */
NYX 0:85b3fd62ea1a 223
NYX 0:85b3fd62ea1a 224 /**
NYX 0:85b3fd62ea1a 225 * @}
NYX 0:85b3fd62ea1a 226 */
NYX 0:85b3fd62ea1a 227
NYX 0:85b3fd62ea1a 228 /* Private types -------------------------------------------------------------*/
NYX 0:85b3fd62ea1a 229 /* Private variables ---------------------------------------------------------*/
NYX 0:85b3fd62ea1a 230 /* Private constants ---------------------------------------------------------*/
NYX 0:85b3fd62ea1a 231 /** @defgroup NOR_Private_Constants NOR Private Constants
NYX 0:85b3fd62ea1a 232 * @{
NYX 0:85b3fd62ea1a 233 */
NYX 0:85b3fd62ea1a 234 /* NOR device IDs addresses */
NYX 0:85b3fd62ea1a 235 #define MC_ADDRESS ((uint16_t)0x0000)
NYX 0:85b3fd62ea1a 236 #define DEVICE_CODE1_ADDR ((uint16_t)0x0001)
NYX 0:85b3fd62ea1a 237 #define DEVICE_CODE2_ADDR ((uint16_t)0x000E)
NYX 0:85b3fd62ea1a 238 #define DEVICE_CODE3_ADDR ((uint16_t)0x000F)
NYX 0:85b3fd62ea1a 239
NYX 0:85b3fd62ea1a 240 /* NOR CFI IDs addresses */
NYX 0:85b3fd62ea1a 241 #define CFI1_ADDRESS ((uint16_t)0x0061)
NYX 0:85b3fd62ea1a 242 #define CFI2_ADDRESS ((uint16_t)0x0062)
NYX 0:85b3fd62ea1a 243 #define CFI3_ADDRESS ((uint16_t)0x0063)
NYX 0:85b3fd62ea1a 244 #define CFI4_ADDRESS ((uint16_t)0x0064)
NYX 0:85b3fd62ea1a 245
NYX 0:85b3fd62ea1a 246 /* NOR operation wait timeout */
NYX 0:85b3fd62ea1a 247 #define NOR_TMEOUT ((uint16_t)0xFFFF)
NYX 0:85b3fd62ea1a 248
NYX 0:85b3fd62ea1a 249 /* NOR memory data width */
NYX 0:85b3fd62ea1a 250 #define NOR_MEMORY_8B ((uint8_t)0x00)
NYX 0:85b3fd62ea1a 251 #define NOR_MEMORY_16B ((uint8_t)0x01)
NYX 0:85b3fd62ea1a 252
NYX 0:85b3fd62ea1a 253 /* NOR memory device read/write start address */
NYX 0:85b3fd62ea1a 254 #define NOR_MEMORY_ADRESS1 0x60000000U
NYX 0:85b3fd62ea1a 255 #define NOR_MEMORY_ADRESS2 0x64000000U
NYX 0:85b3fd62ea1a 256 #define NOR_MEMORY_ADRESS3 0x68000000U
NYX 0:85b3fd62ea1a 257 #define NOR_MEMORY_ADRESS4 0x6C000000U
NYX 0:85b3fd62ea1a 258 /**
NYX 0:85b3fd62ea1a 259 * @}
NYX 0:85b3fd62ea1a 260 */
NYX 0:85b3fd62ea1a 261
NYX 0:85b3fd62ea1a 262 /* Private macros ------------------------------------------------------------*/
NYX 0:85b3fd62ea1a 263 /** @defgroup NOR_Private_Macros NOR Private Macros
NYX 0:85b3fd62ea1a 264 * @{
NYX 0:85b3fd62ea1a 265 */
NYX 0:85b3fd62ea1a 266 /**
NYX 0:85b3fd62ea1a 267 * @brief NOR memory address shifting.
NYX 0:85b3fd62ea1a 268 * @param __NOR_ADDRESS__: NOR base address
NYX 0:85b3fd62ea1a 269 * @param NOR_MEMORY_WIDTH: NOR memory width
NYX 0:85b3fd62ea1a 270 * @param ADDRESS: NOR memory address
NYX 0:85b3fd62ea1a 271 * @retval NOR shifted address value
NYX 0:85b3fd62ea1a 272 */
NYX 0:85b3fd62ea1a 273 #define NOR_ADDR_SHIFT(__NOR_ADDRESS__, NOR_MEMORY_WIDTH, ADDRESS) (uint32_t)(((NOR_MEMORY_WIDTH) == NOR_MEMORY_16B)? ((uint32_t)((__NOR_ADDRESS__) + (2U * (ADDRESS)))):\
NYX 0:85b3fd62ea1a 274 ((uint32_t)((__NOR_ADDRESS__) + (ADDRESS))))
NYX 0:85b3fd62ea1a 275
NYX 0:85b3fd62ea1a 276 /**
NYX 0:85b3fd62ea1a 277 * @brief NOR memory write data to specified address.
NYX 0:85b3fd62ea1a 278 * @param ADDRESS: NOR memory address
NYX 0:85b3fd62ea1a 279 * @param DATA: Data to write
NYX 0:85b3fd62ea1a 280 * @retval None
NYX 0:85b3fd62ea1a 281 */
NYX 0:85b3fd62ea1a 282 #define NOR_WRITE(ADDRESS, DATA) (*(__IO uint16_t *)((uint32_t)(ADDRESS)) = (DATA))
NYX 0:85b3fd62ea1a 283
NYX 0:85b3fd62ea1a 284 /**
NYX 0:85b3fd62ea1a 285 * @}
NYX 0:85b3fd62ea1a 286 */
NYX 0:85b3fd62ea1a 287 #endif /* STM32F405xx || STM32F415xx || STM32F407xx || STM32F417xx ||\
NYX 0:85b3fd62ea1a 288 STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx ||\
NYX 0:85b3fd62ea1a 289 STM32F446xx || STM32F469xx || STM32F479xx || STM32F412Zx ||\
NYX 0:85b3fd62ea1a 290 STM32F412Vx || STM32F413xx || STM32F423xx */
NYX 0:85b3fd62ea1a 291 /**
NYX 0:85b3fd62ea1a 292 * @}
NYX 0:85b3fd62ea1a 293 */
NYX 0:85b3fd62ea1a 294
NYX 0:85b3fd62ea1a 295 /**
NYX 0:85b3fd62ea1a 296 * @}
NYX 0:85b3fd62ea1a 297 */
NYX 0:85b3fd62ea1a 298
NYX 0:85b3fd62ea1a 299 #ifdef __cplusplus
NYX 0:85b3fd62ea1a 300 }
NYX 0:85b3fd62ea1a 301 #endif
NYX 0:85b3fd62ea1a 302
NYX 0:85b3fd62ea1a 303 #endif /* __STM32F4xx_HAL_NOR_H */
NYX 0:85b3fd62ea1a 304
NYX 0:85b3fd62ea1a 305 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/