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targets/TARGET_STM/TARGET_STM32F4/device/stm32f4xx_hal_i2s.h@0:85b3fd62ea1a, 2020-03-16 (annotated)

Committer:
NYX
Date:
Mon Mar 16 06:35:48 2020 +0000
Revision:
0:85b3fd62ea1a
reinport to mbed;

Who changed what in which revision?

UserRevisionLine numberNew contents of line
NYX 0:85b3fd62ea1a 1 /**
NYX 0:85b3fd62ea1a 2 ******************************************************************************
NYX 0:85b3fd62ea1a 3 * @file stm32f4xx_hal_i2s.h
NYX 0:85b3fd62ea1a 4 * @author MCD Application Team
NYX 0:85b3fd62ea1a 5 * @version V1.7.1
NYX 0:85b3fd62ea1a 6 * @date 14-April-2017
NYX 0:85b3fd62ea1a 7 * @brief Header file of I2S HAL module.
NYX 0:85b3fd62ea1a 8 ******************************************************************************
NYX 0:85b3fd62ea1a 9 * @attention
NYX 0:85b3fd62ea1a 10 *
NYX 0:85b3fd62ea1a 11 * <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
NYX 0:85b3fd62ea1a 12 *
NYX 0:85b3fd62ea1a 13 * Redistribution and use in source and binary forms, with or without modification,
NYX 0:85b3fd62ea1a 14 * are permitted provided that the following conditions are met:
NYX 0:85b3fd62ea1a 15 * 1. Redistributions of source code must retain the above copyright notice,
NYX 0:85b3fd62ea1a 16 * this list of conditions and the following disclaimer.
NYX 0:85b3fd62ea1a 17 * 2. Redistributions in binary form must reproduce the above copyright notice,
NYX 0:85b3fd62ea1a 18 * this list of conditions and the following disclaimer in the documentation
NYX 0:85b3fd62ea1a 19 * and/or other materials provided with the distribution.
NYX 0:85b3fd62ea1a 20 * 3. Neither the name of STMicroelectronics nor the names of its contributors
NYX 0:85b3fd62ea1a 21 * may be used to endorse or promote products derived from this software
NYX 0:85b3fd62ea1a 22 * without specific prior written permission.
NYX 0:85b3fd62ea1a 23 *
NYX 0:85b3fd62ea1a 24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
NYX 0:85b3fd62ea1a 25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
NYX 0:85b3fd62ea1a 26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
NYX 0:85b3fd62ea1a 27 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
NYX 0:85b3fd62ea1a 28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
NYX 0:85b3fd62ea1a 29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
NYX 0:85b3fd62ea1a 30 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
NYX 0:85b3fd62ea1a 31 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
NYX 0:85b3fd62ea1a 32 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
NYX 0:85b3fd62ea1a 33 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
NYX 0:85b3fd62ea1a 34 *
NYX 0:85b3fd62ea1a 35 ******************************************************************************
NYX 0:85b3fd62ea1a 36 */
NYX 0:85b3fd62ea1a 37
NYX 0:85b3fd62ea1a 38 /* Define to prevent recursive inclusion -------------------------------------*/
NYX 0:85b3fd62ea1a 39 #ifndef __STM32F4xx_HAL_I2S_H
NYX 0:85b3fd62ea1a 40 #define __STM32F4xx_HAL_I2S_H
NYX 0:85b3fd62ea1a 41
NYX 0:85b3fd62ea1a 42 #ifdef __cplusplus
NYX 0:85b3fd62ea1a 43 extern "C" {
NYX 0:85b3fd62ea1a 44 #endif
NYX 0:85b3fd62ea1a 45
NYX 0:85b3fd62ea1a 46 /* Includes ------------------------------------------------------------------*/
NYX 0:85b3fd62ea1a 47 #include "stm32f4xx_hal_def.h"
NYX 0:85b3fd62ea1a 48
NYX 0:85b3fd62ea1a 49 /** @addtogroup STM32F4xx_HAL_Driver
NYX 0:85b3fd62ea1a 50 * @{
NYX 0:85b3fd62ea1a 51 */
NYX 0:85b3fd62ea1a 52
NYX 0:85b3fd62ea1a 53 /** @addtogroup I2S I2S
NYX 0:85b3fd62ea1a 54 * @{
NYX 0:85b3fd62ea1a 55 */
NYX 0:85b3fd62ea1a 56
NYX 0:85b3fd62ea1a 57 /* Exported types ------------------------------------------------------------*/
NYX 0:85b3fd62ea1a 58 /** @defgroup I2S_Exported_Types I2S Exported Types
NYX 0:85b3fd62ea1a 59 * @{
NYX 0:85b3fd62ea1a 60 */
NYX 0:85b3fd62ea1a 61
NYX 0:85b3fd62ea1a 62 /**
NYX 0:85b3fd62ea1a 63 * @brief I2S Init structure definition
NYX 0:85b3fd62ea1a 64 */
NYX 0:85b3fd62ea1a 65 typedef struct
NYX 0:85b3fd62ea1a 66 {
NYX 0:85b3fd62ea1a 67 uint32_t Mode; /*!< Specifies the I2S operating mode.
NYX 0:85b3fd62ea1a 68 This parameter can be a value of @ref I2S_Mode */
NYX 0:85b3fd62ea1a 69
NYX 0:85b3fd62ea1a 70 uint32_t Standard; /*!< Specifies the standard used for the I2S communication.
NYX 0:85b3fd62ea1a 71 This parameter can be a value of @ref I2S_Standard */
NYX 0:85b3fd62ea1a 72
NYX 0:85b3fd62ea1a 73 uint32_t DataFormat; /*!< Specifies the data format for the I2S communication.
NYX 0:85b3fd62ea1a 74 This parameter can be a value of @ref I2S_Data_Format */
NYX 0:85b3fd62ea1a 75
NYX 0:85b3fd62ea1a 76 uint32_t MCLKOutput; /*!< Specifies whether the I2S MCLK output is enabled or not.
NYX 0:85b3fd62ea1a 77 This parameter can be a value of @ref I2S_MCLK_Output */
NYX 0:85b3fd62ea1a 78
NYX 0:85b3fd62ea1a 79 uint32_t AudioFreq; /*!< Specifies the frequency selected for the I2S communication.
NYX 0:85b3fd62ea1a 80 This parameter can be a value of @ref I2S_Audio_Frequency */
NYX 0:85b3fd62ea1a 81
NYX 0:85b3fd62ea1a 82 uint32_t CPOL; /*!< Specifies the idle state of the I2S clock.
NYX 0:85b3fd62ea1a 83 This parameter can be a value of @ref I2S_Clock_Polarity */
NYX 0:85b3fd62ea1a 84
NYX 0:85b3fd62ea1a 85 uint32_t ClockSource; /*!< Specifies the I2S Clock Source.
NYX 0:85b3fd62ea1a 86 This parameter can be a value of @ref I2S_Clock_Source */
NYX 0:85b3fd62ea1a 87
NYX 0:85b3fd62ea1a 88 uint32_t FullDuplexMode; /*!< Specifies the I2S FullDuplex mode.
NYX 0:85b3fd62ea1a 89 This parameter can be a value of @ref I2S_FullDuplex_Mode */
NYX 0:85b3fd62ea1a 90
NYX 0:85b3fd62ea1a 91 }I2S_InitTypeDef;
NYX 0:85b3fd62ea1a 92
NYX 0:85b3fd62ea1a 93 /**
NYX 0:85b3fd62ea1a 94 * @brief HAL State structures definition
NYX 0:85b3fd62ea1a 95 */
NYX 0:85b3fd62ea1a 96 typedef enum
NYX 0:85b3fd62ea1a 97 {
NYX 0:85b3fd62ea1a 98 HAL_I2S_STATE_RESET = 0x00U, /*!< I2S not yet initialized or disabled */
NYX 0:85b3fd62ea1a 99 HAL_I2S_STATE_READY = 0x01U, /*!< I2S initialized and ready for use */
NYX 0:85b3fd62ea1a 100 HAL_I2S_STATE_BUSY = 0x02U, /*!< I2S internal process is ongoing */
NYX 0:85b3fd62ea1a 101 HAL_I2S_STATE_BUSY_TX = 0x03U, /*!< Data Transmission process is ongoing */
NYX 0:85b3fd62ea1a 102 HAL_I2S_STATE_BUSY_RX = 0x04U, /*!< Data Reception process is ongoing */
NYX 0:85b3fd62ea1a 103 HAL_I2S_STATE_BUSY_TX_RX = 0x05U, /*!< Data Transmission and Reception process is ongoing */
NYX 0:85b3fd62ea1a 104 HAL_I2S_STATE_TIMEOUT = 0x06U, /*!< I2S timeout state */
NYX 0:85b3fd62ea1a 105 HAL_I2S_STATE_ERROR = 0x07U /*!< I2S error state */
NYX 0:85b3fd62ea1a 106
NYX 0:85b3fd62ea1a 107 }HAL_I2S_StateTypeDef;
NYX 0:85b3fd62ea1a 108
NYX 0:85b3fd62ea1a 109 /**
NYX 0:85b3fd62ea1a 110 * @brief I2S handle Structure definition
NYX 0:85b3fd62ea1a 111 */
NYX 0:85b3fd62ea1a 112 typedef struct __I2S_HandleTypeDef
NYX 0:85b3fd62ea1a 113 {
NYX 0:85b3fd62ea1a 114 SPI_TypeDef *Instance; /*!< I2S registers base address */
NYX 0:85b3fd62ea1a 115
NYX 0:85b3fd62ea1a 116 I2S_InitTypeDef Init; /*!< I2S communication parameters */
NYX 0:85b3fd62ea1a 117
NYX 0:85b3fd62ea1a 118 uint16_t *pTxBuffPtr; /*!< Pointer to I2S Tx transfer buffer */
NYX 0:85b3fd62ea1a 119
NYX 0:85b3fd62ea1a 120 __IO uint16_t TxXferSize; /*!< I2S Tx transfer size */
NYX 0:85b3fd62ea1a 121
NYX 0:85b3fd62ea1a 122 __IO uint16_t TxXferCount; /*!< I2S Tx transfer Counter */
NYX 0:85b3fd62ea1a 123
NYX 0:85b3fd62ea1a 124 uint16_t *pRxBuffPtr; /*!< Pointer to I2S Rx transfer buffer */
NYX 0:85b3fd62ea1a 125
NYX 0:85b3fd62ea1a 126 __IO uint16_t RxXferSize; /*!< I2S Rx transfer size */
NYX 0:85b3fd62ea1a 127
NYX 0:85b3fd62ea1a 128 __IO uint16_t RxXferCount; /*!< I2S Rx transfer counter
NYX 0:85b3fd62ea1a 129 (This field is initialized at the
NYX 0:85b3fd62ea1a 130 same value as transfer size at the
NYX 0:85b3fd62ea1a 131 beginning of the transfer and
NYX 0:85b3fd62ea1a 132 decremented when a sample is received
NYX 0:85b3fd62ea1a 133 NbSamplesReceived = RxBufferSize-RxBufferCount) */
NYX 0:85b3fd62ea1a 134
NYX 0:85b3fd62ea1a 135 void (*IrqHandlerISR) (struct __I2S_HandleTypeDef *hi2s); /*!< I2S function pointer on IrqHandler */
NYX 0:85b3fd62ea1a 136
NYX 0:85b3fd62ea1a 137 DMA_HandleTypeDef *hdmatx; /*!< I2S Tx DMA handle parameters */
NYX 0:85b3fd62ea1a 138
NYX 0:85b3fd62ea1a 139 DMA_HandleTypeDef *hdmarx; /*!< I2S Rx DMA handle parameters */
NYX 0:85b3fd62ea1a 140
NYX 0:85b3fd62ea1a 141 __IO HAL_LockTypeDef Lock; /*!< I2S locking object */
NYX 0:85b3fd62ea1a 142
NYX 0:85b3fd62ea1a 143 __IO HAL_I2S_StateTypeDef State; /*!< I2S communication state */
NYX 0:85b3fd62ea1a 144
NYX 0:85b3fd62ea1a 145 __IO uint32_t ErrorCode; /*!< I2S Error code
NYX 0:85b3fd62ea1a 146 This parameter can be a value of @ref I2S_ErrorCode */
NYX 0:85b3fd62ea1a 147
NYX 0:85b3fd62ea1a 148 }I2S_HandleTypeDef;
NYX 0:85b3fd62ea1a 149 /**
NYX 0:85b3fd62ea1a 150 * @}
NYX 0:85b3fd62ea1a 151 */
NYX 0:85b3fd62ea1a 152
NYX 0:85b3fd62ea1a 153 /* Exported constants --------------------------------------------------------*/
NYX 0:85b3fd62ea1a 154 /** @defgroup I2S_Exported_Constants I2S Exported Constants
NYX 0:85b3fd62ea1a 155 * @{
NYX 0:85b3fd62ea1a 156 */
NYX 0:85b3fd62ea1a 157 /**
NYX 0:85b3fd62ea1a 158 * @defgroup I2S_ErrorCode I2S Error Code
NYX 0:85b3fd62ea1a 159 * @{
NYX 0:85b3fd62ea1a 160 */
NYX 0:85b3fd62ea1a 161 #define HAL_I2S_ERROR_NONE (0x00000000U) /*!< No error */
NYX 0:85b3fd62ea1a 162 #define HAL_I2S_ERROR_TIMEOUT (0x00000001U) /*!< Timeout error */
NYX 0:85b3fd62ea1a 163 #define HAL_I2S_ERROR_OVR (0x00000002U) /*!< OVR error */
NYX 0:85b3fd62ea1a 164 #define HAL_I2S_ERROR_UDR (0x00000004U) /*!< UDR error */
NYX 0:85b3fd62ea1a 165 #define HAL_I2S_ERROR_DMA (0x00000008U) /*!< DMA transfer error */
NYX 0:85b3fd62ea1a 166 #define HAL_I2S_ERROR_PRESCALER (0x00000010U) /*!< Prescaler Calculation error */
NYX 0:85b3fd62ea1a 167 /**
NYX 0:85b3fd62ea1a 168 * @}
NYX 0:85b3fd62ea1a 169 */
NYX 0:85b3fd62ea1a 170
NYX 0:85b3fd62ea1a 171 /** @defgroup I2S_Mode I2S Mode
NYX 0:85b3fd62ea1a 172 * @{
NYX 0:85b3fd62ea1a 173 */
NYX 0:85b3fd62ea1a 174 #define I2S_MODE_SLAVE_TX (0x00000000U)
NYX 0:85b3fd62ea1a 175 #define I2S_MODE_SLAVE_RX (0x00000100U)
NYX 0:85b3fd62ea1a 176 #define I2S_MODE_MASTER_TX (0x00000200U)
NYX 0:85b3fd62ea1a 177 #define I2S_MODE_MASTER_RX (0x00000300U)
NYX 0:85b3fd62ea1a 178 /**
NYX 0:85b3fd62ea1a 179 * @}
NYX 0:85b3fd62ea1a 180 */
NYX 0:85b3fd62ea1a 181
NYX 0:85b3fd62ea1a 182 /** @defgroup I2S_Standard I2S Standard
NYX 0:85b3fd62ea1a 183 * @{
NYX 0:85b3fd62ea1a 184 */
NYX 0:85b3fd62ea1a 185 #define I2S_STANDARD_PHILIPS (0x00000000U)
NYX 0:85b3fd62ea1a 186 #define I2S_STANDARD_MSB (0x00000010U)
NYX 0:85b3fd62ea1a 187 #define I2S_STANDARD_LSB (0x00000020U)
NYX 0:85b3fd62ea1a 188 #define I2S_STANDARD_PCM_SHORT (0x00000030U)
NYX 0:85b3fd62ea1a 189 #define I2S_STANDARD_PCM_LONG (0x000000B0U)
NYX 0:85b3fd62ea1a 190 /**
NYX 0:85b3fd62ea1a 191 * @}
NYX 0:85b3fd62ea1a 192 */
NYX 0:85b3fd62ea1a 193
NYX 0:85b3fd62ea1a 194 /** @defgroup I2S_Data_Format I2S Data Format
NYX 0:85b3fd62ea1a 195 * @{
NYX 0:85b3fd62ea1a 196 */
NYX 0:85b3fd62ea1a 197 #define I2S_DATAFORMAT_16B (0x00000000U)
NYX 0:85b3fd62ea1a 198 #define I2S_DATAFORMAT_16B_EXTENDED (0x00000001U)
NYX 0:85b3fd62ea1a 199 #define I2S_DATAFORMAT_24B (0x00000003U)
NYX 0:85b3fd62ea1a 200 #define I2S_DATAFORMAT_32B (0x00000005U)
NYX 0:85b3fd62ea1a 201 /**
NYX 0:85b3fd62ea1a 202 * @}
NYX 0:85b3fd62ea1a 203 */
NYX 0:85b3fd62ea1a 204
NYX 0:85b3fd62ea1a 205 /** @defgroup I2S_MCLK_Output I2S Mclk Output
NYX 0:85b3fd62ea1a 206 * @{
NYX 0:85b3fd62ea1a 207 */
NYX 0:85b3fd62ea1a 208 #define I2S_MCLKOUTPUT_ENABLE SPI_I2SPR_MCKOE
NYX 0:85b3fd62ea1a 209 #define I2S_MCLKOUTPUT_DISABLE (0x00000000U)
NYX 0:85b3fd62ea1a 210 /**
NYX 0:85b3fd62ea1a 211 * @}
NYX 0:85b3fd62ea1a 212 */
NYX 0:85b3fd62ea1a 213
NYX 0:85b3fd62ea1a 214 /** @defgroup I2S_Audio_Frequency I2S Audio Frequency
NYX 0:85b3fd62ea1a 215 * @{
NYX 0:85b3fd62ea1a 216 */
NYX 0:85b3fd62ea1a 217 #define I2S_AUDIOFREQ_192K (192000U)
NYX 0:85b3fd62ea1a 218 #define I2S_AUDIOFREQ_96K (96000U)
NYX 0:85b3fd62ea1a 219 #define I2S_AUDIOFREQ_48K (48000U)
NYX 0:85b3fd62ea1a 220 #define I2S_AUDIOFREQ_44K (44100U)
NYX 0:85b3fd62ea1a 221 #define I2S_AUDIOFREQ_32K (32000U)
NYX 0:85b3fd62ea1a 222 #define I2S_AUDIOFREQ_22K (22050U)
NYX 0:85b3fd62ea1a 223 #define I2S_AUDIOFREQ_16K (16000U)
NYX 0:85b3fd62ea1a 224 #define I2S_AUDIOFREQ_11K (11025U)
NYX 0:85b3fd62ea1a 225 #define I2S_AUDIOFREQ_8K (8000U)
NYX 0:85b3fd62ea1a 226 #define I2S_AUDIOFREQ_DEFAULT (2U)
NYX 0:85b3fd62ea1a 227 /**
NYX 0:85b3fd62ea1a 228 * @}
NYX 0:85b3fd62ea1a 229 */
NYX 0:85b3fd62ea1a 230
NYX 0:85b3fd62ea1a 231 /** @defgroup I2S_FullDuplex_Mode I2S FullDuplex Mode
NYX 0:85b3fd62ea1a 232 * @{
NYX 0:85b3fd62ea1a 233 */
NYX 0:85b3fd62ea1a 234 #define I2S_FULLDUPLEXMODE_DISABLE (0x00000000U)
NYX 0:85b3fd62ea1a 235 #define I2S_FULLDUPLEXMODE_ENABLE (0x00000001U)
NYX 0:85b3fd62ea1a 236 /**
NYX 0:85b3fd62ea1a 237 * @}
NYX 0:85b3fd62ea1a 238 */
NYX 0:85b3fd62ea1a 239
NYX 0:85b3fd62ea1a 240 /** @defgroup I2S_Clock_Polarity I2S Clock Polarity
NYX 0:85b3fd62ea1a 241 * @{
NYX 0:85b3fd62ea1a 242 */
NYX 0:85b3fd62ea1a 243 #define I2S_CPOL_LOW (0x00000000U)
NYX 0:85b3fd62ea1a 244 #define I2S_CPOL_HIGH (SPI_I2SCFGR_CKPOL)
NYX 0:85b3fd62ea1a 245 /**
NYX 0:85b3fd62ea1a 246 * @}
NYX 0:85b3fd62ea1a 247 */
NYX 0:85b3fd62ea1a 248
NYX 0:85b3fd62ea1a 249 /** @defgroup I2S_Interrupts_Definition I2S Interrupts Definition
NYX 0:85b3fd62ea1a 250 * @{
NYX 0:85b3fd62ea1a 251 */
NYX 0:85b3fd62ea1a 252 #define I2S_IT_TXE SPI_CR2_TXEIE
NYX 0:85b3fd62ea1a 253 #define I2S_IT_RXNE SPI_CR2_RXNEIE
NYX 0:85b3fd62ea1a 254 #define I2S_IT_ERR SPI_CR2_ERRIE
NYX 0:85b3fd62ea1a 255 /**
NYX 0:85b3fd62ea1a 256 * @}
NYX 0:85b3fd62ea1a 257 */
NYX 0:85b3fd62ea1a 258
NYX 0:85b3fd62ea1a 259 /** @defgroup I2S_Flags_Definition I2S Flags Definition
NYX 0:85b3fd62ea1a 260 * @{
NYX 0:85b3fd62ea1a 261 */
NYX 0:85b3fd62ea1a 262 #define I2S_FLAG_TXE SPI_SR_TXE
NYX 0:85b3fd62ea1a 263 #define I2S_FLAG_RXNE SPI_SR_RXNE
NYX 0:85b3fd62ea1a 264
NYX 0:85b3fd62ea1a 265 #define I2S_FLAG_UDR SPI_SR_UDR
NYX 0:85b3fd62ea1a 266 #define I2S_FLAG_OVR SPI_SR_OVR
NYX 0:85b3fd62ea1a 267 #define I2S_FLAG_FRE SPI_SR_FRE
NYX 0:85b3fd62ea1a 268
NYX 0:85b3fd62ea1a 269 #define I2S_FLAG_CHSIDE SPI_SR_CHSIDE
NYX 0:85b3fd62ea1a 270 #define I2S_FLAG_BSY SPI_SR_BSY
NYX 0:85b3fd62ea1a 271 /**
NYX 0:85b3fd62ea1a 272 * @}
NYX 0:85b3fd62ea1a 273 */
NYX 0:85b3fd62ea1a 274 /** @defgroup I2S_Clock_Source I2S Clock Source Definition
NYX 0:85b3fd62ea1a 275 * @{
NYX 0:85b3fd62ea1a 276 */
NYX 0:85b3fd62ea1a 277 #if defined(STM32F405xx) || defined(STM32F415xx) || defined(STM32F407xx) || defined(STM32F417xx) || \
NYX 0:85b3fd62ea1a 278 defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx) || \
NYX 0:85b3fd62ea1a 279 defined(STM32F401xC) || defined(STM32F401xE) || defined(STM32F411xE) || defined(STM32F469xx) || \
NYX 0:85b3fd62ea1a 280 defined(STM32F479xx)
NYX 0:85b3fd62ea1a 281 #define I2S_CLOCK_PLL (0x00000000U)
NYX 0:85b3fd62ea1a 282 #define I2S_CLOCK_EXTERNAL (0x00000001U)
NYX 0:85b3fd62ea1a 283 #endif /* STM32F405xx || STM32F415xx || STM32F407xx || STM32F417xx || STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx ||
NYX 0:85b3fd62ea1a 284 STM32F401xC || STM32F401xE || STM32F411xE || STM32F469xx || STM32F479xx */
NYX 0:85b3fd62ea1a 285
NYX 0:85b3fd62ea1a 286 #if defined(STM32F446xx) || defined(STM32F412Zx) || defined(STM32F412Vx) || defined(STM32F412Rx) || defined(STM32F412Cx) ||\
NYX 0:85b3fd62ea1a 287 defined(STM32F413xx) || defined(STM32F423xx)
NYX 0:85b3fd62ea1a 288 #define I2S_CLOCK_PLL (0x00000000U)
NYX 0:85b3fd62ea1a 289 #define I2S_CLOCK_EXTERNAL (0x00000001U)
NYX 0:85b3fd62ea1a 290 #define I2S_CLOCK_PLLR (0x00000002U)
NYX 0:85b3fd62ea1a 291 #define I2S_CLOCK_PLLSRC (0x00000003U)
NYX 0:85b3fd62ea1a 292 #endif /* STM32F446xx || STM32F412Zx || STM32F412Vx || STM32F412Rx || STM32F412Cx || STM32F413xx || STM32F423xx */
NYX 0:85b3fd62ea1a 293
NYX 0:85b3fd62ea1a 294 #if defined(STM32F410Tx) || defined(STM32F410Cx) || defined(STM32F410Rx)
NYX 0:85b3fd62ea1a 295 #define I2S_CLOCK_PLLSRC (0x00000000U)
NYX 0:85b3fd62ea1a 296 #define I2S_CLOCK_EXTERNAL (0x00000001U)
NYX 0:85b3fd62ea1a 297 #define I2S_CLOCK_PLLR (0x00000002U)
NYX 0:85b3fd62ea1a 298 #endif /* STM32F410Tx || STM32F410Cx || STM32F410Rx */
NYX 0:85b3fd62ea1a 299 /**
NYX 0:85b3fd62ea1a 300 * @}
NYX 0:85b3fd62ea1a 301 */
NYX 0:85b3fd62ea1a 302
NYX 0:85b3fd62ea1a 303 /**
NYX 0:85b3fd62ea1a 304 * @}
NYX 0:85b3fd62ea1a 305 */
NYX 0:85b3fd62ea1a 306
NYX 0:85b3fd62ea1a 307 /* Exported macro ------------------------------------------------------------*/
NYX 0:85b3fd62ea1a 308 /** @defgroup I2S_Exported_Macros I2S Exported Macros
NYX 0:85b3fd62ea1a 309 * @{
NYX 0:85b3fd62ea1a 310 */
NYX 0:85b3fd62ea1a 311
NYX 0:85b3fd62ea1a 312 /** @brief Reset I2S handle state
NYX 0:85b3fd62ea1a 313 * @param __HANDLE__: specifies the I2S Handle.
NYX 0:85b3fd62ea1a 314 * @retval None
NYX 0:85b3fd62ea1a 315 */
NYX 0:85b3fd62ea1a 316 #define __HAL_I2S_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_I2S_STATE_RESET)
NYX 0:85b3fd62ea1a 317
NYX 0:85b3fd62ea1a 318 /** @brief Enable or disable the specified SPI peripheral (in I2S mode).
NYX 0:85b3fd62ea1a 319 * @param __HANDLE__: specifies the I2S Handle.
NYX 0:85b3fd62ea1a 320 * @retval None
NYX 0:85b3fd62ea1a 321 */
NYX 0:85b3fd62ea1a 322 #define __HAL_I2S_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->I2SCFGR |= SPI_I2SCFGR_I2SE)
NYX 0:85b3fd62ea1a 323 #define __HAL_I2S_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->I2SCFGR &=(uint16_t)(~SPI_I2SCFGR_I2SE))
NYX 0:85b3fd62ea1a 324
NYX 0:85b3fd62ea1a 325 /** @brief Enable or disable the specified I2S interrupts.
NYX 0:85b3fd62ea1a 326 * @param __HANDLE__: specifies the I2S Handle.
NYX 0:85b3fd62ea1a 327 * @param __INTERRUPT__: specifies the interrupt source to enable or disable.
NYX 0:85b3fd62ea1a 328 * This parameter can be one of the following values:
NYX 0:85b3fd62ea1a 329 * @arg I2S_IT_TXE: Tx buffer empty interrupt enable
NYX 0:85b3fd62ea1a 330 * @arg I2S_IT_RXNE: RX buffer not empty interrupt enable
NYX 0:85b3fd62ea1a 331 * @arg I2S_IT_ERR: Error interrupt enable
NYX 0:85b3fd62ea1a 332 * @retval None
NYX 0:85b3fd62ea1a 333 */
NYX 0:85b3fd62ea1a 334 #define __HAL_I2S_ENABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->CR2 |= (__INTERRUPT__))
NYX 0:85b3fd62ea1a 335 #define __HAL_I2S_DISABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->CR2 &=(uint16_t)(~(__INTERRUPT__)))
NYX 0:85b3fd62ea1a 336
NYX 0:85b3fd62ea1a 337 /** @brief Checks if the specified I2S interrupt source is enabled or disabled.
NYX 0:85b3fd62ea1a 338 * @param __HANDLE__: specifies the I2S Handle.
NYX 0:85b3fd62ea1a 339 * This parameter can be I2S where x: 1, 2, or 3 to select the I2S peripheral.
NYX 0:85b3fd62ea1a 340 * @param __INTERRUPT__: specifies the I2S interrupt source to check.
NYX 0:85b3fd62ea1a 341 * This parameter can be one of the following values:
NYX 0:85b3fd62ea1a 342 * @arg I2S_IT_TXE: Tx buffer empty interrupt enable
NYX 0:85b3fd62ea1a 343 * @arg I2S_IT_RXNE: RX buffer not empty interrupt enable
NYX 0:85b3fd62ea1a 344 * @arg I2S_IT_ERR: Error interrupt enable
NYX 0:85b3fd62ea1a 345 * @retval The new state of __IT__ (TRUE or FALSE).
NYX 0:85b3fd62ea1a 346 */
NYX 0:85b3fd62ea1a 347 #define __HAL_I2S_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) ((((__HANDLE__)->Instance->CR2 & (__INTERRUPT__)) == (__INTERRUPT__)) ? SET : RESET)
NYX 0:85b3fd62ea1a 348
NYX 0:85b3fd62ea1a 349 /** @brief Checks whether the specified I2S flag is set or not.
NYX 0:85b3fd62ea1a 350 * @param __HANDLE__: specifies the I2S Handle.
NYX 0:85b3fd62ea1a 351 * @param __FLAG__: specifies the flag to check.
NYX 0:85b3fd62ea1a 352 * This parameter can be one of the following values:
NYX 0:85b3fd62ea1a 353 * @arg I2S_FLAG_RXNE: Receive buffer not empty flag
NYX 0:85b3fd62ea1a 354 * @arg I2S_FLAG_TXE: Transmit buffer empty flag
NYX 0:85b3fd62ea1a 355 * @arg I2S_FLAG_UDR: Underrun flag
NYX 0:85b3fd62ea1a 356 * @arg I2S_FLAG_OVR: Overrun flag
NYX 0:85b3fd62ea1a 357 * @arg I2S_FLAG_FRE: Frame error flag
NYX 0:85b3fd62ea1a 358 * @arg I2S_FLAG_CHSIDE: Channel Side flag
NYX 0:85b3fd62ea1a 359 * @arg I2S_FLAG_BSY: Busy flag
NYX 0:85b3fd62ea1a 360 * @retval The new state of __FLAG__ (TRUE or FALSE).
NYX 0:85b3fd62ea1a 361 */
NYX 0:85b3fd62ea1a 362 #define __HAL_I2S_GET_FLAG(__HANDLE__, __FLAG__) ((((__HANDLE__)->Instance->SR) & (__FLAG__)) == (__FLAG__))
NYX 0:85b3fd62ea1a 363
NYX 0:85b3fd62ea1a 364 /** @brief Clears the I2S OVR pending flag.
NYX 0:85b3fd62ea1a 365 * @param __HANDLE__: specifies the I2S Handle.
NYX 0:85b3fd62ea1a 366 * @retval None
NYX 0:85b3fd62ea1a 367 */
NYX 0:85b3fd62ea1a 368 #define __HAL_I2S_CLEAR_OVRFLAG(__HANDLE__) \
NYX 0:85b3fd62ea1a 369 do{ \
NYX 0:85b3fd62ea1a 370 __IO uint32_t tmpreg = 0x00U; \
NYX 0:85b3fd62ea1a 371 tmpreg = (__HANDLE__)->Instance->DR; \
NYX 0:85b3fd62ea1a 372 tmpreg = (__HANDLE__)->Instance->SR; \
NYX 0:85b3fd62ea1a 373 UNUSED(tmpreg); \
NYX 0:85b3fd62ea1a 374 } while(0)
NYX 0:85b3fd62ea1a 375
NYX 0:85b3fd62ea1a 376 /** @brief Clears the I2S UDR pending flag.
NYX 0:85b3fd62ea1a 377 * @param __HANDLE__: specifies the I2S Handle.
NYX 0:85b3fd62ea1a 378 * @retval None
NYX 0:85b3fd62ea1a 379 */
NYX 0:85b3fd62ea1a 380 #define __HAL_I2S_CLEAR_UDRFLAG(__HANDLE__) \
NYX 0:85b3fd62ea1a 381 do{ \
NYX 0:85b3fd62ea1a 382 __IO uint32_t tmpreg = 0x00U; \
NYX 0:85b3fd62ea1a 383 tmpreg = (__HANDLE__)->Instance->SR; \
NYX 0:85b3fd62ea1a 384 UNUSED(tmpreg); \
NYX 0:85b3fd62ea1a 385 } while(0)
NYX 0:85b3fd62ea1a 386 /**
NYX 0:85b3fd62ea1a 387 * @}
NYX 0:85b3fd62ea1a 388 */
NYX 0:85b3fd62ea1a 389
NYX 0:85b3fd62ea1a 390 /* Include I2S Extension module */
NYX 0:85b3fd62ea1a 391 #include "stm32f4xx_hal_i2s_ex.h"
NYX 0:85b3fd62ea1a 392
NYX 0:85b3fd62ea1a 393 /* Exported functions --------------------------------------------------------*/
NYX 0:85b3fd62ea1a 394 /** @defgroup I2S_Exported_Functions I2S Exported Functions
NYX 0:85b3fd62ea1a 395 * @{
NYX 0:85b3fd62ea1a 396 */
NYX 0:85b3fd62ea1a 397
NYX 0:85b3fd62ea1a 398 /** @defgroup I2S_Exported_Functions_Group1 I2S Initialization and de-initialization functions
NYX 0:85b3fd62ea1a 399 * @{
NYX 0:85b3fd62ea1a 400 */
NYX 0:85b3fd62ea1a 401 /* Initialization/de-initialization functions **********************************/
NYX 0:85b3fd62ea1a 402 HAL_StatusTypeDef HAL_I2S_Init(I2S_HandleTypeDef *hi2s);
NYX 0:85b3fd62ea1a 403 HAL_StatusTypeDef HAL_I2S_DeInit (I2S_HandleTypeDef *hi2s);
NYX 0:85b3fd62ea1a 404 void HAL_I2S_MspInit(I2S_HandleTypeDef *hi2s);
NYX 0:85b3fd62ea1a 405 void HAL_I2S_MspDeInit(I2S_HandleTypeDef *hi2s);
NYX 0:85b3fd62ea1a 406 /**
NYX 0:85b3fd62ea1a 407 * @}
NYX 0:85b3fd62ea1a 408 */
NYX 0:85b3fd62ea1a 409
NYX 0:85b3fd62ea1a 410 /** @defgroup I2S_Exported_Functions_Group2 I2S IO operation functions
NYX 0:85b3fd62ea1a 411 * @{
NYX 0:85b3fd62ea1a 412 */
NYX 0:85b3fd62ea1a 413 /* I/O operation functions *****************************************************/
NYX 0:85b3fd62ea1a 414 /* Blocking mode: Polling */
NYX 0:85b3fd62ea1a 415 HAL_StatusTypeDef HAL_I2S_Transmit(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size, uint32_t Timeout);
NYX 0:85b3fd62ea1a 416 HAL_StatusTypeDef HAL_I2S_Receive(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size, uint32_t Timeout);
NYX 0:85b3fd62ea1a 417
NYX 0:85b3fd62ea1a 418 /* Non-Blocking mode: Interrupt */
NYX 0:85b3fd62ea1a 419 HAL_StatusTypeDef HAL_I2S_Transmit_IT(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size);
NYX 0:85b3fd62ea1a 420 HAL_StatusTypeDef HAL_I2S_Receive_IT(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size);
NYX 0:85b3fd62ea1a 421 void HAL_I2S_IRQHandler(I2S_HandleTypeDef *hi2s);
NYX 0:85b3fd62ea1a 422
NYX 0:85b3fd62ea1a 423 /* Non-Blocking mode: DMA */
NYX 0:85b3fd62ea1a 424 HAL_StatusTypeDef HAL_I2S_Transmit_DMA(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size);
NYX 0:85b3fd62ea1a 425 HAL_StatusTypeDef HAL_I2S_Receive_DMA(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size);
NYX 0:85b3fd62ea1a 426
NYX 0:85b3fd62ea1a 427 HAL_StatusTypeDef HAL_I2S_DMAPause(I2S_HandleTypeDef *hi2s);
NYX 0:85b3fd62ea1a 428 HAL_StatusTypeDef HAL_I2S_DMAResume(I2S_HandleTypeDef *hi2s);
NYX 0:85b3fd62ea1a 429 HAL_StatusTypeDef HAL_I2S_DMAStop(I2S_HandleTypeDef *hi2s);
NYX 0:85b3fd62ea1a 430
NYX 0:85b3fd62ea1a 431 /* Callbacks used in non blocking modes (Interrupt and DMA) *******************/
NYX 0:85b3fd62ea1a 432 void HAL_I2S_TxHalfCpltCallback(I2S_HandleTypeDef *hi2s);
NYX 0:85b3fd62ea1a 433 void HAL_I2S_TxCpltCallback(I2S_HandleTypeDef *hi2s);
NYX 0:85b3fd62ea1a 434 void HAL_I2S_RxHalfCpltCallback(I2S_HandleTypeDef *hi2s);
NYX 0:85b3fd62ea1a 435 void HAL_I2S_RxCpltCallback(I2S_HandleTypeDef *hi2s);
NYX 0:85b3fd62ea1a 436 void HAL_I2S_ErrorCallback(I2S_HandleTypeDef *hi2s);
NYX 0:85b3fd62ea1a 437 /**
NYX 0:85b3fd62ea1a 438 * @}
NYX 0:85b3fd62ea1a 439 */
NYX 0:85b3fd62ea1a 440
NYX 0:85b3fd62ea1a 441 /** @defgroup I2S_Exported_Functions_Group3 I2S Peripheral Control and State functions
NYX 0:85b3fd62ea1a 442 * @{
NYX 0:85b3fd62ea1a 443 */
NYX 0:85b3fd62ea1a 444 /* Peripheral Control and State functions ************************************/
NYX 0:85b3fd62ea1a 445 HAL_I2S_StateTypeDef HAL_I2S_GetState(I2S_HandleTypeDef *hi2s);
NYX 0:85b3fd62ea1a 446 uint32_t HAL_I2S_GetError(I2S_HandleTypeDef *hi2s);
NYX 0:85b3fd62ea1a 447 /**
NYX 0:85b3fd62ea1a 448 * @}
NYX 0:85b3fd62ea1a 449 */
NYX 0:85b3fd62ea1a 450
NYX 0:85b3fd62ea1a 451 /**
NYX 0:85b3fd62ea1a 452 * @}
NYX 0:85b3fd62ea1a 453 */
NYX 0:85b3fd62ea1a 454
NYX 0:85b3fd62ea1a 455 /* Private types -------------------------------------------------------------*/
NYX 0:85b3fd62ea1a 456 /* Private variables ---------------------------------------------------------*/
NYX 0:85b3fd62ea1a 457 /* Private constants ---------------------------------------------------------*/
NYX 0:85b3fd62ea1a 458 /** @defgroup I2S_Private_Constants I2S Private Constants
NYX 0:85b3fd62ea1a 459 * @{
NYX 0:85b3fd62ea1a 460 */
NYX 0:85b3fd62ea1a 461
NYX 0:85b3fd62ea1a 462 /**
NYX 0:85b3fd62ea1a 463 * @}
NYX 0:85b3fd62ea1a 464 */
NYX 0:85b3fd62ea1a 465
NYX 0:85b3fd62ea1a 466 /* Private macros ------------------------------------------------------------*/
NYX 0:85b3fd62ea1a 467 /** @defgroup I2S_Private_Macros I2S Private Macros
NYX 0:85b3fd62ea1a 468 * @{
NYX 0:85b3fd62ea1a 469 */
NYX 0:85b3fd62ea1a 470 #define IS_I2S_MODE(MODE) (((MODE) == I2S_MODE_SLAVE_TX) || \
NYX 0:85b3fd62ea1a 471 ((MODE) == I2S_MODE_SLAVE_RX) || \
NYX 0:85b3fd62ea1a 472 ((MODE) == I2S_MODE_MASTER_TX) || \
NYX 0:85b3fd62ea1a 473 ((MODE) == I2S_MODE_MASTER_RX))
NYX 0:85b3fd62ea1a 474
NYX 0:85b3fd62ea1a 475 #define IS_I2S_STANDARD(STANDARD) (((STANDARD) == I2S_STANDARD_PHILIPS) || \
NYX 0:85b3fd62ea1a 476 ((STANDARD) == I2S_STANDARD_MSB) || \
NYX 0:85b3fd62ea1a 477 ((STANDARD) == I2S_STANDARD_LSB) || \
NYX 0:85b3fd62ea1a 478 ((STANDARD) == I2S_STANDARD_PCM_SHORT) || \
NYX 0:85b3fd62ea1a 479 ((STANDARD) == I2S_STANDARD_PCM_LONG))
NYX 0:85b3fd62ea1a 480
NYX 0:85b3fd62ea1a 481 #define IS_I2S_DATA_FORMAT(FORMAT) (((FORMAT) == I2S_DATAFORMAT_16B) || \
NYX 0:85b3fd62ea1a 482 ((FORMAT) == I2S_DATAFORMAT_16B_EXTENDED) || \
NYX 0:85b3fd62ea1a 483 ((FORMAT) == I2S_DATAFORMAT_24B) || \
NYX 0:85b3fd62ea1a 484 ((FORMAT) == I2S_DATAFORMAT_32B))
NYX 0:85b3fd62ea1a 485
NYX 0:85b3fd62ea1a 486 #define IS_I2S_MCLK_OUTPUT(OUTPUT) (((OUTPUT) == I2S_MCLKOUTPUT_ENABLE) || \
NYX 0:85b3fd62ea1a 487 ((OUTPUT) == I2S_MCLKOUTPUT_DISABLE))
NYX 0:85b3fd62ea1a 488
NYX 0:85b3fd62ea1a 489 #define IS_I2S_AUDIO_FREQ(FREQ) ((((FREQ) >= I2S_AUDIOFREQ_8K) && \
NYX 0:85b3fd62ea1a 490 ((FREQ) <= I2S_AUDIOFREQ_192K)) || \
NYX 0:85b3fd62ea1a 491 ((FREQ) == I2S_AUDIOFREQ_DEFAULT))
NYX 0:85b3fd62ea1a 492
NYX 0:85b3fd62ea1a 493 #define IS_I2S_FULLDUPLEX_MODE(MODE) (((MODE) == I2S_FULLDUPLEXMODE_DISABLE) || \
NYX 0:85b3fd62ea1a 494 ((MODE) == I2S_FULLDUPLEXMODE_ENABLE))
NYX 0:85b3fd62ea1a 495
NYX 0:85b3fd62ea1a 496 #define IS_I2S_CPOL(CPOL) (((CPOL) == I2S_CPOL_LOW) || \
NYX 0:85b3fd62ea1a 497 ((CPOL) == I2S_CPOL_HIGH))
NYX 0:85b3fd62ea1a 498
NYX 0:85b3fd62ea1a 499 #if defined(STM32F405xx) || defined(STM32F415xx) || defined(STM32F407xx) || defined(STM32F417xx) || \
NYX 0:85b3fd62ea1a 500 defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx) || \
NYX 0:85b3fd62ea1a 501 defined(STM32F401xC) || defined(STM32F401xE) || defined(STM32F411xE) || defined(STM32F469xx) || \
NYX 0:85b3fd62ea1a 502 defined(STM32F479xx)
NYX 0:85b3fd62ea1a 503 #define IS_I2S_CLOCKSOURCE(CLOCK) (((CLOCK) == I2S_CLOCK_EXTERNAL) ||\
NYX 0:85b3fd62ea1a 504 ((CLOCK) == I2S_CLOCK_PLL))
NYX 0:85b3fd62ea1a 505 #endif /* STM32F405xx || STM32F415xx || STM32F407xx || STM32F417xx || STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx ||
NYX 0:85b3fd62ea1a 506 STM32F401xC || STM32F401xE || STM32F411xE || STM32F469xx || STM32F479xx */
NYX 0:85b3fd62ea1a 507
NYX 0:85b3fd62ea1a 508 #if defined(STM32F446xx) || defined(STM32F412Zx) || defined(STM32F412Vx) ||\
NYX 0:85b3fd62ea1a 509 defined(STM32F412Rx) || defined(STM32F412Cx) || defined (STM32F413xx) ||\
NYX 0:85b3fd62ea1a 510 defined(STM32F423xx)
NYX 0:85b3fd62ea1a 511 #define IS_I2S_CLOCKSOURCE(CLOCK) (((CLOCK) == I2S_CLOCK_EXTERNAL) ||\
NYX 0:85b3fd62ea1a 512 ((CLOCK) == I2S_CLOCK_PLL) ||\
NYX 0:85b3fd62ea1a 513 ((CLOCK) == I2S_CLOCK_PLLSRC) ||\
NYX 0:85b3fd62ea1a 514 ((CLOCK) == I2S_CLOCK_PLLR))
NYX 0:85b3fd62ea1a 515 #endif /* STM32F446xx || STM32F412Zx || STM32F412Vx || STM32F412Rx || STM32F412Cx || STM32F413xx || STM32F423xx */
NYX 0:85b3fd62ea1a 516
NYX 0:85b3fd62ea1a 517 #if defined(STM32F410Tx) || defined(STM32F410Cx) || defined(STM32F410Rx)
NYX 0:85b3fd62ea1a 518 #define IS_I2S_CLOCKSOURCE(CLOCK) (((CLOCK) == I2S_CLOCK_EXTERNAL) ||\
NYX 0:85b3fd62ea1a 519 ((CLOCK) == I2S_CLOCK_PLLSRC) ||\
NYX 0:85b3fd62ea1a 520 ((CLOCK) == I2S_CLOCK_PLLR))
NYX 0:85b3fd62ea1a 521 #endif /* STM32F410Tx || STM32F410Cx || STM32F410Rx */
NYX 0:85b3fd62ea1a 522
NYX 0:85b3fd62ea1a 523 /**
NYX 0:85b3fd62ea1a 524 * @}
NYX 0:85b3fd62ea1a 525 */
NYX 0:85b3fd62ea1a 526
NYX 0:85b3fd62ea1a 527 /* Private functions ---------------------------------------------------------*/
NYX 0:85b3fd62ea1a 528 /**
NYX 0:85b3fd62ea1a 529 * @}
NYX 0:85b3fd62ea1a 530 */
NYX 0:85b3fd62ea1a 531
NYX 0:85b3fd62ea1a 532 /**
NYX 0:85b3fd62ea1a 533 * @}
NYX 0:85b3fd62ea1a 534 */
NYX 0:85b3fd62ea1a 535
NYX 0:85b3fd62ea1a 536 #ifdef __cplusplus
NYX 0:85b3fd62ea1a 537 }
NYX 0:85b3fd62ea1a 538 #endif
NYX 0:85b3fd62ea1a 539
NYX 0:85b3fd62ea1a 540
NYX 0:85b3fd62ea1a 541 #endif /* __STM32F4xx_HAL_I2S_H */
NYX 0:85b3fd62ea1a 542
NYX 0:85b3fd62ea1a 543 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/