inport from local
Dependents: Hobbyking_Cheetah_0511
targets/TARGET_STM/TARGET_STM32F4/device/stm32f4xx_hal_i2c.h@0:85b3fd62ea1a, 2020-03-16 (annotated)
- Committer:
- NYX
- Date:
- Mon Mar 16 06:35:48 2020 +0000
- Revision:
- 0:85b3fd62ea1a
reinport to mbed;
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
NYX | 0:85b3fd62ea1a | 1 | /** |
NYX | 0:85b3fd62ea1a | 2 | ****************************************************************************** |
NYX | 0:85b3fd62ea1a | 3 | * @file stm32f4xx_hal_i2c.h |
NYX | 0:85b3fd62ea1a | 4 | * @author MCD Application Team |
NYX | 0:85b3fd62ea1a | 5 | * @version V1.7.1 |
NYX | 0:85b3fd62ea1a | 6 | * @date 14-April-2017 |
NYX | 0:85b3fd62ea1a | 7 | * @brief Header file of I2C HAL module. |
NYX | 0:85b3fd62ea1a | 8 | ****************************************************************************** |
NYX | 0:85b3fd62ea1a | 9 | * @attention |
NYX | 0:85b3fd62ea1a | 10 | * |
NYX | 0:85b3fd62ea1a | 11 | * <h2><center>© COPYRIGHT(c) 2017 STMicroelectronics</center></h2> |
NYX | 0:85b3fd62ea1a | 12 | * |
NYX | 0:85b3fd62ea1a | 13 | * Redistribution and use in source and binary forms, with or without modification, |
NYX | 0:85b3fd62ea1a | 14 | * are permitted provided that the following conditions are met: |
NYX | 0:85b3fd62ea1a | 15 | * 1. Redistributions of source code must retain the above copyright notice, |
NYX | 0:85b3fd62ea1a | 16 | * this list of conditions and the following disclaimer. |
NYX | 0:85b3fd62ea1a | 17 | * 2. Redistributions in binary form must reproduce the above copyright notice, |
NYX | 0:85b3fd62ea1a | 18 | * this list of conditions and the following disclaimer in the documentation |
NYX | 0:85b3fd62ea1a | 19 | * and/or other materials provided with the distribution. |
NYX | 0:85b3fd62ea1a | 20 | * 3. Neither the name of STMicroelectronics nor the names of its contributors |
NYX | 0:85b3fd62ea1a | 21 | * may be used to endorse or promote products derived from this software |
NYX | 0:85b3fd62ea1a | 22 | * without specific prior written permission. |
NYX | 0:85b3fd62ea1a | 23 | * |
NYX | 0:85b3fd62ea1a | 24 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
NYX | 0:85b3fd62ea1a | 25 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
NYX | 0:85b3fd62ea1a | 26 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
NYX | 0:85b3fd62ea1a | 27 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE |
NYX | 0:85b3fd62ea1a | 28 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
NYX | 0:85b3fd62ea1a | 29 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR |
NYX | 0:85b3fd62ea1a | 30 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
NYX | 0:85b3fd62ea1a | 31 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
NYX | 0:85b3fd62ea1a | 32 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
NYX | 0:85b3fd62ea1a | 33 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
NYX | 0:85b3fd62ea1a | 34 | * |
NYX | 0:85b3fd62ea1a | 35 | ****************************************************************************** |
NYX | 0:85b3fd62ea1a | 36 | */ |
NYX | 0:85b3fd62ea1a | 37 | |
NYX | 0:85b3fd62ea1a | 38 | /* Define to prevent recursive inclusion -------------------------------------*/ |
NYX | 0:85b3fd62ea1a | 39 | #ifndef __STM32F4xx_HAL_I2C_H |
NYX | 0:85b3fd62ea1a | 40 | #define __STM32F4xx_HAL_I2C_H |
NYX | 0:85b3fd62ea1a | 41 | |
NYX | 0:85b3fd62ea1a | 42 | #ifdef __cplusplus |
NYX | 0:85b3fd62ea1a | 43 | extern "C" { |
NYX | 0:85b3fd62ea1a | 44 | #endif |
NYX | 0:85b3fd62ea1a | 45 | |
NYX | 0:85b3fd62ea1a | 46 | /* Includes ------------------------------------------------------------------*/ |
NYX | 0:85b3fd62ea1a | 47 | #include "stm32f4xx_hal_def.h" |
NYX | 0:85b3fd62ea1a | 48 | |
NYX | 0:85b3fd62ea1a | 49 | /** @addtogroup STM32F4xx_HAL_Driver |
NYX | 0:85b3fd62ea1a | 50 | * @{ |
NYX | 0:85b3fd62ea1a | 51 | */ |
NYX | 0:85b3fd62ea1a | 52 | |
NYX | 0:85b3fd62ea1a | 53 | /** @addtogroup I2C |
NYX | 0:85b3fd62ea1a | 54 | * @{ |
NYX | 0:85b3fd62ea1a | 55 | */ |
NYX | 0:85b3fd62ea1a | 56 | |
NYX | 0:85b3fd62ea1a | 57 | /* Exported types ------------------------------------------------------------*/ |
NYX | 0:85b3fd62ea1a | 58 | /** @defgroup I2C_Exported_Types I2C Exported Types |
NYX | 0:85b3fd62ea1a | 59 | * @{ |
NYX | 0:85b3fd62ea1a | 60 | */ |
NYX | 0:85b3fd62ea1a | 61 | |
NYX | 0:85b3fd62ea1a | 62 | /** |
NYX | 0:85b3fd62ea1a | 63 | * @brief I2C Configuration Structure definition |
NYX | 0:85b3fd62ea1a | 64 | */ |
NYX | 0:85b3fd62ea1a | 65 | typedef struct |
NYX | 0:85b3fd62ea1a | 66 | { |
NYX | 0:85b3fd62ea1a | 67 | uint32_t ClockSpeed; /*!< Specifies the clock frequency. |
NYX | 0:85b3fd62ea1a | 68 | This parameter must be set to a value lower than 400kHz */ |
NYX | 0:85b3fd62ea1a | 69 | |
NYX | 0:85b3fd62ea1a | 70 | uint32_t DutyCycle; /*!< Specifies the I2C fast mode duty cycle. |
NYX | 0:85b3fd62ea1a | 71 | This parameter can be a value of @ref I2C_duty_cycle_in_fast_mode */ |
NYX | 0:85b3fd62ea1a | 72 | |
NYX | 0:85b3fd62ea1a | 73 | uint32_t OwnAddress1; /*!< Specifies the first device own address. |
NYX | 0:85b3fd62ea1a | 74 | This parameter can be a 7-bit or 10-bit address. */ |
NYX | 0:85b3fd62ea1a | 75 | |
NYX | 0:85b3fd62ea1a | 76 | uint32_t AddressingMode; /*!< Specifies if 7-bit or 10-bit addressing mode is selected. |
NYX | 0:85b3fd62ea1a | 77 | This parameter can be a value of @ref I2C_addressing_mode */ |
NYX | 0:85b3fd62ea1a | 78 | |
NYX | 0:85b3fd62ea1a | 79 | uint32_t DualAddressMode; /*!< Specifies if dual addressing mode is selected. |
NYX | 0:85b3fd62ea1a | 80 | This parameter can be a value of @ref I2C_dual_addressing_mode */ |
NYX | 0:85b3fd62ea1a | 81 | |
NYX | 0:85b3fd62ea1a | 82 | uint32_t OwnAddress2; /*!< Specifies the second device own address if dual addressing mode is selected |
NYX | 0:85b3fd62ea1a | 83 | This parameter can be a 7-bit address. */ |
NYX | 0:85b3fd62ea1a | 84 | |
NYX | 0:85b3fd62ea1a | 85 | uint32_t GeneralCallMode; /*!< Specifies if general call mode is selected. |
NYX | 0:85b3fd62ea1a | 86 | This parameter can be a value of @ref I2C_general_call_addressing_mode */ |
NYX | 0:85b3fd62ea1a | 87 | |
NYX | 0:85b3fd62ea1a | 88 | uint32_t NoStretchMode; /*!< Specifies if nostretch mode is selected. |
NYX | 0:85b3fd62ea1a | 89 | This parameter can be a value of @ref I2C_nostretch_mode */ |
NYX | 0:85b3fd62ea1a | 90 | |
NYX | 0:85b3fd62ea1a | 91 | }I2C_InitTypeDef; |
NYX | 0:85b3fd62ea1a | 92 | |
NYX | 0:85b3fd62ea1a | 93 | /** |
NYX | 0:85b3fd62ea1a | 94 | * @brief HAL State structure definition |
NYX | 0:85b3fd62ea1a | 95 | * @note HAL I2C State value coding follow below described bitmap : |
NYX | 0:85b3fd62ea1a | 96 | * b7-b6 Error information |
NYX | 0:85b3fd62ea1a | 97 | * 00 : No Error |
NYX | 0:85b3fd62ea1a | 98 | * 01 : Abort (Abort user request on going) |
NYX | 0:85b3fd62ea1a | 99 | * 10 : Timeout |
NYX | 0:85b3fd62ea1a | 100 | * 11 : Error |
NYX | 0:85b3fd62ea1a | 101 | * b5 IP initilisation status |
NYX | 0:85b3fd62ea1a | 102 | * 0 : Reset (IP not initialized) |
NYX | 0:85b3fd62ea1a | 103 | * 1 : Init done (IP initialized and ready to use. HAL I2C Init function called) |
NYX | 0:85b3fd62ea1a | 104 | * b4 (not used) |
NYX | 0:85b3fd62ea1a | 105 | * x : Should be set to 0 |
NYX | 0:85b3fd62ea1a | 106 | * b3 |
NYX | 0:85b3fd62ea1a | 107 | * 0 : Ready or Busy (No Listen mode ongoing) |
NYX | 0:85b3fd62ea1a | 108 | * 1 : Listen (IP in Address Listen Mode) |
NYX | 0:85b3fd62ea1a | 109 | * b2 Intrinsic process state |
NYX | 0:85b3fd62ea1a | 110 | * 0 : Ready |
NYX | 0:85b3fd62ea1a | 111 | * 1 : Busy (IP busy with some configuration or internal operations) |
NYX | 0:85b3fd62ea1a | 112 | * b1 Rx state |
NYX | 0:85b3fd62ea1a | 113 | * 0 : Ready (no Rx operation ongoing) |
NYX | 0:85b3fd62ea1a | 114 | * 1 : Busy (Rx operation ongoing) |
NYX | 0:85b3fd62ea1a | 115 | * b0 Tx state |
NYX | 0:85b3fd62ea1a | 116 | * 0 : Ready (no Tx operation ongoing) |
NYX | 0:85b3fd62ea1a | 117 | * 1 : Busy (Tx operation ongoing) |
NYX | 0:85b3fd62ea1a | 118 | */ |
NYX | 0:85b3fd62ea1a | 119 | typedef enum |
NYX | 0:85b3fd62ea1a | 120 | { |
NYX | 0:85b3fd62ea1a | 121 | HAL_I2C_STATE_RESET = 0x00U, /*!< Peripheral is not yet Initialized */ |
NYX | 0:85b3fd62ea1a | 122 | HAL_I2C_STATE_READY = 0x20U, /*!< Peripheral Initialized and ready for use */ |
NYX | 0:85b3fd62ea1a | 123 | HAL_I2C_STATE_BUSY = 0x24U, /*!< An internal process is ongoing */ |
NYX | 0:85b3fd62ea1a | 124 | HAL_I2C_STATE_BUSY_TX = 0x21U, /*!< Data Transmission process is ongoing */ |
NYX | 0:85b3fd62ea1a | 125 | HAL_I2C_STATE_BUSY_RX = 0x22U, /*!< Data Reception process is ongoing */ |
NYX | 0:85b3fd62ea1a | 126 | HAL_I2C_STATE_LISTEN = 0x28U, /*!< Address Listen Mode is ongoing */ |
NYX | 0:85b3fd62ea1a | 127 | HAL_I2C_STATE_BUSY_TX_LISTEN = 0x29U, /*!< Address Listen Mode and Data Transmission |
NYX | 0:85b3fd62ea1a | 128 | process is ongoing */ |
NYX | 0:85b3fd62ea1a | 129 | HAL_I2C_STATE_BUSY_RX_LISTEN = 0x2AU, /*!< Address Listen Mode and Data Reception |
NYX | 0:85b3fd62ea1a | 130 | process is ongoing */ |
NYX | 0:85b3fd62ea1a | 131 | HAL_I2C_STATE_ABORT = 0x60U, /*!< Abort user request ongoing */ |
NYX | 0:85b3fd62ea1a | 132 | HAL_I2C_STATE_TIMEOUT = 0xA0U, /*!< Timeout state */ |
NYX | 0:85b3fd62ea1a | 133 | HAL_I2C_STATE_ERROR = 0xE0U /*!< Error */ |
NYX | 0:85b3fd62ea1a | 134 | |
NYX | 0:85b3fd62ea1a | 135 | }HAL_I2C_StateTypeDef; |
NYX | 0:85b3fd62ea1a | 136 | |
NYX | 0:85b3fd62ea1a | 137 | /** |
NYX | 0:85b3fd62ea1a | 138 | * @brief HAL Mode structure definition |
NYX | 0:85b3fd62ea1a | 139 | * @note HAL I2C Mode value coding follow below described bitmap : |
NYX | 0:85b3fd62ea1a | 140 | * b7 (not used) |
NYX | 0:85b3fd62ea1a | 141 | * x : Should be set to 0 |
NYX | 0:85b3fd62ea1a | 142 | * b6 |
NYX | 0:85b3fd62ea1a | 143 | * 0 : None |
NYX | 0:85b3fd62ea1a | 144 | * 1 : Memory (HAL I2C communication is in Memory Mode) |
NYX | 0:85b3fd62ea1a | 145 | * b5 |
NYX | 0:85b3fd62ea1a | 146 | * 0 : None |
NYX | 0:85b3fd62ea1a | 147 | * 1 : Slave (HAL I2C communication is in Slave Mode) |
NYX | 0:85b3fd62ea1a | 148 | * b4 |
NYX | 0:85b3fd62ea1a | 149 | * 0 : None |
NYX | 0:85b3fd62ea1a | 150 | * 1 : Master (HAL I2C communication is in Master Mode) |
NYX | 0:85b3fd62ea1a | 151 | * b3-b2-b1-b0 (not used) |
NYX | 0:85b3fd62ea1a | 152 | * xxxx : Should be set to 0000 |
NYX | 0:85b3fd62ea1a | 153 | */ |
NYX | 0:85b3fd62ea1a | 154 | typedef enum |
NYX | 0:85b3fd62ea1a | 155 | { |
NYX | 0:85b3fd62ea1a | 156 | HAL_I2C_MODE_NONE = 0x00U, /*!< No I2C communication on going */ |
NYX | 0:85b3fd62ea1a | 157 | HAL_I2C_MODE_MASTER = 0x10U, /*!< I2C communication is in Master Mode */ |
NYX | 0:85b3fd62ea1a | 158 | HAL_I2C_MODE_SLAVE = 0x20U, /*!< I2C communication is in Slave Mode */ |
NYX | 0:85b3fd62ea1a | 159 | HAL_I2C_MODE_MEM = 0x40U /*!< I2C communication is in Memory Mode */ |
NYX | 0:85b3fd62ea1a | 160 | |
NYX | 0:85b3fd62ea1a | 161 | }HAL_I2C_ModeTypeDef; |
NYX | 0:85b3fd62ea1a | 162 | |
NYX | 0:85b3fd62ea1a | 163 | /** |
NYX | 0:85b3fd62ea1a | 164 | * @brief I2C handle Structure definition |
NYX | 0:85b3fd62ea1a | 165 | */ |
NYX | 0:85b3fd62ea1a | 166 | typedef struct |
NYX | 0:85b3fd62ea1a | 167 | { |
NYX | 0:85b3fd62ea1a | 168 | I2C_TypeDef *Instance; /*!< I2C registers base address */ |
NYX | 0:85b3fd62ea1a | 169 | |
NYX | 0:85b3fd62ea1a | 170 | I2C_InitTypeDef Init; /*!< I2C communication parameters */ |
NYX | 0:85b3fd62ea1a | 171 | |
NYX | 0:85b3fd62ea1a | 172 | uint8_t *pBuffPtr; /*!< Pointer to I2C transfer buffer */ |
NYX | 0:85b3fd62ea1a | 173 | |
NYX | 0:85b3fd62ea1a | 174 | uint16_t XferSize; /*!< I2C transfer size */ |
NYX | 0:85b3fd62ea1a | 175 | |
NYX | 0:85b3fd62ea1a | 176 | __IO uint16_t XferCount; /*!< I2C transfer counter */ |
NYX | 0:85b3fd62ea1a | 177 | |
NYX | 0:85b3fd62ea1a | 178 | __IO uint32_t XferOptions; /*!< I2C transfer options */ |
NYX | 0:85b3fd62ea1a | 179 | |
NYX | 0:85b3fd62ea1a | 180 | __IO uint32_t PreviousState; /*!< I2C communication Previous state and mode |
NYX | 0:85b3fd62ea1a | 181 | context for internal usage */ |
NYX | 0:85b3fd62ea1a | 182 | |
NYX | 0:85b3fd62ea1a | 183 | DMA_HandleTypeDef *hdmatx; /*!< I2C Tx DMA handle parameters */ |
NYX | 0:85b3fd62ea1a | 184 | |
NYX | 0:85b3fd62ea1a | 185 | DMA_HandleTypeDef *hdmarx; /*!< I2C Rx DMA handle parameters */ |
NYX | 0:85b3fd62ea1a | 186 | |
NYX | 0:85b3fd62ea1a | 187 | HAL_LockTypeDef Lock; /*!< I2C locking object */ |
NYX | 0:85b3fd62ea1a | 188 | |
NYX | 0:85b3fd62ea1a | 189 | __IO HAL_I2C_StateTypeDef State; /*!< I2C communication state */ |
NYX | 0:85b3fd62ea1a | 190 | |
NYX | 0:85b3fd62ea1a | 191 | __IO HAL_I2C_ModeTypeDef Mode; /*!< I2C communication mode */ |
NYX | 0:85b3fd62ea1a | 192 | |
NYX | 0:85b3fd62ea1a | 193 | __IO uint32_t ErrorCode; /*!< I2C Error code */ |
NYX | 0:85b3fd62ea1a | 194 | |
NYX | 0:85b3fd62ea1a | 195 | __IO uint32_t Devaddress; /*!< I2C Target device address */ |
NYX | 0:85b3fd62ea1a | 196 | |
NYX | 0:85b3fd62ea1a | 197 | __IO uint32_t Memaddress; /*!< I2C Target memory address */ |
NYX | 0:85b3fd62ea1a | 198 | |
NYX | 0:85b3fd62ea1a | 199 | __IO uint32_t MemaddSize; /*!< I2C Target memory address size */ |
NYX | 0:85b3fd62ea1a | 200 | |
NYX | 0:85b3fd62ea1a | 201 | __IO uint32_t EventCount; /*!< I2C Event counter */ |
NYX | 0:85b3fd62ea1a | 202 | |
NYX | 0:85b3fd62ea1a | 203 | }I2C_HandleTypeDef; |
NYX | 0:85b3fd62ea1a | 204 | |
NYX | 0:85b3fd62ea1a | 205 | /** |
NYX | 0:85b3fd62ea1a | 206 | * @} |
NYX | 0:85b3fd62ea1a | 207 | */ |
NYX | 0:85b3fd62ea1a | 208 | |
NYX | 0:85b3fd62ea1a | 209 | /* Exported constants --------------------------------------------------------*/ |
NYX | 0:85b3fd62ea1a | 210 | /** @defgroup I2C_Exported_Constants I2C Exported Constants |
NYX | 0:85b3fd62ea1a | 211 | * @{ |
NYX | 0:85b3fd62ea1a | 212 | */ |
NYX | 0:85b3fd62ea1a | 213 | |
NYX | 0:85b3fd62ea1a | 214 | /** @defgroup I2C_Error_Code I2C Error Code |
NYX | 0:85b3fd62ea1a | 215 | * @brief I2C Error Code |
NYX | 0:85b3fd62ea1a | 216 | * @{ |
NYX | 0:85b3fd62ea1a | 217 | */ |
NYX | 0:85b3fd62ea1a | 218 | #define HAL_I2C_ERROR_NONE 0x00000000U /*!< No error */ |
NYX | 0:85b3fd62ea1a | 219 | #define HAL_I2C_ERROR_BERR 0x00000001U /*!< BERR error */ |
NYX | 0:85b3fd62ea1a | 220 | #define HAL_I2C_ERROR_ARLO 0x00000002U /*!< ARLO error */ |
NYX | 0:85b3fd62ea1a | 221 | #define HAL_I2C_ERROR_AF 0x00000004U /*!< AF error */ |
NYX | 0:85b3fd62ea1a | 222 | #define HAL_I2C_ERROR_OVR 0x00000008U /*!< OVR error */ |
NYX | 0:85b3fd62ea1a | 223 | #define HAL_I2C_ERROR_DMA 0x00000010U /*!< DMA transfer error */ |
NYX | 0:85b3fd62ea1a | 224 | #define HAL_I2C_ERROR_TIMEOUT 0x00000020U /*!< Timeout Error */ |
NYX | 0:85b3fd62ea1a | 225 | /** |
NYX | 0:85b3fd62ea1a | 226 | * @} |
NYX | 0:85b3fd62ea1a | 227 | */ |
NYX | 0:85b3fd62ea1a | 228 | |
NYX | 0:85b3fd62ea1a | 229 | /** @defgroup I2C_duty_cycle_in_fast_mode I2C duty cycle in fast mode |
NYX | 0:85b3fd62ea1a | 230 | * @{ |
NYX | 0:85b3fd62ea1a | 231 | */ |
NYX | 0:85b3fd62ea1a | 232 | #define I2C_DUTYCYCLE_2 0x00000000U |
NYX | 0:85b3fd62ea1a | 233 | #define I2C_DUTYCYCLE_16_9 I2C_CCR_DUTY |
NYX | 0:85b3fd62ea1a | 234 | /** |
NYX | 0:85b3fd62ea1a | 235 | * @} |
NYX | 0:85b3fd62ea1a | 236 | */ |
NYX | 0:85b3fd62ea1a | 237 | |
NYX | 0:85b3fd62ea1a | 238 | /** @defgroup I2C_addressing_mode I2C addressing mode |
NYX | 0:85b3fd62ea1a | 239 | * @{ |
NYX | 0:85b3fd62ea1a | 240 | */ |
NYX | 0:85b3fd62ea1a | 241 | #define I2C_ADDRESSINGMODE_7BIT 0x00004000U |
NYX | 0:85b3fd62ea1a | 242 | #define I2C_ADDRESSINGMODE_10BIT (I2C_OAR1_ADDMODE | 0x00004000U) |
NYX | 0:85b3fd62ea1a | 243 | /** |
NYX | 0:85b3fd62ea1a | 244 | * @} |
NYX | 0:85b3fd62ea1a | 245 | */ |
NYX | 0:85b3fd62ea1a | 246 | |
NYX | 0:85b3fd62ea1a | 247 | /** @defgroup I2C_dual_addressing_mode I2C dual addressing mode |
NYX | 0:85b3fd62ea1a | 248 | * @{ |
NYX | 0:85b3fd62ea1a | 249 | */ |
NYX | 0:85b3fd62ea1a | 250 | #define I2C_DUALADDRESS_DISABLE 0x00000000U |
NYX | 0:85b3fd62ea1a | 251 | #define I2C_DUALADDRESS_ENABLE I2C_OAR2_ENDUAL |
NYX | 0:85b3fd62ea1a | 252 | /** |
NYX | 0:85b3fd62ea1a | 253 | * @} |
NYX | 0:85b3fd62ea1a | 254 | */ |
NYX | 0:85b3fd62ea1a | 255 | |
NYX | 0:85b3fd62ea1a | 256 | /** @defgroup I2C_general_call_addressing_mode I2C general call addressing mode |
NYX | 0:85b3fd62ea1a | 257 | * @{ |
NYX | 0:85b3fd62ea1a | 258 | */ |
NYX | 0:85b3fd62ea1a | 259 | #define I2C_GENERALCALL_DISABLE 0x00000000U |
NYX | 0:85b3fd62ea1a | 260 | #define I2C_GENERALCALL_ENABLE I2C_CR1_ENGC |
NYX | 0:85b3fd62ea1a | 261 | /** |
NYX | 0:85b3fd62ea1a | 262 | * @} |
NYX | 0:85b3fd62ea1a | 263 | */ |
NYX | 0:85b3fd62ea1a | 264 | |
NYX | 0:85b3fd62ea1a | 265 | /** @defgroup I2C_nostretch_mode I2C nostretch mode |
NYX | 0:85b3fd62ea1a | 266 | * @{ |
NYX | 0:85b3fd62ea1a | 267 | */ |
NYX | 0:85b3fd62ea1a | 268 | #define I2C_NOSTRETCH_DISABLE 0x00000000U |
NYX | 0:85b3fd62ea1a | 269 | #define I2C_NOSTRETCH_ENABLE I2C_CR1_NOSTRETCH |
NYX | 0:85b3fd62ea1a | 270 | /** |
NYX | 0:85b3fd62ea1a | 271 | * @} |
NYX | 0:85b3fd62ea1a | 272 | */ |
NYX | 0:85b3fd62ea1a | 273 | |
NYX | 0:85b3fd62ea1a | 274 | /** @defgroup I2C_Memory_Address_Size I2C Memory Address Size |
NYX | 0:85b3fd62ea1a | 275 | * @{ |
NYX | 0:85b3fd62ea1a | 276 | */ |
NYX | 0:85b3fd62ea1a | 277 | #define I2C_MEMADD_SIZE_8BIT 0x00000001U |
NYX | 0:85b3fd62ea1a | 278 | #define I2C_MEMADD_SIZE_16BIT 0x00000010U |
NYX | 0:85b3fd62ea1a | 279 | /** |
NYX | 0:85b3fd62ea1a | 280 | * @} |
NYX | 0:85b3fd62ea1a | 281 | */ |
NYX | 0:85b3fd62ea1a | 282 | |
NYX | 0:85b3fd62ea1a | 283 | /** @defgroup I2C_XferDirection_definition I2C XferDirection definition |
NYX | 0:85b3fd62ea1a | 284 | * @{ |
NYX | 0:85b3fd62ea1a | 285 | */ |
NYX | 0:85b3fd62ea1a | 286 | #define I2C_DIRECTION_RECEIVE 0x00000000U |
NYX | 0:85b3fd62ea1a | 287 | #define I2C_DIRECTION_TRANSMIT 0x00000001U |
NYX | 0:85b3fd62ea1a | 288 | /** |
NYX | 0:85b3fd62ea1a | 289 | * @} |
NYX | 0:85b3fd62ea1a | 290 | */ |
NYX | 0:85b3fd62ea1a | 291 | |
NYX | 0:85b3fd62ea1a | 292 | /** @defgroup I2C_XferOptions_definition I2C XferOptions definition |
NYX | 0:85b3fd62ea1a | 293 | * @{ |
NYX | 0:85b3fd62ea1a | 294 | */ |
NYX | 0:85b3fd62ea1a | 295 | #define I2C_FIRST_FRAME 0x00000001U |
NYX | 0:85b3fd62ea1a | 296 | #define I2C_NEXT_FRAME 0x00000002U |
NYX | 0:85b3fd62ea1a | 297 | #define I2C_FIRST_AND_LAST_FRAME 0x00000004U |
NYX | 0:85b3fd62ea1a | 298 | #define I2C_LAST_FRAME 0x00000008U |
NYX | 0:85b3fd62ea1a | 299 | /** |
NYX | 0:85b3fd62ea1a | 300 | * @} |
NYX | 0:85b3fd62ea1a | 301 | */ |
NYX | 0:85b3fd62ea1a | 302 | |
NYX | 0:85b3fd62ea1a | 303 | /** @defgroup I2C_Interrupt_configuration_definition I2C Interrupt configuration definition |
NYX | 0:85b3fd62ea1a | 304 | * @{ |
NYX | 0:85b3fd62ea1a | 305 | */ |
NYX | 0:85b3fd62ea1a | 306 | #define I2C_IT_BUF I2C_CR2_ITBUFEN |
NYX | 0:85b3fd62ea1a | 307 | #define I2C_IT_EVT I2C_CR2_ITEVTEN |
NYX | 0:85b3fd62ea1a | 308 | #define I2C_IT_ERR I2C_CR2_ITERREN |
NYX | 0:85b3fd62ea1a | 309 | /** |
NYX | 0:85b3fd62ea1a | 310 | * @} |
NYX | 0:85b3fd62ea1a | 311 | */ |
NYX | 0:85b3fd62ea1a | 312 | |
NYX | 0:85b3fd62ea1a | 313 | /** @defgroup I2C_Flag_definition I2C Flag definition |
NYX | 0:85b3fd62ea1a | 314 | * @{ |
NYX | 0:85b3fd62ea1a | 315 | */ |
NYX | 0:85b3fd62ea1a | 316 | #define I2C_FLAG_SMBALERT 0x00018000U |
NYX | 0:85b3fd62ea1a | 317 | #define I2C_FLAG_TIMEOUT 0x00014000U |
NYX | 0:85b3fd62ea1a | 318 | #define I2C_FLAG_PECERR 0x00011000U |
NYX | 0:85b3fd62ea1a | 319 | #define I2C_FLAG_OVR 0x00010800U |
NYX | 0:85b3fd62ea1a | 320 | #define I2C_FLAG_AF 0x00010400U |
NYX | 0:85b3fd62ea1a | 321 | #define I2C_FLAG_ARLO 0x00010200U |
NYX | 0:85b3fd62ea1a | 322 | #define I2C_FLAG_BERR 0x00010100U |
NYX | 0:85b3fd62ea1a | 323 | #define I2C_FLAG_TXE 0x00010080U |
NYX | 0:85b3fd62ea1a | 324 | #define I2C_FLAG_RXNE 0x00010040U |
NYX | 0:85b3fd62ea1a | 325 | #define I2C_FLAG_STOPF 0x00010010U |
NYX | 0:85b3fd62ea1a | 326 | #define I2C_FLAG_ADD10 0x00010008U |
NYX | 0:85b3fd62ea1a | 327 | #define I2C_FLAG_BTF 0x00010004U |
NYX | 0:85b3fd62ea1a | 328 | #define I2C_FLAG_ADDR 0x00010002U |
NYX | 0:85b3fd62ea1a | 329 | #define I2C_FLAG_SB 0x00010001U |
NYX | 0:85b3fd62ea1a | 330 | #define I2C_FLAG_DUALF 0x00100080U |
NYX | 0:85b3fd62ea1a | 331 | #define I2C_FLAG_SMBHOST 0x00100040U |
NYX | 0:85b3fd62ea1a | 332 | #define I2C_FLAG_SMBDEFAULT 0x00100020U |
NYX | 0:85b3fd62ea1a | 333 | #define I2C_FLAG_GENCALL 0x00100010U |
NYX | 0:85b3fd62ea1a | 334 | #define I2C_FLAG_TRA 0x00100004U |
NYX | 0:85b3fd62ea1a | 335 | #define I2C_FLAG_BUSY 0x00100002U |
NYX | 0:85b3fd62ea1a | 336 | #define I2C_FLAG_MSL 0x00100001U |
NYX | 0:85b3fd62ea1a | 337 | /** |
NYX | 0:85b3fd62ea1a | 338 | * @} |
NYX | 0:85b3fd62ea1a | 339 | */ |
NYX | 0:85b3fd62ea1a | 340 | |
NYX | 0:85b3fd62ea1a | 341 | /** |
NYX | 0:85b3fd62ea1a | 342 | * @} |
NYX | 0:85b3fd62ea1a | 343 | */ |
NYX | 0:85b3fd62ea1a | 344 | |
NYX | 0:85b3fd62ea1a | 345 | /* Exported macro ------------------------------------------------------------*/ |
NYX | 0:85b3fd62ea1a | 346 | /** @defgroup I2C_Exported_Macros I2C Exported Macros |
NYX | 0:85b3fd62ea1a | 347 | * @{ |
NYX | 0:85b3fd62ea1a | 348 | */ |
NYX | 0:85b3fd62ea1a | 349 | |
NYX | 0:85b3fd62ea1a | 350 | /** @brief Reset I2C handle state |
NYX | 0:85b3fd62ea1a | 351 | * @param __HANDLE__: specifies the I2C Handle. |
NYX | 0:85b3fd62ea1a | 352 | * This parameter can be I2C where x: 1, 2, or 3 to select the I2C peripheral. |
NYX | 0:85b3fd62ea1a | 353 | * @retval None |
NYX | 0:85b3fd62ea1a | 354 | */ |
NYX | 0:85b3fd62ea1a | 355 | #define __HAL_I2C_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_I2C_STATE_RESET) |
NYX | 0:85b3fd62ea1a | 356 | |
NYX | 0:85b3fd62ea1a | 357 | /** @brief Enable or disable the specified I2C interrupts. |
NYX | 0:85b3fd62ea1a | 358 | * @param __HANDLE__: specifies the I2C Handle. |
NYX | 0:85b3fd62ea1a | 359 | * This parameter can be I2C where x: 1, 2, or 3 to select the I2C peripheral. |
NYX | 0:85b3fd62ea1a | 360 | * @param __INTERRUPT__: specifies the interrupt source to enable or disable. |
NYX | 0:85b3fd62ea1a | 361 | * This parameter can be one of the following values: |
NYX | 0:85b3fd62ea1a | 362 | * @arg I2C_IT_BUF: Buffer interrupt enable |
NYX | 0:85b3fd62ea1a | 363 | * @arg I2C_IT_EVT: Event interrupt enable |
NYX | 0:85b3fd62ea1a | 364 | * @arg I2C_IT_ERR: Error interrupt enable |
NYX | 0:85b3fd62ea1a | 365 | * @retval None |
NYX | 0:85b3fd62ea1a | 366 | */ |
NYX | 0:85b3fd62ea1a | 367 | #define __HAL_I2C_ENABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->CR2 |= (__INTERRUPT__)) |
NYX | 0:85b3fd62ea1a | 368 | #define __HAL_I2C_DISABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->CR2 &= (~(__INTERRUPT__))) |
NYX | 0:85b3fd62ea1a | 369 | |
NYX | 0:85b3fd62ea1a | 370 | /** @brief Checks if the specified I2C interrupt source is enabled or disabled. |
NYX | 0:85b3fd62ea1a | 371 | * @param __HANDLE__: specifies the I2C Handle. |
NYX | 0:85b3fd62ea1a | 372 | * This parameter can be I2C where x: 1, 2, or 3 to select the I2C peripheral. |
NYX | 0:85b3fd62ea1a | 373 | * @param __INTERRUPT__: specifies the I2C interrupt source to check. |
NYX | 0:85b3fd62ea1a | 374 | * This parameter can be one of the following values: |
NYX | 0:85b3fd62ea1a | 375 | * @arg I2C_IT_BUF: Buffer interrupt enable |
NYX | 0:85b3fd62ea1a | 376 | * @arg I2C_IT_EVT: Event interrupt enable |
NYX | 0:85b3fd62ea1a | 377 | * @arg I2C_IT_ERR: Error interrupt enable |
NYX | 0:85b3fd62ea1a | 378 | * @retval The new state of __INTERRUPT__ (TRUE or FALSE). |
NYX | 0:85b3fd62ea1a | 379 | */ |
NYX | 0:85b3fd62ea1a | 380 | #define __HAL_I2C_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) ((((__HANDLE__)->Instance->CR2 & (__INTERRUPT__)) == (__INTERRUPT__)) ? SET : RESET) |
NYX | 0:85b3fd62ea1a | 381 | |
NYX | 0:85b3fd62ea1a | 382 | /** @brief Checks whether the specified I2C flag is set or not. |
NYX | 0:85b3fd62ea1a | 383 | * @param __HANDLE__: specifies the I2C Handle. |
NYX | 0:85b3fd62ea1a | 384 | * This parameter can be I2C where x: 1, 2, or 3 to select the I2C peripheral. |
NYX | 0:85b3fd62ea1a | 385 | * @param __FLAG__: specifies the flag to check. |
NYX | 0:85b3fd62ea1a | 386 | * This parameter can be one of the following values: |
NYX | 0:85b3fd62ea1a | 387 | * @arg I2C_FLAG_SMBALERT: SMBus Alert flag |
NYX | 0:85b3fd62ea1a | 388 | * @arg I2C_FLAG_TIMEOUT: Timeout or Tlow error flag |
NYX | 0:85b3fd62ea1a | 389 | * @arg I2C_FLAG_PECERR: PEC error in reception flag |
NYX | 0:85b3fd62ea1a | 390 | * @arg I2C_FLAG_OVR: Overrun/Underrun flag |
NYX | 0:85b3fd62ea1a | 391 | * @arg I2C_FLAG_AF: Acknowledge failure flag |
NYX | 0:85b3fd62ea1a | 392 | * @arg I2C_FLAG_ARLO: Arbitration lost flag |
NYX | 0:85b3fd62ea1a | 393 | * @arg I2C_FLAG_BERR: Bus error flag |
NYX | 0:85b3fd62ea1a | 394 | * @arg I2C_FLAG_TXE: Data register empty flag |
NYX | 0:85b3fd62ea1a | 395 | * @arg I2C_FLAG_RXNE: Data register not empty flag |
NYX | 0:85b3fd62ea1a | 396 | * @arg I2C_FLAG_STOPF: Stop detection flag |
NYX | 0:85b3fd62ea1a | 397 | * @arg I2C_FLAG_ADD10: 10-bit header sent flag |
NYX | 0:85b3fd62ea1a | 398 | * @arg I2C_FLAG_BTF: Byte transfer finished flag |
NYX | 0:85b3fd62ea1a | 399 | * @arg I2C_FLAG_ADDR: Address sent flag |
NYX | 0:85b3fd62ea1a | 400 | * Address matched flag |
NYX | 0:85b3fd62ea1a | 401 | * @arg I2C_FLAG_SB: Start bit flag |
NYX | 0:85b3fd62ea1a | 402 | * @arg I2C_FLAG_DUALF: Dual flag |
NYX | 0:85b3fd62ea1a | 403 | * @arg I2C_FLAG_SMBHOST: SMBus host header |
NYX | 0:85b3fd62ea1a | 404 | * @arg I2C_FLAG_SMBDEFAULT: SMBus default header |
NYX | 0:85b3fd62ea1a | 405 | * @arg I2C_FLAG_GENCALL: General call header flag |
NYX | 0:85b3fd62ea1a | 406 | * @arg I2C_FLAG_TRA: Transmitter/Receiver flag |
NYX | 0:85b3fd62ea1a | 407 | * @arg I2C_FLAG_BUSY: Bus busy flag |
NYX | 0:85b3fd62ea1a | 408 | * @arg I2C_FLAG_MSL: Master/Slave flag |
NYX | 0:85b3fd62ea1a | 409 | * @retval The new state of __FLAG__ (TRUE or FALSE). |
NYX | 0:85b3fd62ea1a | 410 | */ |
NYX | 0:85b3fd62ea1a | 411 | #define __HAL_I2C_GET_FLAG(__HANDLE__, __FLAG__) ((((uint8_t)((__FLAG__) >> 16U)) == 0x01U)?((((__HANDLE__)->Instance->SR1) & ((__FLAG__) & I2C_FLAG_MASK)) == ((__FLAG__) & I2C_FLAG_MASK)): \ |
NYX | 0:85b3fd62ea1a | 412 | ((((__HANDLE__)->Instance->SR2) & ((__FLAG__) & I2C_FLAG_MASK)) == ((__FLAG__) & I2C_FLAG_MASK))) |
NYX | 0:85b3fd62ea1a | 413 | |
NYX | 0:85b3fd62ea1a | 414 | /** @brief Clears the I2C pending flags which are cleared by writing 0 in a specific bit. |
NYX | 0:85b3fd62ea1a | 415 | * @param __HANDLE__: specifies the I2C Handle. |
NYX | 0:85b3fd62ea1a | 416 | * This parameter can be I2C where x: 1, 2, or 3 to select the I2C peripheral. |
NYX | 0:85b3fd62ea1a | 417 | * @param __FLAG__: specifies the flag to clear. |
NYX | 0:85b3fd62ea1a | 418 | * This parameter can be any combination of the following values: |
NYX | 0:85b3fd62ea1a | 419 | * @arg I2C_FLAG_SMBALERT: SMBus Alert flag |
NYX | 0:85b3fd62ea1a | 420 | * @arg I2C_FLAG_TIMEOUT: Timeout or Tlow error flag |
NYX | 0:85b3fd62ea1a | 421 | * @arg I2C_FLAG_PECERR: PEC error in reception flag |
NYX | 0:85b3fd62ea1a | 422 | * @arg I2C_FLAG_OVR: Overrun/Underrun flag (Slave mode) |
NYX | 0:85b3fd62ea1a | 423 | * @arg I2C_FLAG_AF: Acknowledge failure flag |
NYX | 0:85b3fd62ea1a | 424 | * @arg I2C_FLAG_ARLO: Arbitration lost flag (Master mode) |
NYX | 0:85b3fd62ea1a | 425 | * @arg I2C_FLAG_BERR: Bus error flag |
NYX | 0:85b3fd62ea1a | 426 | * @retval None |
NYX | 0:85b3fd62ea1a | 427 | */ |
NYX | 0:85b3fd62ea1a | 428 | #define __HAL_I2C_CLEAR_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->SR1 = ~((__FLAG__) & I2C_FLAG_MASK)) |
NYX | 0:85b3fd62ea1a | 429 | |
NYX | 0:85b3fd62ea1a | 430 | /** @brief Clears the I2C ADDR pending flag. |
NYX | 0:85b3fd62ea1a | 431 | * @param __HANDLE__: specifies the I2C Handle. |
NYX | 0:85b3fd62ea1a | 432 | * This parameter can be I2C where x: 1, 2, or 3 to select the I2C peripheral. |
NYX | 0:85b3fd62ea1a | 433 | * @retval None |
NYX | 0:85b3fd62ea1a | 434 | */ |
NYX | 0:85b3fd62ea1a | 435 | #define __HAL_I2C_CLEAR_ADDRFLAG(__HANDLE__) \ |
NYX | 0:85b3fd62ea1a | 436 | do{ \ |
NYX | 0:85b3fd62ea1a | 437 | __IO uint32_t tmpreg = 0x00U; \ |
NYX | 0:85b3fd62ea1a | 438 | tmpreg = (__HANDLE__)->Instance->SR1; \ |
NYX | 0:85b3fd62ea1a | 439 | tmpreg = (__HANDLE__)->Instance->SR2; \ |
NYX | 0:85b3fd62ea1a | 440 | UNUSED(tmpreg); \ |
NYX | 0:85b3fd62ea1a | 441 | } while(0) |
NYX | 0:85b3fd62ea1a | 442 | |
NYX | 0:85b3fd62ea1a | 443 | /** @brief Clears the I2C STOPF pending flag. |
NYX | 0:85b3fd62ea1a | 444 | * @param __HANDLE__: specifies the I2C Handle. |
NYX | 0:85b3fd62ea1a | 445 | * This parameter can be I2C where x: 1, 2, or 3 to select the I2C peripheral. |
NYX | 0:85b3fd62ea1a | 446 | * @retval None |
NYX | 0:85b3fd62ea1a | 447 | */ |
NYX | 0:85b3fd62ea1a | 448 | #define __HAL_I2C_CLEAR_STOPFLAG(__HANDLE__) \ |
NYX | 0:85b3fd62ea1a | 449 | do{ \ |
NYX | 0:85b3fd62ea1a | 450 | __IO uint32_t tmpreg = 0x00U; \ |
NYX | 0:85b3fd62ea1a | 451 | tmpreg = (__HANDLE__)->Instance->SR1; \ |
NYX | 0:85b3fd62ea1a | 452 | (__HANDLE__)->Instance->CR1 |= I2C_CR1_PE; \ |
NYX | 0:85b3fd62ea1a | 453 | UNUSED(tmpreg); \ |
NYX | 0:85b3fd62ea1a | 454 | } while(0) |
NYX | 0:85b3fd62ea1a | 455 | |
NYX | 0:85b3fd62ea1a | 456 | /** @brief Enable the I2C peripheral. |
NYX | 0:85b3fd62ea1a | 457 | * @param __HANDLE__: specifies the I2C Handle. |
NYX | 0:85b3fd62ea1a | 458 | * This parameter can be I2Cx where x: 1 or 2 to select the I2C peripheral. |
NYX | 0:85b3fd62ea1a | 459 | * @retval None |
NYX | 0:85b3fd62ea1a | 460 | */ |
NYX | 0:85b3fd62ea1a | 461 | #define __HAL_I2C_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR1 |= I2C_CR1_PE) |
NYX | 0:85b3fd62ea1a | 462 | |
NYX | 0:85b3fd62ea1a | 463 | /** @brief Disable the I2C peripheral. |
NYX | 0:85b3fd62ea1a | 464 | * @param __HANDLE__: specifies the I2C Handle. |
NYX | 0:85b3fd62ea1a | 465 | * This parameter can be I2Cx where x: 1 or 2 to select the I2C peripheral. |
NYX | 0:85b3fd62ea1a | 466 | * @retval None |
NYX | 0:85b3fd62ea1a | 467 | */ |
NYX | 0:85b3fd62ea1a | 468 | #define __HAL_I2C_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR1 &= ~I2C_CR1_PE) |
NYX | 0:85b3fd62ea1a | 469 | |
NYX | 0:85b3fd62ea1a | 470 | /** |
NYX | 0:85b3fd62ea1a | 471 | * @} |
NYX | 0:85b3fd62ea1a | 472 | */ |
NYX | 0:85b3fd62ea1a | 473 | |
NYX | 0:85b3fd62ea1a | 474 | /* Include I2C HAL Extension module */ |
NYX | 0:85b3fd62ea1a | 475 | #include "stm32f4xx_hal_i2c_ex.h" |
NYX | 0:85b3fd62ea1a | 476 | |
NYX | 0:85b3fd62ea1a | 477 | /* Exported functions --------------------------------------------------------*/ |
NYX | 0:85b3fd62ea1a | 478 | /** @addtogroup I2C_Exported_Functions |
NYX | 0:85b3fd62ea1a | 479 | * @{ |
NYX | 0:85b3fd62ea1a | 480 | */ |
NYX | 0:85b3fd62ea1a | 481 | |
NYX | 0:85b3fd62ea1a | 482 | /** @addtogroup I2C_Exported_Functions_Group1 |
NYX | 0:85b3fd62ea1a | 483 | * @{ |
NYX | 0:85b3fd62ea1a | 484 | */ |
NYX | 0:85b3fd62ea1a | 485 | /* Initialization/de-initialization functions **********************************/ |
NYX | 0:85b3fd62ea1a | 486 | HAL_StatusTypeDef HAL_I2C_Init(I2C_HandleTypeDef *hi2c); |
NYX | 0:85b3fd62ea1a | 487 | HAL_StatusTypeDef HAL_I2C_DeInit (I2C_HandleTypeDef *hi2c); |
NYX | 0:85b3fd62ea1a | 488 | void HAL_I2C_MspInit(I2C_HandleTypeDef *hi2c); |
NYX | 0:85b3fd62ea1a | 489 | void HAL_I2C_MspDeInit(I2C_HandleTypeDef *hi2c); |
NYX | 0:85b3fd62ea1a | 490 | /** |
NYX | 0:85b3fd62ea1a | 491 | * @} |
NYX | 0:85b3fd62ea1a | 492 | */ |
NYX | 0:85b3fd62ea1a | 493 | |
NYX | 0:85b3fd62ea1a | 494 | /** @addtogroup I2C_Exported_Functions_Group2 |
NYX | 0:85b3fd62ea1a | 495 | * @{ |
NYX | 0:85b3fd62ea1a | 496 | */ |
NYX | 0:85b3fd62ea1a | 497 | /* I/O operation functions *****************************************************/ |
NYX | 0:85b3fd62ea1a | 498 | /******* Blocking mode: Polling */ |
NYX | 0:85b3fd62ea1a | 499 | HAL_StatusTypeDef HAL_I2C_Master_Transmit(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t Timeout); |
NYX | 0:85b3fd62ea1a | 500 | HAL_StatusTypeDef HAL_I2C_Master_Receive(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t Timeout); |
NYX | 0:85b3fd62ea1a | 501 | HAL_StatusTypeDef HAL_I2C_Slave_Transmit(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size, uint32_t Timeout); |
NYX | 0:85b3fd62ea1a | 502 | HAL_StatusTypeDef HAL_I2C_Slave_Receive(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size, uint32_t Timeout); |
NYX | 0:85b3fd62ea1a | 503 | HAL_StatusTypeDef HAL_I2C_Mem_Write(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size, uint32_t Timeout); |
NYX | 0:85b3fd62ea1a | 504 | HAL_StatusTypeDef HAL_I2C_Mem_Read(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size, uint32_t Timeout); |
NYX | 0:85b3fd62ea1a | 505 | HAL_StatusTypeDef HAL_I2C_IsDeviceReady(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint32_t Trials, uint32_t Timeout); |
NYX | 0:85b3fd62ea1a | 506 | |
NYX | 0:85b3fd62ea1a | 507 | /******* Non-Blocking mode: Interrupt */ |
NYX | 0:85b3fd62ea1a | 508 | HAL_StatusTypeDef HAL_I2C_Master_Transmit_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size); |
NYX | 0:85b3fd62ea1a | 509 | HAL_StatusTypeDef HAL_I2C_Master_Receive_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size); |
NYX | 0:85b3fd62ea1a | 510 | HAL_StatusTypeDef HAL_I2C_Slave_Transmit_IT(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size); |
NYX | 0:85b3fd62ea1a | 511 | HAL_StatusTypeDef HAL_I2C_Slave_Receive_IT(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size); |
NYX | 0:85b3fd62ea1a | 512 | HAL_StatusTypeDef HAL_I2C_Mem_Write_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size); |
NYX | 0:85b3fd62ea1a | 513 | HAL_StatusTypeDef HAL_I2C_Mem_Read_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size); |
NYX | 0:85b3fd62ea1a | 514 | |
NYX | 0:85b3fd62ea1a | 515 | HAL_StatusTypeDef HAL_I2C_Master_Sequential_Transmit_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t XferOptions); |
NYX | 0:85b3fd62ea1a | 516 | HAL_StatusTypeDef HAL_I2C_Master_Sequential_Receive_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t XferOptions); |
NYX | 0:85b3fd62ea1a | 517 | HAL_StatusTypeDef HAL_I2C_Slave_Sequential_Transmit_IT(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size, uint32_t XferOptions); |
NYX | 0:85b3fd62ea1a | 518 | HAL_StatusTypeDef HAL_I2C_Slave_Sequential_Receive_IT(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size, uint32_t XferOptions); |
NYX | 0:85b3fd62ea1a | 519 | HAL_StatusTypeDef HAL_I2C_Master_Abort_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress); |
NYX | 0:85b3fd62ea1a | 520 | HAL_StatusTypeDef HAL_I2C_EnableListen_IT(I2C_HandleTypeDef *hi2c); |
NYX | 0:85b3fd62ea1a | 521 | HAL_StatusTypeDef HAL_I2C_DisableListen_IT(I2C_HandleTypeDef *hi2c); |
NYX | 0:85b3fd62ea1a | 522 | |
NYX | 0:85b3fd62ea1a | 523 | /******* Non-Blocking mode: DMA */ |
NYX | 0:85b3fd62ea1a | 524 | HAL_StatusTypeDef HAL_I2C_Master_Transmit_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size); |
NYX | 0:85b3fd62ea1a | 525 | HAL_StatusTypeDef HAL_I2C_Master_Receive_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size); |
NYX | 0:85b3fd62ea1a | 526 | HAL_StatusTypeDef HAL_I2C_Slave_Transmit_DMA(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size); |
NYX | 0:85b3fd62ea1a | 527 | HAL_StatusTypeDef HAL_I2C_Slave_Receive_DMA(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size); |
NYX | 0:85b3fd62ea1a | 528 | HAL_StatusTypeDef HAL_I2C_Mem_Write_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size); |
NYX | 0:85b3fd62ea1a | 529 | HAL_StatusTypeDef HAL_I2C_Mem_Read_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size); |
NYX | 0:85b3fd62ea1a | 530 | |
NYX | 0:85b3fd62ea1a | 531 | /******* I2C IRQHandler and Callbacks used in non blocking modes (Interrupt and DMA) */ |
NYX | 0:85b3fd62ea1a | 532 | void HAL_I2C_EV_IRQHandler(I2C_HandleTypeDef *hi2c); |
NYX | 0:85b3fd62ea1a | 533 | void HAL_I2C_ER_IRQHandler(I2C_HandleTypeDef *hi2c); |
NYX | 0:85b3fd62ea1a | 534 | void HAL_I2C_MasterTxCpltCallback(I2C_HandleTypeDef *hi2c); |
NYX | 0:85b3fd62ea1a | 535 | void HAL_I2C_MasterRxCpltCallback(I2C_HandleTypeDef *hi2c); |
NYX | 0:85b3fd62ea1a | 536 | void HAL_I2C_SlaveTxCpltCallback(I2C_HandleTypeDef *hi2c); |
NYX | 0:85b3fd62ea1a | 537 | void HAL_I2C_SlaveRxCpltCallback(I2C_HandleTypeDef *hi2c); |
NYX | 0:85b3fd62ea1a | 538 | void HAL_I2C_AddrCallback(I2C_HandleTypeDef *hi2c, uint8_t TransferDirection, uint16_t AddrMatchCode); |
NYX | 0:85b3fd62ea1a | 539 | void HAL_I2C_ListenCpltCallback(I2C_HandleTypeDef *hi2c); |
NYX | 0:85b3fd62ea1a | 540 | void HAL_I2C_MemTxCpltCallback(I2C_HandleTypeDef *hi2c); |
NYX | 0:85b3fd62ea1a | 541 | void HAL_I2C_MemRxCpltCallback(I2C_HandleTypeDef *hi2c); |
NYX | 0:85b3fd62ea1a | 542 | void HAL_I2C_ErrorCallback(I2C_HandleTypeDef *hi2c); |
NYX | 0:85b3fd62ea1a | 543 | void HAL_I2C_AbortCpltCallback(I2C_HandleTypeDef *hi2c); |
NYX | 0:85b3fd62ea1a | 544 | /** |
NYX | 0:85b3fd62ea1a | 545 | * @} |
NYX | 0:85b3fd62ea1a | 546 | */ |
NYX | 0:85b3fd62ea1a | 547 | |
NYX | 0:85b3fd62ea1a | 548 | /** @addtogroup I2C_Exported_Functions_Group3 |
NYX | 0:85b3fd62ea1a | 549 | * @{ |
NYX | 0:85b3fd62ea1a | 550 | */ |
NYX | 0:85b3fd62ea1a | 551 | /* Peripheral State, Mode and Errors functions *********************************/ |
NYX | 0:85b3fd62ea1a | 552 | HAL_I2C_StateTypeDef HAL_I2C_GetState(I2C_HandleTypeDef *hi2c); |
NYX | 0:85b3fd62ea1a | 553 | HAL_I2C_ModeTypeDef HAL_I2C_GetMode(I2C_HandleTypeDef *hi2c); |
NYX | 0:85b3fd62ea1a | 554 | uint32_t HAL_I2C_GetError(I2C_HandleTypeDef *hi2c); |
NYX | 0:85b3fd62ea1a | 555 | |
NYX | 0:85b3fd62ea1a | 556 | /** |
NYX | 0:85b3fd62ea1a | 557 | * @} |
NYX | 0:85b3fd62ea1a | 558 | */ |
NYX | 0:85b3fd62ea1a | 559 | |
NYX | 0:85b3fd62ea1a | 560 | /** |
NYX | 0:85b3fd62ea1a | 561 | * @} |
NYX | 0:85b3fd62ea1a | 562 | */ |
NYX | 0:85b3fd62ea1a | 563 | /* Private types -------------------------------------------------------------*/ |
NYX | 0:85b3fd62ea1a | 564 | /* Private variables ---------------------------------------------------------*/ |
NYX | 0:85b3fd62ea1a | 565 | /* Private constants ---------------------------------------------------------*/ |
NYX | 0:85b3fd62ea1a | 566 | /** @defgroup I2C_Private_Constants I2C Private Constants |
NYX | 0:85b3fd62ea1a | 567 | * @{ |
NYX | 0:85b3fd62ea1a | 568 | */ |
NYX | 0:85b3fd62ea1a | 569 | #define I2C_FLAG_MASK 0x0000FFFFU |
NYX | 0:85b3fd62ea1a | 570 | /** |
NYX | 0:85b3fd62ea1a | 571 | * @} |
NYX | 0:85b3fd62ea1a | 572 | */ |
NYX | 0:85b3fd62ea1a | 573 | |
NYX | 0:85b3fd62ea1a | 574 | /* Private macros ------------------------------------------------------------*/ |
NYX | 0:85b3fd62ea1a | 575 | /** @defgroup I2C_Private_Macros I2C Private Macros |
NYX | 0:85b3fd62ea1a | 576 | * @{ |
NYX | 0:85b3fd62ea1a | 577 | */ |
NYX | 0:85b3fd62ea1a | 578 | |
NYX | 0:85b3fd62ea1a | 579 | #define I2C_FREQRANGE(__PCLK__) ((__PCLK__)/1000000U) |
NYX | 0:85b3fd62ea1a | 580 | #define I2C_RISE_TIME(__FREQRANGE__, __SPEED__) (((__SPEED__) <= 100000U) ? ((__FREQRANGE__) + 1U) : ((((__FREQRANGE__) * 300U) / 1000U) + 1U)) |
NYX | 0:85b3fd62ea1a | 581 | #define I2C_SPEED_STANDARD(__PCLK__, __SPEED__) (((((__PCLK__)/((__SPEED__) << 1U)) & I2C_CCR_CCR) < 4U)? 4U:((__PCLK__) / ((__SPEED__) << 1U))) |
NYX | 0:85b3fd62ea1a | 582 | #define I2C_SPEED_FAST(__PCLK__, __SPEED__, __DUTYCYCLE__) (((__DUTYCYCLE__) == I2C_DUTYCYCLE_2)? ((__PCLK__) / ((__SPEED__) * 3U)) : (((__PCLK__) / ((__SPEED__) * 25U)) | I2C_DUTYCYCLE_16_9)) |
NYX | 0:85b3fd62ea1a | 583 | #define I2C_SPEED(__PCLK__, __SPEED__, __DUTYCYCLE__) (((__SPEED__) <= 100000U)? (I2C_SPEED_STANDARD((__PCLK__), (__SPEED__))) : \ |
NYX | 0:85b3fd62ea1a | 584 | ((I2C_SPEED_FAST((__PCLK__), (__SPEED__), (__DUTYCYCLE__)) & I2C_CCR_CCR) == 0U)? 1U : \ |
NYX | 0:85b3fd62ea1a | 585 | ((I2C_SPEED_FAST((__PCLK__), (__SPEED__), (__DUTYCYCLE__))) | I2C_CCR_FS)) |
NYX | 0:85b3fd62ea1a | 586 | |
NYX | 0:85b3fd62ea1a | 587 | #define I2C_7BIT_ADD_WRITE(__ADDRESS__) ((uint8_t)((__ADDRESS__) & (~I2C_OAR1_ADD0))) |
NYX | 0:85b3fd62ea1a | 588 | #define I2C_7BIT_ADD_READ(__ADDRESS__) ((uint8_t)((__ADDRESS__) | I2C_OAR1_ADD0)) |
NYX | 0:85b3fd62ea1a | 589 | |
NYX | 0:85b3fd62ea1a | 590 | #define I2C_10BIT_ADDRESS(__ADDRESS__) ((uint8_t)((uint16_t)((__ADDRESS__) & (uint16_t)0x00FF))) |
NYX | 0:85b3fd62ea1a | 591 | #define I2C_10BIT_HEADER_WRITE(__ADDRESS__) ((uint8_t)((uint16_t)((uint16_t)(((uint16_t)((__ADDRESS__) & (uint16_t)0x0300)) >> 7) | (uint16_t)0x00F0))) |
NYX | 0:85b3fd62ea1a | 592 | #define I2C_10BIT_HEADER_READ(__ADDRESS__) ((uint8_t)((uint16_t)((uint16_t)(((uint16_t)((__ADDRESS__) & (uint16_t)0x0300)) >> 7) | (uint16_t)(0x00F1)))) |
NYX | 0:85b3fd62ea1a | 593 | |
NYX | 0:85b3fd62ea1a | 594 | #define I2C_MEM_ADD_MSB(__ADDRESS__) ((uint8_t)((uint16_t)(((uint16_t)((__ADDRESS__) & (uint16_t)0xFF00)) >> 8))) |
NYX | 0:85b3fd62ea1a | 595 | #define I2C_MEM_ADD_LSB(__ADDRESS__) ((uint8_t)((uint16_t)((__ADDRESS__) & (uint16_t)0x00FF))) |
NYX | 0:85b3fd62ea1a | 596 | |
NYX | 0:85b3fd62ea1a | 597 | /** @defgroup I2C_IS_RTC_Definitions I2C Private macros to check input parameters |
NYX | 0:85b3fd62ea1a | 598 | * @{ |
NYX | 0:85b3fd62ea1a | 599 | */ |
NYX | 0:85b3fd62ea1a | 600 | #define IS_I2C_DUTY_CYCLE(CYCLE) (((CYCLE) == I2C_DUTYCYCLE_2) || \ |
NYX | 0:85b3fd62ea1a | 601 | ((CYCLE) == I2C_DUTYCYCLE_16_9)) |
NYX | 0:85b3fd62ea1a | 602 | #define IS_I2C_ADDRESSING_MODE(ADDRESS) (((ADDRESS) == I2C_ADDRESSINGMODE_7BIT) || \ |
NYX | 0:85b3fd62ea1a | 603 | ((ADDRESS) == I2C_ADDRESSINGMODE_10BIT)) |
NYX | 0:85b3fd62ea1a | 604 | #define IS_I2C_DUAL_ADDRESS(ADDRESS) (((ADDRESS) == I2C_DUALADDRESS_DISABLE) || \ |
NYX | 0:85b3fd62ea1a | 605 | ((ADDRESS) == I2C_DUALADDRESS_ENABLE)) |
NYX | 0:85b3fd62ea1a | 606 | #define IS_I2C_GENERAL_CALL(CALL) (((CALL) == I2C_GENERALCALL_DISABLE) || \ |
NYX | 0:85b3fd62ea1a | 607 | ((CALL) == I2C_GENERALCALL_ENABLE)) |
NYX | 0:85b3fd62ea1a | 608 | #define IS_I2C_NO_STRETCH(STRETCH) (((STRETCH) == I2C_NOSTRETCH_DISABLE) || \ |
NYX | 0:85b3fd62ea1a | 609 | ((STRETCH) == I2C_NOSTRETCH_ENABLE)) |
NYX | 0:85b3fd62ea1a | 610 | #define IS_I2C_MEMADD_SIZE(SIZE) (((SIZE) == I2C_MEMADD_SIZE_8BIT) || \ |
NYX | 0:85b3fd62ea1a | 611 | ((SIZE) == I2C_MEMADD_SIZE_16BIT)) |
NYX | 0:85b3fd62ea1a | 612 | #define IS_I2C_CLOCK_SPEED(SPEED) (((SPEED) > 0U) && ((SPEED) <= 400000U)) |
NYX | 0:85b3fd62ea1a | 613 | #define IS_I2C_OWN_ADDRESS1(ADDRESS1) (((ADDRESS1) & 0xFFFFFC00U) == 0U) |
NYX | 0:85b3fd62ea1a | 614 | #define IS_I2C_OWN_ADDRESS2(ADDRESS2) (((ADDRESS2) & 0xFFFFFF01U) == 0U) |
NYX | 0:85b3fd62ea1a | 615 | #define IS_I2C_TRANSFER_OPTIONS_REQUEST(REQUEST) (((REQUEST) == I2C_FIRST_FRAME) || \ |
NYX | 0:85b3fd62ea1a | 616 | ((REQUEST) == I2C_NEXT_FRAME) || \ |
NYX | 0:85b3fd62ea1a | 617 | ((REQUEST) == I2C_FIRST_AND_LAST_FRAME) || \ |
NYX | 0:85b3fd62ea1a | 618 | ((REQUEST) == I2C_LAST_FRAME)) |
NYX | 0:85b3fd62ea1a | 619 | /** |
NYX | 0:85b3fd62ea1a | 620 | * @} |
NYX | 0:85b3fd62ea1a | 621 | */ |
NYX | 0:85b3fd62ea1a | 622 | |
NYX | 0:85b3fd62ea1a | 623 | /** |
NYX | 0:85b3fd62ea1a | 624 | * @} |
NYX | 0:85b3fd62ea1a | 625 | */ |
NYX | 0:85b3fd62ea1a | 626 | |
NYX | 0:85b3fd62ea1a | 627 | /* Private functions ---------------------------------------------------------*/ |
NYX | 0:85b3fd62ea1a | 628 | /** @defgroup I2C_Private_Functions I2C Private Functions |
NYX | 0:85b3fd62ea1a | 629 | * @{ |
NYX | 0:85b3fd62ea1a | 630 | */ |
NYX | 0:85b3fd62ea1a | 631 | |
NYX | 0:85b3fd62ea1a | 632 | /** |
NYX | 0:85b3fd62ea1a | 633 | * @} |
NYX | 0:85b3fd62ea1a | 634 | */ |
NYX | 0:85b3fd62ea1a | 635 | |
NYX | 0:85b3fd62ea1a | 636 | /** |
NYX | 0:85b3fd62ea1a | 637 | * @} |
NYX | 0:85b3fd62ea1a | 638 | */ |
NYX | 0:85b3fd62ea1a | 639 | |
NYX | 0:85b3fd62ea1a | 640 | /** |
NYX | 0:85b3fd62ea1a | 641 | * @} |
NYX | 0:85b3fd62ea1a | 642 | */ |
NYX | 0:85b3fd62ea1a | 643 | |
NYX | 0:85b3fd62ea1a | 644 | #ifdef __cplusplus |
NYX | 0:85b3fd62ea1a | 645 | } |
NYX | 0:85b3fd62ea1a | 646 | #endif |
NYX | 0:85b3fd62ea1a | 647 | |
NYX | 0:85b3fd62ea1a | 648 | |
NYX | 0:85b3fd62ea1a | 649 | #endif /* __STM32F4xx_HAL_I2C_H */ |
NYX | 0:85b3fd62ea1a | 650 | |
NYX | 0:85b3fd62ea1a | 651 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |