mbed-dev - inport from local

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inport from local

targets/TARGET_STM/TARGET_STM32F4/device/stm32f4xx_hal_i2c.c@0:85b3fd62ea1a, 2020-03-16 (annotated)

Committer:: NYX
Date:: Mon Mar 16 06:35:48 2020 +0000
Revision:: 0:85b3fd62ea1a

reinport to mbed;

Who changed what in which revision?

User	Revision	Line number	New contents of line
NYX	0:85b3fd62ea1a	1	/**
NYX	0:85b3fd62ea1a	2	******************************************************************************
NYX	0:85b3fd62ea1a	3	* @file stm32f4xx_hal_i2c.c
NYX	0:85b3fd62ea1a	4	* @author MCD Application Team
NYX	0:85b3fd62ea1a	5	* @version V1.7.1
NYX	0:85b3fd62ea1a	6	* @date 14-April-2017
NYX	0:85b3fd62ea1a	7	* @brief I2C HAL module driver.
NYX	0:85b3fd62ea1a	8	* This file provides firmware functions to manage the following
NYX	0:85b3fd62ea1a	9	* functionalities of the Inter Integrated Circuit (I2C) peripheral:
NYX	0:85b3fd62ea1a	10	* + Initialization and de-initialization functions
NYX	0:85b3fd62ea1a	11	* + IO operation functions
NYX	0:85b3fd62ea1a	12	* + Peripheral State, Mode and Error functions
NYX	0:85b3fd62ea1a	13	*
NYX	0:85b3fd62ea1a	14	@verbatim
NYX	0:85b3fd62ea1a	15	==============================================================================
NYX	0:85b3fd62ea1a	16	##### How to use this driver #####
NYX	0:85b3fd62ea1a	17	==============================================================================
NYX	0:85b3fd62ea1a	18	[..]
NYX	0:85b3fd62ea1a	19	The I2C HAL driver can be used as follows:
NYX	0:85b3fd62ea1a	20
NYX	0:85b3fd62ea1a	21	(#) Declare a I2C_HandleTypeDef handle structure, for example:
NYX	0:85b3fd62ea1a	22	I2C_HandleTypeDef hi2c;
NYX	0:85b3fd62ea1a	23
NYX	0:85b3fd62ea1a	24	(#)Initialize the I2C low level resources by implementing the HAL_I2C_MspInit() API:
NYX	0:85b3fd62ea1a	25	(##) Enable the I2Cx interface clock
NYX	0:85b3fd62ea1a	26	(##) I2C pins configuration
NYX	0:85b3fd62ea1a	27	(+++) Enable the clock for the I2C GPIOs
NYX	0:85b3fd62ea1a	28	(+++) Configure I2C pins as alternate function open-drain
NYX	0:85b3fd62ea1a	29	(##) NVIC configuration if you need to use interrupt process
NYX	0:85b3fd62ea1a	30	(+++) Configure the I2Cx interrupt priority
NYX	0:85b3fd62ea1a	31	(+++) Enable the NVIC I2C IRQ Channel
NYX	0:85b3fd62ea1a	32	(##) DMA Configuration if you need to use DMA process
NYX	0:85b3fd62ea1a	33	(+++) Declare a DMA_HandleTypeDef handle structure for the transmit or receive stream
NYX	0:85b3fd62ea1a	34	(+++) Enable the DMAx interface clock using
NYX	0:85b3fd62ea1a	35	(+++) Configure the DMA handle parameters
NYX	0:85b3fd62ea1a	36	(+++) Configure the DMA Tx or Rx Stream
NYX	0:85b3fd62ea1a	37	(+++) Associate the initialized DMA handle to the hi2c DMA Tx or Rx handle
NYX	0:85b3fd62ea1a	38	(+++) Configure the priority and enable the NVIC for the transfer complete interrupt on
NYX	0:85b3fd62ea1a	39	the DMA Tx or Rx Stream
NYX	0:85b3fd62ea1a	40
NYX	0:85b3fd62ea1a	41	(#) Configure the Communication Speed, Duty cycle, Addressing mode, Own Address1,
NYX	0:85b3fd62ea1a	42	Dual Addressing mode, Own Address2, General call and Nostretch mode in the hi2c Init structure.
NYX	0:85b3fd62ea1a	43
NYX	0:85b3fd62ea1a	44	(#) Initialize the I2C registers by calling the HAL_I2C_Init(), configures also the low level Hardware
NYX	0:85b3fd62ea1a	45	(GPIO, CLOCK, NVIC...etc) by calling the customized HAL_I2C_MspInit(&hi2c) API.
NYX	0:85b3fd62ea1a	46
NYX	0:85b3fd62ea1a	47	(#) To check if target device is ready for communication, use the function HAL_I2C_IsDeviceReady()
NYX	0:85b3fd62ea1a	48
NYX	0:85b3fd62ea1a	49	(#) For I2C IO and IO MEM operations, three operation modes are available within this driver :
NYX	0:85b3fd62ea1a	50
NYX	0:85b3fd62ea1a	51	* Polling mode IO operation *
NYX	0:85b3fd62ea1a	52	=================================
NYX	0:85b3fd62ea1a	53	[..]
NYX	0:85b3fd62ea1a	54	(+) Transmit in master mode an amount of data in blocking mode using HAL_I2C_Master_Transmit()
NYX	0:85b3fd62ea1a	55	(+) Receive in master mode an amount of data in blocking mode using HAL_I2C_Master_Receive()
NYX	0:85b3fd62ea1a	56	(+) Transmit in slave mode an amount of data in blocking mode using HAL_I2C_Slave_Transmit()
NYX	0:85b3fd62ea1a	57	(+) Receive in slave mode an amount of data in blocking mode using HAL_I2C_Slave_Receive()
NYX	0:85b3fd62ea1a	58
NYX	0:85b3fd62ea1a	59	* Polling mode IO MEM operation *
NYX	0:85b3fd62ea1a	60	=====================================
NYX	0:85b3fd62ea1a	61	[..]
NYX	0:85b3fd62ea1a	62	(+) Write an amount of data in blocking mode to a specific memory address using HAL_I2C_Mem_Write()
NYX	0:85b3fd62ea1a	63	(+) Read an amount of data in blocking mode from a specific memory address using HAL_I2C_Mem_Read()
NYX	0:85b3fd62ea1a	64
NYX	0:85b3fd62ea1a	65
NYX	0:85b3fd62ea1a	66	* Interrupt mode IO operation *
NYX	0:85b3fd62ea1a	67	===================================
NYX	0:85b3fd62ea1a	68	[..]
NYX	0:85b3fd62ea1a	69	(+) Transmit in master mode an amount of data in non blocking mode using HAL_I2C_Master_Transmit_IT()
NYX	0:85b3fd62ea1a	70	(+) At transmission end of transfer HAL_I2C_MasterTxCpltCallback is executed and user can
NYX	0:85b3fd62ea1a	71	add his own code by customization of function pointer HAL_I2C_MasterTxCpltCallback
NYX	0:85b3fd62ea1a	72	(+) Receive in master mode an amount of data in non blocking mode using HAL_I2C_Master_Receive_IT()
NYX	0:85b3fd62ea1a	73	(+) At reception end of transfer HAL_I2C_MasterRxCpltCallback is executed and user can
NYX	0:85b3fd62ea1a	74	add his own code by customization of function pointer HAL_I2C_MasterRxCpltCallback
NYX	0:85b3fd62ea1a	75	(+) Transmit in slave mode an amount of data in non blocking mode using HAL_I2C_Slave_Transmit_IT()
NYX	0:85b3fd62ea1a	76	(+) At transmission end of transfer HAL_I2C_SlaveTxCpltCallback is executed and user can
NYX	0:85b3fd62ea1a	77	add his own code by customization of function pointer HAL_I2C_SlaveTxCpltCallback
NYX	0:85b3fd62ea1a	78	(+) Receive in slave mode an amount of data in non blocking mode using HAL_I2C_Slave_Receive_IT()
NYX	0:85b3fd62ea1a	79	(+) At reception end of transfer HAL_I2C_SlaveRxCpltCallback is executed and user can
NYX	0:85b3fd62ea1a	80	add his own code by customization of function pointer HAL_I2C_SlaveRxCpltCallback
NYX	0:85b3fd62ea1a	81	(+) In case of transfer Error, HAL_I2C_ErrorCallback() function is executed and user can
NYX	0:85b3fd62ea1a	82	add his own code by customization of function pointer HAL_I2C_ErrorCallback
NYX	0:85b3fd62ea1a	83	(+) Abort a master I2C process communication with Interrupt using HAL_I2C_Master_Abort_IT()
NYX	0:85b3fd62ea1a	84	(+) End of abort process, HAL_I2C_AbortCpltCallback() is executed and user can
NYX	0:85b3fd62ea1a	85	add his own code by customization of function pointer HAL_I2C_AbortCpltCallback()
NYX	0:85b3fd62ea1a	86
NYX	0:85b3fd62ea1a	87	* Interrupt mode IO sequential operation *
NYX	0:85b3fd62ea1a	88	==============================================
NYX	0:85b3fd62ea1a	89	[..]
NYX	0:85b3fd62ea1a	90	(@) These interfaces allow to manage a sequential transfer with a repeated start condition
NYX	0:85b3fd62ea1a	91	when a direction change during transfer
NYX	0:85b3fd62ea1a	92	[..]
NYX	0:85b3fd62ea1a	93	(+) A specific option field manage the different steps of a sequential transfer
NYX	0:85b3fd62ea1a	94	(+) Option field values are defined through @ref I2C_XFEROPTIONS and are listed below:
NYX	0:85b3fd62ea1a	95	(++) I2C_FIRST_AND_LAST_FRAME: No sequential usage, functionnal is same as associated interfaces in no sequential mode
NYX	0:85b3fd62ea1a	96	(++) I2C_FIRST_FRAME: Sequential usage, this option allow to manage a sequence with start condition, address
NYX	0:85b3fd62ea1a	97	and data to transfer without a final stop condition
NYX	0:85b3fd62ea1a	98	(++) I2C_NEXT_FRAME: Sequential usage, this option allow to manage a sequence with a restart condition, address
NYX	0:85b3fd62ea1a	99	and with new data to transfer if the direction change or manage only the new data to transfer
NYX	0:85b3fd62ea1a	100	if no direction change and without a final stop condition in both cases
NYX	0:85b3fd62ea1a	101	(++) I2C_LAST_FRAME: Sequential usage, this option allow to manage a sequance with a restart condition, address
NYX	0:85b3fd62ea1a	102	and with new data to transfer if the direction change or manage only the new data to transfer
NYX	0:85b3fd62ea1a	103	if no direction change and with a final stop condition in both cases
NYX	0:85b3fd62ea1a	104
NYX	0:85b3fd62ea1a	105	(+) Differents sequential I2C interfaces are listed below:
NYX	0:85b3fd62ea1a	106	(++) Sequential transmit in master I2C mode an amount of data in non-blocking mode using HAL_I2C_Master_Sequential_Transmit_IT()
NYX	0:85b3fd62ea1a	107	(+++) At transmission end of current frame transfer, HAL_I2C_MasterTxCpltCallback() is executed and user can
NYX	0:85b3fd62ea1a	108	add his own code by customization of function pointer HAL_I2C_MasterTxCpltCallback()
NYX	0:85b3fd62ea1a	109	(++) Sequential receive in master I2C mode an amount of data in non-blocking mode using HAL_I2C_Master_Sequential_Receive_IT()
NYX	0:85b3fd62ea1a	110	(+++) At reception end of current frame transfer, HAL_I2C_MasterRxCpltCallback() is executed and user can
NYX	0:85b3fd62ea1a	111	add his own code by customization of function pointer HAL_I2C_MasterRxCpltCallback()
NYX	0:85b3fd62ea1a	112	(++) Abort a master I2C process communication with Interrupt using HAL_I2C_Master_Abort_IT()
NYX	0:85b3fd62ea1a	113	(+++) End of abort process, HAL_I2C_AbortCpltCallback() is executed and user can
NYX	0:85b3fd62ea1a	114	add his own code by customization of function pointer HAL_I2C_AbortCpltCallback()
NYX	0:85b3fd62ea1a	115	(++) Enable/disable the Address listen mode in slave I2C mode using HAL_I2C_EnableListen_IT() HAL_I2C_DisableListen_IT()
NYX	0:85b3fd62ea1a	116	(+++) When address slave I2C match, HAL_I2C_AddrCallback() is executed and user can
NYX	0:85b3fd62ea1a	117	add his own code to check the Address Match Code and the transmission direction request by master (Write/Read).
NYX	0:85b3fd62ea1a	118	(+++) At Listen mode end HAL_I2C_ListenCpltCallback() is executed and user can
NYX	0:85b3fd62ea1a	119	add his own code by customization of function pointer HAL_I2C_ListenCpltCallback()
NYX	0:85b3fd62ea1a	120	(++) Sequential transmit in slave I2C mode an amount of data in non-blocking mode using HAL_I2C_Slave_Sequential_Transmit_IT()
NYX	0:85b3fd62ea1a	121	(+++) At transmission end of current frame transfer, HAL_I2C_SlaveTxCpltCallback() is executed and user can
NYX	0:85b3fd62ea1a	122	add his own code by customization of function pointer HAL_I2C_SlaveTxCpltCallback()
NYX	0:85b3fd62ea1a	123	(++) Sequential receive in slave I2C mode an amount of data in non-blocking mode using HAL_I2C_Slave_Sequential_Receive_IT()
NYX	0:85b3fd62ea1a	124	(+++) At reception end of current frame transfer, HAL_I2C_SlaveRxCpltCallback() is executed and user can
NYX	0:85b3fd62ea1a	125	add his own code by customization of function pointer HAL_I2C_SlaveRxCpltCallback()
NYX	0:85b3fd62ea1a	126	(++) In case of transfer Error, HAL_I2C_ErrorCallback() function is executed and user can
NYX	0:85b3fd62ea1a	127	add his own code by customization of function pointer HAL_I2C_ErrorCallback()
NYX	0:85b3fd62ea1a	128	(++) Abort a master I2C process communication with Interrupt using HAL_I2C_Master_Abort_IT()
NYX	0:85b3fd62ea1a	129	(++) End of abort process, HAL_I2C_AbortCpltCallback() is executed and user can
NYX	0:85b3fd62ea1a	130	add his own code by customization of function pointer HAL_I2C_AbortCpltCallback()
NYX	0:85b3fd62ea1a	131
NYX	0:85b3fd62ea1a	132	* Interrupt mode IO MEM operation *
NYX	0:85b3fd62ea1a	133	=======================================
NYX	0:85b3fd62ea1a	134	[..]
NYX	0:85b3fd62ea1a	135	(+) Write an amount of data in no-blocking mode with Interrupt to a specific memory address using
NYX	0:85b3fd62ea1a	136	HAL_I2C_Mem_Write_IT()
NYX	0:85b3fd62ea1a	137	(+) At MEM end of write transfer HAL_I2C_MemTxCpltCallback is executed and user can
NYX	0:85b3fd62ea1a	138	add his own code by customization of function pointer HAL_I2C_MemTxCpltCallback
NYX	0:85b3fd62ea1a	139	(+) Read an amount of data in no-blocking mode with Interrupt from a specific memory address using
NYX	0:85b3fd62ea1a	140	HAL_I2C_Mem_Read_IT()
NYX	0:85b3fd62ea1a	141	(+) At MEM end of read transfer HAL_I2C_MemRxCpltCallback is executed and user can
NYX	0:85b3fd62ea1a	142	add his own code by customization of function pointer HAL_I2C_MemRxCpltCallback
NYX	0:85b3fd62ea1a	143	(+) In case of transfer Error, HAL_I2C_ErrorCallback() function is executed and user can
NYX	0:85b3fd62ea1a	144	add his own code by customization of function pointer HAL_I2C_ErrorCallback
NYX	0:85b3fd62ea1a	145
NYX	0:85b3fd62ea1a	146	* DMA mode IO operation *
NYX	0:85b3fd62ea1a	147	==============================
NYX	0:85b3fd62ea1a	148	[..]
NYX	0:85b3fd62ea1a	149	(+) Transmit in master mode an amount of data in non blocking mode (DMA) using
NYX	0:85b3fd62ea1a	150	HAL_I2C_Master_Transmit_DMA()
NYX	0:85b3fd62ea1a	151	(+) At transmission end of transfer HAL_I2C_MasterTxCpltCallback is executed and user can
NYX	0:85b3fd62ea1a	152	add his own code by customization of function pointer HAL_I2C_MasterTxCpltCallback
NYX	0:85b3fd62ea1a	153	(+) Receive in master mode an amount of data in non blocking mode (DMA) using
NYX	0:85b3fd62ea1a	154	HAL_I2C_Master_Receive_DMA()
NYX	0:85b3fd62ea1a	155	(+) At reception end of transfer HAL_I2C_MasterRxCpltCallback is executed and user can
NYX	0:85b3fd62ea1a	156	add his own code by customization of function pointer HAL_I2C_MasterRxCpltCallback
NYX	0:85b3fd62ea1a	157	(+) Transmit in slave mode an amount of data in non blocking mode (DMA) using
NYX	0:85b3fd62ea1a	158	HAL_I2C_Slave_Transmit_DMA()
NYX	0:85b3fd62ea1a	159	(+) At transmission end of transfer HAL_I2C_SlaveTxCpltCallback is executed and user can
NYX	0:85b3fd62ea1a	160	add his own code by customization of function pointer HAL_I2C_SlaveTxCpltCallback
NYX	0:85b3fd62ea1a	161	(+) Receive in slave mode an amount of data in non blocking mode (DMA) using
NYX	0:85b3fd62ea1a	162	HAL_I2C_Slave_Receive_DMA()
NYX	0:85b3fd62ea1a	163	(+) At reception end of transfer HAL_I2C_SlaveRxCpltCallback is executed and user can
NYX	0:85b3fd62ea1a	164	add his own code by customization of function pointer HAL_I2C_SlaveRxCpltCallback
NYX	0:85b3fd62ea1a	165	(+) In case of transfer Error, HAL_I2C_ErrorCallback() function is executed and user can
NYX	0:85b3fd62ea1a	166	add his own code by customization of function pointer HAL_I2C_ErrorCallback
NYX	0:85b3fd62ea1a	167	(+) Abort a master I2C process communication with Interrupt using HAL_I2C_Master_Abort_IT()
NYX	0:85b3fd62ea1a	168	(+) End of abort process, HAL_I2C_AbortCpltCallback() is executed and user can
NYX	0:85b3fd62ea1a	169	add his own code by customization of function pointer HAL_I2C_AbortCpltCallback()
NYX	0:85b3fd62ea1a	170
NYX	0:85b3fd62ea1a	171	* DMA mode IO MEM operation *
NYX	0:85b3fd62ea1a	172	=================================
NYX	0:85b3fd62ea1a	173	[..]
NYX	0:85b3fd62ea1a	174	(+) Write an amount of data in no-blocking mode with DMA to a specific memory address using
NYX	0:85b3fd62ea1a	175	HAL_I2C_Mem_Write_DMA()
NYX	0:85b3fd62ea1a	176	(+) At MEM end of write transfer HAL_I2C_MemTxCpltCallback is executed and user can
NYX	0:85b3fd62ea1a	177	add his own code by customization of function pointer HAL_I2C_MemTxCpltCallback
NYX	0:85b3fd62ea1a	178	(+) Read an amount of data in no-blocking mode with DMA from a specific memory address using
NYX	0:85b3fd62ea1a	179	HAL_I2C_Mem_Read_DMA()
NYX	0:85b3fd62ea1a	180	(+) At MEM end of read transfer HAL_I2C_MemRxCpltCallback is executed and user can
NYX	0:85b3fd62ea1a	181	add his own code by customization of function pointer HAL_I2C_MemRxCpltCallback
NYX	0:85b3fd62ea1a	182	(+) In case of transfer Error, HAL_I2C_ErrorCallback() function is executed and user can
NYX	0:85b3fd62ea1a	183	add his own code by customization of function pointer HAL_I2C_ErrorCallback
NYX	0:85b3fd62ea1a	184
NYX	0:85b3fd62ea1a	185
NYX	0:85b3fd62ea1a	186	* I2C HAL driver macros list *
NYX	0:85b3fd62ea1a	187	==================================
NYX	0:85b3fd62ea1a	188	[..]
NYX	0:85b3fd62ea1a	189	Below the list of most used macros in I2C HAL driver.
NYX	0:85b3fd62ea1a	190
NYX	0:85b3fd62ea1a	191	(+) __HAL_I2C_ENABLE: Enable the I2C peripheral
NYX	0:85b3fd62ea1a	192	(+) __HAL_I2C_DISABLE: Disable the I2C peripheral
NYX	0:85b3fd62ea1a	193	(+) __HAL_I2C_GET_FLAG : Checks whether the specified I2C flag is set or not
NYX	0:85b3fd62ea1a	194	(+) __HAL_I2C_CLEAR_FLAG : Clear the specified I2C pending flag
NYX	0:85b3fd62ea1a	195	(+) __HAL_I2C_ENABLE_IT: Enable the specified I2C interrupt
NYX	0:85b3fd62ea1a	196	(+) __HAL_I2C_DISABLE_IT: Disable the specified I2C interrupt
NYX	0:85b3fd62ea1a	197
NYX	0:85b3fd62ea1a	198	[..]
NYX	0:85b3fd62ea1a	199	(@) You can refer to the I2C HAL driver header file for more useful macros
NYX	0:85b3fd62ea1a	200
NYX	0:85b3fd62ea1a	201
NYX	0:85b3fd62ea1a	202	@endverbatim
NYX	0:85b3fd62ea1a	203	******************************************************************************
NYX	0:85b3fd62ea1a	204	* @attention
NYX	0:85b3fd62ea1a	205	*
NYX	0:85b3fd62ea1a	206	* <h2><center>© COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
NYX	0:85b3fd62ea1a	207	*
NYX	0:85b3fd62ea1a	208	* Redistribution and use in source and binary forms, with or without modification,
NYX	0:85b3fd62ea1a	209	* are permitted provided that the following conditions are met:
NYX	0:85b3fd62ea1a	210	* 1. Redistributions of source code must retain the above copyright notice,
NYX	0:85b3fd62ea1a	211	* this list of conditions and the following disclaimer.
NYX	0:85b3fd62ea1a	212	* 2. Redistributions in binary form must reproduce the above copyright notice,
NYX	0:85b3fd62ea1a	213	* this list of conditions and the following disclaimer in the documentation
NYX	0:85b3fd62ea1a	214	* and/or other materials provided with the distribution.
NYX	0:85b3fd62ea1a	215	* 3. Neither the name of STMicroelectronics nor the names of its contributors
NYX	0:85b3fd62ea1a	216	* may be used to endorse or promote products derived from this software
NYX	0:85b3fd62ea1a	217	* without specific prior written permission.
NYX	0:85b3fd62ea1a	218	*
NYX	0:85b3fd62ea1a	219	* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
NYX	0:85b3fd62ea1a	220	* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
NYX	0:85b3fd62ea1a	221	* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
NYX	0:85b3fd62ea1a	222	* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
NYX	0:85b3fd62ea1a	223	* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
NYX	0:85b3fd62ea1a	224	* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
NYX	0:85b3fd62ea1a	225	* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
NYX	0:85b3fd62ea1a	226	* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
NYX	0:85b3fd62ea1a	227	* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
NYX	0:85b3fd62ea1a	228	* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
NYX	0:85b3fd62ea1a	229	*
NYX	0:85b3fd62ea1a	230	******************************************************************************
NYX	0:85b3fd62ea1a	231	*/
NYX	0:85b3fd62ea1a	232
NYX	0:85b3fd62ea1a	233	/* Includes ------------------------------------------------------------------*/
NYX	0:85b3fd62ea1a	234	#include "stm32f4xx_hal.h"
NYX	0:85b3fd62ea1a	235
NYX	0:85b3fd62ea1a	236	/** @addtogroup STM32F4xx_HAL_Driver
NYX	0:85b3fd62ea1a	237	* @{
NYX	0:85b3fd62ea1a	238	*/
NYX	0:85b3fd62ea1a	239
NYX	0:85b3fd62ea1a	240	/** @defgroup I2C I2C
NYX	0:85b3fd62ea1a	241	* @brief I2C HAL module driver
NYX	0:85b3fd62ea1a	242	* @{
NYX	0:85b3fd62ea1a	243	*/
NYX	0:85b3fd62ea1a	244
NYX	0:85b3fd62ea1a	245	#ifdef HAL_I2C_MODULE_ENABLED
NYX	0:85b3fd62ea1a	246
NYX	0:85b3fd62ea1a	247	/* Private typedef -----------------------------------------------------------*/
NYX	0:85b3fd62ea1a	248	/* Private define ------------------------------------------------------------*/
NYX	0:85b3fd62ea1a	249	/** @addtogroup I2C_Private_Define
NYX	0:85b3fd62ea1a	250	* @{
NYX	0:85b3fd62ea1a	251	*/
NYX	0:85b3fd62ea1a	252	#define I2C_TIMEOUT_FLAG 35U /!< Timeout 35 ms /
NYX	0:85b3fd62ea1a	253	#define I2C_TIMEOUT_BUSY_FLAG 25U /!< Timeout 25 ms /
NYX	0:85b3fd62ea1a	254	#define I2C_NO_OPTION_FRAME 0xFFFF0000U /!< XferOptions default value /
NYX	0:85b3fd62ea1a	255
NYX	0:85b3fd62ea1a	256	/* Private define for @ref PreviousState usage */
NYX	0:85b3fd62ea1a	257	#define I2C_STATE_MSK ((uint32_t)((HAL_I2C_STATE_BUSY_TX \| HAL_I2C_STATE_BUSY_RX) & (~(uint32_t)HAL_I2C_STATE_READY))) /!< Mask State define, keep only RX and TX bits /
NYX	0:85b3fd62ea1a	258	#define I2C_STATE_NONE ((uint32_t)(HAL_I2C_MODE_NONE)) /!< Default Value /
NYX	0:85b3fd62ea1a	259	#define I2C_STATE_MASTER_BUSY_TX ((uint32_t)((HAL_I2C_STATE_BUSY_TX & I2C_STATE_MSK) \| HAL_I2C_MODE_MASTER)) /!< Master Busy TX, combinaison of State LSB and Mode enum /
NYX	0:85b3fd62ea1a	260	#define I2C_STATE_MASTER_BUSY_RX ((uint32_t)((HAL_I2C_STATE_BUSY_RX & I2C_STATE_MSK) \| HAL_I2C_MODE_MASTER)) /!< Master Busy RX, combinaison of State LSB and Mode enum /
NYX	0:85b3fd62ea1a	261	#define I2C_STATE_SLAVE_BUSY_TX ((uint32_t)((HAL_I2C_STATE_BUSY_TX & I2C_STATE_MSK) \| HAL_I2C_MODE_SLAVE)) /!< Slave Busy TX, combinaison of State LSB and Mode enum /
NYX	0:85b3fd62ea1a	262	#define I2C_STATE_SLAVE_BUSY_RX ((uint32_t)((HAL_I2C_STATE_BUSY_RX & I2C_STATE_MSK) \| HAL_I2C_MODE_SLAVE)) /!< Slave Busy RX, combinaison of State LSB and Mode enum /
NYX	0:85b3fd62ea1a	263
NYX	0:85b3fd62ea1a	264	/**
NYX	0:85b3fd62ea1a	265	* @}
NYX	0:85b3fd62ea1a	266	*/
NYX	0:85b3fd62ea1a	267
NYX	0:85b3fd62ea1a	268	/* Private macro -------------------------------------------------------------*/
NYX	0:85b3fd62ea1a	269	/* Private variables ---------------------------------------------------------*/
NYX	0:85b3fd62ea1a	270	/* Private function prototypes -----------------------------------------------*/
NYX	0:85b3fd62ea1a	271	/** @addtogroup I2C_Private_Functions
NYX	0:85b3fd62ea1a	272	* @{
NYX	0:85b3fd62ea1a	273	*/
NYX	0:85b3fd62ea1a	274	/* Private functions to handle DMA transfer */
NYX	0:85b3fd62ea1a	275	static void I2C_DMAXferCplt(DMA_HandleTypeDef *hdma);
NYX	0:85b3fd62ea1a	276	static void I2C_DMAError(DMA_HandleTypeDef *hdma);
NYX	0:85b3fd62ea1a	277	static void I2C_DMAAbort(DMA_HandleTypeDef *hdma);
NYX	0:85b3fd62ea1a	278
NYX	0:85b3fd62ea1a	279	static void I2C_ITError(I2C_HandleTypeDef *hi2c);
NYX	0:85b3fd62ea1a	280
NYX	0:85b3fd62ea1a	281	static HAL_StatusTypeDef I2C_MasterRequestWrite(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint32_t Timeout, uint32_t Tickstart);
NYX	0:85b3fd62ea1a	282	static HAL_StatusTypeDef I2C_MasterRequestRead(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint32_t Timeout, uint32_t Tickstart);
NYX	0:85b3fd62ea1a	283	static HAL_StatusTypeDef I2C_RequestMemoryWrite(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint32_t Timeout, uint32_t Tickstart);
NYX	0:85b3fd62ea1a	284	static HAL_StatusTypeDef I2C_RequestMemoryRead(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint32_t Timeout, uint32_t Tickstart);
NYX	0:85b3fd62ea1a	285	static HAL_StatusTypeDef I2C_WaitOnFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Flag, FlagStatus Status, uint32_t Timeout, uint32_t Tickstart);
NYX	0:85b3fd62ea1a	286	static HAL_StatusTypeDef I2C_WaitOnMasterAddressFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Flag, uint32_t Timeout, uint32_t Tickstart);
NYX	0:85b3fd62ea1a	287	static HAL_StatusTypeDef I2C_WaitOnTXEFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Timeout, uint32_t Tickstart);
NYX	0:85b3fd62ea1a	288	static HAL_StatusTypeDef I2C_WaitOnBTFFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Timeout, uint32_t Tickstart);
NYX	0:85b3fd62ea1a	289	static HAL_StatusTypeDef I2C_WaitOnRXNEFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Timeout, uint32_t Tickstart);
NYX	0:85b3fd62ea1a	290	static HAL_StatusTypeDef I2C_WaitOnSTOPFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Timeout, uint32_t Tickstart);
NYX	0:85b3fd62ea1a	291	static HAL_StatusTypeDef I2C_IsAcknowledgeFailed(I2C_HandleTypeDef *hi2c);
NYX	0:85b3fd62ea1a	292
NYX	0:85b3fd62ea1a	293	/* Private functions for I2C transfer IRQ handler */
NYX	0:85b3fd62ea1a	294	static HAL_StatusTypeDef I2C_MasterTransmit_TXE(I2C_HandleTypeDef *hi2c);
NYX	0:85b3fd62ea1a	295	static HAL_StatusTypeDef I2C_MasterTransmit_BTF(I2C_HandleTypeDef *hi2c);
NYX	0:85b3fd62ea1a	296	static HAL_StatusTypeDef I2C_MasterReceive_RXNE(I2C_HandleTypeDef *hi2c);
NYX	0:85b3fd62ea1a	297	static HAL_StatusTypeDef I2C_MasterReceive_BTF(I2C_HandleTypeDef *hi2c);
NYX	0:85b3fd62ea1a	298	static HAL_StatusTypeDef I2C_Master_SB(I2C_HandleTypeDef *hi2c);
NYX	0:85b3fd62ea1a	299	static HAL_StatusTypeDef I2C_Master_ADD10(I2C_HandleTypeDef *hi2c);
NYX	0:85b3fd62ea1a	300	static HAL_StatusTypeDef I2C_Master_ADDR(I2C_HandleTypeDef *hi2c);
NYX	0:85b3fd62ea1a	301
NYX	0:85b3fd62ea1a	302	static HAL_StatusTypeDef I2C_SlaveTransmit_TXE(I2C_HandleTypeDef *hi2c);
NYX	0:85b3fd62ea1a	303	static HAL_StatusTypeDef I2C_SlaveTransmit_BTF(I2C_HandleTypeDef *hi2c);
NYX	0:85b3fd62ea1a	304	static HAL_StatusTypeDef I2C_SlaveReceive_RXNE(I2C_HandleTypeDef *hi2c);
NYX	0:85b3fd62ea1a	305	static HAL_StatusTypeDef I2C_SlaveReceive_BTF(I2C_HandleTypeDef *hi2c);
NYX	0:85b3fd62ea1a	306	static HAL_StatusTypeDef I2C_Slave_ADDR(I2C_HandleTypeDef *hi2c);
NYX	0:85b3fd62ea1a	307	static HAL_StatusTypeDef I2C_Slave_STOPF(I2C_HandleTypeDef *hi2c);
NYX	0:85b3fd62ea1a	308	static HAL_StatusTypeDef I2C_Slave_AF(I2C_HandleTypeDef *hi2c);
NYX	0:85b3fd62ea1a	309	/**
NYX	0:85b3fd62ea1a	310	* @}
NYX	0:85b3fd62ea1a	311	*/
NYX	0:85b3fd62ea1a	312
NYX	0:85b3fd62ea1a	313	/* Exported functions --------------------------------------------------------*/
NYX	0:85b3fd62ea1a	314	/** @defgroup I2C_Exported_Functions I2C Exported Functions
NYX	0:85b3fd62ea1a	315	* @{
NYX	0:85b3fd62ea1a	316	*/
NYX	0:85b3fd62ea1a	317
NYX	0:85b3fd62ea1a	318	/** @defgroup I2C_Exported_Functions_Group1 Initialization and de-initialization functions
NYX	0:85b3fd62ea1a	319	* @brief Initialization and Configuration functions
NYX	0:85b3fd62ea1a	320	*
NYX	0:85b3fd62ea1a	321	@verbatim
NYX	0:85b3fd62ea1a	322	===============================================================================
NYX	0:85b3fd62ea1a	323	##### Initialization and de-initialization functions #####
NYX	0:85b3fd62ea1a	324	===============================================================================
NYX	0:85b3fd62ea1a	325	[..] This subsection provides a set of functions allowing to initialize and
NYX	0:85b3fd62ea1a	326	de-initialize the I2Cx peripheral:
NYX	0:85b3fd62ea1a	327
NYX	0:85b3fd62ea1a	328	(+) User must Implement HAL_I2C_MspInit() function in which he configures
NYX	0:85b3fd62ea1a	329	all related peripherals resources (CLOCK, GPIO, DMA, IT and NVIC).
NYX	0:85b3fd62ea1a	330
NYX	0:85b3fd62ea1a	331	(+) Call the function HAL_I2C_Init() to configure the selected device with
NYX	0:85b3fd62ea1a	332	the selected configuration:
NYX	0:85b3fd62ea1a	333	(++) Communication Speed
NYX	0:85b3fd62ea1a	334	(++) Duty cycle
NYX	0:85b3fd62ea1a	335	(++) Addressing mode
NYX	0:85b3fd62ea1a	336	(++) Own Address 1
NYX	0:85b3fd62ea1a	337	(++) Dual Addressing mode
NYX	0:85b3fd62ea1a	338	(++) Own Address 2
NYX	0:85b3fd62ea1a	339	(++) General call mode
NYX	0:85b3fd62ea1a	340	(++) Nostretch mode
NYX	0:85b3fd62ea1a	341
NYX	0:85b3fd62ea1a	342	(+) Call the function HAL_I2C_DeInit() to restore the default configuration
NYX	0:85b3fd62ea1a	343	of the selected I2Cx peripheral.
NYX	0:85b3fd62ea1a	344
NYX	0:85b3fd62ea1a	345	@endverbatim
NYX	0:85b3fd62ea1a	346	* @{
NYX	0:85b3fd62ea1a	347	*/
NYX	0:85b3fd62ea1a	348
NYX	0:85b3fd62ea1a	349	/**
NYX	0:85b3fd62ea1a	350	* @brief Initializes the I2C according to the specified parameters
NYX	0:85b3fd62ea1a	351	* in the I2C_InitTypeDef and create the associated handle.
NYX	0:85b3fd62ea1a	352	* @param hi2c: pointer to a I2C_HandleTypeDef structure that contains
NYX	0:85b3fd62ea1a	353	* the configuration information for I2C module
NYX	0:85b3fd62ea1a	354	* @retval HAL status
NYX	0:85b3fd62ea1a	355	*/
NYX	0:85b3fd62ea1a	356	HAL_StatusTypeDef HAL_I2C_Init(I2C_HandleTypeDef *hi2c)
NYX	0:85b3fd62ea1a	357	{
NYX	0:85b3fd62ea1a	358	uint32_t freqrange = 0U;
NYX	0:85b3fd62ea1a	359	uint32_t pclk1 = 0U;
NYX	0:85b3fd62ea1a	360
NYX	0:85b3fd62ea1a	361	/* Check the I2C handle allocation */
NYX	0:85b3fd62ea1a	362	if(hi2c == NULL)
NYX	0:85b3fd62ea1a	363	{
NYX	0:85b3fd62ea1a	364	return HAL_ERROR;
NYX	0:85b3fd62ea1a	365	}
NYX	0:85b3fd62ea1a	366
NYX	0:85b3fd62ea1a	367	/* Check the parameters */
NYX	0:85b3fd62ea1a	368	assert_param(IS_I2C_ALL_INSTANCE(hi2c->Instance));
NYX	0:85b3fd62ea1a	369	assert_param(IS_I2C_CLOCK_SPEED(hi2c->Init.ClockSpeed));
NYX	0:85b3fd62ea1a	370	assert_param(IS_I2C_DUTY_CYCLE(hi2c->Init.DutyCycle));
NYX	0:85b3fd62ea1a	371	assert_param(IS_I2C_OWN_ADDRESS1(hi2c->Init.OwnAddress1));
NYX	0:85b3fd62ea1a	372	assert_param(IS_I2C_ADDRESSING_MODE(hi2c->Init.AddressingMode));
NYX	0:85b3fd62ea1a	373	assert_param(IS_I2C_DUAL_ADDRESS(hi2c->Init.DualAddressMode));
NYX	0:85b3fd62ea1a	374	assert_param(IS_I2C_OWN_ADDRESS2(hi2c->Init.OwnAddress2));
NYX	0:85b3fd62ea1a	375	assert_param(IS_I2C_GENERAL_CALL(hi2c->Init.GeneralCallMode));
NYX	0:85b3fd62ea1a	376	assert_param(IS_I2C_NO_STRETCH(hi2c->Init.NoStretchMode));
NYX	0:85b3fd62ea1a	377
NYX	0:85b3fd62ea1a	378	if(hi2c->State == HAL_I2C_STATE_RESET)
NYX	0:85b3fd62ea1a	379	{
NYX	0:85b3fd62ea1a	380	/* Allocate lock resource and initialize it */
NYX	0:85b3fd62ea1a	381	hi2c->Lock = HAL_UNLOCKED;
NYX	0:85b3fd62ea1a	382	/* Init the low level hardware : GPIO, CLOCK, NVIC */
NYX	0:85b3fd62ea1a	383	HAL_I2C_MspInit(hi2c);
NYX	0:85b3fd62ea1a	384	}
NYX	0:85b3fd62ea1a	385
NYX	0:85b3fd62ea1a	386	hi2c->State = HAL_I2C_STATE_BUSY;
NYX	0:85b3fd62ea1a	387
NYX	0:85b3fd62ea1a	388	/* Disable the selected I2C peripheral */
NYX	0:85b3fd62ea1a	389	__HAL_I2C_DISABLE(hi2c);
NYX	0:85b3fd62ea1a	390
NYX	0:85b3fd62ea1a	391	/* Get PCLK1 frequency */
NYX	0:85b3fd62ea1a	392	pclk1 = HAL_RCC_GetPCLK1Freq();
NYX	0:85b3fd62ea1a	393
NYX	0:85b3fd62ea1a	394	/* Calculate frequency range */
NYX	0:85b3fd62ea1a	395	freqrange = I2C_FREQRANGE(pclk1);
NYX	0:85b3fd62ea1a	396
NYX	0:85b3fd62ea1a	397	/---------------------------- I2Cx CR2 Configuration ----------------------/
NYX	0:85b3fd62ea1a	398	/* Configure I2Cx: Frequency range */
NYX	0:85b3fd62ea1a	399	hi2c->Instance->CR2 = freqrange;
NYX	0:85b3fd62ea1a	400
NYX	0:85b3fd62ea1a	401	/---------------------------- I2Cx TRISE Configuration --------------------/
NYX	0:85b3fd62ea1a	402	/* Configure I2Cx: Rise Time */
NYX	0:85b3fd62ea1a	403	hi2c->Instance->TRISE = I2C_RISE_TIME(freqrange, hi2c->Init.ClockSpeed);
NYX	0:85b3fd62ea1a	404
NYX	0:85b3fd62ea1a	405	/---------------------------- I2Cx CCR Configuration ----------------------/
NYX	0:85b3fd62ea1a	406	/* Configure I2Cx: Speed */
NYX	0:85b3fd62ea1a	407	hi2c->Instance->CCR = I2C_SPEED(pclk1, hi2c->Init.ClockSpeed, hi2c->Init.DutyCycle);
NYX	0:85b3fd62ea1a	408
NYX	0:85b3fd62ea1a	409	/---------------------------- I2Cx CR1 Configuration ----------------------/
NYX	0:85b3fd62ea1a	410	/* Configure I2Cx: Generalcall and NoStretch mode */
NYX	0:85b3fd62ea1a	411	hi2c->Instance->CR1 = (hi2c->Init.GeneralCallMode \| hi2c->Init.NoStretchMode);
NYX	0:85b3fd62ea1a	412
NYX	0:85b3fd62ea1a	413	/---------------------------- I2Cx OAR1 Configuration ---------------------/
NYX	0:85b3fd62ea1a	414	/* Configure I2Cx: Own Address1 and addressing mode */
NYX	0:85b3fd62ea1a	415	hi2c->Instance->OAR1 = (hi2c->Init.AddressingMode \| hi2c->Init.OwnAddress1);
NYX	0:85b3fd62ea1a	416
NYX	0:85b3fd62ea1a	417	/---------------------------- I2Cx OAR2 Configuration ---------------------/
NYX	0:85b3fd62ea1a	418	/* Configure I2Cx: Dual mode and Own Address2 */
NYX	0:85b3fd62ea1a	419	hi2c->Instance->OAR2 = (hi2c->Init.DualAddressMode \| hi2c->Init.OwnAddress2);
NYX	0:85b3fd62ea1a	420
NYX	0:85b3fd62ea1a	421	/* Enable the selected I2C peripheral */
NYX	0:85b3fd62ea1a	422	__HAL_I2C_ENABLE(hi2c);
NYX	0:85b3fd62ea1a	423
NYX	0:85b3fd62ea1a	424	hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
NYX	0:85b3fd62ea1a	425	hi2c->State = HAL_I2C_STATE_READY;
NYX	0:85b3fd62ea1a	426	hi2c->PreviousState = I2C_STATE_NONE;
NYX	0:85b3fd62ea1a	427	hi2c->Mode = HAL_I2C_MODE_NONE;
NYX	0:85b3fd62ea1a	428
NYX	0:85b3fd62ea1a	429	return HAL_OK;
NYX	0:85b3fd62ea1a	430	}
NYX	0:85b3fd62ea1a	431
NYX	0:85b3fd62ea1a	432	/**
NYX	0:85b3fd62ea1a	433	* @brief DeInitializes the I2C peripheral.
NYX	0:85b3fd62ea1a	434	* @param hi2c: pointer to a I2C_HandleTypeDef structure that contains
NYX	0:85b3fd62ea1a	435	* the configuration information for I2C module
NYX	0:85b3fd62ea1a	436	* @retval HAL status
NYX	0:85b3fd62ea1a	437	*/
NYX	0:85b3fd62ea1a	438	HAL_StatusTypeDef HAL_I2C_DeInit(I2C_HandleTypeDef *hi2c)
NYX	0:85b3fd62ea1a	439	{
NYX	0:85b3fd62ea1a	440	/* Check the I2C handle allocation */
NYX	0:85b3fd62ea1a	441	if(hi2c == NULL)
NYX	0:85b3fd62ea1a	442	{
NYX	0:85b3fd62ea1a	443	return HAL_ERROR;
NYX	0:85b3fd62ea1a	444	}
NYX	0:85b3fd62ea1a	445
NYX	0:85b3fd62ea1a	446	/* Check the parameters */
NYX	0:85b3fd62ea1a	447	assert_param(IS_I2C_ALL_INSTANCE(hi2c->Instance));
NYX	0:85b3fd62ea1a	448
NYX	0:85b3fd62ea1a	449	hi2c->State = HAL_I2C_STATE_BUSY;
NYX	0:85b3fd62ea1a	450
NYX	0:85b3fd62ea1a	451	/* Disable the I2C Peripheral Clock */
NYX	0:85b3fd62ea1a	452	__HAL_I2C_DISABLE(hi2c);
NYX	0:85b3fd62ea1a	453
NYX	0:85b3fd62ea1a	454	/* DeInit the low level hardware: GPIO, CLOCK, NVIC */
NYX	0:85b3fd62ea1a	455	HAL_I2C_MspDeInit(hi2c);
NYX	0:85b3fd62ea1a	456
NYX	0:85b3fd62ea1a	457	hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
NYX	0:85b3fd62ea1a	458	hi2c->State = HAL_I2C_STATE_RESET;
NYX	0:85b3fd62ea1a	459	hi2c->PreviousState = I2C_STATE_NONE;
NYX	0:85b3fd62ea1a	460	hi2c->Mode = HAL_I2C_MODE_NONE;
NYX	0:85b3fd62ea1a	461
NYX	0:85b3fd62ea1a	462	/* Release Lock */
NYX	0:85b3fd62ea1a	463	__HAL_UNLOCK(hi2c);
NYX	0:85b3fd62ea1a	464
NYX	0:85b3fd62ea1a	465	return HAL_OK;
NYX	0:85b3fd62ea1a	466	}
NYX	0:85b3fd62ea1a	467
NYX	0:85b3fd62ea1a	468	/**
NYX	0:85b3fd62ea1a	469	* @brief I2C MSP Init.
NYX	0:85b3fd62ea1a	470	* @param hi2c: pointer to a I2C_HandleTypeDef structure that contains
NYX	0:85b3fd62ea1a	471	* the configuration information for I2C module
NYX	0:85b3fd62ea1a	472	* @retval None
NYX	0:85b3fd62ea1a	473	*/
NYX	0:85b3fd62ea1a	474	__weak void HAL_I2C_MspInit(I2C_HandleTypeDef *hi2c)
NYX	0:85b3fd62ea1a	475	{
NYX	0:85b3fd62ea1a	476	/* Prevent unused argument(s) compilation warning */
NYX	0:85b3fd62ea1a	477	UNUSED(hi2c);
NYX	0:85b3fd62ea1a	478	/* NOTE : This function Should not be modified, when the callback is needed,
NYX	0:85b3fd62ea1a	479	the HAL_I2C_MspInit could be implemented in the user file
NYX	0:85b3fd62ea1a	480	*/
NYX	0:85b3fd62ea1a	481	}
NYX	0:85b3fd62ea1a	482
NYX	0:85b3fd62ea1a	483	/**
NYX	0:85b3fd62ea1a	484	* @brief I2C MSP DeInit
NYX	0:85b3fd62ea1a	485	* @param hi2c: pointer to a I2C_HandleTypeDef structure that contains
NYX	0:85b3fd62ea1a	486	* the configuration information for I2C module
NYX	0:85b3fd62ea1a	487	* @retval None
NYX	0:85b3fd62ea1a	488	*/
NYX	0:85b3fd62ea1a	489	__weak void HAL_I2C_MspDeInit(I2C_HandleTypeDef *hi2c)
NYX	0:85b3fd62ea1a	490	{
NYX	0:85b3fd62ea1a	491	/* Prevent unused argument(s) compilation warning */
NYX	0:85b3fd62ea1a	492	UNUSED(hi2c);
NYX	0:85b3fd62ea1a	493	/* NOTE : This function Should not be modified, when the callback is needed,
NYX	0:85b3fd62ea1a	494	the HAL_I2C_MspDeInit could be implemented in the user file
NYX	0:85b3fd62ea1a	495	*/
NYX	0:85b3fd62ea1a	496	}
NYX	0:85b3fd62ea1a	497
NYX	0:85b3fd62ea1a	498	/**
NYX	0:85b3fd62ea1a	499	* @}
NYX	0:85b3fd62ea1a	500	*/
NYX	0:85b3fd62ea1a	501
NYX	0:85b3fd62ea1a	502	/** @defgroup I2C_Exported_Functions_Group2 IO operation functions
NYX	0:85b3fd62ea1a	503	* @brief Data transfers functions
NYX	0:85b3fd62ea1a	504	*
NYX	0:85b3fd62ea1a	505	@verbatim
NYX	0:85b3fd62ea1a	506	===============================================================================
NYX	0:85b3fd62ea1a	507	##### IO operation functions #####
NYX	0:85b3fd62ea1a	508	===============================================================================
NYX	0:85b3fd62ea1a	509	[..]
NYX	0:85b3fd62ea1a	510	This subsection provides a set of functions allowing to manage the I2C data
NYX	0:85b3fd62ea1a	511	transfers.
NYX	0:85b3fd62ea1a	512
NYX	0:85b3fd62ea1a	513	(#) There are two modes of transfer:
NYX	0:85b3fd62ea1a	514	(++) Blocking mode : The communication is performed in the polling mode.
NYX	0:85b3fd62ea1a	515	The status of all data processing is returned by the same function
NYX	0:85b3fd62ea1a	516	after finishing transfer.
NYX	0:85b3fd62ea1a	517	(++) No-Blocking mode : The communication is performed using Interrupts
NYX	0:85b3fd62ea1a	518	or DMA. These functions return the status of the transfer startup.
NYX	0:85b3fd62ea1a	519	The end of the data processing will be indicated through the
NYX	0:85b3fd62ea1a	520	dedicated I2C IRQ when using Interrupt mode or the DMA IRQ when
NYX	0:85b3fd62ea1a	521	using DMA mode.
NYX	0:85b3fd62ea1a	522
NYX	0:85b3fd62ea1a	523	(#) Blocking mode functions are :
NYX	0:85b3fd62ea1a	524	(++) HAL_I2C_Master_Transmit()
NYX	0:85b3fd62ea1a	525	(++) HAL_I2C_Master_Receive()
NYX	0:85b3fd62ea1a	526	(++) HAL_I2C_Slave_Transmit()
NYX	0:85b3fd62ea1a	527	(++) HAL_I2C_Slave_Receive()
NYX	0:85b3fd62ea1a	528	(++) HAL_I2C_Mem_Write()
NYX	0:85b3fd62ea1a	529	(++) HAL_I2C_Mem_Read()
NYX	0:85b3fd62ea1a	530	(++) HAL_I2C_IsDeviceReady()
NYX	0:85b3fd62ea1a	531
NYX	0:85b3fd62ea1a	532	(#) No-Blocking mode functions with Interrupt are :
NYX	0:85b3fd62ea1a	533	(++) HAL_I2C_Master_Transmit_IT()
NYX	0:85b3fd62ea1a	534	(++) HAL_I2C_Master_Receive_IT()
NYX	0:85b3fd62ea1a	535	(++) HAL_I2C_Slave_Transmit_IT()
NYX	0:85b3fd62ea1a	536	(++) HAL_I2C_Slave_Receive_IT()
NYX	0:85b3fd62ea1a	537	(++) HAL_I2C_Master_Sequential_Transmit_IT()
NYX	0:85b3fd62ea1a	538	(++) HAL_I2C_Master_Sequential_Receive_IT()
NYX	0:85b3fd62ea1a	539	(++) HAL_I2C_Slave_Sequential_Transmit_IT()
NYX	0:85b3fd62ea1a	540	(++) HAL_I2C_Slave_Sequential_Receive_IT()
NYX	0:85b3fd62ea1a	541	(++) HAL_I2C_Mem_Write_IT()
NYX	0:85b3fd62ea1a	542	(++) HAL_I2C_Mem_Read_IT()
NYX	0:85b3fd62ea1a	543
NYX	0:85b3fd62ea1a	544	(#) No-Blocking mode functions with DMA are :
NYX	0:85b3fd62ea1a	545	(++) HAL_I2C_Master_Transmit_DMA()
NYX	0:85b3fd62ea1a	546	(++) HAL_I2C_Master_Receive_DMA()
NYX	0:85b3fd62ea1a	547	(++) HAL_I2C_Slave_Transmit_DMA()
NYX	0:85b3fd62ea1a	548	(++) HAL_I2C_Slave_Receive_DMA()
NYX	0:85b3fd62ea1a	549	(++) HAL_I2C_Mem_Write_DMA()
NYX	0:85b3fd62ea1a	550	(++) HAL_I2C_Mem_Read_DMA()
NYX	0:85b3fd62ea1a	551
NYX	0:85b3fd62ea1a	552	(#) A set of Transfer Complete Callbacks are provided in non Blocking mode:
NYX	0:85b3fd62ea1a	553	(++) HAL_I2C_MemTxCpltCallback()
NYX	0:85b3fd62ea1a	554	(++) HAL_I2C_MemRxCpltCallback()
NYX	0:85b3fd62ea1a	555	(++) HAL_I2C_MasterTxCpltCallback()
NYX	0:85b3fd62ea1a	556	(++) HAL_I2C_MasterRxCpltCallback()
NYX	0:85b3fd62ea1a	557	(++) HAL_I2C_SlaveTxCpltCallback()
NYX	0:85b3fd62ea1a	558	(++) HAL_I2C_SlaveRxCpltCallback()
NYX	0:85b3fd62ea1a	559	(++) HAL_I2C_ErrorCallback()
NYX	0:85b3fd62ea1a	560	(++) HAL_I2C_AbortCpltCallback()
NYX	0:85b3fd62ea1a	561
NYX	0:85b3fd62ea1a	562	@endverbatim
NYX	0:85b3fd62ea1a	563	* @{
NYX	0:85b3fd62ea1a	564	*/
NYX	0:85b3fd62ea1a	565
NYX	0:85b3fd62ea1a	566	/**
NYX	0:85b3fd62ea1a	567	* @brief Transmits in master mode an amount of data in blocking mode.
NYX	0:85b3fd62ea1a	568	* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
NYX	0:85b3fd62ea1a	569	* the configuration information for the specified I2C.
NYX	0:85b3fd62ea1a	570	* @param DevAddress Target device address: The device 7 bits address value
NYX	0:85b3fd62ea1a	571	* in datasheet must be shift at right before call interface
NYX	0:85b3fd62ea1a	572	* @param pData Pointer to data buffer
NYX	0:85b3fd62ea1a	573	* @param Size Amount of data to be sent
NYX	0:85b3fd62ea1a	574	* @param Timeout Timeout duration
NYX	0:85b3fd62ea1a	575	* @retval HAL status
NYX	0:85b3fd62ea1a	576	*/
NYX	0:85b3fd62ea1a	577	HAL_StatusTypeDef HAL_I2C_Master_Transmit(I2C_HandleTypeDef hi2c, uint16_t DevAddress, uint8_t pData, uint16_t Size, uint32_t Timeout)
NYX	0:85b3fd62ea1a	578	{
NYX	0:85b3fd62ea1a	579	uint32_t tickstart = 0x00U;
NYX	0:85b3fd62ea1a	580
NYX	0:85b3fd62ea1a	581	/* Init tickstart for timeout management*/
NYX	0:85b3fd62ea1a	582	tickstart = HAL_GetTick();
NYX	0:85b3fd62ea1a	583
NYX	0:85b3fd62ea1a	584	if(hi2c->State == HAL_I2C_STATE_READY)
NYX	0:85b3fd62ea1a	585	{
NYX	0:85b3fd62ea1a	586	/* Wait until BUSY flag is reset */
NYX	0:85b3fd62ea1a	587	if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_BUSY_FLAG, tickstart) != HAL_OK)
NYX	0:85b3fd62ea1a	588	{
NYX	0:85b3fd62ea1a	589	return HAL_BUSY;
NYX	0:85b3fd62ea1a	590	}
NYX	0:85b3fd62ea1a	591
NYX	0:85b3fd62ea1a	592	/* Process Locked */
NYX	0:85b3fd62ea1a	593	__HAL_LOCK(hi2c);
NYX	0:85b3fd62ea1a	594
NYX	0:85b3fd62ea1a	595	/* Check if the I2C is already enabled */
NYX	0:85b3fd62ea1a	596	if((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)
NYX	0:85b3fd62ea1a	597	{
NYX	0:85b3fd62ea1a	598	/* Enable I2C peripheral */
NYX	0:85b3fd62ea1a	599	__HAL_I2C_ENABLE(hi2c);
NYX	0:85b3fd62ea1a	600	}
NYX	0:85b3fd62ea1a	601
NYX	0:85b3fd62ea1a	602	/* Disable Pos */
NYX	0:85b3fd62ea1a	603	hi2c->Instance->CR1 &= ~I2C_CR1_POS;
NYX	0:85b3fd62ea1a	604
NYX	0:85b3fd62ea1a	605	hi2c->State = HAL_I2C_STATE_BUSY_TX;
NYX	0:85b3fd62ea1a	606	hi2c->Mode = HAL_I2C_MODE_MASTER;
NYX	0:85b3fd62ea1a	607	hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
NYX	0:85b3fd62ea1a	608
NYX	0:85b3fd62ea1a	609	/* Prepare transfer parameters */
NYX	0:85b3fd62ea1a	610	hi2c->pBuffPtr = pData;
NYX	0:85b3fd62ea1a	611	hi2c->XferCount = Size;
NYX	0:85b3fd62ea1a	612	hi2c->XferOptions = I2C_NO_OPTION_FRAME;
NYX	0:85b3fd62ea1a	613	hi2c->XferSize = hi2c->XferCount;
NYX	0:85b3fd62ea1a	614
NYX	0:85b3fd62ea1a	615	/* Send Slave Address */
NYX	0:85b3fd62ea1a	616	if(I2C_MasterRequestWrite(hi2c, DevAddress, Timeout, tickstart) != HAL_OK)
NYX	0:85b3fd62ea1a	617	{
NYX	0:85b3fd62ea1a	618	if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
NYX	0:85b3fd62ea1a	619	{
NYX	0:85b3fd62ea1a	620	/* Process Unlocked */
NYX	0:85b3fd62ea1a	621	__HAL_UNLOCK(hi2c);
NYX	0:85b3fd62ea1a	622	return HAL_ERROR;
NYX	0:85b3fd62ea1a	623	}
NYX	0:85b3fd62ea1a	624	else
NYX	0:85b3fd62ea1a	625	{
NYX	0:85b3fd62ea1a	626	/* Process Unlocked */
NYX	0:85b3fd62ea1a	627	__HAL_UNLOCK(hi2c);
NYX	0:85b3fd62ea1a	628	return HAL_TIMEOUT;
NYX	0:85b3fd62ea1a	629	}
NYX	0:85b3fd62ea1a	630	}
NYX	0:85b3fd62ea1a	631
NYX	0:85b3fd62ea1a	632	/* Clear ADDR flag */
NYX	0:85b3fd62ea1a	633	__HAL_I2C_CLEAR_ADDRFLAG(hi2c);
NYX	0:85b3fd62ea1a	634
NYX	0:85b3fd62ea1a	635	while(hi2c->XferSize > 0U)
NYX	0:85b3fd62ea1a	636	{
NYX	0:85b3fd62ea1a	637	/* Wait until TXE flag is set */
NYX	0:85b3fd62ea1a	638	if(I2C_WaitOnTXEFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK)
NYX	0:85b3fd62ea1a	639	{
NYX	0:85b3fd62ea1a	640	if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
NYX	0:85b3fd62ea1a	641	{
NYX	0:85b3fd62ea1a	642	/* Generate Stop */
NYX	0:85b3fd62ea1a	643	hi2c->Instance->CR1 \|= I2C_CR1_STOP;
NYX	0:85b3fd62ea1a	644	return HAL_ERROR;
NYX	0:85b3fd62ea1a	645	}
NYX	0:85b3fd62ea1a	646	else
NYX	0:85b3fd62ea1a	647	{
NYX	0:85b3fd62ea1a	648	return HAL_TIMEOUT;
NYX	0:85b3fd62ea1a	649	}
NYX	0:85b3fd62ea1a	650	}
NYX	0:85b3fd62ea1a	651
NYX	0:85b3fd62ea1a	652	/* Write data to DR */
NYX	0:85b3fd62ea1a	653	hi2c->Instance->DR = (*hi2c->pBuffPtr++);
NYX	0:85b3fd62ea1a	654	hi2c->XferCount--;
NYX	0:85b3fd62ea1a	655	hi2c->XferSize--;
NYX	0:85b3fd62ea1a	656
NYX	0:85b3fd62ea1a	657	if((__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BTF) == SET) && (hi2c->XferSize != 0U))
NYX	0:85b3fd62ea1a	658	{
NYX	0:85b3fd62ea1a	659	/* Write data to DR */
NYX	0:85b3fd62ea1a	660	hi2c->Instance->DR = (*hi2c->pBuffPtr++);
NYX	0:85b3fd62ea1a	661	hi2c->XferCount--;
NYX	0:85b3fd62ea1a	662	hi2c->XferSize--;
NYX	0:85b3fd62ea1a	663	}
NYX	0:85b3fd62ea1a	664
NYX	0:85b3fd62ea1a	665	/* Wait until BTF flag is set */
NYX	0:85b3fd62ea1a	666	if(I2C_WaitOnBTFFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK)
NYX	0:85b3fd62ea1a	667	{
NYX	0:85b3fd62ea1a	668	if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
NYX	0:85b3fd62ea1a	669	{
NYX	0:85b3fd62ea1a	670	/* Generate Stop */
NYX	0:85b3fd62ea1a	671	hi2c->Instance->CR1 \|= I2C_CR1_STOP;
NYX	0:85b3fd62ea1a	672	return HAL_ERROR;
NYX	0:85b3fd62ea1a	673	}
NYX	0:85b3fd62ea1a	674	else
NYX	0:85b3fd62ea1a	675	{
NYX	0:85b3fd62ea1a	676	return HAL_TIMEOUT;
NYX	0:85b3fd62ea1a	677	}
NYX	0:85b3fd62ea1a	678	}
NYX	0:85b3fd62ea1a	679	}
NYX	0:85b3fd62ea1a	680
NYX	0:85b3fd62ea1a	681	/* Generate Stop */
NYX	0:85b3fd62ea1a	682	hi2c->Instance->CR1 \|= I2C_CR1_STOP;
NYX	0:85b3fd62ea1a	683
NYX	0:85b3fd62ea1a	684	hi2c->State = HAL_I2C_STATE_READY;
NYX	0:85b3fd62ea1a	685	hi2c->Mode = HAL_I2C_MODE_NONE;
NYX	0:85b3fd62ea1a	686
NYX	0:85b3fd62ea1a	687	/* Process Unlocked */
NYX	0:85b3fd62ea1a	688	__HAL_UNLOCK(hi2c);
NYX	0:85b3fd62ea1a	689
NYX	0:85b3fd62ea1a	690	return HAL_OK;
NYX	0:85b3fd62ea1a	691	}
NYX	0:85b3fd62ea1a	692	else
NYX	0:85b3fd62ea1a	693	{
NYX	0:85b3fd62ea1a	694	return HAL_BUSY;
NYX	0:85b3fd62ea1a	695	}
NYX	0:85b3fd62ea1a	696	}
NYX	0:85b3fd62ea1a	697
NYX	0:85b3fd62ea1a	698	/**
NYX	0:85b3fd62ea1a	699	* @brief Receives in master mode an amount of data in blocking mode.
NYX	0:85b3fd62ea1a	700	* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
NYX	0:85b3fd62ea1a	701	* the configuration information for the specified I2C.
NYX	0:85b3fd62ea1a	702	* @param DevAddress Target device address: The device 7 bits address value
NYX	0:85b3fd62ea1a	703	* in datasheet must be shift at right before call interface
NYX	0:85b3fd62ea1a	704	* @param pData Pointer to data buffer
NYX	0:85b3fd62ea1a	705	* @param Size Amount of data to be sent
NYX	0:85b3fd62ea1a	706	* @param Timeout Timeout duration
NYX	0:85b3fd62ea1a	707	* @retval HAL status
NYX	0:85b3fd62ea1a	708	*/
NYX	0:85b3fd62ea1a	709	HAL_StatusTypeDef HAL_I2C_Master_Receive(I2C_HandleTypeDef hi2c, uint16_t DevAddress, uint8_t pData, uint16_t Size, uint32_t Timeout)
NYX	0:85b3fd62ea1a	710	{
NYX	0:85b3fd62ea1a	711	uint32_t tickstart = 0x00U;
NYX	0:85b3fd62ea1a	712
NYX	0:85b3fd62ea1a	713	/* Init tickstart for timeout management*/
NYX	0:85b3fd62ea1a	714	tickstart = HAL_GetTick();
NYX	0:85b3fd62ea1a	715
NYX	0:85b3fd62ea1a	716	if(hi2c->State == HAL_I2C_STATE_READY)
NYX	0:85b3fd62ea1a	717	{
NYX	0:85b3fd62ea1a	718	/* Wait until BUSY flag is reset */
NYX	0:85b3fd62ea1a	719	if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_BUSY_FLAG, tickstart) != HAL_OK)
NYX	0:85b3fd62ea1a	720	{
NYX	0:85b3fd62ea1a	721	return HAL_BUSY;
NYX	0:85b3fd62ea1a	722	}
NYX	0:85b3fd62ea1a	723
NYX	0:85b3fd62ea1a	724	/* Process Locked */
NYX	0:85b3fd62ea1a	725	__HAL_LOCK(hi2c);
NYX	0:85b3fd62ea1a	726
NYX	0:85b3fd62ea1a	727	/* Check if the I2C is already enabled */
NYX	0:85b3fd62ea1a	728	if((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)
NYX	0:85b3fd62ea1a	729	{
NYX	0:85b3fd62ea1a	730	/* Enable I2C peripheral */
NYX	0:85b3fd62ea1a	731	__HAL_I2C_ENABLE(hi2c);
NYX	0:85b3fd62ea1a	732	}
NYX	0:85b3fd62ea1a	733
NYX	0:85b3fd62ea1a	734	/* Disable Pos */
NYX	0:85b3fd62ea1a	735	hi2c->Instance->CR1 &= ~I2C_CR1_POS;
NYX	0:85b3fd62ea1a	736
NYX	0:85b3fd62ea1a	737	hi2c->State = HAL_I2C_STATE_BUSY_RX;
NYX	0:85b3fd62ea1a	738	hi2c->Mode = HAL_I2C_MODE_MASTER;
NYX	0:85b3fd62ea1a	739	hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
NYX	0:85b3fd62ea1a	740
NYX	0:85b3fd62ea1a	741	/* Prepare transfer parameters */
NYX	0:85b3fd62ea1a	742	hi2c->pBuffPtr = pData;
NYX	0:85b3fd62ea1a	743	hi2c->XferCount = Size;
NYX	0:85b3fd62ea1a	744	hi2c->XferOptions = I2C_NO_OPTION_FRAME;
NYX	0:85b3fd62ea1a	745	hi2c->XferSize = hi2c->XferCount;
NYX	0:85b3fd62ea1a	746
NYX	0:85b3fd62ea1a	747	/* Send Slave Address */
NYX	0:85b3fd62ea1a	748	if(I2C_MasterRequestRead(hi2c, DevAddress, Timeout, tickstart) != HAL_OK)
NYX	0:85b3fd62ea1a	749	{
NYX	0:85b3fd62ea1a	750	if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
NYX	0:85b3fd62ea1a	751	{
NYX	0:85b3fd62ea1a	752	/* Process Unlocked */
NYX	0:85b3fd62ea1a	753	__HAL_UNLOCK(hi2c);
NYX	0:85b3fd62ea1a	754	return HAL_ERROR;
NYX	0:85b3fd62ea1a	755	}
NYX	0:85b3fd62ea1a	756	else
NYX	0:85b3fd62ea1a	757	{
NYX	0:85b3fd62ea1a	758	/* Process Unlocked */
NYX	0:85b3fd62ea1a	759	__HAL_UNLOCK(hi2c);
NYX	0:85b3fd62ea1a	760	return HAL_TIMEOUT;
NYX	0:85b3fd62ea1a	761	}
NYX	0:85b3fd62ea1a	762	}
NYX	0:85b3fd62ea1a	763
NYX	0:85b3fd62ea1a	764	if(hi2c->XferSize == 0U)
NYX	0:85b3fd62ea1a	765	{
NYX	0:85b3fd62ea1a	766	/* Clear ADDR flag */
NYX	0:85b3fd62ea1a	767	__HAL_I2C_CLEAR_ADDRFLAG(hi2c);
NYX	0:85b3fd62ea1a	768
NYX	0:85b3fd62ea1a	769	/* Generate Stop */
NYX	0:85b3fd62ea1a	770	hi2c->Instance->CR1 \|= I2C_CR1_STOP;
NYX	0:85b3fd62ea1a	771	}
NYX	0:85b3fd62ea1a	772	else if(hi2c->XferSize == 1U)
NYX	0:85b3fd62ea1a	773	{
NYX	0:85b3fd62ea1a	774	/* Disable Acknowledge */
NYX	0:85b3fd62ea1a	775	hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
NYX	0:85b3fd62ea1a	776
NYX	0:85b3fd62ea1a	777	/* Clear ADDR flag */
NYX	0:85b3fd62ea1a	778	__HAL_I2C_CLEAR_ADDRFLAG(hi2c);
NYX	0:85b3fd62ea1a	779
NYX	0:85b3fd62ea1a	780	/* Generate Stop */
NYX	0:85b3fd62ea1a	781	hi2c->Instance->CR1 \|= I2C_CR1_STOP;
NYX	0:85b3fd62ea1a	782	}
NYX	0:85b3fd62ea1a	783	else if(hi2c->XferSize == 2U)
NYX	0:85b3fd62ea1a	784	{
NYX	0:85b3fd62ea1a	785	/* Disable Acknowledge */
NYX	0:85b3fd62ea1a	786	hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
NYX	0:85b3fd62ea1a	787
NYX	0:85b3fd62ea1a	788	/* Enable Pos */
NYX	0:85b3fd62ea1a	789	hi2c->Instance->CR1 \|= I2C_CR1_POS;
NYX	0:85b3fd62ea1a	790
NYX	0:85b3fd62ea1a	791	/* Clear ADDR flag */
NYX	0:85b3fd62ea1a	792	__HAL_I2C_CLEAR_ADDRFLAG(hi2c);
NYX	0:85b3fd62ea1a	793	}
NYX	0:85b3fd62ea1a	794	else
NYX	0:85b3fd62ea1a	795	{
NYX	0:85b3fd62ea1a	796	/* Enable Acknowledge */
NYX	0:85b3fd62ea1a	797	hi2c->Instance->CR1 \|= I2C_CR1_ACK;
NYX	0:85b3fd62ea1a	798
NYX	0:85b3fd62ea1a	799	/* Clear ADDR flag */
NYX	0:85b3fd62ea1a	800	__HAL_I2C_CLEAR_ADDRFLAG(hi2c);
NYX	0:85b3fd62ea1a	801	}
NYX	0:85b3fd62ea1a	802
NYX	0:85b3fd62ea1a	803	while(hi2c->XferSize > 0U)
NYX	0:85b3fd62ea1a	804	{
NYX	0:85b3fd62ea1a	805	if(hi2c->XferSize <= 3U)
NYX	0:85b3fd62ea1a	806	{
NYX	0:85b3fd62ea1a	807	/* One byte */
NYX	0:85b3fd62ea1a	808	if(hi2c->XferSize == 1U)
NYX	0:85b3fd62ea1a	809	{
NYX	0:85b3fd62ea1a	810	/* Wait until RXNE flag is set */
NYX	0:85b3fd62ea1a	811	if(I2C_WaitOnRXNEFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK)
NYX	0:85b3fd62ea1a	812	{
NYX	0:85b3fd62ea1a	813	if(hi2c->ErrorCode == HAL_I2C_ERROR_TIMEOUT)
NYX	0:85b3fd62ea1a	814	{
NYX	0:85b3fd62ea1a	815	return HAL_TIMEOUT;
NYX	0:85b3fd62ea1a	816	}
NYX	0:85b3fd62ea1a	817	else
NYX	0:85b3fd62ea1a	818	{
NYX	0:85b3fd62ea1a	819	return HAL_ERROR;
NYX	0:85b3fd62ea1a	820	}
NYX	0:85b3fd62ea1a	821	}
NYX	0:85b3fd62ea1a	822
NYX	0:85b3fd62ea1a	823	/* Read data from DR */
NYX	0:85b3fd62ea1a	824	(*hi2c->pBuffPtr++) = hi2c->Instance->DR;
NYX	0:85b3fd62ea1a	825	hi2c->XferSize--;
NYX	0:85b3fd62ea1a	826	hi2c->XferCount--;
NYX	0:85b3fd62ea1a	827	}
NYX	0:85b3fd62ea1a	828	/* Two bytes */
NYX	0:85b3fd62ea1a	829	else if(hi2c->XferSize == 2U)
NYX	0:85b3fd62ea1a	830	{
NYX	0:85b3fd62ea1a	831	/* Wait until BTF flag is set */
NYX	0:85b3fd62ea1a	832	if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BTF, RESET, Timeout, tickstart) != HAL_OK)
NYX	0:85b3fd62ea1a	833	{
NYX	0:85b3fd62ea1a	834	return HAL_TIMEOUT;
NYX	0:85b3fd62ea1a	835	}
NYX	0:85b3fd62ea1a	836
NYX	0:85b3fd62ea1a	837	/* Generate Stop */
NYX	0:85b3fd62ea1a	838	hi2c->Instance->CR1 \|= I2C_CR1_STOP;
NYX	0:85b3fd62ea1a	839
NYX	0:85b3fd62ea1a	840	/* Read data from DR */
NYX	0:85b3fd62ea1a	841	(*hi2c->pBuffPtr++) = hi2c->Instance->DR;
NYX	0:85b3fd62ea1a	842	hi2c->XferSize--;
NYX	0:85b3fd62ea1a	843	hi2c->XferCount--;
NYX	0:85b3fd62ea1a	844
NYX	0:85b3fd62ea1a	845	/* Read data from DR */
NYX	0:85b3fd62ea1a	846	(*hi2c->pBuffPtr++) = hi2c->Instance->DR;
NYX	0:85b3fd62ea1a	847	hi2c->XferSize--;
NYX	0:85b3fd62ea1a	848	hi2c->XferCount--;
NYX	0:85b3fd62ea1a	849	}
NYX	0:85b3fd62ea1a	850	/* 3 Last bytes */
NYX	0:85b3fd62ea1a	851	else
NYX	0:85b3fd62ea1a	852	{
NYX	0:85b3fd62ea1a	853	/* Wait until BTF flag is set */
NYX	0:85b3fd62ea1a	854	if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BTF, RESET, Timeout, tickstart) != HAL_OK)
NYX	0:85b3fd62ea1a	855	{
NYX	0:85b3fd62ea1a	856	return HAL_TIMEOUT;
NYX	0:85b3fd62ea1a	857	}
NYX	0:85b3fd62ea1a	858
NYX	0:85b3fd62ea1a	859	/* Disable Acknowledge */
NYX	0:85b3fd62ea1a	860	hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
NYX	0:85b3fd62ea1a	861
NYX	0:85b3fd62ea1a	862	/* Read data from DR */
NYX	0:85b3fd62ea1a	863	(*hi2c->pBuffPtr++) = hi2c->Instance->DR;
NYX	0:85b3fd62ea1a	864	hi2c->XferSize--;
NYX	0:85b3fd62ea1a	865	hi2c->XferCount--;
NYX	0:85b3fd62ea1a	866
NYX	0:85b3fd62ea1a	867	/* Wait until BTF flag is set */
NYX	0:85b3fd62ea1a	868	if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BTF, RESET, Timeout, tickstart) != HAL_OK)
NYX	0:85b3fd62ea1a	869	{
NYX	0:85b3fd62ea1a	870	return HAL_TIMEOUT;
NYX	0:85b3fd62ea1a	871	}
NYX	0:85b3fd62ea1a	872
NYX	0:85b3fd62ea1a	873	/* Generate Stop */
NYX	0:85b3fd62ea1a	874	hi2c->Instance->CR1 \|= I2C_CR1_STOP;
NYX	0:85b3fd62ea1a	875
NYX	0:85b3fd62ea1a	876	/* Read data from DR */
NYX	0:85b3fd62ea1a	877	(*hi2c->pBuffPtr++) = hi2c->Instance->DR;
NYX	0:85b3fd62ea1a	878	hi2c->XferSize--;
NYX	0:85b3fd62ea1a	879	hi2c->XferCount--;
NYX	0:85b3fd62ea1a	880
NYX	0:85b3fd62ea1a	881	/* Read data from DR */
NYX	0:85b3fd62ea1a	882	(*hi2c->pBuffPtr++) = hi2c->Instance->DR;
NYX	0:85b3fd62ea1a	883	hi2c->XferSize--;
NYX	0:85b3fd62ea1a	884	hi2c->XferCount--;
NYX	0:85b3fd62ea1a	885	}
NYX	0:85b3fd62ea1a	886	}
NYX	0:85b3fd62ea1a	887	else
NYX	0:85b3fd62ea1a	888	{
NYX	0:85b3fd62ea1a	889	/* Wait until RXNE flag is set */
NYX	0:85b3fd62ea1a	890	if(I2C_WaitOnRXNEFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK)
NYX	0:85b3fd62ea1a	891	{
NYX	0:85b3fd62ea1a	892	if(hi2c->ErrorCode == HAL_I2C_ERROR_TIMEOUT)
NYX	0:85b3fd62ea1a	893	{
NYX	0:85b3fd62ea1a	894	return HAL_TIMEOUT;
NYX	0:85b3fd62ea1a	895	}
NYX	0:85b3fd62ea1a	896	else
NYX	0:85b3fd62ea1a	897	{
NYX	0:85b3fd62ea1a	898	return HAL_ERROR;
NYX	0:85b3fd62ea1a	899	}
NYX	0:85b3fd62ea1a	900	}
NYX	0:85b3fd62ea1a	901
NYX	0:85b3fd62ea1a	902	/* Read data from DR */
NYX	0:85b3fd62ea1a	903	(*hi2c->pBuffPtr++) = hi2c->Instance->DR;
NYX	0:85b3fd62ea1a	904	hi2c->XferSize--;
NYX	0:85b3fd62ea1a	905	hi2c->XferCount--;
NYX	0:85b3fd62ea1a	906
NYX	0:85b3fd62ea1a	907	if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BTF) == SET)
NYX	0:85b3fd62ea1a	908	{
NYX	0:85b3fd62ea1a	909	/* Read data from DR */
NYX	0:85b3fd62ea1a	910	(*hi2c->pBuffPtr++) = hi2c->Instance->DR;
NYX	0:85b3fd62ea1a	911	hi2c->XferSize--;
NYX	0:85b3fd62ea1a	912	hi2c->XferCount--;
NYX	0:85b3fd62ea1a	913	}
NYX	0:85b3fd62ea1a	914	}
NYX	0:85b3fd62ea1a	915	}
NYX	0:85b3fd62ea1a	916
NYX	0:85b3fd62ea1a	917	hi2c->State = HAL_I2C_STATE_READY;
NYX	0:85b3fd62ea1a	918	hi2c->Mode = HAL_I2C_MODE_NONE;
NYX	0:85b3fd62ea1a	919
NYX	0:85b3fd62ea1a	920	/* Process Unlocked */
NYX	0:85b3fd62ea1a	921	__HAL_UNLOCK(hi2c);
NYX	0:85b3fd62ea1a	922
NYX	0:85b3fd62ea1a	923	return HAL_OK;
NYX	0:85b3fd62ea1a	924	}
NYX	0:85b3fd62ea1a	925	else
NYX	0:85b3fd62ea1a	926	{
NYX	0:85b3fd62ea1a	927	return HAL_BUSY;
NYX	0:85b3fd62ea1a	928	}
NYX	0:85b3fd62ea1a	929	}
NYX	0:85b3fd62ea1a	930
NYX	0:85b3fd62ea1a	931	/**
NYX	0:85b3fd62ea1a	932	* @brief Transmits in slave mode an amount of data in blocking mode.
NYX	0:85b3fd62ea1a	933	* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
NYX	0:85b3fd62ea1a	934	* the configuration information for the specified I2C.
NYX	0:85b3fd62ea1a	935	* @param pData Pointer to data buffer
NYX	0:85b3fd62ea1a	936	* @param Size Amount of data to be sent
NYX	0:85b3fd62ea1a	937	* @param Timeout Timeout duration
NYX	0:85b3fd62ea1a	938	* @retval HAL status
NYX	0:85b3fd62ea1a	939	*/
NYX	0:85b3fd62ea1a	940	HAL_StatusTypeDef HAL_I2C_Slave_Transmit(I2C_HandleTypeDef hi2c, uint8_t pData, uint16_t Size, uint32_t Timeout)
NYX	0:85b3fd62ea1a	941	{
NYX	0:85b3fd62ea1a	942	uint32_t tickstart = 0x00U;
NYX	0:85b3fd62ea1a	943
NYX	0:85b3fd62ea1a	944	/* Init tickstart for timeout management*/
NYX	0:85b3fd62ea1a	945	tickstart = HAL_GetTick();
NYX	0:85b3fd62ea1a	946
NYX	0:85b3fd62ea1a	947	if(hi2c->State == HAL_I2C_STATE_READY)
NYX	0:85b3fd62ea1a	948	{
NYX	0:85b3fd62ea1a	949	if((pData == NULL) \|\| (Size == 0U))
NYX	0:85b3fd62ea1a	950	{
NYX	0:85b3fd62ea1a	951	return HAL_ERROR;
NYX	0:85b3fd62ea1a	952	}
NYX	0:85b3fd62ea1a	953
NYX	0:85b3fd62ea1a	954	/* Process Locked */
NYX	0:85b3fd62ea1a	955	__HAL_LOCK(hi2c);
NYX	0:85b3fd62ea1a	956
NYX	0:85b3fd62ea1a	957	/* Check if the I2C is already enabled */
NYX	0:85b3fd62ea1a	958	if((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)
NYX	0:85b3fd62ea1a	959	{
NYX	0:85b3fd62ea1a	960	/* Enable I2C peripheral */
NYX	0:85b3fd62ea1a	961	__HAL_I2C_ENABLE(hi2c);
NYX	0:85b3fd62ea1a	962	}
NYX	0:85b3fd62ea1a	963
NYX	0:85b3fd62ea1a	964	/* Disable Pos */
NYX	0:85b3fd62ea1a	965	hi2c->Instance->CR1 &= ~I2C_CR1_POS;
NYX	0:85b3fd62ea1a	966
NYX	0:85b3fd62ea1a	967	hi2c->State = HAL_I2C_STATE_BUSY_TX;
NYX	0:85b3fd62ea1a	968	hi2c->Mode = HAL_I2C_MODE_SLAVE;
NYX	0:85b3fd62ea1a	969	hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
NYX	0:85b3fd62ea1a	970
NYX	0:85b3fd62ea1a	971	/* Prepare transfer parameters */
NYX	0:85b3fd62ea1a	972	hi2c->pBuffPtr = pData;
NYX	0:85b3fd62ea1a	973	hi2c->XferCount = Size;
NYX	0:85b3fd62ea1a	974	hi2c->XferOptions = I2C_NO_OPTION_FRAME;
NYX	0:85b3fd62ea1a	975	hi2c->XferSize = hi2c->XferCount;
NYX	0:85b3fd62ea1a	976
NYX	0:85b3fd62ea1a	977	/* Enable Address Acknowledge */
NYX	0:85b3fd62ea1a	978	hi2c->Instance->CR1 \|= I2C_CR1_ACK;
NYX	0:85b3fd62ea1a	979
NYX	0:85b3fd62ea1a	980	/* Wait until ADDR flag is set */
NYX	0:85b3fd62ea1a	981	if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, RESET, Timeout, tickstart) != HAL_OK)
NYX	0:85b3fd62ea1a	982	{
NYX	0:85b3fd62ea1a	983	return HAL_TIMEOUT;
NYX	0:85b3fd62ea1a	984	}
NYX	0:85b3fd62ea1a	985
NYX	0:85b3fd62ea1a	986	/* Clear ADDR flag */
NYX	0:85b3fd62ea1a	987	__HAL_I2C_CLEAR_ADDRFLAG(hi2c);
NYX	0:85b3fd62ea1a	988
NYX	0:85b3fd62ea1a	989	/* If 10bit addressing mode is selected */
NYX	0:85b3fd62ea1a	990	if(hi2c->Init.AddressingMode == I2C_ADDRESSINGMODE_10BIT)
NYX	0:85b3fd62ea1a	991	{
NYX	0:85b3fd62ea1a	992	/* Wait until ADDR flag is set */
NYX	0:85b3fd62ea1a	993	if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, RESET, Timeout, tickstart) != HAL_OK)
NYX	0:85b3fd62ea1a	994	{
NYX	0:85b3fd62ea1a	995	return HAL_TIMEOUT;
NYX	0:85b3fd62ea1a	996	}
NYX	0:85b3fd62ea1a	997
NYX	0:85b3fd62ea1a	998	/* Clear ADDR flag */
NYX	0:85b3fd62ea1a	999	__HAL_I2C_CLEAR_ADDRFLAG(hi2c);
NYX	0:85b3fd62ea1a	1000	}
NYX	0:85b3fd62ea1a	1001
NYX	0:85b3fd62ea1a	1002	while(hi2c->XferSize > 0U)
NYX	0:85b3fd62ea1a	1003	{
NYX	0:85b3fd62ea1a	1004	/* Wait until TXE flag is set */
NYX	0:85b3fd62ea1a	1005	if(I2C_WaitOnTXEFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK)
NYX	0:85b3fd62ea1a	1006	{
NYX	0:85b3fd62ea1a	1007	/* Disable Address Acknowledge */
NYX	0:85b3fd62ea1a	1008	hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
NYX	0:85b3fd62ea1a	1009
NYX	0:85b3fd62ea1a	1010	if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
NYX	0:85b3fd62ea1a	1011	{
NYX	0:85b3fd62ea1a	1012	return HAL_ERROR;
NYX	0:85b3fd62ea1a	1013	}
NYX	0:85b3fd62ea1a	1014	else
NYX	0:85b3fd62ea1a	1015	{
NYX	0:85b3fd62ea1a	1016	return HAL_TIMEOUT;
NYX	0:85b3fd62ea1a	1017	}
NYX	0:85b3fd62ea1a	1018	}
NYX	0:85b3fd62ea1a	1019
NYX	0:85b3fd62ea1a	1020	/* Write data to DR */
NYX	0:85b3fd62ea1a	1021	hi2c->Instance->DR = (*hi2c->pBuffPtr++);
NYX	0:85b3fd62ea1a	1022	hi2c->XferCount--;
NYX	0:85b3fd62ea1a	1023	hi2c->XferSize--;
NYX	0:85b3fd62ea1a	1024
NYX	0:85b3fd62ea1a	1025	if((__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BTF) == SET) && (hi2c->XferSize != 0U))
NYX	0:85b3fd62ea1a	1026	{
NYX	0:85b3fd62ea1a	1027	/* Write data to DR */
NYX	0:85b3fd62ea1a	1028	hi2c->Instance->DR = (*hi2c->pBuffPtr++);
NYX	0:85b3fd62ea1a	1029	hi2c->XferCount--;
NYX	0:85b3fd62ea1a	1030	hi2c->XferSize--;
NYX	0:85b3fd62ea1a	1031	}
NYX	0:85b3fd62ea1a	1032	}
NYX	0:85b3fd62ea1a	1033
NYX	0:85b3fd62ea1a	1034	/* Wait until AF flag is set */
NYX	0:85b3fd62ea1a	1035	if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_AF, RESET, Timeout, tickstart) != HAL_OK)
NYX	0:85b3fd62ea1a	1036	{
NYX	0:85b3fd62ea1a	1037	return HAL_TIMEOUT;
NYX	0:85b3fd62ea1a	1038	}
NYX	0:85b3fd62ea1a	1039
NYX	0:85b3fd62ea1a	1040	/* Clear AF flag */
NYX	0:85b3fd62ea1a	1041	__HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF);
NYX	0:85b3fd62ea1a	1042
NYX	0:85b3fd62ea1a	1043	/* Disable Address Acknowledge */
NYX	0:85b3fd62ea1a	1044	hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
NYX	0:85b3fd62ea1a	1045
NYX	0:85b3fd62ea1a	1046	hi2c->State = HAL_I2C_STATE_READY;
NYX	0:85b3fd62ea1a	1047	hi2c->Mode = HAL_I2C_MODE_NONE;
NYX	0:85b3fd62ea1a	1048
NYX	0:85b3fd62ea1a	1049	/* Process Unlocked */
NYX	0:85b3fd62ea1a	1050	__HAL_UNLOCK(hi2c);
NYX	0:85b3fd62ea1a	1051
NYX	0:85b3fd62ea1a	1052	return HAL_OK;
NYX	0:85b3fd62ea1a	1053	}
NYX	0:85b3fd62ea1a	1054	else
NYX	0:85b3fd62ea1a	1055	{
NYX	0:85b3fd62ea1a	1056	return HAL_BUSY;
NYX	0:85b3fd62ea1a	1057	}
NYX	0:85b3fd62ea1a	1058	}
NYX	0:85b3fd62ea1a	1059
NYX	0:85b3fd62ea1a	1060	/**
NYX	0:85b3fd62ea1a	1061	* @brief Receive in slave mode an amount of data in blocking mode
NYX	0:85b3fd62ea1a	1062	* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
NYX	0:85b3fd62ea1a	1063	* the configuration information for the specified I2C.
NYX	0:85b3fd62ea1a	1064	* @param pData Pointer to data buffer
NYX	0:85b3fd62ea1a	1065	* @param Size Amount of data to be sent
NYX	0:85b3fd62ea1a	1066	* @param Timeout Timeout duration
NYX	0:85b3fd62ea1a	1067	* @retval HAL status
NYX	0:85b3fd62ea1a	1068	*/
NYX	0:85b3fd62ea1a	1069	HAL_StatusTypeDef HAL_I2C_Slave_Receive(I2C_HandleTypeDef hi2c, uint8_t pData, uint16_t Size, uint32_t Timeout)
NYX	0:85b3fd62ea1a	1070	{
NYX	0:85b3fd62ea1a	1071	uint32_t tickstart = 0x00U;
NYX	0:85b3fd62ea1a	1072
NYX	0:85b3fd62ea1a	1073	/* Init tickstart for timeout management*/
NYX	0:85b3fd62ea1a	1074	tickstart = HAL_GetTick();
NYX	0:85b3fd62ea1a	1075
NYX	0:85b3fd62ea1a	1076	if(hi2c->State == HAL_I2C_STATE_READY)
NYX	0:85b3fd62ea1a	1077	{
NYX	0:85b3fd62ea1a	1078	if((pData == NULL) \|\| (Size == 0))
NYX	0:85b3fd62ea1a	1079	{
NYX	0:85b3fd62ea1a	1080	return HAL_ERROR;
NYX	0:85b3fd62ea1a	1081	}
NYX	0:85b3fd62ea1a	1082
NYX	0:85b3fd62ea1a	1083	/* Process Locked */
NYX	0:85b3fd62ea1a	1084	__HAL_LOCK(hi2c);
NYX	0:85b3fd62ea1a	1085
NYX	0:85b3fd62ea1a	1086	/* Check if the I2C is already enabled */
NYX	0:85b3fd62ea1a	1087	if((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)
NYX	0:85b3fd62ea1a	1088	{
NYX	0:85b3fd62ea1a	1089	/* Enable I2C peripheral */
NYX	0:85b3fd62ea1a	1090	__HAL_I2C_ENABLE(hi2c);
NYX	0:85b3fd62ea1a	1091	}
NYX	0:85b3fd62ea1a	1092
NYX	0:85b3fd62ea1a	1093	/* Disable Pos */
NYX	0:85b3fd62ea1a	1094	hi2c->Instance->CR1 &= ~I2C_CR1_POS;
NYX	0:85b3fd62ea1a	1095
NYX	0:85b3fd62ea1a	1096	hi2c->State = HAL_I2C_STATE_BUSY_RX;
NYX	0:85b3fd62ea1a	1097	hi2c->Mode = HAL_I2C_MODE_SLAVE;
NYX	0:85b3fd62ea1a	1098	hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
NYX	0:85b3fd62ea1a	1099
NYX	0:85b3fd62ea1a	1100	/* Prepare transfer parameters */
NYX	0:85b3fd62ea1a	1101	hi2c->pBuffPtr = pData;
NYX	0:85b3fd62ea1a	1102	hi2c->XferCount = Size;
NYX	0:85b3fd62ea1a	1103	hi2c->XferOptions = I2C_NO_OPTION_FRAME;
NYX	0:85b3fd62ea1a	1104	hi2c->XferSize = hi2c->XferCount;
NYX	0:85b3fd62ea1a	1105
NYX	0:85b3fd62ea1a	1106	/* Enable Address Acknowledge */
NYX	0:85b3fd62ea1a	1107	hi2c->Instance->CR1 \|= I2C_CR1_ACK;
NYX	0:85b3fd62ea1a	1108
NYX	0:85b3fd62ea1a	1109	/* Wait until ADDR flag is set */
NYX	0:85b3fd62ea1a	1110	if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, RESET, Timeout, tickstart) != HAL_OK)
NYX	0:85b3fd62ea1a	1111	{
NYX	0:85b3fd62ea1a	1112	return HAL_TIMEOUT;
NYX	0:85b3fd62ea1a	1113	}
NYX	0:85b3fd62ea1a	1114
NYX	0:85b3fd62ea1a	1115	/* Clear ADDR flag */
NYX	0:85b3fd62ea1a	1116	__HAL_I2C_CLEAR_ADDRFLAG(hi2c);
NYX	0:85b3fd62ea1a	1117
NYX	0:85b3fd62ea1a	1118	while(hi2c->XferSize > 0U)
NYX	0:85b3fd62ea1a	1119	{
NYX	0:85b3fd62ea1a	1120	/* Wait until RXNE flag is set */
NYX	0:85b3fd62ea1a	1121	if(I2C_WaitOnRXNEFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK)
NYX	0:85b3fd62ea1a	1122	{
NYX	0:85b3fd62ea1a	1123	/* Disable Address Acknowledge */
NYX	0:85b3fd62ea1a	1124	hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
NYX	0:85b3fd62ea1a	1125
NYX	0:85b3fd62ea1a	1126	if(hi2c->ErrorCode == HAL_I2C_ERROR_TIMEOUT)
NYX	0:85b3fd62ea1a	1127	{
NYX	0:85b3fd62ea1a	1128	return HAL_TIMEOUT;
NYX	0:85b3fd62ea1a	1129	}
NYX	0:85b3fd62ea1a	1130	else
NYX	0:85b3fd62ea1a	1131	{
NYX	0:85b3fd62ea1a	1132	return HAL_ERROR;
NYX	0:85b3fd62ea1a	1133	}
NYX	0:85b3fd62ea1a	1134	}
NYX	0:85b3fd62ea1a	1135
NYX	0:85b3fd62ea1a	1136	/* Read data from DR */
NYX	0:85b3fd62ea1a	1137	(*hi2c->pBuffPtr++) = hi2c->Instance->DR;
NYX	0:85b3fd62ea1a	1138	hi2c->XferSize--;
NYX	0:85b3fd62ea1a	1139	hi2c->XferCount--;
NYX	0:85b3fd62ea1a	1140
NYX	0:85b3fd62ea1a	1141	if((__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BTF) == SET) && (Size != 0U))
NYX	0:85b3fd62ea1a	1142	{
NYX	0:85b3fd62ea1a	1143	/* Read data from DR */
NYX	0:85b3fd62ea1a	1144	(*hi2c->pBuffPtr++) = hi2c->Instance->DR;
NYX	0:85b3fd62ea1a	1145	hi2c->XferSize--;
NYX	0:85b3fd62ea1a	1146	hi2c->XferCount--;
NYX	0:85b3fd62ea1a	1147	}
NYX	0:85b3fd62ea1a	1148	}
NYX	0:85b3fd62ea1a	1149
NYX	0:85b3fd62ea1a	1150	/* Wait until STOP flag is set */
NYX	0:85b3fd62ea1a	1151	if(I2C_WaitOnSTOPFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK)
NYX	0:85b3fd62ea1a	1152	{
NYX	0:85b3fd62ea1a	1153	/* Disable Address Acknowledge */
NYX	0:85b3fd62ea1a	1154	hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
NYX	0:85b3fd62ea1a	1155
NYX	0:85b3fd62ea1a	1156	if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
NYX	0:85b3fd62ea1a	1157	{
NYX	0:85b3fd62ea1a	1158	return HAL_ERROR;
NYX	0:85b3fd62ea1a	1159	}
NYX	0:85b3fd62ea1a	1160	else
NYX	0:85b3fd62ea1a	1161	{
NYX	0:85b3fd62ea1a	1162	return HAL_TIMEOUT;
NYX	0:85b3fd62ea1a	1163	}
NYX	0:85b3fd62ea1a	1164	}
NYX	0:85b3fd62ea1a	1165
NYX	0:85b3fd62ea1a	1166	/* Clear STOP flag */
NYX	0:85b3fd62ea1a	1167	__HAL_I2C_CLEAR_STOPFLAG(hi2c);
NYX	0:85b3fd62ea1a	1168
NYX	0:85b3fd62ea1a	1169	/* Disable Address Acknowledge */
NYX	0:85b3fd62ea1a	1170	hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
NYX	0:85b3fd62ea1a	1171
NYX	0:85b3fd62ea1a	1172	hi2c->State = HAL_I2C_STATE_READY;
NYX	0:85b3fd62ea1a	1173	hi2c->Mode = HAL_I2C_MODE_NONE;
NYX	0:85b3fd62ea1a	1174
NYX	0:85b3fd62ea1a	1175	/* Process Unlocked */
NYX	0:85b3fd62ea1a	1176	__HAL_UNLOCK(hi2c);
NYX	0:85b3fd62ea1a	1177
NYX	0:85b3fd62ea1a	1178	return HAL_OK;
NYX	0:85b3fd62ea1a	1179	}
NYX	0:85b3fd62ea1a	1180	else
NYX	0:85b3fd62ea1a	1181	{
NYX	0:85b3fd62ea1a	1182	return HAL_BUSY;
NYX	0:85b3fd62ea1a	1183	}
NYX	0:85b3fd62ea1a	1184	}
NYX	0:85b3fd62ea1a	1185
NYX	0:85b3fd62ea1a	1186	/**
NYX	0:85b3fd62ea1a	1187	* @brief Transmit in master mode an amount of data in non-blocking mode with Interrupt
NYX	0:85b3fd62ea1a	1188	* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
NYX	0:85b3fd62ea1a	1189	* the configuration information for the specified I2C.
NYX	0:85b3fd62ea1a	1190	* @param DevAddress Target device address: The device 7 bits address value
NYX	0:85b3fd62ea1a	1191	* in datasheet must be shift at right before call interface
NYX	0:85b3fd62ea1a	1192	* @param pData Pointer to data buffer
NYX	0:85b3fd62ea1a	1193	* @param Size Amount of data to be sent
NYX	0:85b3fd62ea1a	1194	* @retval HAL status
NYX	0:85b3fd62ea1a	1195	*/
NYX	0:85b3fd62ea1a	1196	HAL_StatusTypeDef HAL_I2C_Master_Transmit_IT(I2C_HandleTypeDef hi2c, uint16_t DevAddress, uint8_t pData, uint16_t Size)
NYX	0:85b3fd62ea1a	1197	{
NYX	0:85b3fd62ea1a	1198	__IO uint32_t count = 0U;
NYX	0:85b3fd62ea1a	1199
NYX	0:85b3fd62ea1a	1200	if(hi2c->State == HAL_I2C_STATE_READY)
NYX	0:85b3fd62ea1a	1201	{
NYX	0:85b3fd62ea1a	1202	/* Wait until BUSY flag is reset */
NYX	0:85b3fd62ea1a	1203	count = I2C_TIMEOUT_BUSY_FLAG * (SystemCoreClock /25U /1000U);
NYX	0:85b3fd62ea1a	1204	do
NYX	0:85b3fd62ea1a	1205	{
NYX	0:85b3fd62ea1a	1206	if(count-- == 0U)
NYX	0:85b3fd62ea1a	1207	{
NYX	0:85b3fd62ea1a	1208	hi2c->PreviousState = I2C_STATE_NONE;
NYX	0:85b3fd62ea1a	1209	hi2c->State= HAL_I2C_STATE_READY;
NYX	0:85b3fd62ea1a	1210
NYX	0:85b3fd62ea1a	1211	/* Process Unlocked */
NYX	0:85b3fd62ea1a	1212	__HAL_UNLOCK(hi2c);
NYX	0:85b3fd62ea1a	1213
NYX	0:85b3fd62ea1a	1214	return HAL_TIMEOUT;
NYX	0:85b3fd62ea1a	1215	}
NYX	0:85b3fd62ea1a	1216	}
NYX	0:85b3fd62ea1a	1217	while(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) != RESET);
NYX	0:85b3fd62ea1a	1218
NYX	0:85b3fd62ea1a	1219	/* Process Locked */
NYX	0:85b3fd62ea1a	1220	__HAL_LOCK(hi2c);
NYX	0:85b3fd62ea1a	1221
NYX	0:85b3fd62ea1a	1222	/* Check if the I2C is already enabled */
NYX	0:85b3fd62ea1a	1223	if((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)
NYX	0:85b3fd62ea1a	1224	{
NYX	0:85b3fd62ea1a	1225	/* Enable I2C peripheral */
NYX	0:85b3fd62ea1a	1226	__HAL_I2C_ENABLE(hi2c);
NYX	0:85b3fd62ea1a	1227	}
NYX	0:85b3fd62ea1a	1228
NYX	0:85b3fd62ea1a	1229	/* Disable Pos */
NYX	0:85b3fd62ea1a	1230	hi2c->Instance->CR1 &= ~I2C_CR1_POS;
NYX	0:85b3fd62ea1a	1231
NYX	0:85b3fd62ea1a	1232	hi2c->State = HAL_I2C_STATE_BUSY_TX;
NYX	0:85b3fd62ea1a	1233	hi2c->Mode = HAL_I2C_MODE_MASTER;
NYX	0:85b3fd62ea1a	1234	hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
NYX	0:85b3fd62ea1a	1235
NYX	0:85b3fd62ea1a	1236	/* Prepare transfer parameters */
NYX	0:85b3fd62ea1a	1237	hi2c->pBuffPtr = pData;
NYX	0:85b3fd62ea1a	1238	hi2c->XferCount = Size;
NYX	0:85b3fd62ea1a	1239	hi2c->XferOptions = I2C_NO_OPTION_FRAME;
NYX	0:85b3fd62ea1a	1240	hi2c->XferSize = hi2c->XferCount;
NYX	0:85b3fd62ea1a	1241	hi2c->Devaddress = DevAddress;
NYX	0:85b3fd62ea1a	1242
NYX	0:85b3fd62ea1a	1243	/* Generate Start */
NYX	0:85b3fd62ea1a	1244	hi2c->Instance->CR1 \|= I2C_CR1_START;
NYX	0:85b3fd62ea1a	1245
NYX	0:85b3fd62ea1a	1246	/* Process Unlocked */
NYX	0:85b3fd62ea1a	1247	__HAL_UNLOCK(hi2c);
NYX	0:85b3fd62ea1a	1248
NYX	0:85b3fd62ea1a	1249	/* Note : The I2C interrupts must be enabled after unlocking current process
NYX	0:85b3fd62ea1a	1250	to avoid the risk of I2C interrupt handle execution before current
NYX	0:85b3fd62ea1a	1251	process unlock */
NYX	0:85b3fd62ea1a	1252	/* Enable EVT, BUF and ERR interrupt */
NYX	0:85b3fd62ea1a	1253	__HAL_I2C_ENABLE_IT(hi2c, I2C_IT_EVT \| I2C_IT_BUF \| I2C_IT_ERR);
NYX	0:85b3fd62ea1a	1254
NYX	0:85b3fd62ea1a	1255	return HAL_OK;
NYX	0:85b3fd62ea1a	1256	}
NYX	0:85b3fd62ea1a	1257	else
NYX	0:85b3fd62ea1a	1258	{
NYX	0:85b3fd62ea1a	1259	return HAL_BUSY;
NYX	0:85b3fd62ea1a	1260	}
NYX	0:85b3fd62ea1a	1261	}
NYX	0:85b3fd62ea1a	1262
NYX	0:85b3fd62ea1a	1263	/**
NYX	0:85b3fd62ea1a	1264	* @brief Receive in master mode an amount of data in non-blocking mode with Interrupt
NYX	0:85b3fd62ea1a	1265	* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
NYX	0:85b3fd62ea1a	1266	* the configuration information for the specified I2C.
NYX	0:85b3fd62ea1a	1267	* @param DevAddress Target device address: The device 7 bits address value
NYX	0:85b3fd62ea1a	1268	* in datasheet must be shift at right before call interface
NYX	0:85b3fd62ea1a	1269	* @param pData Pointer to data buffer
NYX	0:85b3fd62ea1a	1270	* @param Size Amount of data to be sent
NYX	0:85b3fd62ea1a	1271	* @retval HAL status
NYX	0:85b3fd62ea1a	1272	*/
NYX	0:85b3fd62ea1a	1273	HAL_StatusTypeDef HAL_I2C_Master_Receive_IT(I2C_HandleTypeDef hi2c, uint16_t DevAddress, uint8_t pData, uint16_t Size)
NYX	0:85b3fd62ea1a	1274	{
NYX	0:85b3fd62ea1a	1275	__IO uint32_t count = 0U;
NYX	0:85b3fd62ea1a	1276
NYX	0:85b3fd62ea1a	1277	if(hi2c->State == HAL_I2C_STATE_READY)
NYX	0:85b3fd62ea1a	1278	{
NYX	0:85b3fd62ea1a	1279	/* Wait until BUSY flag is reset */
NYX	0:85b3fd62ea1a	1280	count = I2C_TIMEOUT_BUSY_FLAG * (SystemCoreClock /25U /1000U);
NYX	0:85b3fd62ea1a	1281	do
NYX	0:85b3fd62ea1a	1282	{
NYX	0:85b3fd62ea1a	1283	if(count-- == 0U)
NYX	0:85b3fd62ea1a	1284	{
NYX	0:85b3fd62ea1a	1285	hi2c->PreviousState = I2C_STATE_NONE;
NYX	0:85b3fd62ea1a	1286	hi2c->State= HAL_I2C_STATE_READY;
NYX	0:85b3fd62ea1a	1287
NYX	0:85b3fd62ea1a	1288	/* Process Unlocked */
NYX	0:85b3fd62ea1a	1289	__HAL_UNLOCK(hi2c);
NYX	0:85b3fd62ea1a	1290
NYX	0:85b3fd62ea1a	1291	return HAL_TIMEOUT;
NYX	0:85b3fd62ea1a	1292	}
NYX	0:85b3fd62ea1a	1293	}
NYX	0:85b3fd62ea1a	1294	while(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) != RESET);
NYX	0:85b3fd62ea1a	1295
NYX	0:85b3fd62ea1a	1296	/* Process Locked */
NYX	0:85b3fd62ea1a	1297	__HAL_LOCK(hi2c);
NYX	0:85b3fd62ea1a	1298
NYX	0:85b3fd62ea1a	1299	/* Check if the I2C is already enabled */
NYX	0:85b3fd62ea1a	1300	if((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)
NYX	0:85b3fd62ea1a	1301	{
NYX	0:85b3fd62ea1a	1302	/* Enable I2C peripheral */
NYX	0:85b3fd62ea1a	1303	__HAL_I2C_ENABLE(hi2c);
NYX	0:85b3fd62ea1a	1304	}
NYX	0:85b3fd62ea1a	1305
NYX	0:85b3fd62ea1a	1306	/* Disable Pos */
NYX	0:85b3fd62ea1a	1307	hi2c->Instance->CR1 &= ~I2C_CR1_POS;
NYX	0:85b3fd62ea1a	1308
NYX	0:85b3fd62ea1a	1309	hi2c->State = HAL_I2C_STATE_BUSY_RX;
NYX	0:85b3fd62ea1a	1310	hi2c->Mode = HAL_I2C_MODE_MASTER;
NYX	0:85b3fd62ea1a	1311	hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
NYX	0:85b3fd62ea1a	1312
NYX	0:85b3fd62ea1a	1313	/* Prepare transfer parameters */
NYX	0:85b3fd62ea1a	1314	hi2c->pBuffPtr = pData;
NYX	0:85b3fd62ea1a	1315	hi2c->XferCount = Size;
NYX	0:85b3fd62ea1a	1316	hi2c->XferOptions = I2C_NO_OPTION_FRAME;
NYX	0:85b3fd62ea1a	1317	hi2c->XferSize = hi2c->XferCount;
NYX	0:85b3fd62ea1a	1318	hi2c->Devaddress = DevAddress;
NYX	0:85b3fd62ea1a	1319
NYX	0:85b3fd62ea1a	1320	/* Enable Acknowledge */
NYX	0:85b3fd62ea1a	1321	hi2c->Instance->CR1 \|= I2C_CR1_ACK;
NYX	0:85b3fd62ea1a	1322
NYX	0:85b3fd62ea1a	1323	/* Generate Start */
NYX	0:85b3fd62ea1a	1324	hi2c->Instance->CR1 \|= I2C_CR1_START;
NYX	0:85b3fd62ea1a	1325
NYX	0:85b3fd62ea1a	1326	/* Process Unlocked */
NYX	0:85b3fd62ea1a	1327	__HAL_UNLOCK(hi2c);
NYX	0:85b3fd62ea1a	1328
NYX	0:85b3fd62ea1a	1329	/* Note : The I2C interrupts must be enabled after unlocking current process
NYX	0:85b3fd62ea1a	1330	to avoid the risk of I2C interrupt handle execution before current
NYX	0:85b3fd62ea1a	1331	process unlock */
NYX	0:85b3fd62ea1a	1332
NYX	0:85b3fd62ea1a	1333	/* Enable EVT, BUF and ERR interrupt */
NYX	0:85b3fd62ea1a	1334	__HAL_I2C_ENABLE_IT(hi2c, I2C_IT_EVT \| I2C_IT_BUF \| I2C_IT_ERR);
NYX	0:85b3fd62ea1a	1335
NYX	0:85b3fd62ea1a	1336	return HAL_OK;
NYX	0:85b3fd62ea1a	1337	}
NYX	0:85b3fd62ea1a	1338	else
NYX	0:85b3fd62ea1a	1339	{
NYX	0:85b3fd62ea1a	1340	return HAL_BUSY;
NYX	0:85b3fd62ea1a	1341	}
NYX	0:85b3fd62ea1a	1342	}
NYX	0:85b3fd62ea1a	1343
NYX	0:85b3fd62ea1a	1344	/**
NYX	0:85b3fd62ea1a	1345	* @brief Sequential transmit in master mode an amount of data in non-blocking mode with Interrupt
NYX	0:85b3fd62ea1a	1346	* @note This interface allow to manage repeated start condition when a direction change during transfer
NYX	0:85b3fd62ea1a	1347	* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
NYX	0:85b3fd62ea1a	1348	* the configuration information for the specified I2C.
NYX	0:85b3fd62ea1a	1349	* @param DevAddress Target device address: The device 7 bits address value
NYX	0:85b3fd62ea1a	1350	* in datasheet must be shift at right before call interface
NYX	0:85b3fd62ea1a	1351	* @param pData Pointer to data buffer
NYX	0:85b3fd62ea1a	1352	* @param Size Amount of data to be sent
NYX	0:85b3fd62ea1a	1353	* @param XferOptions Options of Transfer, value of @ref I2C_XferOptions_definition
NYX	0:85b3fd62ea1a	1354	* @retval HAL status
NYX	0:85b3fd62ea1a	1355	*/
NYX	0:85b3fd62ea1a	1356	HAL_StatusTypeDef HAL_I2C_Master_Sequential_Transmit_IT(I2C_HandleTypeDef hi2c, uint16_t DevAddress, uint8_t pData, uint16_t Size, uint32_t XferOptions)
NYX	0:85b3fd62ea1a	1357	{
NYX	0:85b3fd62ea1a	1358	__IO uint32_t Prev_State = 0x00U;
NYX	0:85b3fd62ea1a	1359	__IO uint32_t count = 0x00U;
NYX	0:85b3fd62ea1a	1360
NYX	0:85b3fd62ea1a	1361	/* Check the parameters */
NYX	0:85b3fd62ea1a	1362	assert_param(IS_I2C_TRANSFER_OPTIONS_REQUEST(XferOptions));
NYX	0:85b3fd62ea1a	1363
NYX	0:85b3fd62ea1a	1364	if(hi2c->State == HAL_I2C_STATE_READY)
NYX	0:85b3fd62ea1a	1365	{
NYX	0:85b3fd62ea1a	1366	/* Check Busy Flag only if FIRST call of Master interface */
NYX	0:85b3fd62ea1a	1367	if((XferOptions == I2C_FIRST_AND_LAST_FRAME) \|\| (XferOptions == I2C_FIRST_FRAME))
NYX	0:85b3fd62ea1a	1368	{
NYX	0:85b3fd62ea1a	1369	/* Wait until BUSY flag is reset */
NYX	0:85b3fd62ea1a	1370	count = I2C_TIMEOUT_BUSY_FLAG * (SystemCoreClock /25U /1000U);
NYX	0:85b3fd62ea1a	1371	do
NYX	0:85b3fd62ea1a	1372	{
NYX	0:85b3fd62ea1a	1373	if(count-- == 0U)
NYX	0:85b3fd62ea1a	1374	{
NYX	0:85b3fd62ea1a	1375	hi2c->PreviousState = I2C_STATE_NONE;
NYX	0:85b3fd62ea1a	1376	hi2c->State= HAL_I2C_STATE_READY;
NYX	0:85b3fd62ea1a	1377
NYX	0:85b3fd62ea1a	1378	/* Process Unlocked */
NYX	0:85b3fd62ea1a	1379	__HAL_UNLOCK(hi2c);
NYX	0:85b3fd62ea1a	1380
NYX	0:85b3fd62ea1a	1381	return HAL_TIMEOUT;
NYX	0:85b3fd62ea1a	1382	}
NYX	0:85b3fd62ea1a	1383	}
NYX	0:85b3fd62ea1a	1384	while(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) != RESET);
NYX	0:85b3fd62ea1a	1385	}
NYX	0:85b3fd62ea1a	1386
NYX	0:85b3fd62ea1a	1387	/* Process Locked */
NYX	0:85b3fd62ea1a	1388	__HAL_LOCK(hi2c);
NYX	0:85b3fd62ea1a	1389
NYX	0:85b3fd62ea1a	1390	/* Check if the I2C is already enabled */
NYX	0:85b3fd62ea1a	1391	if((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)
NYX	0:85b3fd62ea1a	1392	{
NYX	0:85b3fd62ea1a	1393	/* Enable I2C peripheral */
NYX	0:85b3fd62ea1a	1394	__HAL_I2C_ENABLE(hi2c);
NYX	0:85b3fd62ea1a	1395	}
NYX	0:85b3fd62ea1a	1396
NYX	0:85b3fd62ea1a	1397	/* Disable Pos */
NYX	0:85b3fd62ea1a	1398	hi2c->Instance->CR1 &= ~I2C_CR1_POS;
NYX	0:85b3fd62ea1a	1399
NYX	0:85b3fd62ea1a	1400	hi2c->State = HAL_I2C_STATE_BUSY_TX;
NYX	0:85b3fd62ea1a	1401	hi2c->Mode = HAL_I2C_MODE_MASTER;
NYX	0:85b3fd62ea1a	1402	hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
NYX	0:85b3fd62ea1a	1403
NYX	0:85b3fd62ea1a	1404	/* Prepare transfer parameters */
NYX	0:85b3fd62ea1a	1405	hi2c->pBuffPtr = pData;
NYX	0:85b3fd62ea1a	1406	hi2c->XferCount = Size;
NYX	0:85b3fd62ea1a	1407	hi2c->XferOptions = XferOptions;
NYX	0:85b3fd62ea1a	1408	hi2c->XferSize = hi2c->XferCount;
NYX	0:85b3fd62ea1a	1409	hi2c->Devaddress = DevAddress;
NYX	0:85b3fd62ea1a	1410
NYX	0:85b3fd62ea1a	1411	Prev_State = hi2c->PreviousState;
NYX	0:85b3fd62ea1a	1412
NYX	0:85b3fd62ea1a	1413	/* Generate Start */
NYX	0:85b3fd62ea1a	1414	if((Prev_State == I2C_STATE_MASTER_BUSY_RX) \|\| (Prev_State == I2C_STATE_NONE))
NYX	0:85b3fd62ea1a	1415	{
NYX	0:85b3fd62ea1a	1416	/* Generate Start condition if first transfer */
NYX	0:85b3fd62ea1a	1417	if((XferOptions == I2C_FIRST_AND_LAST_FRAME) \|\| (XferOptions == I2C_FIRST_FRAME))
NYX	0:85b3fd62ea1a	1418	{
NYX	0:85b3fd62ea1a	1419	/* Generate Start */
NYX	0:85b3fd62ea1a	1420	hi2c->Instance->CR1 \|= I2C_CR1_START;
NYX	0:85b3fd62ea1a	1421	}
NYX	0:85b3fd62ea1a	1422	else if(Prev_State == I2C_STATE_MASTER_BUSY_RX) // MBED
NYX	0:85b3fd62ea1a	1423	{
NYX	0:85b3fd62ea1a	1424	/* Generate ReStart */
NYX	0:85b3fd62ea1a	1425	hi2c->Instance->CR1 \|= I2C_CR1_START;
NYX	0:85b3fd62ea1a	1426	}
NYX	0:85b3fd62ea1a	1427	}
NYX	0:85b3fd62ea1a	1428
NYX	0:85b3fd62ea1a	1429	/* Process Unlocked */
NYX	0:85b3fd62ea1a	1430	__HAL_UNLOCK(hi2c);
NYX	0:85b3fd62ea1a	1431
NYX	0:85b3fd62ea1a	1432	/* Note : The I2C interrupts must be enabled after unlocking current process
NYX	0:85b3fd62ea1a	1433	to avoid the risk of I2C interrupt handle execution before current
NYX	0:85b3fd62ea1a	1434	process unlock */
NYX	0:85b3fd62ea1a	1435
NYX	0:85b3fd62ea1a	1436	/* Enable EVT, BUF and ERR interrupt */
NYX	0:85b3fd62ea1a	1437	__HAL_I2C_ENABLE_IT(hi2c, I2C_IT_EVT \| I2C_IT_BUF \| I2C_IT_ERR);
NYX	0:85b3fd62ea1a	1438
NYX	0:85b3fd62ea1a	1439	return HAL_OK;
NYX	0:85b3fd62ea1a	1440	}
NYX	0:85b3fd62ea1a	1441	else
NYX	0:85b3fd62ea1a	1442	{
NYX	0:85b3fd62ea1a	1443	return HAL_BUSY;
NYX	0:85b3fd62ea1a	1444	}
NYX	0:85b3fd62ea1a	1445	}
NYX	0:85b3fd62ea1a	1446
NYX	0:85b3fd62ea1a	1447	/**
NYX	0:85b3fd62ea1a	1448	* @brief Sequential receive in master mode an amount of data in non-blocking mode with Interrupt
NYX	0:85b3fd62ea1a	1449	* @note This interface allow to manage repeated start condition when a direction change during transfer
NYX	0:85b3fd62ea1a	1450	* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
NYX	0:85b3fd62ea1a	1451	* the configuration information for the specified I2C.
NYX	0:85b3fd62ea1a	1452	* @param DevAddress Target device address: The device 7 bits address value
NYX	0:85b3fd62ea1a	1453	* in datasheet must be shift at right before call interface
NYX	0:85b3fd62ea1a	1454	* @param pData Pointer to data buffer
NYX	0:85b3fd62ea1a	1455	* @param Size Amount of data to be sent
NYX	0:85b3fd62ea1a	1456	* @param XferOptions Options of Transfer, value of @ref I2C_XferOptions_definition
NYX	0:85b3fd62ea1a	1457	* @retval HAL status
NYX	0:85b3fd62ea1a	1458	*/
NYX	0:85b3fd62ea1a	1459	HAL_StatusTypeDef HAL_I2C_Master_Sequential_Receive_IT(I2C_HandleTypeDef hi2c, uint16_t DevAddress, uint8_t pData, uint16_t Size, uint32_t XferOptions)
NYX	0:85b3fd62ea1a	1460	{
NYX	0:85b3fd62ea1a	1461	__IO uint32_t count = 0U;
NYX	0:85b3fd62ea1a	1462
NYX	0:85b3fd62ea1a	1463	/* Check the parameters */
NYX	0:85b3fd62ea1a	1464	assert_param(IS_I2C_TRANSFER_OPTIONS_REQUEST(XferOptions));
NYX	0:85b3fd62ea1a	1465
NYX	0:85b3fd62ea1a	1466	if(hi2c->State == HAL_I2C_STATE_READY)
NYX	0:85b3fd62ea1a	1467	{
NYX	0:85b3fd62ea1a	1468	/* Check Busy Flag only if FIRST call of Master interface */
NYX	0:85b3fd62ea1a	1469	if((XferOptions == I2C_FIRST_AND_LAST_FRAME) \|\| (XferOptions == I2C_FIRST_FRAME))
NYX	0:85b3fd62ea1a	1470	{
NYX	0:85b3fd62ea1a	1471	/* Wait until BUSY flag is reset */
NYX	0:85b3fd62ea1a	1472	count = I2C_TIMEOUT_BUSY_FLAG * (SystemCoreClock /25U /1000U);
NYX	0:85b3fd62ea1a	1473	do
NYX	0:85b3fd62ea1a	1474	{
NYX	0:85b3fd62ea1a	1475	if(count-- == 0U)
NYX	0:85b3fd62ea1a	1476	{
NYX	0:85b3fd62ea1a	1477	hi2c->PreviousState = I2C_STATE_NONE;
NYX	0:85b3fd62ea1a	1478	hi2c->State= HAL_I2C_STATE_READY;
NYX	0:85b3fd62ea1a	1479
NYX	0:85b3fd62ea1a	1480	/* Process Unlocked */
NYX	0:85b3fd62ea1a	1481	__HAL_UNLOCK(hi2c);
NYX	0:85b3fd62ea1a	1482
NYX	0:85b3fd62ea1a	1483	return HAL_TIMEOUT;
NYX	0:85b3fd62ea1a	1484	}
NYX	0:85b3fd62ea1a	1485	}
NYX	0:85b3fd62ea1a	1486	while(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) != RESET);
NYX	0:85b3fd62ea1a	1487	}
NYX	0:85b3fd62ea1a	1488
NYX	0:85b3fd62ea1a	1489	/* Process Locked */
NYX	0:85b3fd62ea1a	1490	__HAL_LOCK(hi2c);
NYX	0:85b3fd62ea1a	1491
NYX	0:85b3fd62ea1a	1492	/* Check if the I2C is already enabled */
NYX	0:85b3fd62ea1a	1493	if((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)
NYX	0:85b3fd62ea1a	1494	{
NYX	0:85b3fd62ea1a	1495	/* Enable I2C peripheral */
NYX	0:85b3fd62ea1a	1496	__HAL_I2C_ENABLE(hi2c);
NYX	0:85b3fd62ea1a	1497	}
NYX	0:85b3fd62ea1a	1498
NYX	0:85b3fd62ea1a	1499	/* Disable Pos */
NYX	0:85b3fd62ea1a	1500	hi2c->Instance->CR1 &= ~I2C_CR1_POS;
NYX	0:85b3fd62ea1a	1501
NYX	0:85b3fd62ea1a	1502	hi2c->State = HAL_I2C_STATE_BUSY_RX;
NYX	0:85b3fd62ea1a	1503	hi2c->Mode = HAL_I2C_MODE_MASTER;
NYX	0:85b3fd62ea1a	1504	hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
NYX	0:85b3fd62ea1a	1505
NYX	0:85b3fd62ea1a	1506	/* Prepare transfer parameters */
NYX	0:85b3fd62ea1a	1507	hi2c->pBuffPtr = pData;
NYX	0:85b3fd62ea1a	1508	hi2c->XferCount = Size;
NYX	0:85b3fd62ea1a	1509	hi2c->XferOptions = XferOptions;
NYX	0:85b3fd62ea1a	1510	hi2c->XferSize = hi2c->XferCount;
NYX	0:85b3fd62ea1a	1511	hi2c->Devaddress = DevAddress;
NYX	0:85b3fd62ea1a	1512
NYX	0:85b3fd62ea1a	1513	if((hi2c->PreviousState == I2C_STATE_MASTER_BUSY_TX) \|\| (hi2c->PreviousState == I2C_STATE_NONE))
NYX	0:85b3fd62ea1a	1514	{
NYX	0:85b3fd62ea1a	1515	/* Generate Start condition if first transfer */
NYX	0:85b3fd62ea1a	1516	if((XferOptions == I2C_FIRST_AND_LAST_FRAME) \|\| (XferOptions == I2C_FIRST_FRAME) \|\| (XferOptions == I2C_NO_OPTION_FRAME))
NYX	0:85b3fd62ea1a	1517	{
NYX	0:85b3fd62ea1a	1518	/* Enable Acknowledge */
NYX	0:85b3fd62ea1a	1519	hi2c->Instance->CR1 \|= I2C_CR1_ACK;
NYX	0:85b3fd62ea1a	1520
NYX	0:85b3fd62ea1a	1521	/* Generate Start */
NYX	0:85b3fd62ea1a	1522	hi2c->Instance->CR1 \|= I2C_CR1_START;
NYX	0:85b3fd62ea1a	1523	}
NYX	0:85b3fd62ea1a	1524	else if(hi2c->PreviousState == I2C_STATE_MASTER_BUSY_TX)
NYX	0:85b3fd62ea1a	1525	{
NYX	0:85b3fd62ea1a	1526	/* Enable Acknowledge */
NYX	0:85b3fd62ea1a	1527	hi2c->Instance->CR1 \|= I2C_CR1_ACK;
NYX	0:85b3fd62ea1a	1528
NYX	0:85b3fd62ea1a	1529	/* Generate ReStart */
NYX	0:85b3fd62ea1a	1530	hi2c->Instance->CR1 \|= I2C_CR1_START;
NYX	0:85b3fd62ea1a	1531	}
NYX	0:85b3fd62ea1a	1532	}
NYX	0:85b3fd62ea1a	1533
NYX	0:85b3fd62ea1a	1534	/* Process Unlocked */
NYX	0:85b3fd62ea1a	1535	__HAL_UNLOCK(hi2c);
NYX	0:85b3fd62ea1a	1536
NYX	0:85b3fd62ea1a	1537	/* Note : The I2C interrupts must be enabled after unlocking current process
NYX	0:85b3fd62ea1a	1538	to avoid the risk of I2C interrupt handle execution before current
NYX	0:85b3fd62ea1a	1539	process unlock */
NYX	0:85b3fd62ea1a	1540
NYX	0:85b3fd62ea1a	1541	/* Enable EVT, BUF and ERR interrupt */
NYX	0:85b3fd62ea1a	1542	__HAL_I2C_ENABLE_IT(hi2c, I2C_IT_EVT \| I2C_IT_BUF \| I2C_IT_ERR);
NYX	0:85b3fd62ea1a	1543
NYX	0:85b3fd62ea1a	1544	return HAL_OK;
NYX	0:85b3fd62ea1a	1545	}
NYX	0:85b3fd62ea1a	1546	else
NYX	0:85b3fd62ea1a	1547	{
NYX	0:85b3fd62ea1a	1548	return HAL_BUSY;
NYX	0:85b3fd62ea1a	1549	}
NYX	0:85b3fd62ea1a	1550	}
NYX	0:85b3fd62ea1a	1551
NYX	0:85b3fd62ea1a	1552	/**
NYX	0:85b3fd62ea1a	1553	* @brief Transmit in slave mode an amount of data in non-blocking mode with Interrupt
NYX	0:85b3fd62ea1a	1554	* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
NYX	0:85b3fd62ea1a	1555	* the configuration information for the specified I2C.
NYX	0:85b3fd62ea1a	1556	* @param pData Pointer to data buffer
NYX	0:85b3fd62ea1a	1557	* @param Size Amount of data to be sent
NYX	0:85b3fd62ea1a	1558	* @retval HAL status
NYX	0:85b3fd62ea1a	1559	*/
NYX	0:85b3fd62ea1a	1560	HAL_StatusTypeDef HAL_I2C_Slave_Transmit_IT(I2C_HandleTypeDef hi2c, uint8_t pData, uint16_t Size)
NYX	0:85b3fd62ea1a	1561	{
NYX	0:85b3fd62ea1a	1562	__IO uint32_t count = 0U;
NYX	0:85b3fd62ea1a	1563
NYX	0:85b3fd62ea1a	1564	if(hi2c->State == HAL_I2C_STATE_READY)
NYX	0:85b3fd62ea1a	1565	{
NYX	0:85b3fd62ea1a	1566	if((pData == NULL) \|\| (Size == 0U))
NYX	0:85b3fd62ea1a	1567	{
NYX	0:85b3fd62ea1a	1568	return HAL_ERROR;
NYX	0:85b3fd62ea1a	1569	}
NYX	0:85b3fd62ea1a	1570
NYX	0:85b3fd62ea1a	1571	/* Wait until BUSY flag is reset */
NYX	0:85b3fd62ea1a	1572	count = I2C_TIMEOUT_BUSY_FLAG * (SystemCoreClock /25U /1000U);
NYX	0:85b3fd62ea1a	1573	do
NYX	0:85b3fd62ea1a	1574	{
NYX	0:85b3fd62ea1a	1575	if(count-- == 0U)
NYX	0:85b3fd62ea1a	1576	{
NYX	0:85b3fd62ea1a	1577	hi2c->PreviousState = I2C_STATE_NONE;
NYX	0:85b3fd62ea1a	1578	hi2c->State= HAL_I2C_STATE_READY;
NYX	0:85b3fd62ea1a	1579
NYX	0:85b3fd62ea1a	1580	/* Process Unlocked */
NYX	0:85b3fd62ea1a	1581	__HAL_UNLOCK(hi2c);
NYX	0:85b3fd62ea1a	1582
NYX	0:85b3fd62ea1a	1583	return HAL_TIMEOUT;
NYX	0:85b3fd62ea1a	1584	}
NYX	0:85b3fd62ea1a	1585	}
NYX	0:85b3fd62ea1a	1586	while(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) != RESET);
NYX	0:85b3fd62ea1a	1587
NYX	0:85b3fd62ea1a	1588	/* Process Locked */
NYX	0:85b3fd62ea1a	1589	__HAL_LOCK(hi2c);
NYX	0:85b3fd62ea1a	1590
NYX	0:85b3fd62ea1a	1591	/* Check if the I2C is already enabled */
NYX	0:85b3fd62ea1a	1592	if((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)
NYX	0:85b3fd62ea1a	1593	{
NYX	0:85b3fd62ea1a	1594	/* Enable I2C peripheral */
NYX	0:85b3fd62ea1a	1595	__HAL_I2C_ENABLE(hi2c);
NYX	0:85b3fd62ea1a	1596	}
NYX	0:85b3fd62ea1a	1597
NYX	0:85b3fd62ea1a	1598	/* Disable Pos */
NYX	0:85b3fd62ea1a	1599	hi2c->Instance->CR1 &= ~I2C_CR1_POS;
NYX	0:85b3fd62ea1a	1600
NYX	0:85b3fd62ea1a	1601	hi2c->State = HAL_I2C_STATE_BUSY_TX;
NYX	0:85b3fd62ea1a	1602	hi2c->Mode = HAL_I2C_MODE_SLAVE;
NYX	0:85b3fd62ea1a	1603	hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
NYX	0:85b3fd62ea1a	1604
NYX	0:85b3fd62ea1a	1605	/* Prepare transfer parameters */
NYX	0:85b3fd62ea1a	1606	hi2c->pBuffPtr = pData;
NYX	0:85b3fd62ea1a	1607	hi2c->XferCount = Size;
NYX	0:85b3fd62ea1a	1608	hi2c->XferOptions = I2C_NO_OPTION_FRAME;
NYX	0:85b3fd62ea1a	1609	hi2c->XferSize = hi2c->XferCount;
NYX	0:85b3fd62ea1a	1610
NYX	0:85b3fd62ea1a	1611	/* Enable Address Acknowledge */
NYX	0:85b3fd62ea1a	1612	hi2c->Instance->CR1 \|= I2C_CR1_ACK;
NYX	0:85b3fd62ea1a	1613
NYX	0:85b3fd62ea1a	1614	/* Process Unlocked */
NYX	0:85b3fd62ea1a	1615	__HAL_UNLOCK(hi2c);
NYX	0:85b3fd62ea1a	1616
NYX	0:85b3fd62ea1a	1617	/* Note : The I2C interrupts must be enabled after unlocking current process
NYX	0:85b3fd62ea1a	1618	to avoid the risk of I2C interrupt handle execution before current
NYX	0:85b3fd62ea1a	1619	process unlock */
NYX	0:85b3fd62ea1a	1620
NYX	0:85b3fd62ea1a	1621	/* Enable EVT, BUF and ERR interrupt */
NYX	0:85b3fd62ea1a	1622	__HAL_I2C_ENABLE_IT(hi2c, I2C_IT_EVT \| I2C_IT_BUF \| I2C_IT_ERR);
NYX	0:85b3fd62ea1a	1623
NYX	0:85b3fd62ea1a	1624	return HAL_OK;
NYX	0:85b3fd62ea1a	1625	}
NYX	0:85b3fd62ea1a	1626	else
NYX	0:85b3fd62ea1a	1627	{
NYX	0:85b3fd62ea1a	1628	return HAL_BUSY;
NYX	0:85b3fd62ea1a	1629	}
NYX	0:85b3fd62ea1a	1630	}
NYX	0:85b3fd62ea1a	1631
NYX	0:85b3fd62ea1a	1632	/**
NYX	0:85b3fd62ea1a	1633	* @brief Receive in slave mode an amount of data in non-blocking mode with Interrupt
NYX	0:85b3fd62ea1a	1634	* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
NYX	0:85b3fd62ea1a	1635	* the configuration information for the specified I2C.
NYX	0:85b3fd62ea1a	1636	* @param pData Pointer to data buffer
NYX	0:85b3fd62ea1a	1637	* @param Size Amount of data to be sent
NYX	0:85b3fd62ea1a	1638	* @retval HAL status
NYX	0:85b3fd62ea1a	1639	*/
NYX	0:85b3fd62ea1a	1640	HAL_StatusTypeDef HAL_I2C_Slave_Receive_IT(I2C_HandleTypeDef hi2c, uint8_t pData, uint16_t Size)
NYX	0:85b3fd62ea1a	1641	{
NYX	0:85b3fd62ea1a	1642	__IO uint32_t count = 0U;
NYX	0:85b3fd62ea1a	1643
NYX	0:85b3fd62ea1a	1644	if(hi2c->State == HAL_I2C_STATE_READY)
NYX	0:85b3fd62ea1a	1645	{
NYX	0:85b3fd62ea1a	1646	if((pData == NULL) \|\| (Size == 0U))
NYX	0:85b3fd62ea1a	1647	{
NYX	0:85b3fd62ea1a	1648	return HAL_ERROR;
NYX	0:85b3fd62ea1a	1649	}
NYX	0:85b3fd62ea1a	1650
NYX	0:85b3fd62ea1a	1651	/* Wait until BUSY flag is reset */
NYX	0:85b3fd62ea1a	1652	count = I2C_TIMEOUT_BUSY_FLAG * (SystemCoreClock /25U /1000U);
NYX	0:85b3fd62ea1a	1653	do
NYX	0:85b3fd62ea1a	1654	{
NYX	0:85b3fd62ea1a	1655	if(count-- == 0U)
NYX	0:85b3fd62ea1a	1656	{
NYX	0:85b3fd62ea1a	1657	hi2c->PreviousState = I2C_STATE_NONE;
NYX	0:85b3fd62ea1a	1658	hi2c->State= HAL_I2C_STATE_READY;
NYX	0:85b3fd62ea1a	1659
NYX	0:85b3fd62ea1a	1660	/* Process Unlocked */
NYX	0:85b3fd62ea1a	1661	__HAL_UNLOCK(hi2c);
NYX	0:85b3fd62ea1a	1662
NYX	0:85b3fd62ea1a	1663	return HAL_TIMEOUT;
NYX	0:85b3fd62ea1a	1664	}
NYX	0:85b3fd62ea1a	1665	}
NYX	0:85b3fd62ea1a	1666	while(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) != RESET);
NYX	0:85b3fd62ea1a	1667
NYX	0:85b3fd62ea1a	1668	/* Process Locked */
NYX	0:85b3fd62ea1a	1669	__HAL_LOCK(hi2c);
NYX	0:85b3fd62ea1a	1670
NYX	0:85b3fd62ea1a	1671	/* Check if the I2C is already enabled */
NYX	0:85b3fd62ea1a	1672	if((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)
NYX	0:85b3fd62ea1a	1673	{
NYX	0:85b3fd62ea1a	1674	/* Enable I2C peripheral */
NYX	0:85b3fd62ea1a	1675	__HAL_I2C_ENABLE(hi2c);
NYX	0:85b3fd62ea1a	1676	}
NYX	0:85b3fd62ea1a	1677
NYX	0:85b3fd62ea1a	1678	/* Disable Pos */
NYX	0:85b3fd62ea1a	1679	hi2c->Instance->CR1 &= ~I2C_CR1_POS;
NYX	0:85b3fd62ea1a	1680
NYX	0:85b3fd62ea1a	1681	hi2c->State = HAL_I2C_STATE_BUSY_RX;
NYX	0:85b3fd62ea1a	1682	hi2c->Mode = HAL_I2C_MODE_SLAVE;
NYX	0:85b3fd62ea1a	1683	hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
NYX	0:85b3fd62ea1a	1684
NYX	0:85b3fd62ea1a	1685	/* Prepare transfer parameters */
NYX	0:85b3fd62ea1a	1686	hi2c->pBuffPtr = pData;
NYX	0:85b3fd62ea1a	1687	hi2c->XferSize = Size;
NYX	0:85b3fd62ea1a	1688	hi2c->XferCount = Size;
NYX	0:85b3fd62ea1a	1689	hi2c->XferOptions = I2C_NO_OPTION_FRAME;
NYX	0:85b3fd62ea1a	1690
NYX	0:85b3fd62ea1a	1691	/* Enable Address Acknowledge */
NYX	0:85b3fd62ea1a	1692	hi2c->Instance->CR1 \|= I2C_CR1_ACK;
NYX	0:85b3fd62ea1a	1693
NYX	0:85b3fd62ea1a	1694	/* Process Unlocked */
NYX	0:85b3fd62ea1a	1695	__HAL_UNLOCK(hi2c);
NYX	0:85b3fd62ea1a	1696
NYX	0:85b3fd62ea1a	1697	/* Note : The I2C interrupts must be enabled after unlocking current process
NYX	0:85b3fd62ea1a	1698	to avoid the risk of I2C interrupt handle execution before current
NYX	0:85b3fd62ea1a	1699	process unlock */
NYX	0:85b3fd62ea1a	1700
NYX	0:85b3fd62ea1a	1701	/* Enable EVT, BUF and ERR interrupt */
NYX	0:85b3fd62ea1a	1702	__HAL_I2C_ENABLE_IT(hi2c, I2C_IT_EVT \| I2C_IT_BUF \| I2C_IT_ERR);
NYX	0:85b3fd62ea1a	1703
NYX	0:85b3fd62ea1a	1704	return HAL_OK;
NYX	0:85b3fd62ea1a	1705	}
NYX	0:85b3fd62ea1a	1706	else
NYX	0:85b3fd62ea1a	1707	{
NYX	0:85b3fd62ea1a	1708	return HAL_BUSY;
NYX	0:85b3fd62ea1a	1709	}
NYX	0:85b3fd62ea1a	1710	}
NYX	0:85b3fd62ea1a	1711
NYX	0:85b3fd62ea1a	1712	/**
NYX	0:85b3fd62ea1a	1713	* @brief Sequential transmit in slave mode an amount of data in no-blocking mode with Interrupt
NYX	0:85b3fd62ea1a	1714	* @note This interface allow to manage repeated start condition when a direction change during transfer
NYX	0:85b3fd62ea1a	1715	* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
NYX	0:85b3fd62ea1a	1716	* the configuration information for I2C module
NYX	0:85b3fd62ea1a	1717	* @param pData Pointer to data buffer
NYX	0:85b3fd62ea1a	1718	* @param Size Amount of data to be sent
NYX	0:85b3fd62ea1a	1719	* @param XferOptions Options of Transfer, value of @ref I2C_XferOptions_definition
NYX	0:85b3fd62ea1a	1720	* @retval HAL status
NYX	0:85b3fd62ea1a	1721	*/
NYX	0:85b3fd62ea1a	1722	HAL_StatusTypeDef HAL_I2C_Slave_Sequential_Transmit_IT(I2C_HandleTypeDef hi2c, uint8_t pData, uint16_t Size, uint32_t XferOptions)
NYX	0:85b3fd62ea1a	1723	{
NYX	0:85b3fd62ea1a	1724	/* Check the parameters */
NYX	0:85b3fd62ea1a	1725	assert_param(IS_I2C_TRANSFER_OPTIONS_REQUEST(XferOptions));
NYX	0:85b3fd62ea1a	1726
NYX	0:85b3fd62ea1a	1727	if(hi2c->State == HAL_I2C_STATE_LISTEN)
NYX	0:85b3fd62ea1a	1728	{
NYX	0:85b3fd62ea1a	1729	if((pData == NULL) \|\| (Size == 0U))
NYX	0:85b3fd62ea1a	1730	{
NYX	0:85b3fd62ea1a	1731	return HAL_ERROR;
NYX	0:85b3fd62ea1a	1732	}
NYX	0:85b3fd62ea1a	1733
NYX	0:85b3fd62ea1a	1734	/* Process Locked */
NYX	0:85b3fd62ea1a	1735	__HAL_LOCK(hi2c);
NYX	0:85b3fd62ea1a	1736
NYX	0:85b3fd62ea1a	1737	/* Check if the I2C is already enabled */
NYX	0:85b3fd62ea1a	1738	if((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)
NYX	0:85b3fd62ea1a	1739	{
NYX	0:85b3fd62ea1a	1740	/* Enable I2C peripheral */
NYX	0:85b3fd62ea1a	1741	__HAL_I2C_ENABLE(hi2c);
NYX	0:85b3fd62ea1a	1742	}
NYX	0:85b3fd62ea1a	1743
NYX	0:85b3fd62ea1a	1744	/* Disable Pos */
NYX	0:85b3fd62ea1a	1745	hi2c->Instance->CR1 &= ~I2C_CR1_POS;
NYX	0:85b3fd62ea1a	1746
NYX	0:85b3fd62ea1a	1747	hi2c->State = HAL_I2C_STATE_BUSY_TX_LISTEN;
NYX	0:85b3fd62ea1a	1748	hi2c->Mode = HAL_I2C_MODE_SLAVE;
NYX	0:85b3fd62ea1a	1749	hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
NYX	0:85b3fd62ea1a	1750
NYX	0:85b3fd62ea1a	1751	/* Prepare transfer parameters */
NYX	0:85b3fd62ea1a	1752	hi2c->pBuffPtr = pData;
NYX	0:85b3fd62ea1a	1753	hi2c->XferCount = Size;
NYX	0:85b3fd62ea1a	1754	hi2c->XferOptions = XferOptions;
NYX	0:85b3fd62ea1a	1755	hi2c->XferSize = hi2c->XferCount;
NYX	0:85b3fd62ea1a	1756
NYX	0:85b3fd62ea1a	1757	/* Clear ADDR flag */
NYX	0:85b3fd62ea1a	1758	__HAL_I2C_CLEAR_ADDRFLAG(hi2c);
NYX	0:85b3fd62ea1a	1759
NYX	0:85b3fd62ea1a	1760	/* Process Unlocked */
NYX	0:85b3fd62ea1a	1761	__HAL_UNLOCK(hi2c);
NYX	0:85b3fd62ea1a	1762
NYX	0:85b3fd62ea1a	1763	/* Note : The I2C interrupts must be enabled after unlocking current process
NYX	0:85b3fd62ea1a	1764	to avoid the risk of I2C interrupt handle execution before current
NYX	0:85b3fd62ea1a	1765	process unlock */
NYX	0:85b3fd62ea1a	1766
NYX	0:85b3fd62ea1a	1767	/* Enable EVT, BUF and ERR interrupt */
NYX	0:85b3fd62ea1a	1768	__HAL_I2C_ENABLE_IT(hi2c, I2C_IT_EVT \| I2C_IT_BUF \| I2C_IT_ERR);
NYX	0:85b3fd62ea1a	1769
NYX	0:85b3fd62ea1a	1770	return HAL_OK;
NYX	0:85b3fd62ea1a	1771	}
NYX	0:85b3fd62ea1a	1772	else
NYX	0:85b3fd62ea1a	1773	{
NYX	0:85b3fd62ea1a	1774	return HAL_BUSY;
NYX	0:85b3fd62ea1a	1775	}
NYX	0:85b3fd62ea1a	1776	}
NYX	0:85b3fd62ea1a	1777
NYX	0:85b3fd62ea1a	1778	/**
NYX	0:85b3fd62ea1a	1779	* @brief Sequential receive in slave mode an amount of data in non-blocking mode with Interrupt
NYX	0:85b3fd62ea1a	1780	* @note This interface allow to manage repeated start condition when a direction change during transfer
NYX	0:85b3fd62ea1a	1781	* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
NYX	0:85b3fd62ea1a	1782	* the configuration information for the specified I2C.
NYX	0:85b3fd62ea1a	1783	* @param pData Pointer to data buffer
NYX	0:85b3fd62ea1a	1784	* @param Size Amount of data to be sent
NYX	0:85b3fd62ea1a	1785	* @param XferOptions Options of Transfer, value of @ref I2C_XferOptions_definition
NYX	0:85b3fd62ea1a	1786	* @retval HAL status
NYX	0:85b3fd62ea1a	1787	*/
NYX	0:85b3fd62ea1a	1788	HAL_StatusTypeDef HAL_I2C_Slave_Sequential_Receive_IT(I2C_HandleTypeDef hi2c, uint8_t pData, uint16_t Size, uint32_t XferOptions)
NYX	0:85b3fd62ea1a	1789	{
NYX	0:85b3fd62ea1a	1790	/* Check the parameters */
NYX	0:85b3fd62ea1a	1791	assert_param(IS_I2C_TRANSFER_OPTIONS_REQUEST(XferOptions));
NYX	0:85b3fd62ea1a	1792
NYX	0:85b3fd62ea1a	1793	if(hi2c->State == HAL_I2C_STATE_LISTEN)
NYX	0:85b3fd62ea1a	1794	{
NYX	0:85b3fd62ea1a	1795	if((pData == NULL) \|\| (Size == 0U))
NYX	0:85b3fd62ea1a	1796	{
NYX	0:85b3fd62ea1a	1797	return HAL_ERROR;
NYX	0:85b3fd62ea1a	1798	}
NYX	0:85b3fd62ea1a	1799
NYX	0:85b3fd62ea1a	1800	/* Process Locked */
NYX	0:85b3fd62ea1a	1801	__HAL_LOCK(hi2c);
NYX	0:85b3fd62ea1a	1802
NYX	0:85b3fd62ea1a	1803	/* Check if the I2C is already enabled */
NYX	0:85b3fd62ea1a	1804	if((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)
NYX	0:85b3fd62ea1a	1805	{
NYX	0:85b3fd62ea1a	1806	/* Enable I2C peripheral */
NYX	0:85b3fd62ea1a	1807	__HAL_I2C_ENABLE(hi2c);
NYX	0:85b3fd62ea1a	1808	}
NYX	0:85b3fd62ea1a	1809
NYX	0:85b3fd62ea1a	1810	/* Disable Pos */
NYX	0:85b3fd62ea1a	1811	hi2c->Instance->CR1 &= ~I2C_CR1_POS;
NYX	0:85b3fd62ea1a	1812
NYX	0:85b3fd62ea1a	1813	hi2c->State = HAL_I2C_STATE_BUSY_RX_LISTEN;
NYX	0:85b3fd62ea1a	1814	hi2c->Mode = HAL_I2C_MODE_SLAVE;
NYX	0:85b3fd62ea1a	1815	hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
NYX	0:85b3fd62ea1a	1816
NYX	0:85b3fd62ea1a	1817	/* Prepare transfer parameters */
NYX	0:85b3fd62ea1a	1818	hi2c->pBuffPtr = pData;
NYX	0:85b3fd62ea1a	1819	hi2c->XferCount = Size;
NYX	0:85b3fd62ea1a	1820	hi2c->XferOptions = XferOptions;
NYX	0:85b3fd62ea1a	1821	hi2c->XferSize = hi2c->XferCount;
NYX	0:85b3fd62ea1a	1822
NYX	0:85b3fd62ea1a	1823	/* Clear ADDR flag */
NYX	0:85b3fd62ea1a	1824	__HAL_I2C_CLEAR_ADDRFLAG(hi2c);
NYX	0:85b3fd62ea1a	1825
NYX	0:85b3fd62ea1a	1826	/* Process Unlocked */
NYX	0:85b3fd62ea1a	1827	__HAL_UNLOCK(hi2c);
NYX	0:85b3fd62ea1a	1828
NYX	0:85b3fd62ea1a	1829	/* Note : The I2C interrupts must be enabled after unlocking current process
NYX	0:85b3fd62ea1a	1830	to avoid the risk of I2C interrupt handle execution before current
NYX	0:85b3fd62ea1a	1831	process unlock */
NYX	0:85b3fd62ea1a	1832
NYX	0:85b3fd62ea1a	1833	/* Enable EVT, BUF and ERR interrupt */
NYX	0:85b3fd62ea1a	1834	__HAL_I2C_ENABLE_IT(hi2c, I2C_IT_EVT \| I2C_IT_BUF \| I2C_IT_ERR);
NYX	0:85b3fd62ea1a	1835
NYX	0:85b3fd62ea1a	1836	return HAL_OK;
NYX	0:85b3fd62ea1a	1837	}
NYX	0:85b3fd62ea1a	1838	else
NYX	0:85b3fd62ea1a	1839	{
NYX	0:85b3fd62ea1a	1840	return HAL_BUSY;
NYX	0:85b3fd62ea1a	1841	}
NYX	0:85b3fd62ea1a	1842	}
NYX	0:85b3fd62ea1a	1843
NYX	0:85b3fd62ea1a	1844	/**
NYX	0:85b3fd62ea1a	1845	* @brief Enable the Address listen mode with Interrupt.
NYX	0:85b3fd62ea1a	1846	* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
NYX	0:85b3fd62ea1a	1847	* the configuration information for the specified I2C.
NYX	0:85b3fd62ea1a	1848	* @retval HAL status
NYX	0:85b3fd62ea1a	1849	*/
NYX	0:85b3fd62ea1a	1850	HAL_StatusTypeDef HAL_I2C_EnableListen_IT(I2C_HandleTypeDef *hi2c)
NYX	0:85b3fd62ea1a	1851	{
NYX	0:85b3fd62ea1a	1852	if(hi2c->State == HAL_I2C_STATE_READY)
NYX	0:85b3fd62ea1a	1853	{
NYX	0:85b3fd62ea1a	1854	hi2c->State = HAL_I2C_STATE_LISTEN;
NYX	0:85b3fd62ea1a	1855
NYX	0:85b3fd62ea1a	1856	/* Check if the I2C is already enabled */
NYX	0:85b3fd62ea1a	1857	if((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)
NYX	0:85b3fd62ea1a	1858	{
NYX	0:85b3fd62ea1a	1859	/* Enable I2C peripheral */
NYX	0:85b3fd62ea1a	1860	__HAL_I2C_ENABLE(hi2c);
NYX	0:85b3fd62ea1a	1861	}
NYX	0:85b3fd62ea1a	1862
NYX	0:85b3fd62ea1a	1863	/* Enable Address Acknowledge */
NYX	0:85b3fd62ea1a	1864	hi2c->Instance->CR1 \|= I2C_CR1_ACK;
NYX	0:85b3fd62ea1a	1865
NYX	0:85b3fd62ea1a	1866	/* Enable EVT and ERR interrupt */
NYX	0:85b3fd62ea1a	1867	__HAL_I2C_ENABLE_IT(hi2c, I2C_IT_EVT \| I2C_IT_ERR);
NYX	0:85b3fd62ea1a	1868
NYX	0:85b3fd62ea1a	1869	return HAL_OK;
NYX	0:85b3fd62ea1a	1870	}
NYX	0:85b3fd62ea1a	1871	else
NYX	0:85b3fd62ea1a	1872	{
NYX	0:85b3fd62ea1a	1873	return HAL_BUSY;
NYX	0:85b3fd62ea1a	1874	}
NYX	0:85b3fd62ea1a	1875	}
NYX	0:85b3fd62ea1a	1876
NYX	0:85b3fd62ea1a	1877	/**
NYX	0:85b3fd62ea1a	1878	* @brief Disable the Address listen mode with Interrupt.
NYX	0:85b3fd62ea1a	1879	* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
NYX	0:85b3fd62ea1a	1880	* the configuration information for the specified I2C.
NYX	0:85b3fd62ea1a	1881	* @retval HAL status
NYX	0:85b3fd62ea1a	1882	*/
NYX	0:85b3fd62ea1a	1883	HAL_StatusTypeDef HAL_I2C_DisableListen_IT(I2C_HandleTypeDef *hi2c)
NYX	0:85b3fd62ea1a	1884	{
NYX	0:85b3fd62ea1a	1885	/* Declaration of tmp to prevent undefined behavior of volatile usage */
NYX	0:85b3fd62ea1a	1886	uint32_t tmp;
NYX	0:85b3fd62ea1a	1887
NYX	0:85b3fd62ea1a	1888	/* Disable Address listen mode only if a transfer is not ongoing */
NYX	0:85b3fd62ea1a	1889	if(hi2c->State == HAL_I2C_STATE_LISTEN)
NYX	0:85b3fd62ea1a	1890	{
NYX	0:85b3fd62ea1a	1891	tmp = (uint32_t)(hi2c->State) & I2C_STATE_MSK;
NYX	0:85b3fd62ea1a	1892	hi2c->PreviousState = tmp \| (uint32_t)(hi2c->Mode);
NYX	0:85b3fd62ea1a	1893	hi2c->State = HAL_I2C_STATE_READY;
NYX	0:85b3fd62ea1a	1894	hi2c->Mode = HAL_I2C_MODE_NONE;
NYX	0:85b3fd62ea1a	1895
NYX	0:85b3fd62ea1a	1896	/* Disable Address Acknowledge */
NYX	0:85b3fd62ea1a	1897	hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
NYX	0:85b3fd62ea1a	1898
NYX	0:85b3fd62ea1a	1899	/* Disable EVT and ERR interrupt */
NYX	0:85b3fd62ea1a	1900	__HAL_I2C_DISABLE_IT(hi2c, I2C_IT_EVT \| I2C_IT_ERR);
NYX	0:85b3fd62ea1a	1901
NYX	0:85b3fd62ea1a	1902	return HAL_OK;
NYX	0:85b3fd62ea1a	1903	}
NYX	0:85b3fd62ea1a	1904	else
NYX	0:85b3fd62ea1a	1905	{
NYX	0:85b3fd62ea1a	1906	return HAL_BUSY;
NYX	0:85b3fd62ea1a	1907	}
NYX	0:85b3fd62ea1a	1908	}
NYX	0:85b3fd62ea1a	1909
NYX	0:85b3fd62ea1a	1910	/**
NYX	0:85b3fd62ea1a	1911	* @brief Transmit in master mode an amount of data in non-blocking mode with DMA
NYX	0:85b3fd62ea1a	1912	* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
NYX	0:85b3fd62ea1a	1913	* the configuration information for the specified I2C.
NYX	0:85b3fd62ea1a	1914	* @param DevAddress Target device address: The device 7 bits address value
NYX	0:85b3fd62ea1a	1915	* in datasheet must be shift at right before call interface
NYX	0:85b3fd62ea1a	1916	* @param pData Pointer to data buffer
NYX	0:85b3fd62ea1a	1917	* @param Size Amount of data to be sent
NYX	0:85b3fd62ea1a	1918	* @retval HAL status
NYX	0:85b3fd62ea1a	1919	*/
NYX	0:85b3fd62ea1a	1920	HAL_StatusTypeDef HAL_I2C_Master_Transmit_DMA(I2C_HandleTypeDef hi2c, uint16_t DevAddress, uint8_t pData, uint16_t Size)
NYX	0:85b3fd62ea1a	1921	{
NYX	0:85b3fd62ea1a	1922	__IO uint32_t count = 0U;
NYX	0:85b3fd62ea1a	1923
NYX	0:85b3fd62ea1a	1924	if(hi2c->State == HAL_I2C_STATE_READY)
NYX	0:85b3fd62ea1a	1925	{
NYX	0:85b3fd62ea1a	1926	/* Wait until BUSY flag is reset */
NYX	0:85b3fd62ea1a	1927	count = I2C_TIMEOUT_BUSY_FLAG * (SystemCoreClock /25U /1000U);
NYX	0:85b3fd62ea1a	1928	do
NYX	0:85b3fd62ea1a	1929	{
NYX	0:85b3fd62ea1a	1930	if(count-- == 0U)
NYX	0:85b3fd62ea1a	1931	{
NYX	0:85b3fd62ea1a	1932	hi2c->PreviousState = I2C_STATE_NONE;
NYX	0:85b3fd62ea1a	1933	hi2c->State= HAL_I2C_STATE_READY;
NYX	0:85b3fd62ea1a	1934
NYX	0:85b3fd62ea1a	1935	/* Process Unlocked */
NYX	0:85b3fd62ea1a	1936	__HAL_UNLOCK(hi2c);
NYX	0:85b3fd62ea1a	1937
NYX	0:85b3fd62ea1a	1938	return HAL_TIMEOUT;
NYX	0:85b3fd62ea1a	1939	}
NYX	0:85b3fd62ea1a	1940	}
NYX	0:85b3fd62ea1a	1941	while(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) != RESET);
NYX	0:85b3fd62ea1a	1942
NYX	0:85b3fd62ea1a	1943	/* Process Locked */
NYX	0:85b3fd62ea1a	1944	__HAL_LOCK(hi2c);
NYX	0:85b3fd62ea1a	1945
NYX	0:85b3fd62ea1a	1946	/* Check if the I2C is already enabled */
NYX	0:85b3fd62ea1a	1947	if((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)
NYX	0:85b3fd62ea1a	1948	{
NYX	0:85b3fd62ea1a	1949	/* Enable I2C peripheral */
NYX	0:85b3fd62ea1a	1950	__HAL_I2C_ENABLE(hi2c);
NYX	0:85b3fd62ea1a	1951	}
NYX	0:85b3fd62ea1a	1952
NYX	0:85b3fd62ea1a	1953	/* Disable Pos */
NYX	0:85b3fd62ea1a	1954	hi2c->Instance->CR1 &= ~I2C_CR1_POS;
NYX	0:85b3fd62ea1a	1955
NYX	0:85b3fd62ea1a	1956	hi2c->State = HAL_I2C_STATE_BUSY_TX;
NYX	0:85b3fd62ea1a	1957	hi2c->Mode = HAL_I2C_MODE_MASTER;
NYX	0:85b3fd62ea1a	1958	hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
NYX	0:85b3fd62ea1a	1959
NYX	0:85b3fd62ea1a	1960	/* Prepare transfer parameters */
NYX	0:85b3fd62ea1a	1961	hi2c->pBuffPtr = pData;
NYX	0:85b3fd62ea1a	1962	hi2c->XferCount = Size;
NYX	0:85b3fd62ea1a	1963	hi2c->XferOptions = I2C_NO_OPTION_FRAME;
NYX	0:85b3fd62ea1a	1964	hi2c->XferSize = hi2c->XferCount;
NYX	0:85b3fd62ea1a	1965	hi2c->Devaddress = DevAddress;
NYX	0:85b3fd62ea1a	1966
NYX	0:85b3fd62ea1a	1967	if(hi2c->XferSize > 0U)
NYX	0:85b3fd62ea1a	1968	{
NYX	0:85b3fd62ea1a	1969	/* Set the I2C DMA transfer complete callback */
NYX	0:85b3fd62ea1a	1970	hi2c->hdmatx->XferCpltCallback = I2C_DMAXferCplt;
NYX	0:85b3fd62ea1a	1971
NYX	0:85b3fd62ea1a	1972	/* Set the DMA error callback */
NYX	0:85b3fd62ea1a	1973	hi2c->hdmatx->XferErrorCallback = I2C_DMAError;
NYX	0:85b3fd62ea1a	1974
NYX	0:85b3fd62ea1a	1975	/* Set the unused DMA callbacks to NULL */
NYX	0:85b3fd62ea1a	1976	hi2c->hdmatx->XferHalfCpltCallback = NULL;
NYX	0:85b3fd62ea1a	1977	hi2c->hdmatx->XferM1CpltCallback = NULL;
NYX	0:85b3fd62ea1a	1978	hi2c->hdmatx->XferM1HalfCpltCallback = NULL;
NYX	0:85b3fd62ea1a	1979	hi2c->hdmatx->XferAbortCallback = NULL;
NYX	0:85b3fd62ea1a	1980
NYX	0:85b3fd62ea1a	1981	/* Enable the DMA Stream */
NYX	0:85b3fd62ea1a	1982	HAL_DMA_Start_IT(hi2c->hdmatx, (uint32_t)hi2c->pBuffPtr, (uint32_t)&hi2c->Instance->DR, hi2c->XferSize);
NYX	0:85b3fd62ea1a	1983
NYX	0:85b3fd62ea1a	1984	/* Enable Acknowledge */
NYX	0:85b3fd62ea1a	1985	hi2c->Instance->CR1 \|= I2C_CR1_ACK;
NYX	0:85b3fd62ea1a	1986
NYX	0:85b3fd62ea1a	1987	/* Generate Start */
NYX	0:85b3fd62ea1a	1988	hi2c->Instance->CR1 \|= I2C_CR1_START;
NYX	0:85b3fd62ea1a	1989
NYX	0:85b3fd62ea1a	1990	/* Process Unlocked */
NYX	0:85b3fd62ea1a	1991	__HAL_UNLOCK(hi2c);
NYX	0:85b3fd62ea1a	1992
NYX	0:85b3fd62ea1a	1993	/* Note : The I2C interrupts must be enabled after unlocking current process
NYX	0:85b3fd62ea1a	1994	to avoid the risk of I2C interrupt handle execution before current
NYX	0:85b3fd62ea1a	1995	process unlock */
NYX	0:85b3fd62ea1a	1996
NYX	0:85b3fd62ea1a	1997	/* Enable EVT and ERR interrupt */
NYX	0:85b3fd62ea1a	1998	__HAL_I2C_ENABLE_IT(hi2c, I2C_IT_EVT \| I2C_IT_ERR);
NYX	0:85b3fd62ea1a	1999
NYX	0:85b3fd62ea1a	2000	/* Enable DMA Request */
NYX	0:85b3fd62ea1a	2001	hi2c->Instance->CR2 \|= I2C_CR2_DMAEN;
NYX	0:85b3fd62ea1a	2002	}
NYX	0:85b3fd62ea1a	2003	else
NYX	0:85b3fd62ea1a	2004	{
NYX	0:85b3fd62ea1a	2005	/* Enable Acknowledge */
NYX	0:85b3fd62ea1a	2006	hi2c->Instance->CR1 \|= I2C_CR1_ACK;
NYX	0:85b3fd62ea1a	2007
NYX	0:85b3fd62ea1a	2008	/* Generate Start */
NYX	0:85b3fd62ea1a	2009	hi2c->Instance->CR1 \|= I2C_CR1_START;
NYX	0:85b3fd62ea1a	2010
NYX	0:85b3fd62ea1a	2011	/* Process Unlocked */
NYX	0:85b3fd62ea1a	2012	__HAL_UNLOCK(hi2c);
NYX	0:85b3fd62ea1a	2013
NYX	0:85b3fd62ea1a	2014	/* Note : The I2C interrupts must be enabled after unlocking current process
NYX	0:85b3fd62ea1a	2015	to avoid the risk of I2C interrupt handle execution before current
NYX	0:85b3fd62ea1a	2016	process unlock */
NYX	0:85b3fd62ea1a	2017
NYX	0:85b3fd62ea1a	2018	/* Enable EVT, BUF and ERR interrupt */
NYX	0:85b3fd62ea1a	2019	__HAL_I2C_ENABLE_IT(hi2c, I2C_IT_EVT \| I2C_IT_BUF \| I2C_IT_ERR);
NYX	0:85b3fd62ea1a	2020	}
NYX	0:85b3fd62ea1a	2021
NYX	0:85b3fd62ea1a	2022	return HAL_OK;
NYX	0:85b3fd62ea1a	2023	}
NYX	0:85b3fd62ea1a	2024	else
NYX	0:85b3fd62ea1a	2025	{
NYX	0:85b3fd62ea1a	2026	return HAL_BUSY;
NYX	0:85b3fd62ea1a	2027	}
NYX	0:85b3fd62ea1a	2028	}
NYX	0:85b3fd62ea1a	2029
NYX	0:85b3fd62ea1a	2030	/**
NYX	0:85b3fd62ea1a	2031	* @brief Receive in master mode an amount of data in non-blocking mode with DMA
NYX	0:85b3fd62ea1a	2032	* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
NYX	0:85b3fd62ea1a	2033	* the configuration information for the specified I2C.
NYX	0:85b3fd62ea1a	2034	* @param DevAddress Target device address: The device 7 bits address value
NYX	0:85b3fd62ea1a	2035	* in datasheet must be shift at right before call interface
NYX	0:85b3fd62ea1a	2036	* @param pData Pointer to data buffer
NYX	0:85b3fd62ea1a	2037	* @param Size Amount of data to be sent
NYX	0:85b3fd62ea1a	2038	* @retval HAL status
NYX	0:85b3fd62ea1a	2039	*/
NYX	0:85b3fd62ea1a	2040	HAL_StatusTypeDef HAL_I2C_Master_Receive_DMA(I2C_HandleTypeDef hi2c, uint16_t DevAddress, uint8_t pData, uint16_t Size)
NYX	0:85b3fd62ea1a	2041	{
NYX	0:85b3fd62ea1a	2042	__IO uint32_t count = 0U;
NYX	0:85b3fd62ea1a	2043
NYX	0:85b3fd62ea1a	2044	if(hi2c->State == HAL_I2C_STATE_READY)
NYX	0:85b3fd62ea1a	2045	{
NYX	0:85b3fd62ea1a	2046	/* Wait until BUSY flag is reset */
NYX	0:85b3fd62ea1a	2047	count = I2C_TIMEOUT_BUSY_FLAG * (SystemCoreClock /25U /1000U);
NYX	0:85b3fd62ea1a	2048	do
NYX	0:85b3fd62ea1a	2049	{
NYX	0:85b3fd62ea1a	2050	if(count-- == 0U)
NYX	0:85b3fd62ea1a	2051	{
NYX	0:85b3fd62ea1a	2052	hi2c->PreviousState = I2C_STATE_NONE;
NYX	0:85b3fd62ea1a	2053	hi2c->State= HAL_I2C_STATE_READY;
NYX	0:85b3fd62ea1a	2054
NYX	0:85b3fd62ea1a	2055	/* Process Unlocked */
NYX	0:85b3fd62ea1a	2056	__HAL_UNLOCK(hi2c);
NYX	0:85b3fd62ea1a	2057
NYX	0:85b3fd62ea1a	2058	return HAL_TIMEOUT;
NYX	0:85b3fd62ea1a	2059	}
NYX	0:85b3fd62ea1a	2060	}
NYX	0:85b3fd62ea1a	2061	while(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) != RESET);
NYX	0:85b3fd62ea1a	2062
NYX	0:85b3fd62ea1a	2063	/* Process Locked */
NYX	0:85b3fd62ea1a	2064	__HAL_LOCK(hi2c);
NYX	0:85b3fd62ea1a	2065
NYX	0:85b3fd62ea1a	2066	/* Check if the I2C is already enabled */
NYX	0:85b3fd62ea1a	2067	if((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)
NYX	0:85b3fd62ea1a	2068	{
NYX	0:85b3fd62ea1a	2069	/* Enable I2C peripheral */
NYX	0:85b3fd62ea1a	2070	__HAL_I2C_ENABLE(hi2c);
NYX	0:85b3fd62ea1a	2071	}
NYX	0:85b3fd62ea1a	2072
NYX	0:85b3fd62ea1a	2073	/* Disable Pos */
NYX	0:85b3fd62ea1a	2074	hi2c->Instance->CR1 &= ~I2C_CR1_POS;
NYX	0:85b3fd62ea1a	2075
NYX	0:85b3fd62ea1a	2076	hi2c->State = HAL_I2C_STATE_BUSY_RX;
NYX	0:85b3fd62ea1a	2077	hi2c->Mode = HAL_I2C_MODE_MASTER;
NYX	0:85b3fd62ea1a	2078	hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
NYX	0:85b3fd62ea1a	2079
NYX	0:85b3fd62ea1a	2080	/* Prepare transfer parameters */
NYX	0:85b3fd62ea1a	2081	hi2c->pBuffPtr = pData;
NYX	0:85b3fd62ea1a	2082	hi2c->XferCount = Size;
NYX	0:85b3fd62ea1a	2083	hi2c->XferOptions = I2C_NO_OPTION_FRAME;
NYX	0:85b3fd62ea1a	2084	hi2c->XferSize = hi2c->XferCount;
NYX	0:85b3fd62ea1a	2085	hi2c->Devaddress = DevAddress;
NYX	0:85b3fd62ea1a	2086
NYX	0:85b3fd62ea1a	2087	if(hi2c->XferSize > 0U)
NYX	0:85b3fd62ea1a	2088	{
NYX	0:85b3fd62ea1a	2089	/* Set the I2C DMA transfer complete callback */
NYX	0:85b3fd62ea1a	2090	hi2c->hdmarx->XferCpltCallback = I2C_DMAXferCplt;
NYX	0:85b3fd62ea1a	2091
NYX	0:85b3fd62ea1a	2092	/* Set the DMA error callback */
NYX	0:85b3fd62ea1a	2093	hi2c->hdmarx->XferErrorCallback = I2C_DMAError;
NYX	0:85b3fd62ea1a	2094
NYX	0:85b3fd62ea1a	2095	/* Set the unused DMA callbacks to NULL */
NYX	0:85b3fd62ea1a	2096	hi2c->hdmarx->XferHalfCpltCallback = NULL;
NYX	0:85b3fd62ea1a	2097	hi2c->hdmarx->XferM1CpltCallback = NULL;
NYX	0:85b3fd62ea1a	2098	hi2c->hdmarx->XferM1HalfCpltCallback = NULL;
NYX	0:85b3fd62ea1a	2099	hi2c->hdmarx->XferAbortCallback = NULL;
NYX	0:85b3fd62ea1a	2100
NYX	0:85b3fd62ea1a	2101	/* Enable the DMA Stream */
NYX	0:85b3fd62ea1a	2102	HAL_DMA_Start_IT(hi2c->hdmarx, (uint32_t)&hi2c->Instance->DR, (uint32_t)hi2c->pBuffPtr, hi2c->XferSize);
NYX	0:85b3fd62ea1a	2103
NYX	0:85b3fd62ea1a	2104	/* Enable Acknowledge */
NYX	0:85b3fd62ea1a	2105	hi2c->Instance->CR1 \|= I2C_CR1_ACK;
NYX	0:85b3fd62ea1a	2106
NYX	0:85b3fd62ea1a	2107	/* Generate Start */
NYX	0:85b3fd62ea1a	2108	hi2c->Instance->CR1 \|= I2C_CR1_START;
NYX	0:85b3fd62ea1a	2109
NYX	0:85b3fd62ea1a	2110	/* Process Unlocked */
NYX	0:85b3fd62ea1a	2111	__HAL_UNLOCK(hi2c);
NYX	0:85b3fd62ea1a	2112
NYX	0:85b3fd62ea1a	2113	/* Note : The I2C interrupts must be enabled after unlocking current process
NYX	0:85b3fd62ea1a	2114	to avoid the risk of I2C interrupt handle execution before current
NYX	0:85b3fd62ea1a	2115	process unlock */
NYX	0:85b3fd62ea1a	2116
NYX	0:85b3fd62ea1a	2117	/* Enable EVT and ERR interrupt */
NYX	0:85b3fd62ea1a	2118	__HAL_I2C_ENABLE_IT(hi2c, I2C_IT_EVT \| I2C_IT_ERR);
NYX	0:85b3fd62ea1a	2119
NYX	0:85b3fd62ea1a	2120	/* Enable DMA Request */
NYX	0:85b3fd62ea1a	2121	hi2c->Instance->CR2 \|= I2C_CR2_DMAEN;
NYX	0:85b3fd62ea1a	2122	}
NYX	0:85b3fd62ea1a	2123	else
NYX	0:85b3fd62ea1a	2124	{
NYX	0:85b3fd62ea1a	2125	/* Enable Acknowledge */
NYX	0:85b3fd62ea1a	2126	hi2c->Instance->CR1 \|= I2C_CR1_ACK;
NYX	0:85b3fd62ea1a	2127
NYX	0:85b3fd62ea1a	2128	/* Generate Start */
NYX	0:85b3fd62ea1a	2129	hi2c->Instance->CR1 \|= I2C_CR1_START;
NYX	0:85b3fd62ea1a	2130
NYX	0:85b3fd62ea1a	2131	/* Process Unlocked */
NYX	0:85b3fd62ea1a	2132	__HAL_UNLOCK(hi2c);
NYX	0:85b3fd62ea1a	2133
NYX	0:85b3fd62ea1a	2134	/* Note : The I2C interrupts must be enabled after unlocking current process
NYX	0:85b3fd62ea1a	2135	to avoid the risk of I2C interrupt handle execution before current
NYX	0:85b3fd62ea1a	2136	process unlock */
NYX	0:85b3fd62ea1a	2137
NYX	0:85b3fd62ea1a	2138	/* Enable EVT, BUF and ERR interrupt */
NYX	0:85b3fd62ea1a	2139	__HAL_I2C_ENABLE_IT(hi2c, I2C_IT_EVT \| I2C_IT_BUF \| I2C_IT_ERR);
NYX	0:85b3fd62ea1a	2140	}
NYX	0:85b3fd62ea1a	2141
NYX	0:85b3fd62ea1a	2142	return HAL_OK;
NYX	0:85b3fd62ea1a	2143	}
NYX	0:85b3fd62ea1a	2144	else
NYX	0:85b3fd62ea1a	2145	{
NYX	0:85b3fd62ea1a	2146	return HAL_BUSY;
NYX	0:85b3fd62ea1a	2147	}
NYX	0:85b3fd62ea1a	2148	}
NYX	0:85b3fd62ea1a	2149
NYX	0:85b3fd62ea1a	2150	/**
NYX	0:85b3fd62ea1a	2151	* @brief Abort a master I2C process communication with Interrupt.
NYX	0:85b3fd62ea1a	2152	* @note This abort can be called only if state is ready
NYX	0:85b3fd62ea1a	2153	* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
NYX	0:85b3fd62ea1a	2154	* the configuration information for the specified I2C.
NYX	0:85b3fd62ea1a	2155	* @param DevAddress Target device address: The device 7 bits address value
NYX	0:85b3fd62ea1a	2156	* in datasheet must be shift at right before call interface
NYX	0:85b3fd62ea1a	2157	* @retval HAL status
NYX	0:85b3fd62ea1a	2158	*/
NYX	0:85b3fd62ea1a	2159	HAL_StatusTypeDef HAL_I2C_Master_Abort_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress)
NYX	0:85b3fd62ea1a	2160	{
NYX	0:85b3fd62ea1a	2161	/* Prevent unused argument(s) compilation warning */
NYX	0:85b3fd62ea1a	2162	UNUSED(DevAddress);
NYX	0:85b3fd62ea1a	2163
NYX	0:85b3fd62ea1a	2164	/* Abort Master transfer during Receive or Transmit process */
NYX	0:85b3fd62ea1a	2165	if(hi2c->Mode == HAL_I2C_MODE_MASTER)
NYX	0:85b3fd62ea1a	2166	{
NYX	0:85b3fd62ea1a	2167	/* Process Locked */
NYX	0:85b3fd62ea1a	2168	__HAL_LOCK(hi2c);
NYX	0:85b3fd62ea1a	2169
NYX	0:85b3fd62ea1a	2170	hi2c->PreviousState = I2C_STATE_NONE;
NYX	0:85b3fd62ea1a	2171	hi2c->State = HAL_I2C_STATE_ABORT;
NYX	0:85b3fd62ea1a	2172
NYX	0:85b3fd62ea1a	2173	/* Disable Acknowledge */
NYX	0:85b3fd62ea1a	2174	hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
NYX	0:85b3fd62ea1a	2175
NYX	0:85b3fd62ea1a	2176	/* Generate Stop */
NYX	0:85b3fd62ea1a	2177	hi2c->Instance->CR1 \|= I2C_CR1_STOP;
NYX	0:85b3fd62ea1a	2178
NYX	0:85b3fd62ea1a	2179	hi2c->XferCount = 0U;
NYX	0:85b3fd62ea1a	2180
NYX	0:85b3fd62ea1a	2181	/* Disable EVT, BUF and ERR interrupt */
NYX	0:85b3fd62ea1a	2182	__HAL_I2C_DISABLE_IT(hi2c, I2C_IT_EVT \| I2C_IT_BUF \| I2C_IT_ERR);
NYX	0:85b3fd62ea1a	2183
NYX	0:85b3fd62ea1a	2184	/* Process Unlocked */
NYX	0:85b3fd62ea1a	2185	__HAL_UNLOCK(hi2c);
NYX	0:85b3fd62ea1a	2186
NYX	0:85b3fd62ea1a	2187	/* Call the corresponding callback to inform upper layer of End of Transfer */
NYX	0:85b3fd62ea1a	2188	I2C_ITError(hi2c);
NYX	0:85b3fd62ea1a	2189
NYX	0:85b3fd62ea1a	2190	return HAL_OK;
NYX	0:85b3fd62ea1a	2191	}
NYX	0:85b3fd62ea1a	2192	else
NYX	0:85b3fd62ea1a	2193	{
NYX	0:85b3fd62ea1a	2194	/* Wrong usage of abort function */
NYX	0:85b3fd62ea1a	2195	/* This function should be used only in case of abort monitored by master device */
NYX	0:85b3fd62ea1a	2196	return HAL_ERROR;
NYX	0:85b3fd62ea1a	2197	}
NYX	0:85b3fd62ea1a	2198	}
NYX	0:85b3fd62ea1a	2199
NYX	0:85b3fd62ea1a	2200	/**
NYX	0:85b3fd62ea1a	2201	* @brief Transmit in slave mode an amount of data in non-blocking mode with DMA
NYX	0:85b3fd62ea1a	2202	* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
NYX	0:85b3fd62ea1a	2203	* the configuration information for the specified I2C.
NYX	0:85b3fd62ea1a	2204	* @param pData Pointer to data buffer
NYX	0:85b3fd62ea1a	2205	* @param Size Amount of data to be sent
NYX	0:85b3fd62ea1a	2206	* @retval HAL status
NYX	0:85b3fd62ea1a	2207	*/
NYX	0:85b3fd62ea1a	2208	HAL_StatusTypeDef HAL_I2C_Slave_Transmit_DMA(I2C_HandleTypeDef hi2c, uint8_t pData, uint16_t Size)
NYX	0:85b3fd62ea1a	2209	{
NYX	0:85b3fd62ea1a	2210	__IO uint32_t count = 0U;
NYX	0:85b3fd62ea1a	2211
NYX	0:85b3fd62ea1a	2212	if(hi2c->State == HAL_I2C_STATE_READY)
NYX	0:85b3fd62ea1a	2213	{
NYX	0:85b3fd62ea1a	2214	if((pData == NULL) \|\| (Size == 0U))
NYX	0:85b3fd62ea1a	2215	{
NYX	0:85b3fd62ea1a	2216	return HAL_ERROR;
NYX	0:85b3fd62ea1a	2217	}
NYX	0:85b3fd62ea1a	2218
NYX	0:85b3fd62ea1a	2219	/* Wait until BUSY flag is reset */
NYX	0:85b3fd62ea1a	2220	count = I2C_TIMEOUT_BUSY_FLAG * (SystemCoreClock /25U /1000U);
NYX	0:85b3fd62ea1a	2221	do
NYX	0:85b3fd62ea1a	2222	{
NYX	0:85b3fd62ea1a	2223	if(count-- == 0U)
NYX	0:85b3fd62ea1a	2224	{
NYX	0:85b3fd62ea1a	2225	hi2c->PreviousState = I2C_STATE_NONE;
NYX	0:85b3fd62ea1a	2226	hi2c->State= HAL_I2C_STATE_READY;
NYX	0:85b3fd62ea1a	2227
NYX	0:85b3fd62ea1a	2228	/* Process Unlocked */
NYX	0:85b3fd62ea1a	2229	__HAL_UNLOCK(hi2c);
NYX	0:85b3fd62ea1a	2230
NYX	0:85b3fd62ea1a	2231	return HAL_TIMEOUT;
NYX	0:85b3fd62ea1a	2232	}
NYX	0:85b3fd62ea1a	2233	}
NYX	0:85b3fd62ea1a	2234	while(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) != RESET);
NYX	0:85b3fd62ea1a	2235
NYX	0:85b3fd62ea1a	2236	/* Process Locked */
NYX	0:85b3fd62ea1a	2237	__HAL_LOCK(hi2c);
NYX	0:85b3fd62ea1a	2238
NYX	0:85b3fd62ea1a	2239	/* Check if the I2C is already enabled */
NYX	0:85b3fd62ea1a	2240	if((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)
NYX	0:85b3fd62ea1a	2241	{
NYX	0:85b3fd62ea1a	2242	/* Enable I2C peripheral */
NYX	0:85b3fd62ea1a	2243	__HAL_I2C_ENABLE(hi2c);
NYX	0:85b3fd62ea1a	2244	}
NYX	0:85b3fd62ea1a	2245
NYX	0:85b3fd62ea1a	2246	/* Disable Pos */
NYX	0:85b3fd62ea1a	2247	hi2c->Instance->CR1 &= ~I2C_CR1_POS;
NYX	0:85b3fd62ea1a	2248
NYX	0:85b3fd62ea1a	2249	hi2c->State = HAL_I2C_STATE_BUSY_TX;
NYX	0:85b3fd62ea1a	2250	hi2c->Mode = HAL_I2C_MODE_SLAVE;
NYX	0:85b3fd62ea1a	2251	hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
NYX	0:85b3fd62ea1a	2252
NYX	0:85b3fd62ea1a	2253	/* Prepare transfer parameters */
NYX	0:85b3fd62ea1a	2254	hi2c->pBuffPtr = pData;
NYX	0:85b3fd62ea1a	2255	hi2c->XferCount = Size;
NYX	0:85b3fd62ea1a	2256	hi2c->XferOptions = I2C_NO_OPTION_FRAME;
NYX	0:85b3fd62ea1a	2257	hi2c->XferSize = hi2c->XferCount;
NYX	0:85b3fd62ea1a	2258
NYX	0:85b3fd62ea1a	2259	/* Set the I2C DMA transfer complete callback */
NYX	0:85b3fd62ea1a	2260	hi2c->hdmatx->XferCpltCallback = I2C_DMAXferCplt;
NYX	0:85b3fd62ea1a	2261
NYX	0:85b3fd62ea1a	2262	/* Set the DMA error callback */
NYX	0:85b3fd62ea1a	2263	hi2c->hdmatx->XferErrorCallback = I2C_DMAError;
NYX	0:85b3fd62ea1a	2264
NYX	0:85b3fd62ea1a	2265	/* Set the unused DMA callbacks to NULL */
NYX	0:85b3fd62ea1a	2266	hi2c->hdmatx->XferHalfCpltCallback = NULL;
NYX	0:85b3fd62ea1a	2267	hi2c->hdmatx->XferM1CpltCallback = NULL;
NYX	0:85b3fd62ea1a	2268	hi2c->hdmatx->XferM1HalfCpltCallback = NULL;
NYX	0:85b3fd62ea1a	2269	hi2c->hdmatx->XferAbortCallback = NULL;
NYX	0:85b3fd62ea1a	2270
NYX	0:85b3fd62ea1a	2271	/* Enable the DMA Stream */
NYX	0:85b3fd62ea1a	2272	HAL_DMA_Start_IT(hi2c->hdmatx, (uint32_t)hi2c->pBuffPtr, (uint32_t)&hi2c->Instance->DR, hi2c->XferSize);
NYX	0:85b3fd62ea1a	2273
NYX	0:85b3fd62ea1a	2274	/* Enable Address Acknowledge */
NYX	0:85b3fd62ea1a	2275	hi2c->Instance->CR1 \|= I2C_CR1_ACK;
NYX	0:85b3fd62ea1a	2276
NYX	0:85b3fd62ea1a	2277	/* Process Unlocked */
NYX	0:85b3fd62ea1a	2278	__HAL_UNLOCK(hi2c);
NYX	0:85b3fd62ea1a	2279
NYX	0:85b3fd62ea1a	2280	/* Note : The I2C interrupts must be enabled after unlocking current process
NYX	0:85b3fd62ea1a	2281	to avoid the risk of I2C interrupt handle execution before current
NYX	0:85b3fd62ea1a	2282	process unlock */
NYX	0:85b3fd62ea1a	2283	/* Enable EVT and ERR interrupt */
NYX	0:85b3fd62ea1a	2284	__HAL_I2C_ENABLE_IT(hi2c, I2C_IT_EVT \| I2C_IT_ERR);
NYX	0:85b3fd62ea1a	2285
NYX	0:85b3fd62ea1a	2286	/* Enable DMA Request */
NYX	0:85b3fd62ea1a	2287	hi2c->Instance->CR2 \|= I2C_CR2_DMAEN;
NYX	0:85b3fd62ea1a	2288
NYX	0:85b3fd62ea1a	2289	return HAL_OK;
NYX	0:85b3fd62ea1a	2290	}
NYX	0:85b3fd62ea1a	2291	else
NYX	0:85b3fd62ea1a	2292	{
NYX	0:85b3fd62ea1a	2293	return HAL_BUSY;
NYX	0:85b3fd62ea1a	2294	}
NYX	0:85b3fd62ea1a	2295	}
NYX	0:85b3fd62ea1a	2296
NYX	0:85b3fd62ea1a	2297	/**
NYX	0:85b3fd62ea1a	2298	* @brief Receive in slave mode an amount of data in non-blocking mode with DMA
NYX	0:85b3fd62ea1a	2299	* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
NYX	0:85b3fd62ea1a	2300	* the configuration information for the specified I2C.
NYX	0:85b3fd62ea1a	2301	* @param pData Pointer to data buffer
NYX	0:85b3fd62ea1a	2302	* @param Size Amount of data to be sent
NYX	0:85b3fd62ea1a	2303	* @retval HAL status
NYX	0:85b3fd62ea1a	2304	*/
NYX	0:85b3fd62ea1a	2305	HAL_StatusTypeDef HAL_I2C_Slave_Receive_DMA(I2C_HandleTypeDef hi2c, uint8_t pData, uint16_t Size)
NYX	0:85b3fd62ea1a	2306	{
NYX	0:85b3fd62ea1a	2307	__IO uint32_t count = 0U;
NYX	0:85b3fd62ea1a	2308
NYX	0:85b3fd62ea1a	2309	if(hi2c->State == HAL_I2C_STATE_READY)
NYX	0:85b3fd62ea1a	2310	{
NYX	0:85b3fd62ea1a	2311	if((pData == NULL) \|\| (Size == 0U))
NYX	0:85b3fd62ea1a	2312	{
NYX	0:85b3fd62ea1a	2313	return HAL_ERROR;
NYX	0:85b3fd62ea1a	2314	}
NYX	0:85b3fd62ea1a	2315
NYX	0:85b3fd62ea1a	2316	/* Wait until BUSY flag is reset */
NYX	0:85b3fd62ea1a	2317	count = I2C_TIMEOUT_BUSY_FLAG * (SystemCoreClock /25U /1000U);
NYX	0:85b3fd62ea1a	2318	do
NYX	0:85b3fd62ea1a	2319	{
NYX	0:85b3fd62ea1a	2320	if(count-- == 0U)
NYX	0:85b3fd62ea1a	2321	{
NYX	0:85b3fd62ea1a	2322	hi2c->PreviousState = I2C_STATE_NONE;
NYX	0:85b3fd62ea1a	2323	hi2c->State= HAL_I2C_STATE_READY;
NYX	0:85b3fd62ea1a	2324
NYX	0:85b3fd62ea1a	2325	/* Process Unlocked */
NYX	0:85b3fd62ea1a	2326	__HAL_UNLOCK(hi2c);
NYX	0:85b3fd62ea1a	2327
NYX	0:85b3fd62ea1a	2328	return HAL_TIMEOUT;
NYX	0:85b3fd62ea1a	2329	}
NYX	0:85b3fd62ea1a	2330	}
NYX	0:85b3fd62ea1a	2331	while(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) != RESET);
NYX	0:85b3fd62ea1a	2332
NYX	0:85b3fd62ea1a	2333	/* Process Locked */
NYX	0:85b3fd62ea1a	2334	__HAL_LOCK(hi2c);
NYX	0:85b3fd62ea1a	2335
NYX	0:85b3fd62ea1a	2336	/* Check if the I2C is already enabled */
NYX	0:85b3fd62ea1a	2337	if((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)
NYX	0:85b3fd62ea1a	2338	{
NYX	0:85b3fd62ea1a	2339	/* Enable I2C peripheral */
NYX	0:85b3fd62ea1a	2340	__HAL_I2C_ENABLE(hi2c);
NYX	0:85b3fd62ea1a	2341	}
NYX	0:85b3fd62ea1a	2342
NYX	0:85b3fd62ea1a	2343	/* Disable Pos */
NYX	0:85b3fd62ea1a	2344	hi2c->Instance->CR1 &= ~I2C_CR1_POS;
NYX	0:85b3fd62ea1a	2345
NYX	0:85b3fd62ea1a	2346	hi2c->State = HAL_I2C_STATE_BUSY_RX;
NYX	0:85b3fd62ea1a	2347	hi2c->Mode = HAL_I2C_MODE_SLAVE;
NYX	0:85b3fd62ea1a	2348	hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
NYX	0:85b3fd62ea1a	2349
NYX	0:85b3fd62ea1a	2350	/* Prepare transfer parameters */
NYX	0:85b3fd62ea1a	2351	hi2c->pBuffPtr = pData;
NYX	0:85b3fd62ea1a	2352	hi2c->XferCount = Size;
NYX	0:85b3fd62ea1a	2353	hi2c->XferOptions = I2C_NO_OPTION_FRAME;
NYX	0:85b3fd62ea1a	2354	hi2c->XferSize = hi2c->XferCount;
NYX	0:85b3fd62ea1a	2355
NYX	0:85b3fd62ea1a	2356	/* Set the I2C DMA transfer complete callback */
NYX	0:85b3fd62ea1a	2357	hi2c->hdmarx->XferCpltCallback = I2C_DMAXferCplt;
NYX	0:85b3fd62ea1a	2358
NYX	0:85b3fd62ea1a	2359	/* Set the DMA error callback */
NYX	0:85b3fd62ea1a	2360	hi2c->hdmarx->XferErrorCallback = I2C_DMAError;
NYX	0:85b3fd62ea1a	2361
NYX	0:85b3fd62ea1a	2362	/* Set the unused DMA callbacks to NULL */
NYX	0:85b3fd62ea1a	2363	hi2c->hdmarx->XferHalfCpltCallback = NULL;
NYX	0:85b3fd62ea1a	2364	hi2c->hdmarx->XferM1CpltCallback = NULL;
NYX	0:85b3fd62ea1a	2365	hi2c->hdmarx->XferM1HalfCpltCallback = NULL;
NYX	0:85b3fd62ea1a	2366	hi2c->hdmarx->XferAbortCallback = NULL;
NYX	0:85b3fd62ea1a	2367
NYX	0:85b3fd62ea1a	2368	/* Enable the DMA Stream */
NYX	0:85b3fd62ea1a	2369	HAL_DMA_Start_IT(hi2c->hdmarx, (uint32_t)&hi2c->Instance->DR, (uint32_t)hi2c->pBuffPtr, hi2c->XferSize);
NYX	0:85b3fd62ea1a	2370
NYX	0:85b3fd62ea1a	2371	/* Enable Address Acknowledge */
NYX	0:85b3fd62ea1a	2372	hi2c->Instance->CR1 \|= I2C_CR1_ACK;
NYX	0:85b3fd62ea1a	2373
NYX	0:85b3fd62ea1a	2374	/* Process Unlocked */
NYX	0:85b3fd62ea1a	2375	__HAL_UNLOCK(hi2c);
NYX	0:85b3fd62ea1a	2376
NYX	0:85b3fd62ea1a	2377	/* Note : The I2C interrupts must be enabled after unlocking current process
NYX	0:85b3fd62ea1a	2378	to avoid the risk of I2C interrupt handle execution before current
NYX	0:85b3fd62ea1a	2379	process unlock */
NYX	0:85b3fd62ea1a	2380	/* Enable EVT and ERR interrupt */
NYX	0:85b3fd62ea1a	2381	__HAL_I2C_ENABLE_IT(hi2c, I2C_IT_EVT \| I2C_IT_ERR);
NYX	0:85b3fd62ea1a	2382
NYX	0:85b3fd62ea1a	2383	/* Enable DMA Request */
NYX	0:85b3fd62ea1a	2384	hi2c->Instance->CR2 \|= I2C_CR2_DMAEN;
NYX	0:85b3fd62ea1a	2385
NYX	0:85b3fd62ea1a	2386	return HAL_OK;
NYX	0:85b3fd62ea1a	2387	}
NYX	0:85b3fd62ea1a	2388	else
NYX	0:85b3fd62ea1a	2389	{
NYX	0:85b3fd62ea1a	2390	return HAL_BUSY;
NYX	0:85b3fd62ea1a	2391	}
NYX	0:85b3fd62ea1a	2392	}
NYX	0:85b3fd62ea1a	2393	/**
NYX	0:85b3fd62ea1a	2394	* @brief Write an amount of data in blocking mode to a specific memory address
NYX	0:85b3fd62ea1a	2395	* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
NYX	0:85b3fd62ea1a	2396	* the configuration information for the specified I2C.
NYX	0:85b3fd62ea1a	2397	* @param DevAddress Target device address
NYX	0:85b3fd62ea1a	2398	* @param MemAddress Internal memory address
NYX	0:85b3fd62ea1a	2399	* @param MemAddSize Size of internal memory address
NYX	0:85b3fd62ea1a	2400	* @param pData Pointer to data buffer
NYX	0:85b3fd62ea1a	2401	* @param Size Amount of data to be sent
NYX	0:85b3fd62ea1a	2402	* @param Timeout Timeout duration
NYX	0:85b3fd62ea1a	2403	* @retval HAL status
NYX	0:85b3fd62ea1a	2404	*/
NYX	0:85b3fd62ea1a	2405	HAL_StatusTypeDef HAL_I2C_Mem_Write(I2C_HandleTypeDef hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t pData, uint16_t Size, uint32_t Timeout)
NYX	0:85b3fd62ea1a	2406	{
NYX	0:85b3fd62ea1a	2407	uint32_t tickstart = 0x00U;
NYX	0:85b3fd62ea1a	2408
NYX	0:85b3fd62ea1a	2409	/* Init tickstart for timeout management*/
NYX	0:85b3fd62ea1a	2410	tickstart = HAL_GetTick();
NYX	0:85b3fd62ea1a	2411
NYX	0:85b3fd62ea1a	2412	/* Check the parameters */
NYX	0:85b3fd62ea1a	2413	assert_param(IS_I2C_MEMADD_SIZE(MemAddSize));
NYX	0:85b3fd62ea1a	2414
NYX	0:85b3fd62ea1a	2415	if(hi2c->State == HAL_I2C_STATE_READY)
NYX	0:85b3fd62ea1a	2416	{
NYX	0:85b3fd62ea1a	2417	/* Wait until BUSY flag is reset */
NYX	0:85b3fd62ea1a	2418	if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_BUSY_FLAG, tickstart) != HAL_OK)
NYX	0:85b3fd62ea1a	2419	{
NYX	0:85b3fd62ea1a	2420	return HAL_BUSY;
NYX	0:85b3fd62ea1a	2421	}
NYX	0:85b3fd62ea1a	2422
NYX	0:85b3fd62ea1a	2423	/* Process Locked */
NYX	0:85b3fd62ea1a	2424	__HAL_LOCK(hi2c);
NYX	0:85b3fd62ea1a	2425
NYX	0:85b3fd62ea1a	2426	/* Check if the I2C is already enabled */
NYX	0:85b3fd62ea1a	2427	if((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)
NYX	0:85b3fd62ea1a	2428	{
NYX	0:85b3fd62ea1a	2429	/* Enable I2C peripheral */
NYX	0:85b3fd62ea1a	2430	__HAL_I2C_ENABLE(hi2c);
NYX	0:85b3fd62ea1a	2431	}
NYX	0:85b3fd62ea1a	2432
NYX	0:85b3fd62ea1a	2433	/* Disable Pos */
NYX	0:85b3fd62ea1a	2434	hi2c->Instance->CR1 &= ~I2C_CR1_POS;
NYX	0:85b3fd62ea1a	2435
NYX	0:85b3fd62ea1a	2436	hi2c->State = HAL_I2C_STATE_BUSY_TX;
NYX	0:85b3fd62ea1a	2437	hi2c->Mode = HAL_I2C_MODE_MEM;
NYX	0:85b3fd62ea1a	2438	hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
NYX	0:85b3fd62ea1a	2439
NYX	0:85b3fd62ea1a	2440	/* Prepare transfer parameters */
NYX	0:85b3fd62ea1a	2441	hi2c->pBuffPtr = pData;
NYX	0:85b3fd62ea1a	2442	hi2c->XferCount = Size;
NYX	0:85b3fd62ea1a	2443	hi2c->XferOptions = I2C_NO_OPTION_FRAME;
NYX	0:85b3fd62ea1a	2444	hi2c->XferSize = hi2c->XferCount;
NYX	0:85b3fd62ea1a	2445
NYX	0:85b3fd62ea1a	2446	/* Send Slave Address and Memory Address */
NYX	0:85b3fd62ea1a	2447	if(I2C_RequestMemoryWrite(hi2c, DevAddress, MemAddress, MemAddSize, Timeout, tickstart) != HAL_OK)
NYX	0:85b3fd62ea1a	2448	{
NYX	0:85b3fd62ea1a	2449	if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
NYX	0:85b3fd62ea1a	2450	{
NYX	0:85b3fd62ea1a	2451	/* Process Unlocked */
NYX	0:85b3fd62ea1a	2452	__HAL_UNLOCK(hi2c);
NYX	0:85b3fd62ea1a	2453	return HAL_ERROR;
NYX	0:85b3fd62ea1a	2454	}
NYX	0:85b3fd62ea1a	2455	else
NYX	0:85b3fd62ea1a	2456	{
NYX	0:85b3fd62ea1a	2457	/* Process Unlocked */
NYX	0:85b3fd62ea1a	2458	__HAL_UNLOCK(hi2c);
NYX	0:85b3fd62ea1a	2459	return HAL_TIMEOUT;
NYX	0:85b3fd62ea1a	2460	}
NYX	0:85b3fd62ea1a	2461	}
NYX	0:85b3fd62ea1a	2462
NYX	0:85b3fd62ea1a	2463	while(hi2c->XferSize > 0U)
NYX	0:85b3fd62ea1a	2464	{
NYX	0:85b3fd62ea1a	2465	/* Wait until TXE flag is set */
NYX	0:85b3fd62ea1a	2466	if(I2C_WaitOnTXEFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK)
NYX	0:85b3fd62ea1a	2467	{
NYX	0:85b3fd62ea1a	2468	if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
NYX	0:85b3fd62ea1a	2469	{
NYX	0:85b3fd62ea1a	2470	/* Generate Stop */
NYX	0:85b3fd62ea1a	2471	hi2c->Instance->CR1 \|= I2C_CR1_STOP;
NYX	0:85b3fd62ea1a	2472	return HAL_ERROR;
NYX	0:85b3fd62ea1a	2473	}
NYX	0:85b3fd62ea1a	2474	else
NYX	0:85b3fd62ea1a	2475	{
NYX	0:85b3fd62ea1a	2476	return HAL_TIMEOUT;
NYX	0:85b3fd62ea1a	2477	}
NYX	0:85b3fd62ea1a	2478	}
NYX	0:85b3fd62ea1a	2479
NYX	0:85b3fd62ea1a	2480	/* Write data to DR */
NYX	0:85b3fd62ea1a	2481	hi2c->Instance->DR = (*hi2c->pBuffPtr++);
NYX	0:85b3fd62ea1a	2482	hi2c->XferSize--;
NYX	0:85b3fd62ea1a	2483	hi2c->XferCount--;
NYX	0:85b3fd62ea1a	2484
NYX	0:85b3fd62ea1a	2485	if((__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BTF) == SET) && (hi2c->XferSize != 0U))
NYX	0:85b3fd62ea1a	2486	{
NYX	0:85b3fd62ea1a	2487	/* Write data to DR */
NYX	0:85b3fd62ea1a	2488	hi2c->Instance->DR = (*hi2c->pBuffPtr++);
NYX	0:85b3fd62ea1a	2489	hi2c->XferSize--;
NYX	0:85b3fd62ea1a	2490	hi2c->XferCount--;
NYX	0:85b3fd62ea1a	2491	}
NYX	0:85b3fd62ea1a	2492	}
NYX	0:85b3fd62ea1a	2493
NYX	0:85b3fd62ea1a	2494	/* Wait until BTF flag is set */
NYX	0:85b3fd62ea1a	2495	if(I2C_WaitOnBTFFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK)
NYX	0:85b3fd62ea1a	2496	{
NYX	0:85b3fd62ea1a	2497	if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
NYX	0:85b3fd62ea1a	2498	{
NYX	0:85b3fd62ea1a	2499	/* Generate Stop */
NYX	0:85b3fd62ea1a	2500	hi2c->Instance->CR1 \|= I2C_CR1_STOP;
NYX	0:85b3fd62ea1a	2501	return HAL_ERROR;
NYX	0:85b3fd62ea1a	2502	}
NYX	0:85b3fd62ea1a	2503	else
NYX	0:85b3fd62ea1a	2504	{
NYX	0:85b3fd62ea1a	2505	return HAL_TIMEOUT;
NYX	0:85b3fd62ea1a	2506	}
NYX	0:85b3fd62ea1a	2507	}
NYX	0:85b3fd62ea1a	2508
NYX	0:85b3fd62ea1a	2509	/* Generate Stop */
NYX	0:85b3fd62ea1a	2510	hi2c->Instance->CR1 \|= I2C_CR1_STOP;
NYX	0:85b3fd62ea1a	2511
NYX	0:85b3fd62ea1a	2512	hi2c->State = HAL_I2C_STATE_READY;
NYX	0:85b3fd62ea1a	2513	hi2c->Mode = HAL_I2C_MODE_NONE;
NYX	0:85b3fd62ea1a	2514
NYX	0:85b3fd62ea1a	2515	/* Process Unlocked */
NYX	0:85b3fd62ea1a	2516	__HAL_UNLOCK(hi2c);
NYX	0:85b3fd62ea1a	2517
NYX	0:85b3fd62ea1a	2518	return HAL_OK;
NYX	0:85b3fd62ea1a	2519	}
NYX	0:85b3fd62ea1a	2520	else
NYX	0:85b3fd62ea1a	2521	{
NYX	0:85b3fd62ea1a	2522	return HAL_BUSY;
NYX	0:85b3fd62ea1a	2523	}
NYX	0:85b3fd62ea1a	2524	}
NYX	0:85b3fd62ea1a	2525
NYX	0:85b3fd62ea1a	2526	/**
NYX	0:85b3fd62ea1a	2527	* @brief Read an amount of data in blocking mode from a specific memory address
NYX	0:85b3fd62ea1a	2528	* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
NYX	0:85b3fd62ea1a	2529	* the configuration information for the specified I2C.
NYX	0:85b3fd62ea1a	2530	* @param DevAddress Target device address
NYX	0:85b3fd62ea1a	2531	* @param MemAddress Internal memory address
NYX	0:85b3fd62ea1a	2532	* @param MemAddSize Size of internal memory address
NYX	0:85b3fd62ea1a	2533	* @param pData Pointer to data buffer
NYX	0:85b3fd62ea1a	2534	* @param Size Amount of data to be sent
NYX	0:85b3fd62ea1a	2535	* @param Timeout Timeout duration
NYX	0:85b3fd62ea1a	2536	* @retval HAL status
NYX	0:85b3fd62ea1a	2537	*/
NYX	0:85b3fd62ea1a	2538	HAL_StatusTypeDef HAL_I2C_Mem_Read(I2C_HandleTypeDef hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t pData, uint16_t Size, uint32_t Timeout)
NYX	0:85b3fd62ea1a	2539	{
NYX	0:85b3fd62ea1a	2540	uint32_t tickstart = 0x00U;
NYX	0:85b3fd62ea1a	2541
NYX	0:85b3fd62ea1a	2542	/* Init tickstart for timeout management*/
NYX	0:85b3fd62ea1a	2543	tickstart = HAL_GetTick();
NYX	0:85b3fd62ea1a	2544
NYX	0:85b3fd62ea1a	2545	/* Check the parameters */
NYX	0:85b3fd62ea1a	2546	assert_param(IS_I2C_MEMADD_SIZE(MemAddSize));
NYX	0:85b3fd62ea1a	2547
NYX	0:85b3fd62ea1a	2548	if(hi2c->State == HAL_I2C_STATE_READY)
NYX	0:85b3fd62ea1a	2549	{
NYX	0:85b3fd62ea1a	2550	/* Wait until BUSY flag is reset */
NYX	0:85b3fd62ea1a	2551	if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_BUSY_FLAG, tickstart) != HAL_OK)
NYX	0:85b3fd62ea1a	2552	{
NYX	0:85b3fd62ea1a	2553	return HAL_BUSY;
NYX	0:85b3fd62ea1a	2554	}
NYX	0:85b3fd62ea1a	2555
NYX	0:85b3fd62ea1a	2556	/* Process Locked */
NYX	0:85b3fd62ea1a	2557	__HAL_LOCK(hi2c);
NYX	0:85b3fd62ea1a	2558
NYX	0:85b3fd62ea1a	2559	/* Check if the I2C is already enabled */
NYX	0:85b3fd62ea1a	2560	if((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)
NYX	0:85b3fd62ea1a	2561	{
NYX	0:85b3fd62ea1a	2562	/* Enable I2C peripheral */
NYX	0:85b3fd62ea1a	2563	__HAL_I2C_ENABLE(hi2c);
NYX	0:85b3fd62ea1a	2564	}
NYX	0:85b3fd62ea1a	2565
NYX	0:85b3fd62ea1a	2566	/* Disable Pos */
NYX	0:85b3fd62ea1a	2567	hi2c->Instance->CR1 &= ~I2C_CR1_POS;
NYX	0:85b3fd62ea1a	2568
NYX	0:85b3fd62ea1a	2569	hi2c->State = HAL_I2C_STATE_BUSY_RX;
NYX	0:85b3fd62ea1a	2570	hi2c->Mode = HAL_I2C_MODE_MEM;
NYX	0:85b3fd62ea1a	2571	hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
NYX	0:85b3fd62ea1a	2572
NYX	0:85b3fd62ea1a	2573	/* Prepare transfer parameters */
NYX	0:85b3fd62ea1a	2574	hi2c->pBuffPtr = pData;
NYX	0:85b3fd62ea1a	2575	hi2c->XferCount = Size;
NYX	0:85b3fd62ea1a	2576	hi2c->XferOptions = I2C_NO_OPTION_FRAME;
NYX	0:85b3fd62ea1a	2577	hi2c->XferSize = hi2c->XferCount;
NYX	0:85b3fd62ea1a	2578
NYX	0:85b3fd62ea1a	2579	/* Send Slave Address and Memory Address */
NYX	0:85b3fd62ea1a	2580	if(I2C_RequestMemoryRead(hi2c, DevAddress, MemAddress, MemAddSize, Timeout, tickstart) != HAL_OK)
NYX	0:85b3fd62ea1a	2581	{
NYX	0:85b3fd62ea1a	2582	if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
NYX	0:85b3fd62ea1a	2583	{
NYX	0:85b3fd62ea1a	2584	/* Process Unlocked */
NYX	0:85b3fd62ea1a	2585	__HAL_UNLOCK(hi2c);
NYX	0:85b3fd62ea1a	2586	return HAL_ERROR;
NYX	0:85b3fd62ea1a	2587	}
NYX	0:85b3fd62ea1a	2588	else
NYX	0:85b3fd62ea1a	2589	{
NYX	0:85b3fd62ea1a	2590	/* Process Unlocked */
NYX	0:85b3fd62ea1a	2591	__HAL_UNLOCK(hi2c);
NYX	0:85b3fd62ea1a	2592	return HAL_TIMEOUT;
NYX	0:85b3fd62ea1a	2593	}
NYX	0:85b3fd62ea1a	2594	}
NYX	0:85b3fd62ea1a	2595
NYX	0:85b3fd62ea1a	2596	if(hi2c->XferSize == 0U)
NYX	0:85b3fd62ea1a	2597	{
NYX	0:85b3fd62ea1a	2598	/* Clear ADDR flag */
NYX	0:85b3fd62ea1a	2599	__HAL_I2C_CLEAR_ADDRFLAG(hi2c);
NYX	0:85b3fd62ea1a	2600
NYX	0:85b3fd62ea1a	2601	/* Generate Stop */
NYX	0:85b3fd62ea1a	2602	hi2c->Instance->CR1 \|= I2C_CR1_STOP;
NYX	0:85b3fd62ea1a	2603	}
NYX	0:85b3fd62ea1a	2604	else if(hi2c->XferSize == 1U)
NYX	0:85b3fd62ea1a	2605	{
NYX	0:85b3fd62ea1a	2606	/* Disable Acknowledge */
NYX	0:85b3fd62ea1a	2607	hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
NYX	0:85b3fd62ea1a	2608
NYX	0:85b3fd62ea1a	2609	/* Clear ADDR flag */
NYX	0:85b3fd62ea1a	2610	__HAL_I2C_CLEAR_ADDRFLAG(hi2c);
NYX	0:85b3fd62ea1a	2611
NYX	0:85b3fd62ea1a	2612	/* Generate Stop */
NYX	0:85b3fd62ea1a	2613	hi2c->Instance->CR1 \|= I2C_CR1_STOP;
NYX	0:85b3fd62ea1a	2614	}
NYX	0:85b3fd62ea1a	2615	else if(hi2c->XferSize == 2U)
NYX	0:85b3fd62ea1a	2616	{
NYX	0:85b3fd62ea1a	2617	/* Disable Acknowledge */
NYX	0:85b3fd62ea1a	2618	hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
NYX	0:85b3fd62ea1a	2619
NYX	0:85b3fd62ea1a	2620	/* Enable Pos */
NYX	0:85b3fd62ea1a	2621	hi2c->Instance->CR1 \|= I2C_CR1_POS;
NYX	0:85b3fd62ea1a	2622
NYX	0:85b3fd62ea1a	2623	/* Clear ADDR flag */
NYX	0:85b3fd62ea1a	2624	__HAL_I2C_CLEAR_ADDRFLAG(hi2c);
NYX	0:85b3fd62ea1a	2625	}
NYX	0:85b3fd62ea1a	2626	else
NYX	0:85b3fd62ea1a	2627	{
NYX	0:85b3fd62ea1a	2628	/* Clear ADDR flag */
NYX	0:85b3fd62ea1a	2629	__HAL_I2C_CLEAR_ADDRFLAG(hi2c);
NYX	0:85b3fd62ea1a	2630	}
NYX	0:85b3fd62ea1a	2631
NYX	0:85b3fd62ea1a	2632	while(hi2c->XferSize > 0U)
NYX	0:85b3fd62ea1a	2633	{
NYX	0:85b3fd62ea1a	2634	if(hi2c->XferSize <= 3U)
NYX	0:85b3fd62ea1a	2635	{
NYX	0:85b3fd62ea1a	2636	/* One byte */
NYX	0:85b3fd62ea1a	2637	if(hi2c->XferSize== 1U)
NYX	0:85b3fd62ea1a	2638	{
NYX	0:85b3fd62ea1a	2639	/* Wait until RXNE flag is set */
NYX	0:85b3fd62ea1a	2640	if(I2C_WaitOnRXNEFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK)
NYX	0:85b3fd62ea1a	2641	{
NYX	0:85b3fd62ea1a	2642	if(hi2c->ErrorCode == HAL_I2C_ERROR_TIMEOUT)
NYX	0:85b3fd62ea1a	2643	{
NYX	0:85b3fd62ea1a	2644	return HAL_TIMEOUT;
NYX	0:85b3fd62ea1a	2645	}
NYX	0:85b3fd62ea1a	2646	else
NYX	0:85b3fd62ea1a	2647	{
NYX	0:85b3fd62ea1a	2648	return HAL_ERROR;
NYX	0:85b3fd62ea1a	2649	}
NYX	0:85b3fd62ea1a	2650	}
NYX	0:85b3fd62ea1a	2651
NYX	0:85b3fd62ea1a	2652	/* Read data from DR */
NYX	0:85b3fd62ea1a	2653	(*hi2c->pBuffPtr++) = hi2c->Instance->DR;
NYX	0:85b3fd62ea1a	2654	hi2c->XferSize--;
NYX	0:85b3fd62ea1a	2655	hi2c->XferCount--;
NYX	0:85b3fd62ea1a	2656	}
NYX	0:85b3fd62ea1a	2657	/* Two bytes */
NYX	0:85b3fd62ea1a	2658	else if(hi2c->XferSize == 2U)
NYX	0:85b3fd62ea1a	2659	{
NYX	0:85b3fd62ea1a	2660	/* Wait until BTF flag is set */
NYX	0:85b3fd62ea1a	2661	if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BTF, RESET, Timeout, tickstart) != HAL_OK)
NYX	0:85b3fd62ea1a	2662	{
NYX	0:85b3fd62ea1a	2663	return HAL_TIMEOUT;
NYX	0:85b3fd62ea1a	2664	}
NYX	0:85b3fd62ea1a	2665
NYX	0:85b3fd62ea1a	2666	/* Generate Stop */
NYX	0:85b3fd62ea1a	2667	hi2c->Instance->CR1 \|= I2C_CR1_STOP;
NYX	0:85b3fd62ea1a	2668
NYX	0:85b3fd62ea1a	2669	/* Read data from DR */
NYX	0:85b3fd62ea1a	2670	(*hi2c->pBuffPtr++) = hi2c->Instance->DR;
NYX	0:85b3fd62ea1a	2671	hi2c->XferSize--;
NYX	0:85b3fd62ea1a	2672	hi2c->XferCount--;
NYX	0:85b3fd62ea1a	2673
NYX	0:85b3fd62ea1a	2674	/* Read data from DR */
NYX	0:85b3fd62ea1a	2675	(*hi2c->pBuffPtr++) = hi2c->Instance->DR;
NYX	0:85b3fd62ea1a	2676	hi2c->XferSize--;
NYX	0:85b3fd62ea1a	2677	hi2c->XferCount--;
NYX	0:85b3fd62ea1a	2678	}
NYX	0:85b3fd62ea1a	2679	/* 3 Last bytes */
NYX	0:85b3fd62ea1a	2680	else
NYX	0:85b3fd62ea1a	2681	{
NYX	0:85b3fd62ea1a	2682	/* Wait until BTF flag is set */
NYX	0:85b3fd62ea1a	2683	if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BTF, RESET, Timeout, tickstart) != HAL_OK)
NYX	0:85b3fd62ea1a	2684	{
NYX	0:85b3fd62ea1a	2685	return HAL_TIMEOUT;
NYX	0:85b3fd62ea1a	2686	}
NYX	0:85b3fd62ea1a	2687
NYX	0:85b3fd62ea1a	2688	/* Disable Acknowledge */
NYX	0:85b3fd62ea1a	2689	hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
NYX	0:85b3fd62ea1a	2690
NYX	0:85b3fd62ea1a	2691	/* Read data from DR */
NYX	0:85b3fd62ea1a	2692	(*hi2c->pBuffPtr++) = hi2c->Instance->DR;
NYX	0:85b3fd62ea1a	2693	hi2c->XferSize--;
NYX	0:85b3fd62ea1a	2694	hi2c->XferCount--;
NYX	0:85b3fd62ea1a	2695
NYX	0:85b3fd62ea1a	2696	/* Wait until BTF flag is set */
NYX	0:85b3fd62ea1a	2697	if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BTF, RESET, Timeout, tickstart) != HAL_OK)
NYX	0:85b3fd62ea1a	2698	{
NYX	0:85b3fd62ea1a	2699	return HAL_TIMEOUT;
NYX	0:85b3fd62ea1a	2700	}
NYX	0:85b3fd62ea1a	2701
NYX	0:85b3fd62ea1a	2702	/* Generate Stop */
NYX	0:85b3fd62ea1a	2703	hi2c->Instance->CR1 \|= I2C_CR1_STOP;
NYX	0:85b3fd62ea1a	2704
NYX	0:85b3fd62ea1a	2705	/* Read data from DR */
NYX	0:85b3fd62ea1a	2706	(*hi2c->pBuffPtr++) = hi2c->Instance->DR;
NYX	0:85b3fd62ea1a	2707	hi2c->XferSize--;
NYX	0:85b3fd62ea1a	2708	hi2c->XferCount--;
NYX	0:85b3fd62ea1a	2709
NYX	0:85b3fd62ea1a	2710	/* Read data from DR */
NYX	0:85b3fd62ea1a	2711	(*hi2c->pBuffPtr++) = hi2c->Instance->DR;
NYX	0:85b3fd62ea1a	2712	hi2c->XferSize--;
NYX	0:85b3fd62ea1a	2713	hi2c->XferCount--;
NYX	0:85b3fd62ea1a	2714	}
NYX	0:85b3fd62ea1a	2715	}
NYX	0:85b3fd62ea1a	2716	else
NYX	0:85b3fd62ea1a	2717	{
NYX	0:85b3fd62ea1a	2718	/* Wait until RXNE flag is set */
NYX	0:85b3fd62ea1a	2719	if(I2C_WaitOnRXNEFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK)
NYX	0:85b3fd62ea1a	2720	{
NYX	0:85b3fd62ea1a	2721	if(hi2c->ErrorCode == HAL_I2C_ERROR_TIMEOUT)
NYX	0:85b3fd62ea1a	2722	{
NYX	0:85b3fd62ea1a	2723	return HAL_TIMEOUT;
NYX	0:85b3fd62ea1a	2724	}
NYX	0:85b3fd62ea1a	2725	else
NYX	0:85b3fd62ea1a	2726	{
NYX	0:85b3fd62ea1a	2727	return HAL_ERROR;
NYX	0:85b3fd62ea1a	2728	}
NYX	0:85b3fd62ea1a	2729	}
NYX	0:85b3fd62ea1a	2730
NYX	0:85b3fd62ea1a	2731	/* Read data from DR */
NYX	0:85b3fd62ea1a	2732	(*hi2c->pBuffPtr++) = hi2c->Instance->DR;
NYX	0:85b3fd62ea1a	2733	hi2c->XferSize--;
NYX	0:85b3fd62ea1a	2734	hi2c->XferCount--;
NYX	0:85b3fd62ea1a	2735
NYX	0:85b3fd62ea1a	2736	if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BTF) == SET)
NYX	0:85b3fd62ea1a	2737	{
NYX	0:85b3fd62ea1a	2738	/* Read data from DR */
NYX	0:85b3fd62ea1a	2739	(*hi2c->pBuffPtr++) = hi2c->Instance->DR;
NYX	0:85b3fd62ea1a	2740	hi2c->XferSize--;
NYX	0:85b3fd62ea1a	2741	hi2c->XferCount--;
NYX	0:85b3fd62ea1a	2742	}
NYX	0:85b3fd62ea1a	2743	}
NYX	0:85b3fd62ea1a	2744	}
NYX	0:85b3fd62ea1a	2745
NYX	0:85b3fd62ea1a	2746	hi2c->State = HAL_I2C_STATE_READY;
NYX	0:85b3fd62ea1a	2747	hi2c->Mode = HAL_I2C_MODE_NONE;
NYX	0:85b3fd62ea1a	2748
NYX	0:85b3fd62ea1a	2749	/* Process Unlocked */
NYX	0:85b3fd62ea1a	2750	__HAL_UNLOCK(hi2c);
NYX	0:85b3fd62ea1a	2751
NYX	0:85b3fd62ea1a	2752	return HAL_OK;
NYX	0:85b3fd62ea1a	2753	}
NYX	0:85b3fd62ea1a	2754	else
NYX	0:85b3fd62ea1a	2755	{
NYX	0:85b3fd62ea1a	2756	return HAL_BUSY;
NYX	0:85b3fd62ea1a	2757	}
NYX	0:85b3fd62ea1a	2758	}
NYX	0:85b3fd62ea1a	2759
NYX	0:85b3fd62ea1a	2760	/**
NYX	0:85b3fd62ea1a	2761	* @brief Write an amount of data in non-blocking mode with Interrupt to a specific memory address
NYX	0:85b3fd62ea1a	2762	* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
NYX	0:85b3fd62ea1a	2763	* the configuration information for the specified I2C.
NYX	0:85b3fd62ea1a	2764	* @param DevAddress Target device address
NYX	0:85b3fd62ea1a	2765	* @param MemAddress Internal memory address
NYX	0:85b3fd62ea1a	2766	* @param MemAddSize Size of internal memory address
NYX	0:85b3fd62ea1a	2767	* @param pData Pointer to data buffer
NYX	0:85b3fd62ea1a	2768	* @param Size Amount of data to be sent
NYX	0:85b3fd62ea1a	2769	* @retval HAL status
NYX	0:85b3fd62ea1a	2770	*/
NYX	0:85b3fd62ea1a	2771	HAL_StatusTypeDef HAL_I2C_Mem_Write_IT(I2C_HandleTypeDef hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t pData, uint16_t Size)
NYX	0:85b3fd62ea1a	2772	{
NYX	0:85b3fd62ea1a	2773	__IO uint32_t count = 0U;
NYX	0:85b3fd62ea1a	2774
NYX	0:85b3fd62ea1a	2775	/* Check the parameters */
NYX	0:85b3fd62ea1a	2776	assert_param(IS_I2C_MEMADD_SIZE(MemAddSize));
NYX	0:85b3fd62ea1a	2777
NYX	0:85b3fd62ea1a	2778	if(hi2c->State == HAL_I2C_STATE_READY)
NYX	0:85b3fd62ea1a	2779	{
NYX	0:85b3fd62ea1a	2780	/* Wait until BUSY flag is reset */
NYX	0:85b3fd62ea1a	2781	count = I2C_TIMEOUT_BUSY_FLAG * (SystemCoreClock /25U /1000U);
NYX	0:85b3fd62ea1a	2782	do
NYX	0:85b3fd62ea1a	2783	{
NYX	0:85b3fd62ea1a	2784	if(count-- == 0U)
NYX	0:85b3fd62ea1a	2785	{
NYX	0:85b3fd62ea1a	2786	hi2c->PreviousState = I2C_STATE_NONE;
NYX	0:85b3fd62ea1a	2787	hi2c->State= HAL_I2C_STATE_READY;
NYX	0:85b3fd62ea1a	2788
NYX	0:85b3fd62ea1a	2789	/* Process Unlocked */
NYX	0:85b3fd62ea1a	2790	__HAL_UNLOCK(hi2c);
NYX	0:85b3fd62ea1a	2791
NYX	0:85b3fd62ea1a	2792	return HAL_TIMEOUT;
NYX	0:85b3fd62ea1a	2793	}
NYX	0:85b3fd62ea1a	2794	}
NYX	0:85b3fd62ea1a	2795	while(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) != RESET);
NYX	0:85b3fd62ea1a	2796
NYX	0:85b3fd62ea1a	2797	/* Process Locked */
NYX	0:85b3fd62ea1a	2798	__HAL_LOCK(hi2c);
NYX	0:85b3fd62ea1a	2799
NYX	0:85b3fd62ea1a	2800	/* Check if the I2C is already enabled */
NYX	0:85b3fd62ea1a	2801	if((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)
NYX	0:85b3fd62ea1a	2802	{
NYX	0:85b3fd62ea1a	2803	/* Enable I2C peripheral */
NYX	0:85b3fd62ea1a	2804	__HAL_I2C_ENABLE(hi2c);
NYX	0:85b3fd62ea1a	2805	}
NYX	0:85b3fd62ea1a	2806
NYX	0:85b3fd62ea1a	2807	/* Disable Pos */
NYX	0:85b3fd62ea1a	2808	hi2c->Instance->CR1 &= ~I2C_CR1_POS;
NYX	0:85b3fd62ea1a	2809
NYX	0:85b3fd62ea1a	2810	hi2c->State = HAL_I2C_STATE_BUSY_TX;
NYX	0:85b3fd62ea1a	2811	hi2c->Mode = HAL_I2C_MODE_MEM;
NYX	0:85b3fd62ea1a	2812	hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
NYX	0:85b3fd62ea1a	2813
NYX	0:85b3fd62ea1a	2814	/* Prepare transfer parameters */
NYX	0:85b3fd62ea1a	2815	hi2c->pBuffPtr = pData;
NYX	0:85b3fd62ea1a	2816	hi2c->XferSize = Size;
NYX	0:85b3fd62ea1a	2817	hi2c->XferCount = Size;
NYX	0:85b3fd62ea1a	2818	hi2c->XferOptions = I2C_NO_OPTION_FRAME;
NYX	0:85b3fd62ea1a	2819	hi2c->Devaddress = DevAddress;
NYX	0:85b3fd62ea1a	2820	hi2c->Memaddress = MemAddress;
NYX	0:85b3fd62ea1a	2821	hi2c->MemaddSize = MemAddSize;
NYX	0:85b3fd62ea1a	2822	hi2c->EventCount = 0U;
NYX	0:85b3fd62ea1a	2823
NYX	0:85b3fd62ea1a	2824	/* Generate Start */
NYX	0:85b3fd62ea1a	2825	hi2c->Instance->CR1 \|= I2C_CR1_START;
NYX	0:85b3fd62ea1a	2826
NYX	0:85b3fd62ea1a	2827	/* Process Unlocked */
NYX	0:85b3fd62ea1a	2828	__HAL_UNLOCK(hi2c);
NYX	0:85b3fd62ea1a	2829
NYX	0:85b3fd62ea1a	2830	/* Note : The I2C interrupts must be enabled after unlocking current process
NYX	0:85b3fd62ea1a	2831	to avoid the risk of I2C interrupt handle execution before current
NYX	0:85b3fd62ea1a	2832	process unlock */
NYX	0:85b3fd62ea1a	2833
NYX	0:85b3fd62ea1a	2834	/* Enable EVT, BUF and ERR interrupt */
NYX	0:85b3fd62ea1a	2835	__HAL_I2C_ENABLE_IT(hi2c, I2C_IT_EVT \| I2C_IT_BUF \| I2C_IT_ERR);
NYX	0:85b3fd62ea1a	2836
NYX	0:85b3fd62ea1a	2837	return HAL_OK;
NYX	0:85b3fd62ea1a	2838	}
NYX	0:85b3fd62ea1a	2839	else
NYX	0:85b3fd62ea1a	2840	{
NYX	0:85b3fd62ea1a	2841	return HAL_BUSY;
NYX	0:85b3fd62ea1a	2842	}
NYX	0:85b3fd62ea1a	2843	}
NYX	0:85b3fd62ea1a	2844
NYX	0:85b3fd62ea1a	2845	/**
NYX	0:85b3fd62ea1a	2846	* @brief Read an amount of data in non-blocking mode with Interrupt from a specific memory address
NYX	0:85b3fd62ea1a	2847	* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
NYX	0:85b3fd62ea1a	2848	* the configuration information for the specified I2C.
NYX	0:85b3fd62ea1a	2849	* @param DevAddress Target device address
NYX	0:85b3fd62ea1a	2850	* @param MemAddress Internal memory address
NYX	0:85b3fd62ea1a	2851	* @param MemAddSize Size of internal memory address
NYX	0:85b3fd62ea1a	2852	* @param pData Pointer to data buffer
NYX	0:85b3fd62ea1a	2853	* @param Size Amount of data to be sent
NYX	0:85b3fd62ea1a	2854	* @retval HAL status
NYX	0:85b3fd62ea1a	2855	*/
NYX	0:85b3fd62ea1a	2856	HAL_StatusTypeDef HAL_I2C_Mem_Read_IT(I2C_HandleTypeDef hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t pData, uint16_t Size)
NYX	0:85b3fd62ea1a	2857	{
NYX	0:85b3fd62ea1a	2858	__IO uint32_t count = 0U;
NYX	0:85b3fd62ea1a	2859
NYX	0:85b3fd62ea1a	2860	/* Check the parameters */
NYX	0:85b3fd62ea1a	2861	assert_param(IS_I2C_MEMADD_SIZE(MemAddSize));
NYX	0:85b3fd62ea1a	2862
NYX	0:85b3fd62ea1a	2863	if(hi2c->State == HAL_I2C_STATE_READY)
NYX	0:85b3fd62ea1a	2864	{
NYX	0:85b3fd62ea1a	2865	/* Wait until BUSY flag is reset */
NYX	0:85b3fd62ea1a	2866	count = I2C_TIMEOUT_BUSY_FLAG * (SystemCoreClock /25U /1000U);
NYX	0:85b3fd62ea1a	2867	do
NYX	0:85b3fd62ea1a	2868	{
NYX	0:85b3fd62ea1a	2869	if(count-- == 0U)
NYX	0:85b3fd62ea1a	2870	{
NYX	0:85b3fd62ea1a	2871	hi2c->PreviousState = I2C_STATE_NONE;
NYX	0:85b3fd62ea1a	2872	hi2c->State= HAL_I2C_STATE_READY;
NYX	0:85b3fd62ea1a	2873
NYX	0:85b3fd62ea1a	2874	/* Process Unlocked */
NYX	0:85b3fd62ea1a	2875	__HAL_UNLOCK(hi2c);
NYX	0:85b3fd62ea1a	2876
NYX	0:85b3fd62ea1a	2877	return HAL_TIMEOUT;
NYX	0:85b3fd62ea1a	2878	}
NYX	0:85b3fd62ea1a	2879	}
NYX	0:85b3fd62ea1a	2880	while(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) != RESET);
NYX	0:85b3fd62ea1a	2881
NYX	0:85b3fd62ea1a	2882	/* Process Locked */
NYX	0:85b3fd62ea1a	2883	__HAL_LOCK(hi2c);
NYX	0:85b3fd62ea1a	2884
NYX	0:85b3fd62ea1a	2885	/* Check if the I2C is already enabled */
NYX	0:85b3fd62ea1a	2886	if((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)
NYX	0:85b3fd62ea1a	2887	{
NYX	0:85b3fd62ea1a	2888	/* Enable I2C peripheral */
NYX	0:85b3fd62ea1a	2889	__HAL_I2C_ENABLE(hi2c);
NYX	0:85b3fd62ea1a	2890	}
NYX	0:85b3fd62ea1a	2891
NYX	0:85b3fd62ea1a	2892	/* Disable Pos */
NYX	0:85b3fd62ea1a	2893	hi2c->Instance->CR1 &= ~I2C_CR1_POS;
NYX	0:85b3fd62ea1a	2894
NYX	0:85b3fd62ea1a	2895	hi2c->State = HAL_I2C_STATE_BUSY_RX;
NYX	0:85b3fd62ea1a	2896	hi2c->Mode = HAL_I2C_MODE_MEM;
NYX	0:85b3fd62ea1a	2897	hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
NYX	0:85b3fd62ea1a	2898
NYX	0:85b3fd62ea1a	2899	/* Prepare transfer parameters */
NYX	0:85b3fd62ea1a	2900	hi2c->pBuffPtr = pData;
NYX	0:85b3fd62ea1a	2901	hi2c->XferSize = Size;
NYX	0:85b3fd62ea1a	2902	hi2c->XferCount = Size;
NYX	0:85b3fd62ea1a	2903	hi2c->XferOptions = I2C_NO_OPTION_FRAME;
NYX	0:85b3fd62ea1a	2904	hi2c->Devaddress = DevAddress;
NYX	0:85b3fd62ea1a	2905	hi2c->Memaddress = MemAddress;
NYX	0:85b3fd62ea1a	2906	hi2c->MemaddSize = MemAddSize;
NYX	0:85b3fd62ea1a	2907	hi2c->EventCount = 0U;
NYX	0:85b3fd62ea1a	2908
NYX	0:85b3fd62ea1a	2909	/* Enable Acknowledge */
NYX	0:85b3fd62ea1a	2910	hi2c->Instance->CR1 \|= I2C_CR1_ACK;
NYX	0:85b3fd62ea1a	2911
NYX	0:85b3fd62ea1a	2912	/* Generate Start */
NYX	0:85b3fd62ea1a	2913	hi2c->Instance->CR1 \|= I2C_CR1_START;
NYX	0:85b3fd62ea1a	2914
NYX	0:85b3fd62ea1a	2915	/* Process Unlocked */
NYX	0:85b3fd62ea1a	2916	__HAL_UNLOCK(hi2c);
NYX	0:85b3fd62ea1a	2917
NYX	0:85b3fd62ea1a	2918	if(hi2c->XferSize > 0U)
NYX	0:85b3fd62ea1a	2919	{
NYX	0:85b3fd62ea1a	2920	/* Note : The I2C interrupts must be enabled after unlocking current process
NYX	0:85b3fd62ea1a	2921	to avoid the risk of I2C interrupt handle execution before current
NYX	0:85b3fd62ea1a	2922	process unlock */
NYX	0:85b3fd62ea1a	2923
NYX	0:85b3fd62ea1a	2924	/* Enable EVT, BUF and ERR interrupt */
NYX	0:85b3fd62ea1a	2925	__HAL_I2C_ENABLE_IT(hi2c, I2C_IT_EVT \| I2C_IT_BUF \| I2C_IT_ERR);
NYX	0:85b3fd62ea1a	2926	}
NYX	0:85b3fd62ea1a	2927	return HAL_OK;
NYX	0:85b3fd62ea1a	2928	}
NYX	0:85b3fd62ea1a	2929	else
NYX	0:85b3fd62ea1a	2930	{
NYX	0:85b3fd62ea1a	2931	return HAL_BUSY;
NYX	0:85b3fd62ea1a	2932	}
NYX	0:85b3fd62ea1a	2933	}
NYX	0:85b3fd62ea1a	2934
NYX	0:85b3fd62ea1a	2935	/**
NYX	0:85b3fd62ea1a	2936	* @brief Write an amount of data in non-blocking mode with DMA to a specific memory address
NYX	0:85b3fd62ea1a	2937	* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
NYX	0:85b3fd62ea1a	2938	* the configuration information for the specified I2C.
NYX	0:85b3fd62ea1a	2939	* @param DevAddress Target device address
NYX	0:85b3fd62ea1a	2940	* @param MemAddress Internal memory address
NYX	0:85b3fd62ea1a	2941	* @param MemAddSize Size of internal memory address
NYX	0:85b3fd62ea1a	2942	* @param pData Pointer to data buffer
NYX	0:85b3fd62ea1a	2943	* @param Size Amount of data to be sent
NYX	0:85b3fd62ea1a	2944	* @retval HAL status
NYX	0:85b3fd62ea1a	2945	*/
NYX	0:85b3fd62ea1a	2946	HAL_StatusTypeDef HAL_I2C_Mem_Write_DMA(I2C_HandleTypeDef hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t pData, uint16_t Size)
NYX	0:85b3fd62ea1a	2947	{
NYX	0:85b3fd62ea1a	2948	__IO uint32_t count = 0U;
NYX	0:85b3fd62ea1a	2949
NYX	0:85b3fd62ea1a	2950	uint32_t tickstart = 0x00U;
NYX	0:85b3fd62ea1a	2951
NYX	0:85b3fd62ea1a	2952	/* Init tickstart for timeout management*/
NYX	0:85b3fd62ea1a	2953	tickstart = HAL_GetTick();
NYX	0:85b3fd62ea1a	2954
NYX	0:85b3fd62ea1a	2955	/* Check the parameters */
NYX	0:85b3fd62ea1a	2956	assert_param(IS_I2C_MEMADD_SIZE(MemAddSize));
NYX	0:85b3fd62ea1a	2957
NYX	0:85b3fd62ea1a	2958	if(hi2c->State == HAL_I2C_STATE_READY)
NYX	0:85b3fd62ea1a	2959	{
NYX	0:85b3fd62ea1a	2960	/* Wait until BUSY flag is reset */
NYX	0:85b3fd62ea1a	2961	count = I2C_TIMEOUT_BUSY_FLAG * (SystemCoreClock /25U /1000U);
NYX	0:85b3fd62ea1a	2962	do
NYX	0:85b3fd62ea1a	2963	{
NYX	0:85b3fd62ea1a	2964	if(count-- == 0U)
NYX	0:85b3fd62ea1a	2965	{
NYX	0:85b3fd62ea1a	2966	hi2c->PreviousState = I2C_STATE_NONE;
NYX	0:85b3fd62ea1a	2967	hi2c->State= HAL_I2C_STATE_READY;
NYX	0:85b3fd62ea1a	2968
NYX	0:85b3fd62ea1a	2969	/* Process Unlocked */
NYX	0:85b3fd62ea1a	2970	__HAL_UNLOCK(hi2c);
NYX	0:85b3fd62ea1a	2971
NYX	0:85b3fd62ea1a	2972	return HAL_TIMEOUT;
NYX	0:85b3fd62ea1a	2973	}
NYX	0:85b3fd62ea1a	2974	}
NYX	0:85b3fd62ea1a	2975	while(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) != RESET);
NYX	0:85b3fd62ea1a	2976
NYX	0:85b3fd62ea1a	2977	/* Process Locked */
NYX	0:85b3fd62ea1a	2978	__HAL_LOCK(hi2c);
NYX	0:85b3fd62ea1a	2979
NYX	0:85b3fd62ea1a	2980	/* Check if the I2C is already enabled */
NYX	0:85b3fd62ea1a	2981	if((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)
NYX	0:85b3fd62ea1a	2982	{
NYX	0:85b3fd62ea1a	2983	/* Enable I2C peripheral */
NYX	0:85b3fd62ea1a	2984	__HAL_I2C_ENABLE(hi2c);
NYX	0:85b3fd62ea1a	2985	}
NYX	0:85b3fd62ea1a	2986
NYX	0:85b3fd62ea1a	2987	/* Disable Pos */
NYX	0:85b3fd62ea1a	2988	hi2c->Instance->CR1 &= ~I2C_CR1_POS;
NYX	0:85b3fd62ea1a	2989
NYX	0:85b3fd62ea1a	2990	hi2c->State = HAL_I2C_STATE_BUSY_TX;
NYX	0:85b3fd62ea1a	2991	hi2c->Mode = HAL_I2C_MODE_MEM;
NYX	0:85b3fd62ea1a	2992	hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
NYX	0:85b3fd62ea1a	2993
NYX	0:85b3fd62ea1a	2994	/* Prepare transfer parameters */
NYX	0:85b3fd62ea1a	2995	hi2c->pBuffPtr = pData;
NYX	0:85b3fd62ea1a	2996	hi2c->XferSize = Size;
NYX	0:85b3fd62ea1a	2997	hi2c->XferCount = Size;
NYX	0:85b3fd62ea1a	2998	hi2c->XferOptions = I2C_NO_OPTION_FRAME;
NYX	0:85b3fd62ea1a	2999
NYX	0:85b3fd62ea1a	3000	if(hi2c->XferSize > 0U)
NYX	0:85b3fd62ea1a	3001	{
NYX	0:85b3fd62ea1a	3002	/* Set the I2C DMA transfer complete callback */
NYX	0:85b3fd62ea1a	3003	hi2c->hdmatx->XferCpltCallback = I2C_DMAXferCplt;
NYX	0:85b3fd62ea1a	3004
NYX	0:85b3fd62ea1a	3005	/* Set the DMA error callback */
NYX	0:85b3fd62ea1a	3006	hi2c->hdmatx->XferErrorCallback = I2C_DMAError;
NYX	0:85b3fd62ea1a	3007
NYX	0:85b3fd62ea1a	3008	/* Set the unused DMA callbacks to NULL */
NYX	0:85b3fd62ea1a	3009	hi2c->hdmatx->XferHalfCpltCallback = NULL;
NYX	0:85b3fd62ea1a	3010	hi2c->hdmatx->XferM1CpltCallback = NULL;
NYX	0:85b3fd62ea1a	3011	hi2c->hdmatx->XferM1HalfCpltCallback = NULL;
NYX	0:85b3fd62ea1a	3012	hi2c->hdmatx->XferAbortCallback = NULL;
NYX	0:85b3fd62ea1a	3013
NYX	0:85b3fd62ea1a	3014	/* Enable the DMA Stream */
NYX	0:85b3fd62ea1a	3015	HAL_DMA_Start_IT(hi2c->hdmatx, (uint32_t)hi2c->pBuffPtr, (uint32_t)&hi2c->Instance->DR, hi2c->XferSize);
NYX	0:85b3fd62ea1a	3016
NYX	0:85b3fd62ea1a	3017	/* Send Slave Address and Memory Address */
NYX	0:85b3fd62ea1a	3018	if(I2C_RequestMemoryWrite(hi2c, DevAddress, MemAddress, MemAddSize, I2C_TIMEOUT_FLAG, tickstart) != HAL_OK)
NYX	0:85b3fd62ea1a	3019	{
NYX	0:85b3fd62ea1a	3020	if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
NYX	0:85b3fd62ea1a	3021	{
NYX	0:85b3fd62ea1a	3022	/* Process Unlocked */
NYX	0:85b3fd62ea1a	3023	__HAL_UNLOCK(hi2c);
NYX	0:85b3fd62ea1a	3024	return HAL_ERROR;
NYX	0:85b3fd62ea1a	3025	}
NYX	0:85b3fd62ea1a	3026	else
NYX	0:85b3fd62ea1a	3027	{
NYX	0:85b3fd62ea1a	3028	/* Process Unlocked */
NYX	0:85b3fd62ea1a	3029	__HAL_UNLOCK(hi2c);
NYX	0:85b3fd62ea1a	3030	return HAL_TIMEOUT;
NYX	0:85b3fd62ea1a	3031	}
NYX	0:85b3fd62ea1a	3032	}
NYX	0:85b3fd62ea1a	3033
NYX	0:85b3fd62ea1a	3034	/* Clear ADDR flag */
NYX	0:85b3fd62ea1a	3035	__HAL_I2C_CLEAR_ADDRFLAG(hi2c);
NYX	0:85b3fd62ea1a	3036
NYX	0:85b3fd62ea1a	3037	/* Process Unlocked */
NYX	0:85b3fd62ea1a	3038	__HAL_UNLOCK(hi2c);
NYX	0:85b3fd62ea1a	3039
NYX	0:85b3fd62ea1a	3040	/* Note : The I2C interrupts must be enabled after unlocking current process
NYX	0:85b3fd62ea1a	3041	to avoid the risk of I2C interrupt handle execution before current
NYX	0:85b3fd62ea1a	3042	process unlock */
NYX	0:85b3fd62ea1a	3043	/* Enable ERR interrupt */
NYX	0:85b3fd62ea1a	3044	__HAL_I2C_ENABLE_IT(hi2c, I2C_IT_ERR);
NYX	0:85b3fd62ea1a	3045
NYX	0:85b3fd62ea1a	3046	/* Enable DMA Request */
NYX	0:85b3fd62ea1a	3047	hi2c->Instance->CR2 \|= I2C_CR2_DMAEN;
NYX	0:85b3fd62ea1a	3048	}
NYX	0:85b3fd62ea1a	3049	return HAL_OK;
NYX	0:85b3fd62ea1a	3050	}
NYX	0:85b3fd62ea1a	3051	else
NYX	0:85b3fd62ea1a	3052	{
NYX	0:85b3fd62ea1a	3053	return HAL_BUSY;
NYX	0:85b3fd62ea1a	3054	}
NYX	0:85b3fd62ea1a	3055	}
NYX	0:85b3fd62ea1a	3056
NYX	0:85b3fd62ea1a	3057	/**
NYX	0:85b3fd62ea1a	3058	* @brief Reads an amount of data in non-blocking mode with DMA from a specific memory address.
NYX	0:85b3fd62ea1a	3059	* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
NYX	0:85b3fd62ea1a	3060	* the configuration information for the specified I2C.
NYX	0:85b3fd62ea1a	3061	* @param DevAddress Target device address
NYX	0:85b3fd62ea1a	3062	* @param MemAddress Internal memory address
NYX	0:85b3fd62ea1a	3063	* @param MemAddSize Size of internal memory address
NYX	0:85b3fd62ea1a	3064	* @param pData Pointer to data buffer
NYX	0:85b3fd62ea1a	3065	* @param Size Amount of data to be read
NYX	0:85b3fd62ea1a	3066	* @retval HAL status
NYX	0:85b3fd62ea1a	3067	*/
NYX	0:85b3fd62ea1a	3068	HAL_StatusTypeDef HAL_I2C_Mem_Read_DMA(I2C_HandleTypeDef hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t pData, uint16_t Size)
NYX	0:85b3fd62ea1a	3069	{
NYX	0:85b3fd62ea1a	3070	uint32_t tickstart = 0x00U;
NYX	0:85b3fd62ea1a	3071	__IO uint32_t count = 0U;
NYX	0:85b3fd62ea1a	3072
NYX	0:85b3fd62ea1a	3073	/* Init tickstart for timeout management*/
NYX	0:85b3fd62ea1a	3074	tickstart = HAL_GetTick();
NYX	0:85b3fd62ea1a	3075
NYX	0:85b3fd62ea1a	3076	/* Check the parameters */
NYX	0:85b3fd62ea1a	3077	assert_param(IS_I2C_MEMADD_SIZE(MemAddSize));
NYX	0:85b3fd62ea1a	3078
NYX	0:85b3fd62ea1a	3079	if(hi2c->State == HAL_I2C_STATE_READY)
NYX	0:85b3fd62ea1a	3080	{
NYX	0:85b3fd62ea1a	3081	/* Wait until BUSY flag is reset */
NYX	0:85b3fd62ea1a	3082	count = I2C_TIMEOUT_BUSY_FLAG * (SystemCoreClock /25U /1000U);
NYX	0:85b3fd62ea1a	3083	do
NYX	0:85b3fd62ea1a	3084	{
NYX	0:85b3fd62ea1a	3085	if(count-- == 0U)
NYX	0:85b3fd62ea1a	3086	{
NYX	0:85b3fd62ea1a	3087	hi2c->PreviousState = I2C_STATE_NONE;
NYX	0:85b3fd62ea1a	3088	hi2c->State= HAL_I2C_STATE_READY;
NYX	0:85b3fd62ea1a	3089
NYX	0:85b3fd62ea1a	3090	/* Process Unlocked */
NYX	0:85b3fd62ea1a	3091	__HAL_UNLOCK(hi2c);
NYX	0:85b3fd62ea1a	3092
NYX	0:85b3fd62ea1a	3093	return HAL_TIMEOUT;
NYX	0:85b3fd62ea1a	3094	}
NYX	0:85b3fd62ea1a	3095	}
NYX	0:85b3fd62ea1a	3096	while(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) != RESET);
NYX	0:85b3fd62ea1a	3097
NYX	0:85b3fd62ea1a	3098	/* Process Locked */
NYX	0:85b3fd62ea1a	3099	__HAL_LOCK(hi2c);
NYX	0:85b3fd62ea1a	3100
NYX	0:85b3fd62ea1a	3101	/* Check if the I2C is already enabled */
NYX	0:85b3fd62ea1a	3102	if((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)
NYX	0:85b3fd62ea1a	3103	{
NYX	0:85b3fd62ea1a	3104	/* Enable I2C peripheral */
NYX	0:85b3fd62ea1a	3105	__HAL_I2C_ENABLE(hi2c);
NYX	0:85b3fd62ea1a	3106	}
NYX	0:85b3fd62ea1a	3107
NYX	0:85b3fd62ea1a	3108	/* Disable Pos */
NYX	0:85b3fd62ea1a	3109	hi2c->Instance->CR1 &= ~I2C_CR1_POS;
NYX	0:85b3fd62ea1a	3110
NYX	0:85b3fd62ea1a	3111	hi2c->State = HAL_I2C_STATE_BUSY_RX;
NYX	0:85b3fd62ea1a	3112	hi2c->Mode = HAL_I2C_MODE_MEM;
NYX	0:85b3fd62ea1a	3113	hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
NYX	0:85b3fd62ea1a	3114
NYX	0:85b3fd62ea1a	3115	/* Prepare transfer parameters */
NYX	0:85b3fd62ea1a	3116	hi2c->pBuffPtr = pData;
NYX	0:85b3fd62ea1a	3117	hi2c->XferCount = Size;
NYX	0:85b3fd62ea1a	3118	hi2c->XferOptions = I2C_NO_OPTION_FRAME;
NYX	0:85b3fd62ea1a	3119	hi2c->XferSize = hi2c->XferCount;
NYX	0:85b3fd62ea1a	3120
NYX	0:85b3fd62ea1a	3121	if(hi2c->XferSize > 0U)
NYX	0:85b3fd62ea1a	3122	{
NYX	0:85b3fd62ea1a	3123	/* Set the I2C DMA transfer complete callback */
NYX	0:85b3fd62ea1a	3124	hi2c->hdmarx->XferCpltCallback = I2C_DMAXferCplt;
NYX	0:85b3fd62ea1a	3125
NYX	0:85b3fd62ea1a	3126	/* Set the DMA error callback */
NYX	0:85b3fd62ea1a	3127	hi2c->hdmarx->XferErrorCallback = I2C_DMAError;
NYX	0:85b3fd62ea1a	3128
NYX	0:85b3fd62ea1a	3129	/* Set the unused DMA callbacks to NULL */
NYX	0:85b3fd62ea1a	3130	hi2c->hdmarx->XferHalfCpltCallback = NULL;
NYX	0:85b3fd62ea1a	3131	hi2c->hdmarx->XferM1CpltCallback = NULL;
NYX	0:85b3fd62ea1a	3132	hi2c->hdmarx->XferM1HalfCpltCallback = NULL;
NYX	0:85b3fd62ea1a	3133	hi2c->hdmarx->XferAbortCallback = NULL;
NYX	0:85b3fd62ea1a	3134
NYX	0:85b3fd62ea1a	3135	/* Enable the DMA Stream */
NYX	0:85b3fd62ea1a	3136	HAL_DMA_Start_IT(hi2c->hdmarx, (uint32_t)&hi2c->Instance->DR, (uint32_t)hi2c->pBuffPtr, hi2c->XferSize);
NYX	0:85b3fd62ea1a	3137
NYX	0:85b3fd62ea1a	3138	/* Send Slave Address and Memory Address */
NYX	0:85b3fd62ea1a	3139	if(I2C_RequestMemoryRead(hi2c, DevAddress, MemAddress, MemAddSize, I2C_TIMEOUT_FLAG, tickstart) != HAL_OK)
NYX	0:85b3fd62ea1a	3140	{
NYX	0:85b3fd62ea1a	3141	if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
NYX	0:85b3fd62ea1a	3142	{
NYX	0:85b3fd62ea1a	3143	/* Process Unlocked */
NYX	0:85b3fd62ea1a	3144	__HAL_UNLOCK(hi2c);
NYX	0:85b3fd62ea1a	3145	return HAL_ERROR;
NYX	0:85b3fd62ea1a	3146	}
NYX	0:85b3fd62ea1a	3147	else
NYX	0:85b3fd62ea1a	3148	{
NYX	0:85b3fd62ea1a	3149	/* Process Unlocked */
NYX	0:85b3fd62ea1a	3150	__HAL_UNLOCK(hi2c);
NYX	0:85b3fd62ea1a	3151	return HAL_TIMEOUT;
NYX	0:85b3fd62ea1a	3152	}
NYX	0:85b3fd62ea1a	3153	}
NYX	0:85b3fd62ea1a	3154
NYX	0:85b3fd62ea1a	3155	if(Size == 1U)
NYX	0:85b3fd62ea1a	3156	{
NYX	0:85b3fd62ea1a	3157	/* Disable Acknowledge */
NYX	0:85b3fd62ea1a	3158	hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
NYX	0:85b3fd62ea1a	3159	}
NYX	0:85b3fd62ea1a	3160	else
NYX	0:85b3fd62ea1a	3161	{
NYX	0:85b3fd62ea1a	3162	/* Enable Last DMA bit */
NYX	0:85b3fd62ea1a	3163	hi2c->Instance->CR2 \|= I2C_CR2_LAST;
NYX	0:85b3fd62ea1a	3164	}
NYX	0:85b3fd62ea1a	3165
NYX	0:85b3fd62ea1a	3166	/* Clear ADDR flag */
NYX	0:85b3fd62ea1a	3167	__HAL_I2C_CLEAR_ADDRFLAG(hi2c);
NYX	0:85b3fd62ea1a	3168
NYX	0:85b3fd62ea1a	3169	/* Process Unlocked */
NYX	0:85b3fd62ea1a	3170	__HAL_UNLOCK(hi2c);
NYX	0:85b3fd62ea1a	3171
NYX	0:85b3fd62ea1a	3172	/* Note : The I2C interrupts must be enabled after unlocking current process
NYX	0:85b3fd62ea1a	3173	to avoid the risk of I2C interrupt handle execution before current
NYX	0:85b3fd62ea1a	3174	process unlock */
NYX	0:85b3fd62ea1a	3175	/* Enable ERR interrupt */
NYX	0:85b3fd62ea1a	3176	__HAL_I2C_ENABLE_IT(hi2c, I2C_IT_ERR);
NYX	0:85b3fd62ea1a	3177
NYX	0:85b3fd62ea1a	3178	/* Enable DMA Request */
NYX	0:85b3fd62ea1a	3179	hi2c->Instance->CR2 \|= I2C_CR2_DMAEN;
NYX	0:85b3fd62ea1a	3180	}
NYX	0:85b3fd62ea1a	3181	else
NYX	0:85b3fd62ea1a	3182	{
NYX	0:85b3fd62ea1a	3183	/* Send Slave Address and Memory Address */
NYX	0:85b3fd62ea1a	3184	if(I2C_RequestMemoryRead(hi2c, DevAddress, MemAddress, MemAddSize, I2C_TIMEOUT_FLAG, tickstart) != HAL_OK)
NYX	0:85b3fd62ea1a	3185	{
NYX	0:85b3fd62ea1a	3186	if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
NYX	0:85b3fd62ea1a	3187	{
NYX	0:85b3fd62ea1a	3188	/* Process Unlocked */
NYX	0:85b3fd62ea1a	3189	__HAL_UNLOCK(hi2c);
NYX	0:85b3fd62ea1a	3190	return HAL_ERROR;
NYX	0:85b3fd62ea1a	3191	}
NYX	0:85b3fd62ea1a	3192	else
NYX	0:85b3fd62ea1a	3193	{
NYX	0:85b3fd62ea1a	3194	/* Process Unlocked */
NYX	0:85b3fd62ea1a	3195	__HAL_UNLOCK(hi2c);
NYX	0:85b3fd62ea1a	3196	return HAL_TIMEOUT;
NYX	0:85b3fd62ea1a	3197	}
NYX	0:85b3fd62ea1a	3198	}
NYX	0:85b3fd62ea1a	3199
NYX	0:85b3fd62ea1a	3200	/* Clear ADDR flag */
NYX	0:85b3fd62ea1a	3201	__HAL_I2C_CLEAR_ADDRFLAG(hi2c);
NYX	0:85b3fd62ea1a	3202
NYX	0:85b3fd62ea1a	3203	/* Generate Stop */
NYX	0:85b3fd62ea1a	3204	hi2c->Instance->CR1 \|= I2C_CR1_STOP;
NYX	0:85b3fd62ea1a	3205
NYX	0:85b3fd62ea1a	3206	hi2c->State = HAL_I2C_STATE_READY;
NYX	0:85b3fd62ea1a	3207
NYX	0:85b3fd62ea1a	3208	/* Process Unlocked */
NYX	0:85b3fd62ea1a	3209	__HAL_UNLOCK(hi2c);
NYX	0:85b3fd62ea1a	3210	}
NYX	0:85b3fd62ea1a	3211
NYX	0:85b3fd62ea1a	3212	return HAL_OK;
NYX	0:85b3fd62ea1a	3213	}
NYX	0:85b3fd62ea1a	3214	else
NYX	0:85b3fd62ea1a	3215	{
NYX	0:85b3fd62ea1a	3216	return HAL_BUSY;
NYX	0:85b3fd62ea1a	3217	}
NYX	0:85b3fd62ea1a	3218	}
NYX	0:85b3fd62ea1a	3219
NYX	0:85b3fd62ea1a	3220	/**
NYX	0:85b3fd62ea1a	3221	* @brief Checks if target device is ready for communication.
NYX	0:85b3fd62ea1a	3222	* @note This function is used with Memory devices
NYX	0:85b3fd62ea1a	3223	* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
NYX	0:85b3fd62ea1a	3224	* the configuration information for the specified I2C.
NYX	0:85b3fd62ea1a	3225	* @param DevAddress Target device address
NYX	0:85b3fd62ea1a	3226	* @param Trials Number of trials
NYX	0:85b3fd62ea1a	3227	* @param Timeout Timeout duration
NYX	0:85b3fd62ea1a	3228	* @retval HAL status
NYX	0:85b3fd62ea1a	3229	*/
NYX	0:85b3fd62ea1a	3230	HAL_StatusTypeDef HAL_I2C_IsDeviceReady(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint32_t Trials, uint32_t Timeout)
NYX	0:85b3fd62ea1a	3231	{
NYX	0:85b3fd62ea1a	3232	uint32_t tickstart = 0U, tmp1 = 0U, tmp2 = 0U, tmp3 = 0U, I2C_Trials = 1U;
NYX	0:85b3fd62ea1a	3233
NYX	0:85b3fd62ea1a	3234	/* Get tick */
NYX	0:85b3fd62ea1a	3235	tickstart = HAL_GetTick();
NYX	0:85b3fd62ea1a	3236
NYX	0:85b3fd62ea1a	3237	if(hi2c->State == HAL_I2C_STATE_READY)
NYX	0:85b3fd62ea1a	3238	{
NYX	0:85b3fd62ea1a	3239	/* Wait until BUSY flag is reset */
NYX	0:85b3fd62ea1a	3240	if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_BUSY_FLAG, tickstart) != HAL_OK)
NYX	0:85b3fd62ea1a	3241	{
NYX	0:85b3fd62ea1a	3242	return HAL_BUSY;
NYX	0:85b3fd62ea1a	3243	}
NYX	0:85b3fd62ea1a	3244
NYX	0:85b3fd62ea1a	3245	/* Process Locked */
NYX	0:85b3fd62ea1a	3246	__HAL_LOCK(hi2c);
NYX	0:85b3fd62ea1a	3247
NYX	0:85b3fd62ea1a	3248	/* Check if the I2C is already enabled */
NYX	0:85b3fd62ea1a	3249	if((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)
NYX	0:85b3fd62ea1a	3250	{
NYX	0:85b3fd62ea1a	3251	/* Enable I2C peripheral */
NYX	0:85b3fd62ea1a	3252	__HAL_I2C_ENABLE(hi2c);
NYX	0:85b3fd62ea1a	3253	}
NYX	0:85b3fd62ea1a	3254
NYX	0:85b3fd62ea1a	3255	/* Disable Pos */
NYX	0:85b3fd62ea1a	3256	hi2c->Instance->CR1 &= ~I2C_CR1_POS;
NYX	0:85b3fd62ea1a	3257
NYX	0:85b3fd62ea1a	3258	hi2c->State = HAL_I2C_STATE_BUSY;
NYX	0:85b3fd62ea1a	3259	hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
NYX	0:85b3fd62ea1a	3260	hi2c->XferOptions = I2C_NO_OPTION_FRAME;
NYX	0:85b3fd62ea1a	3261
NYX	0:85b3fd62ea1a	3262	do
NYX	0:85b3fd62ea1a	3263	{
NYX	0:85b3fd62ea1a	3264	/* Generate Start */
NYX	0:85b3fd62ea1a	3265	hi2c->Instance->CR1 \|= I2C_CR1_START;
NYX	0:85b3fd62ea1a	3266
NYX	0:85b3fd62ea1a	3267	/* Wait until SB flag is set */
NYX	0:85b3fd62ea1a	3268	if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_SB, RESET, Timeout, tickstart) != HAL_OK)
NYX	0:85b3fd62ea1a	3269	{
NYX	0:85b3fd62ea1a	3270	return HAL_TIMEOUT;
NYX	0:85b3fd62ea1a	3271	}
NYX	0:85b3fd62ea1a	3272
NYX	0:85b3fd62ea1a	3273	/* Send slave address */
NYX	0:85b3fd62ea1a	3274	hi2c->Instance->DR = I2C_7BIT_ADD_WRITE(DevAddress);
NYX	0:85b3fd62ea1a	3275
NYX	0:85b3fd62ea1a	3276	/* Wait until ADDR or AF flag are set */
NYX	0:85b3fd62ea1a	3277	/* Get tick */
NYX	0:85b3fd62ea1a	3278	tickstart = HAL_GetTick();
NYX	0:85b3fd62ea1a	3279
NYX	0:85b3fd62ea1a	3280	tmp1 = __HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_ADDR);
NYX	0:85b3fd62ea1a	3281	tmp2 = __HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_AF);
NYX	0:85b3fd62ea1a	3282	tmp3 = hi2c->State;
NYX	0:85b3fd62ea1a	3283	while((tmp1 == RESET) && (tmp2 == RESET) && (tmp3 != HAL_I2C_STATE_TIMEOUT))
NYX	0:85b3fd62ea1a	3284	{
NYX	0:85b3fd62ea1a	3285	if((Timeout == 0U)\|\|((HAL_GetTick() - tickstart ) > Timeout))
NYX	0:85b3fd62ea1a	3286	{
NYX	0:85b3fd62ea1a	3287	hi2c->State = HAL_I2C_STATE_TIMEOUT;
NYX	0:85b3fd62ea1a	3288	}
NYX	0:85b3fd62ea1a	3289	tmp1 = __HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_ADDR);
NYX	0:85b3fd62ea1a	3290	tmp2 = __HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_AF);
NYX	0:85b3fd62ea1a	3291	tmp3 = hi2c->State;
NYX	0:85b3fd62ea1a	3292	}
NYX	0:85b3fd62ea1a	3293
NYX	0:85b3fd62ea1a	3294	hi2c->State = HAL_I2C_STATE_READY;
NYX	0:85b3fd62ea1a	3295
NYX	0:85b3fd62ea1a	3296	/* Check if the ADDR flag has been set */
NYX	0:85b3fd62ea1a	3297	if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_ADDR) == SET)
NYX	0:85b3fd62ea1a	3298	{
NYX	0:85b3fd62ea1a	3299	/* Generate Stop */
NYX	0:85b3fd62ea1a	3300	hi2c->Instance->CR1 \|= I2C_CR1_STOP;
NYX	0:85b3fd62ea1a	3301
NYX	0:85b3fd62ea1a	3302	/* Clear ADDR Flag */
NYX	0:85b3fd62ea1a	3303	__HAL_I2C_CLEAR_ADDRFLAG(hi2c);
NYX	0:85b3fd62ea1a	3304
NYX	0:85b3fd62ea1a	3305	/* Wait until BUSY flag is reset */
NYX	0:85b3fd62ea1a	3306	if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_BUSY_FLAG, tickstart) != HAL_OK)
NYX	0:85b3fd62ea1a	3307	{
NYX	0:85b3fd62ea1a	3308	return HAL_TIMEOUT;
NYX	0:85b3fd62ea1a	3309	}
NYX	0:85b3fd62ea1a	3310
NYX	0:85b3fd62ea1a	3311	hi2c->State = HAL_I2C_STATE_READY;
NYX	0:85b3fd62ea1a	3312
NYX	0:85b3fd62ea1a	3313	/* Process Unlocked */
NYX	0:85b3fd62ea1a	3314	__HAL_UNLOCK(hi2c);
NYX	0:85b3fd62ea1a	3315
NYX	0:85b3fd62ea1a	3316	return HAL_OK;
NYX	0:85b3fd62ea1a	3317	}
NYX	0:85b3fd62ea1a	3318	else
NYX	0:85b3fd62ea1a	3319	{
NYX	0:85b3fd62ea1a	3320	/* Generate Stop */
NYX	0:85b3fd62ea1a	3321	hi2c->Instance->CR1 \|= I2C_CR1_STOP;
NYX	0:85b3fd62ea1a	3322
NYX	0:85b3fd62ea1a	3323	/* Clear AF Flag */
NYX	0:85b3fd62ea1a	3324	__HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF);
NYX	0:85b3fd62ea1a	3325
NYX	0:85b3fd62ea1a	3326	/* Wait until BUSY flag is reset */
NYX	0:85b3fd62ea1a	3327	if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_BUSY_FLAG, tickstart) != HAL_OK)
NYX	0:85b3fd62ea1a	3328	{
NYX	0:85b3fd62ea1a	3329	return HAL_TIMEOUT;
NYX	0:85b3fd62ea1a	3330	}
NYX	0:85b3fd62ea1a	3331	}
NYX	0:85b3fd62ea1a	3332	}while(I2C_Trials++ < Trials);
NYX	0:85b3fd62ea1a	3333
NYX	0:85b3fd62ea1a	3334	hi2c->State = HAL_I2C_STATE_READY;
NYX	0:85b3fd62ea1a	3335
NYX	0:85b3fd62ea1a	3336	/* Process Unlocked */
NYX	0:85b3fd62ea1a	3337	__HAL_UNLOCK(hi2c);
NYX	0:85b3fd62ea1a	3338
NYX	0:85b3fd62ea1a	3339	return HAL_ERROR;
NYX	0:85b3fd62ea1a	3340	}
NYX	0:85b3fd62ea1a	3341	else
NYX	0:85b3fd62ea1a	3342	{
NYX	0:85b3fd62ea1a	3343	return HAL_BUSY;
NYX	0:85b3fd62ea1a	3344	}
NYX	0:85b3fd62ea1a	3345	}
NYX	0:85b3fd62ea1a	3346
NYX	0:85b3fd62ea1a	3347	/**
NYX	0:85b3fd62ea1a	3348	* @brief This function handles I2C event interrupt request.
NYX	0:85b3fd62ea1a	3349	* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
NYX	0:85b3fd62ea1a	3350	* the configuration information for the specified I2C.
NYX	0:85b3fd62ea1a	3351	* @retval None
NYX	0:85b3fd62ea1a	3352	*/
NYX	0:85b3fd62ea1a	3353	void HAL_I2C_EV_IRQHandler(I2C_HandleTypeDef *hi2c)
NYX	0:85b3fd62ea1a	3354	{
NYX	0:85b3fd62ea1a	3355	uint32_t sr2itflags = READ_REG(hi2c->Instance->SR2);
NYX	0:85b3fd62ea1a	3356	uint32_t sr1itflags = READ_REG(hi2c->Instance->SR1);
NYX	0:85b3fd62ea1a	3357	uint32_t itsources = READ_REG(hi2c->Instance->CR2);
NYX	0:85b3fd62ea1a	3358
NYX	0:85b3fd62ea1a	3359	uint32_t CurrentMode = hi2c->Mode;
NYX	0:85b3fd62ea1a	3360
NYX	0:85b3fd62ea1a	3361	/* Master or Memory mode selected */
NYX	0:85b3fd62ea1a	3362	if((CurrentMode == HAL_I2C_MODE_MASTER) \|\| (CurrentMode == HAL_I2C_MODE_MEM))
NYX	0:85b3fd62ea1a	3363	{
NYX	0:85b3fd62ea1a	3364	/* SB Set ----------------------------------------------------------------*/
NYX	0:85b3fd62ea1a	3365	if(((sr1itflags & I2C_FLAG_SB) != RESET) && ((itsources & I2C_IT_EVT) != RESET))
NYX	0:85b3fd62ea1a	3366	{
NYX	0:85b3fd62ea1a	3367	I2C_Master_SB(hi2c);
NYX	0:85b3fd62ea1a	3368	}
NYX	0:85b3fd62ea1a	3369	/* ADD10 Set -------------------------------------------------------------*/
NYX	0:85b3fd62ea1a	3370	else if(((sr1itflags & I2C_FLAG_ADD10) != RESET) && ((itsources & I2C_IT_EVT) != RESET))
NYX	0:85b3fd62ea1a	3371	{
NYX	0:85b3fd62ea1a	3372	I2C_Master_ADD10(hi2c);
NYX	0:85b3fd62ea1a	3373	}
NYX	0:85b3fd62ea1a	3374	/* ADDR Set --------------------------------------------------------------*/
NYX	0:85b3fd62ea1a	3375	else if(((sr1itflags & I2C_FLAG_ADDR) != RESET) && ((itsources & I2C_IT_EVT) != RESET))
NYX	0:85b3fd62ea1a	3376	{
NYX	0:85b3fd62ea1a	3377	I2C_Master_ADDR(hi2c);
NYX	0:85b3fd62ea1a	3378	}
NYX	0:85b3fd62ea1a	3379
NYX	0:85b3fd62ea1a	3380	/* I2C in mode Transmitter -----------------------------------------------*/
NYX	0:85b3fd62ea1a	3381	if((sr2itflags & I2C_FLAG_TRA) != RESET)
NYX	0:85b3fd62ea1a	3382	{
NYX	0:85b3fd62ea1a	3383	/* TXE set and BTF reset -----------------------------------------------*/
NYX	0:85b3fd62ea1a	3384	if(((sr1itflags & I2C_FLAG_TXE) != RESET) && ((itsources & I2C_IT_BUF) != RESET) && ((sr1itflags & I2C_FLAG_BTF) == RESET))
NYX	0:85b3fd62ea1a	3385	{
NYX	0:85b3fd62ea1a	3386	I2C_MasterTransmit_TXE(hi2c);
NYX	0:85b3fd62ea1a	3387	}
NYX	0:85b3fd62ea1a	3388	/* BTF set -------------------------------------------------------------*/
NYX	0:85b3fd62ea1a	3389	else if(((sr1itflags & I2C_FLAG_BTF) != RESET) && ((itsources & I2C_IT_EVT) != RESET))
NYX	0:85b3fd62ea1a	3390	{
NYX	0:85b3fd62ea1a	3391	I2C_MasterTransmit_BTF(hi2c);
NYX	0:85b3fd62ea1a	3392	}
NYX	0:85b3fd62ea1a	3393	}
NYX	0:85b3fd62ea1a	3394	/* I2C in mode Receiver --------------------------------------------------*/
NYX	0:85b3fd62ea1a	3395	else
NYX	0:85b3fd62ea1a	3396	{
NYX	0:85b3fd62ea1a	3397	/* RXNE set and BTF reset -----------------------------------------------*/
NYX	0:85b3fd62ea1a	3398	if(((sr1itflags & I2C_FLAG_RXNE) != RESET) && ((itsources & I2C_IT_BUF) != RESET) && ((sr1itflags & I2C_FLAG_BTF) == RESET))
NYX	0:85b3fd62ea1a	3399	{
NYX	0:85b3fd62ea1a	3400	I2C_MasterReceive_RXNE(hi2c);
NYX	0:85b3fd62ea1a	3401	}
NYX	0:85b3fd62ea1a	3402	/* BTF set -------------------------------------------------------------*/
NYX	0:85b3fd62ea1a	3403	else if(((sr1itflags & I2C_FLAG_BTF) != RESET) && ((itsources & I2C_IT_EVT) != RESET))
NYX	0:85b3fd62ea1a	3404	{
NYX	0:85b3fd62ea1a	3405	I2C_MasterReceive_BTF(hi2c);
NYX	0:85b3fd62ea1a	3406	}
NYX	0:85b3fd62ea1a	3407	}
NYX	0:85b3fd62ea1a	3408	}
NYX	0:85b3fd62ea1a	3409	/* Slave mode selected */
NYX	0:85b3fd62ea1a	3410	else
NYX	0:85b3fd62ea1a	3411	{
NYX	0:85b3fd62ea1a	3412	/* ADDR set --------------------------------------------------------------*/
NYX	0:85b3fd62ea1a	3413	if(((sr1itflags & I2C_FLAG_ADDR) != RESET) && ((itsources & I2C_IT_EVT) != RESET))
NYX	0:85b3fd62ea1a	3414	{
NYX	0:85b3fd62ea1a	3415	I2C_Slave_ADDR(hi2c);
NYX	0:85b3fd62ea1a	3416	}
NYX	0:85b3fd62ea1a	3417	/* STOPF set --------------------------------------------------------------*/
NYX	0:85b3fd62ea1a	3418	else if(((sr1itflags & I2C_FLAG_STOPF) != RESET) && ((itsources & I2C_IT_EVT) != RESET))
NYX	0:85b3fd62ea1a	3419	{
NYX	0:85b3fd62ea1a	3420	I2C_Slave_STOPF(hi2c);
NYX	0:85b3fd62ea1a	3421	}
NYX	0:85b3fd62ea1a	3422	/* I2C in mode Transmitter -----------------------------------------------*/
NYX	0:85b3fd62ea1a	3423	else if((sr2itflags & I2C_FLAG_TRA) != RESET)
NYX	0:85b3fd62ea1a	3424	{
NYX	0:85b3fd62ea1a	3425	/* TXE set and BTF reset -----------------------------------------------*/
NYX	0:85b3fd62ea1a	3426	if(((sr1itflags & I2C_FLAG_TXE) != RESET) && ((itsources & I2C_IT_BUF) != RESET) && ((sr1itflags & I2C_FLAG_BTF) == RESET))
NYX	0:85b3fd62ea1a	3427	{
NYX	0:85b3fd62ea1a	3428	I2C_SlaveTransmit_TXE(hi2c);
NYX	0:85b3fd62ea1a	3429	}
NYX	0:85b3fd62ea1a	3430	/* BTF set -------------------------------------------------------------*/
NYX	0:85b3fd62ea1a	3431	else if(((sr1itflags & I2C_FLAG_BTF) != RESET) && ((itsources & I2C_IT_EVT) != RESET))
NYX	0:85b3fd62ea1a	3432	{
NYX	0:85b3fd62ea1a	3433	I2C_SlaveTransmit_BTF(hi2c);
NYX	0:85b3fd62ea1a	3434	}
NYX	0:85b3fd62ea1a	3435	}
NYX	0:85b3fd62ea1a	3436	/* I2C in mode Receiver --------------------------------------------------*/
NYX	0:85b3fd62ea1a	3437	else
NYX	0:85b3fd62ea1a	3438	{
NYX	0:85b3fd62ea1a	3439	/* RXNE set and BTF reset ----------------------------------------------*/
NYX	0:85b3fd62ea1a	3440	if(((sr1itflags & I2C_FLAG_RXNE) != RESET) && ((itsources & I2C_IT_BUF) != RESET) && ((sr1itflags & I2C_FLAG_BTF) == RESET))
NYX	0:85b3fd62ea1a	3441	{
NYX	0:85b3fd62ea1a	3442	I2C_SlaveReceive_RXNE(hi2c);
NYX	0:85b3fd62ea1a	3443	}
NYX	0:85b3fd62ea1a	3444	/* BTF set -------------------------------------------------------------*/
NYX	0:85b3fd62ea1a	3445	else if(((sr1itflags & I2C_FLAG_BTF) != RESET) && ((itsources & I2C_IT_EVT) != RESET))
NYX	0:85b3fd62ea1a	3446	{
NYX	0:85b3fd62ea1a	3447	I2C_SlaveReceive_BTF(hi2c);
NYX	0:85b3fd62ea1a	3448	}
NYX	0:85b3fd62ea1a	3449	}
NYX	0:85b3fd62ea1a	3450	}
NYX	0:85b3fd62ea1a	3451	}
NYX	0:85b3fd62ea1a	3452
NYX	0:85b3fd62ea1a	3453	/**
NYX	0:85b3fd62ea1a	3454	* @brief This function handles I2C error interrupt request.
NYX	0:85b3fd62ea1a	3455	* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
NYX	0:85b3fd62ea1a	3456	* the configuration information for the specified I2C.
NYX	0:85b3fd62ea1a	3457	* @retval None
NYX	0:85b3fd62ea1a	3458	*/
NYX	0:85b3fd62ea1a	3459	void HAL_I2C_ER_IRQHandler(I2C_HandleTypeDef *hi2c)
NYX	0:85b3fd62ea1a	3460	{
NYX	0:85b3fd62ea1a	3461	uint32_t tmp1 = 0U, tmp2 = 0U, tmp3 = 0U, tmp4 = 0U;
NYX	0:85b3fd62ea1a	3462	uint32_t sr1itflags = READ_REG(hi2c->Instance->SR1);
NYX	0:85b3fd62ea1a	3463	uint32_t itsources = READ_REG(hi2c->Instance->CR2);
NYX	0:85b3fd62ea1a	3464
NYX	0:85b3fd62ea1a	3465	/* I2C Bus error interrupt occurred ----------------------------------------*/
NYX	0:85b3fd62ea1a	3466	if(((sr1itflags & I2C_FLAG_BERR) != RESET) && ((itsources & I2C_IT_ERR) != RESET))
NYX	0:85b3fd62ea1a	3467	{
NYX	0:85b3fd62ea1a	3468	hi2c->ErrorCode \|= HAL_I2C_ERROR_BERR;
NYX	0:85b3fd62ea1a	3469
NYX	0:85b3fd62ea1a	3470	/* Clear BERR flag */
NYX	0:85b3fd62ea1a	3471	__HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_BERR);
NYX	0:85b3fd62ea1a	3472	}
NYX	0:85b3fd62ea1a	3473
NYX	0:85b3fd62ea1a	3474	/* I2C Arbitration Loss error interrupt occurred ---------------------------*/
NYX	0:85b3fd62ea1a	3475	if(((sr1itflags & I2C_FLAG_ARLO) != RESET) && ((itsources & I2C_IT_ERR) != RESET))
NYX	0:85b3fd62ea1a	3476	{
NYX	0:85b3fd62ea1a	3477	hi2c->ErrorCode \|= HAL_I2C_ERROR_ARLO;
NYX	0:85b3fd62ea1a	3478
NYX	0:85b3fd62ea1a	3479	/* Clear ARLO flag */
NYX	0:85b3fd62ea1a	3480	__HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_ARLO);
NYX	0:85b3fd62ea1a	3481	}
NYX	0:85b3fd62ea1a	3482
NYX	0:85b3fd62ea1a	3483	/* I2C Acknowledge failure error interrupt occurred ------------------------*/
NYX	0:85b3fd62ea1a	3484	if(((sr1itflags & I2C_FLAG_AF) != RESET) && ((itsources & I2C_IT_ERR) != RESET))
NYX	0:85b3fd62ea1a	3485	{
NYX	0:85b3fd62ea1a	3486	tmp1 = hi2c->Mode;
NYX	0:85b3fd62ea1a	3487	tmp2 = hi2c->XferCount;
NYX	0:85b3fd62ea1a	3488	tmp3 = hi2c->State;
NYX	0:85b3fd62ea1a	3489	tmp4 = hi2c->PreviousState;
NYX	0:85b3fd62ea1a	3490	if((tmp1 == HAL_I2C_MODE_SLAVE) && (tmp2 == 0U) && \
NYX	0:85b3fd62ea1a	3491	((tmp3 == HAL_I2C_STATE_BUSY_TX) \|\| (tmp3 == HAL_I2C_STATE_BUSY_TX_LISTEN) \|\| \
NYX	0:85b3fd62ea1a	3492	((tmp3 == HAL_I2C_STATE_LISTEN) && (tmp4 == I2C_STATE_SLAVE_BUSY_TX))))
NYX	0:85b3fd62ea1a	3493	{
NYX	0:85b3fd62ea1a	3494	I2C_Slave_AF(hi2c);
NYX	0:85b3fd62ea1a	3495	}
NYX	0:85b3fd62ea1a	3496	else
NYX	0:85b3fd62ea1a	3497	{
NYX	0:85b3fd62ea1a	3498	hi2c->ErrorCode \|= HAL_I2C_ERROR_AF;
NYX	0:85b3fd62ea1a	3499
NYX	0:85b3fd62ea1a	3500	/* Do not generate a STOP in case of Slave receive non acknowledge during transfer (mean not at the end of transfer) */
NYX	0:85b3fd62ea1a	3501	if(hi2c->Mode == HAL_I2C_MODE_MASTER)
NYX	0:85b3fd62ea1a	3502	{
NYX	0:85b3fd62ea1a	3503	/* Generate Stop */
NYX	0:85b3fd62ea1a	3504	SET_BIT(hi2c->Instance->CR1,I2C_CR1_STOP);
NYX	0:85b3fd62ea1a	3505	}
NYX	0:85b3fd62ea1a	3506
NYX	0:85b3fd62ea1a	3507	/* Clear AF flag */
NYX	0:85b3fd62ea1a	3508	__HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF);
NYX	0:85b3fd62ea1a	3509	}
NYX	0:85b3fd62ea1a	3510	}
NYX	0:85b3fd62ea1a	3511
NYX	0:85b3fd62ea1a	3512	/* I2C Over-Run/Under-Run interrupt occurred -------------------------------*/
NYX	0:85b3fd62ea1a	3513	if(((sr1itflags & I2C_FLAG_OVR) != RESET) && ((itsources & I2C_IT_ERR) != RESET))
NYX	0:85b3fd62ea1a	3514	{
NYX	0:85b3fd62ea1a	3515	hi2c->ErrorCode \|= HAL_I2C_ERROR_OVR;
NYX	0:85b3fd62ea1a	3516	/* Clear OVR flag */
NYX	0:85b3fd62ea1a	3517	__HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_OVR);
NYX	0:85b3fd62ea1a	3518	}
NYX	0:85b3fd62ea1a	3519
NYX	0:85b3fd62ea1a	3520	/* Call the Error Callback in case of Error detected -----------------------*/
NYX	0:85b3fd62ea1a	3521	if(hi2c->ErrorCode != HAL_I2C_ERROR_NONE)
NYX	0:85b3fd62ea1a	3522	{
NYX	0:85b3fd62ea1a	3523	I2C_ITError(hi2c);
NYX	0:85b3fd62ea1a	3524	}
NYX	0:85b3fd62ea1a	3525	}
NYX	0:85b3fd62ea1a	3526
NYX	0:85b3fd62ea1a	3527	/**
NYX	0:85b3fd62ea1a	3528	* @brief Master Tx Transfer completed callback.
NYX	0:85b3fd62ea1a	3529	* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
NYX	0:85b3fd62ea1a	3530	* the configuration information for the specified I2C.
NYX	0:85b3fd62ea1a	3531	* @retval None
NYX	0:85b3fd62ea1a	3532	*/
NYX	0:85b3fd62ea1a	3533	__weak void HAL_I2C_MasterTxCpltCallback(I2C_HandleTypeDef *hi2c)
NYX	0:85b3fd62ea1a	3534	{
NYX	0:85b3fd62ea1a	3535	/* Prevent unused argument(s) compilation warning */
NYX	0:85b3fd62ea1a	3536	UNUSED(hi2c);
NYX	0:85b3fd62ea1a	3537
NYX	0:85b3fd62ea1a	3538	/* NOTE : This function should not be modified, when the callback is needed,
NYX	0:85b3fd62ea1a	3539	the HAL_I2C_MasterTxCpltCallback can be implemented in the user file
NYX	0:85b3fd62ea1a	3540	*/
NYX	0:85b3fd62ea1a	3541	}
NYX	0:85b3fd62ea1a	3542
NYX	0:85b3fd62ea1a	3543	/**
NYX	0:85b3fd62ea1a	3544	* @brief Master Rx Transfer completed callback.
NYX	0:85b3fd62ea1a	3545	* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
NYX	0:85b3fd62ea1a	3546	* the configuration information for the specified I2C.
NYX	0:85b3fd62ea1a	3547	* @retval None
NYX	0:85b3fd62ea1a	3548	*/
NYX	0:85b3fd62ea1a	3549	__weak void HAL_I2C_MasterRxCpltCallback(I2C_HandleTypeDef *hi2c)
NYX	0:85b3fd62ea1a	3550	{
NYX	0:85b3fd62ea1a	3551	/* Prevent unused argument(s) compilation warning */
NYX	0:85b3fd62ea1a	3552	UNUSED(hi2c);
NYX	0:85b3fd62ea1a	3553
NYX	0:85b3fd62ea1a	3554	/* NOTE : This function should not be modified, when the callback is needed,
NYX	0:85b3fd62ea1a	3555	the HAL_I2C_MasterRxCpltCallback can be implemented in the user file
NYX	0:85b3fd62ea1a	3556	*/
NYX	0:85b3fd62ea1a	3557	}
NYX	0:85b3fd62ea1a	3558
NYX	0:85b3fd62ea1a	3559	/** @brief Slave Tx Transfer completed callback.
NYX	0:85b3fd62ea1a	3560	* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
NYX	0:85b3fd62ea1a	3561	* the configuration information for the specified I2C.
NYX	0:85b3fd62ea1a	3562	* @retval None
NYX	0:85b3fd62ea1a	3563	*/
NYX	0:85b3fd62ea1a	3564	__weak void HAL_I2C_SlaveTxCpltCallback(I2C_HandleTypeDef *hi2c)
NYX	0:85b3fd62ea1a	3565	{
NYX	0:85b3fd62ea1a	3566	/* Prevent unused argument(s) compilation warning */
NYX	0:85b3fd62ea1a	3567	UNUSED(hi2c);
NYX	0:85b3fd62ea1a	3568
NYX	0:85b3fd62ea1a	3569	/* NOTE : This function should not be modified, when the callback is needed,
NYX	0:85b3fd62ea1a	3570	the HAL_I2C_SlaveTxCpltCallback can be implemented in the user file
NYX	0:85b3fd62ea1a	3571	*/
NYX	0:85b3fd62ea1a	3572	}
NYX	0:85b3fd62ea1a	3573
NYX	0:85b3fd62ea1a	3574	/**
NYX	0:85b3fd62ea1a	3575	* @brief Slave Rx Transfer completed callback.
NYX	0:85b3fd62ea1a	3576	* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
NYX	0:85b3fd62ea1a	3577	* the configuration information for the specified I2C.
NYX	0:85b3fd62ea1a	3578	* @retval None
NYX	0:85b3fd62ea1a	3579	*/
NYX	0:85b3fd62ea1a	3580	__weak void HAL_I2C_SlaveRxCpltCallback(I2C_HandleTypeDef *hi2c)
NYX	0:85b3fd62ea1a	3581	{
NYX	0:85b3fd62ea1a	3582	/* Prevent unused argument(s) compilation warning */
NYX	0:85b3fd62ea1a	3583	UNUSED(hi2c);
NYX	0:85b3fd62ea1a	3584
NYX	0:85b3fd62ea1a	3585	/* NOTE : This function should not be modified, when the callback is needed,
NYX	0:85b3fd62ea1a	3586	the HAL_I2C_SlaveRxCpltCallback can be implemented in the user file
NYX	0:85b3fd62ea1a	3587	*/
NYX	0:85b3fd62ea1a	3588	}
NYX	0:85b3fd62ea1a	3589
NYX	0:85b3fd62ea1a	3590	/**
NYX	0:85b3fd62ea1a	3591	* @brief Slave Address Match callback.
NYX	0:85b3fd62ea1a	3592	* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
NYX	0:85b3fd62ea1a	3593	* the configuration information for the specified I2C.
NYX	0:85b3fd62ea1a	3594	* @param TransferDirection Master request Transfer Direction (Write/Read), value of @ref I2C_XferOptions_definition
NYX	0:85b3fd62ea1a	3595	* @param AddrMatchCode Address Match Code
NYX	0:85b3fd62ea1a	3596	* @retval None
NYX	0:85b3fd62ea1a	3597	*/
NYX	0:85b3fd62ea1a	3598	__weak void HAL_I2C_AddrCallback(I2C_HandleTypeDef *hi2c, uint8_t TransferDirection, uint16_t AddrMatchCode)
NYX	0:85b3fd62ea1a	3599	{
NYX	0:85b3fd62ea1a	3600	/* Prevent unused argument(s) compilation warning */
NYX	0:85b3fd62ea1a	3601	UNUSED(hi2c);
NYX	0:85b3fd62ea1a	3602	UNUSED(TransferDirection);
NYX	0:85b3fd62ea1a	3603	UNUSED(AddrMatchCode);
NYX	0:85b3fd62ea1a	3604
NYX	0:85b3fd62ea1a	3605	/* NOTE : This function should not be modified, when the callback is needed,
NYX	0:85b3fd62ea1a	3606	the HAL_I2C_AddrCallback can be implemented in the user file
NYX	0:85b3fd62ea1a	3607	*/
NYX	0:85b3fd62ea1a	3608	}
NYX	0:85b3fd62ea1a	3609
NYX	0:85b3fd62ea1a	3610	/**
NYX	0:85b3fd62ea1a	3611	* @brief Listen Complete callback.
NYX	0:85b3fd62ea1a	3612	* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
NYX	0:85b3fd62ea1a	3613	* the configuration information for the specified I2C.
NYX	0:85b3fd62ea1a	3614	* @retval None
NYX	0:85b3fd62ea1a	3615	*/
NYX	0:85b3fd62ea1a	3616	__weak void HAL_I2C_ListenCpltCallback(I2C_HandleTypeDef *hi2c)
NYX	0:85b3fd62ea1a	3617	{
NYX	0:85b3fd62ea1a	3618	/* Prevent unused argument(s) compilation warning */
NYX	0:85b3fd62ea1a	3619	UNUSED(hi2c);
NYX	0:85b3fd62ea1a	3620
NYX	0:85b3fd62ea1a	3621	/* NOTE : This function should not be modified, when the callback is needed,
NYX	0:85b3fd62ea1a	3622	the HAL_I2C_ListenCpltCallback can be implemented in the user file
NYX	0:85b3fd62ea1a	3623	*/
NYX	0:85b3fd62ea1a	3624	}
NYX	0:85b3fd62ea1a	3625
NYX	0:85b3fd62ea1a	3626	/**
NYX	0:85b3fd62ea1a	3627	* @brief Memory Tx Transfer completed callback.
NYX	0:85b3fd62ea1a	3628	* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
NYX	0:85b3fd62ea1a	3629	* the configuration information for the specified I2C.
NYX	0:85b3fd62ea1a	3630	* @retval None
NYX	0:85b3fd62ea1a	3631	*/
NYX	0:85b3fd62ea1a	3632	__weak void HAL_I2C_MemTxCpltCallback(I2C_HandleTypeDef *hi2c)
NYX	0:85b3fd62ea1a	3633	{
NYX	0:85b3fd62ea1a	3634	/* Prevent unused argument(s) compilation warning */
NYX	0:85b3fd62ea1a	3635	UNUSED(hi2c);
NYX	0:85b3fd62ea1a	3636
NYX	0:85b3fd62ea1a	3637	/* NOTE : This function should not be modified, when the callback is needed,
NYX	0:85b3fd62ea1a	3638	the HAL_I2C_MemTxCpltCallback can be implemented in the user file
NYX	0:85b3fd62ea1a	3639	*/
NYX	0:85b3fd62ea1a	3640	}
NYX	0:85b3fd62ea1a	3641
NYX	0:85b3fd62ea1a	3642	/**
NYX	0:85b3fd62ea1a	3643	* @brief Memory Rx Transfer completed callback.
NYX	0:85b3fd62ea1a	3644	* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
NYX	0:85b3fd62ea1a	3645	* the configuration information for the specified I2C.
NYX	0:85b3fd62ea1a	3646	* @retval None
NYX	0:85b3fd62ea1a	3647	*/
NYX	0:85b3fd62ea1a	3648	__weak void HAL_I2C_MemRxCpltCallback(I2C_HandleTypeDef *hi2c)
NYX	0:85b3fd62ea1a	3649	{
NYX	0:85b3fd62ea1a	3650	/* Prevent unused argument(s) compilation warning */
NYX	0:85b3fd62ea1a	3651	UNUSED(hi2c);
NYX	0:85b3fd62ea1a	3652
NYX	0:85b3fd62ea1a	3653	/* NOTE : This function should not be modified, when the callback is needed,
NYX	0:85b3fd62ea1a	3654	the HAL_I2C_MemRxCpltCallback can be implemented in the user file
NYX	0:85b3fd62ea1a	3655	*/
NYX	0:85b3fd62ea1a	3656	}
NYX	0:85b3fd62ea1a	3657
NYX	0:85b3fd62ea1a	3658	/**
NYX	0:85b3fd62ea1a	3659	* @brief I2C error callback.
NYX	0:85b3fd62ea1a	3660	* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
NYX	0:85b3fd62ea1a	3661	* the configuration information for the specified I2C.
NYX	0:85b3fd62ea1a	3662	* @retval None
NYX	0:85b3fd62ea1a	3663	*/
NYX	0:85b3fd62ea1a	3664	__weak void HAL_I2C_ErrorCallback(I2C_HandleTypeDef *hi2c)
NYX	0:85b3fd62ea1a	3665	{
NYX	0:85b3fd62ea1a	3666	/* Prevent unused argument(s) compilation warning */
NYX	0:85b3fd62ea1a	3667	UNUSED(hi2c);
NYX	0:85b3fd62ea1a	3668
NYX	0:85b3fd62ea1a	3669	/* NOTE : This function should not be modified, when the callback is needed,
NYX	0:85b3fd62ea1a	3670	the HAL_I2C_ErrorCallback can be implemented in the user file
NYX	0:85b3fd62ea1a	3671	*/
NYX	0:85b3fd62ea1a	3672	}
NYX	0:85b3fd62ea1a	3673
NYX	0:85b3fd62ea1a	3674	/**
NYX	0:85b3fd62ea1a	3675	* @brief I2C abort callback.
NYX	0:85b3fd62ea1a	3676	* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
NYX	0:85b3fd62ea1a	3677	* the configuration information for the specified I2C.
NYX	0:85b3fd62ea1a	3678	* @retval None
NYX	0:85b3fd62ea1a	3679	*/
NYX	0:85b3fd62ea1a	3680	__weak void HAL_I2C_AbortCpltCallback(I2C_HandleTypeDef *hi2c)
NYX	0:85b3fd62ea1a	3681	{
NYX	0:85b3fd62ea1a	3682	/* Prevent unused argument(s) compilation warning */
NYX	0:85b3fd62ea1a	3683	UNUSED(hi2c);
NYX	0:85b3fd62ea1a	3684
NYX	0:85b3fd62ea1a	3685	/* NOTE : This function should not be modified, when the callback is needed,
NYX	0:85b3fd62ea1a	3686	the HAL_I2C_AbortCpltCallback could be implemented in the user file
NYX	0:85b3fd62ea1a	3687	*/
NYX	0:85b3fd62ea1a	3688	}
NYX	0:85b3fd62ea1a	3689
NYX	0:85b3fd62ea1a	3690	/**
NYX	0:85b3fd62ea1a	3691	* @}
NYX	0:85b3fd62ea1a	3692	*/
NYX	0:85b3fd62ea1a	3693
NYX	0:85b3fd62ea1a	3694	/** @defgroup I2C_Exported_Functions_Group3 Peripheral State, Mode and Error functions
NYX	0:85b3fd62ea1a	3695	* @brief Peripheral State and Errors functions
NYX	0:85b3fd62ea1a	3696	*
NYX	0:85b3fd62ea1a	3697	@verbatim
NYX	0:85b3fd62ea1a	3698	===============================================================================
NYX	0:85b3fd62ea1a	3699	##### Peripheral State, Mode and Error functions #####
NYX	0:85b3fd62ea1a	3700	===============================================================================
NYX	0:85b3fd62ea1a	3701	[..]
NYX	0:85b3fd62ea1a	3702	This subsection permits to get in run-time the status of the peripheral
NYX	0:85b3fd62ea1a	3703	and the data flow.
NYX	0:85b3fd62ea1a	3704
NYX	0:85b3fd62ea1a	3705	@endverbatim
NYX	0:85b3fd62ea1a	3706	* @{
NYX	0:85b3fd62ea1a	3707	*/
NYX	0:85b3fd62ea1a	3708
NYX	0:85b3fd62ea1a	3709	/**
NYX	0:85b3fd62ea1a	3710	* @brief Return the I2C handle state.
NYX	0:85b3fd62ea1a	3711	* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
NYX	0:85b3fd62ea1a	3712	* the configuration information for the specified I2C.
NYX	0:85b3fd62ea1a	3713	* @retval HAL state
NYX	0:85b3fd62ea1a	3714	*/
NYX	0:85b3fd62ea1a	3715	HAL_I2C_StateTypeDef HAL_I2C_GetState(I2C_HandleTypeDef *hi2c)
NYX	0:85b3fd62ea1a	3716	{
NYX	0:85b3fd62ea1a	3717	/* Return I2C handle state */
NYX	0:85b3fd62ea1a	3718	return hi2c->State;
NYX	0:85b3fd62ea1a	3719	}
NYX	0:85b3fd62ea1a	3720
NYX	0:85b3fd62ea1a	3721	/**
NYX	0:85b3fd62ea1a	3722	* @brief Return the I2C Master, Slave, Memory or no mode.
NYX	0:85b3fd62ea1a	3723	* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
NYX	0:85b3fd62ea1a	3724	* the configuration information for I2C module
NYX	0:85b3fd62ea1a	3725	* @retval HAL mode
NYX	0:85b3fd62ea1a	3726	*/
NYX	0:85b3fd62ea1a	3727	HAL_I2C_ModeTypeDef HAL_I2C_GetMode(I2C_HandleTypeDef *hi2c)
NYX	0:85b3fd62ea1a	3728	{
NYX	0:85b3fd62ea1a	3729	return hi2c->Mode;
NYX	0:85b3fd62ea1a	3730	}
NYX	0:85b3fd62ea1a	3731
NYX	0:85b3fd62ea1a	3732	/**
NYX	0:85b3fd62ea1a	3733	* @brief Return the I2C error code
NYX	0:85b3fd62ea1a	3734	* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
NYX	0:85b3fd62ea1a	3735	* the configuration information for the specified I2C.
NYX	0:85b3fd62ea1a	3736	* @retval I2C Error Code
NYX	0:85b3fd62ea1a	3737	*/
NYX	0:85b3fd62ea1a	3738	uint32_t HAL_I2C_GetError(I2C_HandleTypeDef *hi2c)
NYX	0:85b3fd62ea1a	3739	{
NYX	0:85b3fd62ea1a	3740	return hi2c->ErrorCode;
NYX	0:85b3fd62ea1a	3741	}
NYX	0:85b3fd62ea1a	3742
NYX	0:85b3fd62ea1a	3743	/**
NYX	0:85b3fd62ea1a	3744	* @}
NYX	0:85b3fd62ea1a	3745	*/
NYX	0:85b3fd62ea1a	3746
NYX	0:85b3fd62ea1a	3747	/**
NYX	0:85b3fd62ea1a	3748	* @brief Handle TXE flag for Master
NYX	0:85b3fd62ea1a	3749	* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
NYX	0:85b3fd62ea1a	3750	* the configuration information for I2C module
NYX	0:85b3fd62ea1a	3751	* @retval HAL status
NYX	0:85b3fd62ea1a	3752	*/
NYX	0:85b3fd62ea1a	3753	static HAL_StatusTypeDef I2C_MasterTransmit_TXE(I2C_HandleTypeDef *hi2c)
NYX	0:85b3fd62ea1a	3754	{
NYX	0:85b3fd62ea1a	3755	/* Declaration of temporary variables to prevent undefined behavior of volatile usage */
NYX	0:85b3fd62ea1a	3756	uint32_t CurrentState = hi2c->State;
NYX	0:85b3fd62ea1a	3757	uint32_t CurrentMode = hi2c->Mode;
NYX	0:85b3fd62ea1a	3758	uint32_t CurrentXferOptions = hi2c->XferOptions;
NYX	0:85b3fd62ea1a	3759
NYX	0:85b3fd62ea1a	3760	if((hi2c->XferSize == 0U) && (CurrentState == HAL_I2C_STATE_BUSY_TX))
NYX	0:85b3fd62ea1a	3761	{
NYX	0:85b3fd62ea1a	3762	/* Call TxCpltCallback() directly if no stop mode is set */
NYX	0:85b3fd62ea1a	3763	if((CurrentXferOptions != I2C_FIRST_AND_LAST_FRAME) && (CurrentXferOptions != I2C_LAST_FRAME) && (CurrentXferOptions != I2C_NO_OPTION_FRAME))
NYX	0:85b3fd62ea1a	3764	{
NYX	0:85b3fd62ea1a	3765	__HAL_I2C_DISABLE_IT(hi2c, I2C_IT_EVT \| I2C_IT_BUF \| I2C_IT_ERR);
NYX	0:85b3fd62ea1a	3766
NYX	0:85b3fd62ea1a	3767	hi2c->PreviousState = I2C_STATE_MASTER_BUSY_TX;
NYX	0:85b3fd62ea1a	3768	hi2c->Mode = HAL_I2C_MODE_NONE;
NYX	0:85b3fd62ea1a	3769	hi2c->State = HAL_I2C_STATE_READY;
NYX	0:85b3fd62ea1a	3770
NYX	0:85b3fd62ea1a	3771	HAL_I2C_MasterTxCpltCallback(hi2c);
NYX	0:85b3fd62ea1a	3772	}
NYX	0:85b3fd62ea1a	3773	else /* Generate Stop condition then Call TxCpltCallback() */
NYX	0:85b3fd62ea1a	3774	{
NYX	0:85b3fd62ea1a	3775	/* Disable EVT, BUF and ERR interrupt */
NYX	0:85b3fd62ea1a	3776	__HAL_I2C_DISABLE_IT(hi2c, I2C_IT_EVT \| I2C_IT_BUF \| I2C_IT_ERR);
NYX	0:85b3fd62ea1a	3777
NYX	0:85b3fd62ea1a	3778	/* Generate Stop */
NYX	0:85b3fd62ea1a	3779	hi2c->Instance->CR1 \|= I2C_CR1_STOP;
NYX	0:85b3fd62ea1a	3780
NYX	0:85b3fd62ea1a	3781	hi2c->PreviousState = I2C_STATE_NONE;
NYX	0:85b3fd62ea1a	3782	hi2c->State = HAL_I2C_STATE_READY;
NYX	0:85b3fd62ea1a	3783
NYX	0:85b3fd62ea1a	3784	if(hi2c->Mode == HAL_I2C_MODE_MEM)
NYX	0:85b3fd62ea1a	3785	{
NYX	0:85b3fd62ea1a	3786	hi2c->Mode = HAL_I2C_MODE_NONE;
NYX	0:85b3fd62ea1a	3787	HAL_I2C_MemTxCpltCallback(hi2c);
NYX	0:85b3fd62ea1a	3788	}
NYX	0:85b3fd62ea1a	3789	else
NYX	0:85b3fd62ea1a	3790	{
NYX	0:85b3fd62ea1a	3791	hi2c->Mode = HAL_I2C_MODE_NONE;
NYX	0:85b3fd62ea1a	3792	HAL_I2C_MasterTxCpltCallback(hi2c);
NYX	0:85b3fd62ea1a	3793	}
NYX	0:85b3fd62ea1a	3794	}
NYX	0:85b3fd62ea1a	3795	}
NYX	0:85b3fd62ea1a	3796	else if((CurrentState == HAL_I2C_STATE_BUSY_TX) \|\| \
NYX	0:85b3fd62ea1a	3797	((CurrentMode == HAL_I2C_MODE_MEM) && (CurrentState == HAL_I2C_STATE_BUSY_RX)))
NYX	0:85b3fd62ea1a	3798	{
NYX	0:85b3fd62ea1a	3799	if(hi2c->XferCount == 0U)
NYX	0:85b3fd62ea1a	3800	{
NYX	0:85b3fd62ea1a	3801	/* Disable BUF interrupt */
NYX	0:85b3fd62ea1a	3802	__HAL_I2C_DISABLE_IT(hi2c, I2C_IT_BUF);
NYX	0:85b3fd62ea1a	3803	}
NYX	0:85b3fd62ea1a	3804	else
NYX	0:85b3fd62ea1a	3805	{
NYX	0:85b3fd62ea1a	3806	if(hi2c->Mode == HAL_I2C_MODE_MEM)
NYX	0:85b3fd62ea1a	3807	{
NYX	0:85b3fd62ea1a	3808	if(hi2c->EventCount == 0)
NYX	0:85b3fd62ea1a	3809	{
NYX	0:85b3fd62ea1a	3810	/* If Memory address size is 8Bit */
NYX	0:85b3fd62ea1a	3811	if(hi2c->MemaddSize == I2C_MEMADD_SIZE_8BIT)
NYX	0:85b3fd62ea1a	3812	{
NYX	0:85b3fd62ea1a	3813	/* Send Memory Address */
NYX	0:85b3fd62ea1a	3814	hi2c->Instance->DR = I2C_MEM_ADD_LSB(hi2c->Memaddress);
NYX	0:85b3fd62ea1a	3815
NYX	0:85b3fd62ea1a	3816	hi2c->EventCount += 2;
NYX	0:85b3fd62ea1a	3817	}
NYX	0:85b3fd62ea1a	3818	/* If Memory address size is 16Bit */
NYX	0:85b3fd62ea1a	3819	else
NYX	0:85b3fd62ea1a	3820	{
NYX	0:85b3fd62ea1a	3821	/* Send MSB of Memory Address */
NYX	0:85b3fd62ea1a	3822	hi2c->Instance->DR = I2C_MEM_ADD_MSB(hi2c->Memaddress);
NYX	0:85b3fd62ea1a	3823
NYX	0:85b3fd62ea1a	3824	hi2c->EventCount++;
NYX	0:85b3fd62ea1a	3825	}
NYX	0:85b3fd62ea1a	3826	}
NYX	0:85b3fd62ea1a	3827	else if(hi2c->EventCount == 1)
NYX	0:85b3fd62ea1a	3828	{
NYX	0:85b3fd62ea1a	3829	/* Send LSB of Memory Address */
NYX	0:85b3fd62ea1a	3830	hi2c->Instance->DR = I2C_MEM_ADD_LSB(hi2c->Memaddress);
NYX	0:85b3fd62ea1a	3831
NYX	0:85b3fd62ea1a	3832	hi2c->EventCount++;
NYX	0:85b3fd62ea1a	3833	}
NYX	0:85b3fd62ea1a	3834	else if(hi2c->EventCount == 2)
NYX	0:85b3fd62ea1a	3835	{
NYX	0:85b3fd62ea1a	3836	if(hi2c->State == HAL_I2C_STATE_BUSY_RX)
NYX	0:85b3fd62ea1a	3837	{
NYX	0:85b3fd62ea1a	3838	/* Generate Restart */
NYX	0:85b3fd62ea1a	3839	hi2c->Instance->CR1 \|= I2C_CR1_START;
NYX	0:85b3fd62ea1a	3840	}
NYX	0:85b3fd62ea1a	3841	else if(hi2c->State == HAL_I2C_STATE_BUSY_TX)
NYX	0:85b3fd62ea1a	3842	{
NYX	0:85b3fd62ea1a	3843	/* Write data to DR */
NYX	0:85b3fd62ea1a	3844	hi2c->Instance->DR = (*hi2c->pBuffPtr++);
NYX	0:85b3fd62ea1a	3845	hi2c->XferCount--;
NYX	0:85b3fd62ea1a	3846	}
NYX	0:85b3fd62ea1a	3847	}
NYX	0:85b3fd62ea1a	3848	}
NYX	0:85b3fd62ea1a	3849	else
NYX	0:85b3fd62ea1a	3850	{
NYX	0:85b3fd62ea1a	3851	/* Write data to DR */
NYX	0:85b3fd62ea1a	3852	hi2c->Instance->DR = (*hi2c->pBuffPtr++);
NYX	0:85b3fd62ea1a	3853	hi2c->XferCount--;
NYX	0:85b3fd62ea1a	3854	}
NYX	0:85b3fd62ea1a	3855	}
NYX	0:85b3fd62ea1a	3856	}
NYX	0:85b3fd62ea1a	3857	return HAL_OK;
NYX	0:85b3fd62ea1a	3858	}
NYX	0:85b3fd62ea1a	3859
NYX	0:85b3fd62ea1a	3860	/**
NYX	0:85b3fd62ea1a	3861	* @brief Handle BTF flag for Master transmitter
NYX	0:85b3fd62ea1a	3862	* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
NYX	0:85b3fd62ea1a	3863	* the configuration information for I2C module
NYX	0:85b3fd62ea1a	3864	* @retval HAL status
NYX	0:85b3fd62ea1a	3865	*/
NYX	0:85b3fd62ea1a	3866	static HAL_StatusTypeDef I2C_MasterTransmit_BTF(I2C_HandleTypeDef *hi2c)
NYX	0:85b3fd62ea1a	3867	{
NYX	0:85b3fd62ea1a	3868	/* Declaration of temporary variables to prevent undefined behavior of volatile usage */
NYX	0:85b3fd62ea1a	3869	uint32_t CurrentXferOptions = hi2c->XferOptions;
NYX	0:85b3fd62ea1a	3870
NYX	0:85b3fd62ea1a	3871	if(hi2c->State == HAL_I2C_STATE_BUSY_TX)
NYX	0:85b3fd62ea1a	3872	{
NYX	0:85b3fd62ea1a	3873	if(hi2c->XferCount != 0U)
NYX	0:85b3fd62ea1a	3874	{
NYX	0:85b3fd62ea1a	3875	/* Write data to DR */
NYX	0:85b3fd62ea1a	3876	hi2c->Instance->DR = (*hi2c->pBuffPtr++);
NYX	0:85b3fd62ea1a	3877	hi2c->XferCount--;
NYX	0:85b3fd62ea1a	3878	}
NYX	0:85b3fd62ea1a	3879	else
NYX	0:85b3fd62ea1a	3880	{
NYX	0:85b3fd62ea1a	3881	/* Call TxCpltCallback() directly if no stop mode is set */
NYX	0:85b3fd62ea1a	3882	if((CurrentXferOptions != I2C_FIRST_AND_LAST_FRAME) && (CurrentXferOptions != I2C_LAST_FRAME) && (CurrentXferOptions != I2C_NO_OPTION_FRAME))
NYX	0:85b3fd62ea1a	3883	{
NYX	0:85b3fd62ea1a	3884	__HAL_I2C_DISABLE_IT(hi2c, I2C_IT_EVT \| I2C_IT_BUF \| I2C_IT_ERR);
NYX	0:85b3fd62ea1a	3885
NYX	0:85b3fd62ea1a	3886	hi2c->PreviousState = I2C_STATE_MASTER_BUSY_TX;
NYX	0:85b3fd62ea1a	3887	hi2c->Mode = HAL_I2C_MODE_NONE;
NYX	0:85b3fd62ea1a	3888	hi2c->State = HAL_I2C_STATE_READY;
NYX	0:85b3fd62ea1a	3889
NYX	0:85b3fd62ea1a	3890	HAL_I2C_MasterTxCpltCallback(hi2c);
NYX	0:85b3fd62ea1a	3891	}
NYX	0:85b3fd62ea1a	3892	else /* Generate Stop condition then Call TxCpltCallback() */
NYX	0:85b3fd62ea1a	3893	{
NYX	0:85b3fd62ea1a	3894	/* Disable EVT, BUF and ERR interrupt */
NYX	0:85b3fd62ea1a	3895	__HAL_I2C_DISABLE_IT(hi2c, I2C_IT_EVT \| I2C_IT_BUF \| I2C_IT_ERR);
NYX	0:85b3fd62ea1a	3896
NYX	0:85b3fd62ea1a	3897	/* Generate Stop */
NYX	0:85b3fd62ea1a	3898	hi2c->Instance->CR1 \|= I2C_CR1_STOP;
NYX	0:85b3fd62ea1a	3899
NYX	0:85b3fd62ea1a	3900	hi2c->PreviousState = I2C_STATE_NONE;
NYX	0:85b3fd62ea1a	3901	hi2c->State = HAL_I2C_STATE_READY;
NYX	0:85b3fd62ea1a	3902
NYX	0:85b3fd62ea1a	3903	if(hi2c->Mode == HAL_I2C_MODE_MEM)
NYX	0:85b3fd62ea1a	3904	{
NYX	0:85b3fd62ea1a	3905	hi2c->Mode = HAL_I2C_MODE_NONE;
NYX	0:85b3fd62ea1a	3906
NYX	0:85b3fd62ea1a	3907	HAL_I2C_MemTxCpltCallback(hi2c);
NYX	0:85b3fd62ea1a	3908	}
NYX	0:85b3fd62ea1a	3909	else
NYX	0:85b3fd62ea1a	3910	{
NYX	0:85b3fd62ea1a	3911	hi2c->Mode = HAL_I2C_MODE_NONE;
NYX	0:85b3fd62ea1a	3912
NYX	0:85b3fd62ea1a	3913	HAL_I2C_MasterTxCpltCallback(hi2c);
NYX	0:85b3fd62ea1a	3914	}
NYX	0:85b3fd62ea1a	3915	}
NYX	0:85b3fd62ea1a	3916	}
NYX	0:85b3fd62ea1a	3917	}
NYX	0:85b3fd62ea1a	3918	return HAL_OK;
NYX	0:85b3fd62ea1a	3919	}
NYX	0:85b3fd62ea1a	3920
NYX	0:85b3fd62ea1a	3921	/**
NYX	0:85b3fd62ea1a	3922	* @brief Handle RXNE flag for Master
NYX	0:85b3fd62ea1a	3923	* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
NYX	0:85b3fd62ea1a	3924	* the configuration information for I2C module
NYX	0:85b3fd62ea1a	3925	* @retval HAL status
NYX	0:85b3fd62ea1a	3926	*/
NYX	0:85b3fd62ea1a	3927	static HAL_StatusTypeDef I2C_MasterReceive_RXNE(I2C_HandleTypeDef *hi2c)
NYX	0:85b3fd62ea1a	3928	{
NYX	0:85b3fd62ea1a	3929
NYX	0:85b3fd62ea1a	3930	if(hi2c->State == HAL_I2C_STATE_BUSY_RX)
NYX	0:85b3fd62ea1a	3931	{
NYX	0:85b3fd62ea1a	3932	uint32_t tmp = 0U;
NYX	0:85b3fd62ea1a	3933
NYX	0:85b3fd62ea1a	3934	tmp = hi2c->XferCount;
NYX	0:85b3fd62ea1a	3935	if(tmp > 3U)
NYX	0:85b3fd62ea1a	3936	{
NYX	0:85b3fd62ea1a	3937	/* Read data from DR */
NYX	0:85b3fd62ea1a	3938	(*hi2c->pBuffPtr++) = hi2c->Instance->DR;
NYX	0:85b3fd62ea1a	3939	hi2c->XferCount--;
NYX	0:85b3fd62ea1a	3940	}
NYX	0:85b3fd62ea1a	3941	else if((tmp == 2U) \|\| (tmp == 3U))
NYX	0:85b3fd62ea1a	3942	{
NYX	0:85b3fd62ea1a	3943	/* Disable Acknowledge */
NYX	0:85b3fd62ea1a	3944	hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
NYX	0:85b3fd62ea1a	3945
NYX	0:85b3fd62ea1a	3946	/* Enable Pos */
NYX	0:85b3fd62ea1a	3947	hi2c->Instance->CR1 \|= I2C_CR1_POS;
NYX	0:85b3fd62ea1a	3948
NYX	0:85b3fd62ea1a	3949	/* Disable BUF interrupt */
NYX	0:85b3fd62ea1a	3950	__HAL_I2C_DISABLE_IT(hi2c, I2C_IT_BUF);
NYX	0:85b3fd62ea1a	3951	}
NYX	0:85b3fd62ea1a	3952	else
NYX	0:85b3fd62ea1a	3953	{
NYX	0:85b3fd62ea1a	3954	/* Disable Acknowledge */
NYX	0:85b3fd62ea1a	3955	hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
NYX	0:85b3fd62ea1a	3956
NYX	0:85b3fd62ea1a	3957	if(hi2c->XferOptions == I2C_NEXT_FRAME)
NYX	0:85b3fd62ea1a	3958	{
NYX	0:85b3fd62ea1a	3959	/* Enable Pos */
NYX	0:85b3fd62ea1a	3960	hi2c->Instance->CR1 \|= I2C_CR1_POS;
NYX	0:85b3fd62ea1a	3961	}
NYX	0:85b3fd62ea1a	3962
NYX	0:85b3fd62ea1a	3963	/* Disable EVT, BUF and ERR interrupt */
NYX	0:85b3fd62ea1a	3964	__HAL_I2C_DISABLE_IT(hi2c, I2C_IT_EVT \| I2C_IT_BUF \| I2C_IT_ERR);
NYX	0:85b3fd62ea1a	3965
NYX	0:85b3fd62ea1a	3966	/* Read data from DR */
NYX	0:85b3fd62ea1a	3967	(*hi2c->pBuffPtr++) = hi2c->Instance->DR;
NYX	0:85b3fd62ea1a	3968	hi2c->XferCount--;
NYX	0:85b3fd62ea1a	3969
NYX	0:85b3fd62ea1a	3970	hi2c->State = HAL_I2C_STATE_READY;
NYX	0:85b3fd62ea1a	3971	hi2c->PreviousState = I2C_STATE_NONE;
NYX	0:85b3fd62ea1a	3972
NYX	0:85b3fd62ea1a	3973	if(hi2c->Mode == HAL_I2C_MODE_MEM)
NYX	0:85b3fd62ea1a	3974	{
NYX	0:85b3fd62ea1a	3975	hi2c->Mode = HAL_I2C_MODE_NONE;
NYX	0:85b3fd62ea1a	3976	HAL_I2C_MemRxCpltCallback(hi2c);
NYX	0:85b3fd62ea1a	3977	}
NYX	0:85b3fd62ea1a	3978	else
NYX	0:85b3fd62ea1a	3979	{
NYX	0:85b3fd62ea1a	3980	hi2c->Mode = HAL_I2C_MODE_NONE;
NYX	0:85b3fd62ea1a	3981	HAL_I2C_MasterRxCpltCallback(hi2c);
NYX	0:85b3fd62ea1a	3982	}
NYX	0:85b3fd62ea1a	3983	}
NYX	0:85b3fd62ea1a	3984	}
NYX	0:85b3fd62ea1a	3985	return HAL_OK;
NYX	0:85b3fd62ea1a	3986	}
NYX	0:85b3fd62ea1a	3987
NYX	0:85b3fd62ea1a	3988	/**
NYX	0:85b3fd62ea1a	3989	* @brief Handle BTF flag for Master receiver
NYX	0:85b3fd62ea1a	3990	* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
NYX	0:85b3fd62ea1a	3991	* the configuration information for I2C module
NYX	0:85b3fd62ea1a	3992	* @retval HAL status
NYX	0:85b3fd62ea1a	3993	*/
NYX	0:85b3fd62ea1a	3994	static HAL_StatusTypeDef I2C_MasterReceive_BTF(I2C_HandleTypeDef *hi2c)
NYX	0:85b3fd62ea1a	3995	{
NYX	0:85b3fd62ea1a	3996	/* Declaration of temporary variables to prevent undefined behavior of volatile usage */
NYX	0:85b3fd62ea1a	3997	uint32_t CurrentXferOptions = hi2c->XferOptions;
NYX	0:85b3fd62ea1a	3998
NYX	0:85b3fd62ea1a	3999	if(hi2c->XferCount == 3U)
NYX	0:85b3fd62ea1a	4000	{
NYX	0:85b3fd62ea1a	4001	if((CurrentXferOptions == I2C_FIRST_AND_LAST_FRAME) \|\| (CurrentXferOptions == I2C_LAST_FRAME) \|\| (CurrentXferOptions == I2C_NO_OPTION_FRAME))
NYX	0:85b3fd62ea1a	4002	{
NYX	0:85b3fd62ea1a	4003	/* Disable Acknowledge */
NYX	0:85b3fd62ea1a	4004	hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
NYX	0:85b3fd62ea1a	4005	}
NYX	0:85b3fd62ea1a	4006
NYX	0:85b3fd62ea1a	4007	/* Read data from DR */
NYX	0:85b3fd62ea1a	4008	(*hi2c->pBuffPtr++) = hi2c->Instance->DR;
NYX	0:85b3fd62ea1a	4009	hi2c->XferCount--;
NYX	0:85b3fd62ea1a	4010	}
NYX	0:85b3fd62ea1a	4011	else if(hi2c->XferCount == 2U)
NYX	0:85b3fd62ea1a	4012	{
NYX	0:85b3fd62ea1a	4013	/* Prepare next transfer or stop current transfer */
NYX	0:85b3fd62ea1a	4014	if((CurrentXferOptions != I2C_FIRST_AND_LAST_FRAME) && (CurrentXferOptions != I2C_LAST_FRAME) && (CurrentXferOptions != I2C_NO_OPTION_FRAME))
NYX	0:85b3fd62ea1a	4015	{
NYX	0:85b3fd62ea1a	4016	/* Disable Acknowledge */
NYX	0:85b3fd62ea1a	4017	hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
NYX	0:85b3fd62ea1a	4018
NYX	0:85b3fd62ea1a	4019	if((CurrentXferOptions == I2C_NEXT_FRAME) \|\| (CurrentXferOptions == I2C_FIRST_FRAME))
NYX	0:85b3fd62ea1a	4020	{
NYX	0:85b3fd62ea1a	4021	/* Generate ReStart */
NYX	0:85b3fd62ea1a	4022	hi2c->Instance->CR1 \|= I2C_CR1_START;
NYX	0:85b3fd62ea1a	4023	}
NYX	0:85b3fd62ea1a	4024	}
NYX	0:85b3fd62ea1a	4025	else
NYX	0:85b3fd62ea1a	4026	{
NYX	0:85b3fd62ea1a	4027	/* Generate Stop */
NYX	0:85b3fd62ea1a	4028	hi2c->Instance->CR1 \|= I2C_CR1_STOP;
NYX	0:85b3fd62ea1a	4029	}
NYX	0:85b3fd62ea1a	4030
NYX	0:85b3fd62ea1a	4031	/* Read data from DR */
NYX	0:85b3fd62ea1a	4032	(*hi2c->pBuffPtr++) = hi2c->Instance->DR;
NYX	0:85b3fd62ea1a	4033	hi2c->XferCount--;
NYX	0:85b3fd62ea1a	4034
NYX	0:85b3fd62ea1a	4035	/* Read data from DR */
NYX	0:85b3fd62ea1a	4036	(*hi2c->pBuffPtr++) = hi2c->Instance->DR;
NYX	0:85b3fd62ea1a	4037	hi2c->XferCount--;
NYX	0:85b3fd62ea1a	4038
NYX	0:85b3fd62ea1a	4039	/* Disable EVT and ERR interrupt */
NYX	0:85b3fd62ea1a	4040	__HAL_I2C_DISABLE_IT(hi2c, I2C_IT_EVT \| I2C_IT_ERR);
NYX	0:85b3fd62ea1a	4041
NYX	0:85b3fd62ea1a	4042	hi2c->State = HAL_I2C_STATE_READY;
NYX	0:85b3fd62ea1a	4043	hi2c->PreviousState = I2C_STATE_NONE;
NYX	0:85b3fd62ea1a	4044
NYX	0:85b3fd62ea1a	4045	if(hi2c->Mode == HAL_I2C_MODE_MEM)
NYX	0:85b3fd62ea1a	4046	{
NYX	0:85b3fd62ea1a	4047	hi2c->Mode = HAL_I2C_MODE_NONE;
NYX	0:85b3fd62ea1a	4048
NYX	0:85b3fd62ea1a	4049	HAL_I2C_MemRxCpltCallback(hi2c);
NYX	0:85b3fd62ea1a	4050	}
NYX	0:85b3fd62ea1a	4051	else
NYX	0:85b3fd62ea1a	4052	{
NYX	0:85b3fd62ea1a	4053	hi2c->Mode = HAL_I2C_MODE_NONE;
NYX	0:85b3fd62ea1a	4054
NYX	0:85b3fd62ea1a	4055	HAL_I2C_MasterRxCpltCallback(hi2c);
NYX	0:85b3fd62ea1a	4056	}
NYX	0:85b3fd62ea1a	4057	}
NYX	0:85b3fd62ea1a	4058	else
NYX	0:85b3fd62ea1a	4059	{
NYX	0:85b3fd62ea1a	4060	/* Read data from DR */
NYX	0:85b3fd62ea1a	4061	(*hi2c->pBuffPtr++) = hi2c->Instance->DR;
NYX	0:85b3fd62ea1a	4062	hi2c->XferCount--;
NYX	0:85b3fd62ea1a	4063	}
NYX	0:85b3fd62ea1a	4064	return HAL_OK;
NYX	0:85b3fd62ea1a	4065	}
NYX	0:85b3fd62ea1a	4066
NYX	0:85b3fd62ea1a	4067	/**
NYX	0:85b3fd62ea1a	4068	* @brief Handle SB flag for Master
NYX	0:85b3fd62ea1a	4069	* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
NYX	0:85b3fd62ea1a	4070	* the configuration information for I2C module
NYX	0:85b3fd62ea1a	4071	* @retval HAL status
NYX	0:85b3fd62ea1a	4072	*/
NYX	0:85b3fd62ea1a	4073	static HAL_StatusTypeDef I2C_Master_SB(I2C_HandleTypeDef *hi2c)
NYX	0:85b3fd62ea1a	4074	{
NYX	0:85b3fd62ea1a	4075	if(hi2c->Mode == HAL_I2C_MODE_MEM)
NYX	0:85b3fd62ea1a	4076	{
NYX	0:85b3fd62ea1a	4077	if(hi2c->EventCount == 0U)
NYX	0:85b3fd62ea1a	4078	{
NYX	0:85b3fd62ea1a	4079	/* Send slave address */
NYX	0:85b3fd62ea1a	4080	hi2c->Instance->DR = I2C_7BIT_ADD_WRITE(hi2c->Devaddress);
NYX	0:85b3fd62ea1a	4081	}
NYX	0:85b3fd62ea1a	4082	else
NYX	0:85b3fd62ea1a	4083	{
NYX	0:85b3fd62ea1a	4084	hi2c->Instance->DR = I2C_7BIT_ADD_READ(hi2c->Devaddress);
NYX	0:85b3fd62ea1a	4085	}
NYX	0:85b3fd62ea1a	4086	}
NYX	0:85b3fd62ea1a	4087	else
NYX	0:85b3fd62ea1a	4088	{
NYX	0:85b3fd62ea1a	4089	if(hi2c->Init.AddressingMode == I2C_ADDRESSINGMODE_7BIT)
NYX	0:85b3fd62ea1a	4090	{
NYX	0:85b3fd62ea1a	4091	/* Send slave 7 Bits address */
NYX	0:85b3fd62ea1a	4092	if(hi2c->State == HAL_I2C_STATE_BUSY_TX)
NYX	0:85b3fd62ea1a	4093	{
NYX	0:85b3fd62ea1a	4094	hi2c->Instance->DR = I2C_7BIT_ADD_WRITE(hi2c->Devaddress);
NYX	0:85b3fd62ea1a	4095	}
NYX	0:85b3fd62ea1a	4096	else
NYX	0:85b3fd62ea1a	4097	{
NYX	0:85b3fd62ea1a	4098	hi2c->Instance->DR = I2C_7BIT_ADD_READ(hi2c->Devaddress);
NYX	0:85b3fd62ea1a	4099	}
NYX	0:85b3fd62ea1a	4100	}
NYX	0:85b3fd62ea1a	4101	else
NYX	0:85b3fd62ea1a	4102	{
NYX	0:85b3fd62ea1a	4103	if(hi2c->EventCount == 0U)
NYX	0:85b3fd62ea1a	4104	{
NYX	0:85b3fd62ea1a	4105	/* Send header of slave address */
NYX	0:85b3fd62ea1a	4106	hi2c->Instance->DR = I2C_10BIT_HEADER_WRITE(hi2c->Devaddress);
NYX	0:85b3fd62ea1a	4107	}
NYX	0:85b3fd62ea1a	4108	else if(hi2c->EventCount == 1U)
NYX	0:85b3fd62ea1a	4109	{
NYX	0:85b3fd62ea1a	4110	/* Send header of slave address */
NYX	0:85b3fd62ea1a	4111	hi2c->Instance->DR = I2C_10BIT_HEADER_READ(hi2c->Devaddress);
NYX	0:85b3fd62ea1a	4112	}
NYX	0:85b3fd62ea1a	4113	}
NYX	0:85b3fd62ea1a	4114	}
NYX	0:85b3fd62ea1a	4115
NYX	0:85b3fd62ea1a	4116	return HAL_OK;
NYX	0:85b3fd62ea1a	4117	}
NYX	0:85b3fd62ea1a	4118
NYX	0:85b3fd62ea1a	4119	/**
NYX	0:85b3fd62ea1a	4120	* @brief Handle ADD10 flag for Master
NYX	0:85b3fd62ea1a	4121	* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
NYX	0:85b3fd62ea1a	4122	* the configuration information for I2C module
NYX	0:85b3fd62ea1a	4123	* @retval HAL status
NYX	0:85b3fd62ea1a	4124	*/
NYX	0:85b3fd62ea1a	4125	static HAL_StatusTypeDef I2C_Master_ADD10(I2C_HandleTypeDef *hi2c)
NYX	0:85b3fd62ea1a	4126	{
NYX	0:85b3fd62ea1a	4127	/* Send slave address */
NYX	0:85b3fd62ea1a	4128	hi2c->Instance->DR = I2C_10BIT_ADDRESS(hi2c->Devaddress);
NYX	0:85b3fd62ea1a	4129
NYX	0:85b3fd62ea1a	4130	return HAL_OK;
NYX	0:85b3fd62ea1a	4131	}
NYX	0:85b3fd62ea1a	4132
NYX	0:85b3fd62ea1a	4133	/**
NYX	0:85b3fd62ea1a	4134	* @brief Handle ADDR flag for Master
NYX	0:85b3fd62ea1a	4135	* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
NYX	0:85b3fd62ea1a	4136	* the configuration information for I2C module
NYX	0:85b3fd62ea1a	4137	* @retval HAL status
NYX	0:85b3fd62ea1a	4138	*/
NYX	0:85b3fd62ea1a	4139	static HAL_StatusTypeDef I2C_Master_ADDR(I2C_HandleTypeDef *hi2c)
NYX	0:85b3fd62ea1a	4140	{
NYX	0:85b3fd62ea1a	4141	/* Declaration of temporary variable to prevent undefined behavior of volatile usage */
NYX	0:85b3fd62ea1a	4142	uint32_t CurrentMode = hi2c->Mode;
NYX	0:85b3fd62ea1a	4143	uint32_t CurrentXferOptions = hi2c->XferOptions;
NYX	0:85b3fd62ea1a	4144	uint32_t Prev_State = hi2c->PreviousState;
NYX	0:85b3fd62ea1a	4145
NYX	0:85b3fd62ea1a	4146	if(hi2c->State == HAL_I2C_STATE_BUSY_RX)
NYX	0:85b3fd62ea1a	4147	{
NYX	0:85b3fd62ea1a	4148	if((hi2c->EventCount == 0U) && (CurrentMode == HAL_I2C_MODE_MEM))
NYX	0:85b3fd62ea1a	4149	{
NYX	0:85b3fd62ea1a	4150	/* Clear ADDR flag */
NYX	0:85b3fd62ea1a	4151	__HAL_I2C_CLEAR_ADDRFLAG(hi2c);
NYX	0:85b3fd62ea1a	4152	}
NYX	0:85b3fd62ea1a	4153	else if((hi2c->EventCount == 0U) && (hi2c->Init.AddressingMode == I2C_ADDRESSINGMODE_10BIT))
NYX	0:85b3fd62ea1a	4154	{
NYX	0:85b3fd62ea1a	4155	/* Clear ADDR flag */
NYX	0:85b3fd62ea1a	4156	__HAL_I2C_CLEAR_ADDRFLAG(hi2c);
NYX	0:85b3fd62ea1a	4157
NYX	0:85b3fd62ea1a	4158	/* Generate Restart */
NYX	0:85b3fd62ea1a	4159	hi2c->Instance->CR1 \|= I2C_CR1_START;
NYX	0:85b3fd62ea1a	4160
NYX	0:85b3fd62ea1a	4161	hi2c->EventCount++;
NYX	0:85b3fd62ea1a	4162	}
NYX	0:85b3fd62ea1a	4163	else
NYX	0:85b3fd62ea1a	4164	{
NYX	0:85b3fd62ea1a	4165	if(hi2c->XferCount == 0U)
NYX	0:85b3fd62ea1a	4166	{
NYX	0:85b3fd62ea1a	4167	/* Clear ADDR flag */
NYX	0:85b3fd62ea1a	4168	__HAL_I2C_CLEAR_ADDRFLAG(hi2c);
NYX	0:85b3fd62ea1a	4169
NYX	0:85b3fd62ea1a	4170	/* Generate Stop */
NYX	0:85b3fd62ea1a	4171	hi2c->Instance->CR1 \|= I2C_CR1_STOP;
NYX	0:85b3fd62ea1a	4172	}
NYX	0:85b3fd62ea1a	4173	else if(hi2c->XferCount == 1U)
NYX	0:85b3fd62ea1a	4174	{
NYX	0:85b3fd62ea1a	4175	if(CurrentXferOptions == I2C_NO_OPTION_FRAME)
NYX	0:85b3fd62ea1a	4176	{
NYX	0:85b3fd62ea1a	4177	/* Disable Acknowledge */
NYX	0:85b3fd62ea1a	4178	hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
NYX	0:85b3fd62ea1a	4179
NYX	0:85b3fd62ea1a	4180	if((hi2c->Instance->CR2 & I2C_CR2_DMAEN) == I2C_CR2_DMAEN)
NYX	0:85b3fd62ea1a	4181	{
NYX	0:85b3fd62ea1a	4182	/* Disable Acknowledge */
NYX	0:85b3fd62ea1a	4183	hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
NYX	0:85b3fd62ea1a	4184
NYX	0:85b3fd62ea1a	4185	/* Clear ADDR flag */
NYX	0:85b3fd62ea1a	4186	__HAL_I2C_CLEAR_ADDRFLAG(hi2c);
NYX	0:85b3fd62ea1a	4187	}
NYX	0:85b3fd62ea1a	4188	else
NYX	0:85b3fd62ea1a	4189	{
NYX	0:85b3fd62ea1a	4190	/* Clear ADDR flag */
NYX	0:85b3fd62ea1a	4191	__HAL_I2C_CLEAR_ADDRFLAG(hi2c);
NYX	0:85b3fd62ea1a	4192
NYX	0:85b3fd62ea1a	4193	/* Generate Stop */
NYX	0:85b3fd62ea1a	4194	hi2c->Instance->CR1 \|= I2C_CR1_STOP;
NYX	0:85b3fd62ea1a	4195	}
NYX	0:85b3fd62ea1a	4196	}
NYX	0:85b3fd62ea1a	4197	/* Prepare next transfer or stop current transfer */
NYX	0:85b3fd62ea1a	4198	else if((CurrentXferOptions != I2C_FIRST_AND_LAST_FRAME) && (CurrentXferOptions != I2C_LAST_FRAME) \
NYX	0:85b3fd62ea1a	4199	&& (Prev_State != I2C_STATE_MASTER_BUSY_RX))
NYX	0:85b3fd62ea1a	4200	{
NYX	0:85b3fd62ea1a	4201	if(hi2c->XferOptions != I2C_NEXT_FRAME)
NYX	0:85b3fd62ea1a	4202	{
NYX	0:85b3fd62ea1a	4203	/* Disable Acknowledge */
NYX	0:85b3fd62ea1a	4204	hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
NYX	0:85b3fd62ea1a	4205	}
NYX	0:85b3fd62ea1a	4206	else
NYX	0:85b3fd62ea1a	4207	{
NYX	0:85b3fd62ea1a	4208	/* Enable Acknowledge */
NYX	0:85b3fd62ea1a	4209	hi2c->Instance->CR1 \|= I2C_CR1_ACK;
NYX	0:85b3fd62ea1a	4210	}
NYX	0:85b3fd62ea1a	4211
NYX	0:85b3fd62ea1a	4212	/* Clear ADDR flag */
NYX	0:85b3fd62ea1a	4213	__HAL_I2C_CLEAR_ADDRFLAG(hi2c);
NYX	0:85b3fd62ea1a	4214	}
NYX	0:85b3fd62ea1a	4215	else
NYX	0:85b3fd62ea1a	4216	{
NYX	0:85b3fd62ea1a	4217	/* Disable Acknowledge */
NYX	0:85b3fd62ea1a	4218	hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
NYX	0:85b3fd62ea1a	4219
NYX	0:85b3fd62ea1a	4220	/* Clear ADDR flag */
NYX	0:85b3fd62ea1a	4221	__HAL_I2C_CLEAR_ADDRFLAG(hi2c);
NYX	0:85b3fd62ea1a	4222
NYX	0:85b3fd62ea1a	4223	/* Generate Stop */
NYX	0:85b3fd62ea1a	4224	hi2c->Instance->CR1 \|= I2C_CR1_STOP;
NYX	0:85b3fd62ea1a	4225	}
NYX	0:85b3fd62ea1a	4226	}
NYX	0:85b3fd62ea1a	4227	else if(hi2c->XferCount == 2U)
NYX	0:85b3fd62ea1a	4228	{
NYX	0:85b3fd62ea1a	4229	if(hi2c->XferOptions != I2C_NEXT_FRAME)
NYX	0:85b3fd62ea1a	4230	{
NYX	0:85b3fd62ea1a	4231	/* Disable Acknowledge */
NYX	0:85b3fd62ea1a	4232	hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
NYX	0:85b3fd62ea1a	4233
NYX	0:85b3fd62ea1a	4234	/* Enable Pos */
NYX	0:85b3fd62ea1a	4235	hi2c->Instance->CR1 \|= I2C_CR1_POS;
NYX	0:85b3fd62ea1a	4236	}
NYX	0:85b3fd62ea1a	4237	else
NYX	0:85b3fd62ea1a	4238	{
NYX	0:85b3fd62ea1a	4239	/* Enable Acknowledge */
NYX	0:85b3fd62ea1a	4240	hi2c->Instance->CR1 \|= I2C_CR1_ACK;
NYX	0:85b3fd62ea1a	4241	}
NYX	0:85b3fd62ea1a	4242
NYX	0:85b3fd62ea1a	4243	if((hi2c->Instance->CR2 & I2C_CR2_DMAEN) == I2C_CR2_DMAEN)
NYX	0:85b3fd62ea1a	4244	{
NYX	0:85b3fd62ea1a	4245	/* Enable Last DMA bit */
NYX	0:85b3fd62ea1a	4246	hi2c->Instance->CR2 \|= I2C_CR2_LAST;
NYX	0:85b3fd62ea1a	4247	}
NYX	0:85b3fd62ea1a	4248
NYX	0:85b3fd62ea1a	4249	/* Clear ADDR flag */
NYX	0:85b3fd62ea1a	4250	__HAL_I2C_CLEAR_ADDRFLAG(hi2c);
NYX	0:85b3fd62ea1a	4251	}
NYX	0:85b3fd62ea1a	4252	else
NYX	0:85b3fd62ea1a	4253	{
NYX	0:85b3fd62ea1a	4254	/* Enable Acknowledge */
NYX	0:85b3fd62ea1a	4255	hi2c->Instance->CR1 \|= I2C_CR1_ACK;
NYX	0:85b3fd62ea1a	4256
NYX	0:85b3fd62ea1a	4257	if((hi2c->Instance->CR2 & I2C_CR2_DMAEN) == I2C_CR2_DMAEN)
NYX	0:85b3fd62ea1a	4258	{
NYX	0:85b3fd62ea1a	4259	/* Enable Last DMA bit */
NYX	0:85b3fd62ea1a	4260	hi2c->Instance->CR2 \|= I2C_CR2_LAST;
NYX	0:85b3fd62ea1a	4261	}
NYX	0:85b3fd62ea1a	4262
NYX	0:85b3fd62ea1a	4263	/* Clear ADDR flag */
NYX	0:85b3fd62ea1a	4264	__HAL_I2C_CLEAR_ADDRFLAG(hi2c);
NYX	0:85b3fd62ea1a	4265	}
NYX	0:85b3fd62ea1a	4266
NYX	0:85b3fd62ea1a	4267	/* Reset Event counter */
NYX	0:85b3fd62ea1a	4268	hi2c->EventCount = 0U;
NYX	0:85b3fd62ea1a	4269	}
NYX	0:85b3fd62ea1a	4270	}
NYX	0:85b3fd62ea1a	4271	else
NYX	0:85b3fd62ea1a	4272	{
NYX	0:85b3fd62ea1a	4273	/* Clear ADDR flag */
NYX	0:85b3fd62ea1a	4274	__HAL_I2C_CLEAR_ADDRFLAG(hi2c);
NYX	0:85b3fd62ea1a	4275	}
NYX	0:85b3fd62ea1a	4276
NYX	0:85b3fd62ea1a	4277	return HAL_OK;
NYX	0:85b3fd62ea1a	4278	}
NYX	0:85b3fd62ea1a	4279
NYX	0:85b3fd62ea1a	4280	/**
NYX	0:85b3fd62ea1a	4281	* @brief Handle TXE flag for Slave
NYX	0:85b3fd62ea1a	4282	* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
NYX	0:85b3fd62ea1a	4283	* the configuration information for I2C module
NYX	0:85b3fd62ea1a	4284	* @retval HAL status
NYX	0:85b3fd62ea1a	4285	*/
NYX	0:85b3fd62ea1a	4286	static HAL_StatusTypeDef I2C_SlaveTransmit_TXE(I2C_HandleTypeDef *hi2c)
NYX	0:85b3fd62ea1a	4287	{
NYX	0:85b3fd62ea1a	4288	/* Declaration of temporary variables to prevent undefined behavior of volatile usage */
NYX	0:85b3fd62ea1a	4289	uint32_t CurrentState = hi2c->State;
NYX	0:85b3fd62ea1a	4290
NYX	0:85b3fd62ea1a	4291	if(hi2c->XferCount != 0U)
NYX	0:85b3fd62ea1a	4292	{
NYX	0:85b3fd62ea1a	4293	/* Write data to DR */
NYX	0:85b3fd62ea1a	4294	hi2c->Instance->DR = (*hi2c->pBuffPtr++);
NYX	0:85b3fd62ea1a	4295	hi2c->XferCount--;
NYX	0:85b3fd62ea1a	4296
NYX	0:85b3fd62ea1a	4297	if((hi2c->XferCount == 0U) && (CurrentState == HAL_I2C_STATE_BUSY_TX_LISTEN))
NYX	0:85b3fd62ea1a	4298	{
NYX	0:85b3fd62ea1a	4299	/* Last Byte is received, disable Interrupt */
NYX	0:85b3fd62ea1a	4300	__HAL_I2C_DISABLE_IT(hi2c, I2C_IT_BUF);
NYX	0:85b3fd62ea1a	4301
NYX	0:85b3fd62ea1a	4302	/* Set state at HAL_I2C_STATE_LISTEN */
NYX	0:85b3fd62ea1a	4303	hi2c->PreviousState = I2C_STATE_SLAVE_BUSY_TX;
NYX	0:85b3fd62ea1a	4304	hi2c->State = HAL_I2C_STATE_LISTEN;
NYX	0:85b3fd62ea1a	4305
NYX	0:85b3fd62ea1a	4306	/* Call the Tx complete callback to inform upper layer of the end of receive process */
NYX	0:85b3fd62ea1a	4307	HAL_I2C_SlaveTxCpltCallback(hi2c);
NYX	0:85b3fd62ea1a	4308	}
NYX	0:85b3fd62ea1a	4309	}
NYX	0:85b3fd62ea1a	4310	return HAL_OK;
NYX	0:85b3fd62ea1a	4311	}
NYX	0:85b3fd62ea1a	4312
NYX	0:85b3fd62ea1a	4313	/**
NYX	0:85b3fd62ea1a	4314	* @brief Handle BTF flag for Slave transmitter
NYX	0:85b3fd62ea1a	4315	* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
NYX	0:85b3fd62ea1a	4316	* the configuration information for I2C module
NYX	0:85b3fd62ea1a	4317	* @retval HAL status
NYX	0:85b3fd62ea1a	4318	*/
NYX	0:85b3fd62ea1a	4319	static HAL_StatusTypeDef I2C_SlaveTransmit_BTF(I2C_HandleTypeDef *hi2c)
NYX	0:85b3fd62ea1a	4320	{
NYX	0:85b3fd62ea1a	4321	if(hi2c->XferCount != 0U)
NYX	0:85b3fd62ea1a	4322	{
NYX	0:85b3fd62ea1a	4323	/* Write data to DR */
NYX	0:85b3fd62ea1a	4324	hi2c->Instance->DR = (*hi2c->pBuffPtr++);
NYX	0:85b3fd62ea1a	4325	hi2c->XferCount--;
NYX	0:85b3fd62ea1a	4326	}
NYX	0:85b3fd62ea1a	4327	return HAL_OK;
NYX	0:85b3fd62ea1a	4328	}
NYX	0:85b3fd62ea1a	4329
NYX	0:85b3fd62ea1a	4330	/**
NYX	0:85b3fd62ea1a	4331	* @brief Handle RXNE flag for Slave
NYX	0:85b3fd62ea1a	4332	* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
NYX	0:85b3fd62ea1a	4333	* the configuration information for I2C module
NYX	0:85b3fd62ea1a	4334	* @retval HAL status
NYX	0:85b3fd62ea1a	4335	*/
NYX	0:85b3fd62ea1a	4336	static HAL_StatusTypeDef I2C_SlaveReceive_RXNE(I2C_HandleTypeDef *hi2c)
NYX	0:85b3fd62ea1a	4337	{
NYX	0:85b3fd62ea1a	4338	/* Declaration of temporary variables to prevent undefined behavior of volatile usage */
NYX	0:85b3fd62ea1a	4339	uint32_t CurrentState = hi2c->State;
NYX	0:85b3fd62ea1a	4340
NYX	0:85b3fd62ea1a	4341	if(hi2c->XferCount != 0U)
NYX	0:85b3fd62ea1a	4342	{
NYX	0:85b3fd62ea1a	4343	/* Read data from DR */
NYX	0:85b3fd62ea1a	4344	(*hi2c->pBuffPtr++) = hi2c->Instance->DR;
NYX	0:85b3fd62ea1a	4345	hi2c->XferCount--;
NYX	0:85b3fd62ea1a	4346
NYX	0:85b3fd62ea1a	4347	if((hi2c->XferCount == 0U) && (CurrentState == HAL_I2C_STATE_BUSY_RX_LISTEN))
NYX	0:85b3fd62ea1a	4348	{
NYX	0:85b3fd62ea1a	4349	/* Last Byte is received, disable Interrupt */
NYX	0:85b3fd62ea1a	4350	__HAL_I2C_DISABLE_IT(hi2c, I2C_IT_BUF);
NYX	0:85b3fd62ea1a	4351
NYX	0:85b3fd62ea1a	4352	/* Set state at HAL_I2C_STATE_LISTEN */
NYX	0:85b3fd62ea1a	4353	hi2c->PreviousState = I2C_STATE_SLAVE_BUSY_RX;
NYX	0:85b3fd62ea1a	4354	hi2c->State = HAL_I2C_STATE_LISTEN;
NYX	0:85b3fd62ea1a	4355
NYX	0:85b3fd62ea1a	4356	/* Call the Rx complete callback to inform upper layer of the end of receive process */
NYX	0:85b3fd62ea1a	4357	HAL_I2C_SlaveRxCpltCallback(hi2c);
NYX	0:85b3fd62ea1a	4358	}
NYX	0:85b3fd62ea1a	4359	}
NYX	0:85b3fd62ea1a	4360	return HAL_OK;
NYX	0:85b3fd62ea1a	4361	}
NYX	0:85b3fd62ea1a	4362
NYX	0:85b3fd62ea1a	4363	/**
NYX	0:85b3fd62ea1a	4364	* @brief Handle BTF flag for Slave receiver
NYX	0:85b3fd62ea1a	4365	* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
NYX	0:85b3fd62ea1a	4366	* the configuration information for I2C module
NYX	0:85b3fd62ea1a	4367	* @retval HAL status
NYX	0:85b3fd62ea1a	4368	*/
NYX	0:85b3fd62ea1a	4369	static HAL_StatusTypeDef I2C_SlaveReceive_BTF(I2C_HandleTypeDef *hi2c)
NYX	0:85b3fd62ea1a	4370	{
NYX	0:85b3fd62ea1a	4371	if(hi2c->XferCount != 0U)
NYX	0:85b3fd62ea1a	4372	{
NYX	0:85b3fd62ea1a	4373	/* Read data from DR */
NYX	0:85b3fd62ea1a	4374	(*hi2c->pBuffPtr++) = hi2c->Instance->DR;
NYX	0:85b3fd62ea1a	4375	hi2c->XferCount--;
NYX	0:85b3fd62ea1a	4376	}
NYX	0:85b3fd62ea1a	4377	return HAL_OK;
NYX	0:85b3fd62ea1a	4378	}
NYX	0:85b3fd62ea1a	4379
NYX	0:85b3fd62ea1a	4380	/**
NYX	0:85b3fd62ea1a	4381	* @brief Handle ADD flag for Slave
NYX	0:85b3fd62ea1a	4382	* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
NYX	0:85b3fd62ea1a	4383	* the configuration information for I2C module
NYX	0:85b3fd62ea1a	4384	* @retval HAL status
NYX	0:85b3fd62ea1a	4385	*/
NYX	0:85b3fd62ea1a	4386	static HAL_StatusTypeDef I2C_Slave_ADDR(I2C_HandleTypeDef *hi2c)
NYX	0:85b3fd62ea1a	4387	{
NYX	0:85b3fd62ea1a	4388	uint8_t TransferDirection = I2C_DIRECTION_RECEIVE;
NYX	0:85b3fd62ea1a	4389	uint16_t SlaveAddrCode = 0U;
NYX	0:85b3fd62ea1a	4390
NYX	0:85b3fd62ea1a	4391	/* Transfer Direction requested by Master */
NYX	0:85b3fd62ea1a	4392	if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_TRA) == RESET)
NYX	0:85b3fd62ea1a	4393	{
NYX	0:85b3fd62ea1a	4394	TransferDirection = I2C_DIRECTION_TRANSMIT;
NYX	0:85b3fd62ea1a	4395	}
NYX	0:85b3fd62ea1a	4396
NYX	0:85b3fd62ea1a	4397	if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_DUALF) == RESET)
NYX	0:85b3fd62ea1a	4398	{
NYX	0:85b3fd62ea1a	4399	SlaveAddrCode = hi2c->Init.OwnAddress1;
NYX	0:85b3fd62ea1a	4400	}
NYX	0:85b3fd62ea1a	4401	else
NYX	0:85b3fd62ea1a	4402	{
NYX	0:85b3fd62ea1a	4403	SlaveAddrCode = hi2c->Init.OwnAddress2;
NYX	0:85b3fd62ea1a	4404	}
NYX	0:85b3fd62ea1a	4405
NYX	0:85b3fd62ea1a	4406	/* Call Slave Addr callback */
NYX	0:85b3fd62ea1a	4407	HAL_I2C_AddrCallback(hi2c, TransferDirection, SlaveAddrCode);
NYX	0:85b3fd62ea1a	4408
NYX	0:85b3fd62ea1a	4409	return HAL_OK;
NYX	0:85b3fd62ea1a	4410	}
NYX	0:85b3fd62ea1a	4411
NYX	0:85b3fd62ea1a	4412	/**
NYX	0:85b3fd62ea1a	4413	* @brief Handle STOPF flag for Slave
NYX	0:85b3fd62ea1a	4414	* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
NYX	0:85b3fd62ea1a	4415	* the configuration information for I2C module
NYX	0:85b3fd62ea1a	4416	* @retval HAL status
NYX	0:85b3fd62ea1a	4417	*/
NYX	0:85b3fd62ea1a	4418	static HAL_StatusTypeDef I2C_Slave_STOPF(I2C_HandleTypeDef *hi2c)
NYX	0:85b3fd62ea1a	4419	{
NYX	0:85b3fd62ea1a	4420	/* Declaration of temporary variable to prevent undefined behavior of volatile usage */
NYX	0:85b3fd62ea1a	4421	uint32_t CurrentState = hi2c->State;
NYX	0:85b3fd62ea1a	4422
NYX	0:85b3fd62ea1a	4423	/* Disable EVT, BUF and ERR interrupt */
NYX	0:85b3fd62ea1a	4424	__HAL_I2C_DISABLE_IT(hi2c, I2C_IT_EVT \| I2C_IT_BUF \| I2C_IT_ERR);
NYX	0:85b3fd62ea1a	4425
NYX	0:85b3fd62ea1a	4426	/* Clear STOPF flag */
NYX	0:85b3fd62ea1a	4427	__HAL_I2C_CLEAR_STOPFLAG(hi2c);
NYX	0:85b3fd62ea1a	4428
NYX	0:85b3fd62ea1a	4429	/* Disable Acknowledge */
NYX	0:85b3fd62ea1a	4430	hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
NYX	0:85b3fd62ea1a	4431
NYX	0:85b3fd62ea1a	4432	/* If a DMA is ongoing, Update handle size context */
NYX	0:85b3fd62ea1a	4433	if((hi2c->Instance->CR2 & I2C_CR2_DMAEN) == I2C_CR2_DMAEN)
NYX	0:85b3fd62ea1a	4434	{
NYX	0:85b3fd62ea1a	4435	if((hi2c->State == HAL_I2C_STATE_BUSY_RX) \|\| (hi2c->State == HAL_I2C_STATE_BUSY_RX_LISTEN))
NYX	0:85b3fd62ea1a	4436	{
NYX	0:85b3fd62ea1a	4437	hi2c->XferCount = __HAL_DMA_GET_COUNTER(hi2c->hdmarx);
NYX	0:85b3fd62ea1a	4438	}
NYX	0:85b3fd62ea1a	4439	else
NYX	0:85b3fd62ea1a	4440	{
NYX	0:85b3fd62ea1a	4441	hi2c->XferCount = __HAL_DMA_GET_COUNTER(hi2c->hdmatx);
NYX	0:85b3fd62ea1a	4442	}
NYX	0:85b3fd62ea1a	4443	}
NYX	0:85b3fd62ea1a	4444
NYX	0:85b3fd62ea1a	4445	/* All data are not transferred, so set error code accordingly */
NYX	0:85b3fd62ea1a	4446	if(hi2c->XferCount != 0U)
NYX	0:85b3fd62ea1a	4447	{
NYX	0:85b3fd62ea1a	4448	/* Store Last receive data if any */
NYX	0:85b3fd62ea1a	4449	if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BTF) == SET)
NYX	0:85b3fd62ea1a	4450	{
NYX	0:85b3fd62ea1a	4451	/* Read data from DR */
NYX	0:85b3fd62ea1a	4452	(*hi2c->pBuffPtr++) = hi2c->Instance->DR;
NYX	0:85b3fd62ea1a	4453	hi2c->XferCount--;
NYX	0:85b3fd62ea1a	4454	}
NYX	0:85b3fd62ea1a	4455
NYX	0:85b3fd62ea1a	4456	/* Store Last receive data if any */
NYX	0:85b3fd62ea1a	4457	if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_RXNE) == SET)
NYX	0:85b3fd62ea1a	4458	{
NYX	0:85b3fd62ea1a	4459	/* Read data from DR */
NYX	0:85b3fd62ea1a	4460	(*hi2c->pBuffPtr++) = hi2c->Instance->DR;
NYX	0:85b3fd62ea1a	4461	hi2c->XferCount--;
NYX	0:85b3fd62ea1a	4462	}
NYX	0:85b3fd62ea1a	4463
NYX	0:85b3fd62ea1a	4464	/* Set ErrorCode corresponding to a Non-Acknowledge */
NYX	0:85b3fd62ea1a	4465	hi2c->ErrorCode \|= HAL_I2C_ERROR_AF;
NYX	0:85b3fd62ea1a	4466	}
NYX	0:85b3fd62ea1a	4467
NYX	0:85b3fd62ea1a	4468	if(hi2c->ErrorCode != HAL_I2C_ERROR_NONE)
NYX	0:85b3fd62ea1a	4469	{
NYX	0:85b3fd62ea1a	4470	/* Call the corresponding callback to inform upper layer of End of Transfer */
NYX	0:85b3fd62ea1a	4471	I2C_ITError(hi2c);
NYX	0:85b3fd62ea1a	4472	}
NYX	0:85b3fd62ea1a	4473	else
NYX	0:85b3fd62ea1a	4474	{
NYX	0:85b3fd62ea1a	4475	if((CurrentState == HAL_I2C_STATE_LISTEN ) \|\| (CurrentState == HAL_I2C_STATE_BUSY_RX_LISTEN) \|\| \
NYX	0:85b3fd62ea1a	4476	(CurrentState == HAL_I2C_STATE_BUSY_TX_LISTEN))
NYX	0:85b3fd62ea1a	4477	{
NYX	0:85b3fd62ea1a	4478	hi2c->XferOptions = I2C_NO_OPTION_FRAME;
NYX	0:85b3fd62ea1a	4479	hi2c->PreviousState = I2C_STATE_NONE;
NYX	0:85b3fd62ea1a	4480	hi2c->State = HAL_I2C_STATE_READY;
NYX	0:85b3fd62ea1a	4481	hi2c->Mode = HAL_I2C_MODE_NONE;
NYX	0:85b3fd62ea1a	4482
NYX	0:85b3fd62ea1a	4483	/* Call the Listen Complete callback, to inform upper layer of the end of Listen usecase */
NYX	0:85b3fd62ea1a	4484	HAL_I2C_ListenCpltCallback(hi2c);
NYX	0:85b3fd62ea1a	4485	}
NYX	0:85b3fd62ea1a	4486	else
NYX	0:85b3fd62ea1a	4487	{
NYX	0:85b3fd62ea1a	4488	if((hi2c->PreviousState == I2C_STATE_SLAVE_BUSY_RX) \|\| (CurrentState == HAL_I2C_STATE_BUSY_RX))
NYX	0:85b3fd62ea1a	4489	{
NYX	0:85b3fd62ea1a	4490	hi2c->PreviousState = I2C_STATE_NONE;
NYX	0:85b3fd62ea1a	4491	hi2c->State = HAL_I2C_STATE_READY;
NYX	0:85b3fd62ea1a	4492	hi2c->Mode = HAL_I2C_MODE_NONE;
NYX	0:85b3fd62ea1a	4493
NYX	0:85b3fd62ea1a	4494	HAL_I2C_SlaveRxCpltCallback(hi2c);
NYX	0:85b3fd62ea1a	4495	}
NYX	0:85b3fd62ea1a	4496	}
NYX	0:85b3fd62ea1a	4497	}
NYX	0:85b3fd62ea1a	4498	return HAL_OK;
NYX	0:85b3fd62ea1a	4499	}
NYX	0:85b3fd62ea1a	4500
NYX	0:85b3fd62ea1a	4501	/**
NYX	0:85b3fd62ea1a	4502	* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
NYX	0:85b3fd62ea1a	4503	* the configuration information for I2C module
NYX	0:85b3fd62ea1a	4504	* @retval HAL status
NYX	0:85b3fd62ea1a	4505	*/
NYX	0:85b3fd62ea1a	4506	static HAL_StatusTypeDef I2C_Slave_AF(I2C_HandleTypeDef *hi2c)
NYX	0:85b3fd62ea1a	4507	{
NYX	0:85b3fd62ea1a	4508	/* Declaration of temporary variables to prevent undefined behavior of volatile usage */
NYX	0:85b3fd62ea1a	4509	uint32_t CurrentState = hi2c->State;
NYX	0:85b3fd62ea1a	4510	uint32_t CurrentXferOptions = hi2c->XferOptions;
NYX	0:85b3fd62ea1a	4511
NYX	0:85b3fd62ea1a	4512	if(((CurrentXferOptions == I2C_FIRST_AND_LAST_FRAME) \|\| (CurrentXferOptions == I2C_LAST_FRAME)) && \
NYX	0:85b3fd62ea1a	4513	(CurrentState == HAL_I2C_STATE_LISTEN))
NYX	0:85b3fd62ea1a	4514	{
NYX	0:85b3fd62ea1a	4515	hi2c->XferOptions = I2C_NO_OPTION_FRAME;
NYX	0:85b3fd62ea1a	4516
NYX	0:85b3fd62ea1a	4517	/* Disable EVT, BUF and ERR interrupt */
NYX	0:85b3fd62ea1a	4518	__HAL_I2C_DISABLE_IT(hi2c, I2C_IT_EVT \| I2C_IT_BUF \| I2C_IT_ERR);
NYX	0:85b3fd62ea1a	4519
NYX	0:85b3fd62ea1a	4520	/* Clear AF flag */
NYX	0:85b3fd62ea1a	4521	__HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF);
NYX	0:85b3fd62ea1a	4522
NYX	0:85b3fd62ea1a	4523	/* Disable Acknowledge */
NYX	0:85b3fd62ea1a	4524	hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
NYX	0:85b3fd62ea1a	4525
NYX	0:85b3fd62ea1a	4526	hi2c->PreviousState = I2C_STATE_NONE;
NYX	0:85b3fd62ea1a	4527	hi2c->State = HAL_I2C_STATE_READY;
NYX	0:85b3fd62ea1a	4528	hi2c->Mode = HAL_I2C_MODE_NONE;
NYX	0:85b3fd62ea1a	4529
NYX	0:85b3fd62ea1a	4530	/* Call the Listen Complete callback, to inform upper layer of the end of Listen usecase */
NYX	0:85b3fd62ea1a	4531	HAL_I2C_ListenCpltCallback(hi2c);
NYX	0:85b3fd62ea1a	4532	}
NYX	0:85b3fd62ea1a	4533	else if(CurrentState == HAL_I2C_STATE_BUSY_TX)
NYX	0:85b3fd62ea1a	4534	{
NYX	0:85b3fd62ea1a	4535	hi2c->XferOptions = I2C_NO_OPTION_FRAME;
NYX	0:85b3fd62ea1a	4536	hi2c->PreviousState = I2C_STATE_SLAVE_BUSY_TX;
NYX	0:85b3fd62ea1a	4537	hi2c->State = HAL_I2C_STATE_READY;
NYX	0:85b3fd62ea1a	4538	hi2c->Mode = HAL_I2C_MODE_NONE;
NYX	0:85b3fd62ea1a	4539
NYX	0:85b3fd62ea1a	4540	/* Disable EVT, BUF and ERR interrupt */
NYX	0:85b3fd62ea1a	4541	__HAL_I2C_DISABLE_IT(hi2c, I2C_IT_EVT \| I2C_IT_BUF \| I2C_IT_ERR);
NYX	0:85b3fd62ea1a	4542
NYX	0:85b3fd62ea1a	4543	/* Clear AF flag */
NYX	0:85b3fd62ea1a	4544	__HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF);
NYX	0:85b3fd62ea1a	4545
NYX	0:85b3fd62ea1a	4546	/* Disable Acknowledge */
NYX	0:85b3fd62ea1a	4547	hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
NYX	0:85b3fd62ea1a	4548
NYX	0:85b3fd62ea1a	4549	HAL_I2C_SlaveTxCpltCallback(hi2c);
NYX	0:85b3fd62ea1a	4550	}
NYX	0:85b3fd62ea1a	4551	else
NYX	0:85b3fd62ea1a	4552	{
NYX	0:85b3fd62ea1a	4553	/* Clear AF flag only */
NYX	0:85b3fd62ea1a	4554	/* State Listen, but XferOptions == FIRST or NEXT */
NYX	0:85b3fd62ea1a	4555	__HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF);
NYX	0:85b3fd62ea1a	4556	}
NYX	0:85b3fd62ea1a	4557
NYX	0:85b3fd62ea1a	4558	return HAL_OK;
NYX	0:85b3fd62ea1a	4559	}
NYX	0:85b3fd62ea1a	4560
NYX	0:85b3fd62ea1a	4561	/**
NYX	0:85b3fd62ea1a	4562	* @brief I2C interrupts error process
NYX	0:85b3fd62ea1a	4563	* @param hi2c I2C handle.
NYX	0:85b3fd62ea1a	4564	* @retval None
NYX	0:85b3fd62ea1a	4565	*/
NYX	0:85b3fd62ea1a	4566	static void I2C_ITError(I2C_HandleTypeDef *hi2c)
NYX	0:85b3fd62ea1a	4567	{
NYX	0:85b3fd62ea1a	4568	/* Declaration of temporary variable to prevent undefined behavior of volatile usage */
NYX	0:85b3fd62ea1a	4569	uint32_t CurrentState = hi2c->State;
NYX	0:85b3fd62ea1a	4570
NYX	0:85b3fd62ea1a	4571	if((CurrentState == HAL_I2C_STATE_BUSY_TX_LISTEN) \|\| (CurrentState == HAL_I2C_STATE_BUSY_RX_LISTEN))
NYX	0:85b3fd62ea1a	4572	{
NYX	0:85b3fd62ea1a	4573	/* keep HAL_I2C_STATE_LISTEN */
NYX	0:85b3fd62ea1a	4574	hi2c->PreviousState = I2C_STATE_NONE;
NYX	0:85b3fd62ea1a	4575	hi2c->State = HAL_I2C_STATE_LISTEN;
NYX	0:85b3fd62ea1a	4576	}
NYX	0:85b3fd62ea1a	4577	else
NYX	0:85b3fd62ea1a	4578	{
NYX	0:85b3fd62ea1a	4579	/* If state is an abort treatment on going, don't change state */
NYX	0:85b3fd62ea1a	4580	/* This change will be do later */
NYX	0:85b3fd62ea1a	4581	if((hi2c->State != HAL_I2C_STATE_ABORT) && ((hi2c->Instance->CR2 & I2C_CR2_DMAEN) != I2C_CR2_DMAEN))
NYX	0:85b3fd62ea1a	4582	{
NYX	0:85b3fd62ea1a	4583	hi2c->State = HAL_I2C_STATE_READY;
NYX	0:85b3fd62ea1a	4584	}
NYX	0:85b3fd62ea1a	4585	hi2c->PreviousState = I2C_STATE_NONE;
NYX	0:85b3fd62ea1a	4586	hi2c->Mode = HAL_I2C_MODE_NONE;
NYX	0:85b3fd62ea1a	4587	}
NYX	0:85b3fd62ea1a	4588
NYX	0:85b3fd62ea1a	4589	/* Disable Pos bit in I2C CR1 when error occurred in Master/Mem Receive IT Process */
NYX	0:85b3fd62ea1a	4590	hi2c->Instance->CR1 &= ~I2C_CR1_POS;
NYX	0:85b3fd62ea1a	4591
NYX	0:85b3fd62ea1a	4592	/* Abort DMA transfer */
NYX	0:85b3fd62ea1a	4593	if((hi2c->Instance->CR2 & I2C_CR2_DMAEN) == I2C_CR2_DMAEN)
NYX	0:85b3fd62ea1a	4594	{
NYX	0:85b3fd62ea1a	4595	hi2c->Instance->CR2 &= ~I2C_CR2_DMAEN;
NYX	0:85b3fd62ea1a	4596
NYX	0:85b3fd62ea1a	4597	if(hi2c->hdmatx->State != HAL_DMA_STATE_READY)
NYX	0:85b3fd62ea1a	4598	{
NYX	0:85b3fd62ea1a	4599	/* Set the DMA Abort callback :
NYX	0:85b3fd62ea1a	4600	will lead to call HAL_I2C_ErrorCallback() at end of DMA abort procedure */
NYX	0:85b3fd62ea1a	4601	hi2c->hdmatx->XferAbortCallback = I2C_DMAAbort;
NYX	0:85b3fd62ea1a	4602
NYX	0:85b3fd62ea1a	4603	if(HAL_DMA_Abort_IT(hi2c->hdmatx) != HAL_OK)
NYX	0:85b3fd62ea1a	4604	{
NYX	0:85b3fd62ea1a	4605	/* Disable I2C peripheral to prevent dummy data in buffer */
NYX	0:85b3fd62ea1a	4606	__HAL_I2C_DISABLE(hi2c);
NYX	0:85b3fd62ea1a	4607
NYX	0:85b3fd62ea1a	4608	hi2c->State = HAL_I2C_STATE_READY;
NYX	0:85b3fd62ea1a	4609
NYX	0:85b3fd62ea1a	4610	/* Call Directly XferAbortCallback function in case of error */
NYX	0:85b3fd62ea1a	4611	hi2c->hdmatx->XferAbortCallback(hi2c->hdmatx);
NYX	0:85b3fd62ea1a	4612	}
NYX	0:85b3fd62ea1a	4613	}
NYX	0:85b3fd62ea1a	4614	else
NYX	0:85b3fd62ea1a	4615	{
NYX	0:85b3fd62ea1a	4616	/* Set the DMA Abort callback :
NYX	0:85b3fd62ea1a	4617	will lead to call HAL_I2C_ErrorCallback() at end of DMA abort procedure */
NYX	0:85b3fd62ea1a	4618	hi2c->hdmarx->XferAbortCallback = I2C_DMAAbort;
NYX	0:85b3fd62ea1a	4619
NYX	0:85b3fd62ea1a	4620	if(HAL_DMA_Abort_IT(hi2c->hdmarx) != HAL_OK)
NYX	0:85b3fd62ea1a	4621	{
NYX	0:85b3fd62ea1a	4622	/* Store Last receive data if any */
NYX	0:85b3fd62ea1a	4623	if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_RXNE) == SET)
NYX	0:85b3fd62ea1a	4624	{
NYX	0:85b3fd62ea1a	4625	/* Read data from DR */
NYX	0:85b3fd62ea1a	4626	(*hi2c->pBuffPtr++) = hi2c->Instance->DR;
NYX	0:85b3fd62ea1a	4627	}
NYX	0:85b3fd62ea1a	4628
NYX	0:85b3fd62ea1a	4629	/* Disable I2C peripheral to prevent dummy data in buffer */
NYX	0:85b3fd62ea1a	4630	__HAL_I2C_DISABLE(hi2c);
NYX	0:85b3fd62ea1a	4631
NYX	0:85b3fd62ea1a	4632	hi2c->State = HAL_I2C_STATE_READY;
NYX	0:85b3fd62ea1a	4633
NYX	0:85b3fd62ea1a	4634	/* Call Directly hi2c->hdmarx->XferAbortCallback function in case of error */
NYX	0:85b3fd62ea1a	4635	hi2c->hdmarx->XferAbortCallback(hi2c->hdmarx);
NYX	0:85b3fd62ea1a	4636	}
NYX	0:85b3fd62ea1a	4637	}
NYX	0:85b3fd62ea1a	4638	}
NYX	0:85b3fd62ea1a	4639	else if(hi2c->State == HAL_I2C_STATE_ABORT)
NYX	0:85b3fd62ea1a	4640	{
NYX	0:85b3fd62ea1a	4641	hi2c->State = HAL_I2C_STATE_READY;
NYX	0:85b3fd62ea1a	4642	hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
NYX	0:85b3fd62ea1a	4643
NYX	0:85b3fd62ea1a	4644	/* Store Last receive data if any */
NYX	0:85b3fd62ea1a	4645	if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_RXNE) == SET)
NYX	0:85b3fd62ea1a	4646	{
NYX	0:85b3fd62ea1a	4647	/* Read data from DR */
NYX	0:85b3fd62ea1a	4648	(*hi2c->pBuffPtr++) = hi2c->Instance->DR;
NYX	0:85b3fd62ea1a	4649	}
NYX	0:85b3fd62ea1a	4650
NYX	0:85b3fd62ea1a	4651	/* Disable I2C peripheral to prevent dummy data in buffer */
NYX	0:85b3fd62ea1a	4652	__HAL_I2C_DISABLE(hi2c);
NYX	0:85b3fd62ea1a	4653
NYX	0:85b3fd62ea1a	4654	/* Call the corresponding callback to inform upper layer of End of Transfer */
NYX	0:85b3fd62ea1a	4655	HAL_I2C_AbortCpltCallback(hi2c);
NYX	0:85b3fd62ea1a	4656	}
NYX	0:85b3fd62ea1a	4657	else
NYX	0:85b3fd62ea1a	4658	{
NYX	0:85b3fd62ea1a	4659	/* Store Last receive data if any */
NYX	0:85b3fd62ea1a	4660	if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_RXNE) == SET)
NYX	0:85b3fd62ea1a	4661	{
NYX	0:85b3fd62ea1a	4662	/* Read data from DR */
NYX	0:85b3fd62ea1a	4663	(*hi2c->pBuffPtr++) = hi2c->Instance->DR;
NYX	0:85b3fd62ea1a	4664	}
NYX	0:85b3fd62ea1a	4665
NYX	0:85b3fd62ea1a	4666	/* Call user error callback */
NYX	0:85b3fd62ea1a	4667	HAL_I2C_ErrorCallback(hi2c);
NYX	0:85b3fd62ea1a	4668	}
NYX	0:85b3fd62ea1a	4669	/* STOP Flag is not set after a NACK reception */
NYX	0:85b3fd62ea1a	4670	/* So may inform upper layer that listen phase is stopped */
NYX	0:85b3fd62ea1a	4671	/* during NACK error treatment */
NYX	0:85b3fd62ea1a	4672	if((hi2c->State == HAL_I2C_STATE_LISTEN) && ((hi2c->ErrorCode & HAL_I2C_ERROR_AF) == HAL_I2C_ERROR_AF))
NYX	0:85b3fd62ea1a	4673	{
NYX	0:85b3fd62ea1a	4674	hi2c->XferOptions = I2C_NO_OPTION_FRAME;
NYX	0:85b3fd62ea1a	4675	hi2c->PreviousState = I2C_STATE_NONE;
NYX	0:85b3fd62ea1a	4676	hi2c->State = HAL_I2C_STATE_READY;
NYX	0:85b3fd62ea1a	4677	hi2c->Mode = HAL_I2C_MODE_NONE;
NYX	0:85b3fd62ea1a	4678
NYX	0:85b3fd62ea1a	4679	/* Call the Listen Complete callback, to inform upper layer of the end of Listen usecase */
NYX	0:85b3fd62ea1a	4680	HAL_I2C_ListenCpltCallback(hi2c);
NYX	0:85b3fd62ea1a	4681	}
NYX	0:85b3fd62ea1a	4682	}
NYX	0:85b3fd62ea1a	4683
NYX	0:85b3fd62ea1a	4684	/**
NYX	0:85b3fd62ea1a	4685	* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
NYX	0:85b3fd62ea1a	4686	* the configuration information for I2C module
NYX	0:85b3fd62ea1a	4687	* @param DevAddress Target device address: The device 7 bits address value
NYX	0:85b3fd62ea1a	4688	* in datasheet must be shift at right before call interface
NYX	0:85b3fd62ea1a	4689	* @param Timeout Timeout duration
NYX	0:85b3fd62ea1a	4690	* @param Tickstart Tick start value
NYX	0:85b3fd62ea1a	4691	* @retval HAL status
NYX	0:85b3fd62ea1a	4692	*/
NYX	0:85b3fd62ea1a	4693	static HAL_StatusTypeDef I2C_MasterRequestWrite(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint32_t Timeout, uint32_t Tickstart)
NYX	0:85b3fd62ea1a	4694	{
NYX	0:85b3fd62ea1a	4695	/* Declaration of temporary variable to prevent undefined behavior of volatile usage */
NYX	0:85b3fd62ea1a	4696	uint32_t CurrentXferOptions = hi2c->XferOptions;
NYX	0:85b3fd62ea1a	4697
NYX	0:85b3fd62ea1a	4698	/* Generate Start condition if first transfer */
NYX	0:85b3fd62ea1a	4699	if((CurrentXferOptions == I2C_FIRST_AND_LAST_FRAME) \|\| (CurrentXferOptions == I2C_FIRST_FRAME) \|\| (CurrentXferOptions == I2C_NO_OPTION_FRAME))
NYX	0:85b3fd62ea1a	4700	{
NYX	0:85b3fd62ea1a	4701	/* Generate Start */
NYX	0:85b3fd62ea1a	4702	hi2c->Instance->CR1 \|= I2C_CR1_START;
NYX	0:85b3fd62ea1a	4703	}
NYX	0:85b3fd62ea1a	4704	else if(hi2c->PreviousState == I2C_STATE_MASTER_BUSY_RX)
NYX	0:85b3fd62ea1a	4705	{
NYX	0:85b3fd62ea1a	4706	/* Generate ReStart */
NYX	0:85b3fd62ea1a	4707	hi2c->Instance->CR1 \|= I2C_CR1_START;
NYX	0:85b3fd62ea1a	4708	}
NYX	0:85b3fd62ea1a	4709
NYX	0:85b3fd62ea1a	4710	/* Wait until SB flag is set */
NYX	0:85b3fd62ea1a	4711	if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_SB, RESET, Timeout, Tickstart) != HAL_OK)
NYX	0:85b3fd62ea1a	4712	{
NYX	0:85b3fd62ea1a	4713	return HAL_TIMEOUT;
NYX	0:85b3fd62ea1a	4714	}
NYX	0:85b3fd62ea1a	4715
NYX	0:85b3fd62ea1a	4716	if(hi2c->Init.AddressingMode == I2C_ADDRESSINGMODE_7BIT)
NYX	0:85b3fd62ea1a	4717	{
NYX	0:85b3fd62ea1a	4718	/* Send slave address */
NYX	0:85b3fd62ea1a	4719	hi2c->Instance->DR = I2C_7BIT_ADD_WRITE(DevAddress);
NYX	0:85b3fd62ea1a	4720	}
NYX	0:85b3fd62ea1a	4721	else
NYX	0:85b3fd62ea1a	4722	{
NYX	0:85b3fd62ea1a	4723	/* Send header of slave address */
NYX	0:85b3fd62ea1a	4724	hi2c->Instance->DR = I2C_10BIT_HEADER_WRITE(DevAddress);
NYX	0:85b3fd62ea1a	4725
NYX	0:85b3fd62ea1a	4726	/* Wait until ADD10 flag is set */
NYX	0:85b3fd62ea1a	4727	if(I2C_WaitOnMasterAddressFlagUntilTimeout(hi2c, I2C_FLAG_ADD10, Timeout, Tickstart) != HAL_OK)
NYX	0:85b3fd62ea1a	4728	{
NYX	0:85b3fd62ea1a	4729	if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
NYX	0:85b3fd62ea1a	4730	{
NYX	0:85b3fd62ea1a	4731	return HAL_ERROR;
NYX	0:85b3fd62ea1a	4732	}
NYX	0:85b3fd62ea1a	4733	else
NYX	0:85b3fd62ea1a	4734	{
NYX	0:85b3fd62ea1a	4735	return HAL_TIMEOUT;
NYX	0:85b3fd62ea1a	4736	}
NYX	0:85b3fd62ea1a	4737	}
NYX	0:85b3fd62ea1a	4738
NYX	0:85b3fd62ea1a	4739	/* Send slave address */
NYX	0:85b3fd62ea1a	4740	hi2c->Instance->DR = I2C_10BIT_ADDRESS(DevAddress);
NYX	0:85b3fd62ea1a	4741	}
NYX	0:85b3fd62ea1a	4742
NYX	0:85b3fd62ea1a	4743	/* Wait until ADDR flag is set */
NYX	0:85b3fd62ea1a	4744	if(I2C_WaitOnMasterAddressFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, Timeout, Tickstart) != HAL_OK)
NYX	0:85b3fd62ea1a	4745	{
NYX	0:85b3fd62ea1a	4746	if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
NYX	0:85b3fd62ea1a	4747	{
NYX	0:85b3fd62ea1a	4748	return HAL_ERROR;
NYX	0:85b3fd62ea1a	4749	}
NYX	0:85b3fd62ea1a	4750	else
NYX	0:85b3fd62ea1a	4751	{
NYX	0:85b3fd62ea1a	4752	return HAL_TIMEOUT;
NYX	0:85b3fd62ea1a	4753	}
NYX	0:85b3fd62ea1a	4754	}
NYX	0:85b3fd62ea1a	4755
NYX	0:85b3fd62ea1a	4756	return HAL_OK;
NYX	0:85b3fd62ea1a	4757	}
NYX	0:85b3fd62ea1a	4758
NYX	0:85b3fd62ea1a	4759	/**
NYX	0:85b3fd62ea1a	4760	* @brief Master sends target device address for read request.
NYX	0:85b3fd62ea1a	4761	* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
NYX	0:85b3fd62ea1a	4762	* the configuration information for I2C module
NYX	0:85b3fd62ea1a	4763	* @param DevAddress Target device address: The device 7 bits address value
NYX	0:85b3fd62ea1a	4764	* in datasheet must be shift at right before call interface
NYX	0:85b3fd62ea1a	4765	* @param Timeout Timeout duration
NYX	0:85b3fd62ea1a	4766	* @param Tickstart Tick start value
NYX	0:85b3fd62ea1a	4767	* @retval HAL status
NYX	0:85b3fd62ea1a	4768	*/
NYX	0:85b3fd62ea1a	4769	static HAL_StatusTypeDef I2C_MasterRequestRead(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint32_t Timeout, uint32_t Tickstart)
NYX	0:85b3fd62ea1a	4770	{
NYX	0:85b3fd62ea1a	4771	/* Declaration of temporary variable to prevent undefined behavior of volatile usage */
NYX	0:85b3fd62ea1a	4772	uint32_t CurrentXferOptions = hi2c->XferOptions;
NYX	0:85b3fd62ea1a	4773
NYX	0:85b3fd62ea1a	4774	/* Enable Acknowledge */
NYX	0:85b3fd62ea1a	4775	hi2c->Instance->CR1 \|= I2C_CR1_ACK;
NYX	0:85b3fd62ea1a	4776
NYX	0:85b3fd62ea1a	4777	/* Generate Start condition if first transfer */
NYX	0:85b3fd62ea1a	4778	if((CurrentXferOptions == I2C_FIRST_AND_LAST_FRAME) \|\| (CurrentXferOptions == I2C_FIRST_FRAME) \|\| (CurrentXferOptions == I2C_NO_OPTION_FRAME))
NYX	0:85b3fd62ea1a	4779	{
NYX	0:85b3fd62ea1a	4780	/* Generate Start */
NYX	0:85b3fd62ea1a	4781	hi2c->Instance->CR1 \|= I2C_CR1_START;
NYX	0:85b3fd62ea1a	4782	}
NYX	0:85b3fd62ea1a	4783	else if(hi2c->PreviousState == I2C_STATE_MASTER_BUSY_TX)
NYX	0:85b3fd62ea1a	4784	{
NYX	0:85b3fd62ea1a	4785	/* Generate ReStart */
NYX	0:85b3fd62ea1a	4786	hi2c->Instance->CR1 \|= I2C_CR1_START;
NYX	0:85b3fd62ea1a	4787	}
NYX	0:85b3fd62ea1a	4788
NYX	0:85b3fd62ea1a	4789	/* Wait until SB flag is set */
NYX	0:85b3fd62ea1a	4790	if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_SB, RESET, Timeout, Tickstart) != HAL_OK)
NYX	0:85b3fd62ea1a	4791	{
NYX	0:85b3fd62ea1a	4792	return HAL_TIMEOUT;
NYX	0:85b3fd62ea1a	4793	}
NYX	0:85b3fd62ea1a	4794
NYX	0:85b3fd62ea1a	4795	if(hi2c->Init.AddressingMode == I2C_ADDRESSINGMODE_7BIT)
NYX	0:85b3fd62ea1a	4796	{
NYX	0:85b3fd62ea1a	4797	/* Send slave address */
NYX	0:85b3fd62ea1a	4798	hi2c->Instance->DR = I2C_7BIT_ADD_READ(DevAddress);
NYX	0:85b3fd62ea1a	4799	}
NYX	0:85b3fd62ea1a	4800	else
NYX	0:85b3fd62ea1a	4801	{
NYX	0:85b3fd62ea1a	4802	/* Send header of slave address */
NYX	0:85b3fd62ea1a	4803	hi2c->Instance->DR = I2C_10BIT_HEADER_WRITE(DevAddress);
NYX	0:85b3fd62ea1a	4804
NYX	0:85b3fd62ea1a	4805	/* Wait until ADD10 flag is set */
NYX	0:85b3fd62ea1a	4806	if(I2C_WaitOnMasterAddressFlagUntilTimeout(hi2c, I2C_FLAG_ADD10, Timeout, Tickstart) != HAL_OK)
NYX	0:85b3fd62ea1a	4807	{
NYX	0:85b3fd62ea1a	4808	if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
NYX	0:85b3fd62ea1a	4809	{
NYX	0:85b3fd62ea1a	4810	return HAL_ERROR;
NYX	0:85b3fd62ea1a	4811	}
NYX	0:85b3fd62ea1a	4812	else
NYX	0:85b3fd62ea1a	4813	{
NYX	0:85b3fd62ea1a	4814	return HAL_TIMEOUT;
NYX	0:85b3fd62ea1a	4815	}
NYX	0:85b3fd62ea1a	4816	}
NYX	0:85b3fd62ea1a	4817
NYX	0:85b3fd62ea1a	4818	/* Send slave address */
NYX	0:85b3fd62ea1a	4819	hi2c->Instance->DR = I2C_10BIT_ADDRESS(DevAddress);
NYX	0:85b3fd62ea1a	4820
NYX	0:85b3fd62ea1a	4821	/* Wait until ADDR flag is set */
NYX	0:85b3fd62ea1a	4822	if(I2C_WaitOnMasterAddressFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, Timeout, Tickstart) != HAL_OK)
NYX	0:85b3fd62ea1a	4823	{
NYX	0:85b3fd62ea1a	4824	if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
NYX	0:85b3fd62ea1a	4825	{
NYX	0:85b3fd62ea1a	4826	return HAL_ERROR;
NYX	0:85b3fd62ea1a	4827	}
NYX	0:85b3fd62ea1a	4828	else
NYX	0:85b3fd62ea1a	4829	{
NYX	0:85b3fd62ea1a	4830	return HAL_TIMEOUT;
NYX	0:85b3fd62ea1a	4831	}
NYX	0:85b3fd62ea1a	4832	}
NYX	0:85b3fd62ea1a	4833
NYX	0:85b3fd62ea1a	4834	/* Clear ADDR flag */
NYX	0:85b3fd62ea1a	4835	__HAL_I2C_CLEAR_ADDRFLAG(hi2c);
NYX	0:85b3fd62ea1a	4836
NYX	0:85b3fd62ea1a	4837	/* Generate Restart */
NYX	0:85b3fd62ea1a	4838	hi2c->Instance->CR1 \|= I2C_CR1_START;
NYX	0:85b3fd62ea1a	4839
NYX	0:85b3fd62ea1a	4840	/* Wait until SB flag is set */
NYX	0:85b3fd62ea1a	4841	if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_SB, RESET, Timeout, Tickstart) != HAL_OK)
NYX	0:85b3fd62ea1a	4842	{
NYX	0:85b3fd62ea1a	4843	return HAL_TIMEOUT;
NYX	0:85b3fd62ea1a	4844	}
NYX	0:85b3fd62ea1a	4845
NYX	0:85b3fd62ea1a	4846	/* Send header of slave address */
NYX	0:85b3fd62ea1a	4847	hi2c->Instance->DR = I2C_10BIT_HEADER_READ(DevAddress);
NYX	0:85b3fd62ea1a	4848	}
NYX	0:85b3fd62ea1a	4849
NYX	0:85b3fd62ea1a	4850	/* Wait until ADDR flag is set */
NYX	0:85b3fd62ea1a	4851	if(I2C_WaitOnMasterAddressFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, Timeout, Tickstart) != HAL_OK)
NYX	0:85b3fd62ea1a	4852	{
NYX	0:85b3fd62ea1a	4853	if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
NYX	0:85b3fd62ea1a	4854	{
NYX	0:85b3fd62ea1a	4855	return HAL_ERROR;
NYX	0:85b3fd62ea1a	4856	}
NYX	0:85b3fd62ea1a	4857	else
NYX	0:85b3fd62ea1a	4858	{
NYX	0:85b3fd62ea1a	4859	return HAL_TIMEOUT;
NYX	0:85b3fd62ea1a	4860	}
NYX	0:85b3fd62ea1a	4861	}
NYX	0:85b3fd62ea1a	4862
NYX	0:85b3fd62ea1a	4863	return HAL_OK;
NYX	0:85b3fd62ea1a	4864	}
NYX	0:85b3fd62ea1a	4865
NYX	0:85b3fd62ea1a	4866	/**
NYX	0:85b3fd62ea1a	4867	* @brief Master sends target device address followed by internal memory address for write request.
NYX	0:85b3fd62ea1a	4868	* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
NYX	0:85b3fd62ea1a	4869	* the configuration information for I2C module
NYX	0:85b3fd62ea1a	4870	* @param DevAddress Target device address
NYX	0:85b3fd62ea1a	4871	* @param MemAddress Internal memory address
NYX	0:85b3fd62ea1a	4872	* @param MemAddSize Size of internal memory address
NYX	0:85b3fd62ea1a	4873	* @param Timeout Timeout duration
NYX	0:85b3fd62ea1a	4874	* @param Tickstart Tick start value
NYX	0:85b3fd62ea1a	4875	* @retval HAL status
NYX	0:85b3fd62ea1a	4876	*/
NYX	0:85b3fd62ea1a	4877	static HAL_StatusTypeDef I2C_RequestMemoryWrite(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint32_t Timeout, uint32_t Tickstart)
NYX	0:85b3fd62ea1a	4878	{
NYX	0:85b3fd62ea1a	4879	/* Generate Start */
NYX	0:85b3fd62ea1a	4880	hi2c->Instance->CR1 \|= I2C_CR1_START;
NYX	0:85b3fd62ea1a	4881
NYX	0:85b3fd62ea1a	4882	/* Wait until SB flag is set */
NYX	0:85b3fd62ea1a	4883	if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_SB, RESET, Timeout, Tickstart) != HAL_OK)
NYX	0:85b3fd62ea1a	4884	{
NYX	0:85b3fd62ea1a	4885	return HAL_TIMEOUT;
NYX	0:85b3fd62ea1a	4886	}
NYX	0:85b3fd62ea1a	4887
NYX	0:85b3fd62ea1a	4888	/* Send slave address */
NYX	0:85b3fd62ea1a	4889	hi2c->Instance->DR = I2C_7BIT_ADD_WRITE(DevAddress);
NYX	0:85b3fd62ea1a	4890
NYX	0:85b3fd62ea1a	4891	/* Wait until ADDR flag is set */
NYX	0:85b3fd62ea1a	4892	if(I2C_WaitOnMasterAddressFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, Timeout, Tickstart) != HAL_OK)
NYX	0:85b3fd62ea1a	4893	{
NYX	0:85b3fd62ea1a	4894	if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
NYX	0:85b3fd62ea1a	4895	{
NYX	0:85b3fd62ea1a	4896	return HAL_ERROR;
NYX	0:85b3fd62ea1a	4897	}
NYX	0:85b3fd62ea1a	4898	else
NYX	0:85b3fd62ea1a	4899	{
NYX	0:85b3fd62ea1a	4900	return HAL_TIMEOUT;
NYX	0:85b3fd62ea1a	4901	}
NYX	0:85b3fd62ea1a	4902	}
NYX	0:85b3fd62ea1a	4903
NYX	0:85b3fd62ea1a	4904	/* Clear ADDR flag */
NYX	0:85b3fd62ea1a	4905	__HAL_I2C_CLEAR_ADDRFLAG(hi2c);
NYX	0:85b3fd62ea1a	4906
NYX	0:85b3fd62ea1a	4907	/* Wait until TXE flag is set */
NYX	0:85b3fd62ea1a	4908	if(I2C_WaitOnTXEFlagUntilTimeout(hi2c, Timeout, Tickstart) != HAL_OK)
NYX	0:85b3fd62ea1a	4909	{
NYX	0:85b3fd62ea1a	4910	if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
NYX	0:85b3fd62ea1a	4911	{
NYX	0:85b3fd62ea1a	4912	/* Generate Stop */
NYX	0:85b3fd62ea1a	4913	hi2c->Instance->CR1 \|= I2C_CR1_STOP;
NYX	0:85b3fd62ea1a	4914	return HAL_ERROR;
NYX	0:85b3fd62ea1a	4915	}
NYX	0:85b3fd62ea1a	4916	else
NYX	0:85b3fd62ea1a	4917	{
NYX	0:85b3fd62ea1a	4918	return HAL_TIMEOUT;
NYX	0:85b3fd62ea1a	4919	}
NYX	0:85b3fd62ea1a	4920	}
NYX	0:85b3fd62ea1a	4921
NYX	0:85b3fd62ea1a	4922	/* If Memory address size is 8Bit */
NYX	0:85b3fd62ea1a	4923	if(MemAddSize == I2C_MEMADD_SIZE_8BIT)
NYX	0:85b3fd62ea1a	4924	{
NYX	0:85b3fd62ea1a	4925	/* Send Memory Address */
NYX	0:85b3fd62ea1a	4926	hi2c->Instance->DR = I2C_MEM_ADD_LSB(MemAddress);
NYX	0:85b3fd62ea1a	4927	}
NYX	0:85b3fd62ea1a	4928	/* If Memory address size is 16Bit */
NYX	0:85b3fd62ea1a	4929	else
NYX	0:85b3fd62ea1a	4930	{
NYX	0:85b3fd62ea1a	4931	/* Send MSB of Memory Address */
NYX	0:85b3fd62ea1a	4932	hi2c->Instance->DR = I2C_MEM_ADD_MSB(MemAddress);
NYX	0:85b3fd62ea1a	4933
NYX	0:85b3fd62ea1a	4934	/* Wait until TXE flag is set */
NYX	0:85b3fd62ea1a	4935	if(I2C_WaitOnTXEFlagUntilTimeout(hi2c, Timeout, Tickstart) != HAL_OK)
NYX	0:85b3fd62ea1a	4936	{
NYX	0:85b3fd62ea1a	4937	if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
NYX	0:85b3fd62ea1a	4938	{
NYX	0:85b3fd62ea1a	4939	/* Generate Stop */
NYX	0:85b3fd62ea1a	4940	hi2c->Instance->CR1 \|= I2C_CR1_STOP;
NYX	0:85b3fd62ea1a	4941	return HAL_ERROR;
NYX	0:85b3fd62ea1a	4942	}
NYX	0:85b3fd62ea1a	4943	else
NYX	0:85b3fd62ea1a	4944	{
NYX	0:85b3fd62ea1a	4945	return HAL_TIMEOUT;
NYX	0:85b3fd62ea1a	4946	}
NYX	0:85b3fd62ea1a	4947	}
NYX	0:85b3fd62ea1a	4948
NYX	0:85b3fd62ea1a	4949	/* Send LSB of Memory Address */
NYX	0:85b3fd62ea1a	4950	hi2c->Instance->DR = I2C_MEM_ADD_LSB(MemAddress);
NYX	0:85b3fd62ea1a	4951	}
NYX	0:85b3fd62ea1a	4952
NYX	0:85b3fd62ea1a	4953	return HAL_OK;
NYX	0:85b3fd62ea1a	4954	}
NYX	0:85b3fd62ea1a	4955
NYX	0:85b3fd62ea1a	4956	/**
NYX	0:85b3fd62ea1a	4957	* @brief Master sends target device address followed by internal memory address for read request.
NYX	0:85b3fd62ea1a	4958	* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
NYX	0:85b3fd62ea1a	4959	* the configuration information for I2C module
NYX	0:85b3fd62ea1a	4960	* @param DevAddress Target device address
NYX	0:85b3fd62ea1a	4961	* @param MemAddress Internal memory address
NYX	0:85b3fd62ea1a	4962	* @param MemAddSize Size of internal memory address
NYX	0:85b3fd62ea1a	4963	* @param Timeout Timeout duration
NYX	0:85b3fd62ea1a	4964	* @param Tickstart Tick start value
NYX	0:85b3fd62ea1a	4965	* @retval HAL status
NYX	0:85b3fd62ea1a	4966	*/
NYX	0:85b3fd62ea1a	4967	static HAL_StatusTypeDef I2C_RequestMemoryRead(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint32_t Timeout, uint32_t Tickstart)
NYX	0:85b3fd62ea1a	4968	{
NYX	0:85b3fd62ea1a	4969	/* Enable Acknowledge */
NYX	0:85b3fd62ea1a	4970	hi2c->Instance->CR1 \|= I2C_CR1_ACK;
NYX	0:85b3fd62ea1a	4971
NYX	0:85b3fd62ea1a	4972	/* Generate Start */
NYX	0:85b3fd62ea1a	4973	hi2c->Instance->CR1 \|= I2C_CR1_START;
NYX	0:85b3fd62ea1a	4974
NYX	0:85b3fd62ea1a	4975	/* Wait until SB flag is set */
NYX	0:85b3fd62ea1a	4976	if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_SB, RESET, Timeout, Tickstart) != HAL_OK)
NYX	0:85b3fd62ea1a	4977	{
NYX	0:85b3fd62ea1a	4978	return HAL_TIMEOUT;
NYX	0:85b3fd62ea1a	4979	}
NYX	0:85b3fd62ea1a	4980
NYX	0:85b3fd62ea1a	4981	/* Send slave address */
NYX	0:85b3fd62ea1a	4982	hi2c->Instance->DR = I2C_7BIT_ADD_WRITE(DevAddress);
NYX	0:85b3fd62ea1a	4983
NYX	0:85b3fd62ea1a	4984	/* Wait until ADDR flag is set */
NYX	0:85b3fd62ea1a	4985	if(I2C_WaitOnMasterAddressFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, Timeout, Tickstart) != HAL_OK)
NYX	0:85b3fd62ea1a	4986	{
NYX	0:85b3fd62ea1a	4987	if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
NYX	0:85b3fd62ea1a	4988	{
NYX	0:85b3fd62ea1a	4989	return HAL_ERROR;
NYX	0:85b3fd62ea1a	4990	}
NYX	0:85b3fd62ea1a	4991	else
NYX	0:85b3fd62ea1a	4992	{
NYX	0:85b3fd62ea1a	4993	return HAL_TIMEOUT;
NYX	0:85b3fd62ea1a	4994	}
NYX	0:85b3fd62ea1a	4995	}
NYX	0:85b3fd62ea1a	4996
NYX	0:85b3fd62ea1a	4997	/* Clear ADDR flag */
NYX	0:85b3fd62ea1a	4998	__HAL_I2C_CLEAR_ADDRFLAG(hi2c);
NYX	0:85b3fd62ea1a	4999
NYX	0:85b3fd62ea1a	5000	/* Wait until TXE flag is set */
NYX	0:85b3fd62ea1a	5001	if(I2C_WaitOnTXEFlagUntilTimeout(hi2c, Timeout, Tickstart) != HAL_OK)
NYX	0:85b3fd62ea1a	5002	{
NYX	0:85b3fd62ea1a	5003	if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
NYX	0:85b3fd62ea1a	5004	{
NYX	0:85b3fd62ea1a	5005	/* Generate Stop */
NYX	0:85b3fd62ea1a	5006	hi2c->Instance->CR1 \|= I2C_CR1_STOP;
NYX	0:85b3fd62ea1a	5007	return HAL_ERROR;
NYX	0:85b3fd62ea1a	5008	}
NYX	0:85b3fd62ea1a	5009	else
NYX	0:85b3fd62ea1a	5010	{
NYX	0:85b3fd62ea1a	5011	return HAL_TIMEOUT;
NYX	0:85b3fd62ea1a	5012	}
NYX	0:85b3fd62ea1a	5013	}
NYX	0:85b3fd62ea1a	5014
NYX	0:85b3fd62ea1a	5015	/* If Memory address size is 8Bit */
NYX	0:85b3fd62ea1a	5016	if(MemAddSize == I2C_MEMADD_SIZE_8BIT)
NYX	0:85b3fd62ea1a	5017	{
NYX	0:85b3fd62ea1a	5018	/* Send Memory Address */
NYX	0:85b3fd62ea1a	5019	hi2c->Instance->DR = I2C_MEM_ADD_LSB(MemAddress);
NYX	0:85b3fd62ea1a	5020	}
NYX	0:85b3fd62ea1a	5021	/* If Memory address size is 16Bit */
NYX	0:85b3fd62ea1a	5022	else
NYX	0:85b3fd62ea1a	5023	{
NYX	0:85b3fd62ea1a	5024	/* Send MSB of Memory Address */
NYX	0:85b3fd62ea1a	5025	hi2c->Instance->DR = I2C_MEM_ADD_MSB(MemAddress);
NYX	0:85b3fd62ea1a	5026
NYX	0:85b3fd62ea1a	5027	/* Wait until TXE flag is set */
NYX	0:85b3fd62ea1a	5028	if(I2C_WaitOnTXEFlagUntilTimeout(hi2c, Timeout, Tickstart) != HAL_OK)
NYX	0:85b3fd62ea1a	5029	{
NYX	0:85b3fd62ea1a	5030	if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
NYX	0:85b3fd62ea1a	5031	{
NYX	0:85b3fd62ea1a	5032	/* Generate Stop */
NYX	0:85b3fd62ea1a	5033	hi2c->Instance->CR1 \|= I2C_CR1_STOP;
NYX	0:85b3fd62ea1a	5034	return HAL_ERROR;
NYX	0:85b3fd62ea1a	5035	}
NYX	0:85b3fd62ea1a	5036	else
NYX	0:85b3fd62ea1a	5037	{
NYX	0:85b3fd62ea1a	5038	return HAL_TIMEOUT;
NYX	0:85b3fd62ea1a	5039	}
NYX	0:85b3fd62ea1a	5040	}
NYX	0:85b3fd62ea1a	5041
NYX	0:85b3fd62ea1a	5042	/* Send LSB of Memory Address */
NYX	0:85b3fd62ea1a	5043	hi2c->Instance->DR = I2C_MEM_ADD_LSB(MemAddress);
NYX	0:85b3fd62ea1a	5044	}
NYX	0:85b3fd62ea1a	5045
NYX	0:85b3fd62ea1a	5046	/* Wait until TXE flag is set */
NYX	0:85b3fd62ea1a	5047	if(I2C_WaitOnTXEFlagUntilTimeout(hi2c, Timeout, Tickstart) != HAL_OK)
NYX	0:85b3fd62ea1a	5048	{
NYX	0:85b3fd62ea1a	5049	if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
NYX	0:85b3fd62ea1a	5050	{
NYX	0:85b3fd62ea1a	5051	/* Generate Stop */
NYX	0:85b3fd62ea1a	5052	hi2c->Instance->CR1 \|= I2C_CR1_STOP;
NYX	0:85b3fd62ea1a	5053	return HAL_ERROR;
NYX	0:85b3fd62ea1a	5054	}
NYX	0:85b3fd62ea1a	5055	else
NYX	0:85b3fd62ea1a	5056	{
NYX	0:85b3fd62ea1a	5057	return HAL_TIMEOUT;
NYX	0:85b3fd62ea1a	5058	}
NYX	0:85b3fd62ea1a	5059	}
NYX	0:85b3fd62ea1a	5060
NYX	0:85b3fd62ea1a	5061	/* Generate Restart */
NYX	0:85b3fd62ea1a	5062	hi2c->Instance->CR1 \|= I2C_CR1_START;
NYX	0:85b3fd62ea1a	5063
NYX	0:85b3fd62ea1a	5064	/* Wait until SB flag is set */
NYX	0:85b3fd62ea1a	5065	if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_SB, RESET, Timeout, Tickstart) != HAL_OK)
NYX	0:85b3fd62ea1a	5066	{
NYX	0:85b3fd62ea1a	5067	return HAL_TIMEOUT;
NYX	0:85b3fd62ea1a	5068	}
NYX	0:85b3fd62ea1a	5069
NYX	0:85b3fd62ea1a	5070	/* Send slave address */
NYX	0:85b3fd62ea1a	5071	hi2c->Instance->DR = I2C_7BIT_ADD_READ(DevAddress);
NYX	0:85b3fd62ea1a	5072
NYX	0:85b3fd62ea1a	5073	/* Wait until ADDR flag is set */
NYX	0:85b3fd62ea1a	5074	if(I2C_WaitOnMasterAddressFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, Timeout, Tickstart) != HAL_OK)
NYX	0:85b3fd62ea1a	5075	{
NYX	0:85b3fd62ea1a	5076	if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
NYX	0:85b3fd62ea1a	5077	{
NYX	0:85b3fd62ea1a	5078	return HAL_ERROR;
NYX	0:85b3fd62ea1a	5079	}
NYX	0:85b3fd62ea1a	5080	else
NYX	0:85b3fd62ea1a	5081	{
NYX	0:85b3fd62ea1a	5082	return HAL_TIMEOUT;
NYX	0:85b3fd62ea1a	5083	}
NYX	0:85b3fd62ea1a	5084	}
NYX	0:85b3fd62ea1a	5085
NYX	0:85b3fd62ea1a	5086	return HAL_OK;
NYX	0:85b3fd62ea1a	5087	}
NYX	0:85b3fd62ea1a	5088
NYX	0:85b3fd62ea1a	5089	/**
NYX	0:85b3fd62ea1a	5090	* @brief DMA I2C process complete callback.
NYX	0:85b3fd62ea1a	5091	* @param hdma DMA handle
NYX	0:85b3fd62ea1a	5092	* @retval None
NYX	0:85b3fd62ea1a	5093	*/
NYX	0:85b3fd62ea1a	5094	static void I2C_DMAXferCplt(DMA_HandleTypeDef *hdma)
NYX	0:85b3fd62ea1a	5095	{
NYX	0:85b3fd62ea1a	5096	I2C_HandleTypeDef* hi2c = (I2C_HandleTypeDef)((DMA_HandleTypeDef)hdma)->Parent;
NYX	0:85b3fd62ea1a	5097
NYX	0:85b3fd62ea1a	5098	/* Declaration of temporary variable to prevent undefined behavior of volatile usage */
NYX	0:85b3fd62ea1a	5099	uint32_t CurrentState = hi2c->State;
NYX	0:85b3fd62ea1a	5100	uint32_t CurrentMode = hi2c->Mode;
NYX	0:85b3fd62ea1a	5101
NYX	0:85b3fd62ea1a	5102	if((CurrentState == HAL_I2C_STATE_BUSY_TX) \|\| ((CurrentState == HAL_I2C_STATE_BUSY_RX) && (CurrentMode == HAL_I2C_MODE_SLAVE)))
NYX	0:85b3fd62ea1a	5103	{
NYX	0:85b3fd62ea1a	5104	/* Disable DMA Request */
NYX	0:85b3fd62ea1a	5105	hi2c->Instance->CR2 &= ~I2C_CR2_DMAEN;
NYX	0:85b3fd62ea1a	5106
NYX	0:85b3fd62ea1a	5107	hi2c->XferCount = 0U;
NYX	0:85b3fd62ea1a	5108
NYX	0:85b3fd62ea1a	5109	/* Enable EVT and ERR interrupt */
NYX	0:85b3fd62ea1a	5110	__HAL_I2C_ENABLE_IT(hi2c, I2C_IT_EVT \| I2C_IT_ERR);
NYX	0:85b3fd62ea1a	5111	}
NYX	0:85b3fd62ea1a	5112	else
NYX	0:85b3fd62ea1a	5113	{
NYX	0:85b3fd62ea1a	5114	/* Disable Acknowledge */
NYX	0:85b3fd62ea1a	5115	hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
NYX	0:85b3fd62ea1a	5116
NYX	0:85b3fd62ea1a	5117	/* Generate Stop */
NYX	0:85b3fd62ea1a	5118	hi2c->Instance->CR1 \|= I2C_CR1_STOP;
NYX	0:85b3fd62ea1a	5119
NYX	0:85b3fd62ea1a	5120	/* Disable Last DMA */
NYX	0:85b3fd62ea1a	5121	hi2c->Instance->CR2 &= ~I2C_CR2_LAST;
NYX	0:85b3fd62ea1a	5122
NYX	0:85b3fd62ea1a	5123	/* Disable DMA Request */
NYX	0:85b3fd62ea1a	5124	hi2c->Instance->CR2 &= ~I2C_CR2_DMAEN;
NYX	0:85b3fd62ea1a	5125
NYX	0:85b3fd62ea1a	5126	hi2c->XferCount = 0U;
NYX	0:85b3fd62ea1a	5127
NYX	0:85b3fd62ea1a	5128	/* Check if Errors has been detected during transfer */
NYX	0:85b3fd62ea1a	5129	if(hi2c->ErrorCode != HAL_I2C_ERROR_NONE)
NYX	0:85b3fd62ea1a	5130	{
NYX	0:85b3fd62ea1a	5131	HAL_I2C_ErrorCallback(hi2c);
NYX	0:85b3fd62ea1a	5132	}
NYX	0:85b3fd62ea1a	5133	else
NYX	0:85b3fd62ea1a	5134	{
NYX	0:85b3fd62ea1a	5135	hi2c->State = HAL_I2C_STATE_READY;
NYX	0:85b3fd62ea1a	5136
NYX	0:85b3fd62ea1a	5137	if(hi2c->Mode == HAL_I2C_MODE_MEM)
NYX	0:85b3fd62ea1a	5138	{
NYX	0:85b3fd62ea1a	5139	hi2c->Mode = HAL_I2C_MODE_NONE;
NYX	0:85b3fd62ea1a	5140
NYX	0:85b3fd62ea1a	5141	HAL_I2C_MemRxCpltCallback(hi2c);
NYX	0:85b3fd62ea1a	5142	}
NYX	0:85b3fd62ea1a	5143	else
NYX	0:85b3fd62ea1a	5144	{
NYX	0:85b3fd62ea1a	5145	hi2c->Mode = HAL_I2C_MODE_NONE;
NYX	0:85b3fd62ea1a	5146
NYX	0:85b3fd62ea1a	5147	HAL_I2C_MasterRxCpltCallback(hi2c);
NYX	0:85b3fd62ea1a	5148	}
NYX	0:85b3fd62ea1a	5149	}
NYX	0:85b3fd62ea1a	5150	}
NYX	0:85b3fd62ea1a	5151	}
NYX	0:85b3fd62ea1a	5152
NYX	0:85b3fd62ea1a	5153	/**
NYX	0:85b3fd62ea1a	5154	* @brief DMA I2C communication error callback.
NYX	0:85b3fd62ea1a	5155	* @param hdma DMA handle
NYX	0:85b3fd62ea1a	5156	* @retval None
NYX	0:85b3fd62ea1a	5157	*/
NYX	0:85b3fd62ea1a	5158	static void I2C_DMAError(DMA_HandleTypeDef *hdma)
NYX	0:85b3fd62ea1a	5159	{
NYX	0:85b3fd62ea1a	5160	I2C_HandleTypeDef* hi2c = (I2C_HandleTypeDef)((DMA_HandleTypeDef)hdma)->Parent;
NYX	0:85b3fd62ea1a	5161
NYX	0:85b3fd62ea1a	5162	/* Ignore DMA FIFO error */
NYX	0:85b3fd62ea1a	5163	if(HAL_DMA_GetError(hdma) != HAL_DMA_ERROR_FE)
NYX	0:85b3fd62ea1a	5164	{
NYX	0:85b3fd62ea1a	5165	/* Disable Acknowledge */
NYX	0:85b3fd62ea1a	5166	hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
NYX	0:85b3fd62ea1a	5167
NYX	0:85b3fd62ea1a	5168	hi2c->XferCount = 0U;
NYX	0:85b3fd62ea1a	5169
NYX	0:85b3fd62ea1a	5170	hi2c->State = HAL_I2C_STATE_READY;
NYX	0:85b3fd62ea1a	5171	hi2c->Mode = HAL_I2C_MODE_NONE;
NYX	0:85b3fd62ea1a	5172
NYX	0:85b3fd62ea1a	5173	hi2c->ErrorCode \|= HAL_I2C_ERROR_DMA;
NYX	0:85b3fd62ea1a	5174
NYX	0:85b3fd62ea1a	5175	HAL_I2C_ErrorCallback(hi2c);
NYX	0:85b3fd62ea1a	5176	}
NYX	0:85b3fd62ea1a	5177	}
NYX	0:85b3fd62ea1a	5178
NYX	0:85b3fd62ea1a	5179	/**
NYX	0:85b3fd62ea1a	5180	* @brief DMA I2C communication abort callback
NYX	0:85b3fd62ea1a	5181	* (To be called at end of DMA Abort procedure).
NYX	0:85b3fd62ea1a	5182	* @param hdma: DMA handle.
NYX	0:85b3fd62ea1a	5183	* @retval None
NYX	0:85b3fd62ea1a	5184	*/
NYX	0:85b3fd62ea1a	5185	static void I2C_DMAAbort(DMA_HandleTypeDef *hdma)
NYX	0:85b3fd62ea1a	5186	{
NYX	0:85b3fd62ea1a	5187	I2C_HandleTypeDef* hi2c = ( I2C_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
NYX	0:85b3fd62ea1a	5188
NYX	0:85b3fd62ea1a	5189	/* Disable Acknowledge */
NYX	0:85b3fd62ea1a	5190	hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
NYX	0:85b3fd62ea1a	5191
NYX	0:85b3fd62ea1a	5192	hi2c->XferCount = 0U;
NYX	0:85b3fd62ea1a	5193
NYX	0:85b3fd62ea1a	5194	/* Reset XferAbortCallback */
NYX	0:85b3fd62ea1a	5195	hi2c->hdmatx->XferAbortCallback = NULL;
NYX	0:85b3fd62ea1a	5196	hi2c->hdmarx->XferAbortCallback = NULL;
NYX	0:85b3fd62ea1a	5197
NYX	0:85b3fd62ea1a	5198	/* Check if come from abort from user */
NYX	0:85b3fd62ea1a	5199	if(hi2c->State == HAL_I2C_STATE_ABORT)
NYX	0:85b3fd62ea1a	5200	{
NYX	0:85b3fd62ea1a	5201	hi2c->State = HAL_I2C_STATE_READY;
NYX	0:85b3fd62ea1a	5202	hi2c->Mode = HAL_I2C_MODE_NONE;
NYX	0:85b3fd62ea1a	5203	hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
NYX	0:85b3fd62ea1a	5204
NYX	0:85b3fd62ea1a	5205	/* Disable I2C peripheral to prevent dummy data in buffer */
NYX	0:85b3fd62ea1a	5206	__HAL_I2C_DISABLE(hi2c);
NYX	0:85b3fd62ea1a	5207
NYX	0:85b3fd62ea1a	5208	/* Call the corresponding callback to inform upper layer of End of Transfer */
NYX	0:85b3fd62ea1a	5209	HAL_I2C_AbortCpltCallback(hi2c);
NYX	0:85b3fd62ea1a	5210	}
NYX	0:85b3fd62ea1a	5211	else
NYX	0:85b3fd62ea1a	5212	{
NYX	0:85b3fd62ea1a	5213	hi2c->State = HAL_I2C_STATE_READY;
NYX	0:85b3fd62ea1a	5214	hi2c->Mode = HAL_I2C_MODE_NONE;
NYX	0:85b3fd62ea1a	5215
NYX	0:85b3fd62ea1a	5216	/* Disable I2C peripheral to prevent dummy data in buffer */
NYX	0:85b3fd62ea1a	5217	__HAL_I2C_DISABLE(hi2c);
NYX	0:85b3fd62ea1a	5218
NYX	0:85b3fd62ea1a	5219	/* Call the corresponding callback to inform upper layer of End of Transfer */
NYX	0:85b3fd62ea1a	5220	HAL_I2C_ErrorCallback(hi2c);
NYX	0:85b3fd62ea1a	5221	}
NYX	0:85b3fd62ea1a	5222	}
NYX	0:85b3fd62ea1a	5223
NYX	0:85b3fd62ea1a	5224	/**
NYX	0:85b3fd62ea1a	5225	* @brief This function handles I2C Communication Timeout.
NYX	0:85b3fd62ea1a	5226	* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
NYX	0:85b3fd62ea1a	5227	* the configuration information for I2C module
NYX	0:85b3fd62ea1a	5228	* @param Flag specifies the I2C flag to check.
NYX	0:85b3fd62ea1a	5229	* @param Status The new Flag status (SET or RESET).
NYX	0:85b3fd62ea1a	5230	* @param Timeout Timeout duration
NYX	0:85b3fd62ea1a	5231	* @param Tickstart Tick start value
NYX	0:85b3fd62ea1a	5232	* @retval HAL status
NYX	0:85b3fd62ea1a	5233	*/
NYX	0:85b3fd62ea1a	5234	static HAL_StatusTypeDef I2C_WaitOnFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Flag, FlagStatus Status, uint32_t Timeout, uint32_t Tickstart)
NYX	0:85b3fd62ea1a	5235	{
NYX	0:85b3fd62ea1a	5236	/* Wait until flag is set */
NYX	0:85b3fd62ea1a	5237	while((__HAL_I2C_GET_FLAG(hi2c, Flag) ? SET : RESET) == Status)
NYX	0:85b3fd62ea1a	5238	{
NYX	0:85b3fd62ea1a	5239	/* Check for the Timeout */
NYX	0:85b3fd62ea1a	5240	if(Timeout != HAL_MAX_DELAY)
NYX	0:85b3fd62ea1a	5241	{
NYX	0:85b3fd62ea1a	5242	if((Timeout == 0U)\|\|((HAL_GetTick() - Tickstart ) > Timeout))
NYX	0:85b3fd62ea1a	5243	{
NYX	0:85b3fd62ea1a	5244	hi2c->PreviousState = I2C_STATE_NONE;
NYX	0:85b3fd62ea1a	5245	hi2c->State= HAL_I2C_STATE_READY;
NYX	0:85b3fd62ea1a	5246	hi2c->Mode = HAL_I2C_MODE_NONE;
NYX	0:85b3fd62ea1a	5247
NYX	0:85b3fd62ea1a	5248	/* Process Unlocked */
NYX	0:85b3fd62ea1a	5249	__HAL_UNLOCK(hi2c);
NYX	0:85b3fd62ea1a	5250
NYX	0:85b3fd62ea1a	5251	return HAL_TIMEOUT;
NYX	0:85b3fd62ea1a	5252	}
NYX	0:85b3fd62ea1a	5253	}
NYX	0:85b3fd62ea1a	5254	}
NYX	0:85b3fd62ea1a	5255
NYX	0:85b3fd62ea1a	5256	return HAL_OK;
NYX	0:85b3fd62ea1a	5257	}
NYX	0:85b3fd62ea1a	5258
NYX	0:85b3fd62ea1a	5259	/**
NYX	0:85b3fd62ea1a	5260	* @brief This function handles I2C Communication Timeout for Master addressing phase.
NYX	0:85b3fd62ea1a	5261	* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
NYX	0:85b3fd62ea1a	5262	* the configuration information for I2C module
NYX	0:85b3fd62ea1a	5263	* @param Flag specifies the I2C flag to check.
NYX	0:85b3fd62ea1a	5264	* @param Timeout Timeout duration
NYX	0:85b3fd62ea1a	5265	* @param Tickstart Tick start value
NYX	0:85b3fd62ea1a	5266	* @retval HAL status
NYX	0:85b3fd62ea1a	5267	*/
NYX	0:85b3fd62ea1a	5268	static HAL_StatusTypeDef I2C_WaitOnMasterAddressFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Flag, uint32_t Timeout, uint32_t Tickstart)
NYX	0:85b3fd62ea1a	5269	{
NYX	0:85b3fd62ea1a	5270	while(__HAL_I2C_GET_FLAG(hi2c, Flag) == RESET)
NYX	0:85b3fd62ea1a	5271	{
NYX	0:85b3fd62ea1a	5272	if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_AF) == SET)
NYX	0:85b3fd62ea1a	5273	{
NYX	0:85b3fd62ea1a	5274	/* Generate Stop */
NYX	0:85b3fd62ea1a	5275	hi2c->Instance->CR1 \|= I2C_CR1_STOP;
NYX	0:85b3fd62ea1a	5276
NYX	0:85b3fd62ea1a	5277	/* Clear AF Flag */
NYX	0:85b3fd62ea1a	5278	__HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF);
NYX	0:85b3fd62ea1a	5279
NYX	0:85b3fd62ea1a	5280	hi2c->ErrorCode = HAL_I2C_ERROR_AF;
NYX	0:85b3fd62ea1a	5281	hi2c->PreviousState = I2C_STATE_NONE;
NYX	0:85b3fd62ea1a	5282	hi2c->State= HAL_I2C_STATE_READY;
NYX	0:85b3fd62ea1a	5283
NYX	0:85b3fd62ea1a	5284	/* Process Unlocked */
NYX	0:85b3fd62ea1a	5285	__HAL_UNLOCK(hi2c);
NYX	0:85b3fd62ea1a	5286
NYX	0:85b3fd62ea1a	5287	return HAL_ERROR;
NYX	0:85b3fd62ea1a	5288	}
NYX	0:85b3fd62ea1a	5289
NYX	0:85b3fd62ea1a	5290	/* Check for the Timeout */
NYX	0:85b3fd62ea1a	5291	if(Timeout != HAL_MAX_DELAY)
NYX	0:85b3fd62ea1a	5292	{
NYX	0:85b3fd62ea1a	5293	if((Timeout == 0U)\|\|((HAL_GetTick() - Tickstart ) > Timeout))
NYX	0:85b3fd62ea1a	5294	{
NYX	0:85b3fd62ea1a	5295	hi2c->PreviousState = I2C_STATE_NONE;
NYX	0:85b3fd62ea1a	5296	hi2c->State= HAL_I2C_STATE_READY;
NYX	0:85b3fd62ea1a	5297
NYX	0:85b3fd62ea1a	5298	/* Process Unlocked */
NYX	0:85b3fd62ea1a	5299	__HAL_UNLOCK(hi2c);
NYX	0:85b3fd62ea1a	5300
NYX	0:85b3fd62ea1a	5301	return HAL_TIMEOUT;
NYX	0:85b3fd62ea1a	5302	}
NYX	0:85b3fd62ea1a	5303	}
NYX	0:85b3fd62ea1a	5304	}
NYX	0:85b3fd62ea1a	5305	return HAL_OK;
NYX	0:85b3fd62ea1a	5306	}
NYX	0:85b3fd62ea1a	5307
NYX	0:85b3fd62ea1a	5308	/**
NYX	0:85b3fd62ea1a	5309	* @brief This function handles I2C Communication Timeout for specific usage of TXE flag.
NYX	0:85b3fd62ea1a	5310	* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
NYX	0:85b3fd62ea1a	5311	* the configuration information for the specified I2C.
NYX	0:85b3fd62ea1a	5312	* @param Timeout Timeout duration
NYX	0:85b3fd62ea1a	5313	* @param Tickstart Tick start value
NYX	0:85b3fd62ea1a	5314	* @retval HAL status
NYX	0:85b3fd62ea1a	5315	*/
NYX	0:85b3fd62ea1a	5316	static HAL_StatusTypeDef I2C_WaitOnTXEFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Timeout, uint32_t Tickstart)
NYX	0:85b3fd62ea1a	5317	{
NYX	0:85b3fd62ea1a	5318	while(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_TXE) == RESET)
NYX	0:85b3fd62ea1a	5319	{
NYX	0:85b3fd62ea1a	5320	/* Check if a NACK is detected */
NYX	0:85b3fd62ea1a	5321	if(I2C_IsAcknowledgeFailed(hi2c) != HAL_OK)
NYX	0:85b3fd62ea1a	5322	{
NYX	0:85b3fd62ea1a	5323	return HAL_ERROR;
NYX	0:85b3fd62ea1a	5324	}
NYX	0:85b3fd62ea1a	5325
NYX	0:85b3fd62ea1a	5326	/* Check for the Timeout */
NYX	0:85b3fd62ea1a	5327	if(Timeout != HAL_MAX_DELAY)
NYX	0:85b3fd62ea1a	5328	{
NYX	0:85b3fd62ea1a	5329	if((Timeout == 0U) \|\| ((HAL_GetTick()-Tickstart) > Timeout))
NYX	0:85b3fd62ea1a	5330	{
NYX	0:85b3fd62ea1a	5331	hi2c->ErrorCode \|= HAL_I2C_ERROR_TIMEOUT;
NYX	0:85b3fd62ea1a	5332	hi2c->PreviousState = I2C_STATE_NONE;
NYX	0:85b3fd62ea1a	5333	hi2c->State= HAL_I2C_STATE_READY;
NYX	0:85b3fd62ea1a	5334
NYX	0:85b3fd62ea1a	5335	/* Process Unlocked */
NYX	0:85b3fd62ea1a	5336	__HAL_UNLOCK(hi2c);
NYX	0:85b3fd62ea1a	5337
NYX	0:85b3fd62ea1a	5338	return HAL_TIMEOUT;
NYX	0:85b3fd62ea1a	5339	}
NYX	0:85b3fd62ea1a	5340	}
NYX	0:85b3fd62ea1a	5341	}
NYX	0:85b3fd62ea1a	5342	return HAL_OK;
NYX	0:85b3fd62ea1a	5343	}
NYX	0:85b3fd62ea1a	5344
NYX	0:85b3fd62ea1a	5345	/**
NYX	0:85b3fd62ea1a	5346	* @brief This function handles I2C Communication Timeout for specific usage of BTF flag.
NYX	0:85b3fd62ea1a	5347	* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
NYX	0:85b3fd62ea1a	5348	* the configuration information for the specified I2C.
NYX	0:85b3fd62ea1a	5349	* @param Timeout Timeout duration
NYX	0:85b3fd62ea1a	5350	* @param Tickstart Tick start value
NYX	0:85b3fd62ea1a	5351	* @retval HAL status
NYX	0:85b3fd62ea1a	5352	*/
NYX	0:85b3fd62ea1a	5353	static HAL_StatusTypeDef I2C_WaitOnBTFFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Timeout, uint32_t Tickstart)
NYX	0:85b3fd62ea1a	5354	{
NYX	0:85b3fd62ea1a	5355	while(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BTF) == RESET)
NYX	0:85b3fd62ea1a	5356	{
NYX	0:85b3fd62ea1a	5357	/* Check if a NACK is detected */
NYX	0:85b3fd62ea1a	5358	if(I2C_IsAcknowledgeFailed(hi2c) != HAL_OK)
NYX	0:85b3fd62ea1a	5359	{
NYX	0:85b3fd62ea1a	5360	return HAL_ERROR;
NYX	0:85b3fd62ea1a	5361	}
NYX	0:85b3fd62ea1a	5362
NYX	0:85b3fd62ea1a	5363	/* Check for the Timeout */
NYX	0:85b3fd62ea1a	5364	if(Timeout != HAL_MAX_DELAY)
NYX	0:85b3fd62ea1a	5365	{
NYX	0:85b3fd62ea1a	5366	if((Timeout == 0U) \|\| ((HAL_GetTick()-Tickstart) > Timeout))
NYX	0:85b3fd62ea1a	5367	{
NYX	0:85b3fd62ea1a	5368	hi2c->ErrorCode \|= HAL_I2C_ERROR_TIMEOUT;
NYX	0:85b3fd62ea1a	5369	hi2c->PreviousState = I2C_STATE_NONE;
NYX	0:85b3fd62ea1a	5370	hi2c->State= HAL_I2C_STATE_READY;
NYX	0:85b3fd62ea1a	5371
NYX	0:85b3fd62ea1a	5372	/* Process Unlocked */
NYX	0:85b3fd62ea1a	5373	__HAL_UNLOCK(hi2c);
NYX	0:85b3fd62ea1a	5374
NYX	0:85b3fd62ea1a	5375	return HAL_TIMEOUT;
NYX	0:85b3fd62ea1a	5376	}
NYX	0:85b3fd62ea1a	5377	}
NYX	0:85b3fd62ea1a	5378	}
NYX	0:85b3fd62ea1a	5379	return HAL_OK;
NYX	0:85b3fd62ea1a	5380	}
NYX	0:85b3fd62ea1a	5381
NYX	0:85b3fd62ea1a	5382	/**
NYX	0:85b3fd62ea1a	5383	* @brief This function handles I2C Communication Timeout for specific usage of STOP flag.
NYX	0:85b3fd62ea1a	5384	* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
NYX	0:85b3fd62ea1a	5385	* the configuration information for the specified I2C.
NYX	0:85b3fd62ea1a	5386	* @param Timeout Timeout duration
NYX	0:85b3fd62ea1a	5387	* @param Tickstart Tick start value
NYX	0:85b3fd62ea1a	5388	* @retval HAL status
NYX	0:85b3fd62ea1a	5389	*/
NYX	0:85b3fd62ea1a	5390	static HAL_StatusTypeDef I2C_WaitOnSTOPFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Timeout, uint32_t Tickstart)
NYX	0:85b3fd62ea1a	5391	{
NYX	0:85b3fd62ea1a	5392	while(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_STOPF) == RESET)
NYX	0:85b3fd62ea1a	5393	{
NYX	0:85b3fd62ea1a	5394	/* Check if a NACK is detected */
NYX	0:85b3fd62ea1a	5395	if(I2C_IsAcknowledgeFailed(hi2c) != HAL_OK)
NYX	0:85b3fd62ea1a	5396	{
NYX	0:85b3fd62ea1a	5397	return HAL_ERROR;
NYX	0:85b3fd62ea1a	5398	}
NYX	0:85b3fd62ea1a	5399
NYX	0:85b3fd62ea1a	5400	/* Check for the Timeout */
NYX	0:85b3fd62ea1a	5401	if((Timeout == 0U) \|\| ((HAL_GetTick()-Tickstart) > Timeout))
NYX	0:85b3fd62ea1a	5402	{
NYX	0:85b3fd62ea1a	5403	hi2c->ErrorCode \|= HAL_I2C_ERROR_TIMEOUT;
NYX	0:85b3fd62ea1a	5404	hi2c->PreviousState = I2C_STATE_NONE;
NYX	0:85b3fd62ea1a	5405	hi2c->State= HAL_I2C_STATE_READY;
NYX	0:85b3fd62ea1a	5406
NYX	0:85b3fd62ea1a	5407	/* Process Unlocked */
NYX	0:85b3fd62ea1a	5408	__HAL_UNLOCK(hi2c);
NYX	0:85b3fd62ea1a	5409
NYX	0:85b3fd62ea1a	5410	return HAL_TIMEOUT;
NYX	0:85b3fd62ea1a	5411	}
NYX	0:85b3fd62ea1a	5412	}
NYX	0:85b3fd62ea1a	5413	return HAL_OK;
NYX	0:85b3fd62ea1a	5414	}
NYX	0:85b3fd62ea1a	5415
NYX	0:85b3fd62ea1a	5416	/**
NYX	0:85b3fd62ea1a	5417	* @brief This function handles I2C Communication Timeout for specific usage of RXNE flag.
NYX	0:85b3fd62ea1a	5418	* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
NYX	0:85b3fd62ea1a	5419	* the configuration information for the specified I2C.
NYX	0:85b3fd62ea1a	5420	* @param Timeout Timeout duration
NYX	0:85b3fd62ea1a	5421	* @param Tickstart Tick start value
NYX	0:85b3fd62ea1a	5422	* @retval HAL status
NYX	0:85b3fd62ea1a	5423	*/
NYX	0:85b3fd62ea1a	5424	static HAL_StatusTypeDef I2C_WaitOnRXNEFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Timeout, uint32_t Tickstart)
NYX	0:85b3fd62ea1a	5425	{
NYX	0:85b3fd62ea1a	5426
NYX	0:85b3fd62ea1a	5427	while(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_RXNE) == RESET)
NYX	0:85b3fd62ea1a	5428	{
NYX	0:85b3fd62ea1a	5429	/* Check if a STOPF is detected */
NYX	0:85b3fd62ea1a	5430	if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_STOPF) == SET)
NYX	0:85b3fd62ea1a	5431	{
NYX	0:85b3fd62ea1a	5432	/* Clear STOP Flag */
NYX	0:85b3fd62ea1a	5433	__HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF);
NYX	0:85b3fd62ea1a	5434
NYX	0:85b3fd62ea1a	5435	hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
NYX	0:85b3fd62ea1a	5436	hi2c->PreviousState = I2C_STATE_NONE;
NYX	0:85b3fd62ea1a	5437	hi2c->State= HAL_I2C_STATE_READY;
NYX	0:85b3fd62ea1a	5438
NYX	0:85b3fd62ea1a	5439	/* Process Unlocked */
NYX	0:85b3fd62ea1a	5440	__HAL_UNLOCK(hi2c);
NYX	0:85b3fd62ea1a	5441
NYX	0:85b3fd62ea1a	5442	return HAL_ERROR;
NYX	0:85b3fd62ea1a	5443	}
NYX	0:85b3fd62ea1a	5444
NYX	0:85b3fd62ea1a	5445	/* Check for the Timeout */
NYX	0:85b3fd62ea1a	5446	if((Timeout == 0U) \|\| ((HAL_GetTick()-Tickstart) > Timeout))
NYX	0:85b3fd62ea1a	5447	{
NYX	0:85b3fd62ea1a	5448	hi2c->ErrorCode \|= HAL_I2C_ERROR_TIMEOUT;
NYX	0:85b3fd62ea1a	5449	hi2c->State= HAL_I2C_STATE_READY;
NYX	0:85b3fd62ea1a	5450
NYX	0:85b3fd62ea1a	5451	/* Process Unlocked */
NYX	0:85b3fd62ea1a	5452	__HAL_UNLOCK(hi2c);
NYX	0:85b3fd62ea1a	5453
NYX	0:85b3fd62ea1a	5454	return HAL_TIMEOUT;
NYX	0:85b3fd62ea1a	5455	}
NYX	0:85b3fd62ea1a	5456	}
NYX	0:85b3fd62ea1a	5457	return HAL_OK;
NYX	0:85b3fd62ea1a	5458	}
NYX	0:85b3fd62ea1a	5459
NYX	0:85b3fd62ea1a	5460	/**
NYX	0:85b3fd62ea1a	5461	* @brief This function handles Acknowledge failed detection during an I2C Communication.
NYX	0:85b3fd62ea1a	5462	* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
NYX	0:85b3fd62ea1a	5463	* the configuration information for the specified I2C.
NYX	0:85b3fd62ea1a	5464	* @retval HAL status
NYX	0:85b3fd62ea1a	5465	*/
NYX	0:85b3fd62ea1a	5466	static HAL_StatusTypeDef I2C_IsAcknowledgeFailed(I2C_HandleTypeDef *hi2c)
NYX	0:85b3fd62ea1a	5467	{
NYX	0:85b3fd62ea1a	5468	if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_AF) == SET)
NYX	0:85b3fd62ea1a	5469	{
NYX	0:85b3fd62ea1a	5470	/* Clear NACKF Flag */
NYX	0:85b3fd62ea1a	5471	__HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF);
NYX	0:85b3fd62ea1a	5472
NYX	0:85b3fd62ea1a	5473	hi2c->ErrorCode = HAL_I2C_ERROR_AF;
NYX	0:85b3fd62ea1a	5474	hi2c->PreviousState = I2C_STATE_NONE;
NYX	0:85b3fd62ea1a	5475	hi2c->State= HAL_I2C_STATE_READY;
NYX	0:85b3fd62ea1a	5476
NYX	0:85b3fd62ea1a	5477	/* Process Unlocked */
NYX	0:85b3fd62ea1a	5478	__HAL_UNLOCK(hi2c);
NYX	0:85b3fd62ea1a	5479
NYX	0:85b3fd62ea1a	5480	return HAL_ERROR;
NYX	0:85b3fd62ea1a	5481	}
NYX	0:85b3fd62ea1a	5482	return HAL_OK;
NYX	0:85b3fd62ea1a	5483	}
NYX	0:85b3fd62ea1a	5484	/**
NYX	0:85b3fd62ea1a	5485	* @}
NYX	0:85b3fd62ea1a	5486	*/
NYX	0:85b3fd62ea1a	5487
NYX	0:85b3fd62ea1a	5488	#endif /* HAL_I2C_MODULE_ENABLED */
NYX	0:85b3fd62ea1a	5489
NYX	0:85b3fd62ea1a	5490	/**
NYX	0:85b3fd62ea1a	5491	* @}
NYX	0:85b3fd62ea1a	5492	*/
NYX	0:85b3fd62ea1a	5493
NYX	0:85b3fd62ea1a	5494	/**
NYX	0:85b3fd62ea1a	5495	* @}
NYX	0:85b3fd62ea1a	5496	*/
NYX	0:85b3fd62ea1a	5497
NYX	0:85b3fd62ea1a	5498	/********************** (C) COPYRIGHT STMicroelectronics *END OF FILE**/

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Type:	Library
Created:	16 Mar 2020
Imports:	73
Forks:	0
Commits:	1
Dependents:	1
Dependencies:	0
Followers:	2

targets/TARGET_STM/TARGET_STM32F4/device/stm32f4xx_hal_i2c.c@0:85b3fd62ea1a, 2020-03-16 (annotated)

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