Takaaki Numai / mbed-dev

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targets/TARGET_STM/TARGET_STM32F4/device/stm32f4xx_hal_flash_ex.c@0:85b3fd62ea1a, 2020-03-16 (annotated)

Committer:
NYX
Date:
Mon Mar 16 06:35:48 2020 +0000
Revision:
0:85b3fd62ea1a
reinport to mbed;

Who changed what in which revision?

UserRevisionLine numberNew contents of line
NYX 0:85b3fd62ea1a 1 /**
NYX 0:85b3fd62ea1a 2 ******************************************************************************
NYX 0:85b3fd62ea1a 3 * @file stm32f4xx_hal_flash_ex.c
NYX 0:85b3fd62ea1a 4 * @author MCD Application Team
NYX 0:85b3fd62ea1a 5 * @version V1.7.1
NYX 0:85b3fd62ea1a 6 * @date 14-April-2017
NYX 0:85b3fd62ea1a 7 * @brief Extended FLASH HAL module driver.
NYX 0:85b3fd62ea1a 8 * This file provides firmware functions to manage the following
NYX 0:85b3fd62ea1a 9 * functionalities of the FLASH extension peripheral:
NYX 0:85b3fd62ea1a 10 * + Extended programming operations functions
NYX 0:85b3fd62ea1a 11 *
NYX 0:85b3fd62ea1a 12 @verbatim
NYX 0:85b3fd62ea1a 13 ==============================================================================
NYX 0:85b3fd62ea1a 14 ##### Flash Extension features #####
NYX 0:85b3fd62ea1a 15 ==============================================================================
NYX 0:85b3fd62ea1a 16
NYX 0:85b3fd62ea1a 17 [..] Comparing to other previous devices, the FLASH interface for STM32F427xx/437xx and
NYX 0:85b3fd62ea1a 18 STM32F429xx/439xx devices contains the following additional features
NYX 0:85b3fd62ea1a 19
NYX 0:85b3fd62ea1a 20 (+) Capacity up to 2 Mbyte with dual bank architecture supporting read-while-write
NYX 0:85b3fd62ea1a 21 capability (RWW)
NYX 0:85b3fd62ea1a 22 (+) Dual bank memory organization
NYX 0:85b3fd62ea1a 23 (+) PCROP protection for all banks
NYX 0:85b3fd62ea1a 24
NYX 0:85b3fd62ea1a 25 ##### How to use this driver #####
NYX 0:85b3fd62ea1a 26 ==============================================================================
NYX 0:85b3fd62ea1a 27 [..] This driver provides functions to configure and program the FLASH memory
NYX 0:85b3fd62ea1a 28 of all STM32F427xx/437xx, STM32F429xx/439xx, STM32F469xx/479xx and STM32F446xx
NYX 0:85b3fd62ea1a 29 devices. It includes
NYX 0:85b3fd62ea1a 30 (#) FLASH Memory Erase functions:
NYX 0:85b3fd62ea1a 31 (++) Lock and Unlock the FLASH interface using HAL_FLASH_Unlock() and
NYX 0:85b3fd62ea1a 32 HAL_FLASH_Lock() functions
NYX 0:85b3fd62ea1a 33 (++) Erase function: Erase sector, erase all sectors
NYX 0:85b3fd62ea1a 34 (++) There are two modes of erase :
NYX 0:85b3fd62ea1a 35 (+++) Polling Mode using HAL_FLASHEx_Erase()
NYX 0:85b3fd62ea1a 36 (+++) Interrupt Mode using HAL_FLASHEx_Erase_IT()
NYX 0:85b3fd62ea1a 37
NYX 0:85b3fd62ea1a 38 (#) Option Bytes Programming functions: Use HAL_FLASHEx_OBProgram() to :
NYX 0:85b3fd62ea1a 39 (++) Set/Reset the write protection
NYX 0:85b3fd62ea1a 40 (++) Set the Read protection Level
NYX 0:85b3fd62ea1a 41 (++) Set the BOR level
NYX 0:85b3fd62ea1a 42 (++) Program the user Option Bytes
NYX 0:85b3fd62ea1a 43 (#) Advanced Option Bytes Programming functions: Use HAL_FLASHEx_AdvOBProgram() to :
NYX 0:85b3fd62ea1a 44 (++) Extended space (bank 2) erase function
NYX 0:85b3fd62ea1a 45 (++) Full FLASH space (2 Mo) erase (bank 1 and bank 2)
NYX 0:85b3fd62ea1a 46 (++) Dual Boot activation
NYX 0:85b3fd62ea1a 47 (++) Write protection configuration for bank 2
NYX 0:85b3fd62ea1a 48 (++) PCROP protection configuration and control for both banks
NYX 0:85b3fd62ea1a 49
NYX 0:85b3fd62ea1a 50 @endverbatim
NYX 0:85b3fd62ea1a 51 ******************************************************************************
NYX 0:85b3fd62ea1a 52 * @attention
NYX 0:85b3fd62ea1a 53 *
NYX 0:85b3fd62ea1a 54 * <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
NYX 0:85b3fd62ea1a 55 *
NYX 0:85b3fd62ea1a 56 * Redistribution and use in source and binary forms, with or without modification,
NYX 0:85b3fd62ea1a 57 * are permitted provided that the following conditions are met:
NYX 0:85b3fd62ea1a 58 * 1. Redistributions of source code must retain the above copyright notice,
NYX 0:85b3fd62ea1a 59 * this list of conditions and the following disclaimer.
NYX 0:85b3fd62ea1a 60 * 2. Redistributions in binary form must reproduce the above copyright notice,
NYX 0:85b3fd62ea1a 61 * this list of conditions and the following disclaimer in the documentation
NYX 0:85b3fd62ea1a 62 * and/or other materials provided with the distribution.
NYX 0:85b3fd62ea1a 63 * 3. Neither the name of STMicroelectronics nor the names of its contributors
NYX 0:85b3fd62ea1a 64 * may be used to endorse or promote products derived from this software
NYX 0:85b3fd62ea1a 65 * without specific prior written permission.
NYX 0:85b3fd62ea1a 66 *
NYX 0:85b3fd62ea1a 67 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
NYX 0:85b3fd62ea1a 68 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
NYX 0:85b3fd62ea1a 69 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
NYX 0:85b3fd62ea1a 70 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
NYX 0:85b3fd62ea1a 71 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
NYX 0:85b3fd62ea1a 72 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
NYX 0:85b3fd62ea1a 73 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
NYX 0:85b3fd62ea1a 74 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
NYX 0:85b3fd62ea1a 75 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
NYX 0:85b3fd62ea1a 76 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
NYX 0:85b3fd62ea1a 77 *
NYX 0:85b3fd62ea1a 78 ******************************************************************************
NYX 0:85b3fd62ea1a 79 */
NYX 0:85b3fd62ea1a 80
NYX 0:85b3fd62ea1a 81 /* Includes ------------------------------------------------------------------*/
NYX 0:85b3fd62ea1a 82 #include "stm32f4xx_hal.h"
NYX 0:85b3fd62ea1a 83
NYX 0:85b3fd62ea1a 84 /** @addtogroup STM32F4xx_HAL_Driver
NYX 0:85b3fd62ea1a 85 * @{
NYX 0:85b3fd62ea1a 86 */
NYX 0:85b3fd62ea1a 87
NYX 0:85b3fd62ea1a 88 /** @defgroup FLASHEx FLASHEx
NYX 0:85b3fd62ea1a 89 * @brief FLASH HAL Extension module driver
NYX 0:85b3fd62ea1a 90 * @{
NYX 0:85b3fd62ea1a 91 */
NYX 0:85b3fd62ea1a 92
NYX 0:85b3fd62ea1a 93 #ifdef HAL_FLASH_MODULE_ENABLED
NYX 0:85b3fd62ea1a 94
NYX 0:85b3fd62ea1a 95 /* Private typedef -----------------------------------------------------------*/
NYX 0:85b3fd62ea1a 96 /* Private define ------------------------------------------------------------*/
NYX 0:85b3fd62ea1a 97 /** @addtogroup FLASHEx_Private_Constants
NYX 0:85b3fd62ea1a 98 * @{
NYX 0:85b3fd62ea1a 99 */
NYX 0:85b3fd62ea1a 100 #define FLASH_TIMEOUT_VALUE 50000U /* 50 s */
NYX 0:85b3fd62ea1a 101 /**
NYX 0:85b3fd62ea1a 102 * @}
NYX 0:85b3fd62ea1a 103 */
NYX 0:85b3fd62ea1a 104
NYX 0:85b3fd62ea1a 105 /* Private macro -------------------------------------------------------------*/
NYX 0:85b3fd62ea1a 106 /* Private variables ---------------------------------------------------------*/
NYX 0:85b3fd62ea1a 107 /** @addtogroup FLASHEx_Private_Variables
NYX 0:85b3fd62ea1a 108 * @{
NYX 0:85b3fd62ea1a 109 */
NYX 0:85b3fd62ea1a 110 extern FLASH_ProcessTypeDef pFlash;
NYX 0:85b3fd62ea1a 111 /**
NYX 0:85b3fd62ea1a 112 * @}
NYX 0:85b3fd62ea1a 113 */
NYX 0:85b3fd62ea1a 114
NYX 0:85b3fd62ea1a 115 /* Private function prototypes -----------------------------------------------*/
NYX 0:85b3fd62ea1a 116 /** @addtogroup FLASHEx_Private_Functions
NYX 0:85b3fd62ea1a 117 * @{
NYX 0:85b3fd62ea1a 118 */
NYX 0:85b3fd62ea1a 119 /* Option bytes control */
NYX 0:85b3fd62ea1a 120 static void FLASH_MassErase(uint8_t VoltageRange, uint32_t Banks);
NYX 0:85b3fd62ea1a 121 static HAL_StatusTypeDef FLASH_OB_EnableWRP(uint32_t WRPSector, uint32_t Banks);
NYX 0:85b3fd62ea1a 122 static HAL_StatusTypeDef FLASH_OB_DisableWRP(uint32_t WRPSector, uint32_t Banks);
NYX 0:85b3fd62ea1a 123 static HAL_StatusTypeDef FLASH_OB_RDP_LevelConfig(uint8_t Level);
NYX 0:85b3fd62ea1a 124 static HAL_StatusTypeDef FLASH_OB_UserConfig(uint8_t Iwdg, uint8_t Stop, uint8_t Stdby);
NYX 0:85b3fd62ea1a 125 static HAL_StatusTypeDef FLASH_OB_BOR_LevelConfig(uint8_t Level);
NYX 0:85b3fd62ea1a 126 static uint8_t FLASH_OB_GetUser(void);
NYX 0:85b3fd62ea1a 127 static uint16_t FLASH_OB_GetWRP(void);
NYX 0:85b3fd62ea1a 128 static uint8_t FLASH_OB_GetRDP(void);
NYX 0:85b3fd62ea1a 129 static uint8_t FLASH_OB_GetBOR(void);
NYX 0:85b3fd62ea1a 130
NYX 0:85b3fd62ea1a 131 #if defined(STM32F401xC) || defined(STM32F401xE) || defined(STM32F410Tx) || defined(STM32F410Cx) || defined(STM32F410Rx) || defined(STM32F411xE) ||\
NYX 0:85b3fd62ea1a 132 defined(STM32F446xx) || defined(STM32F412Zx) || defined(STM32F412Vx) || defined(STM32F412Rx) || defined(STM32F412Cx) || defined(STM32F413xx) ||\
NYX 0:85b3fd62ea1a 133 defined(STM32F423xx)
NYX 0:85b3fd62ea1a 134 static HAL_StatusTypeDef FLASH_OB_EnablePCROP(uint32_t Sector);
NYX 0:85b3fd62ea1a 135 static HAL_StatusTypeDef FLASH_OB_DisablePCROP(uint32_t Sector);
NYX 0:85b3fd62ea1a 136 #endif /* STM32F401xC || STM32F401xE || STM32F410xx || STM32F411xE || STM32F446xx || STM32F412Zx || STM32F412Vx || STM32F412Rx || STM32F412Cx
NYX 0:85b3fd62ea1a 137 STM32F413xx || STM32F423xx */
NYX 0:85b3fd62ea1a 138
NYX 0:85b3fd62ea1a 139 #if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx)|| defined(STM32F439xx) || defined(STM32F469xx) || defined(STM32F479xx)
NYX 0:85b3fd62ea1a 140 static HAL_StatusTypeDef FLASH_OB_EnablePCROP(uint32_t SectorBank1, uint32_t SectorBank2, uint32_t Banks);
NYX 0:85b3fd62ea1a 141 static HAL_StatusTypeDef FLASH_OB_DisablePCROP(uint32_t SectorBank1, uint32_t SectorBank2, uint32_t Banks);
NYX 0:85b3fd62ea1a 142 static HAL_StatusTypeDef FLASH_OB_BootConfig(uint8_t BootConfig);
NYX 0:85b3fd62ea1a 143 #endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || STM32F469xx || STM32F479xx */
NYX 0:85b3fd62ea1a 144
NYX 0:85b3fd62ea1a 145 extern HAL_StatusTypeDef FLASH_WaitForLastOperation(uint32_t Timeout);
NYX 0:85b3fd62ea1a 146 /**
NYX 0:85b3fd62ea1a 147 * @}
NYX 0:85b3fd62ea1a 148 */
NYX 0:85b3fd62ea1a 149
NYX 0:85b3fd62ea1a 150 /* Exported functions --------------------------------------------------------*/
NYX 0:85b3fd62ea1a 151 /** @defgroup FLASHEx_Exported_Functions FLASHEx Exported Functions
NYX 0:85b3fd62ea1a 152 * @{
NYX 0:85b3fd62ea1a 153 */
NYX 0:85b3fd62ea1a 154
NYX 0:85b3fd62ea1a 155 /** @defgroup FLASHEx_Exported_Functions_Group1 Extended IO operation functions
NYX 0:85b3fd62ea1a 156 * @brief Extended IO operation functions
NYX 0:85b3fd62ea1a 157 *
NYX 0:85b3fd62ea1a 158 @verbatim
NYX 0:85b3fd62ea1a 159 ===============================================================================
NYX 0:85b3fd62ea1a 160 ##### Extended programming operation functions #####
NYX 0:85b3fd62ea1a 161 ===============================================================================
NYX 0:85b3fd62ea1a 162 [..]
NYX 0:85b3fd62ea1a 163 This subsection provides a set of functions allowing to manage the Extension FLASH
NYX 0:85b3fd62ea1a 164 programming operations.
NYX 0:85b3fd62ea1a 165
NYX 0:85b3fd62ea1a 166 @endverbatim
NYX 0:85b3fd62ea1a 167 * @{
NYX 0:85b3fd62ea1a 168 */
NYX 0:85b3fd62ea1a 169 /**
NYX 0:85b3fd62ea1a 170 * @brief Perform a mass erase or erase the specified FLASH memory sectors
NYX 0:85b3fd62ea1a 171 * @param[in] pEraseInit: pointer to an FLASH_EraseInitTypeDef structure that
NYX 0:85b3fd62ea1a 172 * contains the configuration information for the erasing.
NYX 0:85b3fd62ea1a 173 *
NYX 0:85b3fd62ea1a 174 * @param[out] SectorError: pointer to variable that
NYX 0:85b3fd62ea1a 175 * contains the configuration information on faulty sector in case of error
NYX 0:85b3fd62ea1a 176 * (0xFFFFFFFFU means that all the sectors have been correctly erased)
NYX 0:85b3fd62ea1a 177 *
NYX 0:85b3fd62ea1a 178 * @retval HAL Status
NYX 0:85b3fd62ea1a 179 */
NYX 0:85b3fd62ea1a 180 HAL_StatusTypeDef HAL_FLASHEx_Erase(FLASH_EraseInitTypeDef *pEraseInit, uint32_t *SectorError)
NYX 0:85b3fd62ea1a 181 {
NYX 0:85b3fd62ea1a 182 HAL_StatusTypeDef status = HAL_ERROR;
NYX 0:85b3fd62ea1a 183 uint32_t index = 0U;
NYX 0:85b3fd62ea1a 184
NYX 0:85b3fd62ea1a 185 /* Process Locked */
NYX 0:85b3fd62ea1a 186 __HAL_LOCK(&pFlash);
NYX 0:85b3fd62ea1a 187
NYX 0:85b3fd62ea1a 188 /* Check the parameters */
NYX 0:85b3fd62ea1a 189 assert_param(IS_FLASH_TYPEERASE(pEraseInit->TypeErase));
NYX 0:85b3fd62ea1a 190
NYX 0:85b3fd62ea1a 191 /* Wait for last operation to be completed */
NYX 0:85b3fd62ea1a 192 status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE);
NYX 0:85b3fd62ea1a 193
NYX 0:85b3fd62ea1a 194 if(status == HAL_OK)
NYX 0:85b3fd62ea1a 195 {
NYX 0:85b3fd62ea1a 196 /*Initialization of SectorError variable*/
NYX 0:85b3fd62ea1a 197 *SectorError = 0xFFFFFFFFU;
NYX 0:85b3fd62ea1a 198
NYX 0:85b3fd62ea1a 199 if(pEraseInit->TypeErase == FLASH_TYPEERASE_MASSERASE)
NYX 0:85b3fd62ea1a 200 {
NYX 0:85b3fd62ea1a 201 /*Mass erase to be done*/
NYX 0:85b3fd62ea1a 202 FLASH_MassErase((uint8_t) pEraseInit->VoltageRange, pEraseInit->Banks);
NYX 0:85b3fd62ea1a 203
NYX 0:85b3fd62ea1a 204 /* Wait for last operation to be completed */
NYX 0:85b3fd62ea1a 205 status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE);
NYX 0:85b3fd62ea1a 206
NYX 0:85b3fd62ea1a 207 /* if the erase operation is completed, disable the MER Bit */
NYX 0:85b3fd62ea1a 208 FLASH->CR &= (~FLASH_MER_BIT);
NYX 0:85b3fd62ea1a 209 }
NYX 0:85b3fd62ea1a 210 else
NYX 0:85b3fd62ea1a 211 {
NYX 0:85b3fd62ea1a 212 /* Check the parameters */
NYX 0:85b3fd62ea1a 213 assert_param(IS_FLASH_NBSECTORS(pEraseInit->NbSectors + pEraseInit->Sector));
NYX 0:85b3fd62ea1a 214
NYX 0:85b3fd62ea1a 215 /* Erase by sector by sector to be done*/
NYX 0:85b3fd62ea1a 216 for(index = pEraseInit->Sector; index < (pEraseInit->NbSectors + pEraseInit->Sector); index++)
NYX 0:85b3fd62ea1a 217 {
NYX 0:85b3fd62ea1a 218 FLASH_Erase_Sector(index, (uint8_t) pEraseInit->VoltageRange);
NYX 0:85b3fd62ea1a 219
NYX 0:85b3fd62ea1a 220 /* Wait for last operation to be completed */
NYX 0:85b3fd62ea1a 221 status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE);
NYX 0:85b3fd62ea1a 222
NYX 0:85b3fd62ea1a 223 /* If the erase operation is completed, disable the SER and SNB Bits */
NYX 0:85b3fd62ea1a 224 CLEAR_BIT(FLASH->CR, (FLASH_CR_SER | FLASH_CR_SNB));
NYX 0:85b3fd62ea1a 225
NYX 0:85b3fd62ea1a 226 if(status != HAL_OK)
NYX 0:85b3fd62ea1a 227 {
NYX 0:85b3fd62ea1a 228 /* In case of error, stop erase procedure and return the faulty sector*/
NYX 0:85b3fd62ea1a 229 *SectorError = index;
NYX 0:85b3fd62ea1a 230 break;
NYX 0:85b3fd62ea1a 231 }
NYX 0:85b3fd62ea1a 232 }
NYX 0:85b3fd62ea1a 233 }
NYX 0:85b3fd62ea1a 234 /* Flush the caches to be sure of the data consistency */
NYX 0:85b3fd62ea1a 235 FLASH_FlushCaches();
NYX 0:85b3fd62ea1a 236 }
NYX 0:85b3fd62ea1a 237
NYX 0:85b3fd62ea1a 238 /* Process Unlocked */
NYX 0:85b3fd62ea1a 239 __HAL_UNLOCK(&pFlash);
NYX 0:85b3fd62ea1a 240
NYX 0:85b3fd62ea1a 241 return status;
NYX 0:85b3fd62ea1a 242 }
NYX 0:85b3fd62ea1a 243
NYX 0:85b3fd62ea1a 244 /**
NYX 0:85b3fd62ea1a 245 * @brief Perform a mass erase or erase the specified FLASH memory sectors with interrupt enabled
NYX 0:85b3fd62ea1a 246 * @param pEraseInit: pointer to an FLASH_EraseInitTypeDef structure that
NYX 0:85b3fd62ea1a 247 * contains the configuration information for the erasing.
NYX 0:85b3fd62ea1a 248 *
NYX 0:85b3fd62ea1a 249 * @retval HAL Status
NYX 0:85b3fd62ea1a 250 */
NYX 0:85b3fd62ea1a 251 HAL_StatusTypeDef HAL_FLASHEx_Erase_IT(FLASH_EraseInitTypeDef *pEraseInit)
NYX 0:85b3fd62ea1a 252 {
NYX 0:85b3fd62ea1a 253 HAL_StatusTypeDef status = HAL_OK;
NYX 0:85b3fd62ea1a 254
NYX 0:85b3fd62ea1a 255 /* Process Locked */
NYX 0:85b3fd62ea1a 256 __HAL_LOCK(&pFlash);
NYX 0:85b3fd62ea1a 257
NYX 0:85b3fd62ea1a 258 /* Check the parameters */
NYX 0:85b3fd62ea1a 259 assert_param(IS_FLASH_TYPEERASE(pEraseInit->TypeErase));
NYX 0:85b3fd62ea1a 260
NYX 0:85b3fd62ea1a 261 /* Enable End of FLASH Operation interrupt */
NYX 0:85b3fd62ea1a 262 __HAL_FLASH_ENABLE_IT(FLASH_IT_EOP);
NYX 0:85b3fd62ea1a 263
NYX 0:85b3fd62ea1a 264 /* Enable Error source interrupt */
NYX 0:85b3fd62ea1a 265 __HAL_FLASH_ENABLE_IT(FLASH_IT_ERR);
NYX 0:85b3fd62ea1a 266
NYX 0:85b3fd62ea1a 267 /* Clear pending flags (if any) */
NYX 0:85b3fd62ea1a 268 __HAL_FLASH_CLEAR_FLAG(FLASH_FLAG_EOP | FLASH_FLAG_OPERR | FLASH_FLAG_WRPERR |\
NYX 0:85b3fd62ea1a 269 FLASH_FLAG_PGAERR | FLASH_FLAG_PGPERR| FLASH_FLAG_PGSERR);
NYX 0:85b3fd62ea1a 270
NYX 0:85b3fd62ea1a 271 if(pEraseInit->TypeErase == FLASH_TYPEERASE_MASSERASE)
NYX 0:85b3fd62ea1a 272 {
NYX 0:85b3fd62ea1a 273 /*Mass erase to be done*/
NYX 0:85b3fd62ea1a 274 pFlash.ProcedureOnGoing = FLASH_PROC_MASSERASE;
NYX 0:85b3fd62ea1a 275 pFlash.Bank = pEraseInit->Banks;
NYX 0:85b3fd62ea1a 276 FLASH_MassErase((uint8_t) pEraseInit->VoltageRange, pEraseInit->Banks);
NYX 0:85b3fd62ea1a 277 }
NYX 0:85b3fd62ea1a 278 else
NYX 0:85b3fd62ea1a 279 {
NYX 0:85b3fd62ea1a 280 /* Erase by sector to be done*/
NYX 0:85b3fd62ea1a 281
NYX 0:85b3fd62ea1a 282 /* Check the parameters */
NYX 0:85b3fd62ea1a 283 assert_param(IS_FLASH_NBSECTORS(pEraseInit->NbSectors + pEraseInit->Sector));
NYX 0:85b3fd62ea1a 284
NYX 0:85b3fd62ea1a 285 pFlash.ProcedureOnGoing = FLASH_PROC_SECTERASE;
NYX 0:85b3fd62ea1a 286 pFlash.NbSectorsToErase = pEraseInit->NbSectors;
NYX 0:85b3fd62ea1a 287 pFlash.Sector = pEraseInit->Sector;
NYX 0:85b3fd62ea1a 288 pFlash.VoltageForErase = (uint8_t)pEraseInit->VoltageRange;
NYX 0:85b3fd62ea1a 289
NYX 0:85b3fd62ea1a 290 /*Erase 1st sector and wait for IT*/
NYX 0:85b3fd62ea1a 291 FLASH_Erase_Sector(pEraseInit->Sector, pEraseInit->VoltageRange);
NYX 0:85b3fd62ea1a 292 }
NYX 0:85b3fd62ea1a 293
NYX 0:85b3fd62ea1a 294 return status;
NYX 0:85b3fd62ea1a 295 }
NYX 0:85b3fd62ea1a 296
NYX 0:85b3fd62ea1a 297 /**
NYX 0:85b3fd62ea1a 298 * @brief Program option bytes
NYX 0:85b3fd62ea1a 299 * @param pOBInit: pointer to an FLASH_OBInitStruct structure that
NYX 0:85b3fd62ea1a 300 * contains the configuration information for the programming.
NYX 0:85b3fd62ea1a 301 *
NYX 0:85b3fd62ea1a 302 * @retval HAL Status
NYX 0:85b3fd62ea1a 303 */
NYX 0:85b3fd62ea1a 304 HAL_StatusTypeDef HAL_FLASHEx_OBProgram(FLASH_OBProgramInitTypeDef *pOBInit)
NYX 0:85b3fd62ea1a 305 {
NYX 0:85b3fd62ea1a 306 HAL_StatusTypeDef status = HAL_ERROR;
NYX 0:85b3fd62ea1a 307
NYX 0:85b3fd62ea1a 308 /* Process Locked */
NYX 0:85b3fd62ea1a 309 __HAL_LOCK(&pFlash);
NYX 0:85b3fd62ea1a 310
NYX 0:85b3fd62ea1a 311 /* Check the parameters */
NYX 0:85b3fd62ea1a 312 assert_param(IS_OPTIONBYTE(pOBInit->OptionType));
NYX 0:85b3fd62ea1a 313
NYX 0:85b3fd62ea1a 314 /*Write protection configuration*/
NYX 0:85b3fd62ea1a 315 if((pOBInit->OptionType & OPTIONBYTE_WRP) == OPTIONBYTE_WRP)
NYX 0:85b3fd62ea1a 316 {
NYX 0:85b3fd62ea1a 317 assert_param(IS_WRPSTATE(pOBInit->WRPState));
NYX 0:85b3fd62ea1a 318 if(pOBInit->WRPState == OB_WRPSTATE_ENABLE)
NYX 0:85b3fd62ea1a 319 {
NYX 0:85b3fd62ea1a 320 /*Enable of Write protection on the selected Sector*/
NYX 0:85b3fd62ea1a 321 status = FLASH_OB_EnableWRP(pOBInit->WRPSector, pOBInit->Banks);
NYX 0:85b3fd62ea1a 322 }
NYX 0:85b3fd62ea1a 323 else
NYX 0:85b3fd62ea1a 324 {
NYX 0:85b3fd62ea1a 325 /*Disable of Write protection on the selected Sector*/
NYX 0:85b3fd62ea1a 326 status = FLASH_OB_DisableWRP(pOBInit->WRPSector, pOBInit->Banks);
NYX 0:85b3fd62ea1a 327 }
NYX 0:85b3fd62ea1a 328 }
NYX 0:85b3fd62ea1a 329
NYX 0:85b3fd62ea1a 330 /*Read protection configuration*/
NYX 0:85b3fd62ea1a 331 if((pOBInit->OptionType & OPTIONBYTE_RDP) == OPTIONBYTE_RDP)
NYX 0:85b3fd62ea1a 332 {
NYX 0:85b3fd62ea1a 333 status = FLASH_OB_RDP_LevelConfig(pOBInit->RDPLevel);
NYX 0:85b3fd62ea1a 334 }
NYX 0:85b3fd62ea1a 335
NYX 0:85b3fd62ea1a 336 /*USER configuration*/
NYX 0:85b3fd62ea1a 337 if((pOBInit->OptionType & OPTIONBYTE_USER) == OPTIONBYTE_USER)
NYX 0:85b3fd62ea1a 338 {
NYX 0:85b3fd62ea1a 339 status = FLASH_OB_UserConfig(pOBInit->USERConfig&OB_IWDG_SW,
NYX 0:85b3fd62ea1a 340 pOBInit->USERConfig&OB_STOP_NO_RST,
NYX 0:85b3fd62ea1a 341 pOBInit->USERConfig&OB_STDBY_NO_RST);
NYX 0:85b3fd62ea1a 342 }
NYX 0:85b3fd62ea1a 343
NYX 0:85b3fd62ea1a 344 /*BOR Level configuration*/
NYX 0:85b3fd62ea1a 345 if((pOBInit->OptionType & OPTIONBYTE_BOR) == OPTIONBYTE_BOR)
NYX 0:85b3fd62ea1a 346 {
NYX 0:85b3fd62ea1a 347 status = FLASH_OB_BOR_LevelConfig(pOBInit->BORLevel);
NYX 0:85b3fd62ea1a 348 }
NYX 0:85b3fd62ea1a 349
NYX 0:85b3fd62ea1a 350 /* Process Unlocked */
NYX 0:85b3fd62ea1a 351 __HAL_UNLOCK(&pFlash);
NYX 0:85b3fd62ea1a 352
NYX 0:85b3fd62ea1a 353 return status;
NYX 0:85b3fd62ea1a 354 }
NYX 0:85b3fd62ea1a 355
NYX 0:85b3fd62ea1a 356 /**
NYX 0:85b3fd62ea1a 357 * @brief Get the Option byte configuration
NYX 0:85b3fd62ea1a 358 * @param pOBInit: pointer to an FLASH_OBInitStruct structure that
NYX 0:85b3fd62ea1a 359 * contains the configuration information for the programming.
NYX 0:85b3fd62ea1a 360 *
NYX 0:85b3fd62ea1a 361 * @retval None
NYX 0:85b3fd62ea1a 362 */
NYX 0:85b3fd62ea1a 363 void HAL_FLASHEx_OBGetConfig(FLASH_OBProgramInitTypeDef *pOBInit)
NYX 0:85b3fd62ea1a 364 {
NYX 0:85b3fd62ea1a 365 pOBInit->OptionType = OPTIONBYTE_WRP | OPTIONBYTE_RDP | OPTIONBYTE_USER | OPTIONBYTE_BOR;
NYX 0:85b3fd62ea1a 366
NYX 0:85b3fd62ea1a 367 /*Get WRP*/
NYX 0:85b3fd62ea1a 368 pOBInit->WRPSector = (uint32_t)FLASH_OB_GetWRP();
NYX 0:85b3fd62ea1a 369
NYX 0:85b3fd62ea1a 370 /*Get RDP Level*/
NYX 0:85b3fd62ea1a 371 pOBInit->RDPLevel = (uint32_t)FLASH_OB_GetRDP();
NYX 0:85b3fd62ea1a 372
NYX 0:85b3fd62ea1a 373 /*Get USER*/
NYX 0:85b3fd62ea1a 374 pOBInit->USERConfig = (uint8_t)FLASH_OB_GetUser();
NYX 0:85b3fd62ea1a 375
NYX 0:85b3fd62ea1a 376 /*Get BOR Level*/
NYX 0:85b3fd62ea1a 377 pOBInit->BORLevel = (uint32_t)FLASH_OB_GetBOR();
NYX 0:85b3fd62ea1a 378 }
NYX 0:85b3fd62ea1a 379
NYX 0:85b3fd62ea1a 380 #if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx) ||\
NYX 0:85b3fd62ea1a 381 defined(STM32F401xC) || defined(STM32F401xE) || defined(STM32F410Tx) || defined(STM32F410Cx) ||\
NYX 0:85b3fd62ea1a 382 defined(STM32F410Rx) || defined(STM32F411xE) || defined(STM32F446xx) || defined(STM32F469xx) ||\
NYX 0:85b3fd62ea1a 383 defined(STM32F479xx) || defined(STM32F412Zx) || defined(STM32F412Vx) || defined(STM32F412Rx) ||\
NYX 0:85b3fd62ea1a 384 defined(STM32F412Cx) || defined(STM32F413xx) || defined(STM32F423xx)
NYX 0:85b3fd62ea1a 385 /**
NYX 0:85b3fd62ea1a 386 * @brief Program option bytes
NYX 0:85b3fd62ea1a 387 * @param pAdvOBInit: pointer to an FLASH_AdvOBProgramInitTypeDef structure that
NYX 0:85b3fd62ea1a 388 * contains the configuration information for the programming.
NYX 0:85b3fd62ea1a 389 *
NYX 0:85b3fd62ea1a 390 * @retval HAL Status
NYX 0:85b3fd62ea1a 391 */
NYX 0:85b3fd62ea1a 392 HAL_StatusTypeDef HAL_FLASHEx_AdvOBProgram (FLASH_AdvOBProgramInitTypeDef *pAdvOBInit)
NYX 0:85b3fd62ea1a 393 {
NYX 0:85b3fd62ea1a 394 HAL_StatusTypeDef status = HAL_ERROR;
NYX 0:85b3fd62ea1a 395
NYX 0:85b3fd62ea1a 396 /* Check the parameters */
NYX 0:85b3fd62ea1a 397 assert_param(IS_OBEX(pAdvOBInit->OptionType));
NYX 0:85b3fd62ea1a 398
NYX 0:85b3fd62ea1a 399 /*Program PCROP option byte*/
NYX 0:85b3fd62ea1a 400 if(((pAdvOBInit->OptionType) & OPTIONBYTE_PCROP) == OPTIONBYTE_PCROP)
NYX 0:85b3fd62ea1a 401 {
NYX 0:85b3fd62ea1a 402 /* Check the parameters */
NYX 0:85b3fd62ea1a 403 assert_param(IS_PCROPSTATE(pAdvOBInit->PCROPState));
NYX 0:85b3fd62ea1a 404 if((pAdvOBInit->PCROPState) == OB_PCROP_STATE_ENABLE)
NYX 0:85b3fd62ea1a 405 {
NYX 0:85b3fd62ea1a 406 /*Enable of Write protection on the selected Sector*/
NYX 0:85b3fd62ea1a 407 #if defined(STM32F401xC) || defined(STM32F401xE) || defined(STM32F410Tx) || defined(STM32F410Cx) || defined(STM32F410Rx) ||\
NYX 0:85b3fd62ea1a 408 defined(STM32F411xE) || defined(STM32F446xx) || defined(STM32F412Zx) || defined(STM32F412Vx) || defined(STM32F412Rx) ||\
NYX 0:85b3fd62ea1a 409 defined(STM32F412Cx) || defined(STM32F413xx) || defined(STM32F423xx)
NYX 0:85b3fd62ea1a 410 status = FLASH_OB_EnablePCROP(pAdvOBInit->Sectors);
NYX 0:85b3fd62ea1a 411 #else /* STM32F427xx || STM32F437xx || STM32F429xx|| STM32F439xx || STM32F469xx || STM32F479xx */
NYX 0:85b3fd62ea1a 412 status = FLASH_OB_EnablePCROP(pAdvOBInit->SectorsBank1, pAdvOBInit->SectorsBank2, pAdvOBInit->Banks);
NYX 0:85b3fd62ea1a 413 #endif /* STM32F401xC || STM32F401xE || STM32F410xx || STM32F411xE || STM32F446xx || STM32F412Zx || STM32F412Vx || STM32F412Rx || STM32F412Cx ||
NYX 0:85b3fd62ea1a 414 STM32F413xx || STM32F423xx */
NYX 0:85b3fd62ea1a 415 }
NYX 0:85b3fd62ea1a 416 else
NYX 0:85b3fd62ea1a 417 {
NYX 0:85b3fd62ea1a 418 /*Disable of Write protection on the selected Sector*/
NYX 0:85b3fd62ea1a 419 #if defined(STM32F401xC) || defined(STM32F401xE) || defined(STM32F410Tx) || defined(STM32F410Cx) || defined(STM32F410Rx) ||\
NYX 0:85b3fd62ea1a 420 defined(STM32F411xE) || defined(STM32F446xx) || defined(STM32F412Zx) || defined(STM32F412Vx) || defined(STM32F412Rx) ||\
NYX 0:85b3fd62ea1a 421 defined(STM32F412Cx) || defined(STM32F413xx) || defined(STM32F423xx)
NYX 0:85b3fd62ea1a 422 status = FLASH_OB_DisablePCROP(pAdvOBInit->Sectors);
NYX 0:85b3fd62ea1a 423 #else /* STM32F427xx || STM32F437xx || STM32F429xx|| STM32F439xx || STM32F469xx || STM32F479xx */
NYX 0:85b3fd62ea1a 424 status = FLASH_OB_DisablePCROP(pAdvOBInit->SectorsBank1, pAdvOBInit->SectorsBank2, pAdvOBInit->Banks);
NYX 0:85b3fd62ea1a 425 #endif /* STM32F401xC || STM32F401xE || STM32F410xx || STM32F411xE || STM32F446xx || STM32F412Zx || STM32F412Vx || STM32F412Rx || STM32F412Cx ||
NYX 0:85b3fd62ea1a 426 STM32F413xx || STM32F423xx */
NYX 0:85b3fd62ea1a 427 }
NYX 0:85b3fd62ea1a 428 }
NYX 0:85b3fd62ea1a 429
NYX 0:85b3fd62ea1a 430 #if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx) || defined(STM32F469xx) || defined(STM32F479xx)
NYX 0:85b3fd62ea1a 431 /*Program BOOT config option byte*/
NYX 0:85b3fd62ea1a 432 if(((pAdvOBInit->OptionType) & OPTIONBYTE_BOOTCONFIG) == OPTIONBYTE_BOOTCONFIG)
NYX 0:85b3fd62ea1a 433 {
NYX 0:85b3fd62ea1a 434 status = FLASH_OB_BootConfig(pAdvOBInit->BootConfig);
NYX 0:85b3fd62ea1a 435 }
NYX 0:85b3fd62ea1a 436 #endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || STM32F469xx || STM32F479xx */
NYX 0:85b3fd62ea1a 437
NYX 0:85b3fd62ea1a 438 return status;
NYX 0:85b3fd62ea1a 439 }
NYX 0:85b3fd62ea1a 440
NYX 0:85b3fd62ea1a 441 /**
NYX 0:85b3fd62ea1a 442 * @brief Get the OBEX byte configuration
NYX 0:85b3fd62ea1a 443 * @param pAdvOBInit: pointer to an FLASH_AdvOBProgramInitTypeDef structure that
NYX 0:85b3fd62ea1a 444 * contains the configuration information for the programming.
NYX 0:85b3fd62ea1a 445 *
NYX 0:85b3fd62ea1a 446 * @retval None
NYX 0:85b3fd62ea1a 447 */
NYX 0:85b3fd62ea1a 448 void HAL_FLASHEx_AdvOBGetConfig(FLASH_AdvOBProgramInitTypeDef *pAdvOBInit)
NYX 0:85b3fd62ea1a 449 {
NYX 0:85b3fd62ea1a 450 #if defined(STM32F401xC) || defined(STM32F401xE) || defined(STM32F410Tx) || defined(STM32F410Cx) || defined(STM32F410Rx) ||\
NYX 0:85b3fd62ea1a 451 defined(STM32F411xE) || defined(STM32F446xx) || defined(STM32F412Zx) || defined(STM32F412Vx) || defined(STM32F412Rx) ||\
NYX 0:85b3fd62ea1a 452 defined(STM32F412Cx) || defined(STM32F413xx) || defined(STM32F423xx)
NYX 0:85b3fd62ea1a 453 /*Get Sector*/
NYX 0:85b3fd62ea1a 454 pAdvOBInit->Sectors = (*(__IO uint16_t *)(OPTCR_BYTE2_ADDRESS));
NYX 0:85b3fd62ea1a 455 #else /* STM32F427xx || STM32F437xx || STM32F429xx|| STM32F439xx || STM32F469xx || STM32F479xx */
NYX 0:85b3fd62ea1a 456 /*Get Sector for Bank1*/
NYX 0:85b3fd62ea1a 457 pAdvOBInit->SectorsBank1 = (*(__IO uint16_t *)(OPTCR_BYTE2_ADDRESS));
NYX 0:85b3fd62ea1a 458
NYX 0:85b3fd62ea1a 459 /*Get Sector for Bank2*/
NYX 0:85b3fd62ea1a 460 pAdvOBInit->SectorsBank2 = (*(__IO uint16_t *)(OPTCR1_BYTE2_ADDRESS));
NYX 0:85b3fd62ea1a 461
NYX 0:85b3fd62ea1a 462 /*Get Boot config OB*/
NYX 0:85b3fd62ea1a 463 pAdvOBInit->BootConfig = *(__IO uint8_t *)OPTCR_BYTE0_ADDRESS;
NYX 0:85b3fd62ea1a 464 #endif /* STM32F401xC || STM32F401xE || STM32F410xx || STM32F411xE || STM32F446xx || STM32F412Zx || STM32F412Vx || STM32F412Rx || STM32F412Cx ||
NYX 0:85b3fd62ea1a 465 STM32F413xx || STM32F423xx */
NYX 0:85b3fd62ea1a 466 }
NYX 0:85b3fd62ea1a 467
NYX 0:85b3fd62ea1a 468 /**
NYX 0:85b3fd62ea1a 469 * @brief Select the Protection Mode
NYX 0:85b3fd62ea1a 470 *
NYX 0:85b3fd62ea1a 471 * @note After PCROP activated Option Byte modification NOT POSSIBLE! excepted
NYX 0:85b3fd62ea1a 472 * Global Read Out Protection modification (from level1 to level0)
NYX 0:85b3fd62ea1a 473 * @note Once SPRMOD bit is active unprotection of a protected sector is not possible
NYX 0:85b3fd62ea1a 474 * @note Read a protected sector will set RDERR Flag and write a protected sector will set WRPERR Flag
NYX 0:85b3fd62ea1a 475 * @note This function can be used only for STM32F42xxx/STM32F43xxx/STM32F401xx/STM32F411xx/STM32F446xx/
NYX 0:85b3fd62ea1a 476 * STM32F469xx/STM32F479xx/STM32F412xx/STM32F413xx devices.
NYX 0:85b3fd62ea1a 477 *
NYX 0:85b3fd62ea1a 478 * @retval HAL Status
NYX 0:85b3fd62ea1a 479 */
NYX 0:85b3fd62ea1a 480 HAL_StatusTypeDef HAL_FLASHEx_OB_SelectPCROP(void)
NYX 0:85b3fd62ea1a 481 {
NYX 0:85b3fd62ea1a 482 uint8_t optiontmp = 0xFF;
NYX 0:85b3fd62ea1a 483
NYX 0:85b3fd62ea1a 484 /* Mask SPRMOD bit */
NYX 0:85b3fd62ea1a 485 optiontmp = (uint8_t)((*(__IO uint8_t *)OPTCR_BYTE3_ADDRESS) & (uint8_t)0x7F);
NYX 0:85b3fd62ea1a 486
NYX 0:85b3fd62ea1a 487 /* Update Option Byte */
NYX 0:85b3fd62ea1a 488 *(__IO uint8_t *)OPTCR_BYTE3_ADDRESS = (uint8_t)(OB_PCROP_SELECTED | optiontmp);
NYX 0:85b3fd62ea1a 489
NYX 0:85b3fd62ea1a 490 return HAL_OK;
NYX 0:85b3fd62ea1a 491 }
NYX 0:85b3fd62ea1a 492
NYX 0:85b3fd62ea1a 493 /**
NYX 0:85b3fd62ea1a 494 * @brief Deselect the Protection Mode
NYX 0:85b3fd62ea1a 495 *
NYX 0:85b3fd62ea1a 496 * @note After PCROP activated Option Byte modification NOT POSSIBLE! excepted
NYX 0:85b3fd62ea1a 497 * Global Read Out Protection modification (from level1 to level0)
NYX 0:85b3fd62ea1a 498 * @note Once SPRMOD bit is active unprotection of a protected sector is not possible
NYX 0:85b3fd62ea1a 499 * @note Read a protected sector will set RDERR Flag and write a protected sector will set WRPERR Flag
NYX 0:85b3fd62ea1a 500 * @note This function can be used only for STM32F42xxx/STM32F43xxx/STM32F401xx/STM32F411xx/STM32F446xx/
NYX 0:85b3fd62ea1a 501 * STM32F469xx/STM32F479xx/STM32F412xx/STM32F413xx devices.
NYX 0:85b3fd62ea1a 502 *
NYX 0:85b3fd62ea1a 503 * @retval HAL Status
NYX 0:85b3fd62ea1a 504 */
NYX 0:85b3fd62ea1a 505 HAL_StatusTypeDef HAL_FLASHEx_OB_DeSelectPCROP(void)
NYX 0:85b3fd62ea1a 506 {
NYX 0:85b3fd62ea1a 507 uint8_t optiontmp = 0xFF;
NYX 0:85b3fd62ea1a 508
NYX 0:85b3fd62ea1a 509 /* Mask SPRMOD bit */
NYX 0:85b3fd62ea1a 510 optiontmp = (uint8_t)((*(__IO uint8_t *)OPTCR_BYTE3_ADDRESS) & (uint8_t)0x7F);
NYX 0:85b3fd62ea1a 511
NYX 0:85b3fd62ea1a 512 /* Update Option Byte */
NYX 0:85b3fd62ea1a 513 *(__IO uint8_t *)OPTCR_BYTE3_ADDRESS = (uint8_t)(OB_PCROP_DESELECTED | optiontmp);
NYX 0:85b3fd62ea1a 514
NYX 0:85b3fd62ea1a 515 return HAL_OK;
NYX 0:85b3fd62ea1a 516 }
NYX 0:85b3fd62ea1a 517 #endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || STM32F401xC || STM32F401xE || STM32F410xx ||\
NYX 0:85b3fd62ea1a 518 STM32F411xE || STM32F469xx || STM32F479xx || STM32F412Zx || STM32F412Vx || STM32F412Rx || STM32F412Cx ||
NYX 0:85b3fd62ea1a 519 STM32F413xx || STM32F423xx */
NYX 0:85b3fd62ea1a 520
NYX 0:85b3fd62ea1a 521 #if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx)|| defined(STM32F439xx) || defined(STM32F469xx) || defined(STM32F479xx)
NYX 0:85b3fd62ea1a 522 /**
NYX 0:85b3fd62ea1a 523 * @brief Returns the FLASH Write Protection Option Bytes value for Bank 2
NYX 0:85b3fd62ea1a 524 * @note This function can be used only for STM32F42xxx/STM32F43xxx/STM32F469xx/STM32F479xx devices.
NYX 0:85b3fd62ea1a 525 * @retval The FLASH Write Protection Option Bytes value
NYX 0:85b3fd62ea1a 526 */
NYX 0:85b3fd62ea1a 527 uint16_t HAL_FLASHEx_OB_GetBank2WRP(void)
NYX 0:85b3fd62ea1a 528 {
NYX 0:85b3fd62ea1a 529 /* Return the FLASH write protection Register value */
NYX 0:85b3fd62ea1a 530 return (*(__IO uint16_t *)(OPTCR1_BYTE2_ADDRESS));
NYX 0:85b3fd62ea1a 531 }
NYX 0:85b3fd62ea1a 532 #endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || STM32F469xx || STM32F479xx */
NYX 0:85b3fd62ea1a 533
NYX 0:85b3fd62ea1a 534 /**
NYX 0:85b3fd62ea1a 535 * @}
NYX 0:85b3fd62ea1a 536 */
NYX 0:85b3fd62ea1a 537
NYX 0:85b3fd62ea1a 538 #if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx) || defined(STM32F469xx) || defined(STM32F479xx)
NYX 0:85b3fd62ea1a 539 /**
NYX 0:85b3fd62ea1a 540 * @brief Full erase of FLASH memory sectors
NYX 0:85b3fd62ea1a 541 * @param VoltageRange: The device voltage range which defines the erase parallelism.
NYX 0:85b3fd62ea1a 542 * This parameter can be one of the following values:
NYX 0:85b3fd62ea1a 543 * @arg FLASH_VOLTAGE_RANGE_1: when the device voltage range is 1.8V to 2.1V,
NYX 0:85b3fd62ea1a 544 * the operation will be done by byte (8-bit)
NYX 0:85b3fd62ea1a 545 * @arg FLASH_VOLTAGE_RANGE_2: when the device voltage range is 2.1V to 2.7V,
NYX 0:85b3fd62ea1a 546 * the operation will be done by half word (16-bit)
NYX 0:85b3fd62ea1a 547 * @arg FLASH_VOLTAGE_RANGE_3: when the device voltage range is 2.7V to 3.6V,
NYX 0:85b3fd62ea1a 548 * the operation will be done by word (32-bit)
NYX 0:85b3fd62ea1a 549 * @arg FLASH_VOLTAGE_RANGE_4: when the device voltage range is 2.7V to 3.6V + External Vpp,
NYX 0:85b3fd62ea1a 550 * the operation will be done by double word (64-bit)
NYX 0:85b3fd62ea1a 551 *
NYX 0:85b3fd62ea1a 552 * @param Banks: Banks to be erased
NYX 0:85b3fd62ea1a 553 * This parameter can be one of the following values:
NYX 0:85b3fd62ea1a 554 * @arg FLASH_BANK_1: Bank1 to be erased
NYX 0:85b3fd62ea1a 555 * @arg FLASH_BANK_2: Bank2 to be erased
NYX 0:85b3fd62ea1a 556 * @arg FLASH_BANK_BOTH: Bank1 and Bank2 to be erased
NYX 0:85b3fd62ea1a 557 *
NYX 0:85b3fd62ea1a 558 * @retval HAL Status
NYX 0:85b3fd62ea1a 559 */
NYX 0:85b3fd62ea1a 560 static void FLASH_MassErase(uint8_t VoltageRange, uint32_t Banks)
NYX 0:85b3fd62ea1a 561 {
NYX 0:85b3fd62ea1a 562 /* Check the parameters */
NYX 0:85b3fd62ea1a 563 assert_param(IS_VOLTAGERANGE(VoltageRange));
NYX 0:85b3fd62ea1a 564 assert_param(IS_FLASH_BANK(Banks));
NYX 0:85b3fd62ea1a 565
NYX 0:85b3fd62ea1a 566 /* if the previous operation is completed, proceed to erase all sectors */
NYX 0:85b3fd62ea1a 567 CLEAR_BIT(FLASH->CR, FLASH_CR_PSIZE);
NYX 0:85b3fd62ea1a 568
NYX 0:85b3fd62ea1a 569 if(Banks == FLASH_BANK_BOTH)
NYX 0:85b3fd62ea1a 570 {
NYX 0:85b3fd62ea1a 571 /* bank1 & bank2 will be erased*/
NYX 0:85b3fd62ea1a 572 FLASH->CR |= FLASH_MER_BIT;
NYX 0:85b3fd62ea1a 573 }
NYX 0:85b3fd62ea1a 574 else if(Banks == FLASH_BANK_1)
NYX 0:85b3fd62ea1a 575 {
NYX 0:85b3fd62ea1a 576 /*Only bank1 will be erased*/
NYX 0:85b3fd62ea1a 577 FLASH->CR |= FLASH_CR_MER1;
NYX 0:85b3fd62ea1a 578 }
NYX 0:85b3fd62ea1a 579 else
NYX 0:85b3fd62ea1a 580 {
NYX 0:85b3fd62ea1a 581 /*Only bank2 will be erased*/
NYX 0:85b3fd62ea1a 582 FLASH->CR |= FLASH_CR_MER2;
NYX 0:85b3fd62ea1a 583 }
NYX 0:85b3fd62ea1a 584 FLASH->CR |= FLASH_CR_STRT | ((uint32_t)VoltageRange <<8U);
NYX 0:85b3fd62ea1a 585 }
NYX 0:85b3fd62ea1a 586
NYX 0:85b3fd62ea1a 587 /**
NYX 0:85b3fd62ea1a 588 * @brief Erase the specified FLASH memory sector
NYX 0:85b3fd62ea1a 589 * @param Sector: FLASH sector to erase
NYX 0:85b3fd62ea1a 590 * The value of this parameter depend on device used within the same series
NYX 0:85b3fd62ea1a 591 * @param VoltageRange: The device voltage range which defines the erase parallelism.
NYX 0:85b3fd62ea1a 592 * This parameter can be one of the following values:
NYX 0:85b3fd62ea1a 593 * @arg FLASH_VOLTAGE_RANGE_1: when the device voltage range is 1.8V to 2.1V,
NYX 0:85b3fd62ea1a 594 * the operation will be done by byte (8-bit)
NYX 0:85b3fd62ea1a 595 * @arg FLASH_VOLTAGE_RANGE_2: when the device voltage range is 2.1V to 2.7V,
NYX 0:85b3fd62ea1a 596 * the operation will be done by half word (16-bit)
NYX 0:85b3fd62ea1a 597 * @arg FLASH_VOLTAGE_RANGE_3: when the device voltage range is 2.7V to 3.6V,
NYX 0:85b3fd62ea1a 598 * the operation will be done by word (32-bit)
NYX 0:85b3fd62ea1a 599 * @arg FLASH_VOLTAGE_RANGE_4: when the device voltage range is 2.7V to 3.6V + External Vpp,
NYX 0:85b3fd62ea1a 600 * the operation will be done by double word (64-bit)
NYX 0:85b3fd62ea1a 601 *
NYX 0:85b3fd62ea1a 602 * @retval None
NYX 0:85b3fd62ea1a 603 */
NYX 0:85b3fd62ea1a 604 void FLASH_Erase_Sector(uint32_t Sector, uint8_t VoltageRange)
NYX 0:85b3fd62ea1a 605 {
NYX 0:85b3fd62ea1a 606 uint32_t tmp_psize = 0U;
NYX 0:85b3fd62ea1a 607
NYX 0:85b3fd62ea1a 608 /* Check the parameters */
NYX 0:85b3fd62ea1a 609 assert_param(IS_FLASH_SECTOR(Sector));
NYX 0:85b3fd62ea1a 610 assert_param(IS_VOLTAGERANGE(VoltageRange));
NYX 0:85b3fd62ea1a 611
NYX 0:85b3fd62ea1a 612 if(VoltageRange == FLASH_VOLTAGE_RANGE_1)
NYX 0:85b3fd62ea1a 613 {
NYX 0:85b3fd62ea1a 614 tmp_psize = FLASH_PSIZE_BYTE;
NYX 0:85b3fd62ea1a 615 }
NYX 0:85b3fd62ea1a 616 else if(VoltageRange == FLASH_VOLTAGE_RANGE_2)
NYX 0:85b3fd62ea1a 617 {
NYX 0:85b3fd62ea1a 618 tmp_psize = FLASH_PSIZE_HALF_WORD;
NYX 0:85b3fd62ea1a 619 }
NYX 0:85b3fd62ea1a 620 else if(VoltageRange == FLASH_VOLTAGE_RANGE_3)
NYX 0:85b3fd62ea1a 621 {
NYX 0:85b3fd62ea1a 622 tmp_psize = FLASH_PSIZE_WORD;
NYX 0:85b3fd62ea1a 623 }
NYX 0:85b3fd62ea1a 624 else
NYX 0:85b3fd62ea1a 625 {
NYX 0:85b3fd62ea1a 626 tmp_psize = FLASH_PSIZE_DOUBLE_WORD;
NYX 0:85b3fd62ea1a 627 }
NYX 0:85b3fd62ea1a 628
NYX 0:85b3fd62ea1a 629 /* Need to add offset of 4 when sector higher than FLASH_SECTOR_11 */
NYX 0:85b3fd62ea1a 630 if(Sector > FLASH_SECTOR_11)
NYX 0:85b3fd62ea1a 631 {
NYX 0:85b3fd62ea1a 632 Sector += 4U;
NYX 0:85b3fd62ea1a 633 }
NYX 0:85b3fd62ea1a 634 /* If the previous operation is completed, proceed to erase the sector */
NYX 0:85b3fd62ea1a 635 CLEAR_BIT(FLASH->CR, FLASH_CR_PSIZE);
NYX 0:85b3fd62ea1a 636 FLASH->CR |= tmp_psize;
NYX 0:85b3fd62ea1a 637 CLEAR_BIT(FLASH->CR, FLASH_CR_SNB);
NYX 0:85b3fd62ea1a 638 FLASH->CR |= FLASH_CR_SER | (Sector << POSITION_VAL(FLASH_CR_SNB));
NYX 0:85b3fd62ea1a 639 FLASH->CR |= FLASH_CR_STRT;
NYX 0:85b3fd62ea1a 640 }
NYX 0:85b3fd62ea1a 641
NYX 0:85b3fd62ea1a 642 /**
NYX 0:85b3fd62ea1a 643 * @brief Enable the write protection of the desired bank1 or bank 2 sectors
NYX 0:85b3fd62ea1a 644 *
NYX 0:85b3fd62ea1a 645 * @note When the memory read protection level is selected (RDP level = 1),
NYX 0:85b3fd62ea1a 646 * it is not possible to program or erase the flash sector i if CortexM4
NYX 0:85b3fd62ea1a 647 * debug features are connected or boot code is executed in RAM, even if nWRPi = 1
NYX 0:85b3fd62ea1a 648 * @note Active value of nWRPi bits is inverted when PCROP mode is active (SPRMOD =1).
NYX 0:85b3fd62ea1a 649 *
NYX 0:85b3fd62ea1a 650 * @param WRPSector: specifies the sector(s) to be write protected.
NYX 0:85b3fd62ea1a 651 * This parameter can be one of the following values:
NYX 0:85b3fd62ea1a 652 * @arg WRPSector: A value between OB_WRP_SECTOR_0 and OB_WRP_SECTOR_23
NYX 0:85b3fd62ea1a 653 * @arg OB_WRP_SECTOR_All
NYX 0:85b3fd62ea1a 654 * @note BANK2 starts from OB_WRP_SECTOR_12
NYX 0:85b3fd62ea1a 655 *
NYX 0:85b3fd62ea1a 656 * @param Banks: Enable write protection on all the sectors for the specific bank
NYX 0:85b3fd62ea1a 657 * This parameter can be one of the following values:
NYX 0:85b3fd62ea1a 658 * @arg FLASH_BANK_1: WRP on all sectors of bank1
NYX 0:85b3fd62ea1a 659 * @arg FLASH_BANK_2: WRP on all sectors of bank2
NYX 0:85b3fd62ea1a 660 * @arg FLASH_BANK_BOTH: WRP on all sectors of bank1 & bank2
NYX 0:85b3fd62ea1a 661 *
NYX 0:85b3fd62ea1a 662 * @retval HAL FLASH State
NYX 0:85b3fd62ea1a 663 */
NYX 0:85b3fd62ea1a 664 static HAL_StatusTypeDef FLASH_OB_EnableWRP(uint32_t WRPSector, uint32_t Banks)
NYX 0:85b3fd62ea1a 665 {
NYX 0:85b3fd62ea1a 666 HAL_StatusTypeDef status = HAL_OK;
NYX 0:85b3fd62ea1a 667
NYX 0:85b3fd62ea1a 668 /* Check the parameters */
NYX 0:85b3fd62ea1a 669 assert_param(IS_OB_WRP_SECTOR(WRPSector));
NYX 0:85b3fd62ea1a 670 assert_param(IS_FLASH_BANK(Banks));
NYX 0:85b3fd62ea1a 671
NYX 0:85b3fd62ea1a 672 /* Wait for last operation to be completed */
NYX 0:85b3fd62ea1a 673 status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE);
NYX 0:85b3fd62ea1a 674
NYX 0:85b3fd62ea1a 675 if(status == HAL_OK)
NYX 0:85b3fd62ea1a 676 {
NYX 0:85b3fd62ea1a 677 if(((WRPSector == OB_WRP_SECTOR_All) && ((Banks == FLASH_BANK_1) || (Banks == FLASH_BANK_BOTH))) ||
NYX 0:85b3fd62ea1a 678 (WRPSector < OB_WRP_SECTOR_12))
NYX 0:85b3fd62ea1a 679 {
NYX 0:85b3fd62ea1a 680 if(WRPSector == OB_WRP_SECTOR_All)
NYX 0:85b3fd62ea1a 681 {
NYX 0:85b3fd62ea1a 682 /*Write protection on all sector of BANK1*/
NYX 0:85b3fd62ea1a 683 *(__IO uint16_t*)OPTCR_BYTE2_ADDRESS &= (~(WRPSector>>12));
NYX 0:85b3fd62ea1a 684 }
NYX 0:85b3fd62ea1a 685 else
NYX 0:85b3fd62ea1a 686 {
NYX 0:85b3fd62ea1a 687 /*Write protection done on sectors of BANK1*/
NYX 0:85b3fd62ea1a 688 *(__IO uint16_t*)OPTCR_BYTE2_ADDRESS &= (~WRPSector);
NYX 0:85b3fd62ea1a 689 }
NYX 0:85b3fd62ea1a 690 }
NYX 0:85b3fd62ea1a 691 else
NYX 0:85b3fd62ea1a 692 {
NYX 0:85b3fd62ea1a 693 /*Write protection done on sectors of BANK2*/
NYX 0:85b3fd62ea1a 694 *(__IO uint16_t*)OPTCR1_BYTE2_ADDRESS &= (~(WRPSector>>12));
NYX 0:85b3fd62ea1a 695 }
NYX 0:85b3fd62ea1a 696
NYX 0:85b3fd62ea1a 697 /*Write protection on all sector of BANK2*/
NYX 0:85b3fd62ea1a 698 if((WRPSector == OB_WRP_SECTOR_All) && (Banks == FLASH_BANK_BOTH))
NYX 0:85b3fd62ea1a 699 {
NYX 0:85b3fd62ea1a 700 /* Wait for last operation to be completed */
NYX 0:85b3fd62ea1a 701 status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE);
NYX 0:85b3fd62ea1a 702
NYX 0:85b3fd62ea1a 703 if(status == HAL_OK)
NYX 0:85b3fd62ea1a 704 {
NYX 0:85b3fd62ea1a 705 *(__IO uint16_t*)OPTCR1_BYTE2_ADDRESS &= (~(WRPSector>>12));
NYX 0:85b3fd62ea1a 706 }
NYX 0:85b3fd62ea1a 707 }
NYX 0:85b3fd62ea1a 708
NYX 0:85b3fd62ea1a 709 }
NYX 0:85b3fd62ea1a 710 return status;
NYX 0:85b3fd62ea1a 711 }
NYX 0:85b3fd62ea1a 712
NYX 0:85b3fd62ea1a 713 /**
NYX 0:85b3fd62ea1a 714 * @brief Disable the write protection of the desired bank1 or bank 2 sectors
NYX 0:85b3fd62ea1a 715 *
NYX 0:85b3fd62ea1a 716 * @note When the memory read protection level is selected (RDP level = 1),
NYX 0:85b3fd62ea1a 717 * it is not possible to program or erase the flash sector i if CortexM4
NYX 0:85b3fd62ea1a 718 * debug features are connected or boot code is executed in RAM, even if nWRPi = 1
NYX 0:85b3fd62ea1a 719 * @note Active value of nWRPi bits is inverted when PCROP mode is active (SPRMOD =1).
NYX 0:85b3fd62ea1a 720 *
NYX 0:85b3fd62ea1a 721 * @param WRPSector: specifies the sector(s) to be write protected.
NYX 0:85b3fd62ea1a 722 * This parameter can be one of the following values:
NYX 0:85b3fd62ea1a 723 * @arg WRPSector: A value between OB_WRP_SECTOR_0 and OB_WRP_SECTOR_23
NYX 0:85b3fd62ea1a 724 * @arg OB_WRP_Sector_All
NYX 0:85b3fd62ea1a 725 * @note BANK2 starts from OB_WRP_SECTOR_12
NYX 0:85b3fd62ea1a 726 *
NYX 0:85b3fd62ea1a 727 * @param Banks: Disable write protection on all the sectors for the specific bank
NYX 0:85b3fd62ea1a 728 * This parameter can be one of the following values:
NYX 0:85b3fd62ea1a 729 * @arg FLASH_BANK_1: Bank1 to be erased
NYX 0:85b3fd62ea1a 730 * @arg FLASH_BANK_2: Bank2 to be erased
NYX 0:85b3fd62ea1a 731 * @arg FLASH_BANK_BOTH: Bank1 and Bank2 to be erased
NYX 0:85b3fd62ea1a 732 *
NYX 0:85b3fd62ea1a 733 * @retval HAL Status
NYX 0:85b3fd62ea1a 734 */
NYX 0:85b3fd62ea1a 735 static HAL_StatusTypeDef FLASH_OB_DisableWRP(uint32_t WRPSector, uint32_t Banks)
NYX 0:85b3fd62ea1a 736 {
NYX 0:85b3fd62ea1a 737 HAL_StatusTypeDef status = HAL_OK;
NYX 0:85b3fd62ea1a 738
NYX 0:85b3fd62ea1a 739 /* Check the parameters */
NYX 0:85b3fd62ea1a 740 assert_param(IS_OB_WRP_SECTOR(WRPSector));
NYX 0:85b3fd62ea1a 741 assert_param(IS_FLASH_BANK(Banks));
NYX 0:85b3fd62ea1a 742
NYX 0:85b3fd62ea1a 743 /* Wait for last operation to be completed */
NYX 0:85b3fd62ea1a 744 status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE);
NYX 0:85b3fd62ea1a 745
NYX 0:85b3fd62ea1a 746 if(status == HAL_OK)
NYX 0:85b3fd62ea1a 747 {
NYX 0:85b3fd62ea1a 748 if(((WRPSector == OB_WRP_SECTOR_All) && ((Banks == FLASH_BANK_1) || (Banks == FLASH_BANK_BOTH))) ||
NYX 0:85b3fd62ea1a 749 (WRPSector < OB_WRP_SECTOR_12))
NYX 0:85b3fd62ea1a 750 {
NYX 0:85b3fd62ea1a 751 if(WRPSector == OB_WRP_SECTOR_All)
NYX 0:85b3fd62ea1a 752 {
NYX 0:85b3fd62ea1a 753 /*Write protection on all sector of BANK1*/
NYX 0:85b3fd62ea1a 754 *(__IO uint16_t*)OPTCR_BYTE2_ADDRESS |= (uint16_t)(WRPSector>>12);
NYX 0:85b3fd62ea1a 755 }
NYX 0:85b3fd62ea1a 756 else
NYX 0:85b3fd62ea1a 757 {
NYX 0:85b3fd62ea1a 758 /*Write protection done on sectors of BANK1*/
NYX 0:85b3fd62ea1a 759 *(__IO uint16_t*)OPTCR_BYTE2_ADDRESS |= (uint16_t)WRPSector;
NYX 0:85b3fd62ea1a 760 }
NYX 0:85b3fd62ea1a 761 }
NYX 0:85b3fd62ea1a 762 else
NYX 0:85b3fd62ea1a 763 {
NYX 0:85b3fd62ea1a 764 /*Write protection done on sectors of BANK2*/
NYX 0:85b3fd62ea1a 765 *(__IO uint16_t*)OPTCR1_BYTE2_ADDRESS |= (uint16_t)(WRPSector>>12);
NYX 0:85b3fd62ea1a 766 }
NYX 0:85b3fd62ea1a 767
NYX 0:85b3fd62ea1a 768 /*Write protection on all sector of BANK2*/
NYX 0:85b3fd62ea1a 769 if((WRPSector == OB_WRP_SECTOR_All) && (Banks == FLASH_BANK_BOTH))
NYX 0:85b3fd62ea1a 770 {
NYX 0:85b3fd62ea1a 771 /* Wait for last operation to be completed */
NYX 0:85b3fd62ea1a 772 status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE);
NYX 0:85b3fd62ea1a 773
NYX 0:85b3fd62ea1a 774 if(status == HAL_OK)
NYX 0:85b3fd62ea1a 775 {
NYX 0:85b3fd62ea1a 776 *(__IO uint16_t*)OPTCR1_BYTE2_ADDRESS |= (uint16_t)(WRPSector>>12);
NYX 0:85b3fd62ea1a 777 }
NYX 0:85b3fd62ea1a 778 }
NYX 0:85b3fd62ea1a 779
NYX 0:85b3fd62ea1a 780 }
NYX 0:85b3fd62ea1a 781
NYX 0:85b3fd62ea1a 782 return status;
NYX 0:85b3fd62ea1a 783 }
NYX 0:85b3fd62ea1a 784
NYX 0:85b3fd62ea1a 785 /**
NYX 0:85b3fd62ea1a 786 * @brief Configure the Dual Bank Boot.
NYX 0:85b3fd62ea1a 787 *
NYX 0:85b3fd62ea1a 788 * @note This function can be used only for STM32F42xxx/43xxx devices.
NYX 0:85b3fd62ea1a 789 *
NYX 0:85b3fd62ea1a 790 * @param BootConfig specifies the Dual Bank Boot Option byte.
NYX 0:85b3fd62ea1a 791 * This parameter can be one of the following values:
NYX 0:85b3fd62ea1a 792 * @arg OB_Dual_BootEnabled: Dual Bank Boot Enable
NYX 0:85b3fd62ea1a 793 * @arg OB_Dual_BootDisabled: Dual Bank Boot Disabled
NYX 0:85b3fd62ea1a 794 * @retval None
NYX 0:85b3fd62ea1a 795 */
NYX 0:85b3fd62ea1a 796 static HAL_StatusTypeDef FLASH_OB_BootConfig(uint8_t BootConfig)
NYX 0:85b3fd62ea1a 797 {
NYX 0:85b3fd62ea1a 798 HAL_StatusTypeDef status = HAL_OK;
NYX 0:85b3fd62ea1a 799
NYX 0:85b3fd62ea1a 800 /* Check the parameters */
NYX 0:85b3fd62ea1a 801 assert_param(IS_OB_BOOT(BootConfig));
NYX 0:85b3fd62ea1a 802
NYX 0:85b3fd62ea1a 803 /* Wait for last operation to be completed */
NYX 0:85b3fd62ea1a 804 status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE);
NYX 0:85b3fd62ea1a 805
NYX 0:85b3fd62ea1a 806 if(status == HAL_OK)
NYX 0:85b3fd62ea1a 807 {
NYX 0:85b3fd62ea1a 808 /* Set Dual Bank Boot */
NYX 0:85b3fd62ea1a 809 *(__IO uint8_t *)OPTCR_BYTE0_ADDRESS &= (~FLASH_OPTCR_BFB2);
NYX 0:85b3fd62ea1a 810 *(__IO uint8_t *)OPTCR_BYTE0_ADDRESS |= BootConfig;
NYX 0:85b3fd62ea1a 811 }
NYX 0:85b3fd62ea1a 812
NYX 0:85b3fd62ea1a 813 return status;
NYX 0:85b3fd62ea1a 814 }
NYX 0:85b3fd62ea1a 815
NYX 0:85b3fd62ea1a 816 /**
NYX 0:85b3fd62ea1a 817 * @brief Enable the read/write protection (PCROP) of the desired
NYX 0:85b3fd62ea1a 818 * sectors of Bank 1 and/or Bank 2.
NYX 0:85b3fd62ea1a 819 * @note This function can be used only for STM32F42xxx/43xxx devices.
NYX 0:85b3fd62ea1a 820 * @param SectorBank1 Specifies the sector(s) to be read/write protected or unprotected for bank1.
NYX 0:85b3fd62ea1a 821 * This parameter can be one of the following values:
NYX 0:85b3fd62ea1a 822 * @arg OB_PCROP: A value between OB_PCROP_SECTOR_0 and OB_PCROP_SECTOR_11
NYX 0:85b3fd62ea1a 823 * @arg OB_PCROP_SECTOR__All
NYX 0:85b3fd62ea1a 824 * @param SectorBank2 Specifies the sector(s) to be read/write protected or unprotected for bank2.
NYX 0:85b3fd62ea1a 825 * This parameter can be one of the following values:
NYX 0:85b3fd62ea1a 826 * @arg OB_PCROP: A value between OB_PCROP_SECTOR_12 and OB_PCROP_SECTOR_23
NYX 0:85b3fd62ea1a 827 * @arg OB_PCROP_SECTOR__All
NYX 0:85b3fd62ea1a 828 * @param Banks Enable PCROP protection on all the sectors for the specific bank
NYX 0:85b3fd62ea1a 829 * This parameter can be one of the following values:
NYX 0:85b3fd62ea1a 830 * @arg FLASH_BANK_1: WRP on all sectors of bank1
NYX 0:85b3fd62ea1a 831 * @arg FLASH_BANK_2: WRP on all sectors of bank2
NYX 0:85b3fd62ea1a 832 * @arg FLASH_BANK_BOTH: WRP on all sectors of bank1 & bank2
NYX 0:85b3fd62ea1a 833 *
NYX 0:85b3fd62ea1a 834 * @retval HAL Status
NYX 0:85b3fd62ea1a 835 */
NYX 0:85b3fd62ea1a 836 static HAL_StatusTypeDef FLASH_OB_EnablePCROP(uint32_t SectorBank1, uint32_t SectorBank2, uint32_t Banks)
NYX 0:85b3fd62ea1a 837 {
NYX 0:85b3fd62ea1a 838 HAL_StatusTypeDef status = HAL_OK;
NYX 0:85b3fd62ea1a 839
NYX 0:85b3fd62ea1a 840 assert_param(IS_FLASH_BANK(Banks));
NYX 0:85b3fd62ea1a 841
NYX 0:85b3fd62ea1a 842 /* Wait for last operation to be completed */
NYX 0:85b3fd62ea1a 843 status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE);
NYX 0:85b3fd62ea1a 844
NYX 0:85b3fd62ea1a 845 if(status == HAL_OK)
NYX 0:85b3fd62ea1a 846 {
NYX 0:85b3fd62ea1a 847 if((Banks == FLASH_BANK_1) || (Banks == FLASH_BANK_BOTH))
NYX 0:85b3fd62ea1a 848 {
NYX 0:85b3fd62ea1a 849 assert_param(IS_OB_PCROP(SectorBank1));
NYX 0:85b3fd62ea1a 850 /*Write protection done on sectors of BANK1*/
NYX 0:85b3fd62ea1a 851 *(__IO uint16_t*)OPTCR_BYTE2_ADDRESS |= (uint16_t)SectorBank1;
NYX 0:85b3fd62ea1a 852 }
NYX 0:85b3fd62ea1a 853 else
NYX 0:85b3fd62ea1a 854 {
NYX 0:85b3fd62ea1a 855 assert_param(IS_OB_PCROP(SectorBank2));
NYX 0:85b3fd62ea1a 856 /*Write protection done on sectors of BANK2*/
NYX 0:85b3fd62ea1a 857 *(__IO uint16_t*)OPTCR1_BYTE2_ADDRESS |= (uint16_t)SectorBank2;
NYX 0:85b3fd62ea1a 858 }
NYX 0:85b3fd62ea1a 859
NYX 0:85b3fd62ea1a 860 /*Write protection on all sector of BANK2*/
NYX 0:85b3fd62ea1a 861 if(Banks == FLASH_BANK_BOTH)
NYX 0:85b3fd62ea1a 862 {
NYX 0:85b3fd62ea1a 863 assert_param(IS_OB_PCROP(SectorBank2));
NYX 0:85b3fd62ea1a 864 /* Wait for last operation to be completed */
NYX 0:85b3fd62ea1a 865 status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE);
NYX 0:85b3fd62ea1a 866
NYX 0:85b3fd62ea1a 867 if(status == HAL_OK)
NYX 0:85b3fd62ea1a 868 {
NYX 0:85b3fd62ea1a 869 /*Write protection done on sectors of BANK2*/
NYX 0:85b3fd62ea1a 870 *(__IO uint16_t*)OPTCR1_BYTE2_ADDRESS |= (uint16_t)SectorBank2;
NYX 0:85b3fd62ea1a 871 }
NYX 0:85b3fd62ea1a 872 }
NYX 0:85b3fd62ea1a 873
NYX 0:85b3fd62ea1a 874 }
NYX 0:85b3fd62ea1a 875
NYX 0:85b3fd62ea1a 876 return status;
NYX 0:85b3fd62ea1a 877 }
NYX 0:85b3fd62ea1a 878
NYX 0:85b3fd62ea1a 879
NYX 0:85b3fd62ea1a 880 /**
NYX 0:85b3fd62ea1a 881 * @brief Disable the read/write protection (PCROP) of the desired
NYX 0:85b3fd62ea1a 882 * sectors of Bank 1 and/or Bank 2.
NYX 0:85b3fd62ea1a 883 * @note This function can be used only for STM32F42xxx/43xxx devices.
NYX 0:85b3fd62ea1a 884 * @param SectorBank1 specifies the sector(s) to be read/write protected or unprotected for bank1.
NYX 0:85b3fd62ea1a 885 * This parameter can be one of the following values:
NYX 0:85b3fd62ea1a 886 * @arg OB_PCROP: A value between OB_PCROP_SECTOR_0 and OB_PCROP_SECTOR_11
NYX 0:85b3fd62ea1a 887 * @arg OB_PCROP_SECTOR__All
NYX 0:85b3fd62ea1a 888 * @param SectorBank2 Specifies the sector(s) to be read/write protected or unprotected for bank2.
NYX 0:85b3fd62ea1a 889 * This parameter can be one of the following values:
NYX 0:85b3fd62ea1a 890 * @arg OB_PCROP: A value between OB_PCROP_SECTOR_12 and OB_PCROP_SECTOR_23
NYX 0:85b3fd62ea1a 891 * @arg OB_PCROP_SECTOR__All
NYX 0:85b3fd62ea1a 892 * @param Banks Disable PCROP protection on all the sectors for the specific bank
NYX 0:85b3fd62ea1a 893 * This parameter can be one of the following values:
NYX 0:85b3fd62ea1a 894 * @arg FLASH_BANK_1: WRP on all sectors of bank1
NYX 0:85b3fd62ea1a 895 * @arg FLASH_BANK_2: WRP on all sectors of bank2
NYX 0:85b3fd62ea1a 896 * @arg FLASH_BANK_BOTH: WRP on all sectors of bank1 & bank2
NYX 0:85b3fd62ea1a 897 *
NYX 0:85b3fd62ea1a 898 * @retval HAL Status
NYX 0:85b3fd62ea1a 899 */
NYX 0:85b3fd62ea1a 900 static HAL_StatusTypeDef FLASH_OB_DisablePCROP(uint32_t SectorBank1, uint32_t SectorBank2, uint32_t Banks)
NYX 0:85b3fd62ea1a 901 {
NYX 0:85b3fd62ea1a 902 HAL_StatusTypeDef status = HAL_OK;
NYX 0:85b3fd62ea1a 903
NYX 0:85b3fd62ea1a 904 /* Check the parameters */
NYX 0:85b3fd62ea1a 905 assert_param(IS_FLASH_BANK(Banks));
NYX 0:85b3fd62ea1a 906
NYX 0:85b3fd62ea1a 907 /* Wait for last operation to be completed */
NYX 0:85b3fd62ea1a 908 status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE);
NYX 0:85b3fd62ea1a 909
NYX 0:85b3fd62ea1a 910 if(status == HAL_OK)
NYX 0:85b3fd62ea1a 911 {
NYX 0:85b3fd62ea1a 912 if((Banks == FLASH_BANK_1) || (Banks == FLASH_BANK_BOTH))
NYX 0:85b3fd62ea1a 913 {
NYX 0:85b3fd62ea1a 914 assert_param(IS_OB_PCROP(SectorBank1));
NYX 0:85b3fd62ea1a 915 /*Write protection done on sectors of BANK1*/
NYX 0:85b3fd62ea1a 916 *(__IO uint16_t*)OPTCR_BYTE2_ADDRESS &= (~SectorBank1);
NYX 0:85b3fd62ea1a 917 }
NYX 0:85b3fd62ea1a 918 else
NYX 0:85b3fd62ea1a 919 {
NYX 0:85b3fd62ea1a 920 /*Write protection done on sectors of BANK2*/
NYX 0:85b3fd62ea1a 921 assert_param(IS_OB_PCROP(SectorBank2));
NYX 0:85b3fd62ea1a 922 *(__IO uint16_t*)OPTCR1_BYTE2_ADDRESS &= (~SectorBank2);
NYX 0:85b3fd62ea1a 923 }
NYX 0:85b3fd62ea1a 924
NYX 0:85b3fd62ea1a 925 /*Write protection on all sector of BANK2*/
NYX 0:85b3fd62ea1a 926 if(Banks == FLASH_BANK_BOTH)
NYX 0:85b3fd62ea1a 927 {
NYX 0:85b3fd62ea1a 928 assert_param(IS_OB_PCROP(SectorBank2));
NYX 0:85b3fd62ea1a 929 /* Wait for last operation to be completed */
NYX 0:85b3fd62ea1a 930 status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE);
NYX 0:85b3fd62ea1a 931
NYX 0:85b3fd62ea1a 932 if(status == HAL_OK)
NYX 0:85b3fd62ea1a 933 {
NYX 0:85b3fd62ea1a 934 /*Write protection done on sectors of BANK2*/
NYX 0:85b3fd62ea1a 935 *(__IO uint16_t*)OPTCR1_BYTE2_ADDRESS &= (~SectorBank2);
NYX 0:85b3fd62ea1a 936 }
NYX 0:85b3fd62ea1a 937 }
NYX 0:85b3fd62ea1a 938
NYX 0:85b3fd62ea1a 939 }
NYX 0:85b3fd62ea1a 940
NYX 0:85b3fd62ea1a 941 return status;
NYX 0:85b3fd62ea1a 942
NYX 0:85b3fd62ea1a 943 }
NYX 0:85b3fd62ea1a 944
NYX 0:85b3fd62ea1a 945 #endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || STM32F469xx || STM32F479xx */
NYX 0:85b3fd62ea1a 946
NYX 0:85b3fd62ea1a 947 #if defined(STM32F405xx) || defined(STM32F415xx) || defined(STM32F407xx) || defined(STM32F417xx) ||\
NYX 0:85b3fd62ea1a 948 defined(STM32F401xC) || defined(STM32F401xE) || defined(STM32F410Tx) || defined(STM32F410Cx) ||\
NYX 0:85b3fd62ea1a 949 defined(STM32F410Rx) || defined(STM32F411xE) || defined(STM32F446xx) || defined(STM32F412Zx) ||\
NYX 0:85b3fd62ea1a 950 defined(STM32F412Vx) || defined(STM32F412Rx) || defined(STM32F412Cx) || defined(STM32F413xx) ||\
NYX 0:85b3fd62ea1a 951 defined(STM32F423xx)
NYX 0:85b3fd62ea1a 952 /**
NYX 0:85b3fd62ea1a 953 * @brief Mass erase of FLASH memory
NYX 0:85b3fd62ea1a 954 * @param VoltageRange: The device voltage range which defines the erase parallelism.
NYX 0:85b3fd62ea1a 955 * This parameter can be one of the following values:
NYX 0:85b3fd62ea1a 956 * @arg FLASH_VOLTAGE_RANGE_1: when the device voltage range is 1.8V to 2.1V,
NYX 0:85b3fd62ea1a 957 * the operation will be done by byte (8-bit)
NYX 0:85b3fd62ea1a 958 * @arg FLASH_VOLTAGE_RANGE_2: when the device voltage range is 2.1V to 2.7V,
NYX 0:85b3fd62ea1a 959 * the operation will be done by half word (16-bit)
NYX 0:85b3fd62ea1a 960 * @arg FLASH_VOLTAGE_RANGE_3: when the device voltage range is 2.7V to 3.6V,
NYX 0:85b3fd62ea1a 961 * the operation will be done by word (32-bit)
NYX 0:85b3fd62ea1a 962 * @arg FLASH_VOLTAGE_RANGE_4: when the device voltage range is 2.7V to 3.6V + External Vpp,
NYX 0:85b3fd62ea1a 963 * the operation will be done by double word (64-bit)
NYX 0:85b3fd62ea1a 964 *
NYX 0:85b3fd62ea1a 965 * @param Banks: Banks to be erased
NYX 0:85b3fd62ea1a 966 * This parameter can be one of the following values:
NYX 0:85b3fd62ea1a 967 * @arg FLASH_BANK_1: Bank1 to be erased
NYX 0:85b3fd62ea1a 968 *
NYX 0:85b3fd62ea1a 969 * @retval None
NYX 0:85b3fd62ea1a 970 */
NYX 0:85b3fd62ea1a 971 static void FLASH_MassErase(uint8_t VoltageRange, uint32_t Banks)
NYX 0:85b3fd62ea1a 972 {
NYX 0:85b3fd62ea1a 973 /* Check the parameters */
NYX 0:85b3fd62ea1a 974 assert_param(IS_VOLTAGERANGE(VoltageRange));
NYX 0:85b3fd62ea1a 975 assert_param(IS_FLASH_BANK(Banks));
NYX 0:85b3fd62ea1a 976
NYX 0:85b3fd62ea1a 977 /* If the previous operation is completed, proceed to erase all sectors */
NYX 0:85b3fd62ea1a 978 CLEAR_BIT(FLASH->CR, FLASH_CR_PSIZE);
NYX 0:85b3fd62ea1a 979 FLASH->CR |= FLASH_CR_MER;
NYX 0:85b3fd62ea1a 980 FLASH->CR |= FLASH_CR_STRT | ((uint32_t)VoltageRange <<8U);
NYX 0:85b3fd62ea1a 981 }
NYX 0:85b3fd62ea1a 982
NYX 0:85b3fd62ea1a 983 /**
NYX 0:85b3fd62ea1a 984 * @brief Erase the specified FLASH memory sector
NYX 0:85b3fd62ea1a 985 * @param Sector: FLASH sector to erase
NYX 0:85b3fd62ea1a 986 * The value of this parameter depend on device used within the same series
NYX 0:85b3fd62ea1a 987 * @param VoltageRange: The device voltage range which defines the erase parallelism.
NYX 0:85b3fd62ea1a 988 * This parameter can be one of the following values:
NYX 0:85b3fd62ea1a 989 * @arg FLASH_VOLTAGE_RANGE_1: when the device voltage range is 1.8V to 2.1V,
NYX 0:85b3fd62ea1a 990 * the operation will be done by byte (8-bit)
NYX 0:85b3fd62ea1a 991 * @arg FLASH_VOLTAGE_RANGE_2: when the device voltage range is 2.1V to 2.7V,
NYX 0:85b3fd62ea1a 992 * the operation will be done by half word (16-bit)
NYX 0:85b3fd62ea1a 993 * @arg FLASH_VOLTAGE_RANGE_3: when the device voltage range is 2.7V to 3.6V,
NYX 0:85b3fd62ea1a 994 * the operation will be done by word (32-bit)
NYX 0:85b3fd62ea1a 995 * @arg FLASH_VOLTAGE_RANGE_4: when the device voltage range is 2.7V to 3.6V + External Vpp,
NYX 0:85b3fd62ea1a 996 * the operation will be done by double word (64-bit)
NYX 0:85b3fd62ea1a 997 *
NYX 0:85b3fd62ea1a 998 * @retval None
NYX 0:85b3fd62ea1a 999 */
NYX 0:85b3fd62ea1a 1000 void FLASH_Erase_Sector(uint32_t Sector, uint8_t VoltageRange)
NYX 0:85b3fd62ea1a 1001 {
NYX 0:85b3fd62ea1a 1002 uint32_t tmp_psize = 0U;
NYX 0:85b3fd62ea1a 1003
NYX 0:85b3fd62ea1a 1004 /* Check the parameters */
NYX 0:85b3fd62ea1a 1005 assert_param(IS_FLASH_SECTOR(Sector));
NYX 0:85b3fd62ea1a 1006 assert_param(IS_VOLTAGERANGE(VoltageRange));
NYX 0:85b3fd62ea1a 1007
NYX 0:85b3fd62ea1a 1008 if(VoltageRange == FLASH_VOLTAGE_RANGE_1)
NYX 0:85b3fd62ea1a 1009 {
NYX 0:85b3fd62ea1a 1010 tmp_psize = FLASH_PSIZE_BYTE;
NYX 0:85b3fd62ea1a 1011 }
NYX 0:85b3fd62ea1a 1012 else if(VoltageRange == FLASH_VOLTAGE_RANGE_2)
NYX 0:85b3fd62ea1a 1013 {
NYX 0:85b3fd62ea1a 1014 tmp_psize = FLASH_PSIZE_HALF_WORD;
NYX 0:85b3fd62ea1a 1015 }
NYX 0:85b3fd62ea1a 1016 else if(VoltageRange == FLASH_VOLTAGE_RANGE_3)
NYX 0:85b3fd62ea1a 1017 {
NYX 0:85b3fd62ea1a 1018 tmp_psize = FLASH_PSIZE_WORD;
NYX 0:85b3fd62ea1a 1019 }
NYX 0:85b3fd62ea1a 1020 else
NYX 0:85b3fd62ea1a 1021 {
NYX 0:85b3fd62ea1a 1022 tmp_psize = FLASH_PSIZE_DOUBLE_WORD;
NYX 0:85b3fd62ea1a 1023 }
NYX 0:85b3fd62ea1a 1024
NYX 0:85b3fd62ea1a 1025 /* If the previous operation is completed, proceed to erase the sector */
NYX 0:85b3fd62ea1a 1026 CLEAR_BIT(FLASH->CR, FLASH_CR_PSIZE);
NYX 0:85b3fd62ea1a 1027 FLASH->CR |= tmp_psize;
NYX 0:85b3fd62ea1a 1028 CLEAR_BIT(FLASH->CR, FLASH_CR_SNB);
NYX 0:85b3fd62ea1a 1029 FLASH->CR |= FLASH_CR_SER | (Sector << POSITION_VAL(FLASH_CR_SNB));
NYX 0:85b3fd62ea1a 1030 FLASH->CR |= FLASH_CR_STRT;
NYX 0:85b3fd62ea1a 1031 }
NYX 0:85b3fd62ea1a 1032
NYX 0:85b3fd62ea1a 1033 /**
NYX 0:85b3fd62ea1a 1034 * @brief Enable the write protection of the desired bank 1 sectors
NYX 0:85b3fd62ea1a 1035 *
NYX 0:85b3fd62ea1a 1036 * @note When the memory read protection level is selected (RDP level = 1),
NYX 0:85b3fd62ea1a 1037 * it is not possible to program or erase the flash sector i if CortexM4
NYX 0:85b3fd62ea1a 1038 * debug features are connected or boot code is executed in RAM, even if nWRPi = 1
NYX 0:85b3fd62ea1a 1039 * @note Active value of nWRPi bits is inverted when PCROP mode is active (SPRMOD =1).
NYX 0:85b3fd62ea1a 1040 *
NYX 0:85b3fd62ea1a 1041 * @param WRPSector: specifies the sector(s) to be write protected.
NYX 0:85b3fd62ea1a 1042 * The value of this parameter depend on device used within the same series
NYX 0:85b3fd62ea1a 1043 *
NYX 0:85b3fd62ea1a 1044 * @param Banks: Enable write protection on all the sectors for the specific bank
NYX 0:85b3fd62ea1a 1045 * This parameter can be one of the following values:
NYX 0:85b3fd62ea1a 1046 * @arg FLASH_BANK_1: WRP on all sectors of bank1
NYX 0:85b3fd62ea1a 1047 *
NYX 0:85b3fd62ea1a 1048 * @retval HAL Status
NYX 0:85b3fd62ea1a 1049 */
NYX 0:85b3fd62ea1a 1050 static HAL_StatusTypeDef FLASH_OB_EnableWRP(uint32_t WRPSector, uint32_t Banks)
NYX 0:85b3fd62ea1a 1051 {
NYX 0:85b3fd62ea1a 1052 HAL_StatusTypeDef status = HAL_OK;
NYX 0:85b3fd62ea1a 1053
NYX 0:85b3fd62ea1a 1054 /* Check the parameters */
NYX 0:85b3fd62ea1a 1055 assert_param(IS_OB_WRP_SECTOR(WRPSector));
NYX 0:85b3fd62ea1a 1056 assert_param(IS_FLASH_BANK(Banks));
NYX 0:85b3fd62ea1a 1057
NYX 0:85b3fd62ea1a 1058 /* Wait for last operation to be completed */
NYX 0:85b3fd62ea1a 1059 status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE);
NYX 0:85b3fd62ea1a 1060
NYX 0:85b3fd62ea1a 1061 if(status == HAL_OK)
NYX 0:85b3fd62ea1a 1062 {
NYX 0:85b3fd62ea1a 1063 *(__IO uint16_t*)OPTCR_BYTE2_ADDRESS &= (~WRPSector);
NYX 0:85b3fd62ea1a 1064 }
NYX 0:85b3fd62ea1a 1065
NYX 0:85b3fd62ea1a 1066 return status;
NYX 0:85b3fd62ea1a 1067 }
NYX 0:85b3fd62ea1a 1068
NYX 0:85b3fd62ea1a 1069 /**
NYX 0:85b3fd62ea1a 1070 * @brief Disable the write protection of the desired bank 1 sectors
NYX 0:85b3fd62ea1a 1071 *
NYX 0:85b3fd62ea1a 1072 * @note When the memory read protection level is selected (RDP level = 1),
NYX 0:85b3fd62ea1a 1073 * it is not possible to program or erase the flash sector i if CortexM4
NYX 0:85b3fd62ea1a 1074 * debug features are connected or boot code is executed in RAM, even if nWRPi = 1
NYX 0:85b3fd62ea1a 1075 * @note Active value of nWRPi bits is inverted when PCROP mode is active (SPRMOD =1).
NYX 0:85b3fd62ea1a 1076 *
NYX 0:85b3fd62ea1a 1077 * @param WRPSector: specifies the sector(s) to be write protected.
NYX 0:85b3fd62ea1a 1078 * The value of this parameter depend on device used within the same series
NYX 0:85b3fd62ea1a 1079 *
NYX 0:85b3fd62ea1a 1080 * @param Banks: Enable write protection on all the sectors for the specific bank
NYX 0:85b3fd62ea1a 1081 * This parameter can be one of the following values:
NYX 0:85b3fd62ea1a 1082 * @arg FLASH_BANK_1: WRP on all sectors of bank1
NYX 0:85b3fd62ea1a 1083 *
NYX 0:85b3fd62ea1a 1084 * @retval HAL Status
NYX 0:85b3fd62ea1a 1085 */
NYX 0:85b3fd62ea1a 1086 static HAL_StatusTypeDef FLASH_OB_DisableWRP(uint32_t WRPSector, uint32_t Banks)
NYX 0:85b3fd62ea1a 1087 {
NYX 0:85b3fd62ea1a 1088 HAL_StatusTypeDef status = HAL_OK;
NYX 0:85b3fd62ea1a 1089
NYX 0:85b3fd62ea1a 1090 /* Check the parameters */
NYX 0:85b3fd62ea1a 1091 assert_param(IS_OB_WRP_SECTOR(WRPSector));
NYX 0:85b3fd62ea1a 1092 assert_param(IS_FLASH_BANK(Banks));
NYX 0:85b3fd62ea1a 1093
NYX 0:85b3fd62ea1a 1094 /* Wait for last operation to be completed */
NYX 0:85b3fd62ea1a 1095 status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE);
NYX 0:85b3fd62ea1a 1096
NYX 0:85b3fd62ea1a 1097 if(status == HAL_OK)
NYX 0:85b3fd62ea1a 1098 {
NYX 0:85b3fd62ea1a 1099 *(__IO uint16_t*)OPTCR_BYTE2_ADDRESS |= (uint16_t)WRPSector;
NYX 0:85b3fd62ea1a 1100 }
NYX 0:85b3fd62ea1a 1101
NYX 0:85b3fd62ea1a 1102 return status;
NYX 0:85b3fd62ea1a 1103 }
NYX 0:85b3fd62ea1a 1104 #endif /* STM32F40xxx || STM32F41xxx || STM32F401xx || STM32F410xx || STM32F411xE || STM32F446xx || STM32F412Zx || STM32F412Vx || STM32F412Rx || STM32F412Cx
NYX 0:85b3fd62ea1a 1105 STM32F413xx || STM32F423xx */
NYX 0:85b3fd62ea1a 1106
NYX 0:85b3fd62ea1a 1107 #if defined(STM32F401xC) || defined(STM32F401xE) || defined(STM32F410Tx) || defined(STM32F410Cx) || defined(STM32F410Rx) ||\
NYX 0:85b3fd62ea1a 1108 defined(STM32F411xE) || defined(STM32F446xx) || defined(STM32F412Zx) || defined(STM32F412Vx) || defined(STM32F412Rx) ||\
NYX 0:85b3fd62ea1a 1109 defined(STM32F412Cx) || defined(STM32F413xx) || defined(STM32F423xx)
NYX 0:85b3fd62ea1a 1110 /**
NYX 0:85b3fd62ea1a 1111 * @brief Enable the read/write protection (PCROP) of the desired sectors.
NYX 0:85b3fd62ea1a 1112 * @note This function can be used only for STM32F401xx devices.
NYX 0:85b3fd62ea1a 1113 * @param Sector specifies the sector(s) to be read/write protected or unprotected.
NYX 0:85b3fd62ea1a 1114 * This parameter can be one of the following values:
NYX 0:85b3fd62ea1a 1115 * @arg OB_PCROP: A value between OB_PCROP_Sector0 and OB_PCROP_Sector5
NYX 0:85b3fd62ea1a 1116 * @arg OB_PCROP_Sector_All
NYX 0:85b3fd62ea1a 1117 * @retval HAL Status
NYX 0:85b3fd62ea1a 1118 */
NYX 0:85b3fd62ea1a 1119 static HAL_StatusTypeDef FLASH_OB_EnablePCROP(uint32_t Sector)
NYX 0:85b3fd62ea1a 1120 {
NYX 0:85b3fd62ea1a 1121 HAL_StatusTypeDef status = HAL_OK;
NYX 0:85b3fd62ea1a 1122
NYX 0:85b3fd62ea1a 1123 /* Check the parameters */
NYX 0:85b3fd62ea1a 1124 assert_param(IS_OB_PCROP(Sector));
NYX 0:85b3fd62ea1a 1125
NYX 0:85b3fd62ea1a 1126 /* Wait for last operation to be completed */
NYX 0:85b3fd62ea1a 1127 status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE);
NYX 0:85b3fd62ea1a 1128
NYX 0:85b3fd62ea1a 1129 if(status == HAL_OK)
NYX 0:85b3fd62ea1a 1130 {
NYX 0:85b3fd62ea1a 1131 *(__IO uint16_t*)OPTCR_BYTE2_ADDRESS |= (uint16_t)Sector;
NYX 0:85b3fd62ea1a 1132 }
NYX 0:85b3fd62ea1a 1133
NYX 0:85b3fd62ea1a 1134 return status;
NYX 0:85b3fd62ea1a 1135 }
NYX 0:85b3fd62ea1a 1136
NYX 0:85b3fd62ea1a 1137
NYX 0:85b3fd62ea1a 1138 /**
NYX 0:85b3fd62ea1a 1139 * @brief Disable the read/write protection (PCROP) of the desired sectors.
NYX 0:85b3fd62ea1a 1140 * @note This function can be used only for STM32F401xx devices.
NYX 0:85b3fd62ea1a 1141 * @param Sector specifies the sector(s) to be read/write protected or unprotected.
NYX 0:85b3fd62ea1a 1142 * This parameter can be one of the following values:
NYX 0:85b3fd62ea1a 1143 * @arg OB_PCROP: A value between OB_PCROP_Sector0 and OB_PCROP_Sector5
NYX 0:85b3fd62ea1a 1144 * @arg OB_PCROP_Sector_All
NYX 0:85b3fd62ea1a 1145 * @retval HAL Status
NYX 0:85b3fd62ea1a 1146 */
NYX 0:85b3fd62ea1a 1147 static HAL_StatusTypeDef FLASH_OB_DisablePCROP(uint32_t Sector)
NYX 0:85b3fd62ea1a 1148 {
NYX 0:85b3fd62ea1a 1149 HAL_StatusTypeDef status = HAL_OK;
NYX 0:85b3fd62ea1a 1150
NYX 0:85b3fd62ea1a 1151 /* Check the parameters */
NYX 0:85b3fd62ea1a 1152 assert_param(IS_OB_PCROP(Sector));
NYX 0:85b3fd62ea1a 1153
NYX 0:85b3fd62ea1a 1154 /* Wait for last operation to be completed */
NYX 0:85b3fd62ea1a 1155 status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE);
NYX 0:85b3fd62ea1a 1156
NYX 0:85b3fd62ea1a 1157 if(status == HAL_OK)
NYX 0:85b3fd62ea1a 1158 {
NYX 0:85b3fd62ea1a 1159 *(__IO uint16_t*)OPTCR_BYTE2_ADDRESS &= (~Sector);
NYX 0:85b3fd62ea1a 1160 }
NYX 0:85b3fd62ea1a 1161
NYX 0:85b3fd62ea1a 1162 return status;
NYX 0:85b3fd62ea1a 1163
NYX 0:85b3fd62ea1a 1164 }
NYX 0:85b3fd62ea1a 1165 #endif /* STM32F401xC || STM32F401xE || STM32F411xE || STM32F446xx || STM32F412Zx || STM32F412Vx || STM32F412Rx || STM32F412Cx
NYX 0:85b3fd62ea1a 1166 STM32F413xx || STM32F423xx */
NYX 0:85b3fd62ea1a 1167
NYX 0:85b3fd62ea1a 1168 /**
NYX 0:85b3fd62ea1a 1169 * @brief Set the read protection level.
NYX 0:85b3fd62ea1a 1170 * @param Level: specifies the read protection level.
NYX 0:85b3fd62ea1a 1171 * This parameter can be one of the following values:
NYX 0:85b3fd62ea1a 1172 * @arg OB_RDP_LEVEL_0: No protection
NYX 0:85b3fd62ea1a 1173 * @arg OB_RDP_LEVEL_1: Read protection of the memory
NYX 0:85b3fd62ea1a 1174 * @arg OB_RDP_LEVEL_2: Full chip protection
NYX 0:85b3fd62ea1a 1175 *
NYX 0:85b3fd62ea1a 1176 * @note WARNING: When enabling OB_RDP level 2 it's no more possible to go back to level 1 or 0
NYX 0:85b3fd62ea1a 1177 *
NYX 0:85b3fd62ea1a 1178 * @retval HAL Status
NYX 0:85b3fd62ea1a 1179 */
NYX 0:85b3fd62ea1a 1180 static HAL_StatusTypeDef FLASH_OB_RDP_LevelConfig(uint8_t Level)
NYX 0:85b3fd62ea1a 1181 {
NYX 0:85b3fd62ea1a 1182 HAL_StatusTypeDef status = HAL_OK;
NYX 0:85b3fd62ea1a 1183
NYX 0:85b3fd62ea1a 1184 /* Check the parameters */
NYX 0:85b3fd62ea1a 1185 assert_param(IS_OB_RDP_LEVEL(Level));
NYX 0:85b3fd62ea1a 1186
NYX 0:85b3fd62ea1a 1187 /* Wait for last operation to be completed */
NYX 0:85b3fd62ea1a 1188 status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE);
NYX 0:85b3fd62ea1a 1189
NYX 0:85b3fd62ea1a 1190 if(status == HAL_OK)
NYX 0:85b3fd62ea1a 1191 {
NYX 0:85b3fd62ea1a 1192 *(__IO uint8_t*)OPTCR_BYTE1_ADDRESS = Level;
NYX 0:85b3fd62ea1a 1193 }
NYX 0:85b3fd62ea1a 1194
NYX 0:85b3fd62ea1a 1195 return status;
NYX 0:85b3fd62ea1a 1196 }
NYX 0:85b3fd62ea1a 1197
NYX 0:85b3fd62ea1a 1198 /**
NYX 0:85b3fd62ea1a 1199 * @brief Program the FLASH User Option Byte: IWDG_SW / RST_STOP / RST_STDBY.
NYX 0:85b3fd62ea1a 1200 * @param Iwdg: Selects the IWDG mode
NYX 0:85b3fd62ea1a 1201 * This parameter can be one of the following values:
NYX 0:85b3fd62ea1a 1202 * @arg OB_IWDG_SW: Software IWDG selected
NYX 0:85b3fd62ea1a 1203 * @arg OB_IWDG_HW: Hardware IWDG selected
NYX 0:85b3fd62ea1a 1204 * @param Stop: Reset event when entering STOP mode.
NYX 0:85b3fd62ea1a 1205 * This parameter can be one of the following values:
NYX 0:85b3fd62ea1a 1206 * @arg OB_STOP_NO_RST: No reset generated when entering in STOP
NYX 0:85b3fd62ea1a 1207 * @arg OB_STOP_RST: Reset generated when entering in STOP
NYX 0:85b3fd62ea1a 1208 * @param Stdby: Reset event when entering Standby mode.
NYX 0:85b3fd62ea1a 1209 * This parameter can be one of the following values:
NYX 0:85b3fd62ea1a 1210 * @arg OB_STDBY_NO_RST: No reset generated when entering in STANDBY
NYX 0:85b3fd62ea1a 1211 * @arg OB_STDBY_RST: Reset generated when entering in STANDBY
NYX 0:85b3fd62ea1a 1212 * @retval HAL Status
NYX 0:85b3fd62ea1a 1213 */
NYX 0:85b3fd62ea1a 1214 static HAL_StatusTypeDef FLASH_OB_UserConfig(uint8_t Iwdg, uint8_t Stop, uint8_t Stdby)
NYX 0:85b3fd62ea1a 1215 {
NYX 0:85b3fd62ea1a 1216 uint8_t optiontmp = 0xFF;
NYX 0:85b3fd62ea1a 1217 HAL_StatusTypeDef status = HAL_OK;
NYX 0:85b3fd62ea1a 1218
NYX 0:85b3fd62ea1a 1219 /* Check the parameters */
NYX 0:85b3fd62ea1a 1220 assert_param(IS_OB_IWDG_SOURCE(Iwdg));
NYX 0:85b3fd62ea1a 1221 assert_param(IS_OB_STOP_SOURCE(Stop));
NYX 0:85b3fd62ea1a 1222 assert_param(IS_OB_STDBY_SOURCE(Stdby));
NYX 0:85b3fd62ea1a 1223
NYX 0:85b3fd62ea1a 1224 /* Wait for last operation to be completed */
NYX 0:85b3fd62ea1a 1225 status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE);
NYX 0:85b3fd62ea1a 1226
NYX 0:85b3fd62ea1a 1227 if(status == HAL_OK)
NYX 0:85b3fd62ea1a 1228 {
NYX 0:85b3fd62ea1a 1229 /* Mask OPTLOCK, OPTSTRT, BOR_LEV and BFB2 bits */
NYX 0:85b3fd62ea1a 1230 optiontmp = (uint8_t)((*(__IO uint8_t *)OPTCR_BYTE0_ADDRESS) & (uint8_t)0x1F);
NYX 0:85b3fd62ea1a 1231
NYX 0:85b3fd62ea1a 1232 /* Update User Option Byte */
NYX 0:85b3fd62ea1a 1233 *(__IO uint8_t *)OPTCR_BYTE0_ADDRESS = Iwdg | (uint8_t)(Stdby | (uint8_t)(Stop | ((uint8_t)optiontmp)));
NYX 0:85b3fd62ea1a 1234 }
NYX 0:85b3fd62ea1a 1235
NYX 0:85b3fd62ea1a 1236 return status;
NYX 0:85b3fd62ea1a 1237 }
NYX 0:85b3fd62ea1a 1238
NYX 0:85b3fd62ea1a 1239 /**
NYX 0:85b3fd62ea1a 1240 * @brief Set the BOR Level.
NYX 0:85b3fd62ea1a 1241 * @param Level: specifies the Option Bytes BOR Reset Level.
NYX 0:85b3fd62ea1a 1242 * This parameter can be one of the following values:
NYX 0:85b3fd62ea1a 1243 * @arg OB_BOR_LEVEL3: Supply voltage ranges from 2.7 to 3.6 V
NYX 0:85b3fd62ea1a 1244 * @arg OB_BOR_LEVEL2: Supply voltage ranges from 2.4 to 2.7 V
NYX 0:85b3fd62ea1a 1245 * @arg OB_BOR_LEVEL1: Supply voltage ranges from 2.1 to 2.4 V
NYX 0:85b3fd62ea1a 1246 * @arg OB_BOR_OFF: Supply voltage ranges from 1.62 to 2.1 V
NYX 0:85b3fd62ea1a 1247 * @retval HAL Status
NYX 0:85b3fd62ea1a 1248 */
NYX 0:85b3fd62ea1a 1249 static HAL_StatusTypeDef FLASH_OB_BOR_LevelConfig(uint8_t Level)
NYX 0:85b3fd62ea1a 1250 {
NYX 0:85b3fd62ea1a 1251 /* Check the parameters */
NYX 0:85b3fd62ea1a 1252 assert_param(IS_OB_BOR_LEVEL(Level));
NYX 0:85b3fd62ea1a 1253
NYX 0:85b3fd62ea1a 1254 /* Set the BOR Level */
NYX 0:85b3fd62ea1a 1255 *(__IO uint8_t *)OPTCR_BYTE0_ADDRESS &= (~FLASH_OPTCR_BOR_LEV);
NYX 0:85b3fd62ea1a 1256 *(__IO uint8_t *)OPTCR_BYTE0_ADDRESS |= Level;
NYX 0:85b3fd62ea1a 1257
NYX 0:85b3fd62ea1a 1258 return HAL_OK;
NYX 0:85b3fd62ea1a 1259
NYX 0:85b3fd62ea1a 1260 }
NYX 0:85b3fd62ea1a 1261
NYX 0:85b3fd62ea1a 1262 /**
NYX 0:85b3fd62ea1a 1263 * @brief Return the FLASH User Option Byte value.
NYX 0:85b3fd62ea1a 1264 * @retval uint8_t FLASH User Option Bytes values: IWDG_SW(Bit0), RST_STOP(Bit1)
NYX 0:85b3fd62ea1a 1265 * and RST_STDBY(Bit2).
NYX 0:85b3fd62ea1a 1266 */
NYX 0:85b3fd62ea1a 1267 static uint8_t FLASH_OB_GetUser(void)
NYX 0:85b3fd62ea1a 1268 {
NYX 0:85b3fd62ea1a 1269 /* Return the User Option Byte */
NYX 0:85b3fd62ea1a 1270 return ((uint8_t)(FLASH->OPTCR & 0xE0));
NYX 0:85b3fd62ea1a 1271 }
NYX 0:85b3fd62ea1a 1272
NYX 0:85b3fd62ea1a 1273 /**
NYX 0:85b3fd62ea1a 1274 * @brief Return the FLASH Write Protection Option Bytes value.
NYX 0:85b3fd62ea1a 1275 * @retval uint16_t FLASH Write Protection Option Bytes value
NYX 0:85b3fd62ea1a 1276 */
NYX 0:85b3fd62ea1a 1277 static uint16_t FLASH_OB_GetWRP(void)
NYX 0:85b3fd62ea1a 1278 {
NYX 0:85b3fd62ea1a 1279 /* Return the FLASH write protection Register value */
NYX 0:85b3fd62ea1a 1280 return (*(__IO uint16_t *)(OPTCR_BYTE2_ADDRESS));
NYX 0:85b3fd62ea1a 1281 }
NYX 0:85b3fd62ea1a 1282
NYX 0:85b3fd62ea1a 1283 /**
NYX 0:85b3fd62ea1a 1284 * @brief Returns the FLASH Read Protection level.
NYX 0:85b3fd62ea1a 1285 * @retval FLASH ReadOut Protection Status:
NYX 0:85b3fd62ea1a 1286 * This parameter can be one of the following values:
NYX 0:85b3fd62ea1a 1287 * @arg OB_RDP_LEVEL_0: No protection
NYX 0:85b3fd62ea1a 1288 * @arg OB_RDP_LEVEL_1: Read protection of the memory
NYX 0:85b3fd62ea1a 1289 * @arg OB_RDP_LEVEL_2: Full chip protection
NYX 0:85b3fd62ea1a 1290 */
NYX 0:85b3fd62ea1a 1291 static uint8_t FLASH_OB_GetRDP(void)
NYX 0:85b3fd62ea1a 1292 {
NYX 0:85b3fd62ea1a 1293 uint8_t readstatus = OB_RDP_LEVEL_0;
NYX 0:85b3fd62ea1a 1294
NYX 0:85b3fd62ea1a 1295 if((*(__IO uint8_t*)(OPTCR_BYTE1_ADDRESS) == (uint8_t)OB_RDP_LEVEL_2))
NYX 0:85b3fd62ea1a 1296 {
NYX 0:85b3fd62ea1a 1297 readstatus = OB_RDP_LEVEL_2;
NYX 0:85b3fd62ea1a 1298 }
NYX 0:85b3fd62ea1a 1299 else if((*(__IO uint8_t*)(OPTCR_BYTE1_ADDRESS) == (uint8_t)OB_RDP_LEVEL_1))
NYX 0:85b3fd62ea1a 1300 {
NYX 0:85b3fd62ea1a 1301 readstatus = OB_RDP_LEVEL_1;
NYX 0:85b3fd62ea1a 1302 }
NYX 0:85b3fd62ea1a 1303 else
NYX 0:85b3fd62ea1a 1304 {
NYX 0:85b3fd62ea1a 1305 readstatus = OB_RDP_LEVEL_0;
NYX 0:85b3fd62ea1a 1306 }
NYX 0:85b3fd62ea1a 1307
NYX 0:85b3fd62ea1a 1308 return readstatus;
NYX 0:85b3fd62ea1a 1309 }
NYX 0:85b3fd62ea1a 1310
NYX 0:85b3fd62ea1a 1311 /**
NYX 0:85b3fd62ea1a 1312 * @brief Returns the FLASH BOR level.
NYX 0:85b3fd62ea1a 1313 * @retval uint8_t The FLASH BOR level:
NYX 0:85b3fd62ea1a 1314 * - OB_BOR_LEVEL3: Supply voltage ranges from 2.7 to 3.6 V
NYX 0:85b3fd62ea1a 1315 * - OB_BOR_LEVEL2: Supply voltage ranges from 2.4 to 2.7 V
NYX 0:85b3fd62ea1a 1316 * - OB_BOR_LEVEL1: Supply voltage ranges from 2.1 to 2.4 V
NYX 0:85b3fd62ea1a 1317 * - OB_BOR_OFF : Supply voltage ranges from 1.62 to 2.1 V
NYX 0:85b3fd62ea1a 1318 */
NYX 0:85b3fd62ea1a 1319 static uint8_t FLASH_OB_GetBOR(void)
NYX 0:85b3fd62ea1a 1320 {
NYX 0:85b3fd62ea1a 1321 /* Return the FLASH BOR level */
NYX 0:85b3fd62ea1a 1322 return (uint8_t)(*(__IO uint8_t *)(OPTCR_BYTE0_ADDRESS) & (uint8_t)0x0C);
NYX 0:85b3fd62ea1a 1323 }
NYX 0:85b3fd62ea1a 1324
NYX 0:85b3fd62ea1a 1325 /**
NYX 0:85b3fd62ea1a 1326 * @brief Flush the instruction and data caches
NYX 0:85b3fd62ea1a 1327 * @retval None
NYX 0:85b3fd62ea1a 1328 */
NYX 0:85b3fd62ea1a 1329 void FLASH_FlushCaches(void)
NYX 0:85b3fd62ea1a 1330 {
NYX 0:85b3fd62ea1a 1331 /* Flush instruction cache */
NYX 0:85b3fd62ea1a 1332 if(READ_BIT(FLASH->ACR, FLASH_ACR_ICEN)!= RESET)
NYX 0:85b3fd62ea1a 1333 {
NYX 0:85b3fd62ea1a 1334 /* Disable instruction cache */
NYX 0:85b3fd62ea1a 1335 __HAL_FLASH_INSTRUCTION_CACHE_DISABLE();
NYX 0:85b3fd62ea1a 1336 /* Reset instruction cache */
NYX 0:85b3fd62ea1a 1337 __HAL_FLASH_INSTRUCTION_CACHE_RESET();
NYX 0:85b3fd62ea1a 1338 /* Enable instruction cache */
NYX 0:85b3fd62ea1a 1339 __HAL_FLASH_INSTRUCTION_CACHE_ENABLE();
NYX 0:85b3fd62ea1a 1340 }
NYX 0:85b3fd62ea1a 1341
NYX 0:85b3fd62ea1a 1342 /* Flush data cache */
NYX 0:85b3fd62ea1a 1343 if(READ_BIT(FLASH->ACR, FLASH_ACR_DCEN) != RESET)
NYX 0:85b3fd62ea1a 1344 {
NYX 0:85b3fd62ea1a 1345 /* Disable data cache */
NYX 0:85b3fd62ea1a 1346 __HAL_FLASH_DATA_CACHE_DISABLE();
NYX 0:85b3fd62ea1a 1347 /* Reset data cache */
NYX 0:85b3fd62ea1a 1348 __HAL_FLASH_DATA_CACHE_RESET();
NYX 0:85b3fd62ea1a 1349 /* Enable data cache */
NYX 0:85b3fd62ea1a 1350 __HAL_FLASH_DATA_CACHE_ENABLE();
NYX 0:85b3fd62ea1a 1351 }
NYX 0:85b3fd62ea1a 1352 }
NYX 0:85b3fd62ea1a 1353
NYX 0:85b3fd62ea1a 1354 /**
NYX 0:85b3fd62ea1a 1355 * @}
NYX 0:85b3fd62ea1a 1356 */
NYX 0:85b3fd62ea1a 1357
NYX 0:85b3fd62ea1a 1358 #endif /* HAL_FLASH_MODULE_ENABLED */
NYX 0:85b3fd62ea1a 1359
NYX 0:85b3fd62ea1a 1360 /**
NYX 0:85b3fd62ea1a 1361 * @}
NYX 0:85b3fd62ea1a 1362 */
NYX 0:85b3fd62ea1a 1363
NYX 0:85b3fd62ea1a 1364 /**
NYX 0:85b3fd62ea1a 1365 * @}
NYX 0:85b3fd62ea1a 1366 */
NYX 0:85b3fd62ea1a 1367
NYX 0:85b3fd62ea1a 1368 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/