Takaaki Numai
inport from local
Dependents: Hobbyking_Cheetah_0511
targets/TARGET_STM/TARGET_STM32F4/device/stm32f4xx_hal_dma2d.h@0:85b3fd62ea1a, 2020-03-16 (annotated)
- Committer:
- NYX
- Date:
- Mon Mar 16 06:35:48 2020 +0000
- Revision:
- 0:85b3fd62ea1a
reinport to mbed;
Who changed what in which revision?
| User | Revision | Line number | New contents of line |
|---|---|---|---|
| NYX | 0:85b3fd62ea1a | 1 | /** |
| NYX | 0:85b3fd62ea1a | 2 | ****************************************************************************** |
| NYX | 0:85b3fd62ea1a | 3 | * @file stm32f4xx_hal_dma2d.h |
| NYX | 0:85b3fd62ea1a | 4 | * @author MCD Application Team |
| NYX | 0:85b3fd62ea1a | 5 | * @version V1.7.1 |
| NYX | 0:85b3fd62ea1a | 6 | * @date 14-April-2017 |
| NYX | 0:85b3fd62ea1a | 7 | * @brief Header file of DMA2D HAL module. |
| NYX | 0:85b3fd62ea1a | 8 | ****************************************************************************** |
| NYX | 0:85b3fd62ea1a | 9 | * @attention |
| NYX | 0:85b3fd62ea1a | 10 | * |
| NYX | 0:85b3fd62ea1a | 11 | * <h2><center>© COPYRIGHT(c) 2017 STMicroelectronics</center></h2> |
| NYX | 0:85b3fd62ea1a | 12 | * |
| NYX | 0:85b3fd62ea1a | 13 | * Redistribution and use in source and binary forms, with or without modification, |
| NYX | 0:85b3fd62ea1a | 14 | * are permitted provided that the following conditions are met: |
| NYX | 0:85b3fd62ea1a | 15 | * 1. Redistributions of source code must retain the above copyright notice, |
| NYX | 0:85b3fd62ea1a | 16 | * this list of conditions and the following disclaimer. |
| NYX | 0:85b3fd62ea1a | 17 | * 2. Redistributions in binary form must reproduce the above copyright notice, |
| NYX | 0:85b3fd62ea1a | 18 | * this list of conditions and the following disclaimer in the documentation |
| NYX | 0:85b3fd62ea1a | 19 | * and/or other materials provided with the distribution. |
| NYX | 0:85b3fd62ea1a | 20 | * 3. Neither the name of STMicroelectronics nor the names of its contributors |
| NYX | 0:85b3fd62ea1a | 21 | * may be used to endorse or promote products derived from this software |
| NYX | 0:85b3fd62ea1a | 22 | * without specific prior written permission. |
| NYX | 0:85b3fd62ea1a | 23 | * |
| NYX | 0:85b3fd62ea1a | 24 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
| NYX | 0:85b3fd62ea1a | 25 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
| NYX | 0:85b3fd62ea1a | 26 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
| NYX | 0:85b3fd62ea1a | 27 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE |
| NYX | 0:85b3fd62ea1a | 28 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
| NYX | 0:85b3fd62ea1a | 29 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR |
| NYX | 0:85b3fd62ea1a | 30 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
| NYX | 0:85b3fd62ea1a | 31 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
| NYX | 0:85b3fd62ea1a | 32 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
| NYX | 0:85b3fd62ea1a | 33 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
| NYX | 0:85b3fd62ea1a | 34 | * |
| NYX | 0:85b3fd62ea1a | 35 | ****************************************************************************** |
| NYX | 0:85b3fd62ea1a | 36 | */ |
| NYX | 0:85b3fd62ea1a | 37 | |
| NYX | 0:85b3fd62ea1a | 38 | /* Define to prevent recursive inclusion -------------------------------------*/ |
| NYX | 0:85b3fd62ea1a | 39 | #ifndef __STM32F4xx_HAL_DMA2D_H |
| NYX | 0:85b3fd62ea1a | 40 | #define __STM32F4xx_HAL_DMA2D_H |
| NYX | 0:85b3fd62ea1a | 41 | |
| NYX | 0:85b3fd62ea1a | 42 | #ifdef __cplusplus |
| NYX | 0:85b3fd62ea1a | 43 | extern "C" { |
| NYX | 0:85b3fd62ea1a | 44 | #endif |
| NYX | 0:85b3fd62ea1a | 45 | |
| NYX | 0:85b3fd62ea1a | 46 | #if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx) ||\ |
| NYX | 0:85b3fd62ea1a | 47 | defined(STM32F469xx) || defined(STM32F479xx) |
| NYX | 0:85b3fd62ea1a | 48 | /* Includes ------------------------------------------------------------------*/ |
| NYX | 0:85b3fd62ea1a | 49 | #include "stm32f4xx_hal_def.h" |
| NYX | 0:85b3fd62ea1a | 50 | |
| NYX | 0:85b3fd62ea1a | 51 | /** @addtogroup STM32F4xx_HAL_Driver |
| NYX | 0:85b3fd62ea1a | 52 | * @{ |
| NYX | 0:85b3fd62ea1a | 53 | */ |
| NYX | 0:85b3fd62ea1a | 54 | |
| NYX | 0:85b3fd62ea1a | 55 | /** @addtogroup DMA2D DMA2D |
| NYX | 0:85b3fd62ea1a | 56 | * @brief DMA2D HAL module driver |
| NYX | 0:85b3fd62ea1a | 57 | * @{ |
| NYX | 0:85b3fd62ea1a | 58 | */ |
| NYX | 0:85b3fd62ea1a | 59 | |
| NYX | 0:85b3fd62ea1a | 60 | /* Exported types ------------------------------------------------------------*/ |
| NYX | 0:85b3fd62ea1a | 61 | /** @defgroup DMA2D_Exported_Types DMA2D Exported Types |
| NYX | 0:85b3fd62ea1a | 62 | * @{ |
| NYX | 0:85b3fd62ea1a | 63 | */ |
| NYX | 0:85b3fd62ea1a | 64 | #define MAX_DMA2D_LAYER 2U |
| NYX | 0:85b3fd62ea1a | 65 | |
| NYX | 0:85b3fd62ea1a | 66 | /** |
| NYX | 0:85b3fd62ea1a | 67 | * @brief DMA2D color Structure definition |
| NYX | 0:85b3fd62ea1a | 68 | */ |
| NYX | 0:85b3fd62ea1a | 69 | typedef struct |
| NYX | 0:85b3fd62ea1a | 70 | { |
| NYX | 0:85b3fd62ea1a | 71 | uint32_t Blue; /*!< Configures the blue value. |
| NYX | 0:85b3fd62ea1a | 72 | This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF. */ |
| NYX | 0:85b3fd62ea1a | 73 | |
| NYX | 0:85b3fd62ea1a | 74 | uint32_t Green; /*!< Configures the green value. |
| NYX | 0:85b3fd62ea1a | 75 | This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF. */ |
| NYX | 0:85b3fd62ea1a | 76 | |
| NYX | 0:85b3fd62ea1a | 77 | uint32_t Red; /*!< Configures the red value. |
| NYX | 0:85b3fd62ea1a | 78 | This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF. */ |
| NYX | 0:85b3fd62ea1a | 79 | } DMA2D_ColorTypeDef; |
| NYX | 0:85b3fd62ea1a | 80 | |
| NYX | 0:85b3fd62ea1a | 81 | /** |
| NYX | 0:85b3fd62ea1a | 82 | * @brief DMA2D CLUT Structure definition |
| NYX | 0:85b3fd62ea1a | 83 | */ |
| NYX | 0:85b3fd62ea1a | 84 | typedef struct |
| NYX | 0:85b3fd62ea1a | 85 | { |
| NYX | 0:85b3fd62ea1a | 86 | uint32_t *pCLUT; /*!< Configures the DMA2D CLUT memory address.*/ |
| NYX | 0:85b3fd62ea1a | 87 | |
| NYX | 0:85b3fd62ea1a | 88 | uint32_t CLUTColorMode; /*!< Configures the DMA2D CLUT color mode. |
| NYX | 0:85b3fd62ea1a | 89 | This parameter can be one value of @ref DMA2D_CLUT_CM. */ |
| NYX | 0:85b3fd62ea1a | 90 | |
| NYX | 0:85b3fd62ea1a | 91 | uint32_t Size; /*!< Configures the DMA2D CLUT size. |
| NYX | 0:85b3fd62ea1a | 92 | This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF.*/ |
| NYX | 0:85b3fd62ea1a | 93 | } DMA2D_CLUTCfgTypeDef; |
| NYX | 0:85b3fd62ea1a | 94 | |
| NYX | 0:85b3fd62ea1a | 95 | /** |
| NYX | 0:85b3fd62ea1a | 96 | * @brief DMA2D Init structure definition |
| NYX | 0:85b3fd62ea1a | 97 | */ |
| NYX | 0:85b3fd62ea1a | 98 | typedef struct |
| NYX | 0:85b3fd62ea1a | 99 | { |
| NYX | 0:85b3fd62ea1a | 100 | uint32_t Mode; /*!< Configures the DMA2D transfer mode. |
| NYX | 0:85b3fd62ea1a | 101 | This parameter can be one value of @ref DMA2D_Mode. */ |
| NYX | 0:85b3fd62ea1a | 102 | |
| NYX | 0:85b3fd62ea1a | 103 | uint32_t ColorMode; /*!< Configures the color format of the output image. |
| NYX | 0:85b3fd62ea1a | 104 | This parameter can be one value of @ref DMA2D_Output_Color_Mode. */ |
| NYX | 0:85b3fd62ea1a | 105 | |
| NYX | 0:85b3fd62ea1a | 106 | uint32_t OutputOffset; /*!< Specifies the Offset value. |
| NYX | 0:85b3fd62ea1a | 107 | This parameter must be a number between Min_Data = 0x0000 and Max_Data = 0x3FFF. */ |
| NYX | 0:85b3fd62ea1a | 108 | |
| NYX | 0:85b3fd62ea1a | 109 | } DMA2D_InitTypeDef; |
| NYX | 0:85b3fd62ea1a | 110 | |
| NYX | 0:85b3fd62ea1a | 111 | /** |
| NYX | 0:85b3fd62ea1a | 112 | * @brief DMA2D Layer structure definition |
| NYX | 0:85b3fd62ea1a | 113 | */ |
| NYX | 0:85b3fd62ea1a | 114 | typedef struct |
| NYX | 0:85b3fd62ea1a | 115 | { |
| NYX | 0:85b3fd62ea1a | 116 | uint32_t InputOffset; /*!< Configures the DMA2D foreground or background offset. |
| NYX | 0:85b3fd62ea1a | 117 | This parameter must be a number between Min_Data = 0x0000 and Max_Data = 0x3FFF. */ |
| NYX | 0:85b3fd62ea1a | 118 | |
| NYX | 0:85b3fd62ea1a | 119 | uint32_t InputColorMode; /*!< Configures the DMA2D foreground or background color mode. |
| NYX | 0:85b3fd62ea1a | 120 | This parameter can be one value of @ref DMA2D_Input_Color_Mode. */ |
| NYX | 0:85b3fd62ea1a | 121 | |
| NYX | 0:85b3fd62ea1a | 122 | uint32_t AlphaMode; /*!< Configures the DMA2D foreground or background alpha mode. |
| NYX | 0:85b3fd62ea1a | 123 | This parameter can be one value of @ref DMA2D_Alpha_Mode. */ |
| NYX | 0:85b3fd62ea1a | 124 | |
| NYX | 0:85b3fd62ea1a | 125 | uint32_t InputAlpha; /*!< Specifies the DMA2D foreground or background alpha value and color value in case of A8 or A4 color mode. |
| NYX | 0:85b3fd62ea1a | 126 | This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF except for the color modes detailed below. |
| NYX | 0:85b3fd62ea1a | 127 | @note In case of A8 or A4 color mode (ARGB), this parameter must be a number between |
| NYX | 0:85b3fd62ea1a | 128 | Min_Data = 0x00000000 and Max_Data = 0xFFFFFFFF where |
| NYX | 0:85b3fd62ea1a | 129 | - InputAlpha[24:31] is the alpha value ALPHA[0:7] |
| NYX | 0:85b3fd62ea1a | 130 | - InputAlpha[16:23] is the red value RED[0:7] |
| NYX | 0:85b3fd62ea1a | 131 | - InputAlpha[8:15] is the green value GREEN[0:7] |
| NYX | 0:85b3fd62ea1a | 132 | - InputAlpha[0:7] is the blue value BLUE[0:7]. */ |
| NYX | 0:85b3fd62ea1a | 133 | |
| NYX | 0:85b3fd62ea1a | 134 | } DMA2D_LayerCfgTypeDef; |
| NYX | 0:85b3fd62ea1a | 135 | |
| NYX | 0:85b3fd62ea1a | 136 | /** |
| NYX | 0:85b3fd62ea1a | 137 | * @brief HAL DMA2D State structures definition |
| NYX | 0:85b3fd62ea1a | 138 | */ |
| NYX | 0:85b3fd62ea1a | 139 | typedef enum |
| NYX | 0:85b3fd62ea1a | 140 | { |
| NYX | 0:85b3fd62ea1a | 141 | HAL_DMA2D_STATE_RESET = 0x00U, /*!< DMA2D not yet initialized or disabled */ |
| NYX | 0:85b3fd62ea1a | 142 | HAL_DMA2D_STATE_READY = 0x01U, /*!< Peripheral Initialized and ready for use */ |
| NYX | 0:85b3fd62ea1a | 143 | HAL_DMA2D_STATE_BUSY = 0x02U, /*!< An internal process is ongoing */ |
| NYX | 0:85b3fd62ea1a | 144 | HAL_DMA2D_STATE_TIMEOUT = 0x03U, /*!< Timeout state */ |
| NYX | 0:85b3fd62ea1a | 145 | HAL_DMA2D_STATE_ERROR = 0x04U, /*!< DMA2D state error */ |
| NYX | 0:85b3fd62ea1a | 146 | HAL_DMA2D_STATE_SUSPEND = 0x05U /*!< DMA2D process is suspended */ |
| NYX | 0:85b3fd62ea1a | 147 | }HAL_DMA2D_StateTypeDef; |
| NYX | 0:85b3fd62ea1a | 148 | |
| NYX | 0:85b3fd62ea1a | 149 | /** |
| NYX | 0:85b3fd62ea1a | 150 | * @brief DMA2D handle Structure definition |
| NYX | 0:85b3fd62ea1a | 151 | */ |
| NYX | 0:85b3fd62ea1a | 152 | typedef struct __DMA2D_HandleTypeDef |
| NYX | 0:85b3fd62ea1a | 153 | { |
| NYX | 0:85b3fd62ea1a | 154 | DMA2D_TypeDef *Instance; /*!< DMA2D register base address. */ |
| NYX | 0:85b3fd62ea1a | 155 | |
| NYX | 0:85b3fd62ea1a | 156 | DMA2D_InitTypeDef Init; /*!< DMA2D communication parameters. */ |
| NYX | 0:85b3fd62ea1a | 157 | |
| NYX | 0:85b3fd62ea1a | 158 | void (* XferCpltCallback)(struct __DMA2D_HandleTypeDef * hdma2d); /*!< DMA2D transfer complete callback. */ |
| NYX | 0:85b3fd62ea1a | 159 | |
| NYX | 0:85b3fd62ea1a | 160 | void (* XferErrorCallback)(struct __DMA2D_HandleTypeDef * hdma2d); /*!< DMA2D transfer error callback. */ |
| NYX | 0:85b3fd62ea1a | 161 | |
| NYX | 0:85b3fd62ea1a | 162 | DMA2D_LayerCfgTypeDef LayerCfg[MAX_DMA2D_LAYER]; /*!< DMA2D Layers parameters */ |
| NYX | 0:85b3fd62ea1a | 163 | |
| NYX | 0:85b3fd62ea1a | 164 | HAL_LockTypeDef Lock; /*!< DMA2D lock. */ |
| NYX | 0:85b3fd62ea1a | 165 | |
| NYX | 0:85b3fd62ea1a | 166 | __IO HAL_DMA2D_StateTypeDef State; /*!< DMA2D transfer state. */ |
| NYX | 0:85b3fd62ea1a | 167 | |
| NYX | 0:85b3fd62ea1a | 168 | __IO uint32_t ErrorCode; /*!< DMA2D error code. */ |
| NYX | 0:85b3fd62ea1a | 169 | } DMA2D_HandleTypeDef; |
| NYX | 0:85b3fd62ea1a | 170 | /** |
| NYX | 0:85b3fd62ea1a | 171 | * @} |
| NYX | 0:85b3fd62ea1a | 172 | */ |
| NYX | 0:85b3fd62ea1a | 173 | |
| NYX | 0:85b3fd62ea1a | 174 | /* Exported constants --------------------------------------------------------*/ |
| NYX | 0:85b3fd62ea1a | 175 | /** @defgroup DMA2D_Exported_Constants DMA2D Exported Constants |
| NYX | 0:85b3fd62ea1a | 176 | * @{ |
| NYX | 0:85b3fd62ea1a | 177 | */ |
| NYX | 0:85b3fd62ea1a | 178 | |
| NYX | 0:85b3fd62ea1a | 179 | /** @defgroup DMA2D_Error_Code DMA2D Error Code |
| NYX | 0:85b3fd62ea1a | 180 | * @{ |
| NYX | 0:85b3fd62ea1a | 181 | */ |
| NYX | 0:85b3fd62ea1a | 182 | #define HAL_DMA2D_ERROR_NONE 0x00000000U /*!< No error */ |
| NYX | 0:85b3fd62ea1a | 183 | #define HAL_DMA2D_ERROR_TE 0x00000001U /*!< Transfer error */ |
| NYX | 0:85b3fd62ea1a | 184 | #define HAL_DMA2D_ERROR_CE 0x00000002U /*!< Configuration error */ |
| NYX | 0:85b3fd62ea1a | 185 | #define HAL_DMA2D_ERROR_CAE 0x00000004U /*!< CLUT access error */ |
| NYX | 0:85b3fd62ea1a | 186 | #define HAL_DMA2D_ERROR_TIMEOUT 0x00000020U /*!< Timeout error */ |
| NYX | 0:85b3fd62ea1a | 187 | /** |
| NYX | 0:85b3fd62ea1a | 188 | * @} |
| NYX | 0:85b3fd62ea1a | 189 | */ |
| NYX | 0:85b3fd62ea1a | 190 | |
| NYX | 0:85b3fd62ea1a | 191 | /** @defgroup DMA2D_Mode DMA2D Mode |
| NYX | 0:85b3fd62ea1a | 192 | * @{ |
| NYX | 0:85b3fd62ea1a | 193 | */ |
| NYX | 0:85b3fd62ea1a | 194 | #define DMA2D_M2M 0x00000000U /*!< DMA2D memory to memory transfer mode */ |
| NYX | 0:85b3fd62ea1a | 195 | #define DMA2D_M2M_PFC DMA2D_CR_MODE_0 /*!< DMA2D memory to memory with pixel format conversion transfer mode */ |
| NYX | 0:85b3fd62ea1a | 196 | #define DMA2D_M2M_BLEND DMA2D_CR_MODE_1 /*!< DMA2D memory to memory with blending transfer mode */ |
| NYX | 0:85b3fd62ea1a | 197 | #define DMA2D_R2M DMA2D_CR_MODE /*!< DMA2D register to memory transfer mode */ |
| NYX | 0:85b3fd62ea1a | 198 | /** |
| NYX | 0:85b3fd62ea1a | 199 | * @} |
| NYX | 0:85b3fd62ea1a | 200 | */ |
| NYX | 0:85b3fd62ea1a | 201 | |
| NYX | 0:85b3fd62ea1a | 202 | /** @defgroup DMA2D_Output_Color_Mode DMA2D Output Color Mode |
| NYX | 0:85b3fd62ea1a | 203 | * @{ |
| NYX | 0:85b3fd62ea1a | 204 | */ |
| NYX | 0:85b3fd62ea1a | 205 | #define DMA2D_OUTPUT_ARGB8888 0x00000000U /*!< ARGB8888 DMA2D color mode */ |
| NYX | 0:85b3fd62ea1a | 206 | #define DMA2D_OUTPUT_RGB888 DMA2D_OPFCCR_CM_0 /*!< RGB888 DMA2D color mode */ |
| NYX | 0:85b3fd62ea1a | 207 | #define DMA2D_OUTPUT_RGB565 DMA2D_OPFCCR_CM_1 /*!< RGB565 DMA2D color mode */ |
| NYX | 0:85b3fd62ea1a | 208 | #define DMA2D_OUTPUT_ARGB1555 (DMA2D_OPFCCR_CM_0|DMA2D_OPFCCR_CM_1) /*!< ARGB1555 DMA2D color mode */ |
| NYX | 0:85b3fd62ea1a | 209 | #define DMA2D_OUTPUT_ARGB4444 DMA2D_OPFCCR_CM_2 /*!< ARGB4444 DMA2D color mode */ |
| NYX | 0:85b3fd62ea1a | 210 | /** |
| NYX | 0:85b3fd62ea1a | 211 | * @} |
| NYX | 0:85b3fd62ea1a | 212 | */ |
| NYX | 0:85b3fd62ea1a | 213 | |
| NYX | 0:85b3fd62ea1a | 214 | /** @defgroup DMA2D_Input_Color_Mode DMA2D Input Color Mode |
| NYX | 0:85b3fd62ea1a | 215 | * @{ |
| NYX | 0:85b3fd62ea1a | 216 | */ |
| NYX | 0:85b3fd62ea1a | 217 | #define DMA2D_INPUT_ARGB8888 0x00000000U /*!< ARGB8888 color mode */ |
| NYX | 0:85b3fd62ea1a | 218 | #define DMA2D_INPUT_RGB888 0x00000001U /*!< RGB888 color mode */ |
| NYX | 0:85b3fd62ea1a | 219 | #define DMA2D_INPUT_RGB565 0x00000002U /*!< RGB565 color mode */ |
| NYX | 0:85b3fd62ea1a | 220 | #define DMA2D_INPUT_ARGB1555 0x00000003U /*!< ARGB1555 color mode */ |
| NYX | 0:85b3fd62ea1a | 221 | #define DMA2D_INPUT_ARGB4444 0x00000004U /*!< ARGB4444 color mode */ |
| NYX | 0:85b3fd62ea1a | 222 | #define DMA2D_INPUT_L8 0x00000005U /*!< L8 color mode */ |
| NYX | 0:85b3fd62ea1a | 223 | #define DMA2D_INPUT_AL44 0x00000006U /*!< AL44 color mode */ |
| NYX | 0:85b3fd62ea1a | 224 | #define DMA2D_INPUT_AL88 0x00000007U /*!< AL88 color mode */ |
| NYX | 0:85b3fd62ea1a | 225 | #define DMA2D_INPUT_L4 0x00000008U /*!< L4 color mode */ |
| NYX | 0:85b3fd62ea1a | 226 | #define DMA2D_INPUT_A8 0x00000009U /*!< A8 color mode */ |
| NYX | 0:85b3fd62ea1a | 227 | #define DMA2D_INPUT_A4 0x0000000AU /*!< A4 color mode */ |
| NYX | 0:85b3fd62ea1a | 228 | /** |
| NYX | 0:85b3fd62ea1a | 229 | * @} |
| NYX | 0:85b3fd62ea1a | 230 | */ |
| NYX | 0:85b3fd62ea1a | 231 | |
| NYX | 0:85b3fd62ea1a | 232 | /** @defgroup DMA2D_Alpha_Mode DMA2D Alpha Mode |
| NYX | 0:85b3fd62ea1a | 233 | * @{ |
| NYX | 0:85b3fd62ea1a | 234 | */ |
| NYX | 0:85b3fd62ea1a | 235 | #define DMA2D_NO_MODIF_ALPHA 0x00000000U /*!< No modification of the alpha channel value */ |
| NYX | 0:85b3fd62ea1a | 236 | #define DMA2D_REPLACE_ALPHA 0x00000001U /*!< Replace original alpha channel value by programmed alpha value */ |
| NYX | 0:85b3fd62ea1a | 237 | #define DMA2D_COMBINE_ALPHA 0x00000002U /*!< Replace original alpha channel value by programmed alpha value |
| NYX | 0:85b3fd62ea1a | 238 | with original alpha channel value */ |
| NYX | 0:85b3fd62ea1a | 239 | /** |
| NYX | 0:85b3fd62ea1a | 240 | * @} |
| NYX | 0:85b3fd62ea1a | 241 | */ |
| NYX | 0:85b3fd62ea1a | 242 | |
| NYX | 0:85b3fd62ea1a | 243 | /** @defgroup DMA2D_CLUT_CM DMA2D CLUT Color Mode |
| NYX | 0:85b3fd62ea1a | 244 | * @{ |
| NYX | 0:85b3fd62ea1a | 245 | */ |
| NYX | 0:85b3fd62ea1a | 246 | #define DMA2D_CCM_ARGB8888 0x00000000U /*!< ARGB8888 DMA2D CLUT color mode */ |
| NYX | 0:85b3fd62ea1a | 247 | #define DMA2D_CCM_RGB888 0x00000001U /*!< RGB888 DMA2D CLUT color mode */ |
| NYX | 0:85b3fd62ea1a | 248 | /** |
| NYX | 0:85b3fd62ea1a | 249 | * @} |
| NYX | 0:85b3fd62ea1a | 250 | */ |
| NYX | 0:85b3fd62ea1a | 251 | |
| NYX | 0:85b3fd62ea1a | 252 | /** @defgroup DMA2D_Interrupts DMA2D Interrupts |
| NYX | 0:85b3fd62ea1a | 253 | * @{ |
| NYX | 0:85b3fd62ea1a | 254 | */ |
| NYX | 0:85b3fd62ea1a | 255 | #define DMA2D_IT_CE DMA2D_CR_CEIE /*!< Configuration Error Interrupt */ |
| NYX | 0:85b3fd62ea1a | 256 | #define DMA2D_IT_CTC DMA2D_CR_CTCIE /*!< CLUT Transfer Complete Interrupt */ |
| NYX | 0:85b3fd62ea1a | 257 | #define DMA2D_IT_CAE DMA2D_CR_CAEIE /*!< CLUT Access Error Interrupt */ |
| NYX | 0:85b3fd62ea1a | 258 | #define DMA2D_IT_TW DMA2D_CR_TWIE /*!< Transfer Watermark Interrupt */ |
| NYX | 0:85b3fd62ea1a | 259 | #define DMA2D_IT_TC DMA2D_CR_TCIE /*!< Transfer Complete Interrupt */ |
| NYX | 0:85b3fd62ea1a | 260 | #define DMA2D_IT_TE DMA2D_CR_TEIE /*!< Transfer Error Interrupt */ |
| NYX | 0:85b3fd62ea1a | 261 | /** |
| NYX | 0:85b3fd62ea1a | 262 | * @} |
| NYX | 0:85b3fd62ea1a | 263 | */ |
| NYX | 0:85b3fd62ea1a | 264 | |
| NYX | 0:85b3fd62ea1a | 265 | /** @defgroup DMA2D_Flags DMA2D Flags |
| NYX | 0:85b3fd62ea1a | 266 | * @{ |
| NYX | 0:85b3fd62ea1a | 267 | */ |
| NYX | 0:85b3fd62ea1a | 268 | #define DMA2D_FLAG_CE DMA2D_ISR_CEIF /*!< Configuration Error Interrupt Flag */ |
| NYX | 0:85b3fd62ea1a | 269 | #define DMA2D_FLAG_CTC DMA2D_ISR_CTCIF /*!< CLUT Transfer Complete Interrupt Flag */ |
| NYX | 0:85b3fd62ea1a | 270 | #define DMA2D_FLAG_CAE DMA2D_ISR_CAEIF /*!< CLUT Access Error Interrupt Flag */ |
| NYX | 0:85b3fd62ea1a | 271 | #define DMA2D_FLAG_TW DMA2D_ISR_TWIF /*!< Transfer Watermark Interrupt Flag */ |
| NYX | 0:85b3fd62ea1a | 272 | #define DMA2D_FLAG_TC DMA2D_ISR_TCIF /*!< Transfer Complete Interrupt Flag */ |
| NYX | 0:85b3fd62ea1a | 273 | #define DMA2D_FLAG_TE DMA2D_ISR_TEIF /*!< Transfer Error Interrupt Flag */ |
| NYX | 0:85b3fd62ea1a | 274 | /** |
| NYX | 0:85b3fd62ea1a | 275 | * @} |
| NYX | 0:85b3fd62ea1a | 276 | */ |
| NYX | 0:85b3fd62ea1a | 277 | |
| NYX | 0:85b3fd62ea1a | 278 | /** @defgroup DMA2D_Aliases DMA2D API Aliases |
| NYX | 0:85b3fd62ea1a | 279 | * @{ |
| NYX | 0:85b3fd62ea1a | 280 | */ |
| NYX | 0:85b3fd62ea1a | 281 | #define HAL_DMA2D_DisableCLUT HAL_DMA2D_CLUTLoading_Abort /*!< Aliased to HAL_DMA2D_CLUTLoading_Abort for compatibility with legacy code */ |
| NYX | 0:85b3fd62ea1a | 282 | /** |
| NYX | 0:85b3fd62ea1a | 283 | * @} |
| NYX | 0:85b3fd62ea1a | 284 | */ |
| NYX | 0:85b3fd62ea1a | 285 | |
| NYX | 0:85b3fd62ea1a | 286 | /** |
| NYX | 0:85b3fd62ea1a | 287 | * @} |
| NYX | 0:85b3fd62ea1a | 288 | */ |
| NYX | 0:85b3fd62ea1a | 289 | /* Exported macros ------------------------------------------------------------*/ |
| NYX | 0:85b3fd62ea1a | 290 | /** @defgroup DMA2D_Exported_Macros DMA2D Exported Macros |
| NYX | 0:85b3fd62ea1a | 291 | * @{ |
| NYX | 0:85b3fd62ea1a | 292 | */ |
| NYX | 0:85b3fd62ea1a | 293 | |
| NYX | 0:85b3fd62ea1a | 294 | /** @brief Reset DMA2D handle state |
| NYX | 0:85b3fd62ea1a | 295 | * @param __HANDLE__: specifies the DMA2D handle. |
| NYX | 0:85b3fd62ea1a | 296 | * @retval None |
| NYX | 0:85b3fd62ea1a | 297 | */ |
| NYX | 0:85b3fd62ea1a | 298 | #define __HAL_DMA2D_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_DMA2D_STATE_RESET) |
| NYX | 0:85b3fd62ea1a | 299 | |
| NYX | 0:85b3fd62ea1a | 300 | /** |
| NYX | 0:85b3fd62ea1a | 301 | * @brief Enable the DMA2D. |
| NYX | 0:85b3fd62ea1a | 302 | * @param __HANDLE__: DMA2D handle |
| NYX | 0:85b3fd62ea1a | 303 | * @retval None. |
| NYX | 0:85b3fd62ea1a | 304 | */ |
| NYX | 0:85b3fd62ea1a | 305 | #define __HAL_DMA2D_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR |= DMA2D_CR_START) |
| NYX | 0:85b3fd62ea1a | 306 | |
| NYX | 0:85b3fd62ea1a | 307 | /* Interrupt & Flag management */ |
| NYX | 0:85b3fd62ea1a | 308 | /** |
| NYX | 0:85b3fd62ea1a | 309 | * @brief Get the DMA2D pending flags. |
| NYX | 0:85b3fd62ea1a | 310 | * @param __HANDLE__: DMA2D handle |
| NYX | 0:85b3fd62ea1a | 311 | * @param __FLAG__: flag to check. |
| NYX | 0:85b3fd62ea1a | 312 | * This parameter can be any combination of the following values: |
| NYX | 0:85b3fd62ea1a | 313 | * @arg DMA2D_FLAG_CE: Configuration error flag |
| NYX | 0:85b3fd62ea1a | 314 | * @arg DMA2D_FLAG_CTC: CLUT transfer complete flag |
| NYX | 0:85b3fd62ea1a | 315 | * @arg DMA2D_FLAG_CAE: CLUT access error flag |
| NYX | 0:85b3fd62ea1a | 316 | * @arg DMA2D_FLAG_TW: Transfer Watermark flag |
| NYX | 0:85b3fd62ea1a | 317 | * @arg DMA2D_FLAG_TC: Transfer complete flag |
| NYX | 0:85b3fd62ea1a | 318 | * @arg DMA2D_FLAG_TE: Transfer error flag |
| NYX | 0:85b3fd62ea1a | 319 | * @retval The state of FLAG. |
| NYX | 0:85b3fd62ea1a | 320 | */ |
| NYX | 0:85b3fd62ea1a | 321 | #define __HAL_DMA2D_GET_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->ISR & (__FLAG__)) |
| NYX | 0:85b3fd62ea1a | 322 | |
| NYX | 0:85b3fd62ea1a | 323 | /** |
| NYX | 0:85b3fd62ea1a | 324 | * @brief Clear the DMA2D pending flags. |
| NYX | 0:85b3fd62ea1a | 325 | * @param __HANDLE__: DMA2D handle |
| NYX | 0:85b3fd62ea1a | 326 | * @param __FLAG__: specifies the flag to clear. |
| NYX | 0:85b3fd62ea1a | 327 | * This parameter can be any combination of the following values: |
| NYX | 0:85b3fd62ea1a | 328 | * @arg DMA2D_FLAG_CE: Configuration error flag |
| NYX | 0:85b3fd62ea1a | 329 | * @arg DMA2D_FLAG_CTC: CLUT transfer complete flag |
| NYX | 0:85b3fd62ea1a | 330 | * @arg DMA2D_FLAG_CAE: CLUT access error flag |
| NYX | 0:85b3fd62ea1a | 331 | * @arg DMA2D_FLAG_TW: Transfer Watermark flag |
| NYX | 0:85b3fd62ea1a | 332 | * @arg DMA2D_FLAG_TC: Transfer complete flag |
| NYX | 0:85b3fd62ea1a | 333 | * @arg DMA2D_FLAG_TE: Transfer error flag |
| NYX | 0:85b3fd62ea1a | 334 | * @retval None |
| NYX | 0:85b3fd62ea1a | 335 | */ |
| NYX | 0:85b3fd62ea1a | 336 | #define __HAL_DMA2D_CLEAR_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->IFCR = (__FLAG__)) |
| NYX | 0:85b3fd62ea1a | 337 | |
| NYX | 0:85b3fd62ea1a | 338 | /** |
| NYX | 0:85b3fd62ea1a | 339 | * @brief Enable the specified DMA2D interrupts. |
| NYX | 0:85b3fd62ea1a | 340 | * @param __HANDLE__: DMA2D handle |
| NYX | 0:85b3fd62ea1a | 341 | * @param __INTERRUPT__: specifies the DMA2D interrupt sources to be enabled. |
| NYX | 0:85b3fd62ea1a | 342 | * This parameter can be any combination of the following values: |
| NYX | 0:85b3fd62ea1a | 343 | * @arg DMA2D_IT_CE: Configuration error interrupt mask |
| NYX | 0:85b3fd62ea1a | 344 | * @arg DMA2D_IT_CTC: CLUT transfer complete interrupt mask |
| NYX | 0:85b3fd62ea1a | 345 | * @arg DMA2D_IT_CAE: CLUT access error interrupt mask |
| NYX | 0:85b3fd62ea1a | 346 | * @arg DMA2D_IT_TW: Transfer Watermark interrupt mask |
| NYX | 0:85b3fd62ea1a | 347 | * @arg DMA2D_IT_TC: Transfer complete interrupt mask |
| NYX | 0:85b3fd62ea1a | 348 | * @arg DMA2D_IT_TE: Transfer error interrupt mask |
| NYX | 0:85b3fd62ea1a | 349 | * @retval None |
| NYX | 0:85b3fd62ea1a | 350 | */ |
| NYX | 0:85b3fd62ea1a | 351 | #define __HAL_DMA2D_ENABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->CR |= (__INTERRUPT__)) |
| NYX | 0:85b3fd62ea1a | 352 | |
| NYX | 0:85b3fd62ea1a | 353 | /** |
| NYX | 0:85b3fd62ea1a | 354 | * @brief Disable the specified DMA2D interrupts. |
| NYX | 0:85b3fd62ea1a | 355 | * @param __HANDLE__: DMA2D handle |
| NYX | 0:85b3fd62ea1a | 356 | * @param __INTERRUPT__: specifies the DMA2D interrupt sources to be disabled. |
| NYX | 0:85b3fd62ea1a | 357 | * This parameter can be any combination of the following values: |
| NYX | 0:85b3fd62ea1a | 358 | * @arg DMA2D_IT_CE: Configuration error interrupt mask |
| NYX | 0:85b3fd62ea1a | 359 | * @arg DMA2D_IT_CTC: CLUT transfer complete interrupt mask |
| NYX | 0:85b3fd62ea1a | 360 | * @arg DMA2D_IT_CAE: CLUT access error interrupt mask |
| NYX | 0:85b3fd62ea1a | 361 | * @arg DMA2D_IT_TW: Transfer Watermark interrupt mask |
| NYX | 0:85b3fd62ea1a | 362 | * @arg DMA2D_IT_TC: Transfer complete interrupt mask |
| NYX | 0:85b3fd62ea1a | 363 | * @arg DMA2D_IT_TE: Transfer error interrupt mask |
| NYX | 0:85b3fd62ea1a | 364 | * @retval None |
| NYX | 0:85b3fd62ea1a | 365 | */ |
| NYX | 0:85b3fd62ea1a | 366 | #define __HAL_DMA2D_DISABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->CR &= ~(__INTERRUPT__)) |
| NYX | 0:85b3fd62ea1a | 367 | |
| NYX | 0:85b3fd62ea1a | 368 | /** |
| NYX | 0:85b3fd62ea1a | 369 | * @brief Check whether the specified DMA2D interrupt source is enabled or not. |
| NYX | 0:85b3fd62ea1a | 370 | * @param __HANDLE__: DMA2D handle |
| NYX | 0:85b3fd62ea1a | 371 | * @param __INTERRUPT__: specifies the DMA2D interrupt source to check. |
| NYX | 0:85b3fd62ea1a | 372 | * This parameter can be one of the following values: |
| NYX | 0:85b3fd62ea1a | 373 | * @arg DMA2D_IT_CE: Configuration error interrupt mask |
| NYX | 0:85b3fd62ea1a | 374 | * @arg DMA2D_IT_CTC: CLUT transfer complete interrupt mask |
| NYX | 0:85b3fd62ea1a | 375 | * @arg DMA2D_IT_CAE: CLUT access error interrupt mask |
| NYX | 0:85b3fd62ea1a | 376 | * @arg DMA2D_IT_TW: Transfer Watermark interrupt mask |
| NYX | 0:85b3fd62ea1a | 377 | * @arg DMA2D_IT_TC: Transfer complete interrupt mask |
| NYX | 0:85b3fd62ea1a | 378 | * @arg DMA2D_IT_TE: Transfer error interrupt mask |
| NYX | 0:85b3fd62ea1a | 379 | * @retval The state of INTERRUPT source. |
| NYX | 0:85b3fd62ea1a | 380 | */ |
| NYX | 0:85b3fd62ea1a | 381 | #define __HAL_DMA2D_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->CR & (__INTERRUPT__)) |
| NYX | 0:85b3fd62ea1a | 382 | |
| NYX | 0:85b3fd62ea1a | 383 | /** |
| NYX | 0:85b3fd62ea1a | 384 | * @} |
| NYX | 0:85b3fd62ea1a | 385 | */ |
| NYX | 0:85b3fd62ea1a | 386 | |
| NYX | 0:85b3fd62ea1a | 387 | /* Exported functions --------------------------------------------------------*/ |
| NYX | 0:85b3fd62ea1a | 388 | /** @addtogroup DMA2D_Exported_Functions DMA2D Exported Functions |
| NYX | 0:85b3fd62ea1a | 389 | * @{ |
| NYX | 0:85b3fd62ea1a | 390 | */ |
| NYX | 0:85b3fd62ea1a | 391 | |
| NYX | 0:85b3fd62ea1a | 392 | /** @addtogroup DMA2D_Exported_Functions_Group1 Initialization and de-initialization functions |
| NYX | 0:85b3fd62ea1a | 393 | * @{ |
| NYX | 0:85b3fd62ea1a | 394 | */ |
| NYX | 0:85b3fd62ea1a | 395 | |
| NYX | 0:85b3fd62ea1a | 396 | /* Initialization and de-initialization functions *******************************/ |
| NYX | 0:85b3fd62ea1a | 397 | HAL_StatusTypeDef HAL_DMA2D_Init(DMA2D_HandleTypeDef *hdma2d); |
| NYX | 0:85b3fd62ea1a | 398 | HAL_StatusTypeDef HAL_DMA2D_DeInit (DMA2D_HandleTypeDef *hdma2d); |
| NYX | 0:85b3fd62ea1a | 399 | void HAL_DMA2D_MspInit(DMA2D_HandleTypeDef* hdma2d); |
| NYX | 0:85b3fd62ea1a | 400 | void HAL_DMA2D_MspDeInit(DMA2D_HandleTypeDef* hdma2d); |
| NYX | 0:85b3fd62ea1a | 401 | |
| NYX | 0:85b3fd62ea1a | 402 | /** |
| NYX | 0:85b3fd62ea1a | 403 | * @} |
| NYX | 0:85b3fd62ea1a | 404 | */ |
| NYX | 0:85b3fd62ea1a | 405 | |
| NYX | 0:85b3fd62ea1a | 406 | /** @addtogroup DMA2D_Exported_Functions_Group2 IO operation functions |
| NYX | 0:85b3fd62ea1a | 407 | * @{ |
| NYX | 0:85b3fd62ea1a | 408 | */ |
| NYX | 0:85b3fd62ea1a | 409 | |
| NYX | 0:85b3fd62ea1a | 410 | /* IO operation functions *******************************************************/ |
| NYX | 0:85b3fd62ea1a | 411 | HAL_StatusTypeDef HAL_DMA2D_Start(DMA2D_HandleTypeDef *hdma2d, uint32_t pdata, uint32_t DstAddress, uint32_t Width, uint32_t Height); |
| NYX | 0:85b3fd62ea1a | 412 | HAL_StatusTypeDef HAL_DMA2D_BlendingStart(DMA2D_HandleTypeDef *hdma2d, uint32_t SrcAddress1, uint32_t SrcAddress2, uint32_t DstAddress, uint32_t Width, uint32_t Height); |
| NYX | 0:85b3fd62ea1a | 413 | HAL_StatusTypeDef HAL_DMA2D_Start_IT(DMA2D_HandleTypeDef *hdma2d, uint32_t pdata, uint32_t DstAddress, uint32_t Width, uint32_t Height); |
| NYX | 0:85b3fd62ea1a | 414 | HAL_StatusTypeDef HAL_DMA2D_BlendingStart_IT(DMA2D_HandleTypeDef *hdma2d, uint32_t SrcAddress1, uint32_t SrcAddress2, uint32_t DstAddress, uint32_t Width, uint32_t Height); |
| NYX | 0:85b3fd62ea1a | 415 | HAL_StatusTypeDef HAL_DMA2D_Suspend(DMA2D_HandleTypeDef *hdma2d); |
| NYX | 0:85b3fd62ea1a | 416 | HAL_StatusTypeDef HAL_DMA2D_Resume(DMA2D_HandleTypeDef *hdma2d); |
| NYX | 0:85b3fd62ea1a | 417 | HAL_StatusTypeDef HAL_DMA2D_Abort(DMA2D_HandleTypeDef *hdma2d); |
| NYX | 0:85b3fd62ea1a | 418 | HAL_StatusTypeDef HAL_DMA2D_EnableCLUT(DMA2D_HandleTypeDef *hdma2d, uint32_t LayerIdx); |
| NYX | 0:85b3fd62ea1a | 419 | HAL_StatusTypeDef HAL_DMA2D_CLUTLoad(DMA2D_HandleTypeDef *hdma2d, DMA2D_CLUTCfgTypeDef CLUTCfg, uint32_t LayerIdx); |
| NYX | 0:85b3fd62ea1a | 420 | HAL_StatusTypeDef HAL_DMA2D_CLUTLoad_IT(DMA2D_HandleTypeDef *hdma2d, DMA2D_CLUTCfgTypeDef CLUTCfg, uint32_t LayerIdx); |
| NYX | 0:85b3fd62ea1a | 421 | HAL_StatusTypeDef HAL_DMA2D_CLUTLoading_Abort(DMA2D_HandleTypeDef *hdma2d, uint32_t LayerIdx); |
| NYX | 0:85b3fd62ea1a | 422 | HAL_StatusTypeDef HAL_DMA2D_CLUTLoading_Suspend(DMA2D_HandleTypeDef *hdma2d, uint32_t LayerIdx); |
| NYX | 0:85b3fd62ea1a | 423 | HAL_StatusTypeDef HAL_DMA2D_CLUTLoading_Resume(DMA2D_HandleTypeDef *hdma2d, uint32_t LayerIdx); |
| NYX | 0:85b3fd62ea1a | 424 | HAL_StatusTypeDef HAL_DMA2D_PollForTransfer(DMA2D_HandleTypeDef *hdma2d, uint32_t Timeout); |
| NYX | 0:85b3fd62ea1a | 425 | void HAL_DMA2D_IRQHandler(DMA2D_HandleTypeDef *hdma2d); |
| NYX | 0:85b3fd62ea1a | 426 | void HAL_DMA2D_LineEventCallback(DMA2D_HandleTypeDef *hdma2d); |
| NYX | 0:85b3fd62ea1a | 427 | void HAL_DMA2D_CLUTLoadingCpltCallback(DMA2D_HandleTypeDef *hdma2d); |
| NYX | 0:85b3fd62ea1a | 428 | |
| NYX | 0:85b3fd62ea1a | 429 | /** |
| NYX | 0:85b3fd62ea1a | 430 | * @} |
| NYX | 0:85b3fd62ea1a | 431 | */ |
| NYX | 0:85b3fd62ea1a | 432 | |
| NYX | 0:85b3fd62ea1a | 433 | /** @addtogroup DMA2D_Exported_Functions_Group3 Peripheral Control functions |
| NYX | 0:85b3fd62ea1a | 434 | * @{ |
| NYX | 0:85b3fd62ea1a | 435 | */ |
| NYX | 0:85b3fd62ea1a | 436 | |
| NYX | 0:85b3fd62ea1a | 437 | /* Peripheral Control functions *************************************************/ |
| NYX | 0:85b3fd62ea1a | 438 | HAL_StatusTypeDef HAL_DMA2D_ConfigLayer(DMA2D_HandleTypeDef *hdma2d, uint32_t LayerIdx); |
| NYX | 0:85b3fd62ea1a | 439 | HAL_StatusTypeDef HAL_DMA2D_ConfigCLUT(DMA2D_HandleTypeDef *hdma2d, DMA2D_CLUTCfgTypeDef CLUTCfg, uint32_t LayerIdx); |
| NYX | 0:85b3fd62ea1a | 440 | HAL_StatusTypeDef HAL_DMA2D_ProgramLineEvent(DMA2D_HandleTypeDef *hdma2d, uint32_t Line); |
| NYX | 0:85b3fd62ea1a | 441 | HAL_StatusTypeDef HAL_DMA2D_EnableDeadTime(DMA2D_HandleTypeDef *hdma2d); |
| NYX | 0:85b3fd62ea1a | 442 | HAL_StatusTypeDef HAL_DMA2D_DisableDeadTime(DMA2D_HandleTypeDef *hdma2d); |
| NYX | 0:85b3fd62ea1a | 443 | HAL_StatusTypeDef HAL_DMA2D_ConfigDeadTime(DMA2D_HandleTypeDef *hdma2d, uint8_t DeadTime); |
| NYX | 0:85b3fd62ea1a | 444 | |
| NYX | 0:85b3fd62ea1a | 445 | /** |
| NYX | 0:85b3fd62ea1a | 446 | * @} |
| NYX | 0:85b3fd62ea1a | 447 | */ |
| NYX | 0:85b3fd62ea1a | 448 | |
| NYX | 0:85b3fd62ea1a | 449 | /** @addtogroup DMA2D_Exported_Functions_Group4 Peripheral State and Error functions |
| NYX | 0:85b3fd62ea1a | 450 | * @{ |
| NYX | 0:85b3fd62ea1a | 451 | */ |
| NYX | 0:85b3fd62ea1a | 452 | |
| NYX | 0:85b3fd62ea1a | 453 | /* Peripheral State functions ***************************************************/ |
| NYX | 0:85b3fd62ea1a | 454 | HAL_DMA2D_StateTypeDef HAL_DMA2D_GetState(DMA2D_HandleTypeDef *hdma2d); |
| NYX | 0:85b3fd62ea1a | 455 | uint32_t HAL_DMA2D_GetError(DMA2D_HandleTypeDef *hdma2d); |
| NYX | 0:85b3fd62ea1a | 456 | |
| NYX | 0:85b3fd62ea1a | 457 | /** |
| NYX | 0:85b3fd62ea1a | 458 | * @} |
| NYX | 0:85b3fd62ea1a | 459 | */ |
| NYX | 0:85b3fd62ea1a | 460 | |
| NYX | 0:85b3fd62ea1a | 461 | /** |
| NYX | 0:85b3fd62ea1a | 462 | * @} |
| NYX | 0:85b3fd62ea1a | 463 | */ |
| NYX | 0:85b3fd62ea1a | 464 | |
| NYX | 0:85b3fd62ea1a | 465 | /* Private constants ---------------------------------------------------------*/ |
| NYX | 0:85b3fd62ea1a | 466 | |
| NYX | 0:85b3fd62ea1a | 467 | /** @addtogroup DMA2D_Private_Constants DMA2D Private Constants |
| NYX | 0:85b3fd62ea1a | 468 | * @{ |
| NYX | 0:85b3fd62ea1a | 469 | */ |
| NYX | 0:85b3fd62ea1a | 470 | |
| NYX | 0:85b3fd62ea1a | 471 | /** @defgroup DMA2D_Maximum_Line_WaterMark DMA2D Maximum Line Watermark |
| NYX | 0:85b3fd62ea1a | 472 | * @{ |
| NYX | 0:85b3fd62ea1a | 473 | */ |
| NYX | 0:85b3fd62ea1a | 474 | #define DMA2D_LINE_WATERMARK_MAX DMA2D_LWR_LW /*!< DMA2D maximum line watermark */ |
| NYX | 0:85b3fd62ea1a | 475 | /** |
| NYX | 0:85b3fd62ea1a | 476 | * @} |
| NYX | 0:85b3fd62ea1a | 477 | */ |
| NYX | 0:85b3fd62ea1a | 478 | |
| NYX | 0:85b3fd62ea1a | 479 | /** @defgroup DMA2D_Color_Value DMA2D Color Value |
| NYX | 0:85b3fd62ea1a | 480 | * @{ |
| NYX | 0:85b3fd62ea1a | 481 | */ |
| NYX | 0:85b3fd62ea1a | 482 | #define DMA2D_COLOR_VALUE 0x000000FFU /*!< Color value mask */ |
| NYX | 0:85b3fd62ea1a | 483 | /** |
| NYX | 0:85b3fd62ea1a | 484 | * @} |
| NYX | 0:85b3fd62ea1a | 485 | */ |
| NYX | 0:85b3fd62ea1a | 486 | |
| NYX | 0:85b3fd62ea1a | 487 | /** @defgroup DMA2D_Max_Layer DMA2D Maximum Number of Layers |
| NYX | 0:85b3fd62ea1a | 488 | * @{ |
| NYX | 0:85b3fd62ea1a | 489 | */ |
| NYX | 0:85b3fd62ea1a | 490 | #define DMA2D_MAX_LAYER 2U /*!< DMA2D maximum number of layers */ |
| NYX | 0:85b3fd62ea1a | 491 | /** |
| NYX | 0:85b3fd62ea1a | 492 | * @} |
| NYX | 0:85b3fd62ea1a | 493 | */ |
| NYX | 0:85b3fd62ea1a | 494 | |
| NYX | 0:85b3fd62ea1a | 495 | /** @defgroup DMA2D_Offset DMA2D Offset |
| NYX | 0:85b3fd62ea1a | 496 | * @{ |
| NYX | 0:85b3fd62ea1a | 497 | */ |
| NYX | 0:85b3fd62ea1a | 498 | #define DMA2D_OFFSET DMA2D_FGOR_LO /*!< Line Offset */ |
| NYX | 0:85b3fd62ea1a | 499 | /** |
| NYX | 0:85b3fd62ea1a | 500 | * @} |
| NYX | 0:85b3fd62ea1a | 501 | */ |
| NYX | 0:85b3fd62ea1a | 502 | |
| NYX | 0:85b3fd62ea1a | 503 | /** @defgroup DMA2D_Size DMA2D Size |
| NYX | 0:85b3fd62ea1a | 504 | * @{ |
| NYX | 0:85b3fd62ea1a | 505 | */ |
| NYX | 0:85b3fd62ea1a | 506 | #define DMA2D_PIXEL (DMA2D_NLR_PL >> 16U) /*!< DMA2D number of pixels per line */ |
| NYX | 0:85b3fd62ea1a | 507 | #define DMA2D_LINE DMA2D_NLR_NL /*!< DMA2D number of lines */ |
| NYX | 0:85b3fd62ea1a | 508 | /** |
| NYX | 0:85b3fd62ea1a | 509 | * @} |
| NYX | 0:85b3fd62ea1a | 510 | */ |
| NYX | 0:85b3fd62ea1a | 511 | |
| NYX | 0:85b3fd62ea1a | 512 | /** @defgroup DMA2D_CLUT_Size DMA2D CLUT Size |
| NYX | 0:85b3fd62ea1a | 513 | * @{ |
| NYX | 0:85b3fd62ea1a | 514 | */ |
| NYX | 0:85b3fd62ea1a | 515 | #define DMA2D_CLUT_SIZE (DMA2D_FGPFCCR_CS >> 8U) /*!< DMA2D CLUT size */ |
| NYX | 0:85b3fd62ea1a | 516 | /** |
| NYX | 0:85b3fd62ea1a | 517 | * @} |
| NYX | 0:85b3fd62ea1a | 518 | */ |
| NYX | 0:85b3fd62ea1a | 519 | |
| NYX | 0:85b3fd62ea1a | 520 | /** |
| NYX | 0:85b3fd62ea1a | 521 | * @} |
| NYX | 0:85b3fd62ea1a | 522 | */ |
| NYX | 0:85b3fd62ea1a | 523 | |
| NYX | 0:85b3fd62ea1a | 524 | /* Private macros ------------------------------------------------------------*/ |
| NYX | 0:85b3fd62ea1a | 525 | /** @defgroup DMA2D_Private_Macros DMA2D Private Macros |
| NYX | 0:85b3fd62ea1a | 526 | * @{ |
| NYX | 0:85b3fd62ea1a | 527 | */ |
| NYX | 0:85b3fd62ea1a | 528 | #define IS_DMA2D_LAYER(LAYER) ((LAYER) <= DMA2D_MAX_LAYER) |
| NYX | 0:85b3fd62ea1a | 529 | #define IS_DMA2D_MODE(MODE) (((MODE) == DMA2D_M2M) || ((MODE) == DMA2D_M2M_PFC) || \ |
| NYX | 0:85b3fd62ea1a | 530 | ((MODE) == DMA2D_M2M_BLEND) || ((MODE) == DMA2D_R2M)) |
| NYX | 0:85b3fd62ea1a | 531 | #define IS_DMA2D_CMODE(MODE_ARGB) (((MODE_ARGB) == DMA2D_OUTPUT_ARGB8888) || ((MODE_ARGB) == DMA2D_OUTPUT_RGB888) || \ |
| NYX | 0:85b3fd62ea1a | 532 | ((MODE_ARGB) == DMA2D_OUTPUT_RGB565) || ((MODE_ARGB) == DMA2D_OUTPUT_ARGB1555) || \ |
| NYX | 0:85b3fd62ea1a | 533 | ((MODE_ARGB) == DMA2D_OUTPUT_ARGB4444)) |
| NYX | 0:85b3fd62ea1a | 534 | #define IS_DMA2D_COLOR(COLOR) ((COLOR) <= DMA2D_COLOR_VALUE) |
| NYX | 0:85b3fd62ea1a | 535 | #define IS_DMA2D_LINE(LINE) ((LINE) <= DMA2D_LINE) |
| NYX | 0:85b3fd62ea1a | 536 | #define IS_DMA2D_PIXEL(PIXEL) ((PIXEL) <= DMA2D_PIXEL) |
| NYX | 0:85b3fd62ea1a | 537 | #define IS_DMA2D_OFFSET(OOFFSET) ((OOFFSET) <= DMA2D_OFFSET) |
| NYX | 0:85b3fd62ea1a | 538 | #define IS_DMA2D_INPUT_COLOR_MODE(INPUT_CM) (((INPUT_CM) == DMA2D_INPUT_ARGB8888) || ((INPUT_CM) == DMA2D_INPUT_RGB888) || \ |
| NYX | 0:85b3fd62ea1a | 539 | ((INPUT_CM) == DMA2D_INPUT_RGB565) || ((INPUT_CM) == DMA2D_INPUT_ARGB1555) || \ |
| NYX | 0:85b3fd62ea1a | 540 | ((INPUT_CM) == DMA2D_INPUT_ARGB4444) || ((INPUT_CM) == DMA2D_INPUT_L8) || \ |
| NYX | 0:85b3fd62ea1a | 541 | ((INPUT_CM) == DMA2D_INPUT_AL44) || ((INPUT_CM) == DMA2D_INPUT_AL88) || \ |
| NYX | 0:85b3fd62ea1a | 542 | ((INPUT_CM) == DMA2D_INPUT_L4) || ((INPUT_CM) == DMA2D_INPUT_A8) || \ |
| NYX | 0:85b3fd62ea1a | 543 | ((INPUT_CM) == DMA2D_INPUT_A4)) |
| NYX | 0:85b3fd62ea1a | 544 | #define IS_DMA2D_ALPHA_MODE(AlphaMode) (((AlphaMode) == DMA2D_NO_MODIF_ALPHA) || \ |
| NYX | 0:85b3fd62ea1a | 545 | ((AlphaMode) == DMA2D_REPLACE_ALPHA) || \ |
| NYX | 0:85b3fd62ea1a | 546 | ((AlphaMode) == DMA2D_COMBINE_ALPHA)) |
| NYX | 0:85b3fd62ea1a | 547 | |
| NYX | 0:85b3fd62ea1a | 548 | #define IS_DMA2D_CLUT_CM(CLUT_CM) (((CLUT_CM) == DMA2D_CCM_ARGB8888) || ((CLUT_CM) == DMA2D_CCM_RGB888)) |
| NYX | 0:85b3fd62ea1a | 549 | #define IS_DMA2D_CLUT_SIZE(CLUT_SIZE) ((CLUT_SIZE) <= DMA2D_CLUT_SIZE) |
| NYX | 0:85b3fd62ea1a | 550 | #define IS_DMA2D_LINEWATERMARK(LineWatermark) ((LineWatermark) <= DMA2D_LINE_WATERMARK_MAX) |
| NYX | 0:85b3fd62ea1a | 551 | #define IS_DMA2D_IT(IT) (((IT) == DMA2D_IT_CTC) || ((IT) == DMA2D_IT_CAE) || \ |
| NYX | 0:85b3fd62ea1a | 552 | ((IT) == DMA2D_IT_TW) || ((IT) == DMA2D_IT_TC) || \ |
| NYX | 0:85b3fd62ea1a | 553 | ((IT) == DMA2D_IT_TE) || ((IT) == DMA2D_IT_CE)) |
| NYX | 0:85b3fd62ea1a | 554 | #define IS_DMA2D_GET_FLAG(FLAG) (((FLAG) == DMA2D_FLAG_CTC) || ((FLAG) == DMA2D_FLAG_CAE) || \ |
| NYX | 0:85b3fd62ea1a | 555 | ((FLAG) == DMA2D_FLAG_TW) || ((FLAG) == DMA2D_FLAG_TC) || \ |
| NYX | 0:85b3fd62ea1a | 556 | ((FLAG) == DMA2D_FLAG_TE) || ((FLAG) == DMA2D_FLAG_CE)) |
| NYX | 0:85b3fd62ea1a | 557 | /** |
| NYX | 0:85b3fd62ea1a | 558 | * @} |
| NYX | 0:85b3fd62ea1a | 559 | */ |
| NYX | 0:85b3fd62ea1a | 560 | |
| NYX | 0:85b3fd62ea1a | 561 | /** |
| NYX | 0:85b3fd62ea1a | 562 | * @} |
| NYX | 0:85b3fd62ea1a | 563 | */ |
| NYX | 0:85b3fd62ea1a | 564 | |
| NYX | 0:85b3fd62ea1a | 565 | /** |
| NYX | 0:85b3fd62ea1a | 566 | * @} |
| NYX | 0:85b3fd62ea1a | 567 | */ |
| NYX | 0:85b3fd62ea1a | 568 | |
| NYX | 0:85b3fd62ea1a | 569 | #endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || STM32F469xx || STM32F479xx */ |
| NYX | 0:85b3fd62ea1a | 570 | |
| NYX | 0:85b3fd62ea1a | 571 | #ifdef __cplusplus |
| NYX | 0:85b3fd62ea1a | 572 | } |
| NYX | 0:85b3fd62ea1a | 573 | #endif |
| NYX | 0:85b3fd62ea1a | 574 | |
| NYX | 0:85b3fd62ea1a | 575 | #endif /* __STM32F4xx_HAL_DMA2D_H */ |
| NYX | 0:85b3fd62ea1a | 576 | |
| NYX | 0:85b3fd62ea1a | 577 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |