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Dependents:   Hobbyking_Cheetah_0511

targets/TARGET_STM/TARGET_STM32F4/device/stm32f4xx_hal_dfsdm.c@0:85b3fd62ea1a, 2020-03-16 (annotated)

Committer:
NYX
Date:
Mon Mar 16 06:35:48 2020 +0000
Revision:
0:85b3fd62ea1a
reinport to mbed;

Who changed what in which revision?

UserRevisionLine numberNew contents of line
NYX 0:85b3fd62ea1a 1 /**
NYX 0:85b3fd62ea1a 2 ******************************************************************************
NYX 0:85b3fd62ea1a 3 * @file stm32f4xx_hal_dfsdm.c
NYX 0:85b3fd62ea1a 4 * @author MCD Application Team
NYX 0:85b3fd62ea1a 5 * @version V1.7.1
NYX 0:85b3fd62ea1a 6 * @date 14-April-2017
NYX 0:85b3fd62ea1a 7 * @brief This file provides firmware functions to manage the following
NYX 0:85b3fd62ea1a 8 * functionalities of the Digital Filter for Sigma-Delta Modulators
NYX 0:85b3fd62ea1a 9 * (DFSDM) peripherals:
NYX 0:85b3fd62ea1a 10 * + Initialization and configuration of channels and filters
NYX 0:85b3fd62ea1a 11 * + Regular channels configuration
NYX 0:85b3fd62ea1a 12 * + Injected channels configuration
NYX 0:85b3fd62ea1a 13 * + Regular/Injected Channels DMA Configuration
NYX 0:85b3fd62ea1a 14 * + Interrupts and flags management
NYX 0:85b3fd62ea1a 15 * + Analog watchdog feature
NYX 0:85b3fd62ea1a 16 * + Short-circuit detector feature
NYX 0:85b3fd62ea1a 17 * + Extremes detector feature
NYX 0:85b3fd62ea1a 18 * + Clock absence detector feature
NYX 0:85b3fd62ea1a 19 * + Break generation on analog watchdog or short-circuit event
NYX 0:85b3fd62ea1a 20 *
NYX 0:85b3fd62ea1a 21 @verbatim
NYX 0:85b3fd62ea1a 22 ==============================================================================
NYX 0:85b3fd62ea1a 23 ##### How to use this driver #####
NYX 0:85b3fd62ea1a 24 ==============================================================================
NYX 0:85b3fd62ea1a 25 [..]
NYX 0:85b3fd62ea1a 26 *** Channel initialization ***
NYX 0:85b3fd62ea1a 27 ==============================
NYX 0:85b3fd62ea1a 28 [..]
NYX 0:85b3fd62ea1a 29 (#) User has first to initialize channels (before filters initialization).
NYX 0:85b3fd62ea1a 30 (#) As prerequisite, fill in the HAL_DFSDM_ChannelMspInit() :
NYX 0:85b3fd62ea1a 31 (++) Enable DFSDMz clock interface with __HAL_RCC_DFSDMz_CLK_ENABLE().
NYX 0:85b3fd62ea1a 32 (++) Enable the clocks for the DFSDMz GPIOS with __HAL_RCC_GPIOx_CLK_ENABLE().
NYX 0:85b3fd62ea1a 33 (++) Configure these DFSDMz pins in alternate mode using HAL_GPIO_Init().
NYX 0:85b3fd62ea1a 34 (++) If interrupt mode is used, enable and configure DFSDMz_FLT0 global
NYX 0:85b3fd62ea1a 35 interrupt with HAL_NVIC_SetPriority() and HAL_NVIC_EnableIRQ().
NYX 0:85b3fd62ea1a 36 (#) Configure the output clock, input, serial interface, analog watchdog,
NYX 0:85b3fd62ea1a 37 offset and data right bit shift parameters for this channel using the
NYX 0:85b3fd62ea1a 38 HAL_DFSDM_ChannelInit() function.
NYX 0:85b3fd62ea1a 39
NYX 0:85b3fd62ea1a 40 *** Channel clock absence detector ***
NYX 0:85b3fd62ea1a 41 ======================================
NYX 0:85b3fd62ea1a 42 [..]
NYX 0:85b3fd62ea1a 43 (#) Start clock absence detector using HAL_DFSDM_ChannelCkabStart() or
NYX 0:85b3fd62ea1a 44 HAL_DFSDM_ChannelCkabStart_IT().
NYX 0:85b3fd62ea1a 45 (#) In polling mode, use HAL_DFSDM_ChannelPollForCkab() to detect the clock
NYX 0:85b3fd62ea1a 46 absence.
NYX 0:85b3fd62ea1a 47 (#) In interrupt mode, HAL_DFSDM_ChannelCkabCallback() will be called if
NYX 0:85b3fd62ea1a 48 clock absence is detected.
NYX 0:85b3fd62ea1a 49 (#) Stop clock absence detector using HAL_DFSDM_ChannelCkabStop() or
NYX 0:85b3fd62ea1a 50 HAL_DFSDM_ChannelCkabStop_IT().
NYX 0:85b3fd62ea1a 51 (#) Please note that the same mode (polling or interrupt) has to be used
NYX 0:85b3fd62ea1a 52 for all channels because the channels are sharing the same interrupt.
NYX 0:85b3fd62ea1a 53 (#) Please note also that in interrupt mode, if clock absence detector is
NYX 0:85b3fd62ea1a 54 stopped for one channel, interrupt will be disabled for all channels.
NYX 0:85b3fd62ea1a 55
NYX 0:85b3fd62ea1a 56 *** Channel short circuit detector ***
NYX 0:85b3fd62ea1a 57 ======================================
NYX 0:85b3fd62ea1a 58 [..]
NYX 0:85b3fd62ea1a 59 (#) Start short circuit detector using HAL_DFSDM_ChannelScdStart() or
NYX 0:85b3fd62ea1a 60 or HAL_DFSDM_ChannelScdStart_IT().
NYX 0:85b3fd62ea1a 61 (#) In polling mode, use HAL_DFSDM_ChannelPollForScd() to detect short
NYX 0:85b3fd62ea1a 62 circuit.
NYX 0:85b3fd62ea1a 63 (#) In interrupt mode, HAL_DFSDM_ChannelScdCallback() will be called if
NYX 0:85b3fd62ea1a 64 short circuit is detected.
NYX 0:85b3fd62ea1a 65 (#) Stop short circuit detector using HAL_DFSDM_ChannelScdStop() or
NYX 0:85b3fd62ea1a 66 or HAL_DFSDM_ChannelScdStop_IT().
NYX 0:85b3fd62ea1a 67 (#) Please note that the same mode (polling or interrupt) has to be used
NYX 0:85b3fd62ea1a 68 for all channels because the channels are sharing the same interrupt.
NYX 0:85b3fd62ea1a 69 (#) Please note also that in interrupt mode, if short circuit detector is
NYX 0:85b3fd62ea1a 70 stopped for one channel, interrupt will be disabled for all channels.
NYX 0:85b3fd62ea1a 71
NYX 0:85b3fd62ea1a 72 *** Channel analog watchdog value ***
NYX 0:85b3fd62ea1a 73 =====================================
NYX 0:85b3fd62ea1a 74 [..]
NYX 0:85b3fd62ea1a 75 (#) Get analog watchdog filter value of a channel using
NYX 0:85b3fd62ea1a 76 HAL_DFSDM_ChannelGetAwdValue().
NYX 0:85b3fd62ea1a 77
NYX 0:85b3fd62ea1a 78 *** Channel offset value ***
NYX 0:85b3fd62ea1a 79 =====================================
NYX 0:85b3fd62ea1a 80 [..]
NYX 0:85b3fd62ea1a 81 (#) Modify offset value of a channel using HAL_DFSDM_ChannelModifyOffset().
NYX 0:85b3fd62ea1a 82
NYX 0:85b3fd62ea1a 83 *** Filter initialization ***
NYX 0:85b3fd62ea1a 84 =============================
NYX 0:85b3fd62ea1a 85 [..]
NYX 0:85b3fd62ea1a 86 (#) After channel initialization, user has to init filters.
NYX 0:85b3fd62ea1a 87 (#) As prerequisite, fill in the HAL_DFSDM_FilterMspInit() :
NYX 0:85b3fd62ea1a 88 (++) If interrupt mode is used , enable and configure DFSDMz_FLTx global
NYX 0:85b3fd62ea1a 89 interrupt with HAL_NVIC_SetPriority() and HAL_NVIC_EnableIRQ().
NYX 0:85b3fd62ea1a 90 Please note that DFSDMz_FLT0 global interrupt could be already
NYX 0:85b3fd62ea1a 91 enabled if interrupt is used for channel.
NYX 0:85b3fd62ea1a 92 (++) If DMA mode is used, configure DMA with HAL_DMA_Init() and link it
NYX 0:85b3fd62ea1a 93 with DFSDMz filter handle using __HAL_LINKDMA().
NYX 0:85b3fd62ea1a 94 (#) Configure the regular conversion, injected conversion and filter
NYX 0:85b3fd62ea1a 95 parameters for this filter using the HAL_DFSDM_FilterInit() function.
NYX 0:85b3fd62ea1a 96
NYX 0:85b3fd62ea1a 97 *** Filter regular channel conversion ***
NYX 0:85b3fd62ea1a 98 =========================================
NYX 0:85b3fd62ea1a 99 [..]
NYX 0:85b3fd62ea1a 100 (#) Select regular channel and enable/disable continuous mode using
NYX 0:85b3fd62ea1a 101 HAL_DFSDM_FilterConfigRegChannel().
NYX 0:85b3fd62ea1a 102 (#) Start regular conversion using HAL_DFSDM_FilterRegularStart(),
NYX 0:85b3fd62ea1a 103 HAL_DFSDM_FilterRegularStart_IT(), HAL_DFSDM_FilterRegularStart_DMA() or
NYX 0:85b3fd62ea1a 104 HAL_DFSDM_FilterRegularMsbStart_DMA().
NYX 0:85b3fd62ea1a 105 (#) In polling mode, use HAL_DFSDM_FilterPollForRegConversion() to detect
NYX 0:85b3fd62ea1a 106 the end of regular conversion.
NYX 0:85b3fd62ea1a 107 (#) In interrupt mode, HAL_DFSDM_FilterRegConvCpltCallback() will be called
NYX 0:85b3fd62ea1a 108 at the end of regular conversion.
NYX 0:85b3fd62ea1a 109 (#) Get value of regular conversion and corresponding channel using
NYX 0:85b3fd62ea1a 110 HAL_DFSDM_FilterGetRegularValue().
NYX 0:85b3fd62ea1a 111 (#) In DMA mode, HAL_DFSDM_FilterRegConvHalfCpltCallback() and
NYX 0:85b3fd62ea1a 112 HAL_DFSDM_FilterRegConvCpltCallback() will be called respectively at the
NYX 0:85b3fd62ea1a 113 half transfer and at the transfer complete. Please note that
NYX 0:85b3fd62ea1a 114 HAL_DFSDM_FilterRegConvHalfCpltCallback() will be called only in DMA
NYX 0:85b3fd62ea1a 115 circular mode.
NYX 0:85b3fd62ea1a 116 (#) Stop regular conversion using HAL_DFSDM_FilterRegularStop(),
NYX 0:85b3fd62ea1a 117 HAL_DFSDM_FilterRegularStop_IT() or HAL_DFSDM_FilterRegularStop_DMA().
NYX 0:85b3fd62ea1a 118
NYX 0:85b3fd62ea1a 119 *** Filter injected channels conversion ***
NYX 0:85b3fd62ea1a 120 ===========================================
NYX 0:85b3fd62ea1a 121 [..]
NYX 0:85b3fd62ea1a 122 (#) Select injected channels using HAL_DFSDM_FilterConfigInjChannel().
NYX 0:85b3fd62ea1a 123 (#) Start injected conversion using HAL_DFSDM_FilterInjectedStart(),
NYX 0:85b3fd62ea1a 124 HAL_DFSDM_FilterInjectedStart_IT(), HAL_DFSDM_FilterInjectedStart_DMA() or
NYX 0:85b3fd62ea1a 125 HAL_DFSDM_FilterInjectedMsbStart_DMA().
NYX 0:85b3fd62ea1a 126 (#) In polling mode, use HAL_DFSDM_FilterPollForInjConversion() to detect
NYX 0:85b3fd62ea1a 127 the end of injected conversion.
NYX 0:85b3fd62ea1a 128 (#) In interrupt mode, HAL_DFSDM_FilterInjConvCpltCallback() will be called
NYX 0:85b3fd62ea1a 129 at the end of injected conversion.
NYX 0:85b3fd62ea1a 130 (#) Get value of injected conversion and corresponding channel using
NYX 0:85b3fd62ea1a 131 HAL_DFSDM_FilterGetInjectedValue().
NYX 0:85b3fd62ea1a 132 (#) In DMA mode, HAL_DFSDM_FilterInjConvHalfCpltCallback() and
NYX 0:85b3fd62ea1a 133 HAL_DFSDM_FilterInjConvCpltCallback() will be called respectively at the
NYX 0:85b3fd62ea1a 134 half transfer and at the transfer complete. Please note that
NYX 0:85b3fd62ea1a 135 HAL_DFSDM_FilterInjConvCpltCallback() will be called only in DMA
NYX 0:85b3fd62ea1a 136 circular mode.
NYX 0:85b3fd62ea1a 137 (#) Stop injected conversion using HAL_DFSDM_FilterInjectedStop(),
NYX 0:85b3fd62ea1a 138 HAL_DFSDM_FilterInjectedStop_IT() or HAL_DFSDM_FilterInjectedStop_DMA().
NYX 0:85b3fd62ea1a 139
NYX 0:85b3fd62ea1a 140 *** Filter analog watchdog ***
NYX 0:85b3fd62ea1a 141 ==============================
NYX 0:85b3fd62ea1a 142 [..]
NYX 0:85b3fd62ea1a 143 (#) Start filter analog watchdog using HAL_DFSDM_FilterAwdStart_IT().
NYX 0:85b3fd62ea1a 144 (#) HAL_DFSDM_FilterAwdCallback() will be called if analog watchdog occurs.
NYX 0:85b3fd62ea1a 145 (#) Stop filter analog watchdog using HAL_DFSDM_FilterAwdStop_IT().
NYX 0:85b3fd62ea1a 146
NYX 0:85b3fd62ea1a 147 *** Filter extreme detector ***
NYX 0:85b3fd62ea1a 148 ===============================
NYX 0:85b3fd62ea1a 149 [..]
NYX 0:85b3fd62ea1a 150 (#) Start filter extreme detector using HAL_DFSDM_FilterExdStart().
NYX 0:85b3fd62ea1a 151 (#) Get extreme detector maximum value using HAL_DFSDM_FilterGetExdMaxValue().
NYX 0:85b3fd62ea1a 152 (#) Get extreme detector minimum value using HAL_DFSDM_FilterGetExdMinValue().
NYX 0:85b3fd62ea1a 153 (#) Start filter extreme detector using HAL_DFSDM_FilterExdStop().
NYX 0:85b3fd62ea1a 154
NYX 0:85b3fd62ea1a 155 *** Filter conversion time ***
NYX 0:85b3fd62ea1a 156 ==============================
NYX 0:85b3fd62ea1a 157 [..]
NYX 0:85b3fd62ea1a 158 (#) Get conversion time value using HAL_DFSDM_FilterGetConvTimeValue().
NYX 0:85b3fd62ea1a 159
NYX 0:85b3fd62ea1a 160 @endverbatim
NYX 0:85b3fd62ea1a 161 ******************************************************************************
NYX 0:85b3fd62ea1a 162 * @attention
NYX 0:85b3fd62ea1a 163 *
NYX 0:85b3fd62ea1a 164 * <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
NYX 0:85b3fd62ea1a 165 *
NYX 0:85b3fd62ea1a 166 * Redistribution and use in source and binary forms, with or without modification,
NYX 0:85b3fd62ea1a 167 * are permitted provided that the following conditions are met:
NYX 0:85b3fd62ea1a 168 * 1. Redistributions of source code must retain the above copyright notice,
NYX 0:85b3fd62ea1a 169 * this list of conditions and the following disclaimer.
NYX 0:85b3fd62ea1a 170 * 2. Redistributions in binary form must reproduce the above copyright notice,
NYX 0:85b3fd62ea1a 171 * this list of conditions and the following disclaimer in the documentation
NYX 0:85b3fd62ea1a 172 * and/or other materials provided with the distribution.
NYX 0:85b3fd62ea1a 173 * 3. Neither the name of STMicroelectronics nor the names of its contributors
NYX 0:85b3fd62ea1a 174 * may be used to endorse or promote products derived from this software
NYX 0:85b3fd62ea1a 175 * without specific prior written permission.
NYX 0:85b3fd62ea1a 176 *
NYX 0:85b3fd62ea1a 177 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
NYX 0:85b3fd62ea1a 178 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
NYX 0:85b3fd62ea1a 179 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
NYX 0:85b3fd62ea1a 180 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
NYX 0:85b3fd62ea1a 181 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
NYX 0:85b3fd62ea1a 182 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
NYX 0:85b3fd62ea1a 183 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
NYX 0:85b3fd62ea1a 184 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
NYX 0:85b3fd62ea1a 185 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
NYX 0:85b3fd62ea1a 186 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
NYX 0:85b3fd62ea1a 187 *
NYX 0:85b3fd62ea1a 188 ******************************************************************************
NYX 0:85b3fd62ea1a 189 */
NYX 0:85b3fd62ea1a 190
NYX 0:85b3fd62ea1a 191 /* Includes ------------------------------------------------------------------*/
NYX 0:85b3fd62ea1a 192 #include "stm32f4xx_hal.h"
NYX 0:85b3fd62ea1a 193
NYX 0:85b3fd62ea1a 194 /** @addtogroup STM32F4xx_HAL_Driver
NYX 0:85b3fd62ea1a 195 * @{
NYX 0:85b3fd62ea1a 196 */
NYX 0:85b3fd62ea1a 197 #ifdef HAL_DFSDM_MODULE_ENABLED
NYX 0:85b3fd62ea1a 198 #if defined(STM32F412Zx) || defined(STM32F412Vx) || defined(STM32F412Rx) || defined(STM32F412Cx) || defined(STM32F413xx) || defined(STM32F423xx)
NYX 0:85b3fd62ea1a 199 /** @defgroup DFSDM DFSDM
NYX 0:85b3fd62ea1a 200 * @brief DFSDM HAL driver module
NYX 0:85b3fd62ea1a 201 * @{
NYX 0:85b3fd62ea1a 202 */
NYX 0:85b3fd62ea1a 203
NYX 0:85b3fd62ea1a 204 /* Private typedef -----------------------------------------------------------*/
NYX 0:85b3fd62ea1a 205 /* Private define ------------------------------------------------------------*/
NYX 0:85b3fd62ea1a 206 /** @defgroup DFSDM_Private_Define DFSDM Private Define
NYX 0:85b3fd62ea1a 207 * @{
NYX 0:85b3fd62ea1a 208 */
NYX 0:85b3fd62ea1a 209 #define DFSDM_CHCFGR1_CLK_DIV_OFFSET POSITION_VAL(DFSDM_CHCFGR1_CKOUTDIV)
NYX 0:85b3fd62ea1a 210 #define DFSDM_CHAWSCDR_BKSCD_OFFSET POSITION_VAL(DFSDM_CHAWSCDR_BKSCD)
NYX 0:85b3fd62ea1a 211 #define DFSDM_CHAWSCDR_FOSR_OFFSET POSITION_VAL(DFSDM_CHAWSCDR_AWFOSR)
NYX 0:85b3fd62ea1a 212 #define DFSDM_CHCFGR2_OFFSET_OFFSET POSITION_VAL(DFSDM_CHCFGR2_OFFSET)
NYX 0:85b3fd62ea1a 213 #define DFSDM_CHCFGR2_DTRBS_OFFSET POSITION_VAL(DFSDM_CHCFGR2_DTRBS)
NYX 0:85b3fd62ea1a 214 #define DFSDM_FLTFCR_FOSR_OFFSET POSITION_VAL(DFSDM_FLTFCR_FOSR)
NYX 0:85b3fd62ea1a 215 #define DFSDM_FLTCR1_MSB_RCH_OFFSET 8U
NYX 0:85b3fd62ea1a 216 #define DFSDM_FLTCR2_EXCH_OFFSET POSITION_VAL(DFSDM_FLTCR2_EXCH)
NYX 0:85b3fd62ea1a 217 #define DFSDM_FLTCR2_AWDCH_OFFSET POSITION_VAL(DFSDM_FLTCR2_AWDCH)
NYX 0:85b3fd62ea1a 218 #define DFSDM_FLTISR_CKABF_OFFSET POSITION_VAL(DFSDM_FLTISR_CKABF)
NYX 0:85b3fd62ea1a 219 #define DFSDM_FLTISR_SCDF_OFFSET POSITION_VAL(DFSDM_FLTISR_SCDF)
NYX 0:85b3fd62ea1a 220 #define DFSDM_FLTICR_CLRCKABF_OFFSET POSITION_VAL(DFSDM_FLTICR_CLRCKABF)
NYX 0:85b3fd62ea1a 221 #define DFSDM_FLTICR_CLRSCDF_OFFSET POSITION_VAL(DFSDM_FLTICR_CLRSCSDF)
NYX 0:85b3fd62ea1a 222 #define DFSDM_FLTRDATAR_DATA_OFFSET POSITION_VAL(DFSDM_FLTRDATAR_RDATA)
NYX 0:85b3fd62ea1a 223 #define DFSDM_FLTJDATAR_DATA_OFFSET POSITION_VAL(DFSDM_FLTJDATAR_JDATA)
NYX 0:85b3fd62ea1a 224 #define DFSDM_FLTAWHTR_THRESHOLD_OFFSET POSITION_VAL(DFSDM_FLTAWHTR_AWHT)
NYX 0:85b3fd62ea1a 225 #define DFSDM_FLTAWLTR_THRESHOLD_OFFSET POSITION_VAL(DFSDM_FLTAWLTR_AWLT)
NYX 0:85b3fd62ea1a 226 #define DFSDM_FLTEXMAX_DATA_OFFSET POSITION_VAL(DFSDM_FLTEXMAX_EXMAX)
NYX 0:85b3fd62ea1a 227 #define DFSDM_FLTEXMIN_DATA_OFFSET POSITION_VAL(DFSDM_FLTEXMIN_EXMIN)
NYX 0:85b3fd62ea1a 228 #define DFSDM_FLTCNVTIMR_DATA_OFFSET POSITION_VAL(DFSDM_FLTCNVTIMR_CNVCNT)
NYX 0:85b3fd62ea1a 229 #define DFSDM_FLTAWSR_HIGH_OFFSET POSITION_VAL(DFSDM_FLTAWSR_AWHTF)
NYX 0:85b3fd62ea1a 230 #define DFSDM_MSB_MASK 0xFFFF0000U
NYX 0:85b3fd62ea1a 231 #define DFSDM_LSB_MASK 0x0000FFFFU
NYX 0:85b3fd62ea1a 232 #define DFSDM_CKAB_TIMEOUT 5000U
NYX 0:85b3fd62ea1a 233 #define DFSDM1_CHANNEL_NUMBER 4U
NYX 0:85b3fd62ea1a 234 #if defined (DFSDM2_Channel0)
NYX 0:85b3fd62ea1a 235 #define DFSDM2_CHANNEL_NUMBER 8U
NYX 0:85b3fd62ea1a 236 #endif /* DFSDM2_Channel0 */
NYX 0:85b3fd62ea1a 237
NYX 0:85b3fd62ea1a 238 /**
NYX 0:85b3fd62ea1a 239 * @}
NYX 0:85b3fd62ea1a 240 */
NYX 0:85b3fd62ea1a 241 /** @addtogroup DFSDM_Private_Macros
NYX 0:85b3fd62ea1a 242 * @{
NYX 0:85b3fd62ea1a 243 */
NYX 0:85b3fd62ea1a 244
NYX 0:85b3fd62ea1a 245 /**
NYX 0:85b3fd62ea1a 246 * @}
NYX 0:85b3fd62ea1a 247 */
NYX 0:85b3fd62ea1a 248 /* Private macro -------------------------------------------------------------*/
NYX 0:85b3fd62ea1a 249 /* Private variables ---------------------------------------------------------*/
NYX 0:85b3fd62ea1a 250 /** @defgroup DFSDM_Private_Variables DFSDM Private Variables
NYX 0:85b3fd62ea1a 251 * @{
NYX 0:85b3fd62ea1a 252 */
NYX 0:85b3fd62ea1a 253 __IO uint32_t v_dfsdm1ChannelCounter = 0U;
NYX 0:85b3fd62ea1a 254 DFSDM_Channel_HandleTypeDef* a_dfsdm1ChannelHandle[DFSDM1_CHANNEL_NUMBER] = {NULL};
NYX 0:85b3fd62ea1a 255
NYX 0:85b3fd62ea1a 256 #if defined (DFSDM2_Channel0)
NYX 0:85b3fd62ea1a 257 __IO uint32_t v_dfsdm2ChannelCounter = 0U;
NYX 0:85b3fd62ea1a 258 DFSDM_Channel_HandleTypeDef* a_dfsdm2ChannelHandle[DFSDM2_CHANNEL_NUMBER] = {NULL};
NYX 0:85b3fd62ea1a 259 #endif /* DFSDM2_Channel0 */
NYX 0:85b3fd62ea1a 260 /**
NYX 0:85b3fd62ea1a 261 * @}
NYX 0:85b3fd62ea1a 262 */
NYX 0:85b3fd62ea1a 263
NYX 0:85b3fd62ea1a 264 /* Private function prototypes -----------------------------------------------*/
NYX 0:85b3fd62ea1a 265 /** @defgroup DFSDM_Private_Functions DFSDM Private Functions
NYX 0:85b3fd62ea1a 266 * @{
NYX 0:85b3fd62ea1a 267 */
NYX 0:85b3fd62ea1a 268 static uint32_t DFSDM_GetInjChannelsNbr(uint32_t Channels);
NYX 0:85b3fd62ea1a 269 static uint32_t DFSDM_GetChannelFromInstance(DFSDM_Channel_TypeDef* Instance);
NYX 0:85b3fd62ea1a 270 static void DFSDM_RegConvStart(DFSDM_Filter_HandleTypeDef *hdfsdm_filter);
NYX 0:85b3fd62ea1a 271 static void DFSDM_RegConvStop(DFSDM_Filter_HandleTypeDef* hdfsdm_filter);
NYX 0:85b3fd62ea1a 272 static void DFSDM_InjConvStart(DFSDM_Filter_HandleTypeDef* hdfsdm_filter);
NYX 0:85b3fd62ea1a 273 static void DFSDM_InjConvStop(DFSDM_Filter_HandleTypeDef* hdfsdm_filter);
NYX 0:85b3fd62ea1a 274 static void DFSDM_DMARegularHalfConvCplt(DMA_HandleTypeDef *hdma);
NYX 0:85b3fd62ea1a 275 static void DFSDM_DMARegularConvCplt(DMA_HandleTypeDef *hdma);
NYX 0:85b3fd62ea1a 276 static void DFSDM_DMAInjectedHalfConvCplt(DMA_HandleTypeDef *hdma);
NYX 0:85b3fd62ea1a 277 static void DFSDM_DMAInjectedConvCplt(DMA_HandleTypeDef *hdma);
NYX 0:85b3fd62ea1a 278 static void DFSDM_DMAError(DMA_HandleTypeDef *hdma);
NYX 0:85b3fd62ea1a 279
NYX 0:85b3fd62ea1a 280 /**
NYX 0:85b3fd62ea1a 281 * @}
NYX 0:85b3fd62ea1a 282 */
NYX 0:85b3fd62ea1a 283
NYX 0:85b3fd62ea1a 284 /* Exported functions --------------------------------------------------------*/
NYX 0:85b3fd62ea1a 285 /** @defgroup DFSDM_Exported_Functions DFSDM Exported Functions
NYX 0:85b3fd62ea1a 286 * @{
NYX 0:85b3fd62ea1a 287 */
NYX 0:85b3fd62ea1a 288
NYX 0:85b3fd62ea1a 289 /** @defgroup DFSDM_Exported_Functions_Group1_Channel Channel initialization and de-initialization functions
NYX 0:85b3fd62ea1a 290 * @brief Channel initialization and de-initialization functions
NYX 0:85b3fd62ea1a 291 *
NYX 0:85b3fd62ea1a 292 @verbatim
NYX 0:85b3fd62ea1a 293 ==============================================================================
NYX 0:85b3fd62ea1a 294 ##### Channel initialization and de-initialization functions #####
NYX 0:85b3fd62ea1a 295 ==============================================================================
NYX 0:85b3fd62ea1a 296 [..] This section provides functions allowing to:
NYX 0:85b3fd62ea1a 297 (+) Initialize the DFSDM channel.
NYX 0:85b3fd62ea1a 298 (+) De-initialize the DFSDM channel.
NYX 0:85b3fd62ea1a 299 @endverbatim
NYX 0:85b3fd62ea1a 300 * @{
NYX 0:85b3fd62ea1a 301 */
NYX 0:85b3fd62ea1a 302
NYX 0:85b3fd62ea1a 303 /**
NYX 0:85b3fd62ea1a 304 * @brief Initialize the DFSDM channel according to the specified parameters
NYX 0:85b3fd62ea1a 305 * in the DFSDM_ChannelInitTypeDef structure and initialize the associated handle.
NYX 0:85b3fd62ea1a 306 * @param hdfsdm_channel : DFSDM channel handle.
NYX 0:85b3fd62ea1a 307 * @retval HAL status.
NYX 0:85b3fd62ea1a 308 */
NYX 0:85b3fd62ea1a 309 HAL_StatusTypeDef HAL_DFSDM_ChannelInit(DFSDM_Channel_HandleTypeDef *hdfsdm_channel)
NYX 0:85b3fd62ea1a 310 {
NYX 0:85b3fd62ea1a 311 #if defined(DFSDM2_Channel0)
NYX 0:85b3fd62ea1a 312 __IO uint32_t* channelCounterPtr;
NYX 0:85b3fd62ea1a 313 DFSDM_Channel_HandleTypeDef **channelHandleTable;
NYX 0:85b3fd62ea1a 314 DFSDM_Channel_TypeDef* channel0Instance;
NYX 0:85b3fd62ea1a 315 #endif /* defined(DFSDM2_Channel0) */
NYX 0:85b3fd62ea1a 316
NYX 0:85b3fd62ea1a 317 /* Check DFSDM Channel handle */
NYX 0:85b3fd62ea1a 318 if(hdfsdm_channel == NULL)
NYX 0:85b3fd62ea1a 319 {
NYX 0:85b3fd62ea1a 320 return HAL_ERROR;
NYX 0:85b3fd62ea1a 321 }
NYX 0:85b3fd62ea1a 322
NYX 0:85b3fd62ea1a 323 /* Check parameters */
NYX 0:85b3fd62ea1a 324 assert_param(IS_DFSDM_CHANNEL_ALL_INSTANCE(hdfsdm_channel->Instance));
NYX 0:85b3fd62ea1a 325 assert_param(IS_FUNCTIONAL_STATE(hdfsdm_channel->Init.OutputClock.Activation));
NYX 0:85b3fd62ea1a 326 assert_param(IS_DFSDM_CHANNEL_INPUT(hdfsdm_channel->Init.Input.Multiplexer));
NYX 0:85b3fd62ea1a 327 assert_param(IS_DFSDM_CHANNEL_DATA_PACKING(hdfsdm_channel->Init.Input.DataPacking));
NYX 0:85b3fd62ea1a 328 assert_param(IS_DFSDM_CHANNEL_INPUT_PINS(hdfsdm_channel->Init.Input.Pins));
NYX 0:85b3fd62ea1a 329 assert_param(IS_DFSDM_CHANNEL_SERIAL_INTERFACE_TYPE(hdfsdm_channel->Init.SerialInterface.Type));
NYX 0:85b3fd62ea1a 330 assert_param(IS_DFSDM_CHANNEL_SPI_CLOCK(hdfsdm_channel->Init.SerialInterface.SpiClock));
NYX 0:85b3fd62ea1a 331 assert_param(IS_DFSDM_CHANNEL_FILTER_ORDER(hdfsdm_channel->Init.Awd.FilterOrder));
NYX 0:85b3fd62ea1a 332 assert_param(IS_DFSDM_CHANNEL_FILTER_OVS_RATIO(hdfsdm_channel->Init.Awd.Oversampling));
NYX 0:85b3fd62ea1a 333 assert_param(IS_DFSDM_CHANNEL_OFFSET(hdfsdm_channel->Init.Offset));
NYX 0:85b3fd62ea1a 334 assert_param(IS_DFSDM_CHANNEL_RIGHT_BIT_SHIFT(hdfsdm_channel->Init.RightBitShift));
NYX 0:85b3fd62ea1a 335
NYX 0:85b3fd62ea1a 336 #if defined(DFSDM2_Channel0)
NYX 0:85b3fd62ea1a 337 /* Get channel counter, channel handle table and channel 0 instance */
NYX 0:85b3fd62ea1a 338 if(IS_DFSDM1_CHANNEL_INSTANCE(hdfsdm_channel->Instance))
NYX 0:85b3fd62ea1a 339 {
NYX 0:85b3fd62ea1a 340 channelCounterPtr = &v_dfsdm1ChannelCounter;
NYX 0:85b3fd62ea1a 341 channelHandleTable = a_dfsdm1ChannelHandle;
NYX 0:85b3fd62ea1a 342 channel0Instance = DFSDM1_Channel0;
NYX 0:85b3fd62ea1a 343 }
NYX 0:85b3fd62ea1a 344 else
NYX 0:85b3fd62ea1a 345 {
NYX 0:85b3fd62ea1a 346 channelCounterPtr = &v_dfsdm2ChannelCounter;
NYX 0:85b3fd62ea1a 347 channelHandleTable = a_dfsdm2ChannelHandle;
NYX 0:85b3fd62ea1a 348 channel0Instance = DFSDM2_Channel0;
NYX 0:85b3fd62ea1a 349 }
NYX 0:85b3fd62ea1a 350
NYX 0:85b3fd62ea1a 351 /* Check that channel has not been already initialized */
NYX 0:85b3fd62ea1a 352 if(channelHandleTable[DFSDM_GetChannelFromInstance(hdfsdm_channel->Instance)] != NULL)
NYX 0:85b3fd62ea1a 353 {
NYX 0:85b3fd62ea1a 354 return HAL_ERROR;
NYX 0:85b3fd62ea1a 355 }
NYX 0:85b3fd62ea1a 356
NYX 0:85b3fd62ea1a 357 /* Call MSP init function */
NYX 0:85b3fd62ea1a 358 HAL_DFSDM_ChannelMspInit(hdfsdm_channel);
NYX 0:85b3fd62ea1a 359
NYX 0:85b3fd62ea1a 360 /* Update the channel counter */
NYX 0:85b3fd62ea1a 361 (*channelCounterPtr)++;
NYX 0:85b3fd62ea1a 362
NYX 0:85b3fd62ea1a 363 /* Configure output serial clock and enable global DFSDM interface only for first channel */
NYX 0:85b3fd62ea1a 364 if(*channelCounterPtr == 1U)
NYX 0:85b3fd62ea1a 365 {
NYX 0:85b3fd62ea1a 366 assert_param(IS_DFSDM_CHANNEL_OUTPUT_CLOCK(hdfsdm_channel->Init.OutputClock.Selection));
NYX 0:85b3fd62ea1a 367 /* Set the output serial clock source */
NYX 0:85b3fd62ea1a 368 channel0Instance->CHCFGR1 &= ~(DFSDM_CHCFGR1_CKOUTSRC);
NYX 0:85b3fd62ea1a 369 channel0Instance->CHCFGR1 |= hdfsdm_channel->Init.OutputClock.Selection;
NYX 0:85b3fd62ea1a 370
NYX 0:85b3fd62ea1a 371 /* Reset clock divider */
NYX 0:85b3fd62ea1a 372 channel0Instance->CHCFGR1 &= ~(DFSDM_CHCFGR1_CKOUTDIV);
NYX 0:85b3fd62ea1a 373 if(hdfsdm_channel->Init.OutputClock.Activation == ENABLE)
NYX 0:85b3fd62ea1a 374 {
NYX 0:85b3fd62ea1a 375 assert_param(IS_DFSDM_CHANNEL_OUTPUT_CLOCK_DIVIDER(hdfsdm_channel->Init.OutputClock.Divider));
NYX 0:85b3fd62ea1a 376 /* Set the output clock divider */
NYX 0:85b3fd62ea1a 377 channel0Instance->CHCFGR1 |= (uint32_t) ((hdfsdm_channel->Init.OutputClock.Divider - 1U) <<
NYX 0:85b3fd62ea1a 378 DFSDM_CHCFGR1_CLK_DIV_OFFSET);
NYX 0:85b3fd62ea1a 379 }
NYX 0:85b3fd62ea1a 380
NYX 0:85b3fd62ea1a 381 /* enable the DFSDM global interface */
NYX 0:85b3fd62ea1a 382 channel0Instance->CHCFGR1 |= DFSDM_CHCFGR1_DFSDMEN;
NYX 0:85b3fd62ea1a 383 }
NYX 0:85b3fd62ea1a 384
NYX 0:85b3fd62ea1a 385 /* Set channel input parameters */
NYX 0:85b3fd62ea1a 386 hdfsdm_channel->Instance->CHCFGR1 &= ~(DFSDM_CHCFGR1_DATPACK | DFSDM_CHCFGR1_DATMPX |
NYX 0:85b3fd62ea1a 387 DFSDM_CHCFGR1_CHINSEL);
NYX 0:85b3fd62ea1a 388 hdfsdm_channel->Instance->CHCFGR1 |= (hdfsdm_channel->Init.Input.Multiplexer |
NYX 0:85b3fd62ea1a 389 hdfsdm_channel->Init.Input.DataPacking |
NYX 0:85b3fd62ea1a 390 hdfsdm_channel->Init.Input.Pins);
NYX 0:85b3fd62ea1a 391
NYX 0:85b3fd62ea1a 392 /* Set serial interface parameters */
NYX 0:85b3fd62ea1a 393 hdfsdm_channel->Instance->CHCFGR1 &= ~(DFSDM_CHCFGR1_SITP | DFSDM_CHCFGR1_SPICKSEL);
NYX 0:85b3fd62ea1a 394 hdfsdm_channel->Instance->CHCFGR1 |= (hdfsdm_channel->Init.SerialInterface.Type |
NYX 0:85b3fd62ea1a 395 hdfsdm_channel->Init.SerialInterface.SpiClock);
NYX 0:85b3fd62ea1a 396
NYX 0:85b3fd62ea1a 397 /* Set analog watchdog parameters */
NYX 0:85b3fd62ea1a 398 hdfsdm_channel->Instance->CHAWSCDR &= ~(DFSDM_CHAWSCDR_AWFORD | DFSDM_CHAWSCDR_AWFOSR);
NYX 0:85b3fd62ea1a 399 hdfsdm_channel->Instance->CHAWSCDR |= (hdfsdm_channel->Init.Awd.FilterOrder |
NYX 0:85b3fd62ea1a 400 ((hdfsdm_channel->Init.Awd.Oversampling - 1U) << DFSDM_CHAWSCDR_FOSR_OFFSET));
NYX 0:85b3fd62ea1a 401
NYX 0:85b3fd62ea1a 402 /* Set channel offset and right bit shift */
NYX 0:85b3fd62ea1a 403 hdfsdm_channel->Instance->CHCFGR2 &= ~(DFSDM_CHCFGR2_OFFSET | DFSDM_CHCFGR2_DTRBS);
NYX 0:85b3fd62ea1a 404 hdfsdm_channel->Instance->CHCFGR2 |= (((uint32_t) hdfsdm_channel->Init.Offset << DFSDM_CHCFGR2_OFFSET_OFFSET) |
NYX 0:85b3fd62ea1a 405 (hdfsdm_channel->Init.RightBitShift << DFSDM_CHCFGR2_DTRBS_OFFSET));
NYX 0:85b3fd62ea1a 406
NYX 0:85b3fd62ea1a 407 /* Enable DFSDM channel */
NYX 0:85b3fd62ea1a 408 hdfsdm_channel->Instance->CHCFGR1 |= DFSDM_CHCFGR1_CHEN;
NYX 0:85b3fd62ea1a 409
NYX 0:85b3fd62ea1a 410 /* Set DFSDM Channel to ready state */
NYX 0:85b3fd62ea1a 411 hdfsdm_channel->State = HAL_DFSDM_CHANNEL_STATE_READY;
NYX 0:85b3fd62ea1a 412
NYX 0:85b3fd62ea1a 413 /* Store channel handle in DFSDM channel handle table */
NYX 0:85b3fd62ea1a 414 channelHandleTable[DFSDM_GetChannelFromInstance(hdfsdm_channel->Instance)] = hdfsdm_channel;
NYX 0:85b3fd62ea1a 415
NYX 0:85b3fd62ea1a 416 #else
NYX 0:85b3fd62ea1a 417 /* Check that channel has not been already initialized */
NYX 0:85b3fd62ea1a 418 if(a_dfsdm1ChannelHandle[DFSDM_GetChannelFromInstance(hdfsdm_channel->Instance)] != NULL)
NYX 0:85b3fd62ea1a 419 {
NYX 0:85b3fd62ea1a 420 return HAL_ERROR;
NYX 0:85b3fd62ea1a 421 }
NYX 0:85b3fd62ea1a 422
NYX 0:85b3fd62ea1a 423 /* Call MSP init function */
NYX 0:85b3fd62ea1a 424 HAL_DFSDM_ChannelMspInit(hdfsdm_channel);
NYX 0:85b3fd62ea1a 425
NYX 0:85b3fd62ea1a 426 /* Update the channel counter */
NYX 0:85b3fd62ea1a 427 v_dfsdm1ChannelCounter++;
NYX 0:85b3fd62ea1a 428
NYX 0:85b3fd62ea1a 429 /* Configure output serial clock and enable global DFSDM interface only for first channel */
NYX 0:85b3fd62ea1a 430 if(v_dfsdm1ChannelCounter == 1U)
NYX 0:85b3fd62ea1a 431 {
NYX 0:85b3fd62ea1a 432 assert_param(IS_DFSDM_CHANNEL_OUTPUT_CLOCK(hdfsdm_channel->Init.OutputClock.Selection));
NYX 0:85b3fd62ea1a 433 /* Set the output serial clock source */
NYX 0:85b3fd62ea1a 434 DFSDM1_Channel0->CHCFGR1 &= ~(DFSDM_CHCFGR1_CKOUTSRC);
NYX 0:85b3fd62ea1a 435 DFSDM1_Channel0->CHCFGR1 |= hdfsdm_channel->Init.OutputClock.Selection;
NYX 0:85b3fd62ea1a 436
NYX 0:85b3fd62ea1a 437 /* Reset clock divider */
NYX 0:85b3fd62ea1a 438 DFSDM1_Channel0->CHCFGR1 &= ~(DFSDM_CHCFGR1_CKOUTDIV);
NYX 0:85b3fd62ea1a 439 if(hdfsdm_channel->Init.OutputClock.Activation == ENABLE)
NYX 0:85b3fd62ea1a 440 {
NYX 0:85b3fd62ea1a 441 assert_param(IS_DFSDM_CHANNEL_OUTPUT_CLOCK_DIVIDER(hdfsdm_channel->Init.OutputClock.Divider));
NYX 0:85b3fd62ea1a 442 /* Set the output clock divider */
NYX 0:85b3fd62ea1a 443 DFSDM1_Channel0->CHCFGR1 |= (uint32_t) ((hdfsdm_channel->Init.OutputClock.Divider - 1U) <<
NYX 0:85b3fd62ea1a 444 DFSDM_CHCFGR1_CLK_DIV_OFFSET);
NYX 0:85b3fd62ea1a 445 }
NYX 0:85b3fd62ea1a 446
NYX 0:85b3fd62ea1a 447 /* enable the DFSDM global interface */
NYX 0:85b3fd62ea1a 448 DFSDM1_Channel0->CHCFGR1 |= DFSDM_CHCFGR1_DFSDMEN;
NYX 0:85b3fd62ea1a 449 }
NYX 0:85b3fd62ea1a 450
NYX 0:85b3fd62ea1a 451 /* Set channel input parameters */
NYX 0:85b3fd62ea1a 452 hdfsdm_channel->Instance->CHCFGR1 &= ~(DFSDM_CHCFGR1_DATPACK | DFSDM_CHCFGR1_DATMPX |
NYX 0:85b3fd62ea1a 453 DFSDM_CHCFGR1_CHINSEL);
NYX 0:85b3fd62ea1a 454 hdfsdm_channel->Instance->CHCFGR1 |= (hdfsdm_channel->Init.Input.Multiplexer |
NYX 0:85b3fd62ea1a 455 hdfsdm_channel->Init.Input.DataPacking |
NYX 0:85b3fd62ea1a 456 hdfsdm_channel->Init.Input.Pins);
NYX 0:85b3fd62ea1a 457
NYX 0:85b3fd62ea1a 458 /* Set serial interface parameters */
NYX 0:85b3fd62ea1a 459 hdfsdm_channel->Instance->CHCFGR1 &= ~(DFSDM_CHCFGR1_SITP | DFSDM_CHCFGR1_SPICKSEL);
NYX 0:85b3fd62ea1a 460 hdfsdm_channel->Instance->CHCFGR1 |= (hdfsdm_channel->Init.SerialInterface.Type |
NYX 0:85b3fd62ea1a 461 hdfsdm_channel->Init.SerialInterface.SpiClock);
NYX 0:85b3fd62ea1a 462
NYX 0:85b3fd62ea1a 463 /* Set analog watchdog parameters */
NYX 0:85b3fd62ea1a 464 hdfsdm_channel->Instance->CHAWSCDR &= ~(DFSDM_CHAWSCDR_AWFORD | DFSDM_CHAWSCDR_AWFOSR);
NYX 0:85b3fd62ea1a 465 hdfsdm_channel->Instance->CHAWSCDR |= (hdfsdm_channel->Init.Awd.FilterOrder |
NYX 0:85b3fd62ea1a 466 ((hdfsdm_channel->Init.Awd.Oversampling - 1U) << DFSDM_CHAWSCDR_FOSR_OFFSET));
NYX 0:85b3fd62ea1a 467
NYX 0:85b3fd62ea1a 468 /* Set channel offset and right bit shift */
NYX 0:85b3fd62ea1a 469 hdfsdm_channel->Instance->CHCFGR2 &= ~(DFSDM_CHCFGR2_OFFSET | DFSDM_CHCFGR2_DTRBS);
NYX 0:85b3fd62ea1a 470 hdfsdm_channel->Instance->CHCFGR2 |= (((uint32_t) hdfsdm_channel->Init.Offset << DFSDM_CHCFGR2_OFFSET_OFFSET) |
NYX 0:85b3fd62ea1a 471 (hdfsdm_channel->Init.RightBitShift << DFSDM_CHCFGR2_DTRBS_OFFSET));
NYX 0:85b3fd62ea1a 472
NYX 0:85b3fd62ea1a 473 /* Enable DFSDM channel */
NYX 0:85b3fd62ea1a 474 hdfsdm_channel->Instance->CHCFGR1 |= DFSDM_CHCFGR1_CHEN;
NYX 0:85b3fd62ea1a 475
NYX 0:85b3fd62ea1a 476 /* Set DFSDM Channel to ready state */
NYX 0:85b3fd62ea1a 477 hdfsdm_channel->State = HAL_DFSDM_CHANNEL_STATE_READY;
NYX 0:85b3fd62ea1a 478
NYX 0:85b3fd62ea1a 479 /* Store channel handle in DFSDM channel handle table */
NYX 0:85b3fd62ea1a 480 a_dfsdm1ChannelHandle[DFSDM_GetChannelFromInstance(hdfsdm_channel->Instance)] = hdfsdm_channel;
NYX 0:85b3fd62ea1a 481 #endif /* DFSDM2_Channel0 */
NYX 0:85b3fd62ea1a 482
NYX 0:85b3fd62ea1a 483 return HAL_OK;
NYX 0:85b3fd62ea1a 484 }
NYX 0:85b3fd62ea1a 485
NYX 0:85b3fd62ea1a 486 /**
NYX 0:85b3fd62ea1a 487 * @brief De-initialize the DFSDM channel.
NYX 0:85b3fd62ea1a 488 * @param hdfsdm_channel : DFSDM channel handle.
NYX 0:85b3fd62ea1a 489 * @retval HAL status.
NYX 0:85b3fd62ea1a 490 */
NYX 0:85b3fd62ea1a 491 HAL_StatusTypeDef HAL_DFSDM_ChannelDeInit(DFSDM_Channel_HandleTypeDef *hdfsdm_channel)
NYX 0:85b3fd62ea1a 492 {
NYX 0:85b3fd62ea1a 493 #if defined(DFSDM2_Channel0)
NYX 0:85b3fd62ea1a 494 __IO uint32_t* channelCounterPtr;
NYX 0:85b3fd62ea1a 495 DFSDM_Channel_HandleTypeDef **channelHandleTable;
NYX 0:85b3fd62ea1a 496 DFSDM_Channel_TypeDef* channel0Instance;
NYX 0:85b3fd62ea1a 497 #endif /* defined(DFSDM2_Channel0) */
NYX 0:85b3fd62ea1a 498
NYX 0:85b3fd62ea1a 499 /* Check DFSDM Channel handle */
NYX 0:85b3fd62ea1a 500 if(hdfsdm_channel == NULL)
NYX 0:85b3fd62ea1a 501 {
NYX 0:85b3fd62ea1a 502 return HAL_ERROR;
NYX 0:85b3fd62ea1a 503 }
NYX 0:85b3fd62ea1a 504
NYX 0:85b3fd62ea1a 505 /* Check parameters */
NYX 0:85b3fd62ea1a 506 assert_param(IS_DFSDM_CHANNEL_ALL_INSTANCE(hdfsdm_channel->Instance));
NYX 0:85b3fd62ea1a 507
NYX 0:85b3fd62ea1a 508 #if defined(DFSDM2_Channel0)
NYX 0:85b3fd62ea1a 509 /* Get channel counter, channel handle table and channel 0 instance */
NYX 0:85b3fd62ea1a 510 if(IS_DFSDM1_CHANNEL_INSTANCE(hdfsdm_channel->Instance))
NYX 0:85b3fd62ea1a 511 {
NYX 0:85b3fd62ea1a 512 channelCounterPtr = &v_dfsdm1ChannelCounter;
NYX 0:85b3fd62ea1a 513 channelHandleTable = a_dfsdm1ChannelHandle;
NYX 0:85b3fd62ea1a 514 channel0Instance = DFSDM1_Channel0;
NYX 0:85b3fd62ea1a 515 }
NYX 0:85b3fd62ea1a 516 else
NYX 0:85b3fd62ea1a 517 {
NYX 0:85b3fd62ea1a 518 channelCounterPtr = &v_dfsdm2ChannelCounter;
NYX 0:85b3fd62ea1a 519 channelHandleTable = a_dfsdm2ChannelHandle;
NYX 0:85b3fd62ea1a 520 channel0Instance = DFSDM2_Channel0;
NYX 0:85b3fd62ea1a 521 }
NYX 0:85b3fd62ea1a 522
NYX 0:85b3fd62ea1a 523 /* Check that channel has not been already deinitialized */
NYX 0:85b3fd62ea1a 524 if(channelHandleTable[DFSDM_GetChannelFromInstance(hdfsdm_channel->Instance)] == NULL)
NYX 0:85b3fd62ea1a 525 {
NYX 0:85b3fd62ea1a 526 return HAL_ERROR;
NYX 0:85b3fd62ea1a 527 }
NYX 0:85b3fd62ea1a 528
NYX 0:85b3fd62ea1a 529 /* Disable the DFSDM channel */
NYX 0:85b3fd62ea1a 530 hdfsdm_channel->Instance->CHCFGR1 &= ~(DFSDM_CHCFGR1_CHEN);
NYX 0:85b3fd62ea1a 531
NYX 0:85b3fd62ea1a 532 /* Update the channel counter */
NYX 0:85b3fd62ea1a 533 (*channelCounterPtr)--;
NYX 0:85b3fd62ea1a 534
NYX 0:85b3fd62ea1a 535 /* Disable global DFSDM at deinit of last channel */
NYX 0:85b3fd62ea1a 536 if(*channelCounterPtr == 0U)
NYX 0:85b3fd62ea1a 537 {
NYX 0:85b3fd62ea1a 538 channel0Instance->CHCFGR1 &= ~(DFSDM_CHCFGR1_DFSDMEN);
NYX 0:85b3fd62ea1a 539 }
NYX 0:85b3fd62ea1a 540
NYX 0:85b3fd62ea1a 541 /* Call MSP deinit function */
NYX 0:85b3fd62ea1a 542 HAL_DFSDM_ChannelMspDeInit(hdfsdm_channel);
NYX 0:85b3fd62ea1a 543
NYX 0:85b3fd62ea1a 544 /* Set DFSDM Channel in reset state */
NYX 0:85b3fd62ea1a 545 hdfsdm_channel->State = HAL_DFSDM_CHANNEL_STATE_RESET;
NYX 0:85b3fd62ea1a 546
NYX 0:85b3fd62ea1a 547 /* Reset channel handle in DFSDM channel handle table */
NYX 0:85b3fd62ea1a 548 channelHandleTable[DFSDM_GetChannelFromInstance(hdfsdm_channel->Instance)] = NULL;
NYX 0:85b3fd62ea1a 549 #else
NYX 0:85b3fd62ea1a 550 /* Check that channel has not been already deinitialized */
NYX 0:85b3fd62ea1a 551 if(a_dfsdm1ChannelHandle[DFSDM_GetChannelFromInstance(hdfsdm_channel->Instance)] == NULL)
NYX 0:85b3fd62ea1a 552 {
NYX 0:85b3fd62ea1a 553 return HAL_ERROR;
NYX 0:85b3fd62ea1a 554 }
NYX 0:85b3fd62ea1a 555
NYX 0:85b3fd62ea1a 556 /* Disable the DFSDM channel */
NYX 0:85b3fd62ea1a 557 hdfsdm_channel->Instance->CHCFGR1 &= ~(DFSDM_CHCFGR1_CHEN);
NYX 0:85b3fd62ea1a 558
NYX 0:85b3fd62ea1a 559 /* Update the channel counter */
NYX 0:85b3fd62ea1a 560 v_dfsdm1ChannelCounter--;
NYX 0:85b3fd62ea1a 561
NYX 0:85b3fd62ea1a 562 /* Disable global DFSDM at deinit of last channel */
NYX 0:85b3fd62ea1a 563 if(v_dfsdm1ChannelCounter == 0U)
NYX 0:85b3fd62ea1a 564 {
NYX 0:85b3fd62ea1a 565 DFSDM1_Channel0->CHCFGR1 &= ~(DFSDM_CHCFGR1_DFSDMEN);
NYX 0:85b3fd62ea1a 566 }
NYX 0:85b3fd62ea1a 567
NYX 0:85b3fd62ea1a 568 /* Call MSP deinit function */
NYX 0:85b3fd62ea1a 569 HAL_DFSDM_ChannelMspDeInit(hdfsdm_channel);
NYX 0:85b3fd62ea1a 570
NYX 0:85b3fd62ea1a 571 /* Set DFSDM Channel in reset state */
NYX 0:85b3fd62ea1a 572 hdfsdm_channel->State = HAL_DFSDM_CHANNEL_STATE_RESET;
NYX 0:85b3fd62ea1a 573
NYX 0:85b3fd62ea1a 574 /* Reset channel handle in DFSDM channel handle table */
NYX 0:85b3fd62ea1a 575 a_dfsdm1ChannelHandle[DFSDM_GetChannelFromInstance(hdfsdm_channel->Instance)] = (DFSDM_Channel_HandleTypeDef *) NULL;
NYX 0:85b3fd62ea1a 576 #endif /* defined(DFSDM2_Channel0) */
NYX 0:85b3fd62ea1a 577
NYX 0:85b3fd62ea1a 578 return HAL_OK;
NYX 0:85b3fd62ea1a 579 }
NYX 0:85b3fd62ea1a 580
NYX 0:85b3fd62ea1a 581 /**
NYX 0:85b3fd62ea1a 582 * @brief Initialize the DFSDM channel MSP.
NYX 0:85b3fd62ea1a 583 * @param hdfsdm_channel : DFSDM channel handle.
NYX 0:85b3fd62ea1a 584 * @retval None
NYX 0:85b3fd62ea1a 585 */
NYX 0:85b3fd62ea1a 586 __weak void HAL_DFSDM_ChannelMspInit(DFSDM_Channel_HandleTypeDef *hdfsdm_channel)
NYX 0:85b3fd62ea1a 587 {
NYX 0:85b3fd62ea1a 588 /* Prevent unused argument(s) compilation warning */
NYX 0:85b3fd62ea1a 589 UNUSED(hdfsdm_channel);
NYX 0:85b3fd62ea1a 590 /* NOTE : This function should not be modified, when the function is needed,
NYX 0:85b3fd62ea1a 591 the HAL_DFSDM_ChannelMspInit could be implemented in the user file.
NYX 0:85b3fd62ea1a 592 */
NYX 0:85b3fd62ea1a 593 }
NYX 0:85b3fd62ea1a 594
NYX 0:85b3fd62ea1a 595 /**
NYX 0:85b3fd62ea1a 596 * @brief De-initialize the DFSDM channel MSP.
NYX 0:85b3fd62ea1a 597 * @param hdfsdm_channel : DFSDM channel handle.
NYX 0:85b3fd62ea1a 598 * @retval None
NYX 0:85b3fd62ea1a 599 */
NYX 0:85b3fd62ea1a 600 __weak void HAL_DFSDM_ChannelMspDeInit(DFSDM_Channel_HandleTypeDef *hdfsdm_channel)
NYX 0:85b3fd62ea1a 601 {
NYX 0:85b3fd62ea1a 602 /* Prevent unused argument(s) compilation warning */
NYX 0:85b3fd62ea1a 603 UNUSED(hdfsdm_channel);
NYX 0:85b3fd62ea1a 604 /* NOTE : This function should not be modified, when the function is needed,
NYX 0:85b3fd62ea1a 605 the HAL_DFSDM_ChannelMspDeInit could be implemented in the user file.
NYX 0:85b3fd62ea1a 606 */
NYX 0:85b3fd62ea1a 607 }
NYX 0:85b3fd62ea1a 608
NYX 0:85b3fd62ea1a 609 /**
NYX 0:85b3fd62ea1a 610 * @}
NYX 0:85b3fd62ea1a 611 */
NYX 0:85b3fd62ea1a 612
NYX 0:85b3fd62ea1a 613 /** @defgroup DFSDM_Exported_Functions_Group2_Channel Channel operation functions
NYX 0:85b3fd62ea1a 614 * @brief Channel operation functions
NYX 0:85b3fd62ea1a 615 *
NYX 0:85b3fd62ea1a 616 @verbatim
NYX 0:85b3fd62ea1a 617 ==============================================================================
NYX 0:85b3fd62ea1a 618 ##### Channel operation functions #####
NYX 0:85b3fd62ea1a 619 ==============================================================================
NYX 0:85b3fd62ea1a 620 [..] This section provides functions allowing to:
NYX 0:85b3fd62ea1a 621 (+) Manage clock absence detector feature.
NYX 0:85b3fd62ea1a 622 (+) Manage short circuit detector feature.
NYX 0:85b3fd62ea1a 623 (+) Get analog watchdog value.
NYX 0:85b3fd62ea1a 624 (+) Modify offset value.
NYX 0:85b3fd62ea1a 625 @endverbatim
NYX 0:85b3fd62ea1a 626 * @{
NYX 0:85b3fd62ea1a 627 */
NYX 0:85b3fd62ea1a 628
NYX 0:85b3fd62ea1a 629 /**
NYX 0:85b3fd62ea1a 630 * @brief This function allows to start clock absence detection in polling mode.
NYX 0:85b3fd62ea1a 631 * @note Same mode has to be used for all channels.
NYX 0:85b3fd62ea1a 632 * @note If clock is not available on this channel during 5 seconds,
NYX 0:85b3fd62ea1a 633 * clock absence detection will not be activated and function
NYX 0:85b3fd62ea1a 634 * will return HAL_TIMEOUT error.
NYX 0:85b3fd62ea1a 635 * @param hdfsdm_channel : DFSDM channel handle.
NYX 0:85b3fd62ea1a 636 * @retval HAL status
NYX 0:85b3fd62ea1a 637 */
NYX 0:85b3fd62ea1a 638 HAL_StatusTypeDef HAL_DFSDM_ChannelCkabStart(DFSDM_Channel_HandleTypeDef *hdfsdm_channel)
NYX 0:85b3fd62ea1a 639 {
NYX 0:85b3fd62ea1a 640 HAL_StatusTypeDef status = HAL_OK;
NYX 0:85b3fd62ea1a 641 uint32_t tickstart;
NYX 0:85b3fd62ea1a 642 uint32_t channel;
NYX 0:85b3fd62ea1a 643
NYX 0:85b3fd62ea1a 644 #if defined(DFSDM2_Channel0)
NYX 0:85b3fd62ea1a 645 DFSDM_Filter_TypeDef* filter0Instance;
NYX 0:85b3fd62ea1a 646 #endif /* defined(DFSDM2_Channel0) */
NYX 0:85b3fd62ea1a 647
NYX 0:85b3fd62ea1a 648 /* Check parameters */
NYX 0:85b3fd62ea1a 649 assert_param(IS_DFSDM_CHANNEL_ALL_INSTANCE(hdfsdm_channel->Instance));
NYX 0:85b3fd62ea1a 650
NYX 0:85b3fd62ea1a 651 /* Check DFSDM channel state */
NYX 0:85b3fd62ea1a 652 if(hdfsdm_channel->State != HAL_DFSDM_CHANNEL_STATE_READY)
NYX 0:85b3fd62ea1a 653 {
NYX 0:85b3fd62ea1a 654 /* Return error status */
NYX 0:85b3fd62ea1a 655 status = HAL_ERROR;
NYX 0:85b3fd62ea1a 656 }
NYX 0:85b3fd62ea1a 657 else
NYX 0:85b3fd62ea1a 658 {
NYX 0:85b3fd62ea1a 659 #if defined (DFSDM2_Channel0)
NYX 0:85b3fd62ea1a 660 /* Get channel counter, channel handle table and channel 0 instance */
NYX 0:85b3fd62ea1a 661 if(IS_DFSDM1_CHANNEL_INSTANCE(hdfsdm_channel->Instance))
NYX 0:85b3fd62ea1a 662 {
NYX 0:85b3fd62ea1a 663 filter0Instance = DFSDM1_Filter0;
NYX 0:85b3fd62ea1a 664 }
NYX 0:85b3fd62ea1a 665 else
NYX 0:85b3fd62ea1a 666 {
NYX 0:85b3fd62ea1a 667 filter0Instance = DFSDM2_Filter0;
NYX 0:85b3fd62ea1a 668 }
NYX 0:85b3fd62ea1a 669 /* Get channel number from channel instance */
NYX 0:85b3fd62ea1a 670 channel = DFSDM_GetChannelFromInstance(hdfsdm_channel->Instance);
NYX 0:85b3fd62ea1a 671
NYX 0:85b3fd62ea1a 672 /* Get timeout */
NYX 0:85b3fd62ea1a 673 tickstart = HAL_GetTick();
NYX 0:85b3fd62ea1a 674
NYX 0:85b3fd62ea1a 675 /* Clear clock absence flag */
NYX 0:85b3fd62ea1a 676 while((((filter0Instance->FLTISR & DFSDM_FLTISR_CKABF) >> (DFSDM_FLTISR_CKABF_OFFSET + channel)) & 1U) != 0U)
NYX 0:85b3fd62ea1a 677 {
NYX 0:85b3fd62ea1a 678 filter0Instance->FLTICR = (1U << (DFSDM_FLTICR_CLRCKABF_OFFSET + channel));
NYX 0:85b3fd62ea1a 679
NYX 0:85b3fd62ea1a 680 /* Check the Timeout */
NYX 0:85b3fd62ea1a 681 if((HAL_GetTick()-tickstart) > DFSDM_CKAB_TIMEOUT)
NYX 0:85b3fd62ea1a 682 {
NYX 0:85b3fd62ea1a 683 /* Set timeout status */
NYX 0:85b3fd62ea1a 684 status = HAL_TIMEOUT;
NYX 0:85b3fd62ea1a 685 break;
NYX 0:85b3fd62ea1a 686 }
NYX 0:85b3fd62ea1a 687 }
NYX 0:85b3fd62ea1a 688 #else
NYX 0:85b3fd62ea1a 689 /* Get channel number from channel instance */
NYX 0:85b3fd62ea1a 690 channel = DFSDM_GetChannelFromInstance(hdfsdm_channel->Instance);
NYX 0:85b3fd62ea1a 691
NYX 0:85b3fd62ea1a 692 /* Get timeout */
NYX 0:85b3fd62ea1a 693 tickstart = HAL_GetTick();
NYX 0:85b3fd62ea1a 694
NYX 0:85b3fd62ea1a 695 /* Clear clock absence flag */
NYX 0:85b3fd62ea1a 696 while((((DFSDM1_Filter0->FLTISR & DFSDM_FLTISR_CKABF) >> (DFSDM_FLTISR_CKABF_OFFSET + channel)) & 1U) != 0U)
NYX 0:85b3fd62ea1a 697 {
NYX 0:85b3fd62ea1a 698 DFSDM1_Filter0->FLTICR = (1U << (DFSDM_FLTICR_CLRCKABF_OFFSET + channel));
NYX 0:85b3fd62ea1a 699
NYX 0:85b3fd62ea1a 700 /* Check the Timeout */
NYX 0:85b3fd62ea1a 701 if((HAL_GetTick()-tickstart) > DFSDM_CKAB_TIMEOUT)
NYX 0:85b3fd62ea1a 702 {
NYX 0:85b3fd62ea1a 703 /* Set timeout status */
NYX 0:85b3fd62ea1a 704 status = HAL_TIMEOUT;
NYX 0:85b3fd62ea1a 705 break;
NYX 0:85b3fd62ea1a 706 }
NYX 0:85b3fd62ea1a 707 }
NYX 0:85b3fd62ea1a 708 #endif /* DFSDM2_Channel0 */
NYX 0:85b3fd62ea1a 709
NYX 0:85b3fd62ea1a 710 if(status == HAL_OK)
NYX 0:85b3fd62ea1a 711 {
NYX 0:85b3fd62ea1a 712 /* Start clock absence detection */
NYX 0:85b3fd62ea1a 713 hdfsdm_channel->Instance->CHCFGR1 |= DFSDM_CHCFGR1_CKABEN;
NYX 0:85b3fd62ea1a 714 }
NYX 0:85b3fd62ea1a 715 }
NYX 0:85b3fd62ea1a 716 /* Return function status */
NYX 0:85b3fd62ea1a 717 return status;
NYX 0:85b3fd62ea1a 718 }
NYX 0:85b3fd62ea1a 719
NYX 0:85b3fd62ea1a 720 /**
NYX 0:85b3fd62ea1a 721 * @brief This function allows to poll for the clock absence detection.
NYX 0:85b3fd62ea1a 722 * @param hdfsdm_channel : DFSDM channel handle.
NYX 0:85b3fd62ea1a 723 * @param Timeout : Timeout value in milliseconds.
NYX 0:85b3fd62ea1a 724 * @retval HAL status
NYX 0:85b3fd62ea1a 725 */
NYX 0:85b3fd62ea1a 726 HAL_StatusTypeDef HAL_DFSDM_ChannelPollForCkab(DFSDM_Channel_HandleTypeDef *hdfsdm_channel,
NYX 0:85b3fd62ea1a 727 uint32_t Timeout)
NYX 0:85b3fd62ea1a 728 {
NYX 0:85b3fd62ea1a 729 uint32_t tickstart;
NYX 0:85b3fd62ea1a 730 uint32_t channel;
NYX 0:85b3fd62ea1a 731 #if defined(DFSDM2_Channel0)
NYX 0:85b3fd62ea1a 732 DFSDM_Filter_TypeDef* filter0Instance;
NYX 0:85b3fd62ea1a 733 #endif /* defined(DFSDM2_Channel0) */
NYX 0:85b3fd62ea1a 734
NYX 0:85b3fd62ea1a 735 /* Check parameters */
NYX 0:85b3fd62ea1a 736 assert_param(IS_DFSDM_CHANNEL_ALL_INSTANCE(hdfsdm_channel->Instance));
NYX 0:85b3fd62ea1a 737
NYX 0:85b3fd62ea1a 738 /* Check DFSDM channel state */
NYX 0:85b3fd62ea1a 739 if(hdfsdm_channel->State != HAL_DFSDM_CHANNEL_STATE_READY)
NYX 0:85b3fd62ea1a 740 {
NYX 0:85b3fd62ea1a 741 /* Return error status */
NYX 0:85b3fd62ea1a 742 return HAL_ERROR;
NYX 0:85b3fd62ea1a 743 }
NYX 0:85b3fd62ea1a 744 else
NYX 0:85b3fd62ea1a 745 {
NYX 0:85b3fd62ea1a 746 #if defined(DFSDM2_Channel0)
NYX 0:85b3fd62ea1a 747
NYX 0:85b3fd62ea1a 748 /* Get channel counter, channel handle table and channel 0 instance */
NYX 0:85b3fd62ea1a 749 if(IS_DFSDM1_CHANNEL_INSTANCE(hdfsdm_channel->Instance))
NYX 0:85b3fd62ea1a 750 {
NYX 0:85b3fd62ea1a 751 filter0Instance = DFSDM1_Filter0;
NYX 0:85b3fd62ea1a 752 }
NYX 0:85b3fd62ea1a 753 else
NYX 0:85b3fd62ea1a 754 {
NYX 0:85b3fd62ea1a 755 filter0Instance = DFSDM2_Filter0;
NYX 0:85b3fd62ea1a 756 }
NYX 0:85b3fd62ea1a 757
NYX 0:85b3fd62ea1a 758 /* Get channel number from channel instance */
NYX 0:85b3fd62ea1a 759 channel = DFSDM_GetChannelFromInstance(hdfsdm_channel->Instance);
NYX 0:85b3fd62ea1a 760
NYX 0:85b3fd62ea1a 761 /* Get timeout */
NYX 0:85b3fd62ea1a 762 tickstart = HAL_GetTick();
NYX 0:85b3fd62ea1a 763
NYX 0:85b3fd62ea1a 764 /* Wait clock absence detection */
NYX 0:85b3fd62ea1a 765 while((((filter0Instance->FLTISR & DFSDM_FLTISR_CKABF) >> (DFSDM_FLTISR_CKABF_OFFSET + channel)) & 1U) == 0U)
NYX 0:85b3fd62ea1a 766 {
NYX 0:85b3fd62ea1a 767 /* Check the Timeout */
NYX 0:85b3fd62ea1a 768 if(Timeout != HAL_MAX_DELAY)
NYX 0:85b3fd62ea1a 769 {
NYX 0:85b3fd62ea1a 770 if((Timeout == 0U) || ((HAL_GetTick()-tickstart) > Timeout))
NYX 0:85b3fd62ea1a 771 {
NYX 0:85b3fd62ea1a 772 /* Return timeout status */
NYX 0:85b3fd62ea1a 773 return HAL_TIMEOUT;
NYX 0:85b3fd62ea1a 774 }
NYX 0:85b3fd62ea1a 775 }
NYX 0:85b3fd62ea1a 776 }
NYX 0:85b3fd62ea1a 777
NYX 0:85b3fd62ea1a 778 /* Clear clock absence detection flag */
NYX 0:85b3fd62ea1a 779 filter0Instance->FLTICR = (1U << (DFSDM_FLTICR_CLRCKABF_OFFSET + channel));
NYX 0:85b3fd62ea1a 780 #else
NYX 0:85b3fd62ea1a 781 /* Get channel number from channel instance */
NYX 0:85b3fd62ea1a 782 channel = DFSDM_GetChannelFromInstance(hdfsdm_channel->Instance);
NYX 0:85b3fd62ea1a 783
NYX 0:85b3fd62ea1a 784 /* Get timeout */
NYX 0:85b3fd62ea1a 785 tickstart = HAL_GetTick();
NYX 0:85b3fd62ea1a 786
NYX 0:85b3fd62ea1a 787 /* Wait clock absence detection */
NYX 0:85b3fd62ea1a 788 while((((DFSDM1_Filter0->FLTISR & DFSDM_FLTISR_CKABF) >> (DFSDM_FLTISR_CKABF_OFFSET + channel)) & 1U) == 0U)
NYX 0:85b3fd62ea1a 789 {
NYX 0:85b3fd62ea1a 790 /* Check the Timeout */
NYX 0:85b3fd62ea1a 791 if(Timeout != HAL_MAX_DELAY)
NYX 0:85b3fd62ea1a 792 {
NYX 0:85b3fd62ea1a 793 if((Timeout == 0U) || ((HAL_GetTick()-tickstart) > Timeout))
NYX 0:85b3fd62ea1a 794 {
NYX 0:85b3fd62ea1a 795 /* Return timeout status */
NYX 0:85b3fd62ea1a 796 return HAL_TIMEOUT;
NYX 0:85b3fd62ea1a 797 }
NYX 0:85b3fd62ea1a 798 }
NYX 0:85b3fd62ea1a 799 }
NYX 0:85b3fd62ea1a 800
NYX 0:85b3fd62ea1a 801 /* Clear clock absence detection flag */
NYX 0:85b3fd62ea1a 802 DFSDM1_Filter0->FLTICR = (1U << (DFSDM_FLTICR_CLRCKABF_OFFSET + channel));
NYX 0:85b3fd62ea1a 803 #endif /* defined(DFSDM2_Channel0) */
NYX 0:85b3fd62ea1a 804 /* Return function status */
NYX 0:85b3fd62ea1a 805 return HAL_OK;
NYX 0:85b3fd62ea1a 806 }
NYX 0:85b3fd62ea1a 807 }
NYX 0:85b3fd62ea1a 808
NYX 0:85b3fd62ea1a 809 /**
NYX 0:85b3fd62ea1a 810 * @brief This function allows to stop clock absence detection in polling mode.
NYX 0:85b3fd62ea1a 811 * @param hdfsdm_channel : DFSDM channel handle.
NYX 0:85b3fd62ea1a 812 * @retval HAL status
NYX 0:85b3fd62ea1a 813 */
NYX 0:85b3fd62ea1a 814 HAL_StatusTypeDef HAL_DFSDM_ChannelCkabStop(DFSDM_Channel_HandleTypeDef *hdfsdm_channel)
NYX 0:85b3fd62ea1a 815 {
NYX 0:85b3fd62ea1a 816 HAL_StatusTypeDef status = HAL_OK;
NYX 0:85b3fd62ea1a 817 uint32_t channel;
NYX 0:85b3fd62ea1a 818 #if defined(DFSDM2_Channel0)
NYX 0:85b3fd62ea1a 819 DFSDM_Filter_TypeDef* filter0Instance;
NYX 0:85b3fd62ea1a 820 #endif /* defined(DFSDM2_Channel0) */
NYX 0:85b3fd62ea1a 821
NYX 0:85b3fd62ea1a 822 /* Check parameters */
NYX 0:85b3fd62ea1a 823 assert_param(IS_DFSDM_CHANNEL_ALL_INSTANCE(hdfsdm_channel->Instance));
NYX 0:85b3fd62ea1a 824
NYX 0:85b3fd62ea1a 825 /* Check DFSDM channel state */
NYX 0:85b3fd62ea1a 826 if(hdfsdm_channel->State != HAL_DFSDM_CHANNEL_STATE_READY)
NYX 0:85b3fd62ea1a 827 {
NYX 0:85b3fd62ea1a 828 /* Return error status */
NYX 0:85b3fd62ea1a 829 status = HAL_ERROR;
NYX 0:85b3fd62ea1a 830 }
NYX 0:85b3fd62ea1a 831 else
NYX 0:85b3fd62ea1a 832 {
NYX 0:85b3fd62ea1a 833 #if defined(DFSDM2_Channel0)
NYX 0:85b3fd62ea1a 834
NYX 0:85b3fd62ea1a 835 /* Get channel counter, channel handle table and channel 0 instance */
NYX 0:85b3fd62ea1a 836 if(IS_DFSDM1_CHANNEL_INSTANCE(hdfsdm_channel->Instance))
NYX 0:85b3fd62ea1a 837 {
NYX 0:85b3fd62ea1a 838 filter0Instance = DFSDM1_Filter0;
NYX 0:85b3fd62ea1a 839 }
NYX 0:85b3fd62ea1a 840 else
NYX 0:85b3fd62ea1a 841 {
NYX 0:85b3fd62ea1a 842 filter0Instance = DFSDM2_Filter0;
NYX 0:85b3fd62ea1a 843 }
NYX 0:85b3fd62ea1a 844
NYX 0:85b3fd62ea1a 845 /* Stop clock absence detection */
NYX 0:85b3fd62ea1a 846 hdfsdm_channel->Instance->CHCFGR1 &= ~(DFSDM_CHCFGR1_CKABEN);
NYX 0:85b3fd62ea1a 847
NYX 0:85b3fd62ea1a 848 /* Clear clock absence flag */
NYX 0:85b3fd62ea1a 849 channel = DFSDM_GetChannelFromInstance(hdfsdm_channel->Instance);
NYX 0:85b3fd62ea1a 850 filter0Instance->FLTICR = (1U << (DFSDM_FLTICR_CLRCKABF_OFFSET + channel));
NYX 0:85b3fd62ea1a 851
NYX 0:85b3fd62ea1a 852 #else
NYX 0:85b3fd62ea1a 853 /* Stop clock absence detection */
NYX 0:85b3fd62ea1a 854 hdfsdm_channel->Instance->CHCFGR1 &= ~(DFSDM_CHCFGR1_CKABEN);
NYX 0:85b3fd62ea1a 855
NYX 0:85b3fd62ea1a 856 /* Clear clock absence flag */
NYX 0:85b3fd62ea1a 857 channel = DFSDM_GetChannelFromInstance(hdfsdm_channel->Instance);
NYX 0:85b3fd62ea1a 858 DFSDM1_Filter0->FLTICR = (1U << (DFSDM_FLTICR_CLRCKABF_OFFSET + channel));
NYX 0:85b3fd62ea1a 859 #endif /* DFSDM2_Channel0 */
NYX 0:85b3fd62ea1a 860 }
NYX 0:85b3fd62ea1a 861 /* Return function status */
NYX 0:85b3fd62ea1a 862 return status;
NYX 0:85b3fd62ea1a 863 }
NYX 0:85b3fd62ea1a 864
NYX 0:85b3fd62ea1a 865 /**
NYX 0:85b3fd62ea1a 866 * @brief This function allows to start clock absence detection in interrupt mode.
NYX 0:85b3fd62ea1a 867 * @note Same mode has to be used for all channels.
NYX 0:85b3fd62ea1a 868 * @note If clock is not available on this channel during 5 seconds,
NYX 0:85b3fd62ea1a 869 * clock absence detection will not be activated and function
NYX 0:85b3fd62ea1a 870 * will return HAL_TIMEOUT error.
NYX 0:85b3fd62ea1a 871 * @param hdfsdm_channel : DFSDM channel handle.
NYX 0:85b3fd62ea1a 872 * @retval HAL status
NYX 0:85b3fd62ea1a 873 */
NYX 0:85b3fd62ea1a 874 HAL_StatusTypeDef HAL_DFSDM_ChannelCkabStart_IT(DFSDM_Channel_HandleTypeDef *hdfsdm_channel)
NYX 0:85b3fd62ea1a 875 {
NYX 0:85b3fd62ea1a 876 HAL_StatusTypeDef status = HAL_OK;
NYX 0:85b3fd62ea1a 877 uint32_t channel;
NYX 0:85b3fd62ea1a 878 uint32_t tickstart;
NYX 0:85b3fd62ea1a 879 #if defined(DFSDM2_Channel0)
NYX 0:85b3fd62ea1a 880 DFSDM_Filter_TypeDef* filter0Instance;
NYX 0:85b3fd62ea1a 881 #endif /* defined(DFSDM2_Channel0) */
NYX 0:85b3fd62ea1a 882
NYX 0:85b3fd62ea1a 883 /* Check parameters */
NYX 0:85b3fd62ea1a 884 assert_param(IS_DFSDM_CHANNEL_ALL_INSTANCE(hdfsdm_channel->Instance));
NYX 0:85b3fd62ea1a 885
NYX 0:85b3fd62ea1a 886 /* Check DFSDM channel state */
NYX 0:85b3fd62ea1a 887 if(hdfsdm_channel->State != HAL_DFSDM_CHANNEL_STATE_READY)
NYX 0:85b3fd62ea1a 888 {
NYX 0:85b3fd62ea1a 889 /* Return error status */
NYX 0:85b3fd62ea1a 890 status = HAL_ERROR;
NYX 0:85b3fd62ea1a 891 }
NYX 0:85b3fd62ea1a 892 else
NYX 0:85b3fd62ea1a 893 {
NYX 0:85b3fd62ea1a 894 #if defined(DFSDM2_Channel0)
NYX 0:85b3fd62ea1a 895
NYX 0:85b3fd62ea1a 896 /* Get channel counter, channel handle table and channel 0 instance */
NYX 0:85b3fd62ea1a 897 if(IS_DFSDM1_CHANNEL_INSTANCE(hdfsdm_channel->Instance))
NYX 0:85b3fd62ea1a 898 {
NYX 0:85b3fd62ea1a 899 filter0Instance = DFSDM1_Filter0;
NYX 0:85b3fd62ea1a 900 }
NYX 0:85b3fd62ea1a 901 else
NYX 0:85b3fd62ea1a 902 {
NYX 0:85b3fd62ea1a 903 filter0Instance = DFSDM2_Filter0;
NYX 0:85b3fd62ea1a 904 }
NYX 0:85b3fd62ea1a 905
NYX 0:85b3fd62ea1a 906 /* Get channel number from channel instance */
NYX 0:85b3fd62ea1a 907 channel = DFSDM_GetChannelFromInstance(hdfsdm_channel->Instance);
NYX 0:85b3fd62ea1a 908
NYX 0:85b3fd62ea1a 909 /* Get timeout */
NYX 0:85b3fd62ea1a 910 tickstart = HAL_GetTick();
NYX 0:85b3fd62ea1a 911
NYX 0:85b3fd62ea1a 912 /* Clear clock absence flag */
NYX 0:85b3fd62ea1a 913 while((((filter0Instance->FLTISR & DFSDM_FLTISR_CKABF) >> (DFSDM_FLTISR_CKABF_OFFSET + channel)) & 1U) != 0U)
NYX 0:85b3fd62ea1a 914 {
NYX 0:85b3fd62ea1a 915 filter0Instance->FLTICR = (1U << (DFSDM_FLTICR_CLRCKABF_OFFSET + channel));
NYX 0:85b3fd62ea1a 916
NYX 0:85b3fd62ea1a 917 /* Check the Timeout */
NYX 0:85b3fd62ea1a 918 if((HAL_GetTick()-tickstart) > DFSDM_CKAB_TIMEOUT)
NYX 0:85b3fd62ea1a 919 {
NYX 0:85b3fd62ea1a 920 /* Set timeout status */
NYX 0:85b3fd62ea1a 921 status = HAL_TIMEOUT;
NYX 0:85b3fd62ea1a 922 break;
NYX 0:85b3fd62ea1a 923 }
NYX 0:85b3fd62ea1a 924 }
NYX 0:85b3fd62ea1a 925
NYX 0:85b3fd62ea1a 926 if(status == HAL_OK)
NYX 0:85b3fd62ea1a 927 {
NYX 0:85b3fd62ea1a 928 /* Activate clock absence detection interrupt */
NYX 0:85b3fd62ea1a 929 filter0Instance->FLTCR2 |= DFSDM_FLTCR2_CKABIE;
NYX 0:85b3fd62ea1a 930
NYX 0:85b3fd62ea1a 931 /* Start clock absence detection */
NYX 0:85b3fd62ea1a 932 hdfsdm_channel->Instance->CHCFGR1 |= DFSDM_CHCFGR1_CKABEN;
NYX 0:85b3fd62ea1a 933 }
NYX 0:85b3fd62ea1a 934 #else
NYX 0:85b3fd62ea1a 935 /* Get channel number from channel instance */
NYX 0:85b3fd62ea1a 936 channel = DFSDM_GetChannelFromInstance(hdfsdm_channel->Instance);
NYX 0:85b3fd62ea1a 937
NYX 0:85b3fd62ea1a 938 /* Get timeout */
NYX 0:85b3fd62ea1a 939 tickstart = HAL_GetTick();
NYX 0:85b3fd62ea1a 940
NYX 0:85b3fd62ea1a 941 /* Clear clock absence flag */
NYX 0:85b3fd62ea1a 942 while((((DFSDM1_Filter0->FLTISR & DFSDM_FLTISR_CKABF) >> (DFSDM_FLTISR_CKABF_OFFSET + channel)) & 1U) != 0U)
NYX 0:85b3fd62ea1a 943 {
NYX 0:85b3fd62ea1a 944 DFSDM1_Filter0->FLTICR = (1U << (DFSDM_FLTICR_CLRCKABF_OFFSET + channel));
NYX 0:85b3fd62ea1a 945
NYX 0:85b3fd62ea1a 946 /* Check the Timeout */
NYX 0:85b3fd62ea1a 947 if((HAL_GetTick()-tickstart) > DFSDM_CKAB_TIMEOUT)
NYX 0:85b3fd62ea1a 948 {
NYX 0:85b3fd62ea1a 949 /* Set timeout status */
NYX 0:85b3fd62ea1a 950 status = HAL_TIMEOUT;
NYX 0:85b3fd62ea1a 951 break;
NYX 0:85b3fd62ea1a 952 }
NYX 0:85b3fd62ea1a 953 }
NYX 0:85b3fd62ea1a 954
NYX 0:85b3fd62ea1a 955 if(status == HAL_OK)
NYX 0:85b3fd62ea1a 956 {
NYX 0:85b3fd62ea1a 957 /* Activate clock absence detection interrupt */
NYX 0:85b3fd62ea1a 958 DFSDM1_Filter0->FLTCR2 |= DFSDM_FLTCR2_CKABIE;
NYX 0:85b3fd62ea1a 959
NYX 0:85b3fd62ea1a 960 /* Start clock absence detection */
NYX 0:85b3fd62ea1a 961 hdfsdm_channel->Instance->CHCFGR1 |= DFSDM_CHCFGR1_CKABEN;
NYX 0:85b3fd62ea1a 962 }
NYX 0:85b3fd62ea1a 963
NYX 0:85b3fd62ea1a 964 #endif /* defined(DFSDM2_Channel0) */
NYX 0:85b3fd62ea1a 965 }
NYX 0:85b3fd62ea1a 966 /* Return function status */
NYX 0:85b3fd62ea1a 967 return status;
NYX 0:85b3fd62ea1a 968 }
NYX 0:85b3fd62ea1a 969
NYX 0:85b3fd62ea1a 970 /**
NYX 0:85b3fd62ea1a 971 * @brief Clock absence detection callback.
NYX 0:85b3fd62ea1a 972 * @param hdfsdm_channel : DFSDM channel handle.
NYX 0:85b3fd62ea1a 973 * @retval None
NYX 0:85b3fd62ea1a 974 */
NYX 0:85b3fd62ea1a 975 __weak void HAL_DFSDM_ChannelCkabCallback(DFSDM_Channel_HandleTypeDef *hdfsdm_channel)
NYX 0:85b3fd62ea1a 976 {
NYX 0:85b3fd62ea1a 977 /* Prevent unused argument(s) compilation warning */
NYX 0:85b3fd62ea1a 978 UNUSED(hdfsdm_channel);
NYX 0:85b3fd62ea1a 979 /* NOTE : This function should not be modified, when the callback is needed,
NYX 0:85b3fd62ea1a 980 the HAL_DFSDM_ChannelCkabCallback could be implemented in the user file
NYX 0:85b3fd62ea1a 981 */
NYX 0:85b3fd62ea1a 982 }
NYX 0:85b3fd62ea1a 983
NYX 0:85b3fd62ea1a 984 /**
NYX 0:85b3fd62ea1a 985 * @brief This function allows to stop clock absence detection in interrupt mode.
NYX 0:85b3fd62ea1a 986 * @note Interrupt will be disabled for all channels
NYX 0:85b3fd62ea1a 987 * @param hdfsdm_channel : DFSDM channel handle.
NYX 0:85b3fd62ea1a 988 * @retval HAL status
NYX 0:85b3fd62ea1a 989 */
NYX 0:85b3fd62ea1a 990 HAL_StatusTypeDef HAL_DFSDM_ChannelCkabStop_IT(DFSDM_Channel_HandleTypeDef *hdfsdm_channel)
NYX 0:85b3fd62ea1a 991 {
NYX 0:85b3fd62ea1a 992 HAL_StatusTypeDef status = HAL_OK;
NYX 0:85b3fd62ea1a 993 uint32_t channel;
NYX 0:85b3fd62ea1a 994 #if defined(DFSDM2_Channel0)
NYX 0:85b3fd62ea1a 995 DFSDM_Filter_TypeDef* filter0Instance;
NYX 0:85b3fd62ea1a 996 #endif /* defined(DFSDM2_Channel0) */
NYX 0:85b3fd62ea1a 997
NYX 0:85b3fd62ea1a 998 /* Check parameters */
NYX 0:85b3fd62ea1a 999 assert_param(IS_DFSDM_CHANNEL_ALL_INSTANCE(hdfsdm_channel->Instance));
NYX 0:85b3fd62ea1a 1000
NYX 0:85b3fd62ea1a 1001 /* Check DFSDM channel state */
NYX 0:85b3fd62ea1a 1002 if(hdfsdm_channel->State != HAL_DFSDM_CHANNEL_STATE_READY)
NYX 0:85b3fd62ea1a 1003 {
NYX 0:85b3fd62ea1a 1004 /* Return error status */
NYX 0:85b3fd62ea1a 1005 status = HAL_ERROR;
NYX 0:85b3fd62ea1a 1006 }
NYX 0:85b3fd62ea1a 1007 else
NYX 0:85b3fd62ea1a 1008 {
NYX 0:85b3fd62ea1a 1009 #if defined(DFSDM2_Channel0)
NYX 0:85b3fd62ea1a 1010
NYX 0:85b3fd62ea1a 1011 /* Get channel counter, channel handle table and channel 0 instance */
NYX 0:85b3fd62ea1a 1012 if(IS_DFSDM1_CHANNEL_INSTANCE(hdfsdm_channel->Instance))
NYX 0:85b3fd62ea1a 1013 {
NYX 0:85b3fd62ea1a 1014 filter0Instance = DFSDM1_Filter0;
NYX 0:85b3fd62ea1a 1015 }
NYX 0:85b3fd62ea1a 1016 else
NYX 0:85b3fd62ea1a 1017 {
NYX 0:85b3fd62ea1a 1018 filter0Instance = DFSDM2_Filter0;
NYX 0:85b3fd62ea1a 1019 }
NYX 0:85b3fd62ea1a 1020
NYX 0:85b3fd62ea1a 1021 /* Stop clock absence detection */
NYX 0:85b3fd62ea1a 1022 hdfsdm_channel->Instance->CHCFGR1 &= ~(DFSDM_CHCFGR1_CKABEN);
NYX 0:85b3fd62ea1a 1023
NYX 0:85b3fd62ea1a 1024 /* Clear clock absence flag */
NYX 0:85b3fd62ea1a 1025 channel = DFSDM_GetChannelFromInstance(hdfsdm_channel->Instance);
NYX 0:85b3fd62ea1a 1026 filter0Instance->FLTICR = (1U << (DFSDM_FLTICR_CLRCKABF_OFFSET + channel));
NYX 0:85b3fd62ea1a 1027
NYX 0:85b3fd62ea1a 1028 /* Disable clock absence detection interrupt */
NYX 0:85b3fd62ea1a 1029 filter0Instance->FLTCR2 &= ~(DFSDM_FLTCR2_CKABIE);
NYX 0:85b3fd62ea1a 1030 #else
NYX 0:85b3fd62ea1a 1031
NYX 0:85b3fd62ea1a 1032 /* Stop clock absence detection */
NYX 0:85b3fd62ea1a 1033 hdfsdm_channel->Instance->CHCFGR1 &= ~(DFSDM_CHCFGR1_CKABEN);
NYX 0:85b3fd62ea1a 1034
NYX 0:85b3fd62ea1a 1035 /* Clear clock absence flag */
NYX 0:85b3fd62ea1a 1036 channel = DFSDM_GetChannelFromInstance(hdfsdm_channel->Instance);
NYX 0:85b3fd62ea1a 1037 DFSDM1_Filter0->FLTICR = (1U << (DFSDM_FLTICR_CLRCKABF_OFFSET + channel));
NYX 0:85b3fd62ea1a 1038
NYX 0:85b3fd62ea1a 1039 /* Disable clock absence detection interrupt */
NYX 0:85b3fd62ea1a 1040 DFSDM1_Filter0->FLTCR2 &= ~(DFSDM_FLTCR2_CKABIE);
NYX 0:85b3fd62ea1a 1041 #endif /* DFSDM2_Channel0 */
NYX 0:85b3fd62ea1a 1042 }
NYX 0:85b3fd62ea1a 1043
NYX 0:85b3fd62ea1a 1044 /* Return function status */
NYX 0:85b3fd62ea1a 1045 return status;
NYX 0:85b3fd62ea1a 1046 }
NYX 0:85b3fd62ea1a 1047
NYX 0:85b3fd62ea1a 1048 /**
NYX 0:85b3fd62ea1a 1049 * @brief This function allows to start short circuit detection in polling mode.
NYX 0:85b3fd62ea1a 1050 * @note Same mode has to be used for all channels
NYX 0:85b3fd62ea1a 1051 * @param hdfsdm_channel : DFSDM channel handle.
NYX 0:85b3fd62ea1a 1052 * @param Threshold : Short circuit detector threshold.
NYX 0:85b3fd62ea1a 1053 * This parameter must be a number between Min_Data = 0 and Max_Data = 255.
NYX 0:85b3fd62ea1a 1054 * @param BreakSignal : Break signals assigned to short circuit event.
NYX 0:85b3fd62ea1a 1055 * This parameter can be a values combination of @ref DFSDM_BreakSignals.
NYX 0:85b3fd62ea1a 1056 * @retval HAL status
NYX 0:85b3fd62ea1a 1057 */
NYX 0:85b3fd62ea1a 1058 HAL_StatusTypeDef HAL_DFSDM_ChannelScdStart(DFSDM_Channel_HandleTypeDef *hdfsdm_channel,
NYX 0:85b3fd62ea1a 1059 uint32_t Threshold,
NYX 0:85b3fd62ea1a 1060 uint32_t BreakSignal)
NYX 0:85b3fd62ea1a 1061 {
NYX 0:85b3fd62ea1a 1062 HAL_StatusTypeDef status = HAL_OK;
NYX 0:85b3fd62ea1a 1063
NYX 0:85b3fd62ea1a 1064 /* Check parameters */
NYX 0:85b3fd62ea1a 1065 assert_param(IS_DFSDM_CHANNEL_ALL_INSTANCE(hdfsdm_channel->Instance));
NYX 0:85b3fd62ea1a 1066 assert_param(IS_DFSDM_CHANNEL_SCD_THRESHOLD(Threshold));
NYX 0:85b3fd62ea1a 1067 assert_param(IS_DFSDM_BREAK_SIGNALS(BreakSignal));
NYX 0:85b3fd62ea1a 1068
NYX 0:85b3fd62ea1a 1069 /* Check DFSDM channel state */
NYX 0:85b3fd62ea1a 1070 if(hdfsdm_channel->State != HAL_DFSDM_CHANNEL_STATE_READY)
NYX 0:85b3fd62ea1a 1071 {
NYX 0:85b3fd62ea1a 1072 /* Return error status */
NYX 0:85b3fd62ea1a 1073 status = HAL_ERROR;
NYX 0:85b3fd62ea1a 1074 }
NYX 0:85b3fd62ea1a 1075 else
NYX 0:85b3fd62ea1a 1076 {
NYX 0:85b3fd62ea1a 1077 /* Configure threshold and break signals */
NYX 0:85b3fd62ea1a 1078 hdfsdm_channel->Instance->CHAWSCDR &= ~(DFSDM_CHAWSCDR_BKSCD | DFSDM_CHAWSCDR_SCDT);
NYX 0:85b3fd62ea1a 1079 hdfsdm_channel->Instance->CHAWSCDR |= ((BreakSignal << DFSDM_CHAWSCDR_BKSCD_OFFSET) | \
NYX 0:85b3fd62ea1a 1080 Threshold);
NYX 0:85b3fd62ea1a 1081
NYX 0:85b3fd62ea1a 1082 /* Start short circuit detection */
NYX 0:85b3fd62ea1a 1083 hdfsdm_channel->Instance->CHCFGR1 |= DFSDM_CHCFGR1_SCDEN;
NYX 0:85b3fd62ea1a 1084 }
NYX 0:85b3fd62ea1a 1085 /* Return function status */
NYX 0:85b3fd62ea1a 1086 return status;
NYX 0:85b3fd62ea1a 1087 }
NYX 0:85b3fd62ea1a 1088
NYX 0:85b3fd62ea1a 1089 /**
NYX 0:85b3fd62ea1a 1090 * @brief This function allows to poll for the short circuit detection.
NYX 0:85b3fd62ea1a 1091 * @param hdfsdm_channel : DFSDM channel handle.
NYX 0:85b3fd62ea1a 1092 * @param Timeout : Timeout value in milliseconds.
NYX 0:85b3fd62ea1a 1093 * @retval HAL status
NYX 0:85b3fd62ea1a 1094 */
NYX 0:85b3fd62ea1a 1095 HAL_StatusTypeDef HAL_DFSDM_ChannelPollForScd(DFSDM_Channel_HandleTypeDef *hdfsdm_channel,
NYX 0:85b3fd62ea1a 1096 uint32_t Timeout)
NYX 0:85b3fd62ea1a 1097 {
NYX 0:85b3fd62ea1a 1098 uint32_t tickstart;
NYX 0:85b3fd62ea1a 1099 uint32_t channel;
NYX 0:85b3fd62ea1a 1100 #if defined(DFSDM2_Channel0)
NYX 0:85b3fd62ea1a 1101 DFSDM_Filter_TypeDef* filter0Instance;
NYX 0:85b3fd62ea1a 1102 #endif /* defined(DFSDM2_Channel0) */
NYX 0:85b3fd62ea1a 1103
NYX 0:85b3fd62ea1a 1104 /* Check parameters */
NYX 0:85b3fd62ea1a 1105 assert_param(IS_DFSDM_CHANNEL_ALL_INSTANCE(hdfsdm_channel->Instance));
NYX 0:85b3fd62ea1a 1106
NYX 0:85b3fd62ea1a 1107 /* Check DFSDM channel state */
NYX 0:85b3fd62ea1a 1108 if(hdfsdm_channel->State != HAL_DFSDM_CHANNEL_STATE_READY)
NYX 0:85b3fd62ea1a 1109 {
NYX 0:85b3fd62ea1a 1110 /* Return error status */
NYX 0:85b3fd62ea1a 1111 return HAL_ERROR;
NYX 0:85b3fd62ea1a 1112 }
NYX 0:85b3fd62ea1a 1113 else
NYX 0:85b3fd62ea1a 1114 {
NYX 0:85b3fd62ea1a 1115 /* Get channel number from channel instance */
NYX 0:85b3fd62ea1a 1116 channel = DFSDM_GetChannelFromInstance(hdfsdm_channel->Instance);
NYX 0:85b3fd62ea1a 1117
NYX 0:85b3fd62ea1a 1118 #if defined(DFSDM2_Channel0)
NYX 0:85b3fd62ea1a 1119 /* Get channel counter, channel handle table and channel 0 instance */
NYX 0:85b3fd62ea1a 1120 if(IS_DFSDM1_CHANNEL_INSTANCE(hdfsdm_channel->Instance))
NYX 0:85b3fd62ea1a 1121 {
NYX 0:85b3fd62ea1a 1122 filter0Instance = DFSDM1_Filter0;
NYX 0:85b3fd62ea1a 1123 }
NYX 0:85b3fd62ea1a 1124 else
NYX 0:85b3fd62ea1a 1125 {
NYX 0:85b3fd62ea1a 1126 filter0Instance = DFSDM2_Filter0;
NYX 0:85b3fd62ea1a 1127 }
NYX 0:85b3fd62ea1a 1128
NYX 0:85b3fd62ea1a 1129 /* Get timeout */
NYX 0:85b3fd62ea1a 1130 tickstart = HAL_GetTick();
NYX 0:85b3fd62ea1a 1131
NYX 0:85b3fd62ea1a 1132 /* Wait short circuit detection */
NYX 0:85b3fd62ea1a 1133 while(((filter0Instance->FLTISR & DFSDM_FLTISR_SCDF) >> (DFSDM_FLTISR_SCDF_OFFSET + channel)) == 0U)
NYX 0:85b3fd62ea1a 1134 {
NYX 0:85b3fd62ea1a 1135 /* Check the Timeout */
NYX 0:85b3fd62ea1a 1136 if(Timeout != HAL_MAX_DELAY)
NYX 0:85b3fd62ea1a 1137 {
NYX 0:85b3fd62ea1a 1138 if((Timeout == 0U) || ((HAL_GetTick()-tickstart) > Timeout))
NYX 0:85b3fd62ea1a 1139 {
NYX 0:85b3fd62ea1a 1140 /* Return timeout status */
NYX 0:85b3fd62ea1a 1141 return HAL_TIMEOUT;
NYX 0:85b3fd62ea1a 1142 }
NYX 0:85b3fd62ea1a 1143 }
NYX 0:85b3fd62ea1a 1144 }
NYX 0:85b3fd62ea1a 1145
NYX 0:85b3fd62ea1a 1146 /* Clear short circuit detection flag */
NYX 0:85b3fd62ea1a 1147 filter0Instance->FLTICR = (1U << (DFSDM_FLTICR_CLRSCDF_OFFSET + channel));
NYX 0:85b3fd62ea1a 1148
NYX 0:85b3fd62ea1a 1149 #else
NYX 0:85b3fd62ea1a 1150 /* Get timeout */
NYX 0:85b3fd62ea1a 1151 tickstart = HAL_GetTick();
NYX 0:85b3fd62ea1a 1152
NYX 0:85b3fd62ea1a 1153 /* Wait short circuit detection */
NYX 0:85b3fd62ea1a 1154 while(((DFSDM1_Filter0->FLTISR & DFSDM_FLTISR_SCDF) >> (DFSDM_FLTISR_SCDF_OFFSET + channel)) == 0U)
NYX 0:85b3fd62ea1a 1155 {
NYX 0:85b3fd62ea1a 1156 /* Check the Timeout */
NYX 0:85b3fd62ea1a 1157 if(Timeout != HAL_MAX_DELAY)
NYX 0:85b3fd62ea1a 1158 {
NYX 0:85b3fd62ea1a 1159 if((Timeout == 0U) || ((HAL_GetTick()-tickstart) > Timeout))
NYX 0:85b3fd62ea1a 1160 {
NYX 0:85b3fd62ea1a 1161 /* Return timeout status */
NYX 0:85b3fd62ea1a 1162 return HAL_TIMEOUT;
NYX 0:85b3fd62ea1a 1163 }
NYX 0:85b3fd62ea1a 1164 }
NYX 0:85b3fd62ea1a 1165 }
NYX 0:85b3fd62ea1a 1166
NYX 0:85b3fd62ea1a 1167 /* Clear short circuit detection flag */
NYX 0:85b3fd62ea1a 1168 DFSDM1_Filter0->FLTICR = (1U << (DFSDM_FLTICR_CLRSCDF_OFFSET + channel));
NYX 0:85b3fd62ea1a 1169 #endif /* DFSDM2_Channel0 */
NYX 0:85b3fd62ea1a 1170
NYX 0:85b3fd62ea1a 1171 /* Return function status */
NYX 0:85b3fd62ea1a 1172 return HAL_OK;
NYX 0:85b3fd62ea1a 1173 }
NYX 0:85b3fd62ea1a 1174 }
NYX 0:85b3fd62ea1a 1175
NYX 0:85b3fd62ea1a 1176 /**
NYX 0:85b3fd62ea1a 1177 * @brief This function allows to stop short circuit detection in polling mode.
NYX 0:85b3fd62ea1a 1178 * @param hdfsdm_channel : DFSDM channel handle.
NYX 0:85b3fd62ea1a 1179 * @retval HAL status
NYX 0:85b3fd62ea1a 1180 */
NYX 0:85b3fd62ea1a 1181 HAL_StatusTypeDef HAL_DFSDM_ChannelScdStop(DFSDM_Channel_HandleTypeDef *hdfsdm_channel)
NYX 0:85b3fd62ea1a 1182 {
NYX 0:85b3fd62ea1a 1183 HAL_StatusTypeDef status = HAL_OK;
NYX 0:85b3fd62ea1a 1184 uint32_t channel;
NYX 0:85b3fd62ea1a 1185 #if defined(DFSDM2_Channel0)
NYX 0:85b3fd62ea1a 1186 DFSDM_Filter_TypeDef* filter0Instance;
NYX 0:85b3fd62ea1a 1187 #endif /* defined(DFSDM2_Channel0) */
NYX 0:85b3fd62ea1a 1188
NYX 0:85b3fd62ea1a 1189 /* Check parameters */
NYX 0:85b3fd62ea1a 1190 assert_param(IS_DFSDM_CHANNEL_ALL_INSTANCE(hdfsdm_channel->Instance));
NYX 0:85b3fd62ea1a 1191
NYX 0:85b3fd62ea1a 1192 /* Check DFSDM channel state */
NYX 0:85b3fd62ea1a 1193 if(hdfsdm_channel->State != HAL_DFSDM_CHANNEL_STATE_READY)
NYX 0:85b3fd62ea1a 1194 {
NYX 0:85b3fd62ea1a 1195 /* Return error status */
NYX 0:85b3fd62ea1a 1196 status = HAL_ERROR;
NYX 0:85b3fd62ea1a 1197 }
NYX 0:85b3fd62ea1a 1198 else
NYX 0:85b3fd62ea1a 1199 {
NYX 0:85b3fd62ea1a 1200 /* Stop short circuit detection */
NYX 0:85b3fd62ea1a 1201 hdfsdm_channel->Instance->CHCFGR1 &= ~(DFSDM_CHCFGR1_SCDEN);
NYX 0:85b3fd62ea1a 1202
NYX 0:85b3fd62ea1a 1203 /* Clear short circuit detection flag */
NYX 0:85b3fd62ea1a 1204 channel = DFSDM_GetChannelFromInstance(hdfsdm_channel->Instance);
NYX 0:85b3fd62ea1a 1205
NYX 0:85b3fd62ea1a 1206 #if defined(DFSDM2_Channel0)
NYX 0:85b3fd62ea1a 1207 /* Get channel counter, channel handle table and channel 0 instance */
NYX 0:85b3fd62ea1a 1208 if(IS_DFSDM1_CHANNEL_INSTANCE(hdfsdm_channel->Instance))
NYX 0:85b3fd62ea1a 1209 {
NYX 0:85b3fd62ea1a 1210 filter0Instance = DFSDM1_Filter0;
NYX 0:85b3fd62ea1a 1211 }
NYX 0:85b3fd62ea1a 1212 else
NYX 0:85b3fd62ea1a 1213 {
NYX 0:85b3fd62ea1a 1214 filter0Instance = DFSDM2_Filter0;
NYX 0:85b3fd62ea1a 1215 }
NYX 0:85b3fd62ea1a 1216
NYX 0:85b3fd62ea1a 1217 filter0Instance->FLTICR = (1U << (DFSDM_FLTICR_CLRSCDF_OFFSET + channel));
NYX 0:85b3fd62ea1a 1218 #else
NYX 0:85b3fd62ea1a 1219 DFSDM1_Filter0->FLTICR = (1U << (DFSDM_FLTICR_CLRSCDF_OFFSET + channel));
NYX 0:85b3fd62ea1a 1220 #endif /* DFSDM2_Channel0*/
NYX 0:85b3fd62ea1a 1221 }
NYX 0:85b3fd62ea1a 1222 /* Return function status */
NYX 0:85b3fd62ea1a 1223 return status;
NYX 0:85b3fd62ea1a 1224 }
NYX 0:85b3fd62ea1a 1225
NYX 0:85b3fd62ea1a 1226 /**
NYX 0:85b3fd62ea1a 1227 * @brief This function allows to start short circuit detection in interrupt mode.
NYX 0:85b3fd62ea1a 1228 * @note Same mode has to be used for all channels
NYX 0:85b3fd62ea1a 1229 * @param hdfsdm_channel : DFSDM channel handle.
NYX 0:85b3fd62ea1a 1230 * @param Threshold : Short circuit detector threshold.
NYX 0:85b3fd62ea1a 1231 * This parameter must be a number between Min_Data = 0 and Max_Data = 255.
NYX 0:85b3fd62ea1a 1232 * @param BreakSignal : Break signals assigned to short circuit event.
NYX 0:85b3fd62ea1a 1233 * This parameter can be a values combination of @ref DFSDM_BreakSignals.
NYX 0:85b3fd62ea1a 1234 * @retval HAL status
NYX 0:85b3fd62ea1a 1235 */
NYX 0:85b3fd62ea1a 1236 HAL_StatusTypeDef HAL_DFSDM_ChannelScdStart_IT(DFSDM_Channel_HandleTypeDef *hdfsdm_channel,
NYX 0:85b3fd62ea1a 1237 uint32_t Threshold,
NYX 0:85b3fd62ea1a 1238 uint32_t BreakSignal)
NYX 0:85b3fd62ea1a 1239 {
NYX 0:85b3fd62ea1a 1240 HAL_StatusTypeDef status = HAL_OK;
NYX 0:85b3fd62ea1a 1241 #if defined(DFSDM2_Channel0)
NYX 0:85b3fd62ea1a 1242 DFSDM_Filter_TypeDef* filter0Instance;
NYX 0:85b3fd62ea1a 1243 #endif /* defined(DFSDM2_Channel0) */
NYX 0:85b3fd62ea1a 1244
NYX 0:85b3fd62ea1a 1245 /* Check parameters */
NYX 0:85b3fd62ea1a 1246 assert_param(IS_DFSDM_CHANNEL_ALL_INSTANCE(hdfsdm_channel->Instance));
NYX 0:85b3fd62ea1a 1247 assert_param(IS_DFSDM_CHANNEL_SCD_THRESHOLD(Threshold));
NYX 0:85b3fd62ea1a 1248 assert_param(IS_DFSDM_BREAK_SIGNALS(BreakSignal));
NYX 0:85b3fd62ea1a 1249
NYX 0:85b3fd62ea1a 1250 /* Check DFSDM channel state */
NYX 0:85b3fd62ea1a 1251 if(hdfsdm_channel->State != HAL_DFSDM_CHANNEL_STATE_READY)
NYX 0:85b3fd62ea1a 1252 {
NYX 0:85b3fd62ea1a 1253 /* Return error status */
NYX 0:85b3fd62ea1a 1254 status = HAL_ERROR;
NYX 0:85b3fd62ea1a 1255 }
NYX 0:85b3fd62ea1a 1256 else
NYX 0:85b3fd62ea1a 1257 {
NYX 0:85b3fd62ea1a 1258 #if defined(DFSDM2_Channel0)
NYX 0:85b3fd62ea1a 1259 /* Get channel counter, channel handle table and channel 0 instance */
NYX 0:85b3fd62ea1a 1260 if(IS_DFSDM1_CHANNEL_INSTANCE(hdfsdm_channel->Instance))
NYX 0:85b3fd62ea1a 1261 {
NYX 0:85b3fd62ea1a 1262 filter0Instance = DFSDM1_Filter0;
NYX 0:85b3fd62ea1a 1263 }
NYX 0:85b3fd62ea1a 1264 else
NYX 0:85b3fd62ea1a 1265 {
NYX 0:85b3fd62ea1a 1266 filter0Instance = DFSDM2_Filter0;
NYX 0:85b3fd62ea1a 1267 }
NYX 0:85b3fd62ea1a 1268 /* Activate short circuit detection interrupt */
NYX 0:85b3fd62ea1a 1269 filter0Instance->FLTCR2 |= DFSDM_FLTCR2_SCDIE;
NYX 0:85b3fd62ea1a 1270 #else
NYX 0:85b3fd62ea1a 1271 /* Activate short circuit detection interrupt */
NYX 0:85b3fd62ea1a 1272 DFSDM1_Filter0->FLTCR2 |= DFSDM_FLTCR2_SCDIE;
NYX 0:85b3fd62ea1a 1273 #endif /* DFSDM2_Channel0 */
NYX 0:85b3fd62ea1a 1274
NYX 0:85b3fd62ea1a 1275 /* Configure threshold and break signals */
NYX 0:85b3fd62ea1a 1276 hdfsdm_channel->Instance->CHAWSCDR &= ~(DFSDM_CHAWSCDR_BKSCD | DFSDM_CHAWSCDR_SCDT);
NYX 0:85b3fd62ea1a 1277 hdfsdm_channel->Instance->CHAWSCDR |= ((BreakSignal << DFSDM_CHAWSCDR_BKSCD_OFFSET) | \
NYX 0:85b3fd62ea1a 1278 Threshold);
NYX 0:85b3fd62ea1a 1279
NYX 0:85b3fd62ea1a 1280 /* Start short circuit detection */
NYX 0:85b3fd62ea1a 1281 hdfsdm_channel->Instance->CHCFGR1 |= DFSDM_CHCFGR1_SCDEN;
NYX 0:85b3fd62ea1a 1282 }
NYX 0:85b3fd62ea1a 1283 /* Return function status */
NYX 0:85b3fd62ea1a 1284 return status;
NYX 0:85b3fd62ea1a 1285 }
NYX 0:85b3fd62ea1a 1286
NYX 0:85b3fd62ea1a 1287 /**
NYX 0:85b3fd62ea1a 1288 * @brief Short circuit detection callback.
NYX 0:85b3fd62ea1a 1289 * @param hdfsdm_channel : DFSDM channel handle.
NYX 0:85b3fd62ea1a 1290 * @retval None
NYX 0:85b3fd62ea1a 1291 */
NYX 0:85b3fd62ea1a 1292 __weak void HAL_DFSDM_ChannelScdCallback(DFSDM_Channel_HandleTypeDef *hdfsdm_channel)
NYX 0:85b3fd62ea1a 1293 {
NYX 0:85b3fd62ea1a 1294 /* Prevent unused argument(s) compilation warning */
NYX 0:85b3fd62ea1a 1295 UNUSED(hdfsdm_channel);
NYX 0:85b3fd62ea1a 1296 /* NOTE : This function should not be modified, when the callback is needed,
NYX 0:85b3fd62ea1a 1297 the HAL_DFSDM_ChannelScdCallback could be implemented in the user file
NYX 0:85b3fd62ea1a 1298 */
NYX 0:85b3fd62ea1a 1299 }
NYX 0:85b3fd62ea1a 1300
NYX 0:85b3fd62ea1a 1301 /**
NYX 0:85b3fd62ea1a 1302 * @brief This function allows to stop short circuit detection in interrupt mode.
NYX 0:85b3fd62ea1a 1303 * @note Interrupt will be disabled for all channels
NYX 0:85b3fd62ea1a 1304 * @param hdfsdm_channel : DFSDM channel handle.
NYX 0:85b3fd62ea1a 1305 * @retval HAL status
NYX 0:85b3fd62ea1a 1306 */
NYX 0:85b3fd62ea1a 1307 HAL_StatusTypeDef HAL_DFSDM_ChannelScdStop_IT(DFSDM_Channel_HandleTypeDef *hdfsdm_channel)
NYX 0:85b3fd62ea1a 1308 {
NYX 0:85b3fd62ea1a 1309 HAL_StatusTypeDef status = HAL_OK;
NYX 0:85b3fd62ea1a 1310 uint32_t channel;
NYX 0:85b3fd62ea1a 1311 #if defined(DFSDM2_Channel0)
NYX 0:85b3fd62ea1a 1312 DFSDM_Filter_TypeDef* filter0Instance;
NYX 0:85b3fd62ea1a 1313 #endif /* defined(DFSDM2_Channel0) */
NYX 0:85b3fd62ea1a 1314
NYX 0:85b3fd62ea1a 1315 /* Check parameters */
NYX 0:85b3fd62ea1a 1316 assert_param(IS_DFSDM_CHANNEL_ALL_INSTANCE(hdfsdm_channel->Instance));
NYX 0:85b3fd62ea1a 1317
NYX 0:85b3fd62ea1a 1318 /* Check DFSDM channel state */
NYX 0:85b3fd62ea1a 1319 if(hdfsdm_channel->State != HAL_DFSDM_CHANNEL_STATE_READY)
NYX 0:85b3fd62ea1a 1320 {
NYX 0:85b3fd62ea1a 1321 /* Return error status */
NYX 0:85b3fd62ea1a 1322 status = HAL_ERROR;
NYX 0:85b3fd62ea1a 1323 }
NYX 0:85b3fd62ea1a 1324 else
NYX 0:85b3fd62ea1a 1325 {
NYX 0:85b3fd62ea1a 1326 /* Stop short circuit detection */
NYX 0:85b3fd62ea1a 1327 hdfsdm_channel->Instance->CHCFGR1 &= ~(DFSDM_CHCFGR1_SCDEN);
NYX 0:85b3fd62ea1a 1328
NYX 0:85b3fd62ea1a 1329 /* Clear short circuit detection flag */
NYX 0:85b3fd62ea1a 1330 channel = DFSDM_GetChannelFromInstance(hdfsdm_channel->Instance);
NYX 0:85b3fd62ea1a 1331 #if defined(DFSDM2_Channel0)
NYX 0:85b3fd62ea1a 1332 /* Get channel counter, channel handle table and channel 0 instance */
NYX 0:85b3fd62ea1a 1333 if(IS_DFSDM1_CHANNEL_INSTANCE(hdfsdm_channel->Instance))
NYX 0:85b3fd62ea1a 1334 {
NYX 0:85b3fd62ea1a 1335 filter0Instance = DFSDM1_Filter0;
NYX 0:85b3fd62ea1a 1336 }
NYX 0:85b3fd62ea1a 1337 else
NYX 0:85b3fd62ea1a 1338 {
NYX 0:85b3fd62ea1a 1339 filter0Instance = DFSDM2_Filter0;
NYX 0:85b3fd62ea1a 1340 }
NYX 0:85b3fd62ea1a 1341
NYX 0:85b3fd62ea1a 1342 filter0Instance->FLTICR = (1U << (DFSDM_FLTICR_CLRSCDF_OFFSET + channel));
NYX 0:85b3fd62ea1a 1343
NYX 0:85b3fd62ea1a 1344 /* Disable short circuit detection interrupt */
NYX 0:85b3fd62ea1a 1345 filter0Instance->FLTCR2 &= ~(DFSDM_FLTCR2_SCDIE);
NYX 0:85b3fd62ea1a 1346 #else
NYX 0:85b3fd62ea1a 1347 DFSDM1_Filter0->FLTICR = (1U << (DFSDM_FLTICR_CLRSCDF_OFFSET + channel));
NYX 0:85b3fd62ea1a 1348
NYX 0:85b3fd62ea1a 1349 /* Disable short circuit detection interrupt */
NYX 0:85b3fd62ea1a 1350 DFSDM1_Filter0->FLTCR2 &= ~(DFSDM_FLTCR2_SCDIE);
NYX 0:85b3fd62ea1a 1351 #endif /* DFSDM2_Channel0 */
NYX 0:85b3fd62ea1a 1352 }
NYX 0:85b3fd62ea1a 1353 /* Return function status */
NYX 0:85b3fd62ea1a 1354 return status;
NYX 0:85b3fd62ea1a 1355 }
NYX 0:85b3fd62ea1a 1356
NYX 0:85b3fd62ea1a 1357 /**
NYX 0:85b3fd62ea1a 1358 * @brief This function allows to get channel analog watchdog value.
NYX 0:85b3fd62ea1a 1359 * @param hdfsdm_channel : DFSDM channel handle.
NYX 0:85b3fd62ea1a 1360 * @retval Channel analog watchdog value.
NYX 0:85b3fd62ea1a 1361 */
NYX 0:85b3fd62ea1a 1362 int16_t HAL_DFSDM_ChannelGetAwdValue(DFSDM_Channel_HandleTypeDef *hdfsdm_channel)
NYX 0:85b3fd62ea1a 1363 {
NYX 0:85b3fd62ea1a 1364 return (int16_t) hdfsdm_channel->Instance->CHWDATAR;
NYX 0:85b3fd62ea1a 1365 }
NYX 0:85b3fd62ea1a 1366
NYX 0:85b3fd62ea1a 1367 /**
NYX 0:85b3fd62ea1a 1368 * @brief This function allows to modify channel offset value.
NYX 0:85b3fd62ea1a 1369 * @param hdfsdm_channel : DFSDM channel handle.
NYX 0:85b3fd62ea1a 1370 * @param Offset : DFSDM channel offset.
NYX 0:85b3fd62ea1a 1371 * This parameter must be a number between Min_Data = -8388608 and Max_Data = 8388607.
NYX 0:85b3fd62ea1a 1372 * @retval HAL status.
NYX 0:85b3fd62ea1a 1373 */
NYX 0:85b3fd62ea1a 1374 HAL_StatusTypeDef HAL_DFSDM_ChannelModifyOffset(DFSDM_Channel_HandleTypeDef *hdfsdm_channel,
NYX 0:85b3fd62ea1a 1375 int32_t Offset)
NYX 0:85b3fd62ea1a 1376 {
NYX 0:85b3fd62ea1a 1377 HAL_StatusTypeDef status = HAL_OK;
NYX 0:85b3fd62ea1a 1378
NYX 0:85b3fd62ea1a 1379 /* Check parameters */
NYX 0:85b3fd62ea1a 1380 assert_param(IS_DFSDM_CHANNEL_ALL_INSTANCE(hdfsdm_channel->Instance));
NYX 0:85b3fd62ea1a 1381 assert_param(IS_DFSDM_CHANNEL_OFFSET(Offset));
NYX 0:85b3fd62ea1a 1382
NYX 0:85b3fd62ea1a 1383 /* Check DFSDM channel state */
NYX 0:85b3fd62ea1a 1384 if(hdfsdm_channel->State != HAL_DFSDM_CHANNEL_STATE_READY)
NYX 0:85b3fd62ea1a 1385 {
NYX 0:85b3fd62ea1a 1386 /* Return error status */
NYX 0:85b3fd62ea1a 1387 status = HAL_ERROR;
NYX 0:85b3fd62ea1a 1388 }
NYX 0:85b3fd62ea1a 1389 else
NYX 0:85b3fd62ea1a 1390 {
NYX 0:85b3fd62ea1a 1391 /* Modify channel offset */
NYX 0:85b3fd62ea1a 1392 hdfsdm_channel->Instance->CHCFGR2 &= ~(DFSDM_CHCFGR2_OFFSET);
NYX 0:85b3fd62ea1a 1393 hdfsdm_channel->Instance->CHCFGR2 |= ((uint32_t) Offset << DFSDM_CHCFGR2_OFFSET_OFFSET);
NYX 0:85b3fd62ea1a 1394 }
NYX 0:85b3fd62ea1a 1395 /* Return function status */
NYX 0:85b3fd62ea1a 1396 return status;
NYX 0:85b3fd62ea1a 1397 }
NYX 0:85b3fd62ea1a 1398
NYX 0:85b3fd62ea1a 1399 /**
NYX 0:85b3fd62ea1a 1400 * @}
NYX 0:85b3fd62ea1a 1401 */
NYX 0:85b3fd62ea1a 1402
NYX 0:85b3fd62ea1a 1403 /** @defgroup DFSDM_Exported_Functions_Group3_Channel Channel state function
NYX 0:85b3fd62ea1a 1404 * @brief Channel state function
NYX 0:85b3fd62ea1a 1405 *
NYX 0:85b3fd62ea1a 1406 @verbatim
NYX 0:85b3fd62ea1a 1407 ==============================================================================
NYX 0:85b3fd62ea1a 1408 ##### Channel state function #####
NYX 0:85b3fd62ea1a 1409 ==============================================================================
NYX 0:85b3fd62ea1a 1410 [..] This section provides function allowing to:
NYX 0:85b3fd62ea1a 1411 (+) Get channel handle state.
NYX 0:85b3fd62ea1a 1412 @endverbatim
NYX 0:85b3fd62ea1a 1413 * @{
NYX 0:85b3fd62ea1a 1414 */
NYX 0:85b3fd62ea1a 1415
NYX 0:85b3fd62ea1a 1416 /**
NYX 0:85b3fd62ea1a 1417 * @brief This function allows to get the current DFSDM channel handle state.
NYX 0:85b3fd62ea1a 1418 * @param hdfsdm_channel : DFSDM channel handle.
NYX 0:85b3fd62ea1a 1419 * @retval DFSDM channel state.
NYX 0:85b3fd62ea1a 1420 */
NYX 0:85b3fd62ea1a 1421 HAL_DFSDM_Channel_StateTypeDef HAL_DFSDM_ChannelGetState(DFSDM_Channel_HandleTypeDef *hdfsdm_channel)
NYX 0:85b3fd62ea1a 1422 {
NYX 0:85b3fd62ea1a 1423 /* Return DFSDM channel handle state */
NYX 0:85b3fd62ea1a 1424 return hdfsdm_channel->State;
NYX 0:85b3fd62ea1a 1425 }
NYX 0:85b3fd62ea1a 1426
NYX 0:85b3fd62ea1a 1427 /**
NYX 0:85b3fd62ea1a 1428 * @}
NYX 0:85b3fd62ea1a 1429 */
NYX 0:85b3fd62ea1a 1430
NYX 0:85b3fd62ea1a 1431 /** @defgroup DFSDM_Exported_Functions_Group1_Filter Filter initialization and de-initialization functions
NYX 0:85b3fd62ea1a 1432 * @brief Filter initialization and de-initialization functions
NYX 0:85b3fd62ea1a 1433 *
NYX 0:85b3fd62ea1a 1434 @verbatim
NYX 0:85b3fd62ea1a 1435 ==============================================================================
NYX 0:85b3fd62ea1a 1436 ##### Filter initialization and de-initialization functions #####
NYX 0:85b3fd62ea1a 1437 ==============================================================================
NYX 0:85b3fd62ea1a 1438 [..] This section provides functions allowing to:
NYX 0:85b3fd62ea1a 1439 (+) Initialize the DFSDM filter.
NYX 0:85b3fd62ea1a 1440 (+) De-initialize the DFSDM filter.
NYX 0:85b3fd62ea1a 1441 @endverbatim
NYX 0:85b3fd62ea1a 1442 * @{
NYX 0:85b3fd62ea1a 1443 */
NYX 0:85b3fd62ea1a 1444
NYX 0:85b3fd62ea1a 1445 /**
NYX 0:85b3fd62ea1a 1446 * @brief Initialize the DFSDM filter according to the specified parameters
NYX 0:85b3fd62ea1a 1447 * in the DFSDM_FilterInitTypeDef structure and initialize the associated handle.
NYX 0:85b3fd62ea1a 1448 * @param hdfsdm_filter : DFSDM filter handle.
NYX 0:85b3fd62ea1a 1449 * @retval HAL status.
NYX 0:85b3fd62ea1a 1450 */
NYX 0:85b3fd62ea1a 1451 HAL_StatusTypeDef HAL_DFSDM_FilterInit(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
NYX 0:85b3fd62ea1a 1452 {
NYX 0:85b3fd62ea1a 1453 /* Check DFSDM Channel handle */
NYX 0:85b3fd62ea1a 1454 if(hdfsdm_filter == NULL)
NYX 0:85b3fd62ea1a 1455 {
NYX 0:85b3fd62ea1a 1456 return HAL_ERROR;
NYX 0:85b3fd62ea1a 1457 }
NYX 0:85b3fd62ea1a 1458
NYX 0:85b3fd62ea1a 1459 /* Check parameters */
NYX 0:85b3fd62ea1a 1460 assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
NYX 0:85b3fd62ea1a 1461 assert_param(IS_DFSDM_FILTER_REG_TRIGGER(hdfsdm_filter->Init.RegularParam.Trigger));
NYX 0:85b3fd62ea1a 1462 assert_param(IS_FUNCTIONAL_STATE(hdfsdm_filter->Init.RegularParam.FastMode));
NYX 0:85b3fd62ea1a 1463 assert_param(IS_FUNCTIONAL_STATE(hdfsdm_filter->Init.RegularParam.DmaMode));
NYX 0:85b3fd62ea1a 1464 assert_param(IS_DFSDM_FILTER_INJ_TRIGGER(hdfsdm_filter->Init.InjectedParam.Trigger));
NYX 0:85b3fd62ea1a 1465 assert_param(IS_FUNCTIONAL_STATE(hdfsdm_filter->Init.InjectedParam.ScanMode));
NYX 0:85b3fd62ea1a 1466 assert_param(IS_FUNCTIONAL_STATE(hdfsdm_filter->Init.InjectedParam.DmaMode));
NYX 0:85b3fd62ea1a 1467 assert_param(IS_DFSDM_FILTER_SINC_ORDER(hdfsdm_filter->Init.FilterParam.SincOrder));
NYX 0:85b3fd62ea1a 1468 assert_param(IS_DFSDM_FILTER_OVS_RATIO(hdfsdm_filter->Init.FilterParam.Oversampling));
NYX 0:85b3fd62ea1a 1469 assert_param(IS_DFSDM_FILTER_INTEGRATOR_OVS_RATIO(hdfsdm_filter->Init.FilterParam.IntOversampling));
NYX 0:85b3fd62ea1a 1470
NYX 0:85b3fd62ea1a 1471 /* Check parameters compatibility */
NYX 0:85b3fd62ea1a 1472 if((hdfsdm_filter->Instance == DFSDM1_Filter0) &&
NYX 0:85b3fd62ea1a 1473 ((hdfsdm_filter->Init.RegularParam.Trigger == DFSDM_FILTER_SYNC_TRIGGER) ||
NYX 0:85b3fd62ea1a 1474 (hdfsdm_filter->Init.InjectedParam.Trigger == DFSDM_FILTER_SYNC_TRIGGER)))
NYX 0:85b3fd62ea1a 1475 {
NYX 0:85b3fd62ea1a 1476 return HAL_ERROR;
NYX 0:85b3fd62ea1a 1477 }
NYX 0:85b3fd62ea1a 1478 #if defined (DFSDM2_Channel0)
NYX 0:85b3fd62ea1a 1479 if((hdfsdm_filter->Instance == DFSDM2_Filter0) &&
NYX 0:85b3fd62ea1a 1480 ((hdfsdm_filter->Init.RegularParam.Trigger == DFSDM_FILTER_SYNC_TRIGGER) ||
NYX 0:85b3fd62ea1a 1481 (hdfsdm_filter->Init.InjectedParam.Trigger == DFSDM_FILTER_SYNC_TRIGGER)))
NYX 0:85b3fd62ea1a 1482 {
NYX 0:85b3fd62ea1a 1483 return HAL_ERROR;
NYX 0:85b3fd62ea1a 1484 }
NYX 0:85b3fd62ea1a 1485 #endif /* DFSDM2_Channel0 */
NYX 0:85b3fd62ea1a 1486
NYX 0:85b3fd62ea1a 1487 /* Initialize DFSDM filter variables with default values */
NYX 0:85b3fd62ea1a 1488 hdfsdm_filter->RegularContMode = DFSDM_CONTINUOUS_CONV_OFF;
NYX 0:85b3fd62ea1a 1489 hdfsdm_filter->InjectedChannelsNbr = 1U;
NYX 0:85b3fd62ea1a 1490 hdfsdm_filter->InjConvRemaining = 1U;
NYX 0:85b3fd62ea1a 1491 hdfsdm_filter->ErrorCode = DFSDM_FILTER_ERROR_NONE;
NYX 0:85b3fd62ea1a 1492
NYX 0:85b3fd62ea1a 1493 /* Call MSP init function */
NYX 0:85b3fd62ea1a 1494 HAL_DFSDM_FilterMspInit(hdfsdm_filter);
NYX 0:85b3fd62ea1a 1495
NYX 0:85b3fd62ea1a 1496 /* Set regular parameters */
NYX 0:85b3fd62ea1a 1497 hdfsdm_filter->Instance->FLTCR1 &= ~(DFSDM_FLTCR1_RSYNC);
NYX 0:85b3fd62ea1a 1498 if(hdfsdm_filter->Init.RegularParam.FastMode == ENABLE)
NYX 0:85b3fd62ea1a 1499 {
NYX 0:85b3fd62ea1a 1500 hdfsdm_filter->Instance->FLTCR1 |= DFSDM_FLTCR1_FAST;
NYX 0:85b3fd62ea1a 1501 }
NYX 0:85b3fd62ea1a 1502 else
NYX 0:85b3fd62ea1a 1503 {
NYX 0:85b3fd62ea1a 1504 hdfsdm_filter->Instance->FLTCR1 &= ~(DFSDM_FLTCR1_FAST);
NYX 0:85b3fd62ea1a 1505 }
NYX 0:85b3fd62ea1a 1506
NYX 0:85b3fd62ea1a 1507 if(hdfsdm_filter->Init.RegularParam.DmaMode == ENABLE)
NYX 0:85b3fd62ea1a 1508 {
NYX 0:85b3fd62ea1a 1509 hdfsdm_filter->Instance->FLTCR1 |= DFSDM_FLTCR1_RDMAEN;
NYX 0:85b3fd62ea1a 1510 }
NYX 0:85b3fd62ea1a 1511 else
NYX 0:85b3fd62ea1a 1512 {
NYX 0:85b3fd62ea1a 1513 hdfsdm_filter->Instance->FLTCR1 &= ~(DFSDM_FLTCR1_RDMAEN);
NYX 0:85b3fd62ea1a 1514 }
NYX 0:85b3fd62ea1a 1515
NYX 0:85b3fd62ea1a 1516 /* Set injected parameters */
NYX 0:85b3fd62ea1a 1517 hdfsdm_filter->Instance->FLTCR1 &= ~(DFSDM_FLTCR1_JSYNC | DFSDM_FLTCR1_JEXTEN | DFSDM_FLTCR1_JEXTSEL);
NYX 0:85b3fd62ea1a 1518 if(hdfsdm_filter->Init.InjectedParam.Trigger == DFSDM_FILTER_EXT_TRIGGER)
NYX 0:85b3fd62ea1a 1519 {
NYX 0:85b3fd62ea1a 1520 assert_param(IS_DFSDM_FILTER_EXT_TRIG(hdfsdm_filter->Init.InjectedParam.ExtTrigger));
NYX 0:85b3fd62ea1a 1521 assert_param(IS_DFSDM_FILTER_EXT_TRIG_EDGE(hdfsdm_filter->Init.InjectedParam.ExtTriggerEdge));
NYX 0:85b3fd62ea1a 1522 hdfsdm_filter->Instance->FLTCR1 |= (hdfsdm_filter->Init.InjectedParam.ExtTrigger);
NYX 0:85b3fd62ea1a 1523 }
NYX 0:85b3fd62ea1a 1524
NYX 0:85b3fd62ea1a 1525 if(hdfsdm_filter->Init.InjectedParam.ScanMode == ENABLE)
NYX 0:85b3fd62ea1a 1526 {
NYX 0:85b3fd62ea1a 1527 hdfsdm_filter->Instance->FLTCR1 |= DFSDM_FLTCR1_JSCAN;
NYX 0:85b3fd62ea1a 1528 }
NYX 0:85b3fd62ea1a 1529 else
NYX 0:85b3fd62ea1a 1530 {
NYX 0:85b3fd62ea1a 1531 hdfsdm_filter->Instance->FLTCR1 &= ~(DFSDM_FLTCR1_JSCAN);
NYX 0:85b3fd62ea1a 1532 }
NYX 0:85b3fd62ea1a 1533
NYX 0:85b3fd62ea1a 1534 if(hdfsdm_filter->Init.InjectedParam.DmaMode == ENABLE)
NYX 0:85b3fd62ea1a 1535 {
NYX 0:85b3fd62ea1a 1536 hdfsdm_filter->Instance->FLTCR1 |= DFSDM_FLTCR1_JDMAEN;
NYX 0:85b3fd62ea1a 1537 }
NYX 0:85b3fd62ea1a 1538 else
NYX 0:85b3fd62ea1a 1539 {
NYX 0:85b3fd62ea1a 1540 hdfsdm_filter->Instance->FLTCR1 &= ~(DFSDM_FLTCR1_JDMAEN);
NYX 0:85b3fd62ea1a 1541 }
NYX 0:85b3fd62ea1a 1542
NYX 0:85b3fd62ea1a 1543 /* Set filter parameters */
NYX 0:85b3fd62ea1a 1544 hdfsdm_filter->Instance->FLTFCR &= ~(DFSDM_FLTFCR_FORD | DFSDM_FLTFCR_FOSR | DFSDM_FLTFCR_IOSR);
NYX 0:85b3fd62ea1a 1545 hdfsdm_filter->Instance->FLTFCR |= (hdfsdm_filter->Init.FilterParam.SincOrder |
NYX 0:85b3fd62ea1a 1546 ((hdfsdm_filter->Init.FilterParam.Oversampling - 1U) << DFSDM_FLTFCR_FOSR_OFFSET) |
NYX 0:85b3fd62ea1a 1547 (hdfsdm_filter->Init.FilterParam.IntOversampling - 1U));
NYX 0:85b3fd62ea1a 1548
NYX 0:85b3fd62ea1a 1549 /* Store regular and injected triggers and injected scan mode*/
NYX 0:85b3fd62ea1a 1550 hdfsdm_filter->RegularTrigger = hdfsdm_filter->Init.RegularParam.Trigger;
NYX 0:85b3fd62ea1a 1551 hdfsdm_filter->InjectedTrigger = hdfsdm_filter->Init.InjectedParam.Trigger;
NYX 0:85b3fd62ea1a 1552 hdfsdm_filter->ExtTriggerEdge = hdfsdm_filter->Init.InjectedParam.ExtTriggerEdge;
NYX 0:85b3fd62ea1a 1553 hdfsdm_filter->InjectedScanMode = hdfsdm_filter->Init.InjectedParam.ScanMode;
NYX 0:85b3fd62ea1a 1554
NYX 0:85b3fd62ea1a 1555 /* Enable DFSDM filter */
NYX 0:85b3fd62ea1a 1556 hdfsdm_filter->Instance->FLTCR1 |= DFSDM_FLTCR1_DFEN;
NYX 0:85b3fd62ea1a 1557
NYX 0:85b3fd62ea1a 1558 /* Set DFSDM filter to ready state */
NYX 0:85b3fd62ea1a 1559 hdfsdm_filter->State = HAL_DFSDM_FILTER_STATE_READY;
NYX 0:85b3fd62ea1a 1560
NYX 0:85b3fd62ea1a 1561 return HAL_OK;
NYX 0:85b3fd62ea1a 1562 }
NYX 0:85b3fd62ea1a 1563
NYX 0:85b3fd62ea1a 1564 /**
NYX 0:85b3fd62ea1a 1565 * @brief De-initializes the DFSDM filter.
NYX 0:85b3fd62ea1a 1566 * @param hdfsdm_filter : DFSDM filter handle.
NYX 0:85b3fd62ea1a 1567 * @retval HAL status.
NYX 0:85b3fd62ea1a 1568 */
NYX 0:85b3fd62ea1a 1569 HAL_StatusTypeDef HAL_DFSDM_FilterDeInit(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
NYX 0:85b3fd62ea1a 1570 {
NYX 0:85b3fd62ea1a 1571 /* Check DFSDM filter handle */
NYX 0:85b3fd62ea1a 1572 if(hdfsdm_filter == NULL)
NYX 0:85b3fd62ea1a 1573 {
NYX 0:85b3fd62ea1a 1574 return HAL_ERROR;
NYX 0:85b3fd62ea1a 1575 }
NYX 0:85b3fd62ea1a 1576
NYX 0:85b3fd62ea1a 1577 /* Check parameters */
NYX 0:85b3fd62ea1a 1578 assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
NYX 0:85b3fd62ea1a 1579
NYX 0:85b3fd62ea1a 1580 /* Disable the DFSDM filter */
NYX 0:85b3fd62ea1a 1581 hdfsdm_filter->Instance->FLTCR1 &= ~(DFSDM_FLTCR1_DFEN);
NYX 0:85b3fd62ea1a 1582
NYX 0:85b3fd62ea1a 1583 /* Call MSP deinit function */
NYX 0:85b3fd62ea1a 1584 HAL_DFSDM_FilterMspDeInit(hdfsdm_filter);
NYX 0:85b3fd62ea1a 1585
NYX 0:85b3fd62ea1a 1586 /* Set DFSDM filter in reset state */
NYX 0:85b3fd62ea1a 1587 hdfsdm_filter->State = HAL_DFSDM_FILTER_STATE_RESET;
NYX 0:85b3fd62ea1a 1588
NYX 0:85b3fd62ea1a 1589 return HAL_OK;
NYX 0:85b3fd62ea1a 1590 }
NYX 0:85b3fd62ea1a 1591
NYX 0:85b3fd62ea1a 1592 /**
NYX 0:85b3fd62ea1a 1593 * @brief Initializes the DFSDM filter MSP.
NYX 0:85b3fd62ea1a 1594 * @param hdfsdm_filter : DFSDM filter handle.
NYX 0:85b3fd62ea1a 1595 * @retval None
NYX 0:85b3fd62ea1a 1596 */
NYX 0:85b3fd62ea1a 1597 __weak void HAL_DFSDM_FilterMspInit(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
NYX 0:85b3fd62ea1a 1598 {
NYX 0:85b3fd62ea1a 1599 /* Prevent unused argument(s) compilation warning */
NYX 0:85b3fd62ea1a 1600 UNUSED(hdfsdm_filter);
NYX 0:85b3fd62ea1a 1601 /* NOTE : This function should not be modified, when the function is needed,
NYX 0:85b3fd62ea1a 1602 the HAL_DFSDM_FilterMspInit could be implemented in the user file.
NYX 0:85b3fd62ea1a 1603 */
NYX 0:85b3fd62ea1a 1604 }
NYX 0:85b3fd62ea1a 1605
NYX 0:85b3fd62ea1a 1606 /**
NYX 0:85b3fd62ea1a 1607 * @brief De-initializes the DFSDM filter MSP.
NYX 0:85b3fd62ea1a 1608 * @param hdfsdm_filter : DFSDM filter handle.
NYX 0:85b3fd62ea1a 1609 * @retval None
NYX 0:85b3fd62ea1a 1610 */
NYX 0:85b3fd62ea1a 1611 __weak void HAL_DFSDM_FilterMspDeInit(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
NYX 0:85b3fd62ea1a 1612 {
NYX 0:85b3fd62ea1a 1613 /* Prevent unused argument(s) compilation warning */
NYX 0:85b3fd62ea1a 1614 UNUSED(hdfsdm_filter);
NYX 0:85b3fd62ea1a 1615 /* NOTE : This function should not be modified, when the function is needed,
NYX 0:85b3fd62ea1a 1616 the HAL_DFSDM_FilterMspDeInit could be implemented in the user file.
NYX 0:85b3fd62ea1a 1617 */
NYX 0:85b3fd62ea1a 1618 }
NYX 0:85b3fd62ea1a 1619
NYX 0:85b3fd62ea1a 1620 /**
NYX 0:85b3fd62ea1a 1621 * @}
NYX 0:85b3fd62ea1a 1622 */
NYX 0:85b3fd62ea1a 1623
NYX 0:85b3fd62ea1a 1624 /** @defgroup DFSDM_Exported_Functions_Group2_Filter Filter control functions
NYX 0:85b3fd62ea1a 1625 * @brief Filter control functions
NYX 0:85b3fd62ea1a 1626 *
NYX 0:85b3fd62ea1a 1627 @verbatim
NYX 0:85b3fd62ea1a 1628 ==============================================================================
NYX 0:85b3fd62ea1a 1629 ##### Filter control functions #####
NYX 0:85b3fd62ea1a 1630 ==============================================================================
NYX 0:85b3fd62ea1a 1631 [..] This section provides functions allowing to:
NYX 0:85b3fd62ea1a 1632 (+) Select channel and enable/disable continuous mode for regular conversion.
NYX 0:85b3fd62ea1a 1633 (+) Select channels for injected conversion.
NYX 0:85b3fd62ea1a 1634 @endverbatim
NYX 0:85b3fd62ea1a 1635 * @{
NYX 0:85b3fd62ea1a 1636 */
NYX 0:85b3fd62ea1a 1637
NYX 0:85b3fd62ea1a 1638 /**
NYX 0:85b3fd62ea1a 1639 * @brief This function allows to select channel and to enable/disable
NYX 0:85b3fd62ea1a 1640 * continuous mode for regular conversion.
NYX 0:85b3fd62ea1a 1641 * @param hdfsdm_filter : DFSDM filter handle.
NYX 0:85b3fd62ea1a 1642 * @param Channel : Channel for regular conversion.
NYX 0:85b3fd62ea1a 1643 * This parameter can be a value of @ref DFSDM_Channel_Selection.
NYX 0:85b3fd62ea1a 1644 * @param ContinuousMode : Enable/disable continuous mode for regular conversion.
NYX 0:85b3fd62ea1a 1645 * This parameter can be a value of @ref DFSDM_ContinuousMode.
NYX 0:85b3fd62ea1a 1646 * @retval HAL status
NYX 0:85b3fd62ea1a 1647 */
NYX 0:85b3fd62ea1a 1648 HAL_StatusTypeDef HAL_DFSDM_FilterConfigRegChannel(DFSDM_Filter_HandleTypeDef *hdfsdm_filter,
NYX 0:85b3fd62ea1a 1649 uint32_t Channel,
NYX 0:85b3fd62ea1a 1650 uint32_t ContinuousMode)
NYX 0:85b3fd62ea1a 1651 {
NYX 0:85b3fd62ea1a 1652 HAL_StatusTypeDef status = HAL_OK;
NYX 0:85b3fd62ea1a 1653
NYX 0:85b3fd62ea1a 1654 /* Check parameters */
NYX 0:85b3fd62ea1a 1655 assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
NYX 0:85b3fd62ea1a 1656 assert_param(IS_DFSDM_REGULAR_CHANNEL(Channel));
NYX 0:85b3fd62ea1a 1657 assert_param(IS_DFSDM_CONTINUOUS_MODE(ContinuousMode));
NYX 0:85b3fd62ea1a 1658
NYX 0:85b3fd62ea1a 1659 /* Check DFSDM filter state */
NYX 0:85b3fd62ea1a 1660 if((hdfsdm_filter->State != HAL_DFSDM_FILTER_STATE_RESET) &&
NYX 0:85b3fd62ea1a 1661 (hdfsdm_filter->State != HAL_DFSDM_FILTER_STATE_ERROR))
NYX 0:85b3fd62ea1a 1662 {
NYX 0:85b3fd62ea1a 1663 /* Configure channel and continuous mode for regular conversion */
NYX 0:85b3fd62ea1a 1664 hdfsdm_filter->Instance->FLTCR1 &= ~(DFSDM_FLTCR1_RCH | DFSDM_FLTCR1_RCONT);
NYX 0:85b3fd62ea1a 1665 if(ContinuousMode == DFSDM_CONTINUOUS_CONV_ON)
NYX 0:85b3fd62ea1a 1666 {
NYX 0:85b3fd62ea1a 1667 hdfsdm_filter->Instance->FLTCR1 |= (uint32_t) (((Channel & DFSDM_MSB_MASK) << DFSDM_FLTCR1_MSB_RCH_OFFSET) |
NYX 0:85b3fd62ea1a 1668 DFSDM_FLTCR1_RCONT);
NYX 0:85b3fd62ea1a 1669 }
NYX 0:85b3fd62ea1a 1670 else
NYX 0:85b3fd62ea1a 1671 {
NYX 0:85b3fd62ea1a 1672 hdfsdm_filter->Instance->FLTCR1 |= (uint32_t) ((Channel & DFSDM_MSB_MASK) << DFSDM_FLTCR1_MSB_RCH_OFFSET);
NYX 0:85b3fd62ea1a 1673 }
NYX 0:85b3fd62ea1a 1674 /* Store continuous mode information */
NYX 0:85b3fd62ea1a 1675 hdfsdm_filter->RegularContMode = ContinuousMode;
NYX 0:85b3fd62ea1a 1676 }
NYX 0:85b3fd62ea1a 1677 else
NYX 0:85b3fd62ea1a 1678 {
NYX 0:85b3fd62ea1a 1679 status = HAL_ERROR;
NYX 0:85b3fd62ea1a 1680 }
NYX 0:85b3fd62ea1a 1681
NYX 0:85b3fd62ea1a 1682 /* Return function status */
NYX 0:85b3fd62ea1a 1683 return status;
NYX 0:85b3fd62ea1a 1684 }
NYX 0:85b3fd62ea1a 1685
NYX 0:85b3fd62ea1a 1686 /**
NYX 0:85b3fd62ea1a 1687 * @brief This function allows to select channels for injected conversion.
NYX 0:85b3fd62ea1a 1688 * @param hdfsdm_filter : DFSDM filter handle.
NYX 0:85b3fd62ea1a 1689 * @param Channel : Channels for injected conversion.
NYX 0:85b3fd62ea1a 1690 * This parameter can be a values combination of @ref DFSDM_Channel_Selection.
NYX 0:85b3fd62ea1a 1691 * @retval HAL status
NYX 0:85b3fd62ea1a 1692 */
NYX 0:85b3fd62ea1a 1693 HAL_StatusTypeDef HAL_DFSDM_FilterConfigInjChannel(DFSDM_Filter_HandleTypeDef *hdfsdm_filter,
NYX 0:85b3fd62ea1a 1694 uint32_t Channel)
NYX 0:85b3fd62ea1a 1695 {
NYX 0:85b3fd62ea1a 1696 HAL_StatusTypeDef status = HAL_OK;
NYX 0:85b3fd62ea1a 1697
NYX 0:85b3fd62ea1a 1698 /* Check parameters */
NYX 0:85b3fd62ea1a 1699 assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
NYX 0:85b3fd62ea1a 1700 assert_param(IS_DFSDM_INJECTED_CHANNEL(Channel));
NYX 0:85b3fd62ea1a 1701
NYX 0:85b3fd62ea1a 1702 /* Check DFSDM filter state */
NYX 0:85b3fd62ea1a 1703 if((hdfsdm_filter->State != HAL_DFSDM_FILTER_STATE_RESET) &&
NYX 0:85b3fd62ea1a 1704 (hdfsdm_filter->State != HAL_DFSDM_FILTER_STATE_ERROR))
NYX 0:85b3fd62ea1a 1705 {
NYX 0:85b3fd62ea1a 1706 /* Configure channel for injected conversion */
NYX 0:85b3fd62ea1a 1707 hdfsdm_filter->Instance->FLTJCHGR = (uint32_t) (Channel & DFSDM_LSB_MASK);
NYX 0:85b3fd62ea1a 1708 /* Store number of injected channels */
NYX 0:85b3fd62ea1a 1709 hdfsdm_filter->InjectedChannelsNbr = DFSDM_GetInjChannelsNbr(Channel);
NYX 0:85b3fd62ea1a 1710 /* Update number of injected channels remaining */
NYX 0:85b3fd62ea1a 1711 hdfsdm_filter->InjConvRemaining = (hdfsdm_filter->InjectedScanMode == ENABLE) ? \
NYX 0:85b3fd62ea1a 1712 hdfsdm_filter->InjectedChannelsNbr : 1U;
NYX 0:85b3fd62ea1a 1713 }
NYX 0:85b3fd62ea1a 1714 else
NYX 0:85b3fd62ea1a 1715 {
NYX 0:85b3fd62ea1a 1716 status = HAL_ERROR;
NYX 0:85b3fd62ea1a 1717 }
NYX 0:85b3fd62ea1a 1718 /* Return function status */
NYX 0:85b3fd62ea1a 1719 return status;
NYX 0:85b3fd62ea1a 1720 }
NYX 0:85b3fd62ea1a 1721
NYX 0:85b3fd62ea1a 1722 /**
NYX 0:85b3fd62ea1a 1723 * @}
NYX 0:85b3fd62ea1a 1724 */
NYX 0:85b3fd62ea1a 1725
NYX 0:85b3fd62ea1a 1726 /** @defgroup DFSDM_Exported_Functions_Group3_Filter Filter operation functions
NYX 0:85b3fd62ea1a 1727 * @brief Filter operation functions
NYX 0:85b3fd62ea1a 1728 *
NYX 0:85b3fd62ea1a 1729 @verbatim
NYX 0:85b3fd62ea1a 1730 ==============================================================================
NYX 0:85b3fd62ea1a 1731 ##### Filter operation functions #####
NYX 0:85b3fd62ea1a 1732 ==============================================================================
NYX 0:85b3fd62ea1a 1733 [..] This section provides functions allowing to:
NYX 0:85b3fd62ea1a 1734 (+) Start conversion of regular/injected channel.
NYX 0:85b3fd62ea1a 1735 (+) Poll for the end of regular/injected conversion.
NYX 0:85b3fd62ea1a 1736 (+) Stop conversion of regular/injected channel.
NYX 0:85b3fd62ea1a 1737 (+) Start conversion of regular/injected channel and enable interrupt.
NYX 0:85b3fd62ea1a 1738 (+) Call the callback functions at the end of regular/injected conversions.
NYX 0:85b3fd62ea1a 1739 (+) Stop conversion of regular/injected channel and disable interrupt.
NYX 0:85b3fd62ea1a 1740 (+) Start conversion of regular/injected channel and enable DMA transfer.
NYX 0:85b3fd62ea1a 1741 (+) Stop conversion of regular/injected channel and disable DMA transfer.
NYX 0:85b3fd62ea1a 1742 (+) Start analog watchdog and enable interrupt.
NYX 0:85b3fd62ea1a 1743 (+) Call the callback function when analog watchdog occurs.
NYX 0:85b3fd62ea1a 1744 (+) Stop analog watchdog and disable interrupt.
NYX 0:85b3fd62ea1a 1745 (+) Start extreme detector.
NYX 0:85b3fd62ea1a 1746 (+) Stop extreme detector.
NYX 0:85b3fd62ea1a 1747 (+) Get result of regular channel conversion.
NYX 0:85b3fd62ea1a 1748 (+) Get result of injected channel conversion.
NYX 0:85b3fd62ea1a 1749 (+) Get extreme detector maximum and minimum values.
NYX 0:85b3fd62ea1a 1750 (+) Get conversion time.
NYX 0:85b3fd62ea1a 1751 (+) Handle DFSDM interrupt request.
NYX 0:85b3fd62ea1a 1752 @endverbatim
NYX 0:85b3fd62ea1a 1753 * @{
NYX 0:85b3fd62ea1a 1754 */
NYX 0:85b3fd62ea1a 1755
NYX 0:85b3fd62ea1a 1756 /**
NYX 0:85b3fd62ea1a 1757 * @brief This function allows to start regular conversion in polling mode.
NYX 0:85b3fd62ea1a 1758 * @note This function should be called only when DFSDM filter instance is
NYX 0:85b3fd62ea1a 1759 * in idle state or if injected conversion is ongoing.
NYX 0:85b3fd62ea1a 1760 * @param hdfsdm_filter : DFSDM filter handle.
NYX 0:85b3fd62ea1a 1761 * @retval HAL status
NYX 0:85b3fd62ea1a 1762 */
NYX 0:85b3fd62ea1a 1763 HAL_StatusTypeDef HAL_DFSDM_FilterRegularStart(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
NYX 0:85b3fd62ea1a 1764 {
NYX 0:85b3fd62ea1a 1765 HAL_StatusTypeDef status = HAL_OK;
NYX 0:85b3fd62ea1a 1766
NYX 0:85b3fd62ea1a 1767 /* Check parameters */
NYX 0:85b3fd62ea1a 1768 assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
NYX 0:85b3fd62ea1a 1769
NYX 0:85b3fd62ea1a 1770 /* Check DFSDM filter state */
NYX 0:85b3fd62ea1a 1771 if((hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_READY) || \
NYX 0:85b3fd62ea1a 1772 (hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_INJ))
NYX 0:85b3fd62ea1a 1773 {
NYX 0:85b3fd62ea1a 1774 /* Start regular conversion */
NYX 0:85b3fd62ea1a 1775 DFSDM_RegConvStart(hdfsdm_filter);
NYX 0:85b3fd62ea1a 1776 }
NYX 0:85b3fd62ea1a 1777 else
NYX 0:85b3fd62ea1a 1778 {
NYX 0:85b3fd62ea1a 1779 status = HAL_ERROR;
NYX 0:85b3fd62ea1a 1780 }
NYX 0:85b3fd62ea1a 1781 /* Return function status */
NYX 0:85b3fd62ea1a 1782 return status;
NYX 0:85b3fd62ea1a 1783 }
NYX 0:85b3fd62ea1a 1784
NYX 0:85b3fd62ea1a 1785 /**
NYX 0:85b3fd62ea1a 1786 * @brief This function allows to poll for the end of regular conversion.
NYX 0:85b3fd62ea1a 1787 * @note This function should be called only if regular conversion is ongoing.
NYX 0:85b3fd62ea1a 1788 * @param hdfsdm_filter : DFSDM filter handle.
NYX 0:85b3fd62ea1a 1789 * @param Timeout : Timeout value in milliseconds.
NYX 0:85b3fd62ea1a 1790 * @retval HAL status
NYX 0:85b3fd62ea1a 1791 */
NYX 0:85b3fd62ea1a 1792 HAL_StatusTypeDef HAL_DFSDM_FilterPollForRegConversion(DFSDM_Filter_HandleTypeDef *hdfsdm_filter,
NYX 0:85b3fd62ea1a 1793 uint32_t Timeout)
NYX 0:85b3fd62ea1a 1794 {
NYX 0:85b3fd62ea1a 1795 uint32_t tickstart;
NYX 0:85b3fd62ea1a 1796
NYX 0:85b3fd62ea1a 1797 /* Check parameters */
NYX 0:85b3fd62ea1a 1798 assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
NYX 0:85b3fd62ea1a 1799
NYX 0:85b3fd62ea1a 1800 /* Check DFSDM filter state */
NYX 0:85b3fd62ea1a 1801 if((hdfsdm_filter->State != HAL_DFSDM_FILTER_STATE_REG) && \
NYX 0:85b3fd62ea1a 1802 (hdfsdm_filter->State != HAL_DFSDM_FILTER_STATE_REG_INJ))
NYX 0:85b3fd62ea1a 1803 {
NYX 0:85b3fd62ea1a 1804 /* Return error status */
NYX 0:85b3fd62ea1a 1805 return HAL_ERROR;
NYX 0:85b3fd62ea1a 1806 }
NYX 0:85b3fd62ea1a 1807 else
NYX 0:85b3fd62ea1a 1808 {
NYX 0:85b3fd62ea1a 1809 /* Get timeout */
NYX 0:85b3fd62ea1a 1810 tickstart = HAL_GetTick();
NYX 0:85b3fd62ea1a 1811
NYX 0:85b3fd62ea1a 1812 /* Wait end of regular conversion */
NYX 0:85b3fd62ea1a 1813 while((hdfsdm_filter->Instance->FLTISR & DFSDM_FLTISR_REOCF) != DFSDM_FLTISR_REOCF)
NYX 0:85b3fd62ea1a 1814 {
NYX 0:85b3fd62ea1a 1815 /* Check the Timeout */
NYX 0:85b3fd62ea1a 1816 if(Timeout != HAL_MAX_DELAY)
NYX 0:85b3fd62ea1a 1817 {
NYX 0:85b3fd62ea1a 1818 if((Timeout == 0U) || ((HAL_GetTick()-tickstart) > Timeout))
NYX 0:85b3fd62ea1a 1819 {
NYX 0:85b3fd62ea1a 1820 /* Return timeout status */
NYX 0:85b3fd62ea1a 1821 return HAL_TIMEOUT;
NYX 0:85b3fd62ea1a 1822 }
NYX 0:85b3fd62ea1a 1823 }
NYX 0:85b3fd62ea1a 1824 }
NYX 0:85b3fd62ea1a 1825 /* Check if overrun occurs */
NYX 0:85b3fd62ea1a 1826 if((hdfsdm_filter->Instance->FLTISR & DFSDM_FLTISR_ROVRF) == DFSDM_FLTISR_ROVRF)
NYX 0:85b3fd62ea1a 1827 {
NYX 0:85b3fd62ea1a 1828 /* Update error code and call error callback */
NYX 0:85b3fd62ea1a 1829 hdfsdm_filter->ErrorCode = DFSDM_FILTER_ERROR_REGULAR_OVERRUN;
NYX 0:85b3fd62ea1a 1830 HAL_DFSDM_FilterErrorCallback(hdfsdm_filter);
NYX 0:85b3fd62ea1a 1831
NYX 0:85b3fd62ea1a 1832 /* Clear regular overrun flag */
NYX 0:85b3fd62ea1a 1833 hdfsdm_filter->Instance->FLTICR = DFSDM_FLTICR_CLRROVRF;
NYX 0:85b3fd62ea1a 1834 }
NYX 0:85b3fd62ea1a 1835 /* Update DFSDM filter state only if not continuous conversion and SW trigger */
NYX 0:85b3fd62ea1a 1836 if((hdfsdm_filter->RegularContMode == DFSDM_CONTINUOUS_CONV_OFF) && \
NYX 0:85b3fd62ea1a 1837 (hdfsdm_filter->RegularTrigger == DFSDM_FILTER_SW_TRIGGER))
NYX 0:85b3fd62ea1a 1838 {
NYX 0:85b3fd62ea1a 1839 hdfsdm_filter->State = (hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_REG) ? \
NYX 0:85b3fd62ea1a 1840 HAL_DFSDM_FILTER_STATE_READY : HAL_DFSDM_FILTER_STATE_INJ;
NYX 0:85b3fd62ea1a 1841 }
NYX 0:85b3fd62ea1a 1842 /* Return function status */
NYX 0:85b3fd62ea1a 1843 return HAL_OK;
NYX 0:85b3fd62ea1a 1844 }
NYX 0:85b3fd62ea1a 1845 }
NYX 0:85b3fd62ea1a 1846
NYX 0:85b3fd62ea1a 1847 /**
NYX 0:85b3fd62ea1a 1848 * @brief This function allows to stop regular conversion in polling mode.
NYX 0:85b3fd62ea1a 1849 * @note This function should be called only if regular conversion is ongoing.
NYX 0:85b3fd62ea1a 1850 * @param hdfsdm_filter : DFSDM filter handle.
NYX 0:85b3fd62ea1a 1851 * @retval HAL status
NYX 0:85b3fd62ea1a 1852 */
NYX 0:85b3fd62ea1a 1853 HAL_StatusTypeDef HAL_DFSDM_FilterRegularStop(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
NYX 0:85b3fd62ea1a 1854 {
NYX 0:85b3fd62ea1a 1855 HAL_StatusTypeDef status = HAL_OK;
NYX 0:85b3fd62ea1a 1856
NYX 0:85b3fd62ea1a 1857 /* Check parameters */
NYX 0:85b3fd62ea1a 1858 assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
NYX 0:85b3fd62ea1a 1859
NYX 0:85b3fd62ea1a 1860 /* Check DFSDM filter state */
NYX 0:85b3fd62ea1a 1861 if((hdfsdm_filter->State != HAL_DFSDM_FILTER_STATE_REG) && \
NYX 0:85b3fd62ea1a 1862 (hdfsdm_filter->State != HAL_DFSDM_FILTER_STATE_REG_INJ))
NYX 0:85b3fd62ea1a 1863 {
NYX 0:85b3fd62ea1a 1864 /* Return error status */
NYX 0:85b3fd62ea1a 1865 status = HAL_ERROR;
NYX 0:85b3fd62ea1a 1866 }
NYX 0:85b3fd62ea1a 1867 else
NYX 0:85b3fd62ea1a 1868 {
NYX 0:85b3fd62ea1a 1869 /* Stop regular conversion */
NYX 0:85b3fd62ea1a 1870 DFSDM_RegConvStop(hdfsdm_filter);
NYX 0:85b3fd62ea1a 1871 }
NYX 0:85b3fd62ea1a 1872 /* Return function status */
NYX 0:85b3fd62ea1a 1873 return status;
NYX 0:85b3fd62ea1a 1874 }
NYX 0:85b3fd62ea1a 1875
NYX 0:85b3fd62ea1a 1876 /**
NYX 0:85b3fd62ea1a 1877 * @brief This function allows to start regular conversion in interrupt mode.
NYX 0:85b3fd62ea1a 1878 * @note This function should be called only when DFSDM filter instance is
NYX 0:85b3fd62ea1a 1879 * in idle state or if injected conversion is ongoing.
NYX 0:85b3fd62ea1a 1880 * @param hdfsdm_filter : DFSDM filter handle.
NYX 0:85b3fd62ea1a 1881 * @retval HAL status
NYX 0:85b3fd62ea1a 1882 */
NYX 0:85b3fd62ea1a 1883 HAL_StatusTypeDef HAL_DFSDM_FilterRegularStart_IT(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
NYX 0:85b3fd62ea1a 1884 {
NYX 0:85b3fd62ea1a 1885 HAL_StatusTypeDef status = HAL_OK;
NYX 0:85b3fd62ea1a 1886
NYX 0:85b3fd62ea1a 1887 /* Check parameters */
NYX 0:85b3fd62ea1a 1888 assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
NYX 0:85b3fd62ea1a 1889
NYX 0:85b3fd62ea1a 1890 /* Check DFSDM filter state */
NYX 0:85b3fd62ea1a 1891 if((hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_READY) || \
NYX 0:85b3fd62ea1a 1892 (hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_INJ))
NYX 0:85b3fd62ea1a 1893 {
NYX 0:85b3fd62ea1a 1894 /* Enable interrupts for regular conversions */
NYX 0:85b3fd62ea1a 1895 hdfsdm_filter->Instance->FLTCR2 |= (DFSDM_FLTCR2_REOCIE | DFSDM_FLTCR2_ROVRIE);
NYX 0:85b3fd62ea1a 1896
NYX 0:85b3fd62ea1a 1897 /* Start regular conversion */
NYX 0:85b3fd62ea1a 1898 DFSDM_RegConvStart(hdfsdm_filter);
NYX 0:85b3fd62ea1a 1899 }
NYX 0:85b3fd62ea1a 1900 else
NYX 0:85b3fd62ea1a 1901 {
NYX 0:85b3fd62ea1a 1902 status = HAL_ERROR;
NYX 0:85b3fd62ea1a 1903 }
NYX 0:85b3fd62ea1a 1904 /* Return function status */
NYX 0:85b3fd62ea1a 1905 return status;
NYX 0:85b3fd62ea1a 1906 }
NYX 0:85b3fd62ea1a 1907
NYX 0:85b3fd62ea1a 1908 /**
NYX 0:85b3fd62ea1a 1909 * @brief This function allows to stop regular conversion in interrupt mode.
NYX 0:85b3fd62ea1a 1910 * @note This function should be called only if regular conversion is ongoing.
NYX 0:85b3fd62ea1a 1911 * @param hdfsdm_filter : DFSDM filter handle.
NYX 0:85b3fd62ea1a 1912 * @retval HAL status
NYX 0:85b3fd62ea1a 1913 */
NYX 0:85b3fd62ea1a 1914 HAL_StatusTypeDef HAL_DFSDM_FilterRegularStop_IT(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
NYX 0:85b3fd62ea1a 1915 {
NYX 0:85b3fd62ea1a 1916 HAL_StatusTypeDef status = HAL_OK;
NYX 0:85b3fd62ea1a 1917
NYX 0:85b3fd62ea1a 1918 /* Check parameters */
NYX 0:85b3fd62ea1a 1919 assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
NYX 0:85b3fd62ea1a 1920
NYX 0:85b3fd62ea1a 1921 /* Check DFSDM filter state */
NYX 0:85b3fd62ea1a 1922 if((hdfsdm_filter->State != HAL_DFSDM_FILTER_STATE_REG) && \
NYX 0:85b3fd62ea1a 1923 (hdfsdm_filter->State != HAL_DFSDM_FILTER_STATE_REG_INJ))
NYX 0:85b3fd62ea1a 1924 {
NYX 0:85b3fd62ea1a 1925 /* Return error status */
NYX 0:85b3fd62ea1a 1926 status = HAL_ERROR;
NYX 0:85b3fd62ea1a 1927 }
NYX 0:85b3fd62ea1a 1928 else
NYX 0:85b3fd62ea1a 1929 {
NYX 0:85b3fd62ea1a 1930 /* Disable interrupts for regular conversions */
NYX 0:85b3fd62ea1a 1931 hdfsdm_filter->Instance->FLTCR2 &= ~(DFSDM_FLTCR2_REOCIE | DFSDM_FLTCR2_ROVRIE);
NYX 0:85b3fd62ea1a 1932
NYX 0:85b3fd62ea1a 1933 /* Stop regular conversion */
NYX 0:85b3fd62ea1a 1934 DFSDM_RegConvStop(hdfsdm_filter);
NYX 0:85b3fd62ea1a 1935 }
NYX 0:85b3fd62ea1a 1936 /* Return function status */
NYX 0:85b3fd62ea1a 1937 return status;
NYX 0:85b3fd62ea1a 1938 }
NYX 0:85b3fd62ea1a 1939
NYX 0:85b3fd62ea1a 1940 /**
NYX 0:85b3fd62ea1a 1941 * @brief This function allows to start regular conversion in DMA mode.
NYX 0:85b3fd62ea1a 1942 * @note This function should be called only when DFSDM filter instance is
NYX 0:85b3fd62ea1a 1943 * in idle state or if injected conversion is ongoing.
NYX 0:85b3fd62ea1a 1944 * Please note that data on buffer will contain signed regular conversion
NYX 0:85b3fd62ea1a 1945 * value on 24 most significant bits and corresponding channel on 3 least
NYX 0:85b3fd62ea1a 1946 * significant bits.
NYX 0:85b3fd62ea1a 1947 * @param hdfsdm_filter : DFSDM filter handle.
NYX 0:85b3fd62ea1a 1948 * @param pData : The destination buffer address.
NYX 0:85b3fd62ea1a 1949 * @param Length : The length of data to be transferred from DFSDM filter to memory.
NYX 0:85b3fd62ea1a 1950 * @retval HAL status
NYX 0:85b3fd62ea1a 1951 */
NYX 0:85b3fd62ea1a 1952 HAL_StatusTypeDef HAL_DFSDM_FilterRegularStart_DMA(DFSDM_Filter_HandleTypeDef *hdfsdm_filter,
NYX 0:85b3fd62ea1a 1953 int32_t *pData,
NYX 0:85b3fd62ea1a 1954 uint32_t Length)
NYX 0:85b3fd62ea1a 1955 {
NYX 0:85b3fd62ea1a 1956 HAL_StatusTypeDef status = HAL_OK;
NYX 0:85b3fd62ea1a 1957
NYX 0:85b3fd62ea1a 1958 /* Check parameters */
NYX 0:85b3fd62ea1a 1959 assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
NYX 0:85b3fd62ea1a 1960
NYX 0:85b3fd62ea1a 1961 /* Check destination address and length */
NYX 0:85b3fd62ea1a 1962 if((pData == NULL) || (Length == 0U))
NYX 0:85b3fd62ea1a 1963 {
NYX 0:85b3fd62ea1a 1964 status = HAL_ERROR;
NYX 0:85b3fd62ea1a 1965 }
NYX 0:85b3fd62ea1a 1966 /* Check that DMA is enabled for regular conversion */
NYX 0:85b3fd62ea1a 1967 else if((hdfsdm_filter->Instance->FLTCR1 & DFSDM_FLTCR1_RDMAEN) != DFSDM_FLTCR1_RDMAEN)
NYX 0:85b3fd62ea1a 1968 {
NYX 0:85b3fd62ea1a 1969 status = HAL_ERROR;
NYX 0:85b3fd62ea1a 1970 }
NYX 0:85b3fd62ea1a 1971 /* Check parameters compatibility */
NYX 0:85b3fd62ea1a 1972 else if((hdfsdm_filter->RegularTrigger == DFSDM_FILTER_SW_TRIGGER) && \
NYX 0:85b3fd62ea1a 1973 (hdfsdm_filter->RegularContMode == DFSDM_CONTINUOUS_CONV_OFF) && \
NYX 0:85b3fd62ea1a 1974 (hdfsdm_filter->hdmaReg->Init.Mode == DMA_NORMAL) && \
NYX 0:85b3fd62ea1a 1975 (Length != 1U))
NYX 0:85b3fd62ea1a 1976 {
NYX 0:85b3fd62ea1a 1977 status = HAL_ERROR;
NYX 0:85b3fd62ea1a 1978 }
NYX 0:85b3fd62ea1a 1979 else if((hdfsdm_filter->RegularTrigger == DFSDM_FILTER_SW_TRIGGER) && \
NYX 0:85b3fd62ea1a 1980 (hdfsdm_filter->RegularContMode == DFSDM_CONTINUOUS_CONV_OFF) && \
NYX 0:85b3fd62ea1a 1981 (hdfsdm_filter->hdmaReg->Init.Mode == DMA_CIRCULAR))
NYX 0:85b3fd62ea1a 1982 {
NYX 0:85b3fd62ea1a 1983 status = HAL_ERROR;
NYX 0:85b3fd62ea1a 1984 }
NYX 0:85b3fd62ea1a 1985 /* Check DFSDM filter state */
NYX 0:85b3fd62ea1a 1986 else if((hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_READY) || \
NYX 0:85b3fd62ea1a 1987 (hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_INJ))
NYX 0:85b3fd62ea1a 1988 {
NYX 0:85b3fd62ea1a 1989 /* Set callbacks on DMA handler */
NYX 0:85b3fd62ea1a 1990 hdfsdm_filter->hdmaReg->XferCpltCallback = DFSDM_DMARegularConvCplt;
NYX 0:85b3fd62ea1a 1991 hdfsdm_filter->hdmaReg->XferErrorCallback = DFSDM_DMAError;
NYX 0:85b3fd62ea1a 1992 hdfsdm_filter->hdmaReg->XferHalfCpltCallback = (hdfsdm_filter->hdmaReg->Init.Mode == DMA_CIRCULAR) ?\
NYX 0:85b3fd62ea1a 1993 DFSDM_DMARegularHalfConvCplt : NULL;
NYX 0:85b3fd62ea1a 1994
NYX 0:85b3fd62ea1a 1995 /* Start DMA in interrupt mode */
NYX 0:85b3fd62ea1a 1996 if(HAL_DMA_Start_IT(hdfsdm_filter->hdmaReg, (uint32_t)&hdfsdm_filter->Instance->FLTRDATAR, \
NYX 0:85b3fd62ea1a 1997 (uint32_t) pData, Length) != HAL_OK)
NYX 0:85b3fd62ea1a 1998 {
NYX 0:85b3fd62ea1a 1999 /* Set DFSDM filter in error state */
NYX 0:85b3fd62ea1a 2000 hdfsdm_filter->State = HAL_DFSDM_FILTER_STATE_ERROR;
NYX 0:85b3fd62ea1a 2001 status = HAL_ERROR;
NYX 0:85b3fd62ea1a 2002 }
NYX 0:85b3fd62ea1a 2003 else
NYX 0:85b3fd62ea1a 2004 {
NYX 0:85b3fd62ea1a 2005 /* Start regular conversion */
NYX 0:85b3fd62ea1a 2006 DFSDM_RegConvStart(hdfsdm_filter);
NYX 0:85b3fd62ea1a 2007 }
NYX 0:85b3fd62ea1a 2008 }
NYX 0:85b3fd62ea1a 2009 else
NYX 0:85b3fd62ea1a 2010 {
NYX 0:85b3fd62ea1a 2011 status = HAL_ERROR;
NYX 0:85b3fd62ea1a 2012 }
NYX 0:85b3fd62ea1a 2013 /* Return function status */
NYX 0:85b3fd62ea1a 2014 return status;
NYX 0:85b3fd62ea1a 2015 }
NYX 0:85b3fd62ea1a 2016
NYX 0:85b3fd62ea1a 2017 /**
NYX 0:85b3fd62ea1a 2018 * @brief This function allows to start regular conversion in DMA mode and to get
NYX 0:85b3fd62ea1a 2019 * only the 16 most significant bits of conversion.
NYX 0:85b3fd62ea1a 2020 * @note This function should be called only when DFSDM filter instance is
NYX 0:85b3fd62ea1a 2021 * in idle state or if injected conversion is ongoing.
NYX 0:85b3fd62ea1a 2022 * Please note that data on buffer will contain signed 16 most significant
NYX 0:85b3fd62ea1a 2023 * bits of regular conversion.
NYX 0:85b3fd62ea1a 2024 * @param hdfsdm_filter : DFSDM filter handle.
NYX 0:85b3fd62ea1a 2025 * @param pData : The destination buffer address.
NYX 0:85b3fd62ea1a 2026 * @param Length : The length of data to be transferred from DFSDM filter to memory.
NYX 0:85b3fd62ea1a 2027 * @retval HAL status
NYX 0:85b3fd62ea1a 2028 */
NYX 0:85b3fd62ea1a 2029 HAL_StatusTypeDef HAL_DFSDM_FilterRegularMsbStart_DMA(DFSDM_Filter_HandleTypeDef *hdfsdm_filter,
NYX 0:85b3fd62ea1a 2030 int16_t *pData,
NYX 0:85b3fd62ea1a 2031 uint32_t Length)
NYX 0:85b3fd62ea1a 2032 {
NYX 0:85b3fd62ea1a 2033 HAL_StatusTypeDef status = HAL_OK;
NYX 0:85b3fd62ea1a 2034
NYX 0:85b3fd62ea1a 2035 /* Check parameters */
NYX 0:85b3fd62ea1a 2036 assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
NYX 0:85b3fd62ea1a 2037
NYX 0:85b3fd62ea1a 2038 /* Check destination address and length */
NYX 0:85b3fd62ea1a 2039 if((pData == NULL) || (Length == 0U))
NYX 0:85b3fd62ea1a 2040 {
NYX 0:85b3fd62ea1a 2041 status = HAL_ERROR;
NYX 0:85b3fd62ea1a 2042 }
NYX 0:85b3fd62ea1a 2043 /* Check that DMA is enabled for regular conversion */
NYX 0:85b3fd62ea1a 2044 else if((hdfsdm_filter->Instance->FLTCR1 & DFSDM_FLTCR1_RDMAEN) != DFSDM_FLTCR1_RDMAEN)
NYX 0:85b3fd62ea1a 2045 {
NYX 0:85b3fd62ea1a 2046 status = HAL_ERROR;
NYX 0:85b3fd62ea1a 2047 }
NYX 0:85b3fd62ea1a 2048 /* Check parameters compatibility */
NYX 0:85b3fd62ea1a 2049 else if((hdfsdm_filter->RegularTrigger == DFSDM_FILTER_SW_TRIGGER) && \
NYX 0:85b3fd62ea1a 2050 (hdfsdm_filter->RegularContMode == DFSDM_CONTINUOUS_CONV_OFF) && \
NYX 0:85b3fd62ea1a 2051 (hdfsdm_filter->hdmaReg->Init.Mode == DMA_NORMAL) && \
NYX 0:85b3fd62ea1a 2052 (Length != 1U))
NYX 0:85b3fd62ea1a 2053 {
NYX 0:85b3fd62ea1a 2054 status = HAL_ERROR;
NYX 0:85b3fd62ea1a 2055 }
NYX 0:85b3fd62ea1a 2056 else if((hdfsdm_filter->RegularTrigger == DFSDM_FILTER_SW_TRIGGER) && \
NYX 0:85b3fd62ea1a 2057 (hdfsdm_filter->RegularContMode == DFSDM_CONTINUOUS_CONV_OFF) && \
NYX 0:85b3fd62ea1a 2058 (hdfsdm_filter->hdmaReg->Init.Mode == DMA_CIRCULAR))
NYX 0:85b3fd62ea1a 2059 {
NYX 0:85b3fd62ea1a 2060 status = HAL_ERROR;
NYX 0:85b3fd62ea1a 2061 }
NYX 0:85b3fd62ea1a 2062 /* Check DFSDM filter state */
NYX 0:85b3fd62ea1a 2063 else if((hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_READY) || \
NYX 0:85b3fd62ea1a 2064 (hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_INJ))
NYX 0:85b3fd62ea1a 2065 {
NYX 0:85b3fd62ea1a 2066 /* Set callbacks on DMA handler */
NYX 0:85b3fd62ea1a 2067 hdfsdm_filter->hdmaReg->XferCpltCallback = DFSDM_DMARegularConvCplt;
NYX 0:85b3fd62ea1a 2068 hdfsdm_filter->hdmaReg->XferErrorCallback = DFSDM_DMAError;
NYX 0:85b3fd62ea1a 2069 hdfsdm_filter->hdmaReg->XferHalfCpltCallback = (hdfsdm_filter->hdmaReg->Init.Mode == DMA_CIRCULAR) ?\
NYX 0:85b3fd62ea1a 2070 DFSDM_DMARegularHalfConvCplt : NULL;
NYX 0:85b3fd62ea1a 2071
NYX 0:85b3fd62ea1a 2072 /* Start DMA in interrupt mode */
NYX 0:85b3fd62ea1a 2073 if(HAL_DMA_Start_IT(hdfsdm_filter->hdmaReg, (uint32_t)(&hdfsdm_filter->Instance->FLTRDATAR) + 2U, \
NYX 0:85b3fd62ea1a 2074 (uint32_t) pData, Length) != HAL_OK)
NYX 0:85b3fd62ea1a 2075 {
NYX 0:85b3fd62ea1a 2076 /* Set DFSDM filter in error state */
NYX 0:85b3fd62ea1a 2077 hdfsdm_filter->State = HAL_DFSDM_FILTER_STATE_ERROR;
NYX 0:85b3fd62ea1a 2078 status = HAL_ERROR;
NYX 0:85b3fd62ea1a 2079 }
NYX 0:85b3fd62ea1a 2080 else
NYX 0:85b3fd62ea1a 2081 {
NYX 0:85b3fd62ea1a 2082 /* Start regular conversion */
NYX 0:85b3fd62ea1a 2083 DFSDM_RegConvStart(hdfsdm_filter);
NYX 0:85b3fd62ea1a 2084 }
NYX 0:85b3fd62ea1a 2085 }
NYX 0:85b3fd62ea1a 2086 else
NYX 0:85b3fd62ea1a 2087 {
NYX 0:85b3fd62ea1a 2088 status = HAL_ERROR;
NYX 0:85b3fd62ea1a 2089 }
NYX 0:85b3fd62ea1a 2090 /* Return function status */
NYX 0:85b3fd62ea1a 2091 return status;
NYX 0:85b3fd62ea1a 2092 }
NYX 0:85b3fd62ea1a 2093
NYX 0:85b3fd62ea1a 2094 /**
NYX 0:85b3fd62ea1a 2095 * @brief This function allows to stop regular conversion in DMA mode.
NYX 0:85b3fd62ea1a 2096 * @note This function should be called only if regular conversion is ongoing.
NYX 0:85b3fd62ea1a 2097 * @param hdfsdm_filter : DFSDM filter handle.
NYX 0:85b3fd62ea1a 2098 * @retval HAL status
NYX 0:85b3fd62ea1a 2099 */
NYX 0:85b3fd62ea1a 2100 HAL_StatusTypeDef HAL_DFSDM_FilterRegularStop_DMA(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
NYX 0:85b3fd62ea1a 2101 {
NYX 0:85b3fd62ea1a 2102 HAL_StatusTypeDef status = HAL_OK;
NYX 0:85b3fd62ea1a 2103
NYX 0:85b3fd62ea1a 2104 /* Check parameters */
NYX 0:85b3fd62ea1a 2105 assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
NYX 0:85b3fd62ea1a 2106
NYX 0:85b3fd62ea1a 2107 /* Check DFSDM filter state */
NYX 0:85b3fd62ea1a 2108 if((hdfsdm_filter->State != HAL_DFSDM_FILTER_STATE_REG) && \
NYX 0:85b3fd62ea1a 2109 (hdfsdm_filter->State != HAL_DFSDM_FILTER_STATE_REG_INJ))
NYX 0:85b3fd62ea1a 2110 {
NYX 0:85b3fd62ea1a 2111 /* Return error status */
NYX 0:85b3fd62ea1a 2112 status = HAL_ERROR;
NYX 0:85b3fd62ea1a 2113 }
NYX 0:85b3fd62ea1a 2114 else
NYX 0:85b3fd62ea1a 2115 {
NYX 0:85b3fd62ea1a 2116 /* Stop current DMA transfer */
NYX 0:85b3fd62ea1a 2117 if(HAL_DMA_Abort(hdfsdm_filter->hdmaReg) != HAL_OK)
NYX 0:85b3fd62ea1a 2118 {
NYX 0:85b3fd62ea1a 2119 /* Set DFSDM filter in error state */
NYX 0:85b3fd62ea1a 2120 hdfsdm_filter->State = HAL_DFSDM_FILTER_STATE_ERROR;
NYX 0:85b3fd62ea1a 2121 status = HAL_ERROR;
NYX 0:85b3fd62ea1a 2122 }
NYX 0:85b3fd62ea1a 2123 else
NYX 0:85b3fd62ea1a 2124 {
NYX 0:85b3fd62ea1a 2125 /* Stop regular conversion */
NYX 0:85b3fd62ea1a 2126 DFSDM_RegConvStop(hdfsdm_filter);
NYX 0:85b3fd62ea1a 2127 }
NYX 0:85b3fd62ea1a 2128 }
NYX 0:85b3fd62ea1a 2129 /* Return function status */
NYX 0:85b3fd62ea1a 2130 return status;
NYX 0:85b3fd62ea1a 2131 }
NYX 0:85b3fd62ea1a 2132
NYX 0:85b3fd62ea1a 2133 /**
NYX 0:85b3fd62ea1a 2134 * @brief This function allows to get regular conversion value.
NYX 0:85b3fd62ea1a 2135 * @param hdfsdm_filter : DFSDM filter handle.
NYX 0:85b3fd62ea1a 2136 * @param Channel : Corresponding channel of regular conversion.
NYX 0:85b3fd62ea1a 2137 * @retval Regular conversion value
NYX 0:85b3fd62ea1a 2138 */
NYX 0:85b3fd62ea1a 2139 int32_t HAL_DFSDM_FilterGetRegularValue(DFSDM_Filter_HandleTypeDef *hdfsdm_filter,
NYX 0:85b3fd62ea1a 2140 uint32_t *Channel)
NYX 0:85b3fd62ea1a 2141 {
NYX 0:85b3fd62ea1a 2142 uint32_t reg = 0U;
NYX 0:85b3fd62ea1a 2143 int32_t value = 0;
NYX 0:85b3fd62ea1a 2144
NYX 0:85b3fd62ea1a 2145 /* Check parameters */
NYX 0:85b3fd62ea1a 2146 assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
NYX 0:85b3fd62ea1a 2147 assert_param(Channel != NULL);
NYX 0:85b3fd62ea1a 2148
NYX 0:85b3fd62ea1a 2149 /* Get value of data register for regular channel */
NYX 0:85b3fd62ea1a 2150 reg = hdfsdm_filter->Instance->FLTRDATAR;
NYX 0:85b3fd62ea1a 2151
NYX 0:85b3fd62ea1a 2152 /* Extract channel and regular conversion value */
NYX 0:85b3fd62ea1a 2153 *Channel = (reg & DFSDM_FLTRDATAR_RDATACH);
NYX 0:85b3fd62ea1a 2154 value = ((int32_t)(reg & DFSDM_FLTRDATAR_RDATA) >> DFSDM_FLTRDATAR_DATA_OFFSET);
NYX 0:85b3fd62ea1a 2155
NYX 0:85b3fd62ea1a 2156 /* return regular conversion value */
NYX 0:85b3fd62ea1a 2157 return value;
NYX 0:85b3fd62ea1a 2158 }
NYX 0:85b3fd62ea1a 2159
NYX 0:85b3fd62ea1a 2160 /**
NYX 0:85b3fd62ea1a 2161 * @brief This function allows to start injected conversion in polling mode.
NYX 0:85b3fd62ea1a 2162 * @note This function should be called only when DFSDM filter instance is
NYX 0:85b3fd62ea1a 2163 * in idle state or if regular conversion is ongoing.
NYX 0:85b3fd62ea1a 2164 * @param hdfsdm_filter : DFSDM filter handle.
NYX 0:85b3fd62ea1a 2165 * @retval HAL status
NYX 0:85b3fd62ea1a 2166 */
NYX 0:85b3fd62ea1a 2167 HAL_StatusTypeDef HAL_DFSDM_FilterInjectedStart(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
NYX 0:85b3fd62ea1a 2168 {
NYX 0:85b3fd62ea1a 2169 HAL_StatusTypeDef status = HAL_OK;
NYX 0:85b3fd62ea1a 2170
NYX 0:85b3fd62ea1a 2171 /* Check parameters */
NYX 0:85b3fd62ea1a 2172 assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
NYX 0:85b3fd62ea1a 2173
NYX 0:85b3fd62ea1a 2174 /* Check DFSDM filter state */
NYX 0:85b3fd62ea1a 2175 if((hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_READY) || \
NYX 0:85b3fd62ea1a 2176 (hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_REG))
NYX 0:85b3fd62ea1a 2177 {
NYX 0:85b3fd62ea1a 2178 /* Start injected conversion */
NYX 0:85b3fd62ea1a 2179 DFSDM_InjConvStart(hdfsdm_filter);
NYX 0:85b3fd62ea1a 2180 }
NYX 0:85b3fd62ea1a 2181 else
NYX 0:85b3fd62ea1a 2182 {
NYX 0:85b3fd62ea1a 2183 status = HAL_ERROR;
NYX 0:85b3fd62ea1a 2184 }
NYX 0:85b3fd62ea1a 2185 /* Return function status */
NYX 0:85b3fd62ea1a 2186 return status;
NYX 0:85b3fd62ea1a 2187 }
NYX 0:85b3fd62ea1a 2188
NYX 0:85b3fd62ea1a 2189 /**
NYX 0:85b3fd62ea1a 2190 * @brief This function allows to poll for the end of injected conversion.
NYX 0:85b3fd62ea1a 2191 * @note This function should be called only if injected conversion is ongoing.
NYX 0:85b3fd62ea1a 2192 * @param hdfsdm_filter : DFSDM filter handle.
NYX 0:85b3fd62ea1a 2193 * @param Timeout : Timeout value in milliseconds.
NYX 0:85b3fd62ea1a 2194 * @retval HAL status
NYX 0:85b3fd62ea1a 2195 */
NYX 0:85b3fd62ea1a 2196 HAL_StatusTypeDef HAL_DFSDM_FilterPollForInjConversion(DFSDM_Filter_HandleTypeDef *hdfsdm_filter,
NYX 0:85b3fd62ea1a 2197 uint32_t Timeout)
NYX 0:85b3fd62ea1a 2198 {
NYX 0:85b3fd62ea1a 2199 uint32_t tickstart;
NYX 0:85b3fd62ea1a 2200
NYX 0:85b3fd62ea1a 2201 /* Check parameters */
NYX 0:85b3fd62ea1a 2202 assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
NYX 0:85b3fd62ea1a 2203
NYX 0:85b3fd62ea1a 2204 /* Check DFSDM filter state */
NYX 0:85b3fd62ea1a 2205 if((hdfsdm_filter->State != HAL_DFSDM_FILTER_STATE_INJ) && \
NYX 0:85b3fd62ea1a 2206 (hdfsdm_filter->State != HAL_DFSDM_FILTER_STATE_REG_INJ))
NYX 0:85b3fd62ea1a 2207 {
NYX 0:85b3fd62ea1a 2208 /* Return error status */
NYX 0:85b3fd62ea1a 2209 return HAL_ERROR;
NYX 0:85b3fd62ea1a 2210 }
NYX 0:85b3fd62ea1a 2211 else
NYX 0:85b3fd62ea1a 2212 {
NYX 0:85b3fd62ea1a 2213 /* Get timeout */
NYX 0:85b3fd62ea1a 2214 tickstart = HAL_GetTick();
NYX 0:85b3fd62ea1a 2215
NYX 0:85b3fd62ea1a 2216 /* Wait end of injected conversions */
NYX 0:85b3fd62ea1a 2217 while((hdfsdm_filter->Instance->FLTISR & DFSDM_FLTISR_JEOCF) != DFSDM_FLTISR_JEOCF)
NYX 0:85b3fd62ea1a 2218 {
NYX 0:85b3fd62ea1a 2219 /* Check the Timeout */
NYX 0:85b3fd62ea1a 2220 if(Timeout != HAL_MAX_DELAY)
NYX 0:85b3fd62ea1a 2221 {
NYX 0:85b3fd62ea1a 2222 if((Timeout == 0U) || ((HAL_GetTick()-tickstart) > Timeout))
NYX 0:85b3fd62ea1a 2223 {
NYX 0:85b3fd62ea1a 2224 /* Return timeout status */
NYX 0:85b3fd62ea1a 2225 return HAL_TIMEOUT;
NYX 0:85b3fd62ea1a 2226 }
NYX 0:85b3fd62ea1a 2227 }
NYX 0:85b3fd62ea1a 2228 }
NYX 0:85b3fd62ea1a 2229 /* Check if overrun occurs */
NYX 0:85b3fd62ea1a 2230 if((hdfsdm_filter->Instance->FLTISR & DFSDM_FLTISR_JOVRF) == DFSDM_FLTISR_JOVRF)
NYX 0:85b3fd62ea1a 2231 {
NYX 0:85b3fd62ea1a 2232 /* Update error code and call error callback */
NYX 0:85b3fd62ea1a 2233 hdfsdm_filter->ErrorCode = DFSDM_FILTER_ERROR_INJECTED_OVERRUN;
NYX 0:85b3fd62ea1a 2234 HAL_DFSDM_FilterErrorCallback(hdfsdm_filter);
NYX 0:85b3fd62ea1a 2235
NYX 0:85b3fd62ea1a 2236 /* Clear injected overrun flag */
NYX 0:85b3fd62ea1a 2237 hdfsdm_filter->Instance->FLTICR = DFSDM_FLTICR_CLRJOVRF;
NYX 0:85b3fd62ea1a 2238 }
NYX 0:85b3fd62ea1a 2239
NYX 0:85b3fd62ea1a 2240 /* Update remaining injected conversions */
NYX 0:85b3fd62ea1a 2241 hdfsdm_filter->InjConvRemaining--;
NYX 0:85b3fd62ea1a 2242 if(hdfsdm_filter->InjConvRemaining == 0U)
NYX 0:85b3fd62ea1a 2243 {
NYX 0:85b3fd62ea1a 2244 /* Update DFSDM filter state only if trigger is software */
NYX 0:85b3fd62ea1a 2245 if(hdfsdm_filter->InjectedTrigger == DFSDM_FILTER_SW_TRIGGER)
NYX 0:85b3fd62ea1a 2246 {
NYX 0:85b3fd62ea1a 2247 hdfsdm_filter->State = (hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_INJ) ? \
NYX 0:85b3fd62ea1a 2248 HAL_DFSDM_FILTER_STATE_READY : HAL_DFSDM_FILTER_STATE_REG;
NYX 0:85b3fd62ea1a 2249 }
NYX 0:85b3fd62ea1a 2250
NYX 0:85b3fd62ea1a 2251 /* end of injected sequence, reset the value */
NYX 0:85b3fd62ea1a 2252 hdfsdm_filter->InjConvRemaining = (hdfsdm_filter->InjectedScanMode == ENABLE) ? \
NYX 0:85b3fd62ea1a 2253 hdfsdm_filter->InjectedChannelsNbr : 1U;
NYX 0:85b3fd62ea1a 2254 }
NYX 0:85b3fd62ea1a 2255
NYX 0:85b3fd62ea1a 2256 /* Return function status */
NYX 0:85b3fd62ea1a 2257 return HAL_OK;
NYX 0:85b3fd62ea1a 2258 }
NYX 0:85b3fd62ea1a 2259 }
NYX 0:85b3fd62ea1a 2260
NYX 0:85b3fd62ea1a 2261 /**
NYX 0:85b3fd62ea1a 2262 * @brief This function allows to stop injected conversion in polling mode.
NYX 0:85b3fd62ea1a 2263 * @note This function should be called only if injected conversion is ongoing.
NYX 0:85b3fd62ea1a 2264 * @param hdfsdm_filter : DFSDM filter handle.
NYX 0:85b3fd62ea1a 2265 * @retval HAL status
NYX 0:85b3fd62ea1a 2266 */
NYX 0:85b3fd62ea1a 2267 HAL_StatusTypeDef HAL_DFSDM_FilterInjectedStop(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
NYX 0:85b3fd62ea1a 2268 {
NYX 0:85b3fd62ea1a 2269 HAL_StatusTypeDef status = HAL_OK;
NYX 0:85b3fd62ea1a 2270
NYX 0:85b3fd62ea1a 2271 /* Check parameters */
NYX 0:85b3fd62ea1a 2272 assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
NYX 0:85b3fd62ea1a 2273
NYX 0:85b3fd62ea1a 2274 /* Check DFSDM filter state */
NYX 0:85b3fd62ea1a 2275 if((hdfsdm_filter->State != HAL_DFSDM_FILTER_STATE_INJ) && \
NYX 0:85b3fd62ea1a 2276 (hdfsdm_filter->State != HAL_DFSDM_FILTER_STATE_REG_INJ))
NYX 0:85b3fd62ea1a 2277 {
NYX 0:85b3fd62ea1a 2278 /* Return error status */
NYX 0:85b3fd62ea1a 2279 status = HAL_ERROR;
NYX 0:85b3fd62ea1a 2280 }
NYX 0:85b3fd62ea1a 2281 else
NYX 0:85b3fd62ea1a 2282 {
NYX 0:85b3fd62ea1a 2283 /* Stop injected conversion */
NYX 0:85b3fd62ea1a 2284 DFSDM_InjConvStop(hdfsdm_filter);
NYX 0:85b3fd62ea1a 2285 }
NYX 0:85b3fd62ea1a 2286 /* Return function status */
NYX 0:85b3fd62ea1a 2287 return status;
NYX 0:85b3fd62ea1a 2288 }
NYX 0:85b3fd62ea1a 2289
NYX 0:85b3fd62ea1a 2290 /**
NYX 0:85b3fd62ea1a 2291 * @brief This function allows to start injected conversion in interrupt mode.
NYX 0:85b3fd62ea1a 2292 * @note This function should be called only when DFSDM filter instance is
NYX 0:85b3fd62ea1a 2293 * in idle state or if regular conversion is ongoing.
NYX 0:85b3fd62ea1a 2294 * @param hdfsdm_filter : DFSDM filter handle.
NYX 0:85b3fd62ea1a 2295 * @retval HAL status
NYX 0:85b3fd62ea1a 2296 */
NYX 0:85b3fd62ea1a 2297 HAL_StatusTypeDef HAL_DFSDM_FilterInjectedStart_IT(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
NYX 0:85b3fd62ea1a 2298 {
NYX 0:85b3fd62ea1a 2299 HAL_StatusTypeDef status = HAL_OK;
NYX 0:85b3fd62ea1a 2300
NYX 0:85b3fd62ea1a 2301 /* Check parameters */
NYX 0:85b3fd62ea1a 2302 assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
NYX 0:85b3fd62ea1a 2303
NYX 0:85b3fd62ea1a 2304 /* Check DFSDM filter state */
NYX 0:85b3fd62ea1a 2305 if((hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_READY) || \
NYX 0:85b3fd62ea1a 2306 (hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_REG))
NYX 0:85b3fd62ea1a 2307 {
NYX 0:85b3fd62ea1a 2308 /* Enable interrupts for injected conversions */
NYX 0:85b3fd62ea1a 2309 hdfsdm_filter->Instance->FLTCR2 |= (DFSDM_FLTCR2_JEOCIE | DFSDM_FLTCR2_JOVRIE);
NYX 0:85b3fd62ea1a 2310
NYX 0:85b3fd62ea1a 2311 /* Start injected conversion */
NYX 0:85b3fd62ea1a 2312 DFSDM_InjConvStart(hdfsdm_filter);
NYX 0:85b3fd62ea1a 2313 }
NYX 0:85b3fd62ea1a 2314 else
NYX 0:85b3fd62ea1a 2315 {
NYX 0:85b3fd62ea1a 2316 status = HAL_ERROR;
NYX 0:85b3fd62ea1a 2317 }
NYX 0:85b3fd62ea1a 2318 /* Return function status */
NYX 0:85b3fd62ea1a 2319 return status;
NYX 0:85b3fd62ea1a 2320 }
NYX 0:85b3fd62ea1a 2321
NYX 0:85b3fd62ea1a 2322 /**
NYX 0:85b3fd62ea1a 2323 * @brief This function allows to stop injected conversion in interrupt mode.
NYX 0:85b3fd62ea1a 2324 * @note This function should be called only if injected conversion is ongoing.
NYX 0:85b3fd62ea1a 2325 * @param hdfsdm_filter : DFSDM filter handle.
NYX 0:85b3fd62ea1a 2326 * @retval HAL status
NYX 0:85b3fd62ea1a 2327 */
NYX 0:85b3fd62ea1a 2328 HAL_StatusTypeDef HAL_DFSDM_FilterInjectedStop_IT(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
NYX 0:85b3fd62ea1a 2329 {
NYX 0:85b3fd62ea1a 2330 HAL_StatusTypeDef status = HAL_OK;
NYX 0:85b3fd62ea1a 2331
NYX 0:85b3fd62ea1a 2332 /* Check parameters */
NYX 0:85b3fd62ea1a 2333 assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
NYX 0:85b3fd62ea1a 2334
NYX 0:85b3fd62ea1a 2335 /* Check DFSDM filter state */
NYX 0:85b3fd62ea1a 2336 if((hdfsdm_filter->State != HAL_DFSDM_FILTER_STATE_INJ) && \
NYX 0:85b3fd62ea1a 2337 (hdfsdm_filter->State != HAL_DFSDM_FILTER_STATE_REG_INJ))
NYX 0:85b3fd62ea1a 2338 {
NYX 0:85b3fd62ea1a 2339 /* Return error status */
NYX 0:85b3fd62ea1a 2340 status = HAL_ERROR;
NYX 0:85b3fd62ea1a 2341 }
NYX 0:85b3fd62ea1a 2342 else
NYX 0:85b3fd62ea1a 2343 {
NYX 0:85b3fd62ea1a 2344 /* Disable interrupts for injected conversions */
NYX 0:85b3fd62ea1a 2345 hdfsdm_filter->Instance->FLTCR2 &= ~(DFSDM_FLTCR2_JEOCIE | DFSDM_FLTCR2_JOVRIE);
NYX 0:85b3fd62ea1a 2346
NYX 0:85b3fd62ea1a 2347 /* Stop injected conversion */
NYX 0:85b3fd62ea1a 2348 DFSDM_InjConvStop(hdfsdm_filter);
NYX 0:85b3fd62ea1a 2349 }
NYX 0:85b3fd62ea1a 2350 /* Return function status */
NYX 0:85b3fd62ea1a 2351 return status;
NYX 0:85b3fd62ea1a 2352 }
NYX 0:85b3fd62ea1a 2353
NYX 0:85b3fd62ea1a 2354 /**
NYX 0:85b3fd62ea1a 2355 * @brief This function allows to start injected conversion in DMA mode.
NYX 0:85b3fd62ea1a 2356 * @note This function should be called only when DFSDM filter instance is
NYX 0:85b3fd62ea1a 2357 * in idle state or if regular conversion is ongoing.
NYX 0:85b3fd62ea1a 2358 * Please note that data on buffer will contain signed injected conversion
NYX 0:85b3fd62ea1a 2359 * value on 24 most significant bits and corresponding channel on 3 least
NYX 0:85b3fd62ea1a 2360 * significant bits.
NYX 0:85b3fd62ea1a 2361 * @param hdfsdm_filter : DFSDM filter handle.
NYX 0:85b3fd62ea1a 2362 * @param pData : The destination buffer address.
NYX 0:85b3fd62ea1a 2363 * @param Length : The length of data to be transferred from DFSDM filter to memory.
NYX 0:85b3fd62ea1a 2364 * @retval HAL status
NYX 0:85b3fd62ea1a 2365 */
NYX 0:85b3fd62ea1a 2366 HAL_StatusTypeDef HAL_DFSDM_FilterInjectedStart_DMA(DFSDM_Filter_HandleTypeDef *hdfsdm_filter,
NYX 0:85b3fd62ea1a 2367 int32_t *pData,
NYX 0:85b3fd62ea1a 2368 uint32_t Length)
NYX 0:85b3fd62ea1a 2369 {
NYX 0:85b3fd62ea1a 2370 HAL_StatusTypeDef status = HAL_OK;
NYX 0:85b3fd62ea1a 2371
NYX 0:85b3fd62ea1a 2372 /* Check parameters */
NYX 0:85b3fd62ea1a 2373 assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
NYX 0:85b3fd62ea1a 2374
NYX 0:85b3fd62ea1a 2375 /* Check destination address and length */
NYX 0:85b3fd62ea1a 2376 if((pData == NULL) || (Length == 0U))
NYX 0:85b3fd62ea1a 2377 {
NYX 0:85b3fd62ea1a 2378 status = HAL_ERROR;
NYX 0:85b3fd62ea1a 2379 }
NYX 0:85b3fd62ea1a 2380 /* Check that DMA is enabled for injected conversion */
NYX 0:85b3fd62ea1a 2381 else if((hdfsdm_filter->Instance->FLTCR1 & DFSDM_FLTCR1_JDMAEN) != DFSDM_FLTCR1_JDMAEN)
NYX 0:85b3fd62ea1a 2382 {
NYX 0:85b3fd62ea1a 2383 status = HAL_ERROR;
NYX 0:85b3fd62ea1a 2384 }
NYX 0:85b3fd62ea1a 2385 /* Check parameters compatibility */
NYX 0:85b3fd62ea1a 2386 else if((hdfsdm_filter->InjectedTrigger == DFSDM_FILTER_SW_TRIGGER) && \
NYX 0:85b3fd62ea1a 2387 (hdfsdm_filter->hdmaInj->Init.Mode == DMA_NORMAL) && \
NYX 0:85b3fd62ea1a 2388 (Length > hdfsdm_filter->InjConvRemaining))
NYX 0:85b3fd62ea1a 2389 {
NYX 0:85b3fd62ea1a 2390 status = HAL_ERROR;
NYX 0:85b3fd62ea1a 2391 }
NYX 0:85b3fd62ea1a 2392 else if((hdfsdm_filter->InjectedTrigger == DFSDM_FILTER_SW_TRIGGER) && \
NYX 0:85b3fd62ea1a 2393 (hdfsdm_filter->hdmaInj->Init.Mode == DMA_CIRCULAR))
NYX 0:85b3fd62ea1a 2394 {
NYX 0:85b3fd62ea1a 2395 status = HAL_ERROR;
NYX 0:85b3fd62ea1a 2396 }
NYX 0:85b3fd62ea1a 2397 /* Check DFSDM filter state */
NYX 0:85b3fd62ea1a 2398 else if((hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_READY) || \
NYX 0:85b3fd62ea1a 2399 (hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_REG))
NYX 0:85b3fd62ea1a 2400 {
NYX 0:85b3fd62ea1a 2401 /* Set callbacks on DMA handler */
NYX 0:85b3fd62ea1a 2402 hdfsdm_filter->hdmaInj->XferCpltCallback = DFSDM_DMAInjectedConvCplt;
NYX 0:85b3fd62ea1a 2403 hdfsdm_filter->hdmaInj->XferErrorCallback = DFSDM_DMAError;
NYX 0:85b3fd62ea1a 2404 hdfsdm_filter->hdmaInj->XferHalfCpltCallback = (hdfsdm_filter->hdmaInj->Init.Mode == DMA_CIRCULAR) ?\
NYX 0:85b3fd62ea1a 2405 DFSDM_DMAInjectedHalfConvCplt : NULL;
NYX 0:85b3fd62ea1a 2406
NYX 0:85b3fd62ea1a 2407 /* Start DMA in interrupt mode */
NYX 0:85b3fd62ea1a 2408 if(HAL_DMA_Start_IT(hdfsdm_filter->hdmaInj, (uint32_t)&hdfsdm_filter->Instance->FLTJDATAR, \
NYX 0:85b3fd62ea1a 2409 (uint32_t) pData, Length) != HAL_OK)
NYX 0:85b3fd62ea1a 2410 {
NYX 0:85b3fd62ea1a 2411 /* Set DFSDM filter in error state */
NYX 0:85b3fd62ea1a 2412 hdfsdm_filter->State = HAL_DFSDM_FILTER_STATE_ERROR;
NYX 0:85b3fd62ea1a 2413 status = HAL_ERROR;
NYX 0:85b3fd62ea1a 2414 }
NYX 0:85b3fd62ea1a 2415 else
NYX 0:85b3fd62ea1a 2416 {
NYX 0:85b3fd62ea1a 2417 /* Start injected conversion */
NYX 0:85b3fd62ea1a 2418 DFSDM_InjConvStart(hdfsdm_filter);
NYX 0:85b3fd62ea1a 2419 }
NYX 0:85b3fd62ea1a 2420 }
NYX 0:85b3fd62ea1a 2421 else
NYX 0:85b3fd62ea1a 2422 {
NYX 0:85b3fd62ea1a 2423 status = HAL_ERROR;
NYX 0:85b3fd62ea1a 2424 }
NYX 0:85b3fd62ea1a 2425 /* Return function status */
NYX 0:85b3fd62ea1a 2426 return status;
NYX 0:85b3fd62ea1a 2427 }
NYX 0:85b3fd62ea1a 2428
NYX 0:85b3fd62ea1a 2429 /**
NYX 0:85b3fd62ea1a 2430 * @brief This function allows to start injected conversion in DMA mode and to get
NYX 0:85b3fd62ea1a 2431 * only the 16 most significant bits of conversion.
NYX 0:85b3fd62ea1a 2432 * @note This function should be called only when DFSDM filter instance is
NYX 0:85b3fd62ea1a 2433 * in idle state or if regular conversion is ongoing.
NYX 0:85b3fd62ea1a 2434 * Please note that data on buffer will contain signed 16 most significant
NYX 0:85b3fd62ea1a 2435 * bits of injected conversion.
NYX 0:85b3fd62ea1a 2436 * @param hdfsdm_filter : DFSDM filter handle.
NYX 0:85b3fd62ea1a 2437 * @param pData : The destination buffer address.
NYX 0:85b3fd62ea1a 2438 * @param Length : The length of data to be transferred from DFSDM filter to memory.
NYX 0:85b3fd62ea1a 2439 * @retval HAL status
NYX 0:85b3fd62ea1a 2440 */
NYX 0:85b3fd62ea1a 2441 HAL_StatusTypeDef HAL_DFSDM_FilterInjectedMsbStart_DMA(DFSDM_Filter_HandleTypeDef *hdfsdm_filter,
NYX 0:85b3fd62ea1a 2442 int16_t *pData,
NYX 0:85b3fd62ea1a 2443 uint32_t Length)
NYX 0:85b3fd62ea1a 2444 {
NYX 0:85b3fd62ea1a 2445 HAL_StatusTypeDef status = HAL_OK;
NYX 0:85b3fd62ea1a 2446
NYX 0:85b3fd62ea1a 2447 /* Check parameters */
NYX 0:85b3fd62ea1a 2448 assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
NYX 0:85b3fd62ea1a 2449
NYX 0:85b3fd62ea1a 2450 /* Check destination address and length */
NYX 0:85b3fd62ea1a 2451 if((pData == NULL) || (Length == 0U))
NYX 0:85b3fd62ea1a 2452 {
NYX 0:85b3fd62ea1a 2453 status = HAL_ERROR;
NYX 0:85b3fd62ea1a 2454 }
NYX 0:85b3fd62ea1a 2455 /* Check that DMA is enabled for injected conversion */
NYX 0:85b3fd62ea1a 2456 else if((hdfsdm_filter->Instance->FLTCR1 & DFSDM_FLTCR1_JDMAEN) != DFSDM_FLTCR1_JDMAEN)
NYX 0:85b3fd62ea1a 2457 {
NYX 0:85b3fd62ea1a 2458 status = HAL_ERROR;
NYX 0:85b3fd62ea1a 2459 }
NYX 0:85b3fd62ea1a 2460 /* Check parameters compatibility */
NYX 0:85b3fd62ea1a 2461 else if((hdfsdm_filter->InjectedTrigger == DFSDM_FILTER_SW_TRIGGER) && \
NYX 0:85b3fd62ea1a 2462 (hdfsdm_filter->hdmaInj->Init.Mode == DMA_NORMAL) && \
NYX 0:85b3fd62ea1a 2463 (Length > hdfsdm_filter->InjConvRemaining))
NYX 0:85b3fd62ea1a 2464 {
NYX 0:85b3fd62ea1a 2465 status = HAL_ERROR;
NYX 0:85b3fd62ea1a 2466 }
NYX 0:85b3fd62ea1a 2467 else if((hdfsdm_filter->InjectedTrigger == DFSDM_FILTER_SW_TRIGGER) && \
NYX 0:85b3fd62ea1a 2468 (hdfsdm_filter->hdmaInj->Init.Mode == DMA_CIRCULAR))
NYX 0:85b3fd62ea1a 2469 {
NYX 0:85b3fd62ea1a 2470 status = HAL_ERROR;
NYX 0:85b3fd62ea1a 2471 }
NYX 0:85b3fd62ea1a 2472 /* Check DFSDM filter state */
NYX 0:85b3fd62ea1a 2473 else if((hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_READY) || \
NYX 0:85b3fd62ea1a 2474 (hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_REG))
NYX 0:85b3fd62ea1a 2475 {
NYX 0:85b3fd62ea1a 2476 /* Set callbacks on DMA handler */
NYX 0:85b3fd62ea1a 2477 hdfsdm_filter->hdmaInj->XferCpltCallback = DFSDM_DMAInjectedConvCplt;
NYX 0:85b3fd62ea1a 2478 hdfsdm_filter->hdmaInj->XferErrorCallback = DFSDM_DMAError;
NYX 0:85b3fd62ea1a 2479 hdfsdm_filter->hdmaInj->XferHalfCpltCallback = (hdfsdm_filter->hdmaInj->Init.Mode == DMA_CIRCULAR) ?\
NYX 0:85b3fd62ea1a 2480 DFSDM_DMAInjectedHalfConvCplt : NULL;
NYX 0:85b3fd62ea1a 2481
NYX 0:85b3fd62ea1a 2482 /* Start DMA in interrupt mode */
NYX 0:85b3fd62ea1a 2483 if(HAL_DMA_Start_IT(hdfsdm_filter->hdmaInj, (uint32_t)(&hdfsdm_filter->Instance->FLTJDATAR) + 2U, \
NYX 0:85b3fd62ea1a 2484 (uint32_t) pData, Length) != HAL_OK)
NYX 0:85b3fd62ea1a 2485 {
NYX 0:85b3fd62ea1a 2486 /* Set DFSDM filter in error state */
NYX 0:85b3fd62ea1a 2487 hdfsdm_filter->State = HAL_DFSDM_FILTER_STATE_ERROR;
NYX 0:85b3fd62ea1a 2488 status = HAL_ERROR;
NYX 0:85b3fd62ea1a 2489 }
NYX 0:85b3fd62ea1a 2490 else
NYX 0:85b3fd62ea1a 2491 {
NYX 0:85b3fd62ea1a 2492 /* Start injected conversion */
NYX 0:85b3fd62ea1a 2493 DFSDM_InjConvStart(hdfsdm_filter);
NYX 0:85b3fd62ea1a 2494 }
NYX 0:85b3fd62ea1a 2495 }
NYX 0:85b3fd62ea1a 2496 else
NYX 0:85b3fd62ea1a 2497 {
NYX 0:85b3fd62ea1a 2498 status = HAL_ERROR;
NYX 0:85b3fd62ea1a 2499 }
NYX 0:85b3fd62ea1a 2500 /* Return function status */
NYX 0:85b3fd62ea1a 2501 return status;
NYX 0:85b3fd62ea1a 2502 }
NYX 0:85b3fd62ea1a 2503
NYX 0:85b3fd62ea1a 2504 /**
NYX 0:85b3fd62ea1a 2505 * @brief This function allows to stop injected conversion in DMA mode.
NYX 0:85b3fd62ea1a 2506 * @note This function should be called only if injected conversion is ongoing.
NYX 0:85b3fd62ea1a 2507 * @param hdfsdm_filter : DFSDM filter handle.
NYX 0:85b3fd62ea1a 2508 * @retval HAL status
NYX 0:85b3fd62ea1a 2509 */
NYX 0:85b3fd62ea1a 2510 HAL_StatusTypeDef HAL_DFSDM_FilterInjectedStop_DMA(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
NYX 0:85b3fd62ea1a 2511 {
NYX 0:85b3fd62ea1a 2512 HAL_StatusTypeDef status = HAL_OK;
NYX 0:85b3fd62ea1a 2513
NYX 0:85b3fd62ea1a 2514 /* Check parameters */
NYX 0:85b3fd62ea1a 2515 assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
NYX 0:85b3fd62ea1a 2516
NYX 0:85b3fd62ea1a 2517 /* Check DFSDM filter state */
NYX 0:85b3fd62ea1a 2518 if((hdfsdm_filter->State != HAL_DFSDM_FILTER_STATE_INJ) && \
NYX 0:85b3fd62ea1a 2519 (hdfsdm_filter->State != HAL_DFSDM_FILTER_STATE_REG_INJ))
NYX 0:85b3fd62ea1a 2520 {
NYX 0:85b3fd62ea1a 2521 /* Return error status */
NYX 0:85b3fd62ea1a 2522 status = HAL_ERROR;
NYX 0:85b3fd62ea1a 2523 }
NYX 0:85b3fd62ea1a 2524 else
NYX 0:85b3fd62ea1a 2525 {
NYX 0:85b3fd62ea1a 2526 /* Stop current DMA transfer */
NYX 0:85b3fd62ea1a 2527 if(HAL_DMA_Abort(hdfsdm_filter->hdmaInj) != HAL_OK)
NYX 0:85b3fd62ea1a 2528 {
NYX 0:85b3fd62ea1a 2529 /* Set DFSDM filter in error state */
NYX 0:85b3fd62ea1a 2530 hdfsdm_filter->State = HAL_DFSDM_FILTER_STATE_ERROR;
NYX 0:85b3fd62ea1a 2531 status = HAL_ERROR;
NYX 0:85b3fd62ea1a 2532 }
NYX 0:85b3fd62ea1a 2533 else
NYX 0:85b3fd62ea1a 2534 {
NYX 0:85b3fd62ea1a 2535 /* Stop regular conversion */
NYX 0:85b3fd62ea1a 2536 DFSDM_InjConvStop(hdfsdm_filter);
NYX 0:85b3fd62ea1a 2537 }
NYX 0:85b3fd62ea1a 2538 }
NYX 0:85b3fd62ea1a 2539 /* Return function status */
NYX 0:85b3fd62ea1a 2540 return status;
NYX 0:85b3fd62ea1a 2541 }
NYX 0:85b3fd62ea1a 2542
NYX 0:85b3fd62ea1a 2543 /**
NYX 0:85b3fd62ea1a 2544 * @brief This function allows to get injected conversion value.
NYX 0:85b3fd62ea1a 2545 * @param hdfsdm_filter : DFSDM filter handle.
NYX 0:85b3fd62ea1a 2546 * @param Channel : Corresponding channel of injected conversion.
NYX 0:85b3fd62ea1a 2547 * @retval Injected conversion value
NYX 0:85b3fd62ea1a 2548 */
NYX 0:85b3fd62ea1a 2549 int32_t HAL_DFSDM_FilterGetInjectedValue(DFSDM_Filter_HandleTypeDef *hdfsdm_filter,
NYX 0:85b3fd62ea1a 2550 uint32_t *Channel)
NYX 0:85b3fd62ea1a 2551 {
NYX 0:85b3fd62ea1a 2552 uint32_t reg = 0U;
NYX 0:85b3fd62ea1a 2553 int32_t value = 0;
NYX 0:85b3fd62ea1a 2554
NYX 0:85b3fd62ea1a 2555 /* Check parameters */
NYX 0:85b3fd62ea1a 2556 assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
NYX 0:85b3fd62ea1a 2557 assert_param(Channel != NULL);
NYX 0:85b3fd62ea1a 2558
NYX 0:85b3fd62ea1a 2559 /* Get value of data register for injected channel */
NYX 0:85b3fd62ea1a 2560 reg = hdfsdm_filter->Instance->FLTJDATAR;
NYX 0:85b3fd62ea1a 2561
NYX 0:85b3fd62ea1a 2562 /* Extract channel and injected conversion value */
NYX 0:85b3fd62ea1a 2563 *Channel = (reg & DFSDM_FLTJDATAR_JDATACH);
NYX 0:85b3fd62ea1a 2564 value = ((int32_t)(reg & DFSDM_FLTJDATAR_JDATA) >> DFSDM_FLTJDATAR_DATA_OFFSET);
NYX 0:85b3fd62ea1a 2565
NYX 0:85b3fd62ea1a 2566 /* return regular conversion value */
NYX 0:85b3fd62ea1a 2567 return value;
NYX 0:85b3fd62ea1a 2568 }
NYX 0:85b3fd62ea1a 2569
NYX 0:85b3fd62ea1a 2570 /**
NYX 0:85b3fd62ea1a 2571 * @brief This function allows to start filter analog watchdog in interrupt mode.
NYX 0:85b3fd62ea1a 2572 * @param hdfsdm_filter : DFSDM filter handle.
NYX 0:85b3fd62ea1a 2573 * @param awdParam : DFSDM filter analog watchdog parameters.
NYX 0:85b3fd62ea1a 2574 * @retval HAL status
NYX 0:85b3fd62ea1a 2575 */
NYX 0:85b3fd62ea1a 2576 HAL_StatusTypeDef HAL_DFSDM_FilterAwdStart_IT(DFSDM_Filter_HandleTypeDef *hdfsdm_filter,
NYX 0:85b3fd62ea1a 2577 DFSDM_Filter_AwdParamTypeDef *awdParam)
NYX 0:85b3fd62ea1a 2578 {
NYX 0:85b3fd62ea1a 2579 HAL_StatusTypeDef status = HAL_OK;
NYX 0:85b3fd62ea1a 2580
NYX 0:85b3fd62ea1a 2581 /* Check parameters */
NYX 0:85b3fd62ea1a 2582 assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
NYX 0:85b3fd62ea1a 2583 assert_param(IS_DFSDM_FILTER_AWD_DATA_SOURCE(awdParam->DataSource));
NYX 0:85b3fd62ea1a 2584 assert_param(IS_DFSDM_INJECTED_CHANNEL(awdParam->Channel));
NYX 0:85b3fd62ea1a 2585 assert_param(IS_DFSDM_FILTER_AWD_THRESHOLD(awdParam->HighThreshold));
NYX 0:85b3fd62ea1a 2586 assert_param(IS_DFSDM_FILTER_AWD_THRESHOLD(awdParam->LowThreshold));
NYX 0:85b3fd62ea1a 2587 assert_param(IS_DFSDM_BREAK_SIGNALS(awdParam->HighBreakSignal));
NYX 0:85b3fd62ea1a 2588 assert_param(IS_DFSDM_BREAK_SIGNALS(awdParam->LowBreakSignal));
NYX 0:85b3fd62ea1a 2589
NYX 0:85b3fd62ea1a 2590 /* Check DFSDM filter state */
NYX 0:85b3fd62ea1a 2591 if((hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_RESET) || \
NYX 0:85b3fd62ea1a 2592 (hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_ERROR))
NYX 0:85b3fd62ea1a 2593 {
NYX 0:85b3fd62ea1a 2594 /* Return error status */
NYX 0:85b3fd62ea1a 2595 status = HAL_ERROR;
NYX 0:85b3fd62ea1a 2596 }
NYX 0:85b3fd62ea1a 2597 else
NYX 0:85b3fd62ea1a 2598 {
NYX 0:85b3fd62ea1a 2599 /* Set analog watchdog data source */
NYX 0:85b3fd62ea1a 2600 hdfsdm_filter->Instance->FLTCR1 &= ~(DFSDM_FLTCR1_AWFSEL);
NYX 0:85b3fd62ea1a 2601 hdfsdm_filter->Instance->FLTCR1 |= awdParam->DataSource;
NYX 0:85b3fd62ea1a 2602
NYX 0:85b3fd62ea1a 2603 /* Set thresholds and break signals */
NYX 0:85b3fd62ea1a 2604 hdfsdm_filter->Instance->FLTAWHTR &= ~(DFSDM_FLTAWHTR_AWHT | DFSDM_FLTAWHTR_BKAWH);
NYX 0:85b3fd62ea1a 2605 hdfsdm_filter->Instance->FLTAWHTR |= (((uint32_t) awdParam->HighThreshold << DFSDM_FLTAWHTR_THRESHOLD_OFFSET) | \
NYX 0:85b3fd62ea1a 2606 awdParam->HighBreakSignal);
NYX 0:85b3fd62ea1a 2607 hdfsdm_filter->Instance->FLTAWLTR &= ~(DFSDM_FLTAWLTR_AWLT | DFSDM_FLTAWLTR_BKAWL);
NYX 0:85b3fd62ea1a 2608 hdfsdm_filter->Instance->FLTAWLTR |= (((uint32_t) awdParam->LowThreshold << DFSDM_FLTAWLTR_THRESHOLD_OFFSET) | \
NYX 0:85b3fd62ea1a 2609 awdParam->LowBreakSignal);
NYX 0:85b3fd62ea1a 2610
NYX 0:85b3fd62ea1a 2611 /* Set channels and interrupt for analog watchdog */
NYX 0:85b3fd62ea1a 2612 hdfsdm_filter->Instance->FLTCR2 &= ~(DFSDM_FLTCR2_AWDCH);
NYX 0:85b3fd62ea1a 2613 hdfsdm_filter->Instance->FLTCR2 |= (((awdParam->Channel & DFSDM_LSB_MASK) << DFSDM_FLTCR2_AWDCH_OFFSET) | \
NYX 0:85b3fd62ea1a 2614 DFSDM_FLTCR2_AWDIE);
NYX 0:85b3fd62ea1a 2615 }
NYX 0:85b3fd62ea1a 2616 /* Return function status */
NYX 0:85b3fd62ea1a 2617 return status;
NYX 0:85b3fd62ea1a 2618 }
NYX 0:85b3fd62ea1a 2619
NYX 0:85b3fd62ea1a 2620 /**
NYX 0:85b3fd62ea1a 2621 * @brief This function allows to stop filter analog watchdog in interrupt mode.
NYX 0:85b3fd62ea1a 2622 * @param hdfsdm_filter : DFSDM filter handle.
NYX 0:85b3fd62ea1a 2623 * @retval HAL status
NYX 0:85b3fd62ea1a 2624 */
NYX 0:85b3fd62ea1a 2625 HAL_StatusTypeDef HAL_DFSDM_FilterAwdStop_IT(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
NYX 0:85b3fd62ea1a 2626 {
NYX 0:85b3fd62ea1a 2627 HAL_StatusTypeDef status = HAL_OK;
NYX 0:85b3fd62ea1a 2628
NYX 0:85b3fd62ea1a 2629 /* Check parameters */
NYX 0:85b3fd62ea1a 2630 assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
NYX 0:85b3fd62ea1a 2631
NYX 0:85b3fd62ea1a 2632 /* Check DFSDM filter state */
NYX 0:85b3fd62ea1a 2633 if((hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_RESET) || \
NYX 0:85b3fd62ea1a 2634 (hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_ERROR))
NYX 0:85b3fd62ea1a 2635 {
NYX 0:85b3fd62ea1a 2636 /* Return error status */
NYX 0:85b3fd62ea1a 2637 status = HAL_ERROR;
NYX 0:85b3fd62ea1a 2638 }
NYX 0:85b3fd62ea1a 2639 else
NYX 0:85b3fd62ea1a 2640 {
NYX 0:85b3fd62ea1a 2641 /* Reset channels for analog watchdog and deactivate interrupt */
NYX 0:85b3fd62ea1a 2642 hdfsdm_filter->Instance->FLTCR2 &= ~(DFSDM_FLTCR2_AWDCH | DFSDM_FLTCR2_AWDIE);
NYX 0:85b3fd62ea1a 2643
NYX 0:85b3fd62ea1a 2644 /* Clear all analog watchdog flags */
NYX 0:85b3fd62ea1a 2645 hdfsdm_filter->Instance->FLTAWCFR = (DFSDM_FLTAWCFR_CLRAWHTF | DFSDM_FLTAWCFR_CLRAWLTF);
NYX 0:85b3fd62ea1a 2646
NYX 0:85b3fd62ea1a 2647 /* Reset thresholds and break signals */
NYX 0:85b3fd62ea1a 2648 hdfsdm_filter->Instance->FLTAWHTR &= ~(DFSDM_FLTAWHTR_AWHT | DFSDM_FLTAWHTR_BKAWH);
NYX 0:85b3fd62ea1a 2649 hdfsdm_filter->Instance->FLTAWLTR &= ~(DFSDM_FLTAWLTR_AWLT | DFSDM_FLTAWLTR_BKAWL);
NYX 0:85b3fd62ea1a 2650
NYX 0:85b3fd62ea1a 2651 /* Reset analog watchdog data source */
NYX 0:85b3fd62ea1a 2652 hdfsdm_filter->Instance->FLTCR1 &= ~(DFSDM_FLTCR1_AWFSEL);
NYX 0:85b3fd62ea1a 2653 }
NYX 0:85b3fd62ea1a 2654 /* Return function status */
NYX 0:85b3fd62ea1a 2655 return status;
NYX 0:85b3fd62ea1a 2656 }
NYX 0:85b3fd62ea1a 2657
NYX 0:85b3fd62ea1a 2658 /**
NYX 0:85b3fd62ea1a 2659 * @brief This function allows to start extreme detector feature.
NYX 0:85b3fd62ea1a 2660 * @param hdfsdm_filter : DFSDM filter handle.
NYX 0:85b3fd62ea1a 2661 * @param Channel : Channels where extreme detector is enabled.
NYX 0:85b3fd62ea1a 2662 * This parameter can be a values combination of @ref DFSDM_Channel_Selection.
NYX 0:85b3fd62ea1a 2663 * @retval HAL status
NYX 0:85b3fd62ea1a 2664 */
NYX 0:85b3fd62ea1a 2665 HAL_StatusTypeDef HAL_DFSDM_FilterExdStart(DFSDM_Filter_HandleTypeDef *hdfsdm_filter,
NYX 0:85b3fd62ea1a 2666 uint32_t Channel)
NYX 0:85b3fd62ea1a 2667 {
NYX 0:85b3fd62ea1a 2668 HAL_StatusTypeDef status = HAL_OK;
NYX 0:85b3fd62ea1a 2669
NYX 0:85b3fd62ea1a 2670 /* Check parameters */
NYX 0:85b3fd62ea1a 2671 assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
NYX 0:85b3fd62ea1a 2672 assert_param(IS_DFSDM_INJECTED_CHANNEL(Channel));
NYX 0:85b3fd62ea1a 2673
NYX 0:85b3fd62ea1a 2674 /* Check DFSDM filter state */
NYX 0:85b3fd62ea1a 2675 if((hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_RESET) || \
NYX 0:85b3fd62ea1a 2676 (hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_ERROR))
NYX 0:85b3fd62ea1a 2677 {
NYX 0:85b3fd62ea1a 2678 /* Return error status */
NYX 0:85b3fd62ea1a 2679 status = HAL_ERROR;
NYX 0:85b3fd62ea1a 2680 }
NYX 0:85b3fd62ea1a 2681 else
NYX 0:85b3fd62ea1a 2682 {
NYX 0:85b3fd62ea1a 2683 /* Set channels for extreme detector */
NYX 0:85b3fd62ea1a 2684 hdfsdm_filter->Instance->FLTCR2 &= ~(DFSDM_FLTCR2_EXCH);
NYX 0:85b3fd62ea1a 2685 hdfsdm_filter->Instance->FLTCR2 |= ((Channel & DFSDM_LSB_MASK) << DFSDM_FLTCR2_EXCH_OFFSET);
NYX 0:85b3fd62ea1a 2686 }
NYX 0:85b3fd62ea1a 2687 /* Return function status */
NYX 0:85b3fd62ea1a 2688 return status;
NYX 0:85b3fd62ea1a 2689 }
NYX 0:85b3fd62ea1a 2690
NYX 0:85b3fd62ea1a 2691 /**
NYX 0:85b3fd62ea1a 2692 * @brief This function allows to stop extreme detector feature.
NYX 0:85b3fd62ea1a 2693 * @param hdfsdm_filter : DFSDM filter handle.
NYX 0:85b3fd62ea1a 2694 * @retval HAL status
NYX 0:85b3fd62ea1a 2695 */
NYX 0:85b3fd62ea1a 2696 HAL_StatusTypeDef HAL_DFSDM_FilterExdStop(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
NYX 0:85b3fd62ea1a 2697 {
NYX 0:85b3fd62ea1a 2698 HAL_StatusTypeDef status = HAL_OK;
NYX 0:85b3fd62ea1a 2699 __IO uint32_t reg1;
NYX 0:85b3fd62ea1a 2700 __IO uint32_t reg2;
NYX 0:85b3fd62ea1a 2701
NYX 0:85b3fd62ea1a 2702 /* Check parameters */
NYX 0:85b3fd62ea1a 2703 assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
NYX 0:85b3fd62ea1a 2704
NYX 0:85b3fd62ea1a 2705 /* Check DFSDM filter state */
NYX 0:85b3fd62ea1a 2706 if((hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_RESET) || \
NYX 0:85b3fd62ea1a 2707 (hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_ERROR))
NYX 0:85b3fd62ea1a 2708 {
NYX 0:85b3fd62ea1a 2709 /* Return error status */
NYX 0:85b3fd62ea1a 2710 status = HAL_ERROR;
NYX 0:85b3fd62ea1a 2711 }
NYX 0:85b3fd62ea1a 2712 else
NYX 0:85b3fd62ea1a 2713 {
NYX 0:85b3fd62ea1a 2714 /* Reset channels for extreme detector */
NYX 0:85b3fd62ea1a 2715 hdfsdm_filter->Instance->FLTCR2 &= ~(DFSDM_FLTCR2_EXCH);
NYX 0:85b3fd62ea1a 2716
NYX 0:85b3fd62ea1a 2717 /* Clear extreme detector values */
NYX 0:85b3fd62ea1a 2718 reg1 = hdfsdm_filter->Instance->FLTEXMAX;
NYX 0:85b3fd62ea1a 2719 reg2 = hdfsdm_filter->Instance->FLTEXMIN;
NYX 0:85b3fd62ea1a 2720 UNUSED(reg1); /* To avoid GCC warning */
NYX 0:85b3fd62ea1a 2721 UNUSED(reg2); /* To avoid GCC warning */
NYX 0:85b3fd62ea1a 2722 }
NYX 0:85b3fd62ea1a 2723 /* Return function status */
NYX 0:85b3fd62ea1a 2724 return status;
NYX 0:85b3fd62ea1a 2725 }
NYX 0:85b3fd62ea1a 2726
NYX 0:85b3fd62ea1a 2727 /**
NYX 0:85b3fd62ea1a 2728 * @brief This function allows to get extreme detector maximum value.
NYX 0:85b3fd62ea1a 2729 * @param hdfsdm_filter : DFSDM filter handle.
NYX 0:85b3fd62ea1a 2730 * @param Channel : Corresponding channel.
NYX 0:85b3fd62ea1a 2731 * @retval Extreme detector maximum value
NYX 0:85b3fd62ea1a 2732 * This value is between Min_Data = -8388608 and Max_Data = 8388607.
NYX 0:85b3fd62ea1a 2733 */
NYX 0:85b3fd62ea1a 2734 int32_t HAL_DFSDM_FilterGetExdMaxValue(DFSDM_Filter_HandleTypeDef *hdfsdm_filter,
NYX 0:85b3fd62ea1a 2735 uint32_t *Channel)
NYX 0:85b3fd62ea1a 2736 {
NYX 0:85b3fd62ea1a 2737 uint32_t reg = 0U;
NYX 0:85b3fd62ea1a 2738 int32_t value = 0;
NYX 0:85b3fd62ea1a 2739
NYX 0:85b3fd62ea1a 2740 /* Check parameters */
NYX 0:85b3fd62ea1a 2741 assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
NYX 0:85b3fd62ea1a 2742 assert_param(Channel != NULL);
NYX 0:85b3fd62ea1a 2743
NYX 0:85b3fd62ea1a 2744 /* Get value of extreme detector maximum register */
NYX 0:85b3fd62ea1a 2745 reg = hdfsdm_filter->Instance->FLTEXMAX;
NYX 0:85b3fd62ea1a 2746
NYX 0:85b3fd62ea1a 2747 /* Extract channel and extreme detector maximum value */
NYX 0:85b3fd62ea1a 2748 *Channel = (reg & DFSDM_FLTEXMAX_EXMAXCH);
NYX 0:85b3fd62ea1a 2749 value = ((int32_t)(reg & DFSDM_FLTEXMAX_EXMAX) >> DFSDM_FLTEXMAX_DATA_OFFSET);
NYX 0:85b3fd62ea1a 2750
NYX 0:85b3fd62ea1a 2751 /* return extreme detector maximum value */
NYX 0:85b3fd62ea1a 2752 return value;
NYX 0:85b3fd62ea1a 2753 }
NYX 0:85b3fd62ea1a 2754
NYX 0:85b3fd62ea1a 2755 /**
NYX 0:85b3fd62ea1a 2756 * @brief This function allows to get extreme detector minimum value.
NYX 0:85b3fd62ea1a 2757 * @param hdfsdm_filter : DFSDM filter handle.
NYX 0:85b3fd62ea1a 2758 * @param Channel : Corresponding channel.
NYX 0:85b3fd62ea1a 2759 * @retval Extreme detector minimum value
NYX 0:85b3fd62ea1a 2760 * This value is between Min_Data = -8388608 and Max_Data = 8388607.
NYX 0:85b3fd62ea1a 2761 */
NYX 0:85b3fd62ea1a 2762 int32_t HAL_DFSDM_FilterGetExdMinValue(DFSDM_Filter_HandleTypeDef *hdfsdm_filter,
NYX 0:85b3fd62ea1a 2763 uint32_t *Channel)
NYX 0:85b3fd62ea1a 2764 {
NYX 0:85b3fd62ea1a 2765 uint32_t reg = 0U;
NYX 0:85b3fd62ea1a 2766 int32_t value = 0;
NYX 0:85b3fd62ea1a 2767
NYX 0:85b3fd62ea1a 2768 /* Check parameters */
NYX 0:85b3fd62ea1a 2769 assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
NYX 0:85b3fd62ea1a 2770 assert_param(Channel != NULL);
NYX 0:85b3fd62ea1a 2771
NYX 0:85b3fd62ea1a 2772 /* Get value of extreme detector minimum register */
NYX 0:85b3fd62ea1a 2773 reg = hdfsdm_filter->Instance->FLTEXMIN;
NYX 0:85b3fd62ea1a 2774
NYX 0:85b3fd62ea1a 2775 /* Extract channel and extreme detector minimum value */
NYX 0:85b3fd62ea1a 2776 *Channel = (reg & DFSDM_FLTEXMIN_EXMINCH);
NYX 0:85b3fd62ea1a 2777 value = ((int32_t)(reg & DFSDM_FLTEXMIN_EXMIN) >> DFSDM_FLTEXMIN_DATA_OFFSET);
NYX 0:85b3fd62ea1a 2778
NYX 0:85b3fd62ea1a 2779 /* return extreme detector minimum value */
NYX 0:85b3fd62ea1a 2780 return value;
NYX 0:85b3fd62ea1a 2781 }
NYX 0:85b3fd62ea1a 2782
NYX 0:85b3fd62ea1a 2783 /**
NYX 0:85b3fd62ea1a 2784 * @brief This function allows to get conversion time value.
NYX 0:85b3fd62ea1a 2785 * @param hdfsdm_filter : DFSDM filter handle.
NYX 0:85b3fd62ea1a 2786 * @retval Conversion time value
NYX 0:85b3fd62ea1a 2787 * @note To get time in second, this value has to be divided by DFSDM clock frequency.
NYX 0:85b3fd62ea1a 2788 */
NYX 0:85b3fd62ea1a 2789 uint32_t HAL_DFSDM_FilterGetConvTimeValue(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
NYX 0:85b3fd62ea1a 2790 {
NYX 0:85b3fd62ea1a 2791 uint32_t reg = 0U;
NYX 0:85b3fd62ea1a 2792 uint32_t value = 0U;
NYX 0:85b3fd62ea1a 2793
NYX 0:85b3fd62ea1a 2794 /* Check parameters */
NYX 0:85b3fd62ea1a 2795 assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
NYX 0:85b3fd62ea1a 2796
NYX 0:85b3fd62ea1a 2797 /* Get value of conversion timer register */
NYX 0:85b3fd62ea1a 2798 reg = hdfsdm_filter->Instance->FLTCNVTIMR;
NYX 0:85b3fd62ea1a 2799
NYX 0:85b3fd62ea1a 2800 /* Extract conversion time value */
NYX 0:85b3fd62ea1a 2801 value = ((reg & DFSDM_FLTCNVTIMR_CNVCNT) >> DFSDM_FLTCNVTIMR_DATA_OFFSET);
NYX 0:85b3fd62ea1a 2802
NYX 0:85b3fd62ea1a 2803 /* return extreme detector minimum value */
NYX 0:85b3fd62ea1a 2804 return value;
NYX 0:85b3fd62ea1a 2805 }
NYX 0:85b3fd62ea1a 2806
NYX 0:85b3fd62ea1a 2807 /**
NYX 0:85b3fd62ea1a 2808 * @brief This function handles the DFSDM interrupts.
NYX 0:85b3fd62ea1a 2809 * @param hdfsdm_filter : DFSDM filter handle.
NYX 0:85b3fd62ea1a 2810 * @retval None
NYX 0:85b3fd62ea1a 2811 */
NYX 0:85b3fd62ea1a 2812 void HAL_DFSDM_IRQHandler(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
NYX 0:85b3fd62ea1a 2813 {
NYX 0:85b3fd62ea1a 2814 /* Check if overrun occurs during regular conversion */
NYX 0:85b3fd62ea1a 2815 if(((hdfsdm_filter->Instance->FLTISR & DFSDM_FLTISR_ROVRF) != 0U) && \
NYX 0:85b3fd62ea1a 2816 ((hdfsdm_filter->Instance->FLTCR2 & DFSDM_FLTCR2_ROVRIE) != 0U))
NYX 0:85b3fd62ea1a 2817 {
NYX 0:85b3fd62ea1a 2818 /* Clear regular overrun flag */
NYX 0:85b3fd62ea1a 2819 hdfsdm_filter->Instance->FLTICR = DFSDM_FLTICR_CLRROVRF;
NYX 0:85b3fd62ea1a 2820
NYX 0:85b3fd62ea1a 2821 /* Update error code */
NYX 0:85b3fd62ea1a 2822 hdfsdm_filter->ErrorCode = DFSDM_FILTER_ERROR_REGULAR_OVERRUN;
NYX 0:85b3fd62ea1a 2823
NYX 0:85b3fd62ea1a 2824 /* Call error callback */
NYX 0:85b3fd62ea1a 2825 HAL_DFSDM_FilterErrorCallback(hdfsdm_filter);
NYX 0:85b3fd62ea1a 2826 }
NYX 0:85b3fd62ea1a 2827 /* Check if overrun occurs during injected conversion */
NYX 0:85b3fd62ea1a 2828 else if(((hdfsdm_filter->Instance->FLTISR & DFSDM_FLTISR_JOVRF) != 0U) && \
NYX 0:85b3fd62ea1a 2829 ((hdfsdm_filter->Instance->FLTCR2 & DFSDM_FLTCR2_JOVRIE) != 0U))
NYX 0:85b3fd62ea1a 2830 {
NYX 0:85b3fd62ea1a 2831 /* Clear injected overrun flag */
NYX 0:85b3fd62ea1a 2832 hdfsdm_filter->Instance->FLTICR = DFSDM_FLTICR_CLRJOVRF;
NYX 0:85b3fd62ea1a 2833
NYX 0:85b3fd62ea1a 2834 /* Update error code */
NYX 0:85b3fd62ea1a 2835 hdfsdm_filter->ErrorCode = DFSDM_FILTER_ERROR_INJECTED_OVERRUN;
NYX 0:85b3fd62ea1a 2836
NYX 0:85b3fd62ea1a 2837 /* Call error callback */
NYX 0:85b3fd62ea1a 2838 HAL_DFSDM_FilterErrorCallback(hdfsdm_filter);
NYX 0:85b3fd62ea1a 2839 }
NYX 0:85b3fd62ea1a 2840 /* Check if end of regular conversion */
NYX 0:85b3fd62ea1a 2841 else if(((hdfsdm_filter->Instance->FLTISR & DFSDM_FLTISR_REOCF) != 0U) && \
NYX 0:85b3fd62ea1a 2842 ((hdfsdm_filter->Instance->FLTCR2 & DFSDM_FLTCR2_REOCIE) != 0U))
NYX 0:85b3fd62ea1a 2843 {
NYX 0:85b3fd62ea1a 2844 /* Call regular conversion complete callback */
NYX 0:85b3fd62ea1a 2845 HAL_DFSDM_FilterRegConvCpltCallback(hdfsdm_filter);
NYX 0:85b3fd62ea1a 2846
NYX 0:85b3fd62ea1a 2847 /* End of conversion if mode is not continuous and software trigger */
NYX 0:85b3fd62ea1a 2848 if((hdfsdm_filter->RegularContMode == DFSDM_CONTINUOUS_CONV_OFF) && \
NYX 0:85b3fd62ea1a 2849 (hdfsdm_filter->RegularTrigger == DFSDM_FILTER_SW_TRIGGER))
NYX 0:85b3fd62ea1a 2850 {
NYX 0:85b3fd62ea1a 2851 /* Disable interrupts for regular conversions */
NYX 0:85b3fd62ea1a 2852 hdfsdm_filter->Instance->FLTCR2 &= ~(DFSDM_FLTCR2_REOCIE);
NYX 0:85b3fd62ea1a 2853
NYX 0:85b3fd62ea1a 2854 /* Update DFSDM filter state */
NYX 0:85b3fd62ea1a 2855 hdfsdm_filter->State = (hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_REG) ? \
NYX 0:85b3fd62ea1a 2856 HAL_DFSDM_FILTER_STATE_READY : HAL_DFSDM_FILTER_STATE_INJ;
NYX 0:85b3fd62ea1a 2857 }
NYX 0:85b3fd62ea1a 2858 }
NYX 0:85b3fd62ea1a 2859 /* Check if end of injected conversion */
NYX 0:85b3fd62ea1a 2860 else if(((hdfsdm_filter->Instance->FLTISR & DFSDM_FLTISR_JEOCF) != 0U) && \
NYX 0:85b3fd62ea1a 2861 ((hdfsdm_filter->Instance->FLTCR2 & DFSDM_FLTCR2_JEOCIE) != 0U))
NYX 0:85b3fd62ea1a 2862 {
NYX 0:85b3fd62ea1a 2863 /* Call injected conversion complete callback */
NYX 0:85b3fd62ea1a 2864 HAL_DFSDM_FilterInjConvCpltCallback(hdfsdm_filter);
NYX 0:85b3fd62ea1a 2865
NYX 0:85b3fd62ea1a 2866 /* Update remaining injected conversions */
NYX 0:85b3fd62ea1a 2867 hdfsdm_filter->InjConvRemaining--;
NYX 0:85b3fd62ea1a 2868 if(hdfsdm_filter->InjConvRemaining == 0U)
NYX 0:85b3fd62ea1a 2869 {
NYX 0:85b3fd62ea1a 2870 /* End of conversion if trigger is software */
NYX 0:85b3fd62ea1a 2871 if(hdfsdm_filter->InjectedTrigger == DFSDM_FILTER_SW_TRIGGER)
NYX 0:85b3fd62ea1a 2872 {
NYX 0:85b3fd62ea1a 2873 /* Disable interrupts for injected conversions */
NYX 0:85b3fd62ea1a 2874 hdfsdm_filter->Instance->FLTCR2 &= ~(DFSDM_FLTCR2_JEOCIE);
NYX 0:85b3fd62ea1a 2875
NYX 0:85b3fd62ea1a 2876 /* Update DFSDM filter state */
NYX 0:85b3fd62ea1a 2877 hdfsdm_filter->State = (hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_INJ) ? \
NYX 0:85b3fd62ea1a 2878 HAL_DFSDM_FILTER_STATE_READY : HAL_DFSDM_FILTER_STATE_REG;
NYX 0:85b3fd62ea1a 2879 }
NYX 0:85b3fd62ea1a 2880 /* end of injected sequence, reset the value */
NYX 0:85b3fd62ea1a 2881 hdfsdm_filter->InjConvRemaining = (hdfsdm_filter->InjectedScanMode == ENABLE) ? \
NYX 0:85b3fd62ea1a 2882 hdfsdm_filter->InjectedChannelsNbr : 1U;
NYX 0:85b3fd62ea1a 2883 }
NYX 0:85b3fd62ea1a 2884 }
NYX 0:85b3fd62ea1a 2885 /* Check if analog watchdog occurs */
NYX 0:85b3fd62ea1a 2886 else if(((hdfsdm_filter->Instance->FLTISR & DFSDM_FLTISR_AWDF) != 0U) && \
NYX 0:85b3fd62ea1a 2887 ((hdfsdm_filter->Instance->FLTCR2 & DFSDM_FLTCR2_AWDIE) != 0U))
NYX 0:85b3fd62ea1a 2888 {
NYX 0:85b3fd62ea1a 2889 uint32_t reg = 0U;
NYX 0:85b3fd62ea1a 2890 uint32_t threshold = 0U;
NYX 0:85b3fd62ea1a 2891 uint32_t channel = 0U;
NYX 0:85b3fd62ea1a 2892
NYX 0:85b3fd62ea1a 2893 /* Get channel and threshold */
NYX 0:85b3fd62ea1a 2894 reg = hdfsdm_filter->Instance->FLTAWSR;
NYX 0:85b3fd62ea1a 2895 threshold = ((reg & DFSDM_FLTAWSR_AWLTF) != 0U) ? DFSDM_AWD_LOW_THRESHOLD : DFSDM_AWD_HIGH_THRESHOLD;
NYX 0:85b3fd62ea1a 2896 if(threshold == DFSDM_AWD_HIGH_THRESHOLD)
NYX 0:85b3fd62ea1a 2897 {
NYX 0:85b3fd62ea1a 2898 reg = reg >> DFSDM_FLTAWSR_HIGH_OFFSET;
NYX 0:85b3fd62ea1a 2899 }
NYX 0:85b3fd62ea1a 2900 while((reg & 1U) == 0U)
NYX 0:85b3fd62ea1a 2901 {
NYX 0:85b3fd62ea1a 2902 channel++;
NYX 0:85b3fd62ea1a 2903 reg = reg >> 1U;
NYX 0:85b3fd62ea1a 2904 }
NYX 0:85b3fd62ea1a 2905 /* Clear analog watchdog flag */
NYX 0:85b3fd62ea1a 2906 hdfsdm_filter->Instance->FLTAWCFR = (threshold == DFSDM_AWD_HIGH_THRESHOLD) ? \
NYX 0:85b3fd62ea1a 2907 (1U << (DFSDM_FLTAWSR_HIGH_OFFSET + channel)) : \
NYX 0:85b3fd62ea1a 2908 (1U << channel);
NYX 0:85b3fd62ea1a 2909
NYX 0:85b3fd62ea1a 2910 /* Call analog watchdog callback */
NYX 0:85b3fd62ea1a 2911 HAL_DFSDM_FilterAwdCallback(hdfsdm_filter, channel, threshold);
NYX 0:85b3fd62ea1a 2912 }
NYX 0:85b3fd62ea1a 2913 /* Check if clock absence occurs */
NYX 0:85b3fd62ea1a 2914 else if((hdfsdm_filter->Instance == DFSDM1_Filter0) && \
NYX 0:85b3fd62ea1a 2915 ((hdfsdm_filter->Instance->FLTISR & DFSDM_FLTISR_CKABF) != 0U) && \
NYX 0:85b3fd62ea1a 2916 ((hdfsdm_filter->Instance->FLTCR2 & DFSDM_FLTCR2_CKABIE) != 0U))
NYX 0:85b3fd62ea1a 2917 {
NYX 0:85b3fd62ea1a 2918 uint32_t reg = 0U;
NYX 0:85b3fd62ea1a 2919 uint32_t channel = 0U;
NYX 0:85b3fd62ea1a 2920
NYX 0:85b3fd62ea1a 2921 reg = ((hdfsdm_filter->Instance->FLTISR & DFSDM_FLTISR_CKABF) >> DFSDM_FLTISR_CKABF_OFFSET);
NYX 0:85b3fd62ea1a 2922
NYX 0:85b3fd62ea1a 2923 while(channel < DFSDM1_CHANNEL_NUMBER)
NYX 0:85b3fd62ea1a 2924 {
NYX 0:85b3fd62ea1a 2925 /* Check if flag is set and corresponding channel is enabled */
NYX 0:85b3fd62ea1a 2926 if(((reg & 1U) != 0U) && (a_dfsdm1ChannelHandle[channel] != NULL))
NYX 0:85b3fd62ea1a 2927 {
NYX 0:85b3fd62ea1a 2928 /* Check clock absence has been enabled for this channel */
NYX 0:85b3fd62ea1a 2929 if((a_dfsdm1ChannelHandle[channel]->Instance->CHCFGR1 & DFSDM_CHCFGR1_CKABEN) != 0U)
NYX 0:85b3fd62ea1a 2930 {
NYX 0:85b3fd62ea1a 2931 /* Clear clock absence flag */
NYX 0:85b3fd62ea1a 2932 hdfsdm_filter->Instance->FLTICR = (1U << (DFSDM_FLTICR_CLRCKABF_OFFSET + channel));
NYX 0:85b3fd62ea1a 2933
NYX 0:85b3fd62ea1a 2934 /* Call clock absence callback */
NYX 0:85b3fd62ea1a 2935 HAL_DFSDM_ChannelCkabCallback(a_dfsdm1ChannelHandle[channel]);
NYX 0:85b3fd62ea1a 2936 }
NYX 0:85b3fd62ea1a 2937 }
NYX 0:85b3fd62ea1a 2938 channel++;
NYX 0:85b3fd62ea1a 2939 reg = reg >> 1U;
NYX 0:85b3fd62ea1a 2940 }
NYX 0:85b3fd62ea1a 2941 }
NYX 0:85b3fd62ea1a 2942 #if defined (DFSDM2_Channel0)
NYX 0:85b3fd62ea1a 2943 /* Check if clock absence occurs */
NYX 0:85b3fd62ea1a 2944 else if((hdfsdm_filter->Instance == DFSDM2_Filter0) && \
NYX 0:85b3fd62ea1a 2945 ((hdfsdm_filter->Instance->FLTISR & DFSDM_FLTISR_CKABF) != 0U) && \
NYX 0:85b3fd62ea1a 2946 ((hdfsdm_filter->Instance->FLTCR2 & DFSDM_FLTCR2_CKABIE) != 0U))
NYX 0:85b3fd62ea1a 2947 {
NYX 0:85b3fd62ea1a 2948 uint32_t reg = 0U;
NYX 0:85b3fd62ea1a 2949 uint32_t channel = 0U;
NYX 0:85b3fd62ea1a 2950
NYX 0:85b3fd62ea1a 2951 reg = ((hdfsdm_filter->Instance->FLTISR & DFSDM_FLTISR_CKABF) >> DFSDM_FLTISR_CKABF_OFFSET);
NYX 0:85b3fd62ea1a 2952
NYX 0:85b3fd62ea1a 2953 while(channel < DFSDM2_CHANNEL_NUMBER)
NYX 0:85b3fd62ea1a 2954 {
NYX 0:85b3fd62ea1a 2955 /* Check if flag is set and corresponding channel is enabled */
NYX 0:85b3fd62ea1a 2956 if(((reg & 1U) != 0U) && (a_dfsdm2ChannelHandle[channel] != NULL))
NYX 0:85b3fd62ea1a 2957 {
NYX 0:85b3fd62ea1a 2958 /* Check clock absence has been enabled for this channel */
NYX 0:85b3fd62ea1a 2959 if((a_dfsdm2ChannelHandle[channel]->Instance->CHCFGR1 & DFSDM_CHCFGR1_CKABEN) != 0U)
NYX 0:85b3fd62ea1a 2960 {
NYX 0:85b3fd62ea1a 2961 /* Clear clock absence flag */
NYX 0:85b3fd62ea1a 2962 hdfsdm_filter->Instance->FLTICR = (1U << (DFSDM_FLTICR_CLRCKABF_OFFSET + channel));
NYX 0:85b3fd62ea1a 2963
NYX 0:85b3fd62ea1a 2964 /* Call clock absence callback */
NYX 0:85b3fd62ea1a 2965 HAL_DFSDM_ChannelCkabCallback(a_dfsdm2ChannelHandle[channel]);
NYX 0:85b3fd62ea1a 2966 }
NYX 0:85b3fd62ea1a 2967 }
NYX 0:85b3fd62ea1a 2968 channel++;
NYX 0:85b3fd62ea1a 2969 reg = reg >> 1U;
NYX 0:85b3fd62ea1a 2970 }
NYX 0:85b3fd62ea1a 2971 }
NYX 0:85b3fd62ea1a 2972 #endif /* DFSDM2_Channel0 */
NYX 0:85b3fd62ea1a 2973 /* Check if short circuit detection occurs */
NYX 0:85b3fd62ea1a 2974 else if((hdfsdm_filter->Instance == DFSDM1_Filter0) && \
NYX 0:85b3fd62ea1a 2975 ((hdfsdm_filter->Instance->FLTISR & DFSDM_FLTISR_SCDF) != 0U) && \
NYX 0:85b3fd62ea1a 2976 ((hdfsdm_filter->Instance->FLTCR2 & DFSDM_FLTCR2_SCDIE) != 0U))
NYX 0:85b3fd62ea1a 2977 {
NYX 0:85b3fd62ea1a 2978 uint32_t reg = 0U;
NYX 0:85b3fd62ea1a 2979 uint32_t channel = 0U;
NYX 0:85b3fd62ea1a 2980
NYX 0:85b3fd62ea1a 2981 /* Get channel */
NYX 0:85b3fd62ea1a 2982 reg = ((hdfsdm_filter->Instance->FLTISR & DFSDM_FLTISR_SCDF) >> DFSDM_FLTISR_SCDF_OFFSET);
NYX 0:85b3fd62ea1a 2983 while((reg & 1U) == 0U)
NYX 0:85b3fd62ea1a 2984 {
NYX 0:85b3fd62ea1a 2985 channel++;
NYX 0:85b3fd62ea1a 2986 reg = reg >> 1U;
NYX 0:85b3fd62ea1a 2987 }
NYX 0:85b3fd62ea1a 2988
NYX 0:85b3fd62ea1a 2989 /* Clear short circuit detection flag */
NYX 0:85b3fd62ea1a 2990 hdfsdm_filter->Instance->FLTICR = (1U << (DFSDM_FLTICR_CLRSCDF_OFFSET + channel));
NYX 0:85b3fd62ea1a 2991
NYX 0:85b3fd62ea1a 2992 /* Call short circuit detection callback */
NYX 0:85b3fd62ea1a 2993 HAL_DFSDM_ChannelScdCallback(a_dfsdm1ChannelHandle[channel]);
NYX 0:85b3fd62ea1a 2994 }
NYX 0:85b3fd62ea1a 2995 #if defined (DFSDM2_Channel0)
NYX 0:85b3fd62ea1a 2996 /* Check if short circuit detection occurs */
NYX 0:85b3fd62ea1a 2997 else if((hdfsdm_filter->Instance == DFSDM2_Filter0) && \
NYX 0:85b3fd62ea1a 2998 ((hdfsdm_filter->Instance->FLTISR & DFSDM_FLTISR_SCDF) != 0U) && \
NYX 0:85b3fd62ea1a 2999 ((hdfsdm_filter->Instance->FLTCR2 & DFSDM_FLTCR2_SCDIE) != 0U))
NYX 0:85b3fd62ea1a 3000 {
NYX 0:85b3fd62ea1a 3001 uint32_t reg = 0U;
NYX 0:85b3fd62ea1a 3002 uint32_t channel = 0U;
NYX 0:85b3fd62ea1a 3003
NYX 0:85b3fd62ea1a 3004 /* Get channel */
NYX 0:85b3fd62ea1a 3005 reg = ((hdfsdm_filter->Instance->FLTISR & DFSDM_FLTISR_SCDF) >> DFSDM_FLTISR_SCDF_OFFSET);
NYX 0:85b3fd62ea1a 3006 while((reg & 1U) == 0U)
NYX 0:85b3fd62ea1a 3007 {
NYX 0:85b3fd62ea1a 3008 channel++;
NYX 0:85b3fd62ea1a 3009 reg = reg >> 1U;
NYX 0:85b3fd62ea1a 3010 }
NYX 0:85b3fd62ea1a 3011
NYX 0:85b3fd62ea1a 3012 /* Clear short circuit detection flag */
NYX 0:85b3fd62ea1a 3013 hdfsdm_filter->Instance->FLTICR = (1U << (DFSDM_FLTICR_CLRSCDF_OFFSET + channel));
NYX 0:85b3fd62ea1a 3014
NYX 0:85b3fd62ea1a 3015 /* Call short circuit detection callback */
NYX 0:85b3fd62ea1a 3016 HAL_DFSDM_ChannelScdCallback(a_dfsdm2ChannelHandle[channel]);
NYX 0:85b3fd62ea1a 3017 }
NYX 0:85b3fd62ea1a 3018 #endif /* DFSDM2_Channel0 */
NYX 0:85b3fd62ea1a 3019 }
NYX 0:85b3fd62ea1a 3020
NYX 0:85b3fd62ea1a 3021 /**
NYX 0:85b3fd62ea1a 3022 * @brief Regular conversion complete callback.
NYX 0:85b3fd62ea1a 3023 * @note In interrupt mode, user has to read conversion value in this function
NYX 0:85b3fd62ea1a 3024 * using HAL_DFSDM_FilterGetRegularValue.
NYX 0:85b3fd62ea1a 3025 * @param hdfsdm_filter : DFSDM filter handle.
NYX 0:85b3fd62ea1a 3026 * @retval None
NYX 0:85b3fd62ea1a 3027 */
NYX 0:85b3fd62ea1a 3028 __weak void HAL_DFSDM_FilterRegConvCpltCallback(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
NYX 0:85b3fd62ea1a 3029 {
NYX 0:85b3fd62ea1a 3030 /* Prevent unused argument(s) compilation warning */
NYX 0:85b3fd62ea1a 3031 UNUSED(hdfsdm_filter);
NYX 0:85b3fd62ea1a 3032 /* NOTE : This function should not be modified, when the callback is needed,
NYX 0:85b3fd62ea1a 3033 the HAL_DFSDM_FilterRegConvCpltCallback could be implemented in the user file.
NYX 0:85b3fd62ea1a 3034 */
NYX 0:85b3fd62ea1a 3035 }
NYX 0:85b3fd62ea1a 3036
NYX 0:85b3fd62ea1a 3037 /**
NYX 0:85b3fd62ea1a 3038 * @brief Half regular conversion complete callback.
NYX 0:85b3fd62ea1a 3039 * @param hdfsdm_filter : DFSDM filter handle.
NYX 0:85b3fd62ea1a 3040 * @retval None
NYX 0:85b3fd62ea1a 3041 */
NYX 0:85b3fd62ea1a 3042 __weak void HAL_DFSDM_FilterRegConvHalfCpltCallback(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
NYX 0:85b3fd62ea1a 3043 {
NYX 0:85b3fd62ea1a 3044 /* Prevent unused argument(s) compilation warning */
NYX 0:85b3fd62ea1a 3045 UNUSED(hdfsdm_filter);
NYX 0:85b3fd62ea1a 3046 /* NOTE : This function should not be modified, when the callback is needed,
NYX 0:85b3fd62ea1a 3047 the HAL_DFSDM_FilterRegConvHalfCpltCallback could be implemented in the user file.
NYX 0:85b3fd62ea1a 3048 */
NYX 0:85b3fd62ea1a 3049 }
NYX 0:85b3fd62ea1a 3050
NYX 0:85b3fd62ea1a 3051 /**
NYX 0:85b3fd62ea1a 3052 * @brief Injected conversion complete callback.
NYX 0:85b3fd62ea1a 3053 * @note In interrupt mode, user has to read conversion value in this function
NYX 0:85b3fd62ea1a 3054 * using HAL_DFSDM_FilterGetInjectedValue.
NYX 0:85b3fd62ea1a 3055 * @param hdfsdm_filter : DFSDM filter handle.
NYX 0:85b3fd62ea1a 3056 * @retval None
NYX 0:85b3fd62ea1a 3057 */
NYX 0:85b3fd62ea1a 3058 __weak void HAL_DFSDM_FilterInjConvCpltCallback(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
NYX 0:85b3fd62ea1a 3059 {
NYX 0:85b3fd62ea1a 3060 /* Prevent unused argument(s) compilation warning */
NYX 0:85b3fd62ea1a 3061 UNUSED(hdfsdm_filter);
NYX 0:85b3fd62ea1a 3062 /* NOTE : This function should not be modified, when the callback is needed,
NYX 0:85b3fd62ea1a 3063 the HAL_DFSDM_FilterInjConvCpltCallback could be implemented in the user file.
NYX 0:85b3fd62ea1a 3064 */
NYX 0:85b3fd62ea1a 3065 }
NYX 0:85b3fd62ea1a 3066
NYX 0:85b3fd62ea1a 3067 /**
NYX 0:85b3fd62ea1a 3068 * @brief Half injected conversion complete callback.
NYX 0:85b3fd62ea1a 3069 * @param hdfsdm_filter : DFSDM filter handle.
NYX 0:85b3fd62ea1a 3070 * @retval None
NYX 0:85b3fd62ea1a 3071 */
NYX 0:85b3fd62ea1a 3072 __weak void HAL_DFSDM_FilterInjConvHalfCpltCallback(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
NYX 0:85b3fd62ea1a 3073 {
NYX 0:85b3fd62ea1a 3074 /* Prevent unused argument(s) compilation warning */
NYX 0:85b3fd62ea1a 3075 UNUSED(hdfsdm_filter);
NYX 0:85b3fd62ea1a 3076 /* NOTE : This function should not be modified, when the callback is needed,
NYX 0:85b3fd62ea1a 3077 the HAL_DFSDM_FilterInjConvHalfCpltCallback could be implemented in the user file.
NYX 0:85b3fd62ea1a 3078 */
NYX 0:85b3fd62ea1a 3079 }
NYX 0:85b3fd62ea1a 3080
NYX 0:85b3fd62ea1a 3081 /**
NYX 0:85b3fd62ea1a 3082 * @brief Filter analog watchdog callback.
NYX 0:85b3fd62ea1a 3083 * @param hdfsdm_filter : DFSDM filter handle.
NYX 0:85b3fd62ea1a 3084 * @param Channel : Corresponding channel.
NYX 0:85b3fd62ea1a 3085 * @param Threshold : Low or high threshold has been reached.
NYX 0:85b3fd62ea1a 3086 * @retval None
NYX 0:85b3fd62ea1a 3087 */
NYX 0:85b3fd62ea1a 3088 __weak void HAL_DFSDM_FilterAwdCallback(DFSDM_Filter_HandleTypeDef *hdfsdm_filter,
NYX 0:85b3fd62ea1a 3089 uint32_t Channel, uint32_t Threshold)
NYX 0:85b3fd62ea1a 3090 {
NYX 0:85b3fd62ea1a 3091 /* Prevent unused argument(s) compilation warning */
NYX 0:85b3fd62ea1a 3092 UNUSED(hdfsdm_filter);
NYX 0:85b3fd62ea1a 3093 UNUSED(Channel);
NYX 0:85b3fd62ea1a 3094 UNUSED(Threshold);
NYX 0:85b3fd62ea1a 3095
NYX 0:85b3fd62ea1a 3096 /* NOTE : This function should not be modified, when the callback is needed,
NYX 0:85b3fd62ea1a 3097 the HAL_DFSDM_FilterAwdCallback could be implemented in the user file.
NYX 0:85b3fd62ea1a 3098 */
NYX 0:85b3fd62ea1a 3099 }
NYX 0:85b3fd62ea1a 3100
NYX 0:85b3fd62ea1a 3101 /**
NYX 0:85b3fd62ea1a 3102 * @brief Error callback.
NYX 0:85b3fd62ea1a 3103 * @param hdfsdm_filter : DFSDM filter handle.
NYX 0:85b3fd62ea1a 3104 * @retval None
NYX 0:85b3fd62ea1a 3105 */
NYX 0:85b3fd62ea1a 3106 __weak void HAL_DFSDM_FilterErrorCallback(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
NYX 0:85b3fd62ea1a 3107 {
NYX 0:85b3fd62ea1a 3108 /* Prevent unused argument(s) compilation warning */
NYX 0:85b3fd62ea1a 3109 UNUSED(hdfsdm_filter);
NYX 0:85b3fd62ea1a 3110 /* NOTE : This function should not be modified, when the callback is needed,
NYX 0:85b3fd62ea1a 3111 the HAL_DFSDM_FilterErrorCallback could be implemented in the user file.
NYX 0:85b3fd62ea1a 3112 */
NYX 0:85b3fd62ea1a 3113 }
NYX 0:85b3fd62ea1a 3114
NYX 0:85b3fd62ea1a 3115 /**
NYX 0:85b3fd62ea1a 3116 * @}
NYX 0:85b3fd62ea1a 3117 */
NYX 0:85b3fd62ea1a 3118
NYX 0:85b3fd62ea1a 3119 /** @defgroup DFSDM_Exported_Functions_Group4_Filter Filter state functions
NYX 0:85b3fd62ea1a 3120 * @brief Filter state functions
NYX 0:85b3fd62ea1a 3121 *
NYX 0:85b3fd62ea1a 3122 @verbatim
NYX 0:85b3fd62ea1a 3123 ==============================================================================
NYX 0:85b3fd62ea1a 3124 ##### Filter state functions #####
NYX 0:85b3fd62ea1a 3125 ==============================================================================
NYX 0:85b3fd62ea1a 3126 [..] This section provides functions allowing to:
NYX 0:85b3fd62ea1a 3127 (+) Get the DFSDM filter state.
NYX 0:85b3fd62ea1a 3128 (+) Get the DFSDM filter error.
NYX 0:85b3fd62ea1a 3129 @endverbatim
NYX 0:85b3fd62ea1a 3130 * @{
NYX 0:85b3fd62ea1a 3131 */
NYX 0:85b3fd62ea1a 3132
NYX 0:85b3fd62ea1a 3133 /**
NYX 0:85b3fd62ea1a 3134 * @brief This function allows to get the current DFSDM filter handle state.
NYX 0:85b3fd62ea1a 3135 * @param hdfsdm_filter : DFSDM filter handle.
NYX 0:85b3fd62ea1a 3136 * @retval DFSDM filter state.
NYX 0:85b3fd62ea1a 3137 */
NYX 0:85b3fd62ea1a 3138 HAL_DFSDM_Filter_StateTypeDef HAL_DFSDM_FilterGetState(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
NYX 0:85b3fd62ea1a 3139 {
NYX 0:85b3fd62ea1a 3140 /* Return DFSDM filter handle state */
NYX 0:85b3fd62ea1a 3141 return hdfsdm_filter->State;
NYX 0:85b3fd62ea1a 3142 }
NYX 0:85b3fd62ea1a 3143
NYX 0:85b3fd62ea1a 3144 /**
NYX 0:85b3fd62ea1a 3145 * @brief This function allows to get the current DFSDM filter error.
NYX 0:85b3fd62ea1a 3146 * @param hdfsdm_filter : DFSDM filter handle.
NYX 0:85b3fd62ea1a 3147 * @retval DFSDM filter error code.
NYX 0:85b3fd62ea1a 3148 */
NYX 0:85b3fd62ea1a 3149 uint32_t HAL_DFSDM_FilterGetError(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
NYX 0:85b3fd62ea1a 3150 {
NYX 0:85b3fd62ea1a 3151 return hdfsdm_filter->ErrorCode;
NYX 0:85b3fd62ea1a 3152 }
NYX 0:85b3fd62ea1a 3153
NYX 0:85b3fd62ea1a 3154 /**
NYX 0:85b3fd62ea1a 3155 * @}
NYX 0:85b3fd62ea1a 3156 */
NYX 0:85b3fd62ea1a 3157
NYX 0:85b3fd62ea1a 3158 /** @defgroup DFSDM_Exported_Functions_Group5_Filter MultiChannel operation functions
NYX 0:85b3fd62ea1a 3159 * @brief Filter state functions
NYX 0:85b3fd62ea1a 3160 *
NYX 0:85b3fd62ea1a 3161 @verbatim
NYX 0:85b3fd62ea1a 3162 ==============================================================================
NYX 0:85b3fd62ea1a 3163 ##### Filter MultiChannel operation functions #####
NYX 0:85b3fd62ea1a 3164 ==============================================================================
NYX 0:85b3fd62ea1a 3165 [..] This section provides functions allowing to:
NYX 0:85b3fd62ea1a 3166 (+) Control the DFSDM Multi channel delay block
NYX 0:85b3fd62ea1a 3167 @endverbatim
NYX 0:85b3fd62ea1a 3168 * @{
NYX 0:85b3fd62ea1a 3169 */
NYX 0:85b3fd62ea1a 3170 #if defined(SYSCFG_MCHDLYCR_BSCKSEL)
NYX 0:85b3fd62ea1a 3171 /**
NYX 0:85b3fd62ea1a 3172 * @brief Select the DFSDM2 as clock source for the bitstream clock.
NYX 0:85b3fd62ea1a 3173 * @note The SYSCFG clock marco __HAL_RCC_SYSCFG_CLK_ENABLE() must be called
NYX 0:85b3fd62ea1a 3174 * before HAL_DFSDM_BitstreamClock_Start()
NYX 0:85b3fd62ea1a 3175 */
NYX 0:85b3fd62ea1a 3176 void HAL_DFSDM_BitstreamClock_Start(void)
NYX 0:85b3fd62ea1a 3177 {
NYX 0:85b3fd62ea1a 3178 uint32_t tmp = 0;
NYX 0:85b3fd62ea1a 3179
NYX 0:85b3fd62ea1a 3180 tmp = SYSCFG->MCHDLYCR;
NYX 0:85b3fd62ea1a 3181 tmp = (tmp &(~SYSCFG_MCHDLYCR_BSCKSEL));
NYX 0:85b3fd62ea1a 3182
NYX 0:85b3fd62ea1a 3183 SYSCFG->MCHDLYCR = (tmp|SYSCFG_MCHDLYCR_BSCKSEL);
NYX 0:85b3fd62ea1a 3184 }
NYX 0:85b3fd62ea1a 3185
NYX 0:85b3fd62ea1a 3186 /**
NYX 0:85b3fd62ea1a 3187 * @brief Stop the DFSDM2 as clock source for the bitstream clock.
NYX 0:85b3fd62ea1a 3188 * @note The SYSCFG clock marco __HAL_RCC_SYSCFG_CLK_ENABLE() must be called
NYX 0:85b3fd62ea1a 3189 * before HAL_DFSDM_BitstreamClock_Stop()
NYX 0:85b3fd62ea1a 3190 * @retval None
NYX 0:85b3fd62ea1a 3191 */
NYX 0:85b3fd62ea1a 3192 void HAL_DFSDM_BitstreamClock_Stop(void)
NYX 0:85b3fd62ea1a 3193 {
NYX 0:85b3fd62ea1a 3194 uint32_t tmp = 0U;
NYX 0:85b3fd62ea1a 3195
NYX 0:85b3fd62ea1a 3196 tmp = SYSCFG->MCHDLYCR;
NYX 0:85b3fd62ea1a 3197 tmp = (tmp &(~SYSCFG_MCHDLYCR_BSCKSEL));
NYX 0:85b3fd62ea1a 3198
NYX 0:85b3fd62ea1a 3199 SYSCFG->MCHDLYCR = tmp;
NYX 0:85b3fd62ea1a 3200 }
NYX 0:85b3fd62ea1a 3201
NYX 0:85b3fd62ea1a 3202 /**
NYX 0:85b3fd62ea1a 3203 * @brief Disable Delay Clock for DFSDM1/2.
NYX 0:85b3fd62ea1a 3204 * @param MCHDLY: HAL_MCHDLY_CLOCK_DFSDM2.
NYX 0:85b3fd62ea1a 3205 * HAL_MCHDLY_CLOCK_DFSDM1.
NYX 0:85b3fd62ea1a 3206 * @note The SYSCFG clock marco __HAL_RCC_SYSCFG_CLK_ENABLE() must be called
NYX 0:85b3fd62ea1a 3207 * before HAL_DFSDM_DisableDelayClock()
NYX 0:85b3fd62ea1a 3208 * @retval None
NYX 0:85b3fd62ea1a 3209 */
NYX 0:85b3fd62ea1a 3210 void HAL_DFSDM_DisableDelayClock(uint32_t MCHDLY)
NYX 0:85b3fd62ea1a 3211 {
NYX 0:85b3fd62ea1a 3212 uint32_t tmp = 0U;
NYX 0:85b3fd62ea1a 3213
NYX 0:85b3fd62ea1a 3214 assert_param(IS_DFSDM_DELAY_CLOCK(MCHDLY));
NYX 0:85b3fd62ea1a 3215
NYX 0:85b3fd62ea1a 3216 tmp = SYSCFG->MCHDLYCR;
NYX 0:85b3fd62ea1a 3217 if(MCHDLY == HAL_MCHDLY_CLOCK_DFSDM2)
NYX 0:85b3fd62ea1a 3218 {
NYX 0:85b3fd62ea1a 3219 tmp = tmp &(~SYSCFG_MCHDLYCR_MCHDLY2EN);
NYX 0:85b3fd62ea1a 3220 }
NYX 0:85b3fd62ea1a 3221 else
NYX 0:85b3fd62ea1a 3222 {
NYX 0:85b3fd62ea1a 3223 tmp = tmp &(~SYSCFG_MCHDLYCR_MCHDLY1EN);
NYX 0:85b3fd62ea1a 3224 }
NYX 0:85b3fd62ea1a 3225
NYX 0:85b3fd62ea1a 3226 SYSCFG->MCHDLYCR = tmp;
NYX 0:85b3fd62ea1a 3227 }
NYX 0:85b3fd62ea1a 3228
NYX 0:85b3fd62ea1a 3229 /**
NYX 0:85b3fd62ea1a 3230 * @brief Enable Delay Clock for DFSDM1/2.
NYX 0:85b3fd62ea1a 3231 * @param MCHDLY: HAL_MCHDLY_CLOCK_DFSDM2.
NYX 0:85b3fd62ea1a 3232 * HAL_MCHDLY_CLOCK_DFSDM1.
NYX 0:85b3fd62ea1a 3233 * @note The SYSCFG clock marco __HAL_RCC_SYSCFG_CLK_ENABLE() must be called
NYX 0:85b3fd62ea1a 3234 * before HAL_DFSDM_EnableDelayClock()
NYX 0:85b3fd62ea1a 3235 * @retval None
NYX 0:85b3fd62ea1a 3236 */
NYX 0:85b3fd62ea1a 3237 void HAL_DFSDM_EnableDelayClock(uint32_t MCHDLY)
NYX 0:85b3fd62ea1a 3238 {
NYX 0:85b3fd62ea1a 3239 uint32_t tmp = 0U;
NYX 0:85b3fd62ea1a 3240
NYX 0:85b3fd62ea1a 3241 assert_param(IS_DFSDM_DELAY_CLOCK(MCHDLY));
NYX 0:85b3fd62ea1a 3242
NYX 0:85b3fd62ea1a 3243 tmp = SYSCFG->MCHDLYCR;
NYX 0:85b3fd62ea1a 3244 tmp = tmp & ~MCHDLY;
NYX 0:85b3fd62ea1a 3245
NYX 0:85b3fd62ea1a 3246 SYSCFG->MCHDLYCR = (tmp|MCHDLY);
NYX 0:85b3fd62ea1a 3247 }
NYX 0:85b3fd62ea1a 3248
NYX 0:85b3fd62ea1a 3249 /**
NYX 0:85b3fd62ea1a 3250 * @brief Select the source for CKin signals for DFSDM1/2.
NYX 0:85b3fd62ea1a 3251 * @param source: DFSDM2_CKIN_PAD.
NYX 0:85b3fd62ea1a 3252 * DFSDM2_CKIN_DM.
NYX 0:85b3fd62ea1a 3253 * DFSDM1_CKIN_PAD.
NYX 0:85b3fd62ea1a 3254 * DFSDM1_CKIN_DM.
NYX 0:85b3fd62ea1a 3255 * @retval None
NYX 0:85b3fd62ea1a 3256 */
NYX 0:85b3fd62ea1a 3257 void HAL_DFSDM_ClockIn_SourceSelection(uint32_t source)
NYX 0:85b3fd62ea1a 3258 {
NYX 0:85b3fd62ea1a 3259 uint32_t tmp = 0U;
NYX 0:85b3fd62ea1a 3260
NYX 0:85b3fd62ea1a 3261 assert_param(IS_DFSDM_CLOCKIN_SELECTION(source));
NYX 0:85b3fd62ea1a 3262
NYX 0:85b3fd62ea1a 3263 tmp = SYSCFG->MCHDLYCR;
NYX 0:85b3fd62ea1a 3264
NYX 0:85b3fd62ea1a 3265 if((source == HAL_DFSDM2_CKIN_PAD) || (source == HAL_DFSDM2_CKIN_DM))
NYX 0:85b3fd62ea1a 3266 {
NYX 0:85b3fd62ea1a 3267 tmp = (tmp & ~SYSCFG_MCHDLYCR_DFSDM2CFG);
NYX 0:85b3fd62ea1a 3268
NYX 0:85b3fd62ea1a 3269 if(source == HAL_DFSDM2_CKIN_PAD)
NYX 0:85b3fd62ea1a 3270 {
NYX 0:85b3fd62ea1a 3271 source = 0x000000U;
NYX 0:85b3fd62ea1a 3272 }
NYX 0:85b3fd62ea1a 3273 }
NYX 0:85b3fd62ea1a 3274 else
NYX 0:85b3fd62ea1a 3275 {
NYX 0:85b3fd62ea1a 3276 tmp = (tmp & ~SYSCFG_MCHDLYCR_DFSDM1CFG);
NYX 0:85b3fd62ea1a 3277 }
NYX 0:85b3fd62ea1a 3278
NYX 0:85b3fd62ea1a 3279 SYSCFG->MCHDLYCR = (source|tmp);
NYX 0:85b3fd62ea1a 3280 }
NYX 0:85b3fd62ea1a 3281
NYX 0:85b3fd62ea1a 3282 /**
NYX 0:85b3fd62ea1a 3283 * @brief Select the source for CKOut signals for DFSDM1/2.
NYX 0:85b3fd62ea1a 3284 * @param source: DFSDM2_CKOUT_DFSDM2.
NYX 0:85b3fd62ea1a 3285 * DFSDM2_CKOUT_M27.
NYX 0:85b3fd62ea1a 3286 * DFSDM1_CKOUT_DFSDM1.
NYX 0:85b3fd62ea1a 3287 * DFSDM1_CKOUT_M27.
NYX 0:85b3fd62ea1a 3288 * @retval None
NYX 0:85b3fd62ea1a 3289 */
NYX 0:85b3fd62ea1a 3290 void HAL_DFSDM_ClockOut_SourceSelection(uint32_t source)
NYX 0:85b3fd62ea1a 3291 {
NYX 0:85b3fd62ea1a 3292 uint32_t tmp = 0U;
NYX 0:85b3fd62ea1a 3293
NYX 0:85b3fd62ea1a 3294 assert_param(IS_DFSDM_CLOCKOUT_SELECTION(source));
NYX 0:85b3fd62ea1a 3295
NYX 0:85b3fd62ea1a 3296 tmp = SYSCFG->MCHDLYCR;
NYX 0:85b3fd62ea1a 3297
NYX 0:85b3fd62ea1a 3298 if((source == HAL_DFSDM2_CKOUT_DFSDM2) || (source == HAL_DFSDM2_CKOUT_M27))
NYX 0:85b3fd62ea1a 3299 {
NYX 0:85b3fd62ea1a 3300 tmp = (tmp & ~SYSCFG_MCHDLYCR_DFSDM2CKOSEL);
NYX 0:85b3fd62ea1a 3301
NYX 0:85b3fd62ea1a 3302 if(source == HAL_DFSDM2_CKOUT_DFSDM2)
NYX 0:85b3fd62ea1a 3303 {
NYX 0:85b3fd62ea1a 3304 source = 0x000U;
NYX 0:85b3fd62ea1a 3305 }
NYX 0:85b3fd62ea1a 3306 }
NYX 0:85b3fd62ea1a 3307 else
NYX 0:85b3fd62ea1a 3308 {
NYX 0:85b3fd62ea1a 3309 tmp = (tmp & ~SYSCFG_MCHDLYCR_DFSDM1CKOSEL);
NYX 0:85b3fd62ea1a 3310 }
NYX 0:85b3fd62ea1a 3311
NYX 0:85b3fd62ea1a 3312 SYSCFG->MCHDLYCR = (source|tmp);
NYX 0:85b3fd62ea1a 3313 }
NYX 0:85b3fd62ea1a 3314
NYX 0:85b3fd62ea1a 3315 /**
NYX 0:85b3fd62ea1a 3316 * @brief Select the source for DataIn0 signals for DFSDM1/2.
NYX 0:85b3fd62ea1a 3317 * @param source: DATAIN0_DFSDM2_PAD.
NYX 0:85b3fd62ea1a 3318 * DATAIN0_DFSDM2_DATAIN1.
NYX 0:85b3fd62ea1a 3319 * DATAIN0_DFSDM1_PAD.
NYX 0:85b3fd62ea1a 3320 * DATAIN0_DFSDM1_DATAIN1.
NYX 0:85b3fd62ea1a 3321 * @retval None
NYX 0:85b3fd62ea1a 3322 */
NYX 0:85b3fd62ea1a 3323 void HAL_DFSDM_DataIn0_SourceSelection(uint32_t source)
NYX 0:85b3fd62ea1a 3324 {
NYX 0:85b3fd62ea1a 3325 uint32_t tmp = 0U;
NYX 0:85b3fd62ea1a 3326
NYX 0:85b3fd62ea1a 3327 assert_param(IS_DFSDM_DATAIN0_SRC_SELECTION(source));
NYX 0:85b3fd62ea1a 3328
NYX 0:85b3fd62ea1a 3329 tmp = SYSCFG->MCHDLYCR;
NYX 0:85b3fd62ea1a 3330
NYX 0:85b3fd62ea1a 3331 if((source == HAL_DATAIN0_DFSDM2_PAD)|| (source == HAL_DATAIN0_DFSDM2_DATAIN1))
NYX 0:85b3fd62ea1a 3332 {
NYX 0:85b3fd62ea1a 3333 tmp = (tmp & ~SYSCFG_MCHDLYCR_DFSDM2D0SEL);
NYX 0:85b3fd62ea1a 3334 if(source == HAL_DATAIN0_DFSDM2_PAD)
NYX 0:85b3fd62ea1a 3335 {
NYX 0:85b3fd62ea1a 3336 source = 0x00000U;
NYX 0:85b3fd62ea1a 3337 }
NYX 0:85b3fd62ea1a 3338 }
NYX 0:85b3fd62ea1a 3339 else
NYX 0:85b3fd62ea1a 3340 {
NYX 0:85b3fd62ea1a 3341 tmp = (tmp & ~SYSCFG_MCHDLYCR_DFSDM1D0SEL);
NYX 0:85b3fd62ea1a 3342 }
NYX 0:85b3fd62ea1a 3343 SYSCFG->MCHDLYCR = (source|tmp);
NYX 0:85b3fd62ea1a 3344 }
NYX 0:85b3fd62ea1a 3345
NYX 0:85b3fd62ea1a 3346 /**
NYX 0:85b3fd62ea1a 3347 * @brief Select the source for DataIn2 signals for DFSDM1/2.
NYX 0:85b3fd62ea1a 3348 * @param source: DATAIN2_DFSDM2_PAD.
NYX 0:85b3fd62ea1a 3349 * DATAIN2_DFSDM2_DATAIN3.
NYX 0:85b3fd62ea1a 3350 * DATAIN2_DFSDM1_PAD.
NYX 0:85b3fd62ea1a 3351 * DATAIN2_DFSDM1_DATAIN3.
NYX 0:85b3fd62ea1a 3352 * @retval None
NYX 0:85b3fd62ea1a 3353 */
NYX 0:85b3fd62ea1a 3354 void HAL_DFSDM_DataIn2_SourceSelection(uint32_t source)
NYX 0:85b3fd62ea1a 3355 {
NYX 0:85b3fd62ea1a 3356 uint32_t tmp = 0U;
NYX 0:85b3fd62ea1a 3357
NYX 0:85b3fd62ea1a 3358 assert_param(IS_DFSDM_DATAIN2_SRC_SELECTION(source));
NYX 0:85b3fd62ea1a 3359
NYX 0:85b3fd62ea1a 3360 tmp = SYSCFG->MCHDLYCR;
NYX 0:85b3fd62ea1a 3361
NYX 0:85b3fd62ea1a 3362 if((source == HAL_DATAIN2_DFSDM2_PAD)|| (source == HAL_DATAIN2_DFSDM2_DATAIN3))
NYX 0:85b3fd62ea1a 3363 {
NYX 0:85b3fd62ea1a 3364 tmp = (tmp & ~SYSCFG_MCHDLYCR_DFSDM2D2SEL);
NYX 0:85b3fd62ea1a 3365 if (source == HAL_DATAIN2_DFSDM2_PAD)
NYX 0:85b3fd62ea1a 3366 {
NYX 0:85b3fd62ea1a 3367 source = 0x0000U;
NYX 0:85b3fd62ea1a 3368 }
NYX 0:85b3fd62ea1a 3369 }
NYX 0:85b3fd62ea1a 3370 else
NYX 0:85b3fd62ea1a 3371 {
NYX 0:85b3fd62ea1a 3372 tmp = (tmp & ~SYSCFG_MCHDLYCR_DFSDM1D2SEL);
NYX 0:85b3fd62ea1a 3373 }
NYX 0:85b3fd62ea1a 3374 SYSCFG->MCHDLYCR = (source|tmp);
NYX 0:85b3fd62ea1a 3375 }
NYX 0:85b3fd62ea1a 3376
NYX 0:85b3fd62ea1a 3377 /**
NYX 0:85b3fd62ea1a 3378 * @brief Select the source for DataIn4 signals for DFSDM2.
NYX 0:85b3fd62ea1a 3379 * @param source: DATAIN4_DFSDM2_PAD.
NYX 0:85b3fd62ea1a 3380 * DATAIN4_DFSDM2_DATAIN5
NYX 0:85b3fd62ea1a 3381 * @retval None
NYX 0:85b3fd62ea1a 3382 */
NYX 0:85b3fd62ea1a 3383 void HAL_DFSDM_DataIn4_SourceSelection(uint32_t source)
NYX 0:85b3fd62ea1a 3384 {
NYX 0:85b3fd62ea1a 3385 uint32_t tmp = 0U;
NYX 0:85b3fd62ea1a 3386
NYX 0:85b3fd62ea1a 3387 assert_param(IS_DFSDM_DATAIN4_SRC_SELECTION(source));
NYX 0:85b3fd62ea1a 3388
NYX 0:85b3fd62ea1a 3389 tmp = SYSCFG->MCHDLYCR;
NYX 0:85b3fd62ea1a 3390 tmp = (tmp & ~SYSCFG_MCHDLYCR_DFSDM2D4SEL);
NYX 0:85b3fd62ea1a 3391
NYX 0:85b3fd62ea1a 3392 SYSCFG->MCHDLYCR = (source|tmp);
NYX 0:85b3fd62ea1a 3393 }
NYX 0:85b3fd62ea1a 3394
NYX 0:85b3fd62ea1a 3395 /**
NYX 0:85b3fd62ea1a 3396 * @brief Select the source for DataIn6 signals for DFSDM2.
NYX 0:85b3fd62ea1a 3397 * @param source: DATAIN6_DFSDM2_PAD.
NYX 0:85b3fd62ea1a 3398 * DATAIN6_DFSDM2_DATAIN7.
NYX 0:85b3fd62ea1a 3399 * @retval None
NYX 0:85b3fd62ea1a 3400 */
NYX 0:85b3fd62ea1a 3401 void HAL_DFSDM_DataIn6_SourceSelection(uint32_t source)
NYX 0:85b3fd62ea1a 3402 {
NYX 0:85b3fd62ea1a 3403 uint32_t tmp = 0U;
NYX 0:85b3fd62ea1a 3404
NYX 0:85b3fd62ea1a 3405 assert_param(IS_DFSDM_DATAIN6_SRC_SELECTION(source));
NYX 0:85b3fd62ea1a 3406
NYX 0:85b3fd62ea1a 3407 tmp = SYSCFG->MCHDLYCR;
NYX 0:85b3fd62ea1a 3408
NYX 0:85b3fd62ea1a 3409 tmp = (tmp & ~SYSCFG_MCHDLYCR_DFSDM2D6SEL);
NYX 0:85b3fd62ea1a 3410
NYX 0:85b3fd62ea1a 3411 SYSCFG->MCHDLYCR = (source|tmp);
NYX 0:85b3fd62ea1a 3412 }
NYX 0:85b3fd62ea1a 3413
NYX 0:85b3fd62ea1a 3414 /**
NYX 0:85b3fd62ea1a 3415 * @brief Configure the distribution of the bitstream clock gated from TIM4_OC
NYX 0:85b3fd62ea1a 3416 * for DFSDM1 or TIM3_OC for DFSDM2
NYX 0:85b3fd62ea1a 3417 * @param source: DFSDM1_CLKIN0_TIM4OC2
NYX 0:85b3fd62ea1a 3418 * DFSDM1_CLKIN2_TIM4OC2
NYX 0:85b3fd62ea1a 3419 * DFSDM1_CLKIN1_TIM4OC1
NYX 0:85b3fd62ea1a 3420 * DFSDM1_CLKIN3_TIM4OC1
NYX 0:85b3fd62ea1a 3421 * DFSDM2_CLKIN0_TIM3OC4
NYX 0:85b3fd62ea1a 3422 * DFSDM2_CLKIN4_TIM3OC4
NYX 0:85b3fd62ea1a 3423 * DFSDM2_CLKIN1_TIM3OC3
NYX 0:85b3fd62ea1a 3424 * DFSDM2_CLKIN5_TIM3OC3
NYX 0:85b3fd62ea1a 3425 * DFSDM2_CLKIN2_TIM3OC2
NYX 0:85b3fd62ea1a 3426 * DFSDM2_CLKIN6_TIM3OC2
NYX 0:85b3fd62ea1a 3427 * DFSDM2_CLKIN3_TIM3OC1
NYX 0:85b3fd62ea1a 3428 * DFSDM2_CLKIN7_TIM3OC1
NYX 0:85b3fd62ea1a 3429 * @retval None
NYX 0:85b3fd62ea1a 3430 */
NYX 0:85b3fd62ea1a 3431 void HAL_DFSDM_BitStreamClkDistribution_Config(uint32_t source)
NYX 0:85b3fd62ea1a 3432 {
NYX 0:85b3fd62ea1a 3433 uint32_t tmp = 0U;
NYX 0:85b3fd62ea1a 3434
NYX 0:85b3fd62ea1a 3435 assert_param(IS_DFSDM_BITSTREM_CLK_DISTRIBUTION(source));
NYX 0:85b3fd62ea1a 3436
NYX 0:85b3fd62ea1a 3437 tmp = SYSCFG->MCHDLYCR;
NYX 0:85b3fd62ea1a 3438
NYX 0:85b3fd62ea1a 3439 if ((source == HAL_DFSDM1_CLKIN0_TIM4OC2) || (source == HAL_DFSDM1_CLKIN2_TIM4OC2))
NYX 0:85b3fd62ea1a 3440 {
NYX 0:85b3fd62ea1a 3441 tmp = (tmp & ~SYSCFG_MCHDLYCR_DFSDM1CK02SEL);
NYX 0:85b3fd62ea1a 3442 }
NYX 0:85b3fd62ea1a 3443 else if ((source == HAL_DFSDM1_CLKIN1_TIM4OC1) || (source == HAL_DFSDM1_CLKIN3_TIM4OC1))
NYX 0:85b3fd62ea1a 3444 {
NYX 0:85b3fd62ea1a 3445 tmp = (tmp & ~SYSCFG_MCHDLYCR_DFSDM1CK13SEL);
NYX 0:85b3fd62ea1a 3446 }
NYX 0:85b3fd62ea1a 3447 else if ((source == HAL_DFSDM2_CLKIN0_TIM3OC4) || (source == HAL_DFSDM2_CLKIN4_TIM3OC4))
NYX 0:85b3fd62ea1a 3448 {
NYX 0:85b3fd62ea1a 3449 tmp = (tmp & ~SYSCFG_MCHDLYCR_DFSDM2CK04SEL);
NYX 0:85b3fd62ea1a 3450 }
NYX 0:85b3fd62ea1a 3451 else if ((source == HAL_DFSDM2_CLKIN1_TIM3OC3) || (source == HAL_DFSDM2_CLKIN5_TIM3OC3))
NYX 0:85b3fd62ea1a 3452 {
NYX 0:85b3fd62ea1a 3453 tmp = (tmp & ~SYSCFG_MCHDLYCR_DFSDM2CK15SEL);
NYX 0:85b3fd62ea1a 3454
NYX 0:85b3fd62ea1a 3455 }else if ((source == HAL_DFSDM2_CLKIN2_TIM3OC2) || (source == HAL_DFSDM2_CLKIN6_TIM3OC2))
NYX 0:85b3fd62ea1a 3456 {
NYX 0:85b3fd62ea1a 3457 tmp = (tmp & ~SYSCFG_MCHDLYCR_DFSDM2CK26SEL);
NYX 0:85b3fd62ea1a 3458 }
NYX 0:85b3fd62ea1a 3459 else
NYX 0:85b3fd62ea1a 3460 {
NYX 0:85b3fd62ea1a 3461 tmp = (tmp & ~SYSCFG_MCHDLYCR_DFSDM2CK37SEL);
NYX 0:85b3fd62ea1a 3462 }
NYX 0:85b3fd62ea1a 3463
NYX 0:85b3fd62ea1a 3464 if((source == HAL_DFSDM1_CLKIN0_TIM4OC2) ||(source == HAL_DFSDM1_CLKIN1_TIM4OC1)||
NYX 0:85b3fd62ea1a 3465 (source == HAL_DFSDM2_CLKIN0_TIM3OC4) ||(source == HAL_DFSDM2_CLKIN1_TIM3OC3)||
NYX 0:85b3fd62ea1a 3466 (source == HAL_DFSDM2_CLKIN2_TIM3OC2) ||(source == HAL_DFSDM2_CLKIN3_TIM3OC1))
NYX 0:85b3fd62ea1a 3467 {
NYX 0:85b3fd62ea1a 3468 source = 0x0000U;
NYX 0:85b3fd62ea1a 3469 }
NYX 0:85b3fd62ea1a 3470
NYX 0:85b3fd62ea1a 3471 SYSCFG->MCHDLYCR = (source|tmp);
NYX 0:85b3fd62ea1a 3472 }
NYX 0:85b3fd62ea1a 3473
NYX 0:85b3fd62ea1a 3474 /**
NYX 0:85b3fd62ea1a 3475 * @brief Configure multi channel delay block: Use DFSDM2 audio clock source as input
NYX 0:85b3fd62ea1a 3476 * clock for DFSDM1 and DFSDM2 filters to Synchronize DFSDMx filters.
NYX 0:85b3fd62ea1a 3477 * Set the path of the DFSDM2 clock output (dfsdm2_ckout) to the
NYX 0:85b3fd62ea1a 3478 * DFSDM1/2 CkInx and data inputs channels by configuring following MCHDLY muxes
NYX 0:85b3fd62ea1a 3479 * or demuxes: M1, M2, M3, M4, M5, M6, M7, M8, DM1, DM2, DM3, DM4, DM5, DM6,
NYX 0:85b3fd62ea1a 3480 * M9, M10, M11, M12, M13, M14, M15, M16, M17, M18, M19, M20 based on the
NYX 0:85b3fd62ea1a 3481 * contains of the DFSDM_MultiChannelConfigTypeDef structure
NYX 0:85b3fd62ea1a 3482 * @param mchdlystruct: Structure of multi channel configuration
NYX 0:85b3fd62ea1a 3483 * @retval None
NYX 0:85b3fd62ea1a 3484 * @note The SYSCFG clock marco __HAL_RCC_SYSCFG_CLK_ENABLE() must be called
NYX 0:85b3fd62ea1a 3485 * before HAL_DFSDM_ConfigMultiChannelDelay()
NYX 0:85b3fd62ea1a 3486 * @note The HAL_DFSDM_ConfigMultiChannelDelay() function clears the SYSCFG-MCHDLYCR
NYX 0:85b3fd62ea1a 3487 * register before setting the new configuration.
NYX 0:85b3fd62ea1a 3488 */
NYX 0:85b3fd62ea1a 3489 void HAL_DFSDM_ConfigMultiChannelDelay(DFSDM_MultiChannelConfigTypeDef* mchdlystruct)
NYX 0:85b3fd62ea1a 3490 {
NYX 0:85b3fd62ea1a 3491 uint32_t mchdlyreg = 0U;
NYX 0:85b3fd62ea1a 3492
NYX 0:85b3fd62ea1a 3493 assert_param(IS_DFSDM_DFSDM1_CLKOUT(mchdlystruct->DFSDM1ClockOut));
NYX 0:85b3fd62ea1a 3494 assert_param(IS_DFSDM_DFSDM2_CLKOUT(mchdlystruct->DFSDM2ClockOut));
NYX 0:85b3fd62ea1a 3495 assert_param(IS_DFSDM_DFSDM1_CLKIN(mchdlystruct->DFSDM1ClockIn));
NYX 0:85b3fd62ea1a 3496 assert_param(IS_DFSDM_DFSDM2_CLKIN(mchdlystruct->DFSDM2ClockIn));
NYX 0:85b3fd62ea1a 3497 assert_param(IS_DFSDM_DFSDM1_BIT_CLK((mchdlystruct->DFSDM1BitClkDistribution)));
NYX 0:85b3fd62ea1a 3498 assert_param(IS_DFSDM_DFSDM2_BIT_CLK(mchdlystruct->DFSDM2BitClkDistribution));
NYX 0:85b3fd62ea1a 3499 assert_param(IS_DFSDM_DFSDM1_DATA_DISTRIBUTION(mchdlystruct->DFSDM1DataDistribution));
NYX 0:85b3fd62ea1a 3500 assert_param(IS_DFSDM_DFSDM2_DATA_DISTRIBUTION(mchdlystruct->DFSDM2DataDistribution));
NYX 0:85b3fd62ea1a 3501
NYX 0:85b3fd62ea1a 3502 mchdlyreg = (SYSCFG->MCHDLYCR & 0x80103U);
NYX 0:85b3fd62ea1a 3503
NYX 0:85b3fd62ea1a 3504 SYSCFG->MCHDLYCR = (mchdlyreg |(mchdlystruct->DFSDM1ClockOut)|(mchdlystruct->DFSDM2ClockOut)|
NYX 0:85b3fd62ea1a 3505 (mchdlystruct->DFSDM1ClockIn)|(mchdlystruct->DFSDM2ClockIn)|
NYX 0:85b3fd62ea1a 3506 (mchdlystruct->DFSDM1BitClkDistribution)| (mchdlystruct->DFSDM2BitClkDistribution)|
NYX 0:85b3fd62ea1a 3507 (mchdlystruct->DFSDM1DataDistribution)| (mchdlystruct->DFSDM2DataDistribution));
NYX 0:85b3fd62ea1a 3508
NYX 0:85b3fd62ea1a 3509 }
NYX 0:85b3fd62ea1a 3510 #endif /* SYSCFG_MCHDLYCR_BSCKSEL */
NYX 0:85b3fd62ea1a 3511 /**
NYX 0:85b3fd62ea1a 3512 * @}
NYX 0:85b3fd62ea1a 3513 */
NYX 0:85b3fd62ea1a 3514 /**
NYX 0:85b3fd62ea1a 3515 * @}
NYX 0:85b3fd62ea1a 3516 */
NYX 0:85b3fd62ea1a 3517 /* End of exported functions -------------------------------------------------*/
NYX 0:85b3fd62ea1a 3518
NYX 0:85b3fd62ea1a 3519 /* Private functions ---------------------------------------------------------*/
NYX 0:85b3fd62ea1a 3520 /** @addtogroup DFSDM_Private_Functions DFSDM Private Functions
NYX 0:85b3fd62ea1a 3521 * @{
NYX 0:85b3fd62ea1a 3522 */
NYX 0:85b3fd62ea1a 3523
NYX 0:85b3fd62ea1a 3524 /**
NYX 0:85b3fd62ea1a 3525 * @brief DMA half transfer complete callback for regular conversion.
NYX 0:85b3fd62ea1a 3526 * @param hdma : DMA handle.
NYX 0:85b3fd62ea1a 3527 * @retval None
NYX 0:85b3fd62ea1a 3528 */
NYX 0:85b3fd62ea1a 3529 static void DFSDM_DMARegularHalfConvCplt(DMA_HandleTypeDef *hdma)
NYX 0:85b3fd62ea1a 3530 {
NYX 0:85b3fd62ea1a 3531 /* Get DFSDM filter handle */
NYX 0:85b3fd62ea1a 3532 DFSDM_Filter_HandleTypeDef* hdfsdm_filter = (DFSDM_Filter_HandleTypeDef*) ((DMA_HandleTypeDef*)hdma)->Parent;
NYX 0:85b3fd62ea1a 3533
NYX 0:85b3fd62ea1a 3534 /* Call regular half conversion complete callback */
NYX 0:85b3fd62ea1a 3535 HAL_DFSDM_FilterRegConvHalfCpltCallback(hdfsdm_filter);
NYX 0:85b3fd62ea1a 3536 }
NYX 0:85b3fd62ea1a 3537
NYX 0:85b3fd62ea1a 3538 /**
NYX 0:85b3fd62ea1a 3539 * @brief DMA transfer complete callback for regular conversion.
NYX 0:85b3fd62ea1a 3540 * @param hdma : DMA handle.
NYX 0:85b3fd62ea1a 3541 * @retval None
NYX 0:85b3fd62ea1a 3542 */
NYX 0:85b3fd62ea1a 3543 static void DFSDM_DMARegularConvCplt(DMA_HandleTypeDef *hdma)
NYX 0:85b3fd62ea1a 3544 {
NYX 0:85b3fd62ea1a 3545 /* Get DFSDM filter handle */
NYX 0:85b3fd62ea1a 3546 DFSDM_Filter_HandleTypeDef* hdfsdm_filter = (DFSDM_Filter_HandleTypeDef*) ((DMA_HandleTypeDef*)hdma)->Parent;
NYX 0:85b3fd62ea1a 3547
NYX 0:85b3fd62ea1a 3548 /* Call regular conversion complete callback */
NYX 0:85b3fd62ea1a 3549 HAL_DFSDM_FilterRegConvCpltCallback(hdfsdm_filter);
NYX 0:85b3fd62ea1a 3550 }
NYX 0:85b3fd62ea1a 3551
NYX 0:85b3fd62ea1a 3552 /**
NYX 0:85b3fd62ea1a 3553 * @brief DMA half transfer complete callback for injected conversion.
NYX 0:85b3fd62ea1a 3554 * @param hdma : DMA handle.
NYX 0:85b3fd62ea1a 3555 * @retval None
NYX 0:85b3fd62ea1a 3556 */
NYX 0:85b3fd62ea1a 3557 static void DFSDM_DMAInjectedHalfConvCplt(DMA_HandleTypeDef *hdma)
NYX 0:85b3fd62ea1a 3558 {
NYX 0:85b3fd62ea1a 3559 /* Get DFSDM filter handle */
NYX 0:85b3fd62ea1a 3560 DFSDM_Filter_HandleTypeDef* hdfsdm_filter = (DFSDM_Filter_HandleTypeDef*) ((DMA_HandleTypeDef*)hdma)->Parent;
NYX 0:85b3fd62ea1a 3561
NYX 0:85b3fd62ea1a 3562 /* Call injected half conversion complete callback */
NYX 0:85b3fd62ea1a 3563 HAL_DFSDM_FilterInjConvHalfCpltCallback(hdfsdm_filter);
NYX 0:85b3fd62ea1a 3564 }
NYX 0:85b3fd62ea1a 3565
NYX 0:85b3fd62ea1a 3566 /**
NYX 0:85b3fd62ea1a 3567 * @brief DMA transfer complete callback for injected conversion.
NYX 0:85b3fd62ea1a 3568 * @param hdma : DMA handle.
NYX 0:85b3fd62ea1a 3569 * @retval None
NYX 0:85b3fd62ea1a 3570 */
NYX 0:85b3fd62ea1a 3571 static void DFSDM_DMAInjectedConvCplt(DMA_HandleTypeDef *hdma)
NYX 0:85b3fd62ea1a 3572 {
NYX 0:85b3fd62ea1a 3573 /* Get DFSDM filter handle */
NYX 0:85b3fd62ea1a 3574 DFSDM_Filter_HandleTypeDef* hdfsdm_filter = (DFSDM_Filter_HandleTypeDef*) ((DMA_HandleTypeDef*)hdma)->Parent;
NYX 0:85b3fd62ea1a 3575
NYX 0:85b3fd62ea1a 3576 /* Call injected conversion complete callback */
NYX 0:85b3fd62ea1a 3577 HAL_DFSDM_FilterInjConvCpltCallback(hdfsdm_filter);
NYX 0:85b3fd62ea1a 3578 }
NYX 0:85b3fd62ea1a 3579
NYX 0:85b3fd62ea1a 3580 /**
NYX 0:85b3fd62ea1a 3581 * @brief DMA error callback.
NYX 0:85b3fd62ea1a 3582 * @param hdma : DMA handle.
NYX 0:85b3fd62ea1a 3583 * @retval None
NYX 0:85b3fd62ea1a 3584 */
NYX 0:85b3fd62ea1a 3585 static void DFSDM_DMAError(DMA_HandleTypeDef *hdma)
NYX 0:85b3fd62ea1a 3586 {
NYX 0:85b3fd62ea1a 3587 /* Get DFSDM filter handle */
NYX 0:85b3fd62ea1a 3588 DFSDM_Filter_HandleTypeDef* hdfsdm_filter = (DFSDM_Filter_HandleTypeDef*) ((DMA_HandleTypeDef*)hdma)->Parent;
NYX 0:85b3fd62ea1a 3589
NYX 0:85b3fd62ea1a 3590 /* Update error code */
NYX 0:85b3fd62ea1a 3591 hdfsdm_filter->ErrorCode = DFSDM_FILTER_ERROR_DMA;
NYX 0:85b3fd62ea1a 3592
NYX 0:85b3fd62ea1a 3593 /* Call error callback */
NYX 0:85b3fd62ea1a 3594 HAL_DFSDM_FilterErrorCallback(hdfsdm_filter);
NYX 0:85b3fd62ea1a 3595 }
NYX 0:85b3fd62ea1a 3596
NYX 0:85b3fd62ea1a 3597 /**
NYX 0:85b3fd62ea1a 3598 * @brief This function allows to get the number of injected channels.
NYX 0:85b3fd62ea1a 3599 * @param Channels : bitfield of injected channels.
NYX 0:85b3fd62ea1a 3600 * @retval Number of injected channels.
NYX 0:85b3fd62ea1a 3601 */
NYX 0:85b3fd62ea1a 3602 static uint32_t DFSDM_GetInjChannelsNbr(uint32_t Channels)
NYX 0:85b3fd62ea1a 3603 {
NYX 0:85b3fd62ea1a 3604 uint32_t nbChannels = 0U;
NYX 0:85b3fd62ea1a 3605 uint32_t tmp;
NYX 0:85b3fd62ea1a 3606
NYX 0:85b3fd62ea1a 3607 /* Get the number of channels from bitfield */
NYX 0:85b3fd62ea1a 3608 tmp = (uint32_t) (Channels & DFSDM_LSB_MASK);
NYX 0:85b3fd62ea1a 3609 while(tmp != 0U)
NYX 0:85b3fd62ea1a 3610 {
NYX 0:85b3fd62ea1a 3611 if((tmp & 1U) != 0U)
NYX 0:85b3fd62ea1a 3612 {
NYX 0:85b3fd62ea1a 3613 nbChannels++;
NYX 0:85b3fd62ea1a 3614 }
NYX 0:85b3fd62ea1a 3615 tmp = (uint32_t) (tmp >> 1U);
NYX 0:85b3fd62ea1a 3616 }
NYX 0:85b3fd62ea1a 3617 return nbChannels;
NYX 0:85b3fd62ea1a 3618 }
NYX 0:85b3fd62ea1a 3619
NYX 0:85b3fd62ea1a 3620 /**
NYX 0:85b3fd62ea1a 3621 * @brief This function allows to get the channel number from channel instance.
NYX 0:85b3fd62ea1a 3622 * @param Instance : DFSDM channel instance.
NYX 0:85b3fd62ea1a 3623 * @retval Channel number.
NYX 0:85b3fd62ea1a 3624 */
NYX 0:85b3fd62ea1a 3625 static uint32_t DFSDM_GetChannelFromInstance(DFSDM_Channel_TypeDef* Instance)
NYX 0:85b3fd62ea1a 3626 {
NYX 0:85b3fd62ea1a 3627 uint32_t channel = 0xFFU;
NYX 0:85b3fd62ea1a 3628
NYX 0:85b3fd62ea1a 3629 /* Get channel from instance */
NYX 0:85b3fd62ea1a 3630 #if defined(DFSDM2_Channel0)
NYX 0:85b3fd62ea1a 3631 if((Instance == DFSDM1_Channel0) || (Instance == DFSDM2_Channel0))
NYX 0:85b3fd62ea1a 3632 {
NYX 0:85b3fd62ea1a 3633 channel = 0U;
NYX 0:85b3fd62ea1a 3634 }
NYX 0:85b3fd62ea1a 3635 else if((Instance == DFSDM1_Channel1) || (Instance == DFSDM2_Channel1))
NYX 0:85b3fd62ea1a 3636 {
NYX 0:85b3fd62ea1a 3637 channel = 1U;
NYX 0:85b3fd62ea1a 3638 }
NYX 0:85b3fd62ea1a 3639 else if((Instance == DFSDM1_Channel2) || (Instance == DFSDM2_Channel2))
NYX 0:85b3fd62ea1a 3640 {
NYX 0:85b3fd62ea1a 3641 channel = 2U;
NYX 0:85b3fd62ea1a 3642 }
NYX 0:85b3fd62ea1a 3643 else if((Instance == DFSDM1_Channel3) || (Instance == DFSDM2_Channel3))
NYX 0:85b3fd62ea1a 3644 {
NYX 0:85b3fd62ea1a 3645 channel = 3U;
NYX 0:85b3fd62ea1a 3646 }
NYX 0:85b3fd62ea1a 3647 else if(Instance == DFSDM2_Channel4)
NYX 0:85b3fd62ea1a 3648 {
NYX 0:85b3fd62ea1a 3649 channel = 4U;
NYX 0:85b3fd62ea1a 3650 }
NYX 0:85b3fd62ea1a 3651 else if(Instance == DFSDM2_Channel5)
NYX 0:85b3fd62ea1a 3652 {
NYX 0:85b3fd62ea1a 3653 channel = 5U;
NYX 0:85b3fd62ea1a 3654 }
NYX 0:85b3fd62ea1a 3655 else if(Instance == DFSDM2_Channel6)
NYX 0:85b3fd62ea1a 3656 {
NYX 0:85b3fd62ea1a 3657 channel = 6U;
NYX 0:85b3fd62ea1a 3658 }
NYX 0:85b3fd62ea1a 3659 else if(Instance == DFSDM2_Channel7)
NYX 0:85b3fd62ea1a 3660 {
NYX 0:85b3fd62ea1a 3661 channel = 7U;
NYX 0:85b3fd62ea1a 3662 }
NYX 0:85b3fd62ea1a 3663 #else
NYX 0:85b3fd62ea1a 3664 if(Instance == DFSDM1_Channel0)
NYX 0:85b3fd62ea1a 3665 {
NYX 0:85b3fd62ea1a 3666 channel = 0U;
NYX 0:85b3fd62ea1a 3667 }
NYX 0:85b3fd62ea1a 3668 else if(Instance == DFSDM1_Channel1)
NYX 0:85b3fd62ea1a 3669 {
NYX 0:85b3fd62ea1a 3670 channel = 1U;
NYX 0:85b3fd62ea1a 3671 }
NYX 0:85b3fd62ea1a 3672 else if(Instance == DFSDM1_Channel2)
NYX 0:85b3fd62ea1a 3673 {
NYX 0:85b3fd62ea1a 3674 channel = 2U;
NYX 0:85b3fd62ea1a 3675 }
NYX 0:85b3fd62ea1a 3676 else if(Instance == DFSDM1_Channel3)
NYX 0:85b3fd62ea1a 3677 {
NYX 0:85b3fd62ea1a 3678 channel = 3U;
NYX 0:85b3fd62ea1a 3679 }
NYX 0:85b3fd62ea1a 3680 #endif /* defined(DFSDM2_Channel0) */
NYX 0:85b3fd62ea1a 3681
NYX 0:85b3fd62ea1a 3682 return channel;
NYX 0:85b3fd62ea1a 3683 }
NYX 0:85b3fd62ea1a 3684
NYX 0:85b3fd62ea1a 3685 /**
NYX 0:85b3fd62ea1a 3686 * @brief This function allows to really start regular conversion.
NYX 0:85b3fd62ea1a 3687 * @param hdfsdm_filter : DFSDM filter handle.
NYX 0:85b3fd62ea1a 3688 * @retval None
NYX 0:85b3fd62ea1a 3689 */
NYX 0:85b3fd62ea1a 3690 static void DFSDM_RegConvStart(DFSDM_Filter_HandleTypeDef* hdfsdm_filter)
NYX 0:85b3fd62ea1a 3691 {
NYX 0:85b3fd62ea1a 3692 /* Check regular trigger */
NYX 0:85b3fd62ea1a 3693 if(hdfsdm_filter->RegularTrigger == DFSDM_FILTER_SW_TRIGGER)
NYX 0:85b3fd62ea1a 3694 {
NYX 0:85b3fd62ea1a 3695 /* Software start of regular conversion */
NYX 0:85b3fd62ea1a 3696 hdfsdm_filter->Instance->FLTCR1 |= DFSDM_FLTCR1_RSWSTART;
NYX 0:85b3fd62ea1a 3697 }
NYX 0:85b3fd62ea1a 3698 else /* synchronous trigger */
NYX 0:85b3fd62ea1a 3699 {
NYX 0:85b3fd62ea1a 3700 /* Disable DFSDM filter */
NYX 0:85b3fd62ea1a 3701 hdfsdm_filter->Instance->FLTCR1 &= ~(DFSDM_FLTCR1_DFEN);
NYX 0:85b3fd62ea1a 3702
NYX 0:85b3fd62ea1a 3703 /* Set RSYNC bit in DFSDM_FLTCR1 register */
NYX 0:85b3fd62ea1a 3704 hdfsdm_filter->Instance->FLTCR1 |= DFSDM_FLTCR1_RSYNC;
NYX 0:85b3fd62ea1a 3705
NYX 0:85b3fd62ea1a 3706 /* Enable DFSDM filter */
NYX 0:85b3fd62ea1a 3707 hdfsdm_filter->Instance->FLTCR1 |= DFSDM_FLTCR1_DFEN;
NYX 0:85b3fd62ea1a 3708
NYX 0:85b3fd62ea1a 3709 /* If injected conversion was in progress, restart it */
NYX 0:85b3fd62ea1a 3710 if(hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_INJ)
NYX 0:85b3fd62ea1a 3711 {
NYX 0:85b3fd62ea1a 3712 if(hdfsdm_filter->InjectedTrigger == DFSDM_FILTER_SW_TRIGGER)
NYX 0:85b3fd62ea1a 3713 {
NYX 0:85b3fd62ea1a 3714 hdfsdm_filter->Instance->FLTCR1 |= DFSDM_FLTCR1_JSWSTART;
NYX 0:85b3fd62ea1a 3715 }
NYX 0:85b3fd62ea1a 3716 /* Update remaining injected conversions */
NYX 0:85b3fd62ea1a 3717 hdfsdm_filter->InjConvRemaining = (hdfsdm_filter->InjectedScanMode == ENABLE) ? \
NYX 0:85b3fd62ea1a 3718 hdfsdm_filter->InjectedChannelsNbr : 1U;
NYX 0:85b3fd62ea1a 3719 }
NYX 0:85b3fd62ea1a 3720 }
NYX 0:85b3fd62ea1a 3721 /* Update DFSDM filter state */
NYX 0:85b3fd62ea1a 3722 hdfsdm_filter->State = (hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_READY) ? \
NYX 0:85b3fd62ea1a 3723 HAL_DFSDM_FILTER_STATE_REG : HAL_DFSDM_FILTER_STATE_REG_INJ;
NYX 0:85b3fd62ea1a 3724 }
NYX 0:85b3fd62ea1a 3725
NYX 0:85b3fd62ea1a 3726 /**
NYX 0:85b3fd62ea1a 3727 * @brief This function allows to really stop regular conversion.
NYX 0:85b3fd62ea1a 3728 * @param hdfsdm_filter : DFSDM filter handle.
NYX 0:85b3fd62ea1a 3729 * @retval None
NYX 0:85b3fd62ea1a 3730 */
NYX 0:85b3fd62ea1a 3731 static void DFSDM_RegConvStop(DFSDM_Filter_HandleTypeDef* hdfsdm_filter)
NYX 0:85b3fd62ea1a 3732 {
NYX 0:85b3fd62ea1a 3733 /* Disable DFSDM filter */
NYX 0:85b3fd62ea1a 3734 hdfsdm_filter->Instance->FLTCR1 &= ~(DFSDM_FLTCR1_DFEN);
NYX 0:85b3fd62ea1a 3735
NYX 0:85b3fd62ea1a 3736 /* If regular trigger was synchronous, reset RSYNC bit in DFSDM_FLTCR1 register */
NYX 0:85b3fd62ea1a 3737 if(hdfsdm_filter->RegularTrigger == DFSDM_FILTER_SYNC_TRIGGER)
NYX 0:85b3fd62ea1a 3738 {
NYX 0:85b3fd62ea1a 3739 hdfsdm_filter->Instance->FLTCR1 &= ~(DFSDM_FLTCR1_RSYNC);
NYX 0:85b3fd62ea1a 3740 }
NYX 0:85b3fd62ea1a 3741
NYX 0:85b3fd62ea1a 3742 /* Enable DFSDM filter */
NYX 0:85b3fd62ea1a 3743 hdfsdm_filter->Instance->FLTCR1 |= DFSDM_FLTCR1_DFEN;
NYX 0:85b3fd62ea1a 3744
NYX 0:85b3fd62ea1a 3745 /* If injected conversion was in progress, restart it */
NYX 0:85b3fd62ea1a 3746 if(hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_REG_INJ)
NYX 0:85b3fd62ea1a 3747 {
NYX 0:85b3fd62ea1a 3748 if(hdfsdm_filter->InjectedTrigger == DFSDM_FILTER_SW_TRIGGER)
NYX 0:85b3fd62ea1a 3749 {
NYX 0:85b3fd62ea1a 3750 hdfsdm_filter->Instance->FLTCR1 |= DFSDM_FLTCR1_JSWSTART;
NYX 0:85b3fd62ea1a 3751 }
NYX 0:85b3fd62ea1a 3752 /* Update remaining injected conversions */
NYX 0:85b3fd62ea1a 3753 hdfsdm_filter->InjConvRemaining = (hdfsdm_filter->InjectedScanMode == ENABLE) ? \
NYX 0:85b3fd62ea1a 3754 hdfsdm_filter->InjectedChannelsNbr : 1U;
NYX 0:85b3fd62ea1a 3755 }
NYX 0:85b3fd62ea1a 3756
NYX 0:85b3fd62ea1a 3757 /* Update DFSDM filter state */
NYX 0:85b3fd62ea1a 3758 hdfsdm_filter->State = (hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_REG) ? \
NYX 0:85b3fd62ea1a 3759 HAL_DFSDM_FILTER_STATE_READY : HAL_DFSDM_FILTER_STATE_INJ;
NYX 0:85b3fd62ea1a 3760 }
NYX 0:85b3fd62ea1a 3761
NYX 0:85b3fd62ea1a 3762 /**
NYX 0:85b3fd62ea1a 3763 * @brief This function allows to really start injected conversion.
NYX 0:85b3fd62ea1a 3764 * @param hdfsdm_filter : DFSDM filter handle.
NYX 0:85b3fd62ea1a 3765 * @retval None
NYX 0:85b3fd62ea1a 3766 */
NYX 0:85b3fd62ea1a 3767 static void DFSDM_InjConvStart(DFSDM_Filter_HandleTypeDef* hdfsdm_filter)
NYX 0:85b3fd62ea1a 3768 {
NYX 0:85b3fd62ea1a 3769 /* Check injected trigger */
NYX 0:85b3fd62ea1a 3770 if(hdfsdm_filter->InjectedTrigger == DFSDM_FILTER_SW_TRIGGER)
NYX 0:85b3fd62ea1a 3771 {
NYX 0:85b3fd62ea1a 3772 /* Software start of injected conversion */
NYX 0:85b3fd62ea1a 3773 hdfsdm_filter->Instance->FLTCR1 |= DFSDM_FLTCR1_JSWSTART;
NYX 0:85b3fd62ea1a 3774 }
NYX 0:85b3fd62ea1a 3775 else /* external or synchronous trigger */
NYX 0:85b3fd62ea1a 3776 {
NYX 0:85b3fd62ea1a 3777 /* Disable DFSDM filter */
NYX 0:85b3fd62ea1a 3778 hdfsdm_filter->Instance->FLTCR1 &= ~(DFSDM_FLTCR1_DFEN);
NYX 0:85b3fd62ea1a 3779
NYX 0:85b3fd62ea1a 3780 if(hdfsdm_filter->InjectedTrigger == DFSDM_FILTER_SYNC_TRIGGER)
NYX 0:85b3fd62ea1a 3781 {
NYX 0:85b3fd62ea1a 3782 /* Set JSYNC bit in DFSDM_FLTCR1 register */
NYX 0:85b3fd62ea1a 3783 hdfsdm_filter->Instance->FLTCR1 |= DFSDM_FLTCR1_JSYNC;
NYX 0:85b3fd62ea1a 3784 }
NYX 0:85b3fd62ea1a 3785 else /* external trigger */
NYX 0:85b3fd62ea1a 3786 {
NYX 0:85b3fd62ea1a 3787 /* Set JEXTEN[1:0] bits in DFSDM_FLTCR1 register */
NYX 0:85b3fd62ea1a 3788 hdfsdm_filter->Instance->FLTCR1 |= hdfsdm_filter->ExtTriggerEdge;
NYX 0:85b3fd62ea1a 3789 }
NYX 0:85b3fd62ea1a 3790
NYX 0:85b3fd62ea1a 3791 /* Enable DFSDM filter */
NYX 0:85b3fd62ea1a 3792 hdfsdm_filter->Instance->FLTCR1 |= DFSDM_FLTCR1_DFEN;
NYX 0:85b3fd62ea1a 3793
NYX 0:85b3fd62ea1a 3794 /* If regular conversion was in progress, restart it */
NYX 0:85b3fd62ea1a 3795 if((hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_REG) && \
NYX 0:85b3fd62ea1a 3796 (hdfsdm_filter->RegularTrigger == DFSDM_FILTER_SW_TRIGGER))
NYX 0:85b3fd62ea1a 3797 {
NYX 0:85b3fd62ea1a 3798 hdfsdm_filter->Instance->FLTCR1 |= DFSDM_FLTCR1_RSWSTART;
NYX 0:85b3fd62ea1a 3799 }
NYX 0:85b3fd62ea1a 3800 }
NYX 0:85b3fd62ea1a 3801 /* Update DFSDM filter state */
NYX 0:85b3fd62ea1a 3802 hdfsdm_filter->State = (hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_READY) ? \
NYX 0:85b3fd62ea1a 3803 HAL_DFSDM_FILTER_STATE_INJ : HAL_DFSDM_FILTER_STATE_REG_INJ;
NYX 0:85b3fd62ea1a 3804 }
NYX 0:85b3fd62ea1a 3805
NYX 0:85b3fd62ea1a 3806 /**
NYX 0:85b3fd62ea1a 3807 * @brief This function allows to really stop injected conversion.
NYX 0:85b3fd62ea1a 3808 * @param hdfsdm_filter : DFSDM filter handle.
NYX 0:85b3fd62ea1a 3809 * @retval None
NYX 0:85b3fd62ea1a 3810 */
NYX 0:85b3fd62ea1a 3811 static void DFSDM_InjConvStop(DFSDM_Filter_HandleTypeDef* hdfsdm_filter)
NYX 0:85b3fd62ea1a 3812 {
NYX 0:85b3fd62ea1a 3813 /* Disable DFSDM filter */
NYX 0:85b3fd62ea1a 3814 hdfsdm_filter->Instance->FLTCR1 &= ~(DFSDM_FLTCR1_DFEN);
NYX 0:85b3fd62ea1a 3815
NYX 0:85b3fd62ea1a 3816 /* If injected trigger was synchronous, reset JSYNC bit in DFSDM_FLTCR1 register */
NYX 0:85b3fd62ea1a 3817 if(hdfsdm_filter->InjectedTrigger == DFSDM_FILTER_SYNC_TRIGGER)
NYX 0:85b3fd62ea1a 3818 {
NYX 0:85b3fd62ea1a 3819 hdfsdm_filter->Instance->FLTCR1 &= ~(DFSDM_FLTCR1_JSYNC);
NYX 0:85b3fd62ea1a 3820 }
NYX 0:85b3fd62ea1a 3821 else if(hdfsdm_filter->InjectedTrigger == DFSDM_FILTER_EXT_TRIGGER)
NYX 0:85b3fd62ea1a 3822 {
NYX 0:85b3fd62ea1a 3823 /* Reset JEXTEN[1:0] bits in DFSDM_FLTCR1 register */
NYX 0:85b3fd62ea1a 3824 hdfsdm_filter->Instance->FLTCR1 &= ~(DFSDM_FLTCR1_JEXTEN);
NYX 0:85b3fd62ea1a 3825 }
NYX 0:85b3fd62ea1a 3826
NYX 0:85b3fd62ea1a 3827 /* Enable DFSDM filter */
NYX 0:85b3fd62ea1a 3828 hdfsdm_filter->Instance->FLTCR1 |= DFSDM_FLTCR1_DFEN;
NYX 0:85b3fd62ea1a 3829
NYX 0:85b3fd62ea1a 3830 /* If regular conversion was in progress, restart it */
NYX 0:85b3fd62ea1a 3831 if((hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_REG_INJ) && \
NYX 0:85b3fd62ea1a 3832 (hdfsdm_filter->RegularTrigger == DFSDM_FILTER_SW_TRIGGER))
NYX 0:85b3fd62ea1a 3833 {
NYX 0:85b3fd62ea1a 3834 hdfsdm_filter->Instance->FLTCR1 |= DFSDM_FLTCR1_RSWSTART;
NYX 0:85b3fd62ea1a 3835 }
NYX 0:85b3fd62ea1a 3836
NYX 0:85b3fd62ea1a 3837 /* Update remaining injected conversions */
NYX 0:85b3fd62ea1a 3838 hdfsdm_filter->InjConvRemaining = (hdfsdm_filter->InjectedScanMode == ENABLE) ? \
NYX 0:85b3fd62ea1a 3839 hdfsdm_filter->InjectedChannelsNbr : 1U;
NYX 0:85b3fd62ea1a 3840
NYX 0:85b3fd62ea1a 3841 /* Update DFSDM filter state */
NYX 0:85b3fd62ea1a 3842 hdfsdm_filter->State = (hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_INJ) ? \
NYX 0:85b3fd62ea1a 3843 HAL_DFSDM_FILTER_STATE_READY : HAL_DFSDM_FILTER_STATE_REG;
NYX 0:85b3fd62ea1a 3844 }
NYX 0:85b3fd62ea1a 3845 /**
NYX 0:85b3fd62ea1a 3846 * @}
NYX 0:85b3fd62ea1a 3847 */
NYX 0:85b3fd62ea1a 3848 /* End of private functions --------------------------------------------------*/
NYX 0:85b3fd62ea1a 3849
NYX 0:85b3fd62ea1a 3850 /**
NYX 0:85b3fd62ea1a 3851 * @}
NYX 0:85b3fd62ea1a 3852 */
NYX 0:85b3fd62ea1a 3853 #endif /* STM32F412Zx || STM32F412Vx || STM32F412Rx || STM32F412Cx || STM32F413xx || STM32F423xx */
NYX 0:85b3fd62ea1a 3854 #endif /* HAL_DFSDM_MODULE_ENABLED */
NYX 0:85b3fd62ea1a 3855 /**
NYX 0:85b3fd62ea1a 3856 * @}
NYX 0:85b3fd62ea1a 3857 */
NYX 0:85b3fd62ea1a 3858
NYX 0:85b3fd62ea1a 3859 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/