inport from local
Dependents: Hobbyking_Cheetah_0511
targets/TARGET_STM/TARGET_STM32F4/device/stm32f4xx_hal_adc_ex.h@0:85b3fd62ea1a, 2020-03-16 (annotated)
- Committer:
- NYX
- Date:
- Mon Mar 16 06:35:48 2020 +0000
- Revision:
- 0:85b3fd62ea1a
reinport to mbed;
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
NYX | 0:85b3fd62ea1a | 1 | /** |
NYX | 0:85b3fd62ea1a | 2 | ****************************************************************************** |
NYX | 0:85b3fd62ea1a | 3 | * @file stm32f4xx_hal_adc_ex.h |
NYX | 0:85b3fd62ea1a | 4 | * @author MCD Application Team |
NYX | 0:85b3fd62ea1a | 5 | * @version V1.7.1 |
NYX | 0:85b3fd62ea1a | 6 | * @date 14-April-2017 |
NYX | 0:85b3fd62ea1a | 7 | * @brief Header file of ADC HAL module. |
NYX | 0:85b3fd62ea1a | 8 | ****************************************************************************** |
NYX | 0:85b3fd62ea1a | 9 | * @attention |
NYX | 0:85b3fd62ea1a | 10 | * |
NYX | 0:85b3fd62ea1a | 11 | * <h2><center>© COPYRIGHT(c) 2017 STMicroelectronics</center></h2> |
NYX | 0:85b3fd62ea1a | 12 | * |
NYX | 0:85b3fd62ea1a | 13 | * Redistribution and use in source and binary forms, with or without modification, |
NYX | 0:85b3fd62ea1a | 14 | * are permitted provided that the following conditions are met: |
NYX | 0:85b3fd62ea1a | 15 | * 1. Redistributions of source code must retain the above copyright notice, |
NYX | 0:85b3fd62ea1a | 16 | * this list of conditions and the following disclaimer. |
NYX | 0:85b3fd62ea1a | 17 | * 2. Redistributions in binary form must reproduce the above copyright notice, |
NYX | 0:85b3fd62ea1a | 18 | * this list of conditions and the following disclaimer in the documentation |
NYX | 0:85b3fd62ea1a | 19 | * and/or other materials provided with the distribution. |
NYX | 0:85b3fd62ea1a | 20 | * 3. Neither the name of STMicroelectronics nor the names of its contributors |
NYX | 0:85b3fd62ea1a | 21 | * may be used to endorse or promote products derived from this software |
NYX | 0:85b3fd62ea1a | 22 | * without specific prior written permission. |
NYX | 0:85b3fd62ea1a | 23 | * |
NYX | 0:85b3fd62ea1a | 24 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
NYX | 0:85b3fd62ea1a | 25 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
NYX | 0:85b3fd62ea1a | 26 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
NYX | 0:85b3fd62ea1a | 27 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE |
NYX | 0:85b3fd62ea1a | 28 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
NYX | 0:85b3fd62ea1a | 29 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR |
NYX | 0:85b3fd62ea1a | 30 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
NYX | 0:85b3fd62ea1a | 31 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
NYX | 0:85b3fd62ea1a | 32 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
NYX | 0:85b3fd62ea1a | 33 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
NYX | 0:85b3fd62ea1a | 34 | * |
NYX | 0:85b3fd62ea1a | 35 | ****************************************************************************** |
NYX | 0:85b3fd62ea1a | 36 | */ |
NYX | 0:85b3fd62ea1a | 37 | |
NYX | 0:85b3fd62ea1a | 38 | /* Define to prevent recursive inclusion -------------------------------------*/ |
NYX | 0:85b3fd62ea1a | 39 | #ifndef __STM32F4xx_ADC_EX_H |
NYX | 0:85b3fd62ea1a | 40 | #define __STM32F4xx_ADC_EX_H |
NYX | 0:85b3fd62ea1a | 41 | |
NYX | 0:85b3fd62ea1a | 42 | #ifdef __cplusplus |
NYX | 0:85b3fd62ea1a | 43 | extern "C" { |
NYX | 0:85b3fd62ea1a | 44 | #endif |
NYX | 0:85b3fd62ea1a | 45 | |
NYX | 0:85b3fd62ea1a | 46 | /* Includes ------------------------------------------------------------------*/ |
NYX | 0:85b3fd62ea1a | 47 | #include "stm32f4xx_hal_def.h" |
NYX | 0:85b3fd62ea1a | 48 | |
NYX | 0:85b3fd62ea1a | 49 | /** @addtogroup STM32F4xx_HAL_Driver |
NYX | 0:85b3fd62ea1a | 50 | * @{ |
NYX | 0:85b3fd62ea1a | 51 | */ |
NYX | 0:85b3fd62ea1a | 52 | |
NYX | 0:85b3fd62ea1a | 53 | /** @addtogroup ADCEx |
NYX | 0:85b3fd62ea1a | 54 | * @{ |
NYX | 0:85b3fd62ea1a | 55 | */ |
NYX | 0:85b3fd62ea1a | 56 | |
NYX | 0:85b3fd62ea1a | 57 | /* Exported types ------------------------------------------------------------*/ |
NYX | 0:85b3fd62ea1a | 58 | /** @defgroup ADCEx_Exported_Types ADC Exported Types |
NYX | 0:85b3fd62ea1a | 59 | * @{ |
NYX | 0:85b3fd62ea1a | 60 | */ |
NYX | 0:85b3fd62ea1a | 61 | |
NYX | 0:85b3fd62ea1a | 62 | /** |
NYX | 0:85b3fd62ea1a | 63 | * @brief ADC Configuration injected Channel structure definition |
NYX | 0:85b3fd62ea1a | 64 | * @note Parameters of this structure are shared within 2 scopes: |
NYX | 0:85b3fd62ea1a | 65 | * - Scope channel: InjectedChannel, InjectedRank, InjectedSamplingTime, InjectedOffset |
NYX | 0:85b3fd62ea1a | 66 | * - Scope injected group (affects all channels of injected group): InjectedNbrOfConversion, InjectedDiscontinuousConvMode, |
NYX | 0:85b3fd62ea1a | 67 | * AutoInjectedConv, ExternalTrigInjecConvEdge, ExternalTrigInjecConv. |
NYX | 0:85b3fd62ea1a | 68 | * @note The setting of these parameters with function HAL_ADCEx_InjectedConfigChannel() is conditioned to ADC state. |
NYX | 0:85b3fd62ea1a | 69 | * ADC state can be either: |
NYX | 0:85b3fd62ea1a | 70 | * - For all parameters: ADC disabled |
NYX | 0:85b3fd62ea1a | 71 | * - For all except parameters 'InjectedDiscontinuousConvMode' and 'AutoInjectedConv': ADC enabled without conversion on going on injected group. |
NYX | 0:85b3fd62ea1a | 72 | * - For parameters 'ExternalTrigInjecConv' and 'ExternalTrigInjecConvEdge': ADC enabled, even with conversion on going on injected group. |
NYX | 0:85b3fd62ea1a | 73 | */ |
NYX | 0:85b3fd62ea1a | 74 | typedef struct |
NYX | 0:85b3fd62ea1a | 75 | { |
NYX | 0:85b3fd62ea1a | 76 | uint32_t InjectedChannel; /*!< Selection of ADC channel to configure |
NYX | 0:85b3fd62ea1a | 77 | This parameter can be a value of @ref ADC_channels |
NYX | 0:85b3fd62ea1a | 78 | Note: Depending on devices, some channels may not be available on package pins. Refer to device datasheet for channels availability. */ |
NYX | 0:85b3fd62ea1a | 79 | uint32_t InjectedRank; /*!< Rank in the injected group sequencer |
NYX | 0:85b3fd62ea1a | 80 | This parameter must be a value of @ref ADCEx_injected_rank |
NYX | 0:85b3fd62ea1a | 81 | Note: In case of need to disable a channel or change order of conversion sequencer, rank containing a previous channel setting can be overwritten by the new channel setting (or parameter number of conversions can be adjusted) */ |
NYX | 0:85b3fd62ea1a | 82 | uint32_t InjectedSamplingTime; /*!< Sampling time value to be set for the selected channel. |
NYX | 0:85b3fd62ea1a | 83 | Unit: ADC clock cycles |
NYX | 0:85b3fd62ea1a | 84 | Conversion time is the addition of sampling time and processing time (12 ADC clock cycles at ADC resolution 12 bits, 11 cycles at 10 bits, 9 cycles at 8 bits, 7 cycles at 6 bits). |
NYX | 0:85b3fd62ea1a | 85 | This parameter can be a value of @ref ADC_sampling_times |
NYX | 0:85b3fd62ea1a | 86 | Caution: This parameter updates the parameter property of the channel, that can be used into regular and/or injected groups. |
NYX | 0:85b3fd62ea1a | 87 | If this same channel has been previously configured in the other group (regular/injected), it will be updated to last setting. |
NYX | 0:85b3fd62ea1a | 88 | Note: In case of usage of internal measurement channels (VrefInt/Vbat/TempSensor), |
NYX | 0:85b3fd62ea1a | 89 | sampling time constraints must be respected (sampling time can be adjusted in function of ADC clock frequency and sampling time setting) |
NYX | 0:85b3fd62ea1a | 90 | Refer to device datasheet for timings values, parameters TS_vrefint, TS_temp (values rough order: 4us min). */ |
NYX | 0:85b3fd62ea1a | 91 | uint32_t InjectedOffset; /*!< Defines the offset to be subtracted from the raw converted data (for channels set on injected group only). |
NYX | 0:85b3fd62ea1a | 92 | Offset value must be a positive number. |
NYX | 0:85b3fd62ea1a | 93 | Depending of ADC resolution selected (12, 10, 8 or 6 bits), |
NYX | 0:85b3fd62ea1a | 94 | this parameter must be a number between Min_Data = 0x000 and Max_Data = 0xFFF, 0x3FF, 0xFF or 0x3F respectively. */ |
NYX | 0:85b3fd62ea1a | 95 | uint32_t InjectedNbrOfConversion; /*!< Specifies the number of ranks that will be converted within the injected group sequencer. |
NYX | 0:85b3fd62ea1a | 96 | To use the injected group sequencer and convert several ranks, parameter 'ScanConvMode' must be enabled. |
NYX | 0:85b3fd62ea1a | 97 | This parameter must be a number between Min_Data = 1 and Max_Data = 4. |
NYX | 0:85b3fd62ea1a | 98 | Caution: this setting impacts the entire injected group. Therefore, call of HAL_ADCEx_InjectedConfigChannel() to |
NYX | 0:85b3fd62ea1a | 99 | configure a channel on injected group can impact the configuration of other channels previously set. */ |
NYX | 0:85b3fd62ea1a | 100 | uint32_t InjectedDiscontinuousConvMode; /*!< Specifies whether the conversions sequence of injected group is performed in Complete-sequence/Discontinuous-sequence (main sequence subdivided in successive parts). |
NYX | 0:85b3fd62ea1a | 101 | Discontinuous mode is used only if sequencer is enabled (parameter 'ScanConvMode'). If sequencer is disabled, this parameter is discarded. |
NYX | 0:85b3fd62ea1a | 102 | Discontinuous mode can be enabled only if continuous mode is disabled. If continuous mode is enabled, this parameter setting is discarded. |
NYX | 0:85b3fd62ea1a | 103 | This parameter can be set to ENABLE or DISABLE. |
NYX | 0:85b3fd62ea1a | 104 | Note: For injected group, number of discontinuous ranks increment is fixed to one-by-one. |
NYX | 0:85b3fd62ea1a | 105 | Caution: this setting impacts the entire injected group. Therefore, call of HAL_ADCEx_InjectedConfigChannel() to |
NYX | 0:85b3fd62ea1a | 106 | configure a channel on injected group can impact the configuration of other channels previously set. */ |
NYX | 0:85b3fd62ea1a | 107 | uint32_t AutoInjectedConv; /*!< Enables or disables the selected ADC automatic injected group conversion after regular one |
NYX | 0:85b3fd62ea1a | 108 | This parameter can be set to ENABLE or DISABLE. |
NYX | 0:85b3fd62ea1a | 109 | Note: To use Automatic injected conversion, discontinuous mode must be disabled ('DiscontinuousConvMode' and 'InjectedDiscontinuousConvMode' set to DISABLE) |
NYX | 0:85b3fd62ea1a | 110 | Note: To use Automatic injected conversion, injected group external triggers must be disabled ('ExternalTrigInjecConv' set to ADC_SOFTWARE_START) |
NYX | 0:85b3fd62ea1a | 111 | Note: In case of DMA used with regular group: if DMA configured in normal mode (single shot) JAUTO will be stopped upon DMA transfer complete. |
NYX | 0:85b3fd62ea1a | 112 | To maintain JAUTO always enabled, DMA must be configured in circular mode. |
NYX | 0:85b3fd62ea1a | 113 | Caution: this setting impacts the entire injected group. Therefore, call of HAL_ADCEx_InjectedConfigChannel() to |
NYX | 0:85b3fd62ea1a | 114 | configure a channel on injected group can impact the configuration of other channels previously set. */ |
NYX | 0:85b3fd62ea1a | 115 | uint32_t ExternalTrigInjecConv; /*!< Selects the external event used to trigger the conversion start of injected group. |
NYX | 0:85b3fd62ea1a | 116 | If set to ADC_INJECTED_SOFTWARE_START, external triggers are disabled. |
NYX | 0:85b3fd62ea1a | 117 | If set to external trigger source, triggering is on event rising edge. |
NYX | 0:85b3fd62ea1a | 118 | This parameter can be a value of @ref ADCEx_External_trigger_Source_Injected |
NYX | 0:85b3fd62ea1a | 119 | Note: This parameter must be modified when ADC is disabled (before ADC start conversion or after ADC stop conversion). |
NYX | 0:85b3fd62ea1a | 120 | If ADC is enabled, this parameter setting is bypassed without error reporting (as it can be the expected behaviour in case of another parameter update on the fly) |
NYX | 0:85b3fd62ea1a | 121 | Caution: this setting impacts the entire injected group. Therefore, call of HAL_ADCEx_InjectedConfigChannel() to |
NYX | 0:85b3fd62ea1a | 122 | configure a channel on injected group can impact the configuration of other channels previously set. */ |
NYX | 0:85b3fd62ea1a | 123 | uint32_t ExternalTrigInjecConvEdge; /*!< Selects the external trigger edge of injected group. |
NYX | 0:85b3fd62ea1a | 124 | This parameter can be a value of @ref ADCEx_External_trigger_edge_Injected. |
NYX | 0:85b3fd62ea1a | 125 | If trigger is set to ADC_INJECTED_SOFTWARE_START, this parameter is discarded. |
NYX | 0:85b3fd62ea1a | 126 | Caution: this setting impacts the entire injected group. Therefore, call of HAL_ADCEx_InjectedConfigChannel() to |
NYX | 0:85b3fd62ea1a | 127 | configure a channel on injected group can impact the configuration of other channels previously set. */ |
NYX | 0:85b3fd62ea1a | 128 | }ADC_InjectionConfTypeDef; |
NYX | 0:85b3fd62ea1a | 129 | |
NYX | 0:85b3fd62ea1a | 130 | /** |
NYX | 0:85b3fd62ea1a | 131 | * @brief ADC Configuration multi-mode structure definition |
NYX | 0:85b3fd62ea1a | 132 | */ |
NYX | 0:85b3fd62ea1a | 133 | typedef struct |
NYX | 0:85b3fd62ea1a | 134 | { |
NYX | 0:85b3fd62ea1a | 135 | uint32_t Mode; /*!< Configures the ADC to operate in independent or multi mode. |
NYX | 0:85b3fd62ea1a | 136 | This parameter can be a value of @ref ADCEx_Common_mode */ |
NYX | 0:85b3fd62ea1a | 137 | uint32_t DMAAccessMode; /*!< Configures the Direct memory access mode for multi ADC mode. |
NYX | 0:85b3fd62ea1a | 138 | This parameter can be a value of @ref ADCEx_Direct_memory_access_mode_for_multi_mode */ |
NYX | 0:85b3fd62ea1a | 139 | uint32_t TwoSamplingDelay; /*!< Configures the Delay between 2 sampling phases. |
NYX | 0:85b3fd62ea1a | 140 | This parameter can be a value of @ref ADC_delay_between_2_sampling_phases */ |
NYX | 0:85b3fd62ea1a | 141 | }ADC_MultiModeTypeDef; |
NYX | 0:85b3fd62ea1a | 142 | |
NYX | 0:85b3fd62ea1a | 143 | /** |
NYX | 0:85b3fd62ea1a | 144 | * @} |
NYX | 0:85b3fd62ea1a | 145 | */ |
NYX | 0:85b3fd62ea1a | 146 | |
NYX | 0:85b3fd62ea1a | 147 | /* Exported constants --------------------------------------------------------*/ |
NYX | 0:85b3fd62ea1a | 148 | /** @defgroup ADCEx_Exported_Constants ADC Exported Constants |
NYX | 0:85b3fd62ea1a | 149 | * @{ |
NYX | 0:85b3fd62ea1a | 150 | */ |
NYX | 0:85b3fd62ea1a | 151 | |
NYX | 0:85b3fd62ea1a | 152 | /** @defgroup ADCEx_Common_mode ADC Common Mode |
NYX | 0:85b3fd62ea1a | 153 | * @{ |
NYX | 0:85b3fd62ea1a | 154 | */ |
NYX | 0:85b3fd62ea1a | 155 | #define ADC_MODE_INDEPENDENT 0x00000000U |
NYX | 0:85b3fd62ea1a | 156 | #define ADC_DUALMODE_REGSIMULT_INJECSIMULT ((uint32_t)ADC_CCR_MULTI_0) |
NYX | 0:85b3fd62ea1a | 157 | #define ADC_DUALMODE_REGSIMULT_ALTERTRIG ((uint32_t)ADC_CCR_MULTI_1) |
NYX | 0:85b3fd62ea1a | 158 | #define ADC_DUALMODE_INJECSIMULT ((uint32_t)(ADC_CCR_MULTI_2 | ADC_CCR_MULTI_0)) |
NYX | 0:85b3fd62ea1a | 159 | #define ADC_DUALMODE_REGSIMULT ((uint32_t)(ADC_CCR_MULTI_2 | ADC_CCR_MULTI_1)) |
NYX | 0:85b3fd62ea1a | 160 | #define ADC_DUALMODE_INTERL ((uint32_t)(ADC_CCR_MULTI_2 | ADC_CCR_MULTI_1 | ADC_CCR_MULTI_0)) |
NYX | 0:85b3fd62ea1a | 161 | #define ADC_DUALMODE_ALTERTRIG ((uint32_t)(ADC_CCR_MULTI_3 | ADC_CCR_MULTI_0)) |
NYX | 0:85b3fd62ea1a | 162 | #define ADC_TRIPLEMODE_REGSIMULT_INJECSIMULT ((uint32_t)(ADC_CCR_MULTI_4 | ADC_CCR_MULTI_0)) |
NYX | 0:85b3fd62ea1a | 163 | #define ADC_TRIPLEMODE_REGSIMULT_AlterTrig ((uint32_t)(ADC_CCR_MULTI_4 | ADC_CCR_MULTI_1)) |
NYX | 0:85b3fd62ea1a | 164 | #define ADC_TRIPLEMODE_INJECSIMULT ((uint32_t)(ADC_CCR_MULTI_4 | ADC_CCR_MULTI_2 | ADC_CCR_MULTI_0)) |
NYX | 0:85b3fd62ea1a | 165 | #define ADC_TRIPLEMODE_REGSIMULT ((uint32_t)(ADC_CCR_MULTI_4 | ADC_CCR_MULTI_2 | ADC_CCR_MULTI_1)) |
NYX | 0:85b3fd62ea1a | 166 | #define ADC_TRIPLEMODE_INTERL ((uint32_t)(ADC_CCR_MULTI_4 | ADC_CCR_MULTI_2 | ADC_CCR_MULTI_1 | ADC_CCR_MULTI_0)) |
NYX | 0:85b3fd62ea1a | 167 | #define ADC_TRIPLEMODE_ALTERTRIG ((uint32_t)(ADC_CCR_MULTI_4 | ADC_CCR_MULTI_3 | ADC_CCR_MULTI_0)) |
NYX | 0:85b3fd62ea1a | 168 | /** |
NYX | 0:85b3fd62ea1a | 169 | * @} |
NYX | 0:85b3fd62ea1a | 170 | */ |
NYX | 0:85b3fd62ea1a | 171 | |
NYX | 0:85b3fd62ea1a | 172 | /** @defgroup ADCEx_Direct_memory_access_mode_for_multi_mode ADC Direct Memory Access Mode For Multi Mode |
NYX | 0:85b3fd62ea1a | 173 | * @{ |
NYX | 0:85b3fd62ea1a | 174 | */ |
NYX | 0:85b3fd62ea1a | 175 | #define ADC_DMAACCESSMODE_DISABLED 0x00000000U /*!< DMA mode disabled */ |
NYX | 0:85b3fd62ea1a | 176 | #define ADC_DMAACCESSMODE_1 ((uint32_t)ADC_CCR_DMA_0) /*!< DMA mode 1 enabled (2 / 3 half-words one by one - 1 then 2 then 3)*/ |
NYX | 0:85b3fd62ea1a | 177 | #define ADC_DMAACCESSMODE_2 ((uint32_t)ADC_CCR_DMA_1) /*!< DMA mode 2 enabled (2 / 3 half-words by pairs - 2&1 then 1&3 then 3&2)*/ |
NYX | 0:85b3fd62ea1a | 178 | #define ADC_DMAACCESSMODE_3 ((uint32_t)ADC_CCR_DMA) /*!< DMA mode 3 enabled (2 / 3 bytes by pairs - 2&1 then 1&3 then 3&2) */ |
NYX | 0:85b3fd62ea1a | 179 | /** |
NYX | 0:85b3fd62ea1a | 180 | * @} |
NYX | 0:85b3fd62ea1a | 181 | */ |
NYX | 0:85b3fd62ea1a | 182 | |
NYX | 0:85b3fd62ea1a | 183 | /** @defgroup ADCEx_External_trigger_edge_Injected ADC External Trigger Edge Injected |
NYX | 0:85b3fd62ea1a | 184 | * @{ |
NYX | 0:85b3fd62ea1a | 185 | */ |
NYX | 0:85b3fd62ea1a | 186 | #define ADC_EXTERNALTRIGINJECCONVEDGE_NONE 0x00000000U |
NYX | 0:85b3fd62ea1a | 187 | #define ADC_EXTERNALTRIGINJECCONVEDGE_RISING ((uint32_t)ADC_CR2_JEXTEN_0) |
NYX | 0:85b3fd62ea1a | 188 | #define ADC_EXTERNALTRIGINJECCONVEDGE_FALLING ((uint32_t)ADC_CR2_JEXTEN_1) |
NYX | 0:85b3fd62ea1a | 189 | #define ADC_EXTERNALTRIGINJECCONVEDGE_RISINGFALLING ((uint32_t)ADC_CR2_JEXTEN) |
NYX | 0:85b3fd62ea1a | 190 | /** |
NYX | 0:85b3fd62ea1a | 191 | * @} |
NYX | 0:85b3fd62ea1a | 192 | */ |
NYX | 0:85b3fd62ea1a | 193 | |
NYX | 0:85b3fd62ea1a | 194 | /** @defgroup ADCEx_External_trigger_Source_Injected ADC External Trigger Source Injected |
NYX | 0:85b3fd62ea1a | 195 | * @{ |
NYX | 0:85b3fd62ea1a | 196 | */ |
NYX | 0:85b3fd62ea1a | 197 | #define ADC_EXTERNALTRIGINJECCONV_T1_CC4 0x00000000U |
NYX | 0:85b3fd62ea1a | 198 | #define ADC_EXTERNALTRIGINJECCONV_T1_TRGO ((uint32_t)ADC_CR2_JEXTSEL_0) |
NYX | 0:85b3fd62ea1a | 199 | #define ADC_EXTERNALTRIGINJECCONV_T2_CC1 ((uint32_t)ADC_CR2_JEXTSEL_1) |
NYX | 0:85b3fd62ea1a | 200 | #define ADC_EXTERNALTRIGINJECCONV_T2_TRGO ((uint32_t)(ADC_CR2_JEXTSEL_1 | ADC_CR2_JEXTSEL_0)) |
NYX | 0:85b3fd62ea1a | 201 | #define ADC_EXTERNALTRIGINJECCONV_T3_CC2 ((uint32_t)ADC_CR2_JEXTSEL_2) |
NYX | 0:85b3fd62ea1a | 202 | #define ADC_EXTERNALTRIGINJECCONV_T3_CC4 ((uint32_t)(ADC_CR2_JEXTSEL_2 | ADC_CR2_JEXTSEL_0)) |
NYX | 0:85b3fd62ea1a | 203 | #define ADC_EXTERNALTRIGINJECCONV_T4_CC1 ((uint32_t)(ADC_CR2_JEXTSEL_2 | ADC_CR2_JEXTSEL_1)) |
NYX | 0:85b3fd62ea1a | 204 | #define ADC_EXTERNALTRIGINJECCONV_T4_CC2 ((uint32_t)(ADC_CR2_JEXTSEL_2 | ADC_CR2_JEXTSEL_1 | ADC_CR2_JEXTSEL_0)) |
NYX | 0:85b3fd62ea1a | 205 | #define ADC_EXTERNALTRIGINJECCONV_T4_CC3 ((uint32_t)ADC_CR2_JEXTSEL_3) |
NYX | 0:85b3fd62ea1a | 206 | #define ADC_EXTERNALTRIGINJECCONV_T4_TRGO ((uint32_t)(ADC_CR2_JEXTSEL_3 | ADC_CR2_JEXTSEL_0)) |
NYX | 0:85b3fd62ea1a | 207 | #define ADC_EXTERNALTRIGINJECCONV_T5_CC4 ((uint32_t)(ADC_CR2_JEXTSEL_3 | ADC_CR2_JEXTSEL_1)) |
NYX | 0:85b3fd62ea1a | 208 | #define ADC_EXTERNALTRIGINJECCONV_T5_TRGO ((uint32_t)(ADC_CR2_JEXTSEL_3 | ADC_CR2_JEXTSEL_1 | ADC_CR2_JEXTSEL_0)) |
NYX | 0:85b3fd62ea1a | 209 | #define ADC_EXTERNALTRIGINJECCONV_T8_CC2 ((uint32_t)(ADC_CR2_JEXTSEL_3 | ADC_CR2_JEXTSEL_2)) |
NYX | 0:85b3fd62ea1a | 210 | #define ADC_EXTERNALTRIGINJECCONV_T8_CC3 ((uint32_t)(ADC_CR2_JEXTSEL_3 | ADC_CR2_JEXTSEL_2 | ADC_CR2_JEXTSEL_0)) |
NYX | 0:85b3fd62ea1a | 211 | #define ADC_EXTERNALTRIGINJECCONV_T8_CC4 ((uint32_t)(ADC_CR2_JEXTSEL_3 | ADC_CR2_JEXTSEL_2 | ADC_CR2_JEXTSEL_1)) |
NYX | 0:85b3fd62ea1a | 212 | #define ADC_EXTERNALTRIGINJECCONV_EXT_IT15 ((uint32_t)ADC_CR2_JEXTSEL) |
NYX | 0:85b3fd62ea1a | 213 | #define ADC_INJECTED_SOFTWARE_START ((uint32_t)ADC_CR2_JEXTSEL + 1U) |
NYX | 0:85b3fd62ea1a | 214 | /** |
NYX | 0:85b3fd62ea1a | 215 | * @} |
NYX | 0:85b3fd62ea1a | 216 | */ |
NYX | 0:85b3fd62ea1a | 217 | |
NYX | 0:85b3fd62ea1a | 218 | /** @defgroup ADCEx_injected_rank ADC Injected Rank |
NYX | 0:85b3fd62ea1a | 219 | * @{ |
NYX | 0:85b3fd62ea1a | 220 | */ |
NYX | 0:85b3fd62ea1a | 221 | #define ADC_INJECTED_RANK_1 0x00000001U |
NYX | 0:85b3fd62ea1a | 222 | #define ADC_INJECTED_RANK_2 0x00000002U |
NYX | 0:85b3fd62ea1a | 223 | #define ADC_INJECTED_RANK_3 0x00000003U |
NYX | 0:85b3fd62ea1a | 224 | #define ADC_INJECTED_RANK_4 0x00000004U |
NYX | 0:85b3fd62ea1a | 225 | /** |
NYX | 0:85b3fd62ea1a | 226 | * @} |
NYX | 0:85b3fd62ea1a | 227 | */ |
NYX | 0:85b3fd62ea1a | 228 | |
NYX | 0:85b3fd62ea1a | 229 | /** @defgroup ADCEx_channels ADC Specific Channels |
NYX | 0:85b3fd62ea1a | 230 | * @{ |
NYX | 0:85b3fd62ea1a | 231 | */ |
NYX | 0:85b3fd62ea1a | 232 | #if defined(STM32F405xx) || defined(STM32F415xx) || defined(STM32F407xx) || defined(STM32F417xx) || \ |
NYX | 0:85b3fd62ea1a | 233 | defined(STM32F401xC) || defined(STM32F401xE) || defined(STM32F410Tx) || defined(STM32F410Cx) || \ |
NYX | 0:85b3fd62ea1a | 234 | defined(STM32F410Rx) || defined(STM32F412Zx) || defined(STM32F412Vx) || defined(STM32F412Rx) || \ |
NYX | 0:85b3fd62ea1a | 235 | defined(STM32F412Cx) || defined(STM32F413xx) || defined(STM32F423xx) |
NYX | 0:85b3fd62ea1a | 236 | #define ADC_CHANNEL_TEMPSENSOR ((uint32_t)ADC_CHANNEL_16) |
NYX | 0:85b3fd62ea1a | 237 | #endif /* STM32F405xx || STM32F415xx || STM32F407xx || STM32F417xx || STM32F401xC || STM32F401xE || STM32F410xx || STM32F412Zx || |
NYX | 0:85b3fd62ea1a | 238 | STM32F412Vx || STM32F412Rx || STM32F412Cx || STM32F413xx || STM32F423xx */ |
NYX | 0:85b3fd62ea1a | 239 | |
NYX | 0:85b3fd62ea1a | 240 | #if defined(STM32F411xE) || defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx) || \ |
NYX | 0:85b3fd62ea1a | 241 | defined(STM32F446xx) || defined(STM32F469xx) || defined(STM32F479xx) |
NYX | 0:85b3fd62ea1a | 242 | #define ADC_CHANNEL_DIFFERENCIATION_TEMPSENSOR_VBAT 0x10000000U /* Dummy bit for driver internal usage, not used in ADC channel setting registers CR1 or SQRx */ |
NYX | 0:85b3fd62ea1a | 243 | #define ADC_CHANNEL_TEMPSENSOR ((uint32_t)ADC_CHANNEL_18 | ADC_CHANNEL_DIFFERENCIATION_TEMPSENSOR_VBAT) |
NYX | 0:85b3fd62ea1a | 244 | #endif /* STM32F411xE || STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || STM32F446xx || STM32F469xx || STM32F479xx */ |
NYX | 0:85b3fd62ea1a | 245 | /** |
NYX | 0:85b3fd62ea1a | 246 | * @} |
NYX | 0:85b3fd62ea1a | 247 | */ |
NYX | 0:85b3fd62ea1a | 248 | |
NYX | 0:85b3fd62ea1a | 249 | |
NYX | 0:85b3fd62ea1a | 250 | /** |
NYX | 0:85b3fd62ea1a | 251 | * @} |
NYX | 0:85b3fd62ea1a | 252 | */ |
NYX | 0:85b3fd62ea1a | 253 | |
NYX | 0:85b3fd62ea1a | 254 | /* Exported macro ------------------------------------------------------------*/ |
NYX | 0:85b3fd62ea1a | 255 | /** @defgroup ADC_Exported_Macros ADC Exported Macros |
NYX | 0:85b3fd62ea1a | 256 | * @{ |
NYX | 0:85b3fd62ea1a | 257 | */ |
NYX | 0:85b3fd62ea1a | 258 | #if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx)|| defined(STM32F439xx) |
NYX | 0:85b3fd62ea1a | 259 | /** |
NYX | 0:85b3fd62ea1a | 260 | * @brief Disable internal path of ADC channel Vbat |
NYX | 0:85b3fd62ea1a | 261 | * @note Use case of this macro: |
NYX | 0:85b3fd62ea1a | 262 | * On devices STM32F42x and STM32F43x, ADC internal channels |
NYX | 0:85b3fd62ea1a | 263 | * Vbat and VrefInt share the same internal path, only |
NYX | 0:85b3fd62ea1a | 264 | * one of them can be enabled.This macro is to be used when ADC |
NYX | 0:85b3fd62ea1a | 265 | * channels Vbat and VrefInt are selected, and must be called |
NYX | 0:85b3fd62ea1a | 266 | * before starting conversion of ADC channel VrefInt in order |
NYX | 0:85b3fd62ea1a | 267 | * to disable ADC channel Vbat. |
NYX | 0:85b3fd62ea1a | 268 | * @retval None |
NYX | 0:85b3fd62ea1a | 269 | */ |
NYX | 0:85b3fd62ea1a | 270 | #define __HAL_ADC_PATH_INTERNAL_VBAT_DISABLE() (ADC->CCR &= ~(ADC_CCR_VBATE)) |
NYX | 0:85b3fd62ea1a | 271 | #endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx */ |
NYX | 0:85b3fd62ea1a | 272 | /** |
NYX | 0:85b3fd62ea1a | 273 | * @} |
NYX | 0:85b3fd62ea1a | 274 | */ |
NYX | 0:85b3fd62ea1a | 275 | |
NYX | 0:85b3fd62ea1a | 276 | /* Exported functions --------------------------------------------------------*/ |
NYX | 0:85b3fd62ea1a | 277 | /** @addtogroup ADCEx_Exported_Functions |
NYX | 0:85b3fd62ea1a | 278 | * @{ |
NYX | 0:85b3fd62ea1a | 279 | */ |
NYX | 0:85b3fd62ea1a | 280 | |
NYX | 0:85b3fd62ea1a | 281 | /** @addtogroup ADCEx_Exported_Functions_Group1 |
NYX | 0:85b3fd62ea1a | 282 | * @{ |
NYX | 0:85b3fd62ea1a | 283 | */ |
NYX | 0:85b3fd62ea1a | 284 | |
NYX | 0:85b3fd62ea1a | 285 | /* I/O operation functions ******************************************************/ |
NYX | 0:85b3fd62ea1a | 286 | HAL_StatusTypeDef HAL_ADCEx_InjectedStart(ADC_HandleTypeDef* hadc); |
NYX | 0:85b3fd62ea1a | 287 | HAL_StatusTypeDef HAL_ADCEx_InjectedStop(ADC_HandleTypeDef* hadc); |
NYX | 0:85b3fd62ea1a | 288 | HAL_StatusTypeDef HAL_ADCEx_InjectedPollForConversion(ADC_HandleTypeDef* hadc, uint32_t Timeout); |
NYX | 0:85b3fd62ea1a | 289 | HAL_StatusTypeDef HAL_ADCEx_InjectedStart_IT(ADC_HandleTypeDef* hadc); |
NYX | 0:85b3fd62ea1a | 290 | HAL_StatusTypeDef HAL_ADCEx_InjectedStop_IT(ADC_HandleTypeDef* hadc); |
NYX | 0:85b3fd62ea1a | 291 | uint32_t HAL_ADCEx_InjectedGetValue(ADC_HandleTypeDef* hadc, uint32_t InjectedRank); |
NYX | 0:85b3fd62ea1a | 292 | HAL_StatusTypeDef HAL_ADCEx_MultiModeStart_DMA(ADC_HandleTypeDef* hadc, uint32_t* pData, uint32_t Length); |
NYX | 0:85b3fd62ea1a | 293 | HAL_StatusTypeDef HAL_ADCEx_MultiModeStop_DMA(ADC_HandleTypeDef* hadc); |
NYX | 0:85b3fd62ea1a | 294 | uint32_t HAL_ADCEx_MultiModeGetValue(ADC_HandleTypeDef* hadc); |
NYX | 0:85b3fd62ea1a | 295 | void HAL_ADCEx_InjectedConvCpltCallback(ADC_HandleTypeDef* hadc); |
NYX | 0:85b3fd62ea1a | 296 | |
NYX | 0:85b3fd62ea1a | 297 | /* Peripheral Control functions *************************************************/ |
NYX | 0:85b3fd62ea1a | 298 | HAL_StatusTypeDef HAL_ADCEx_InjectedConfigChannel(ADC_HandleTypeDef* hadc,ADC_InjectionConfTypeDef* sConfigInjected); |
NYX | 0:85b3fd62ea1a | 299 | HAL_StatusTypeDef HAL_ADCEx_MultiModeConfigChannel(ADC_HandleTypeDef* hadc, ADC_MultiModeTypeDef* multimode); |
NYX | 0:85b3fd62ea1a | 300 | |
NYX | 0:85b3fd62ea1a | 301 | /** |
NYX | 0:85b3fd62ea1a | 302 | * @} |
NYX | 0:85b3fd62ea1a | 303 | */ |
NYX | 0:85b3fd62ea1a | 304 | |
NYX | 0:85b3fd62ea1a | 305 | /** |
NYX | 0:85b3fd62ea1a | 306 | * @} |
NYX | 0:85b3fd62ea1a | 307 | */ |
NYX | 0:85b3fd62ea1a | 308 | /* Private types -------------------------------------------------------------*/ |
NYX | 0:85b3fd62ea1a | 309 | /* Private variables ---------------------------------------------------------*/ |
NYX | 0:85b3fd62ea1a | 310 | /* Private constants ---------------------------------------------------------*/ |
NYX | 0:85b3fd62ea1a | 311 | /** @defgroup ADCEx_Private_Constants ADC Private Constants |
NYX | 0:85b3fd62ea1a | 312 | * @{ |
NYX | 0:85b3fd62ea1a | 313 | */ |
NYX | 0:85b3fd62ea1a | 314 | |
NYX | 0:85b3fd62ea1a | 315 | /** |
NYX | 0:85b3fd62ea1a | 316 | * @} |
NYX | 0:85b3fd62ea1a | 317 | */ |
NYX | 0:85b3fd62ea1a | 318 | |
NYX | 0:85b3fd62ea1a | 319 | /* Private macros ------------------------------------------------------------*/ |
NYX | 0:85b3fd62ea1a | 320 | /** @defgroup ADCEx_Private_Macros ADC Private Macros |
NYX | 0:85b3fd62ea1a | 321 | * @{ |
NYX | 0:85b3fd62ea1a | 322 | */ |
NYX | 0:85b3fd62ea1a | 323 | #if defined(STM32F405xx) || defined(STM32F415xx) || defined(STM32F407xx) || defined(STM32F417xx) || \ |
NYX | 0:85b3fd62ea1a | 324 | defined(STM32F401xC) || defined(STM32F401xE) || defined(STM32F410Tx) || defined(STM32F410Cx) || \ |
NYX | 0:85b3fd62ea1a | 325 | defined(STM32F410Rx) || defined(STM32F411xE) || defined(STM32F412Zx) || defined(STM32F412Vx) || \ |
NYX | 0:85b3fd62ea1a | 326 | defined(STM32F412Rx) || defined(STM32F412Cx) || defined(STM32F413xx) || defined(STM32F423xx) |
NYX | 0:85b3fd62ea1a | 327 | #define IS_ADC_CHANNEL(CHANNEL) ((CHANNEL) <= ADC_CHANNEL_18) |
NYX | 0:85b3fd62ea1a | 328 | #endif /* STM32F405xx || STM32F415xx || STM32F407xx || STM32F417xx || STM32F401xC || STM32F401xE || STM32F410xx || STM32F411xE || |
NYX | 0:85b3fd62ea1a | 329 | STM32F412Zx || STM32F412Vx || STM32F412Rx || STM32F412Cx || STM32F413xx || STM32F423xx */ |
NYX | 0:85b3fd62ea1a | 330 | |
NYX | 0:85b3fd62ea1a | 331 | #if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx) || \ |
NYX | 0:85b3fd62ea1a | 332 | defined(STM32F446xx) || defined(STM32F469xx) || defined(STM32F479xx) |
NYX | 0:85b3fd62ea1a | 333 | #define IS_ADC_CHANNEL(CHANNEL) (((CHANNEL) <= ADC_CHANNEL_18) || \ |
NYX | 0:85b3fd62ea1a | 334 | ((CHANNEL) == ADC_CHANNEL_TEMPSENSOR)) |
NYX | 0:85b3fd62ea1a | 335 | #endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || STM32F446xx || STM32F469xx || STM32F479xx */ |
NYX | 0:85b3fd62ea1a | 336 | |
NYX | 0:85b3fd62ea1a | 337 | #define IS_ADC_MODE(MODE) (((MODE) == ADC_MODE_INDEPENDENT) || \ |
NYX | 0:85b3fd62ea1a | 338 | ((MODE) == ADC_DUALMODE_REGSIMULT_INJECSIMULT) || \ |
NYX | 0:85b3fd62ea1a | 339 | ((MODE) == ADC_DUALMODE_REGSIMULT_ALTERTRIG) || \ |
NYX | 0:85b3fd62ea1a | 340 | ((MODE) == ADC_DUALMODE_INJECSIMULT) || \ |
NYX | 0:85b3fd62ea1a | 341 | ((MODE) == ADC_DUALMODE_REGSIMULT) || \ |
NYX | 0:85b3fd62ea1a | 342 | ((MODE) == ADC_DUALMODE_INTERL) || \ |
NYX | 0:85b3fd62ea1a | 343 | ((MODE) == ADC_DUALMODE_ALTERTRIG) || \ |
NYX | 0:85b3fd62ea1a | 344 | ((MODE) == ADC_TRIPLEMODE_REGSIMULT_INJECSIMULT) || \ |
NYX | 0:85b3fd62ea1a | 345 | ((MODE) == ADC_TRIPLEMODE_REGSIMULT_AlterTrig) || \ |
NYX | 0:85b3fd62ea1a | 346 | ((MODE) == ADC_TRIPLEMODE_INJECSIMULT) || \ |
NYX | 0:85b3fd62ea1a | 347 | ((MODE) == ADC_TRIPLEMODE_REGSIMULT) || \ |
NYX | 0:85b3fd62ea1a | 348 | ((MODE) == ADC_TRIPLEMODE_INTERL) || \ |
NYX | 0:85b3fd62ea1a | 349 | ((MODE) == ADC_TRIPLEMODE_ALTERTRIG)) |
NYX | 0:85b3fd62ea1a | 350 | #define IS_ADC_DMA_ACCESS_MODE(MODE) (((MODE) == ADC_DMAACCESSMODE_DISABLED) || \ |
NYX | 0:85b3fd62ea1a | 351 | ((MODE) == ADC_DMAACCESSMODE_1) || \ |
NYX | 0:85b3fd62ea1a | 352 | ((MODE) == ADC_DMAACCESSMODE_2) || \ |
NYX | 0:85b3fd62ea1a | 353 | ((MODE) == ADC_DMAACCESSMODE_3)) |
NYX | 0:85b3fd62ea1a | 354 | #define IS_ADC_EXT_INJEC_TRIG_EDGE(EDGE) (((EDGE) == ADC_EXTERNALTRIGINJECCONVEDGE_NONE) || \ |
NYX | 0:85b3fd62ea1a | 355 | ((EDGE) == ADC_EXTERNALTRIGINJECCONVEDGE_RISING) || \ |
NYX | 0:85b3fd62ea1a | 356 | ((EDGE) == ADC_EXTERNALTRIGINJECCONVEDGE_FALLING) || \ |
NYX | 0:85b3fd62ea1a | 357 | ((EDGE) == ADC_EXTERNALTRIGINJECCONVEDGE_RISINGFALLING)) |
NYX | 0:85b3fd62ea1a | 358 | #define IS_ADC_EXT_INJEC_TRIG(INJTRIG) (((INJTRIG) == ADC_EXTERNALTRIGINJECCONV_T1_CC4) || \ |
NYX | 0:85b3fd62ea1a | 359 | ((INJTRIG) == ADC_EXTERNALTRIGINJECCONV_T1_TRGO) || \ |
NYX | 0:85b3fd62ea1a | 360 | ((INJTRIG) == ADC_EXTERNALTRIGINJECCONV_T2_CC1) || \ |
NYX | 0:85b3fd62ea1a | 361 | ((INJTRIG) == ADC_EXTERNALTRIGINJECCONV_T2_TRGO) || \ |
NYX | 0:85b3fd62ea1a | 362 | ((INJTRIG) == ADC_EXTERNALTRIGINJECCONV_T3_CC2) || \ |
NYX | 0:85b3fd62ea1a | 363 | ((INJTRIG) == ADC_EXTERNALTRIGINJECCONV_T3_CC4) || \ |
NYX | 0:85b3fd62ea1a | 364 | ((INJTRIG) == ADC_EXTERNALTRIGINJECCONV_T4_CC1) || \ |
NYX | 0:85b3fd62ea1a | 365 | ((INJTRIG) == ADC_EXTERNALTRIGINJECCONV_T4_CC2) || \ |
NYX | 0:85b3fd62ea1a | 366 | ((INJTRIG) == ADC_EXTERNALTRIGINJECCONV_T4_CC3) || \ |
NYX | 0:85b3fd62ea1a | 367 | ((INJTRIG) == ADC_EXTERNALTRIGINJECCONV_T4_TRGO) || \ |
NYX | 0:85b3fd62ea1a | 368 | ((INJTRIG) == ADC_EXTERNALTRIGINJECCONV_T5_CC4) || \ |
NYX | 0:85b3fd62ea1a | 369 | ((INJTRIG) == ADC_EXTERNALTRIGINJECCONV_T5_TRGO) || \ |
NYX | 0:85b3fd62ea1a | 370 | ((INJTRIG) == ADC_EXTERNALTRIGINJECCONV_T8_CC2) || \ |
NYX | 0:85b3fd62ea1a | 371 | ((INJTRIG) == ADC_EXTERNALTRIGINJECCONV_T8_CC3) || \ |
NYX | 0:85b3fd62ea1a | 372 | ((INJTRIG) == ADC_EXTERNALTRIGINJECCONV_T8_CC4) || \ |
NYX | 0:85b3fd62ea1a | 373 | ((INJTRIG) == ADC_EXTERNALTRIGINJECCONV_EXT_IT15)|| \ |
NYX | 0:85b3fd62ea1a | 374 | ((INJTRIG) == ADC_INJECTED_SOFTWARE_START)) |
NYX | 0:85b3fd62ea1a | 375 | #define IS_ADC_INJECTED_LENGTH(LENGTH) (((LENGTH) >= 1U) && ((LENGTH) <= 4U)) |
NYX | 0:85b3fd62ea1a | 376 | #define IS_ADC_INJECTED_RANK(RANK) (((RANK) >= 1U) && ((RANK) <= 4U)) |
NYX | 0:85b3fd62ea1a | 377 | |
NYX | 0:85b3fd62ea1a | 378 | /** |
NYX | 0:85b3fd62ea1a | 379 | * @brief Set the selected injected Channel rank. |
NYX | 0:85b3fd62ea1a | 380 | * @param _CHANNELNB_: Channel number. |
NYX | 0:85b3fd62ea1a | 381 | * @param _RANKNB_: Rank number. |
NYX | 0:85b3fd62ea1a | 382 | * @param _JSQR_JL_: Sequence length. |
NYX | 0:85b3fd62ea1a | 383 | * @retval None |
NYX | 0:85b3fd62ea1a | 384 | */ |
NYX | 0:85b3fd62ea1a | 385 | #define ADC_JSQR(_CHANNELNB_, _RANKNB_, _JSQR_JL_) (((uint32_t)((uint16_t)(_CHANNELNB_))) << (5U * (uint8_t)(((_RANKNB_) + 3U) - (_JSQR_JL_)))) |
NYX | 0:85b3fd62ea1a | 386 | |
NYX | 0:85b3fd62ea1a | 387 | /** |
NYX | 0:85b3fd62ea1a | 388 | * @brief Defines if the selected ADC is within ADC common register ADC123 or ADC1 |
NYX | 0:85b3fd62ea1a | 389 | * if available (ADC2, ADC3 availability depends on STM32 product) |
NYX | 0:85b3fd62ea1a | 390 | * @param __HANDLE__: ADC handle |
NYX | 0:85b3fd62ea1a | 391 | * @retval Common control register ADC123 or ADC1 |
NYX | 0:85b3fd62ea1a | 392 | */ |
NYX | 0:85b3fd62ea1a | 393 | #if defined(STM32F405xx) || defined(STM32F407xx) || defined(STM32F415xx) || defined(STM32F417xx) || defined(STM32F427xx) || defined(STM32F429xx) || defined(STM32F437xx) || defined(STM32F439xx) || defined(STM32F446xx) || defined(STM32F469xx) || defined(STM32F479xx) |
NYX | 0:85b3fd62ea1a | 394 | #define ADC_COMMON_REGISTER(__HANDLE__) ADC123_COMMON |
NYX | 0:85b3fd62ea1a | 395 | #else |
NYX | 0:85b3fd62ea1a | 396 | #define ADC_COMMON_REGISTER(__HANDLE__) ADC1_COMMON |
NYX | 0:85b3fd62ea1a | 397 | #endif /* STM32F405xx || STM32F407xx || STM32F415xx || STM32F417xx || STM32F427xx || STM32F429xx || STM32F437xx || STM32F439xx || STM32F446xx || STM32F469xx || STM32F479xx */ |
NYX | 0:85b3fd62ea1a | 398 | /** |
NYX | 0:85b3fd62ea1a | 399 | * @} |
NYX | 0:85b3fd62ea1a | 400 | */ |
NYX | 0:85b3fd62ea1a | 401 | |
NYX | 0:85b3fd62ea1a | 402 | /* Private functions ---------------------------------------------------------*/ |
NYX | 0:85b3fd62ea1a | 403 | /** @defgroup ADCEx_Private_Functions ADC Private Functions |
NYX | 0:85b3fd62ea1a | 404 | * @{ |
NYX | 0:85b3fd62ea1a | 405 | */ |
NYX | 0:85b3fd62ea1a | 406 | |
NYX | 0:85b3fd62ea1a | 407 | /** |
NYX | 0:85b3fd62ea1a | 408 | * @} |
NYX | 0:85b3fd62ea1a | 409 | */ |
NYX | 0:85b3fd62ea1a | 410 | |
NYX | 0:85b3fd62ea1a | 411 | /** |
NYX | 0:85b3fd62ea1a | 412 | * @} |
NYX | 0:85b3fd62ea1a | 413 | */ |
NYX | 0:85b3fd62ea1a | 414 | |
NYX | 0:85b3fd62ea1a | 415 | /** |
NYX | 0:85b3fd62ea1a | 416 | * @} |
NYX | 0:85b3fd62ea1a | 417 | */ |
NYX | 0:85b3fd62ea1a | 418 | |
NYX | 0:85b3fd62ea1a | 419 | #ifdef __cplusplus |
NYX | 0:85b3fd62ea1a | 420 | } |
NYX | 0:85b3fd62ea1a | 421 | #endif |
NYX | 0:85b3fd62ea1a | 422 | |
NYX | 0:85b3fd62ea1a | 423 | #endif /*__STM32F4xx_ADC_EX_H */ |
NYX | 0:85b3fd62ea1a | 424 | |
NYX | 0:85b3fd62ea1a | 425 | |
NYX | 0:85b3fd62ea1a | 426 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |