Takaaki Numai / mbed-dev

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Dependents:   Hobbyking_Cheetah_0511

targets/TARGET_STM/TARGET_STM32F4/device/stm32f4xx_hal_adc_ex.c@0:85b3fd62ea1a, 2020-03-16 (annotated)

Committer:
NYX
Date:
Mon Mar 16 06:35:48 2020 +0000
Revision:
0:85b3fd62ea1a
reinport to mbed;

Who changed what in which revision?

UserRevisionLine numberNew contents of line
NYX 0:85b3fd62ea1a 1 /**
NYX 0:85b3fd62ea1a 2 ******************************************************************************
NYX 0:85b3fd62ea1a 3 * @file stm32f4xx_hal_adc_ex.c
NYX 0:85b3fd62ea1a 4 * @author MCD Application Team
NYX 0:85b3fd62ea1a 5 * @version V1.7.1
NYX 0:85b3fd62ea1a 6 * @date 14-April-2017
NYX 0:85b3fd62ea1a 7 * @brief This file provides firmware functions to manage the following
NYX 0:85b3fd62ea1a 8 * functionalities of the ADC extension peripheral:
NYX 0:85b3fd62ea1a 9 * + Extended features functions
NYX 0:85b3fd62ea1a 10 *
NYX 0:85b3fd62ea1a 11 @verbatim
NYX 0:85b3fd62ea1a 12 ==============================================================================
NYX 0:85b3fd62ea1a 13 ##### How to use this driver #####
NYX 0:85b3fd62ea1a 14 ==============================================================================
NYX 0:85b3fd62ea1a 15 [..]
NYX 0:85b3fd62ea1a 16 (#)Initialize the ADC low level resources by implementing the HAL_ADC_MspInit():
NYX 0:85b3fd62ea1a 17 (##) Enable the ADC interface clock using __HAL_RCC_ADC_CLK_ENABLE()
NYX 0:85b3fd62ea1a 18 (##) ADC pins configuration
NYX 0:85b3fd62ea1a 19 (+++) Enable the clock for the ADC GPIOs using the following function:
NYX 0:85b3fd62ea1a 20 __HAL_RCC_GPIOx_CLK_ENABLE()
NYX 0:85b3fd62ea1a 21 (+++) Configure these ADC pins in analog mode using HAL_GPIO_Init()
NYX 0:85b3fd62ea1a 22 (##) In case of using interrupts (e.g. HAL_ADC_Start_IT())
NYX 0:85b3fd62ea1a 23 (+++) Configure the ADC interrupt priority using HAL_NVIC_SetPriority()
NYX 0:85b3fd62ea1a 24 (+++) Enable the ADC IRQ handler using HAL_NVIC_EnableIRQ()
NYX 0:85b3fd62ea1a 25 (+++) In ADC IRQ handler, call HAL_ADC_IRQHandler()
NYX 0:85b3fd62ea1a 26 (##) In case of using DMA to control data transfer (e.g. HAL_ADC_Start_DMA())
NYX 0:85b3fd62ea1a 27 (+++) Enable the DMAx interface clock using __HAL_RCC_DMAx_CLK_ENABLE()
NYX 0:85b3fd62ea1a 28 (+++) Configure and enable two DMA streams stream for managing data
NYX 0:85b3fd62ea1a 29 transfer from peripheral to memory (output stream)
NYX 0:85b3fd62ea1a 30 (+++) Associate the initialized DMA handle to the ADC DMA handle
NYX 0:85b3fd62ea1a 31 using __HAL_LINKDMA()
NYX 0:85b3fd62ea1a 32 (+++) Configure the priority and enable the NVIC for the transfer complete
NYX 0:85b3fd62ea1a 33 interrupt on the two DMA Streams. The output stream should have higher
NYX 0:85b3fd62ea1a 34 priority than the input stream.
NYX 0:85b3fd62ea1a 35 (#) Configure the ADC Prescaler, conversion resolution and data alignment
NYX 0:85b3fd62ea1a 36 using the HAL_ADC_Init() function.
NYX 0:85b3fd62ea1a 37
NYX 0:85b3fd62ea1a 38 (#) Configure the ADC Injected channels group features, use HAL_ADC_Init()
NYX 0:85b3fd62ea1a 39 and HAL_ADC_ConfigChannel() functions.
NYX 0:85b3fd62ea1a 40
NYX 0:85b3fd62ea1a 41 (#) Three operation modes are available within this driver :
NYX 0:85b3fd62ea1a 42
NYX 0:85b3fd62ea1a 43 *** Polling mode IO operation ***
NYX 0:85b3fd62ea1a 44 =================================
NYX 0:85b3fd62ea1a 45 [..]
NYX 0:85b3fd62ea1a 46 (+) Start the ADC peripheral using HAL_ADCEx_InjectedStart()
NYX 0:85b3fd62ea1a 47 (+) Wait for end of conversion using HAL_ADC_PollForConversion(), at this stage
NYX 0:85b3fd62ea1a 48 user can specify the value of timeout according to his end application
NYX 0:85b3fd62ea1a 49 (+) To read the ADC converted values, use the HAL_ADCEx_InjectedGetValue() function.
NYX 0:85b3fd62ea1a 50 (+) Stop the ADC peripheral using HAL_ADCEx_InjectedStop()
NYX 0:85b3fd62ea1a 51
NYX 0:85b3fd62ea1a 52 *** Interrupt mode IO operation ***
NYX 0:85b3fd62ea1a 53 ===================================
NYX 0:85b3fd62ea1a 54 [..]
NYX 0:85b3fd62ea1a 55 (+) Start the ADC peripheral using HAL_ADCEx_InjectedStart_IT()
NYX 0:85b3fd62ea1a 56 (+) Use HAL_ADC_IRQHandler() called under ADC_IRQHandler() Interrupt subroutine
NYX 0:85b3fd62ea1a 57 (+) At ADC end of conversion HAL_ADCEx_InjectedConvCpltCallback() function is executed and user can
NYX 0:85b3fd62ea1a 58 add his own code by customization of function pointer HAL_ADCEx_InjectedConvCpltCallback
NYX 0:85b3fd62ea1a 59 (+) In case of ADC Error, HAL_ADCEx_InjectedErrorCallback() function is executed and user can
NYX 0:85b3fd62ea1a 60 add his own code by customization of function pointer HAL_ADCEx_InjectedErrorCallback
NYX 0:85b3fd62ea1a 61 (+) Stop the ADC peripheral using HAL_ADCEx_InjectedStop_IT()
NYX 0:85b3fd62ea1a 62
NYX 0:85b3fd62ea1a 63
NYX 0:85b3fd62ea1a 64 *** DMA mode IO operation ***
NYX 0:85b3fd62ea1a 65 ==============================
NYX 0:85b3fd62ea1a 66 [..]
NYX 0:85b3fd62ea1a 67 (+) Start the ADC peripheral using HAL_ADCEx_InjectedStart_DMA(), at this stage the user specify the length
NYX 0:85b3fd62ea1a 68 of data to be transferred at each end of conversion
NYX 0:85b3fd62ea1a 69 (+) At The end of data transfer ba HAL_ADCEx_InjectedConvCpltCallback() function is executed and user can
NYX 0:85b3fd62ea1a 70 add his own code by customization of function pointer HAL_ADCEx_InjectedConvCpltCallback
NYX 0:85b3fd62ea1a 71 (+) In case of transfer Error, HAL_ADCEx_InjectedErrorCallback() function is executed and user can
NYX 0:85b3fd62ea1a 72 add his own code by customization of function pointer HAL_ADCEx_InjectedErrorCallback
NYX 0:85b3fd62ea1a 73 (+) Stop the ADC peripheral using HAL_ADCEx_InjectedStop_DMA()
NYX 0:85b3fd62ea1a 74
NYX 0:85b3fd62ea1a 75 *** Multi mode ADCs Regular channels configuration ***
NYX 0:85b3fd62ea1a 76 ======================================================
NYX 0:85b3fd62ea1a 77 [..]
NYX 0:85b3fd62ea1a 78 (+) Select the Multi mode ADC regular channels features (dual or triple mode)
NYX 0:85b3fd62ea1a 79 and configure the DMA mode using HAL_ADCEx_MultiModeConfigChannel() functions.
NYX 0:85b3fd62ea1a 80 (+) Start the ADC peripheral using HAL_ADCEx_MultiModeStart_DMA(), at this stage the user specify the length
NYX 0:85b3fd62ea1a 81 of data to be transferred at each end of conversion
NYX 0:85b3fd62ea1a 82 (+) Read the ADCs converted values using the HAL_ADCEx_MultiModeGetValue() function.
NYX 0:85b3fd62ea1a 83
NYX 0:85b3fd62ea1a 84
NYX 0:85b3fd62ea1a 85 @endverbatim
NYX 0:85b3fd62ea1a 86 ******************************************************************************
NYX 0:85b3fd62ea1a 87 * @attention
NYX 0:85b3fd62ea1a 88 *
NYX 0:85b3fd62ea1a 89 * <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
NYX 0:85b3fd62ea1a 90 *
NYX 0:85b3fd62ea1a 91 * Redistribution and use in source and binary forms, with or without modification,
NYX 0:85b3fd62ea1a 92 * are permitted provided that the following conditions are met:
NYX 0:85b3fd62ea1a 93 * 1. Redistributions of source code must retain the above copyright notice,
NYX 0:85b3fd62ea1a 94 * this list of conditions and the following disclaimer.
NYX 0:85b3fd62ea1a 95 * 2. Redistributions in binary form must reproduce the above copyright notice,
NYX 0:85b3fd62ea1a 96 * this list of conditions and the following disclaimer in the documentation
NYX 0:85b3fd62ea1a 97 * and/or other materials provided with the distribution.
NYX 0:85b3fd62ea1a 98 * 3. Neither the name of STMicroelectronics nor the names of its contributors
NYX 0:85b3fd62ea1a 99 * may be used to endorse or promote products derived from this software
NYX 0:85b3fd62ea1a 100 * without specific prior written permission.
NYX 0:85b3fd62ea1a 101 *
NYX 0:85b3fd62ea1a 102 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
NYX 0:85b3fd62ea1a 103 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
NYX 0:85b3fd62ea1a 104 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
NYX 0:85b3fd62ea1a 105 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
NYX 0:85b3fd62ea1a 106 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
NYX 0:85b3fd62ea1a 107 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
NYX 0:85b3fd62ea1a 108 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
NYX 0:85b3fd62ea1a 109 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
NYX 0:85b3fd62ea1a 110 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
NYX 0:85b3fd62ea1a 111 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
NYX 0:85b3fd62ea1a 112 *
NYX 0:85b3fd62ea1a 113 ******************************************************************************
NYX 0:85b3fd62ea1a 114 */
NYX 0:85b3fd62ea1a 115
NYX 0:85b3fd62ea1a 116 /* Includes ------------------------------------------------------------------*/
NYX 0:85b3fd62ea1a 117 #include "stm32f4xx_hal.h"
NYX 0:85b3fd62ea1a 118
NYX 0:85b3fd62ea1a 119 /** @addtogroup STM32F4xx_HAL_Driver
NYX 0:85b3fd62ea1a 120 * @{
NYX 0:85b3fd62ea1a 121 */
NYX 0:85b3fd62ea1a 122
NYX 0:85b3fd62ea1a 123 /** @defgroup ADCEx ADCEx
NYX 0:85b3fd62ea1a 124 * @brief ADC Extended driver modules
NYX 0:85b3fd62ea1a 125 * @{
NYX 0:85b3fd62ea1a 126 */
NYX 0:85b3fd62ea1a 127
NYX 0:85b3fd62ea1a 128 #ifdef HAL_ADC_MODULE_ENABLED
NYX 0:85b3fd62ea1a 129
NYX 0:85b3fd62ea1a 130 /* Private typedef -----------------------------------------------------------*/
NYX 0:85b3fd62ea1a 131 /* Private define ------------------------------------------------------------*/
NYX 0:85b3fd62ea1a 132 /* Private macro -------------------------------------------------------------*/
NYX 0:85b3fd62ea1a 133 /* Private variables ---------------------------------------------------------*/
NYX 0:85b3fd62ea1a 134 /** @addtogroup ADCEx_Private_Functions
NYX 0:85b3fd62ea1a 135 * @{
NYX 0:85b3fd62ea1a 136 */
NYX 0:85b3fd62ea1a 137 /* Private function prototypes -----------------------------------------------*/
NYX 0:85b3fd62ea1a 138 static void ADC_MultiModeDMAConvCplt(DMA_HandleTypeDef *hdma);
NYX 0:85b3fd62ea1a 139 static void ADC_MultiModeDMAError(DMA_HandleTypeDef *hdma);
NYX 0:85b3fd62ea1a 140 static void ADC_MultiModeDMAHalfConvCplt(DMA_HandleTypeDef *hdma);
NYX 0:85b3fd62ea1a 141 /**
NYX 0:85b3fd62ea1a 142 * @}
NYX 0:85b3fd62ea1a 143 */
NYX 0:85b3fd62ea1a 144
NYX 0:85b3fd62ea1a 145 /* Exported functions --------------------------------------------------------*/
NYX 0:85b3fd62ea1a 146 /** @defgroup ADCEx_Exported_Functions ADC Exported Functions
NYX 0:85b3fd62ea1a 147 * @{
NYX 0:85b3fd62ea1a 148 */
NYX 0:85b3fd62ea1a 149
NYX 0:85b3fd62ea1a 150 /** @defgroup ADCEx_Exported_Functions_Group1 Extended features functions
NYX 0:85b3fd62ea1a 151 * @brief Extended features functions
NYX 0:85b3fd62ea1a 152 *
NYX 0:85b3fd62ea1a 153 @verbatim
NYX 0:85b3fd62ea1a 154 ===============================================================================
NYX 0:85b3fd62ea1a 155 ##### Extended features functions #####
NYX 0:85b3fd62ea1a 156 ===============================================================================
NYX 0:85b3fd62ea1a 157 [..] This section provides functions allowing to:
NYX 0:85b3fd62ea1a 158 (+) Start conversion of injected channel.
NYX 0:85b3fd62ea1a 159 (+) Stop conversion of injected channel.
NYX 0:85b3fd62ea1a 160 (+) Start multimode and enable DMA transfer.
NYX 0:85b3fd62ea1a 161 (+) Stop multimode and disable DMA transfer.
NYX 0:85b3fd62ea1a 162 (+) Get result of injected channel conversion.
NYX 0:85b3fd62ea1a 163 (+) Get result of multimode conversion.
NYX 0:85b3fd62ea1a 164 (+) Configure injected channels.
NYX 0:85b3fd62ea1a 165 (+) Configure multimode.
NYX 0:85b3fd62ea1a 166
NYX 0:85b3fd62ea1a 167 @endverbatim
NYX 0:85b3fd62ea1a 168 * @{
NYX 0:85b3fd62ea1a 169 */
NYX 0:85b3fd62ea1a 170
NYX 0:85b3fd62ea1a 171 /**
NYX 0:85b3fd62ea1a 172 * @brief Enables the selected ADC software start conversion of the injected channels.
NYX 0:85b3fd62ea1a 173 * @param hadc: pointer to a ADC_HandleTypeDef structure that contains
NYX 0:85b3fd62ea1a 174 * the configuration information for the specified ADC.
NYX 0:85b3fd62ea1a 175 * @retval HAL status
NYX 0:85b3fd62ea1a 176 */
NYX 0:85b3fd62ea1a 177 HAL_StatusTypeDef HAL_ADCEx_InjectedStart(ADC_HandleTypeDef* hadc)
NYX 0:85b3fd62ea1a 178 {
NYX 0:85b3fd62ea1a 179 __IO uint32_t counter = 0U;
NYX 0:85b3fd62ea1a 180 uint32_t tmp1 = 0U, tmp2 = 0U;
NYX 0:85b3fd62ea1a 181 ADC_Common_TypeDef *tmpADC_Common;
NYX 0:85b3fd62ea1a 182
NYX 0:85b3fd62ea1a 183 /* Process locked */
NYX 0:85b3fd62ea1a 184 __HAL_LOCK(hadc);
NYX 0:85b3fd62ea1a 185
NYX 0:85b3fd62ea1a 186 /* Enable the ADC peripheral */
NYX 0:85b3fd62ea1a 187
NYX 0:85b3fd62ea1a 188 /* Check if ADC peripheral is disabled in order to enable it and wait during
NYX 0:85b3fd62ea1a 189 Tstab time the ADC's stabilization */
NYX 0:85b3fd62ea1a 190 if((hadc->Instance->CR2 & ADC_CR2_ADON) != ADC_CR2_ADON)
NYX 0:85b3fd62ea1a 191 {
NYX 0:85b3fd62ea1a 192 /* Enable the Peripheral */
NYX 0:85b3fd62ea1a 193 __HAL_ADC_ENABLE(hadc);
NYX 0:85b3fd62ea1a 194
NYX 0:85b3fd62ea1a 195 /* Delay for ADC stabilization time */
NYX 0:85b3fd62ea1a 196 /* Compute number of CPU cycles to wait for */
NYX 0:85b3fd62ea1a 197 counter = (ADC_STAB_DELAY_US * (SystemCoreClock / 1000000U));
NYX 0:85b3fd62ea1a 198 while(counter != 0U)
NYX 0:85b3fd62ea1a 199 {
NYX 0:85b3fd62ea1a 200 counter--;
NYX 0:85b3fd62ea1a 201 }
NYX 0:85b3fd62ea1a 202 }
NYX 0:85b3fd62ea1a 203
NYX 0:85b3fd62ea1a 204 /* Start conversion if ADC is effectively enabled */
NYX 0:85b3fd62ea1a 205 if(HAL_IS_BIT_SET(hadc->Instance->CR2, ADC_CR2_ADON))
NYX 0:85b3fd62ea1a 206 {
NYX 0:85b3fd62ea1a 207 /* Set ADC state */
NYX 0:85b3fd62ea1a 208 /* - Clear state bitfield related to injected group conversion results */
NYX 0:85b3fd62ea1a 209 /* - Set state bitfield related to injected operation */
NYX 0:85b3fd62ea1a 210 ADC_STATE_CLR_SET(hadc->State,
NYX 0:85b3fd62ea1a 211 HAL_ADC_STATE_READY | HAL_ADC_STATE_INJ_EOC,
NYX 0:85b3fd62ea1a 212 HAL_ADC_STATE_INJ_BUSY);
NYX 0:85b3fd62ea1a 213
NYX 0:85b3fd62ea1a 214 /* Check if a regular conversion is ongoing */
NYX 0:85b3fd62ea1a 215 /* Note: On this device, there is no ADC error code fields related to */
NYX 0:85b3fd62ea1a 216 /* conversions on group injected only. In case of conversion on */
NYX 0:85b3fd62ea1a 217 /* going on group regular, no error code is reset. */
NYX 0:85b3fd62ea1a 218 if (HAL_IS_BIT_CLR(hadc->State, HAL_ADC_STATE_REG_BUSY))
NYX 0:85b3fd62ea1a 219 {
NYX 0:85b3fd62ea1a 220 /* Reset ADC all error code fields */
NYX 0:85b3fd62ea1a 221 ADC_CLEAR_ERRORCODE(hadc);
NYX 0:85b3fd62ea1a 222 }
NYX 0:85b3fd62ea1a 223
NYX 0:85b3fd62ea1a 224 /* Process unlocked */
NYX 0:85b3fd62ea1a 225 /* Unlock before starting ADC conversions: in case of potential */
NYX 0:85b3fd62ea1a 226 /* interruption, to let the process to ADC IRQ Handler. */
NYX 0:85b3fd62ea1a 227 __HAL_UNLOCK(hadc);
NYX 0:85b3fd62ea1a 228
NYX 0:85b3fd62ea1a 229 /* Clear injected group conversion flag */
NYX 0:85b3fd62ea1a 230 /* (To ensure of no unknown state from potential previous ADC operations) */
NYX 0:85b3fd62ea1a 231 __HAL_ADC_CLEAR_FLAG(hadc, ADC_FLAG_JEOC);
NYX 0:85b3fd62ea1a 232
NYX 0:85b3fd62ea1a 233 /* Pointer to the common control register to which is belonging hadc */
NYX 0:85b3fd62ea1a 234 /* (Depending on STM32F4 product, there may be up to 3 ADC and 1 common */
NYX 0:85b3fd62ea1a 235 /* control register) */
NYX 0:85b3fd62ea1a 236 tmpADC_Common = ADC_COMMON_REGISTER(hadc);
NYX 0:85b3fd62ea1a 237
NYX 0:85b3fd62ea1a 238 /* Check if Multimode enabled */
NYX 0:85b3fd62ea1a 239 if(HAL_IS_BIT_CLR(tmpADC_Common->CCR, ADC_CCR_MULTI))
NYX 0:85b3fd62ea1a 240 {
NYX 0:85b3fd62ea1a 241 tmp1 = HAL_IS_BIT_CLR(hadc->Instance->CR2, ADC_CR2_JEXTEN);
NYX 0:85b3fd62ea1a 242 tmp2 = HAL_IS_BIT_CLR(hadc->Instance->CR1, ADC_CR1_JAUTO);
NYX 0:85b3fd62ea1a 243 if(tmp1 && tmp2)
NYX 0:85b3fd62ea1a 244 {
NYX 0:85b3fd62ea1a 245 /* Enable the selected ADC software conversion for injected group */
NYX 0:85b3fd62ea1a 246 hadc->Instance->CR2 |= ADC_CR2_JSWSTART;
NYX 0:85b3fd62ea1a 247 }
NYX 0:85b3fd62ea1a 248 }
NYX 0:85b3fd62ea1a 249 else
NYX 0:85b3fd62ea1a 250 {
NYX 0:85b3fd62ea1a 251 tmp1 = HAL_IS_BIT_CLR(hadc->Instance->CR2, ADC_CR2_JEXTEN);
NYX 0:85b3fd62ea1a 252 tmp2 = HAL_IS_BIT_CLR(hadc->Instance->CR1, ADC_CR1_JAUTO);
NYX 0:85b3fd62ea1a 253 if((hadc->Instance == ADC1) && tmp1 && tmp2)
NYX 0:85b3fd62ea1a 254 {
NYX 0:85b3fd62ea1a 255 /* Enable the selected ADC software conversion for injected group */
NYX 0:85b3fd62ea1a 256 hadc->Instance->CR2 |= ADC_CR2_JSWSTART;
NYX 0:85b3fd62ea1a 257 }
NYX 0:85b3fd62ea1a 258 }
NYX 0:85b3fd62ea1a 259 }
NYX 0:85b3fd62ea1a 260
NYX 0:85b3fd62ea1a 261 /* Return function status */
NYX 0:85b3fd62ea1a 262 return HAL_OK;
NYX 0:85b3fd62ea1a 263 }
NYX 0:85b3fd62ea1a 264
NYX 0:85b3fd62ea1a 265 /**
NYX 0:85b3fd62ea1a 266 * @brief Enables the interrupt and starts ADC conversion of injected channels.
NYX 0:85b3fd62ea1a 267 * @param hadc: pointer to a ADC_HandleTypeDef structure that contains
NYX 0:85b3fd62ea1a 268 * the configuration information for the specified ADC.
NYX 0:85b3fd62ea1a 269 *
NYX 0:85b3fd62ea1a 270 * @retval HAL status.
NYX 0:85b3fd62ea1a 271 */
NYX 0:85b3fd62ea1a 272 HAL_StatusTypeDef HAL_ADCEx_InjectedStart_IT(ADC_HandleTypeDef* hadc)
NYX 0:85b3fd62ea1a 273 {
NYX 0:85b3fd62ea1a 274 __IO uint32_t counter = 0U;
NYX 0:85b3fd62ea1a 275 uint32_t tmp1 = 0U, tmp2 = 0U;
NYX 0:85b3fd62ea1a 276 ADC_Common_TypeDef *tmpADC_Common;
NYX 0:85b3fd62ea1a 277
NYX 0:85b3fd62ea1a 278 /* Process locked */
NYX 0:85b3fd62ea1a 279 __HAL_LOCK(hadc);
NYX 0:85b3fd62ea1a 280
NYX 0:85b3fd62ea1a 281 /* Enable the ADC peripheral */
NYX 0:85b3fd62ea1a 282
NYX 0:85b3fd62ea1a 283 /* Check if ADC peripheral is disabled in order to enable it and wait during
NYX 0:85b3fd62ea1a 284 Tstab time the ADC's stabilization */
NYX 0:85b3fd62ea1a 285 if((hadc->Instance->CR2 & ADC_CR2_ADON) != ADC_CR2_ADON)
NYX 0:85b3fd62ea1a 286 {
NYX 0:85b3fd62ea1a 287 /* Enable the Peripheral */
NYX 0:85b3fd62ea1a 288 __HAL_ADC_ENABLE(hadc);
NYX 0:85b3fd62ea1a 289
NYX 0:85b3fd62ea1a 290 /* Delay for ADC stabilization time */
NYX 0:85b3fd62ea1a 291 /* Compute number of CPU cycles to wait for */
NYX 0:85b3fd62ea1a 292 counter = (ADC_STAB_DELAY_US * (SystemCoreClock / 1000000U));
NYX 0:85b3fd62ea1a 293 while(counter != 0U)
NYX 0:85b3fd62ea1a 294 {
NYX 0:85b3fd62ea1a 295 counter--;
NYX 0:85b3fd62ea1a 296 }
NYX 0:85b3fd62ea1a 297 }
NYX 0:85b3fd62ea1a 298
NYX 0:85b3fd62ea1a 299 /* Start conversion if ADC is effectively enabled */
NYX 0:85b3fd62ea1a 300 if(HAL_IS_BIT_SET(hadc->Instance->CR2, ADC_CR2_ADON))
NYX 0:85b3fd62ea1a 301 {
NYX 0:85b3fd62ea1a 302 /* Set ADC state */
NYX 0:85b3fd62ea1a 303 /* - Clear state bitfield related to injected group conversion results */
NYX 0:85b3fd62ea1a 304 /* - Set state bitfield related to injected operation */
NYX 0:85b3fd62ea1a 305 ADC_STATE_CLR_SET(hadc->State,
NYX 0:85b3fd62ea1a 306 HAL_ADC_STATE_READY | HAL_ADC_STATE_INJ_EOC,
NYX 0:85b3fd62ea1a 307 HAL_ADC_STATE_INJ_BUSY);
NYX 0:85b3fd62ea1a 308
NYX 0:85b3fd62ea1a 309 /* Check if a regular conversion is ongoing */
NYX 0:85b3fd62ea1a 310 /* Note: On this device, there is no ADC error code fields related to */
NYX 0:85b3fd62ea1a 311 /* conversions on group injected only. In case of conversion on */
NYX 0:85b3fd62ea1a 312 /* going on group regular, no error code is reset. */
NYX 0:85b3fd62ea1a 313 if (HAL_IS_BIT_CLR(hadc->State, HAL_ADC_STATE_REG_BUSY))
NYX 0:85b3fd62ea1a 314 {
NYX 0:85b3fd62ea1a 315 /* Reset ADC all error code fields */
NYX 0:85b3fd62ea1a 316 ADC_CLEAR_ERRORCODE(hadc);
NYX 0:85b3fd62ea1a 317 }
NYX 0:85b3fd62ea1a 318
NYX 0:85b3fd62ea1a 319 /* Process unlocked */
NYX 0:85b3fd62ea1a 320 /* Unlock before starting ADC conversions: in case of potential */
NYX 0:85b3fd62ea1a 321 /* interruption, to let the process to ADC IRQ Handler. */
NYX 0:85b3fd62ea1a 322 __HAL_UNLOCK(hadc);
NYX 0:85b3fd62ea1a 323
NYX 0:85b3fd62ea1a 324 /* Clear injected group conversion flag */
NYX 0:85b3fd62ea1a 325 /* (To ensure of no unknown state from potential previous ADC operations) */
NYX 0:85b3fd62ea1a 326 __HAL_ADC_CLEAR_FLAG(hadc, ADC_FLAG_JEOC);
NYX 0:85b3fd62ea1a 327
NYX 0:85b3fd62ea1a 328 /* Enable end of conversion interrupt for injected channels */
NYX 0:85b3fd62ea1a 329 __HAL_ADC_ENABLE_IT(hadc, ADC_IT_JEOC);
NYX 0:85b3fd62ea1a 330
NYX 0:85b3fd62ea1a 331 /* Pointer to the common control register to which is belonging hadc */
NYX 0:85b3fd62ea1a 332 /* (Depending on STM32F4 product, there may be up to 3 ADC and 1 common */
NYX 0:85b3fd62ea1a 333 /* control register) */
NYX 0:85b3fd62ea1a 334 tmpADC_Common = ADC_COMMON_REGISTER(hadc);
NYX 0:85b3fd62ea1a 335
NYX 0:85b3fd62ea1a 336 /* Check if Multimode enabled */
NYX 0:85b3fd62ea1a 337 if(HAL_IS_BIT_CLR(tmpADC_Common->CCR, ADC_CCR_MULTI))
NYX 0:85b3fd62ea1a 338 {
NYX 0:85b3fd62ea1a 339 tmp1 = HAL_IS_BIT_CLR(hadc->Instance->CR2, ADC_CR2_JEXTEN);
NYX 0:85b3fd62ea1a 340 tmp2 = HAL_IS_BIT_CLR(hadc->Instance->CR1, ADC_CR1_JAUTO);
NYX 0:85b3fd62ea1a 341 if(tmp1 && tmp2)
NYX 0:85b3fd62ea1a 342 {
NYX 0:85b3fd62ea1a 343 /* Enable the selected ADC software conversion for injected group */
NYX 0:85b3fd62ea1a 344 hadc->Instance->CR2 |= ADC_CR2_JSWSTART;
NYX 0:85b3fd62ea1a 345 }
NYX 0:85b3fd62ea1a 346 }
NYX 0:85b3fd62ea1a 347 else
NYX 0:85b3fd62ea1a 348 {
NYX 0:85b3fd62ea1a 349 tmp1 = HAL_IS_BIT_CLR(hadc->Instance->CR2, ADC_CR2_JEXTEN);
NYX 0:85b3fd62ea1a 350 tmp2 = HAL_IS_BIT_CLR(hadc->Instance->CR1, ADC_CR1_JAUTO);
NYX 0:85b3fd62ea1a 351 if((hadc->Instance == ADC1) && tmp1 && tmp2)
NYX 0:85b3fd62ea1a 352 {
NYX 0:85b3fd62ea1a 353 /* Enable the selected ADC software conversion for injected group */
NYX 0:85b3fd62ea1a 354 hadc->Instance->CR2 |= ADC_CR2_JSWSTART;
NYX 0:85b3fd62ea1a 355 }
NYX 0:85b3fd62ea1a 356 }
NYX 0:85b3fd62ea1a 357 }
NYX 0:85b3fd62ea1a 358
NYX 0:85b3fd62ea1a 359 /* Return function status */
NYX 0:85b3fd62ea1a 360 return HAL_OK;
NYX 0:85b3fd62ea1a 361 }
NYX 0:85b3fd62ea1a 362
NYX 0:85b3fd62ea1a 363 /**
NYX 0:85b3fd62ea1a 364 * @brief Stop conversion of injected channels. Disable ADC peripheral if
NYX 0:85b3fd62ea1a 365 * no regular conversion is on going.
NYX 0:85b3fd62ea1a 366 * @note If ADC must be disabled and if conversion is on going on
NYX 0:85b3fd62ea1a 367 * regular group, function HAL_ADC_Stop must be used to stop both
NYX 0:85b3fd62ea1a 368 * injected and regular groups, and disable the ADC.
NYX 0:85b3fd62ea1a 369 * @note If injected group mode auto-injection is enabled,
NYX 0:85b3fd62ea1a 370 * function HAL_ADC_Stop must be used.
NYX 0:85b3fd62ea1a 371 * @note In case of auto-injection mode, HAL_ADC_Stop must be used.
NYX 0:85b3fd62ea1a 372 * @param hadc: ADC handle
NYX 0:85b3fd62ea1a 373 * @retval None
NYX 0:85b3fd62ea1a 374 */
NYX 0:85b3fd62ea1a 375 HAL_StatusTypeDef HAL_ADCEx_InjectedStop(ADC_HandleTypeDef* hadc)
NYX 0:85b3fd62ea1a 376 {
NYX 0:85b3fd62ea1a 377 HAL_StatusTypeDef tmp_hal_status = HAL_OK;
NYX 0:85b3fd62ea1a 378
NYX 0:85b3fd62ea1a 379 /* Check the parameters */
NYX 0:85b3fd62ea1a 380 assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
NYX 0:85b3fd62ea1a 381
NYX 0:85b3fd62ea1a 382 /* Process locked */
NYX 0:85b3fd62ea1a 383 __HAL_LOCK(hadc);
NYX 0:85b3fd62ea1a 384
NYX 0:85b3fd62ea1a 385 /* Stop potential conversion and disable ADC peripheral */
NYX 0:85b3fd62ea1a 386 /* Conditioned to: */
NYX 0:85b3fd62ea1a 387 /* - No conversion on the other group (regular group) is intended to */
NYX 0:85b3fd62ea1a 388 /* continue (injected and regular groups stop conversion and ADC disable */
NYX 0:85b3fd62ea1a 389 /* are common) */
NYX 0:85b3fd62ea1a 390 /* - In case of auto-injection mode, HAL_ADC_Stop must be used. */
NYX 0:85b3fd62ea1a 391 if(((hadc->State & HAL_ADC_STATE_REG_BUSY) == RESET) &&
NYX 0:85b3fd62ea1a 392 HAL_IS_BIT_CLR(hadc->Instance->CR1, ADC_CR1_JAUTO) )
NYX 0:85b3fd62ea1a 393 {
NYX 0:85b3fd62ea1a 394 /* Stop potential conversion on going, on regular and injected groups */
NYX 0:85b3fd62ea1a 395 /* Disable ADC peripheral */
NYX 0:85b3fd62ea1a 396 __HAL_ADC_DISABLE(hadc);
NYX 0:85b3fd62ea1a 397
NYX 0:85b3fd62ea1a 398 /* Check if ADC is effectively disabled */
NYX 0:85b3fd62ea1a 399 if(HAL_IS_BIT_CLR(hadc->Instance->CR2, ADC_CR2_ADON))
NYX 0:85b3fd62ea1a 400 {
NYX 0:85b3fd62ea1a 401 /* Set ADC state */
NYX 0:85b3fd62ea1a 402 ADC_STATE_CLR_SET(hadc->State,
NYX 0:85b3fd62ea1a 403 HAL_ADC_STATE_REG_BUSY | HAL_ADC_STATE_INJ_BUSY,
NYX 0:85b3fd62ea1a 404 HAL_ADC_STATE_READY);
NYX 0:85b3fd62ea1a 405 }
NYX 0:85b3fd62ea1a 406 }
NYX 0:85b3fd62ea1a 407 else
NYX 0:85b3fd62ea1a 408 {
NYX 0:85b3fd62ea1a 409 /* Update ADC state machine to error */
NYX 0:85b3fd62ea1a 410 SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG);
NYX 0:85b3fd62ea1a 411
NYX 0:85b3fd62ea1a 412 tmp_hal_status = HAL_ERROR;
NYX 0:85b3fd62ea1a 413 }
NYX 0:85b3fd62ea1a 414
NYX 0:85b3fd62ea1a 415 /* Process unlocked */
NYX 0:85b3fd62ea1a 416 __HAL_UNLOCK(hadc);
NYX 0:85b3fd62ea1a 417
NYX 0:85b3fd62ea1a 418 /* Return function status */
NYX 0:85b3fd62ea1a 419 return tmp_hal_status;
NYX 0:85b3fd62ea1a 420 }
NYX 0:85b3fd62ea1a 421
NYX 0:85b3fd62ea1a 422 /**
NYX 0:85b3fd62ea1a 423 * @brief Poll for injected conversion complete
NYX 0:85b3fd62ea1a 424 * @param hadc: pointer to a ADC_HandleTypeDef structure that contains
NYX 0:85b3fd62ea1a 425 * the configuration information for the specified ADC.
NYX 0:85b3fd62ea1a 426 * @param Timeout: Timeout value in millisecond.
NYX 0:85b3fd62ea1a 427 * @retval HAL status
NYX 0:85b3fd62ea1a 428 */
NYX 0:85b3fd62ea1a 429 HAL_StatusTypeDef HAL_ADCEx_InjectedPollForConversion(ADC_HandleTypeDef* hadc, uint32_t Timeout)
NYX 0:85b3fd62ea1a 430 {
NYX 0:85b3fd62ea1a 431 uint32_t tickstart = 0U;
NYX 0:85b3fd62ea1a 432
NYX 0:85b3fd62ea1a 433 /* Get tick */
NYX 0:85b3fd62ea1a 434 tickstart = HAL_GetTick();
NYX 0:85b3fd62ea1a 435
NYX 0:85b3fd62ea1a 436 /* Check End of conversion flag */
NYX 0:85b3fd62ea1a 437 while(!(__HAL_ADC_GET_FLAG(hadc, ADC_FLAG_JEOC)))
NYX 0:85b3fd62ea1a 438 {
NYX 0:85b3fd62ea1a 439 /* Check for the Timeout */
NYX 0:85b3fd62ea1a 440 if(Timeout != HAL_MAX_DELAY)
NYX 0:85b3fd62ea1a 441 {
NYX 0:85b3fd62ea1a 442 if((Timeout == 0U)||((HAL_GetTick() - tickstart ) > Timeout))
NYX 0:85b3fd62ea1a 443 {
NYX 0:85b3fd62ea1a 444 hadc->State= HAL_ADC_STATE_TIMEOUT;
NYX 0:85b3fd62ea1a 445 /* Process unlocked */
NYX 0:85b3fd62ea1a 446 __HAL_UNLOCK(hadc);
NYX 0:85b3fd62ea1a 447 return HAL_TIMEOUT;
NYX 0:85b3fd62ea1a 448 }
NYX 0:85b3fd62ea1a 449 }
NYX 0:85b3fd62ea1a 450 }
NYX 0:85b3fd62ea1a 451
NYX 0:85b3fd62ea1a 452 /* Clear injected group conversion flag */
NYX 0:85b3fd62ea1a 453 __HAL_ADC_CLEAR_FLAG(hadc, ADC_FLAG_JSTRT | ADC_FLAG_JEOC);
NYX 0:85b3fd62ea1a 454
NYX 0:85b3fd62ea1a 455 /* Update ADC state machine */
NYX 0:85b3fd62ea1a 456 SET_BIT(hadc->State, HAL_ADC_STATE_INJ_EOC);
NYX 0:85b3fd62ea1a 457
NYX 0:85b3fd62ea1a 458 /* Determine whether any further conversion upcoming on group injected */
NYX 0:85b3fd62ea1a 459 /* by external trigger, continuous mode or scan sequence on going. */
NYX 0:85b3fd62ea1a 460 /* Note: On STM32F4, there is no independent flag of end of sequence. */
NYX 0:85b3fd62ea1a 461 /* The test of scan sequence on going is done either with scan */
NYX 0:85b3fd62ea1a 462 /* sequence disabled or with end of conversion flag set to */
NYX 0:85b3fd62ea1a 463 /* of end of sequence. */
NYX 0:85b3fd62ea1a 464 if(ADC_IS_SOFTWARE_START_INJECTED(hadc) &&
NYX 0:85b3fd62ea1a 465 (HAL_IS_BIT_CLR(hadc->Instance->JSQR, ADC_JSQR_JL) ||
NYX 0:85b3fd62ea1a 466 HAL_IS_BIT_CLR(hadc->Instance->CR2, ADC_CR2_EOCS) ) &&
NYX 0:85b3fd62ea1a 467 (HAL_IS_BIT_CLR(hadc->Instance->CR1, ADC_CR1_JAUTO) &&
NYX 0:85b3fd62ea1a 468 (ADC_IS_SOFTWARE_START_REGULAR(hadc) &&
NYX 0:85b3fd62ea1a 469 (hadc->Init.ContinuousConvMode == DISABLE) ) ) )
NYX 0:85b3fd62ea1a 470 {
NYX 0:85b3fd62ea1a 471 /* Set ADC state */
NYX 0:85b3fd62ea1a 472 CLEAR_BIT(hadc->State, HAL_ADC_STATE_INJ_BUSY);
NYX 0:85b3fd62ea1a 473
NYX 0:85b3fd62ea1a 474 if (HAL_IS_BIT_CLR(hadc->State, HAL_ADC_STATE_REG_BUSY))
NYX 0:85b3fd62ea1a 475 {
NYX 0:85b3fd62ea1a 476 SET_BIT(hadc->State, HAL_ADC_STATE_READY);
NYX 0:85b3fd62ea1a 477 }
NYX 0:85b3fd62ea1a 478 }
NYX 0:85b3fd62ea1a 479
NYX 0:85b3fd62ea1a 480 /* Return ADC state */
NYX 0:85b3fd62ea1a 481 return HAL_OK;
NYX 0:85b3fd62ea1a 482 }
NYX 0:85b3fd62ea1a 483
NYX 0:85b3fd62ea1a 484 /**
NYX 0:85b3fd62ea1a 485 * @brief Stop conversion of injected channels, disable interruption of
NYX 0:85b3fd62ea1a 486 * end-of-conversion. Disable ADC peripheral if no regular conversion
NYX 0:85b3fd62ea1a 487 * is on going.
NYX 0:85b3fd62ea1a 488 * @note If ADC must be disabled and if conversion is on going on
NYX 0:85b3fd62ea1a 489 * regular group, function HAL_ADC_Stop must be used to stop both
NYX 0:85b3fd62ea1a 490 * injected and regular groups, and disable the ADC.
NYX 0:85b3fd62ea1a 491 * @note If injected group mode auto-injection is enabled,
NYX 0:85b3fd62ea1a 492 * function HAL_ADC_Stop must be used.
NYX 0:85b3fd62ea1a 493 * @param hadc: ADC handle
NYX 0:85b3fd62ea1a 494 * @retval None
NYX 0:85b3fd62ea1a 495 */
NYX 0:85b3fd62ea1a 496 HAL_StatusTypeDef HAL_ADCEx_InjectedStop_IT(ADC_HandleTypeDef* hadc)
NYX 0:85b3fd62ea1a 497 {
NYX 0:85b3fd62ea1a 498 HAL_StatusTypeDef tmp_hal_status = HAL_OK;
NYX 0:85b3fd62ea1a 499
NYX 0:85b3fd62ea1a 500 /* Check the parameters */
NYX 0:85b3fd62ea1a 501 assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
NYX 0:85b3fd62ea1a 502
NYX 0:85b3fd62ea1a 503 /* Process locked */
NYX 0:85b3fd62ea1a 504 __HAL_LOCK(hadc);
NYX 0:85b3fd62ea1a 505
NYX 0:85b3fd62ea1a 506 /* Stop potential conversion and disable ADC peripheral */
NYX 0:85b3fd62ea1a 507 /* Conditioned to: */
NYX 0:85b3fd62ea1a 508 /* - No conversion on the other group (regular group) is intended to */
NYX 0:85b3fd62ea1a 509 /* continue (injected and regular groups stop conversion and ADC disable */
NYX 0:85b3fd62ea1a 510 /* are common) */
NYX 0:85b3fd62ea1a 511 /* - In case of auto-injection mode, HAL_ADC_Stop must be used. */
NYX 0:85b3fd62ea1a 512 if(((hadc->State & HAL_ADC_STATE_REG_BUSY) == RESET) &&
NYX 0:85b3fd62ea1a 513 HAL_IS_BIT_CLR(hadc->Instance->CR1, ADC_CR1_JAUTO) )
NYX 0:85b3fd62ea1a 514 {
NYX 0:85b3fd62ea1a 515 /* Stop potential conversion on going, on regular and injected groups */
NYX 0:85b3fd62ea1a 516 /* Disable ADC peripheral */
NYX 0:85b3fd62ea1a 517 __HAL_ADC_DISABLE(hadc);
NYX 0:85b3fd62ea1a 518
NYX 0:85b3fd62ea1a 519 /* Check if ADC is effectively disabled */
NYX 0:85b3fd62ea1a 520 if(HAL_IS_BIT_CLR(hadc->Instance->CR2, ADC_CR2_ADON))
NYX 0:85b3fd62ea1a 521 {
NYX 0:85b3fd62ea1a 522 /* Disable ADC end of conversion interrupt for injected channels */
NYX 0:85b3fd62ea1a 523 __HAL_ADC_DISABLE_IT(hadc, ADC_IT_JEOC);
NYX 0:85b3fd62ea1a 524
NYX 0:85b3fd62ea1a 525 /* Set ADC state */
NYX 0:85b3fd62ea1a 526 ADC_STATE_CLR_SET(hadc->State,
NYX 0:85b3fd62ea1a 527 HAL_ADC_STATE_REG_BUSY | HAL_ADC_STATE_INJ_BUSY,
NYX 0:85b3fd62ea1a 528 HAL_ADC_STATE_READY);
NYX 0:85b3fd62ea1a 529 }
NYX 0:85b3fd62ea1a 530 }
NYX 0:85b3fd62ea1a 531 else
NYX 0:85b3fd62ea1a 532 {
NYX 0:85b3fd62ea1a 533 /* Update ADC state machine to error */
NYX 0:85b3fd62ea1a 534 SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG);
NYX 0:85b3fd62ea1a 535
NYX 0:85b3fd62ea1a 536 tmp_hal_status = HAL_ERROR;
NYX 0:85b3fd62ea1a 537 }
NYX 0:85b3fd62ea1a 538
NYX 0:85b3fd62ea1a 539 /* Process unlocked */
NYX 0:85b3fd62ea1a 540 __HAL_UNLOCK(hadc);
NYX 0:85b3fd62ea1a 541
NYX 0:85b3fd62ea1a 542 /* Return function status */
NYX 0:85b3fd62ea1a 543 return tmp_hal_status;
NYX 0:85b3fd62ea1a 544 }
NYX 0:85b3fd62ea1a 545
NYX 0:85b3fd62ea1a 546 /**
NYX 0:85b3fd62ea1a 547 * @brief Gets the converted value from data register of injected channel.
NYX 0:85b3fd62ea1a 548 * @param hadc: pointer to a ADC_HandleTypeDef structure that contains
NYX 0:85b3fd62ea1a 549 * the configuration information for the specified ADC.
NYX 0:85b3fd62ea1a 550 * @param InjectedRank: the ADC injected rank.
NYX 0:85b3fd62ea1a 551 * This parameter can be one of the following values:
NYX 0:85b3fd62ea1a 552 * @arg ADC_INJECTED_RANK_1: Injected Channel1 selected
NYX 0:85b3fd62ea1a 553 * @arg ADC_INJECTED_RANK_2: Injected Channel2 selected
NYX 0:85b3fd62ea1a 554 * @arg ADC_INJECTED_RANK_3: Injected Channel3 selected
NYX 0:85b3fd62ea1a 555 * @arg ADC_INJECTED_RANK_4: Injected Channel4 selected
NYX 0:85b3fd62ea1a 556 * @retval None
NYX 0:85b3fd62ea1a 557 */
NYX 0:85b3fd62ea1a 558 uint32_t HAL_ADCEx_InjectedGetValue(ADC_HandleTypeDef* hadc, uint32_t InjectedRank)
NYX 0:85b3fd62ea1a 559 {
NYX 0:85b3fd62ea1a 560 __IO uint32_t tmp = 0U;
NYX 0:85b3fd62ea1a 561
NYX 0:85b3fd62ea1a 562 /* Check the parameters */
NYX 0:85b3fd62ea1a 563 assert_param(IS_ADC_INJECTED_RANK(InjectedRank));
NYX 0:85b3fd62ea1a 564
NYX 0:85b3fd62ea1a 565 /* Clear injected group conversion flag to have similar behaviour as */
NYX 0:85b3fd62ea1a 566 /* regular group: reading data register also clears end of conversion flag. */
NYX 0:85b3fd62ea1a 567 __HAL_ADC_CLEAR_FLAG(hadc, ADC_FLAG_JEOC);
NYX 0:85b3fd62ea1a 568
NYX 0:85b3fd62ea1a 569 /* Return the selected ADC converted value */
NYX 0:85b3fd62ea1a 570 switch(InjectedRank)
NYX 0:85b3fd62ea1a 571 {
NYX 0:85b3fd62ea1a 572 case ADC_INJECTED_RANK_4:
NYX 0:85b3fd62ea1a 573 {
NYX 0:85b3fd62ea1a 574 tmp = hadc->Instance->JDR4;
NYX 0:85b3fd62ea1a 575 }
NYX 0:85b3fd62ea1a 576 break;
NYX 0:85b3fd62ea1a 577 case ADC_INJECTED_RANK_3:
NYX 0:85b3fd62ea1a 578 {
NYX 0:85b3fd62ea1a 579 tmp = hadc->Instance->JDR3;
NYX 0:85b3fd62ea1a 580 }
NYX 0:85b3fd62ea1a 581 break;
NYX 0:85b3fd62ea1a 582 case ADC_INJECTED_RANK_2:
NYX 0:85b3fd62ea1a 583 {
NYX 0:85b3fd62ea1a 584 tmp = hadc->Instance->JDR2;
NYX 0:85b3fd62ea1a 585 }
NYX 0:85b3fd62ea1a 586 break;
NYX 0:85b3fd62ea1a 587 case ADC_INJECTED_RANK_1:
NYX 0:85b3fd62ea1a 588 {
NYX 0:85b3fd62ea1a 589 tmp = hadc->Instance->JDR1;
NYX 0:85b3fd62ea1a 590 }
NYX 0:85b3fd62ea1a 591 break;
NYX 0:85b3fd62ea1a 592 default:
NYX 0:85b3fd62ea1a 593 break;
NYX 0:85b3fd62ea1a 594 }
NYX 0:85b3fd62ea1a 595 return tmp;
NYX 0:85b3fd62ea1a 596 }
NYX 0:85b3fd62ea1a 597
NYX 0:85b3fd62ea1a 598 /**
NYX 0:85b3fd62ea1a 599 * @brief Enables ADC DMA request after last transfer (Multi-ADC mode) and enables ADC peripheral
NYX 0:85b3fd62ea1a 600 *
NYX 0:85b3fd62ea1a 601 * @note Caution: This function must be used only with the ADC master.
NYX 0:85b3fd62ea1a 602 *
NYX 0:85b3fd62ea1a 603 * @param hadc: pointer to a ADC_HandleTypeDef structure that contains
NYX 0:85b3fd62ea1a 604 * the configuration information for the specified ADC.
NYX 0:85b3fd62ea1a 605 * @param pData: Pointer to buffer in which transferred from ADC peripheral to memory will be stored.
NYX 0:85b3fd62ea1a 606 * @param Length: The length of data to be transferred from ADC peripheral to memory.
NYX 0:85b3fd62ea1a 607 * @retval HAL status
NYX 0:85b3fd62ea1a 608 */
NYX 0:85b3fd62ea1a 609 HAL_StatusTypeDef HAL_ADCEx_MultiModeStart_DMA(ADC_HandleTypeDef* hadc, uint32_t* pData, uint32_t Length)
NYX 0:85b3fd62ea1a 610 {
NYX 0:85b3fd62ea1a 611 __IO uint32_t counter = 0U;
NYX 0:85b3fd62ea1a 612 ADC_Common_TypeDef *tmpADC_Common;
NYX 0:85b3fd62ea1a 613
NYX 0:85b3fd62ea1a 614 /* Check the parameters */
NYX 0:85b3fd62ea1a 615 assert_param(IS_FUNCTIONAL_STATE(hadc->Init.ContinuousConvMode));
NYX 0:85b3fd62ea1a 616 assert_param(IS_ADC_EXT_TRIG_EDGE(hadc->Init.ExternalTrigConvEdge));
NYX 0:85b3fd62ea1a 617 assert_param(IS_FUNCTIONAL_STATE(hadc->Init.DMAContinuousRequests));
NYX 0:85b3fd62ea1a 618
NYX 0:85b3fd62ea1a 619 /* Process locked */
NYX 0:85b3fd62ea1a 620 __HAL_LOCK(hadc);
NYX 0:85b3fd62ea1a 621
NYX 0:85b3fd62ea1a 622 /* Check if ADC peripheral is disabled in order to enable it and wait during
NYX 0:85b3fd62ea1a 623 Tstab time the ADC's stabilization */
NYX 0:85b3fd62ea1a 624 if((hadc->Instance->CR2 & ADC_CR2_ADON) != ADC_CR2_ADON)
NYX 0:85b3fd62ea1a 625 {
NYX 0:85b3fd62ea1a 626 /* Enable the Peripheral */
NYX 0:85b3fd62ea1a 627 __HAL_ADC_ENABLE(hadc);
NYX 0:85b3fd62ea1a 628
NYX 0:85b3fd62ea1a 629 /* Delay for temperature sensor stabilization time */
NYX 0:85b3fd62ea1a 630 /* Compute number of CPU cycles to wait for */
NYX 0:85b3fd62ea1a 631 counter = (ADC_STAB_DELAY_US * (SystemCoreClock / 1000000U));
NYX 0:85b3fd62ea1a 632 while(counter != 0U)
NYX 0:85b3fd62ea1a 633 {
NYX 0:85b3fd62ea1a 634 counter--;
NYX 0:85b3fd62ea1a 635 }
NYX 0:85b3fd62ea1a 636 }
NYX 0:85b3fd62ea1a 637
NYX 0:85b3fd62ea1a 638 /* Start conversion if ADC is effectively enabled */
NYX 0:85b3fd62ea1a 639 if(HAL_IS_BIT_SET(hadc->Instance->CR2, ADC_CR2_ADON))
NYX 0:85b3fd62ea1a 640 {
NYX 0:85b3fd62ea1a 641 /* Set ADC state */
NYX 0:85b3fd62ea1a 642 /* - Clear state bitfield related to regular group conversion results */
NYX 0:85b3fd62ea1a 643 /* - Set state bitfield related to regular group operation */
NYX 0:85b3fd62ea1a 644 ADC_STATE_CLR_SET(hadc->State,
NYX 0:85b3fd62ea1a 645 HAL_ADC_STATE_READY | HAL_ADC_STATE_REG_EOC | HAL_ADC_STATE_REG_OVR,
NYX 0:85b3fd62ea1a 646 HAL_ADC_STATE_REG_BUSY);
NYX 0:85b3fd62ea1a 647
NYX 0:85b3fd62ea1a 648 /* If conversions on group regular are also triggering group injected, */
NYX 0:85b3fd62ea1a 649 /* update ADC state. */
NYX 0:85b3fd62ea1a 650 if (READ_BIT(hadc->Instance->CR1, ADC_CR1_JAUTO) != RESET)
NYX 0:85b3fd62ea1a 651 {
NYX 0:85b3fd62ea1a 652 ADC_STATE_CLR_SET(hadc->State, HAL_ADC_STATE_INJ_EOC, HAL_ADC_STATE_INJ_BUSY);
NYX 0:85b3fd62ea1a 653 }
NYX 0:85b3fd62ea1a 654
NYX 0:85b3fd62ea1a 655 /* State machine update: Check if an injected conversion is ongoing */
NYX 0:85b3fd62ea1a 656 if (HAL_IS_BIT_SET(hadc->State, HAL_ADC_STATE_INJ_BUSY))
NYX 0:85b3fd62ea1a 657 {
NYX 0:85b3fd62ea1a 658 /* Reset ADC error code fields related to conversions on group regular */
NYX 0:85b3fd62ea1a 659 CLEAR_BIT(hadc->ErrorCode, (HAL_ADC_ERROR_OVR | HAL_ADC_ERROR_DMA));
NYX 0:85b3fd62ea1a 660 }
NYX 0:85b3fd62ea1a 661 else
NYX 0:85b3fd62ea1a 662 {
NYX 0:85b3fd62ea1a 663 /* Reset ADC all error code fields */
NYX 0:85b3fd62ea1a 664 ADC_CLEAR_ERRORCODE(hadc);
NYX 0:85b3fd62ea1a 665 }
NYX 0:85b3fd62ea1a 666
NYX 0:85b3fd62ea1a 667 /* Process unlocked */
NYX 0:85b3fd62ea1a 668 /* Unlock before starting ADC conversions: in case of potential */
NYX 0:85b3fd62ea1a 669 /* interruption, to let the process to ADC IRQ Handler. */
NYX 0:85b3fd62ea1a 670 __HAL_UNLOCK(hadc);
NYX 0:85b3fd62ea1a 671
NYX 0:85b3fd62ea1a 672 /* Set the DMA transfer complete callback */
NYX 0:85b3fd62ea1a 673 hadc->DMA_Handle->XferCpltCallback = ADC_MultiModeDMAConvCplt;
NYX 0:85b3fd62ea1a 674
NYX 0:85b3fd62ea1a 675 /* Set the DMA half transfer complete callback */
NYX 0:85b3fd62ea1a 676 hadc->DMA_Handle->XferHalfCpltCallback = ADC_MultiModeDMAHalfConvCplt;
NYX 0:85b3fd62ea1a 677
NYX 0:85b3fd62ea1a 678 /* Set the DMA error callback */
NYX 0:85b3fd62ea1a 679 hadc->DMA_Handle->XferErrorCallback = ADC_MultiModeDMAError ;
NYX 0:85b3fd62ea1a 680
NYX 0:85b3fd62ea1a 681 /* Manage ADC and DMA start: ADC overrun interruption, DMA start, ADC */
NYX 0:85b3fd62ea1a 682 /* start (in case of SW start): */
NYX 0:85b3fd62ea1a 683
NYX 0:85b3fd62ea1a 684 /* Clear regular group conversion flag and overrun flag */
NYX 0:85b3fd62ea1a 685 /* (To ensure of no unknown state from potential previous ADC operations) */
NYX 0:85b3fd62ea1a 686 __HAL_ADC_CLEAR_FLAG(hadc, ADC_FLAG_EOC);
NYX 0:85b3fd62ea1a 687
NYX 0:85b3fd62ea1a 688 /* Enable ADC overrun interrupt */
NYX 0:85b3fd62ea1a 689 __HAL_ADC_ENABLE_IT(hadc, ADC_IT_OVR);
NYX 0:85b3fd62ea1a 690
NYX 0:85b3fd62ea1a 691 /* Pointer to the common control register to which is belonging hadc */
NYX 0:85b3fd62ea1a 692 /* (Depending on STM32F4 product, there may be up to 3 ADC and 1 common */
NYX 0:85b3fd62ea1a 693 /* control register) */
NYX 0:85b3fd62ea1a 694 tmpADC_Common = ADC_COMMON_REGISTER(hadc);
NYX 0:85b3fd62ea1a 695
NYX 0:85b3fd62ea1a 696 if (hadc->Init.DMAContinuousRequests != DISABLE)
NYX 0:85b3fd62ea1a 697 {
NYX 0:85b3fd62ea1a 698 /* Enable the selected ADC DMA request after last transfer */
NYX 0:85b3fd62ea1a 699 tmpADC_Common->CCR |= ADC_CCR_DDS;
NYX 0:85b3fd62ea1a 700 }
NYX 0:85b3fd62ea1a 701 else
NYX 0:85b3fd62ea1a 702 {
NYX 0:85b3fd62ea1a 703 /* Disable the selected ADC EOC rising on each regular channel conversion */
NYX 0:85b3fd62ea1a 704 tmpADC_Common->CCR &= ~ADC_CCR_DDS;
NYX 0:85b3fd62ea1a 705 }
NYX 0:85b3fd62ea1a 706
NYX 0:85b3fd62ea1a 707 /* Enable the DMA Stream */
NYX 0:85b3fd62ea1a 708 HAL_DMA_Start_IT(hadc->DMA_Handle, (uint32_t)&tmpADC_Common->CDR, (uint32_t)pData, Length);
NYX 0:85b3fd62ea1a 709
NYX 0:85b3fd62ea1a 710 /* if no external trigger present enable software conversion of regular channels */
NYX 0:85b3fd62ea1a 711 if((hadc->Instance->CR2 & ADC_CR2_EXTEN) == RESET)
NYX 0:85b3fd62ea1a 712 {
NYX 0:85b3fd62ea1a 713 /* Enable the selected ADC software conversion for regular group */
NYX 0:85b3fd62ea1a 714 hadc->Instance->CR2 |= (uint32_t)ADC_CR2_SWSTART;
NYX 0:85b3fd62ea1a 715 }
NYX 0:85b3fd62ea1a 716 }
NYX 0:85b3fd62ea1a 717
NYX 0:85b3fd62ea1a 718 /* Return function status */
NYX 0:85b3fd62ea1a 719 return HAL_OK;
NYX 0:85b3fd62ea1a 720 }
NYX 0:85b3fd62ea1a 721
NYX 0:85b3fd62ea1a 722 /**
NYX 0:85b3fd62ea1a 723 * @brief Disables ADC DMA (multi-ADC mode) and disables ADC peripheral
NYX 0:85b3fd62ea1a 724 * @param hadc: pointer to a ADC_HandleTypeDef structure that contains
NYX 0:85b3fd62ea1a 725 * the configuration information for the specified ADC.
NYX 0:85b3fd62ea1a 726 * @retval HAL status
NYX 0:85b3fd62ea1a 727 */
NYX 0:85b3fd62ea1a 728 HAL_StatusTypeDef HAL_ADCEx_MultiModeStop_DMA(ADC_HandleTypeDef* hadc)
NYX 0:85b3fd62ea1a 729 {
NYX 0:85b3fd62ea1a 730 HAL_StatusTypeDef tmp_hal_status = HAL_OK;
NYX 0:85b3fd62ea1a 731 ADC_Common_TypeDef *tmpADC_Common;
NYX 0:85b3fd62ea1a 732
NYX 0:85b3fd62ea1a 733 /* Check the parameters */
NYX 0:85b3fd62ea1a 734 assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
NYX 0:85b3fd62ea1a 735
NYX 0:85b3fd62ea1a 736 /* Process locked */
NYX 0:85b3fd62ea1a 737 __HAL_LOCK(hadc);
NYX 0:85b3fd62ea1a 738
NYX 0:85b3fd62ea1a 739 /* Stop potential conversion on going, on regular and injected groups */
NYX 0:85b3fd62ea1a 740 /* Disable ADC peripheral */
NYX 0:85b3fd62ea1a 741 __HAL_ADC_DISABLE(hadc);
NYX 0:85b3fd62ea1a 742
NYX 0:85b3fd62ea1a 743 /* Pointer to the common control register to which is belonging hadc */
NYX 0:85b3fd62ea1a 744 /* (Depending on STM32F4 product, there may be up to 3 ADC and 1 common */
NYX 0:85b3fd62ea1a 745 /* control register) */
NYX 0:85b3fd62ea1a 746 tmpADC_Common = ADC_COMMON_REGISTER(hadc);
NYX 0:85b3fd62ea1a 747
NYX 0:85b3fd62ea1a 748 /* Check if ADC is effectively disabled */
NYX 0:85b3fd62ea1a 749 if(HAL_IS_BIT_CLR(hadc->Instance->CR2, ADC_CR2_ADON))
NYX 0:85b3fd62ea1a 750 {
NYX 0:85b3fd62ea1a 751 /* Disable the selected ADC DMA mode for multimode */
NYX 0:85b3fd62ea1a 752 tmpADC_Common->CCR &= ~ADC_CCR_DDS;
NYX 0:85b3fd62ea1a 753
NYX 0:85b3fd62ea1a 754 /* Disable the DMA channel (in case of DMA in circular mode or stop while */
NYX 0:85b3fd62ea1a 755 /* DMA transfer is on going) */
NYX 0:85b3fd62ea1a 756 tmp_hal_status = HAL_DMA_Abort(hadc->DMA_Handle);
NYX 0:85b3fd62ea1a 757
NYX 0:85b3fd62ea1a 758 /* Disable ADC overrun interrupt */
NYX 0:85b3fd62ea1a 759 __HAL_ADC_DISABLE_IT(hadc, ADC_IT_OVR);
NYX 0:85b3fd62ea1a 760
NYX 0:85b3fd62ea1a 761 /* Set ADC state */
NYX 0:85b3fd62ea1a 762 ADC_STATE_CLR_SET(hadc->State,
NYX 0:85b3fd62ea1a 763 HAL_ADC_STATE_REG_BUSY | HAL_ADC_STATE_INJ_BUSY,
NYX 0:85b3fd62ea1a 764 HAL_ADC_STATE_READY);
NYX 0:85b3fd62ea1a 765 }
NYX 0:85b3fd62ea1a 766
NYX 0:85b3fd62ea1a 767 /* Process unlocked */
NYX 0:85b3fd62ea1a 768 __HAL_UNLOCK(hadc);
NYX 0:85b3fd62ea1a 769
NYX 0:85b3fd62ea1a 770 /* Return function status */
NYX 0:85b3fd62ea1a 771 return tmp_hal_status;
NYX 0:85b3fd62ea1a 772 }
NYX 0:85b3fd62ea1a 773
NYX 0:85b3fd62ea1a 774 /**
NYX 0:85b3fd62ea1a 775 * @brief Returns the last ADC1, ADC2 and ADC3 regular conversions results
NYX 0:85b3fd62ea1a 776 * data in the selected multi mode.
NYX 0:85b3fd62ea1a 777 * @param hadc: pointer to a ADC_HandleTypeDef structure that contains
NYX 0:85b3fd62ea1a 778 * the configuration information for the specified ADC.
NYX 0:85b3fd62ea1a 779 * @retval The converted data value.
NYX 0:85b3fd62ea1a 780 */
NYX 0:85b3fd62ea1a 781 uint32_t HAL_ADCEx_MultiModeGetValue(ADC_HandleTypeDef* hadc)
NYX 0:85b3fd62ea1a 782 {
NYX 0:85b3fd62ea1a 783 ADC_Common_TypeDef *tmpADC_Common;
NYX 0:85b3fd62ea1a 784
NYX 0:85b3fd62ea1a 785 /* Pointer to the common control register to which is belonging hadc */
NYX 0:85b3fd62ea1a 786 /* (Depending on STM32F4 product, there may be up to 3 ADC and 1 common */
NYX 0:85b3fd62ea1a 787 /* control register) */
NYX 0:85b3fd62ea1a 788 tmpADC_Common = ADC_COMMON_REGISTER(hadc);
NYX 0:85b3fd62ea1a 789
NYX 0:85b3fd62ea1a 790 /* Return the multi mode conversion value */
NYX 0:85b3fd62ea1a 791 return tmpADC_Common->CDR;
NYX 0:85b3fd62ea1a 792 }
NYX 0:85b3fd62ea1a 793
NYX 0:85b3fd62ea1a 794 /**
NYX 0:85b3fd62ea1a 795 * @brief Injected conversion complete callback in non blocking mode
NYX 0:85b3fd62ea1a 796 * @param hadc: pointer to a ADC_HandleTypeDef structure that contains
NYX 0:85b3fd62ea1a 797 * the configuration information for the specified ADC.
NYX 0:85b3fd62ea1a 798 * @retval None
NYX 0:85b3fd62ea1a 799 */
NYX 0:85b3fd62ea1a 800 __weak void HAL_ADCEx_InjectedConvCpltCallback(ADC_HandleTypeDef* hadc)
NYX 0:85b3fd62ea1a 801 {
NYX 0:85b3fd62ea1a 802 /* Prevent unused argument(s) compilation warning */
NYX 0:85b3fd62ea1a 803 UNUSED(hadc);
NYX 0:85b3fd62ea1a 804 /* NOTE : This function Should not be modified, when the callback is needed,
NYX 0:85b3fd62ea1a 805 the HAL_ADC_InjectedConvCpltCallback could be implemented in the user file
NYX 0:85b3fd62ea1a 806 */
NYX 0:85b3fd62ea1a 807 }
NYX 0:85b3fd62ea1a 808
NYX 0:85b3fd62ea1a 809 /**
NYX 0:85b3fd62ea1a 810 * @brief Configures for the selected ADC injected channel its corresponding
NYX 0:85b3fd62ea1a 811 * rank in the sequencer and its sample time.
NYX 0:85b3fd62ea1a 812 * @param hadc: pointer to a ADC_HandleTypeDef structure that contains
NYX 0:85b3fd62ea1a 813 * the configuration information for the specified ADC.
NYX 0:85b3fd62ea1a 814 * @param sConfigInjected: ADC configuration structure for injected channel.
NYX 0:85b3fd62ea1a 815 * @retval None
NYX 0:85b3fd62ea1a 816 */
NYX 0:85b3fd62ea1a 817 HAL_StatusTypeDef HAL_ADCEx_InjectedConfigChannel(ADC_HandleTypeDef* hadc, ADC_InjectionConfTypeDef* sConfigInjected)
NYX 0:85b3fd62ea1a 818 {
NYX 0:85b3fd62ea1a 819
NYX 0:85b3fd62ea1a 820 #ifdef USE_FULL_ASSERT
NYX 0:85b3fd62ea1a 821 uint32_t tmp = 0U;
NYX 0:85b3fd62ea1a 822
NYX 0:85b3fd62ea1a 823 #endif /* USE_FULL_ASSERT */
NYX 0:85b3fd62ea1a 824
NYX 0:85b3fd62ea1a 825 ADC_Common_TypeDef *tmpADC_Common;
NYX 0:85b3fd62ea1a 826
NYX 0:85b3fd62ea1a 827 /* Check the parameters */
NYX 0:85b3fd62ea1a 828 assert_param(IS_ADC_CHANNEL(sConfigInjected->InjectedChannel));
NYX 0:85b3fd62ea1a 829 assert_param(IS_ADC_INJECTED_RANK(sConfigInjected->InjectedRank));
NYX 0:85b3fd62ea1a 830 assert_param(IS_ADC_SAMPLE_TIME(sConfigInjected->InjectedSamplingTime));
NYX 0:85b3fd62ea1a 831 assert_param(IS_ADC_EXT_INJEC_TRIG(sConfigInjected->ExternalTrigInjecConv));
NYX 0:85b3fd62ea1a 832 assert_param(IS_ADC_INJECTED_LENGTH(sConfigInjected->InjectedNbrOfConversion));
NYX 0:85b3fd62ea1a 833 assert_param(IS_FUNCTIONAL_STATE(sConfigInjected->AutoInjectedConv));
NYX 0:85b3fd62ea1a 834 assert_param(IS_FUNCTIONAL_STATE(sConfigInjected->InjectedDiscontinuousConvMode));
NYX 0:85b3fd62ea1a 835
NYX 0:85b3fd62ea1a 836 #ifdef USE_FULL_ASSERT
NYX 0:85b3fd62ea1a 837 tmp = ADC_GET_RESOLUTION(hadc);
NYX 0:85b3fd62ea1a 838 assert_param(IS_ADC_RANGE(tmp, sConfigInjected->InjectedOffset));
NYX 0:85b3fd62ea1a 839 #endif /* USE_FULL_ASSERT */
NYX 0:85b3fd62ea1a 840
NYX 0:85b3fd62ea1a 841 if(sConfigInjected->ExternalTrigInjecConv != ADC_INJECTED_SOFTWARE_START)
NYX 0:85b3fd62ea1a 842 {
NYX 0:85b3fd62ea1a 843 assert_param(IS_ADC_EXT_INJEC_TRIG_EDGE(sConfigInjected->ExternalTrigInjecConvEdge));
NYX 0:85b3fd62ea1a 844 }
NYX 0:85b3fd62ea1a 845
NYX 0:85b3fd62ea1a 846 /* Process locked */
NYX 0:85b3fd62ea1a 847 __HAL_LOCK(hadc);
NYX 0:85b3fd62ea1a 848
NYX 0:85b3fd62ea1a 849 /* if ADC_Channel_10 ... ADC_Channel_18 is selected */
NYX 0:85b3fd62ea1a 850 if (sConfigInjected->InjectedChannel > ADC_CHANNEL_9)
NYX 0:85b3fd62ea1a 851 {
NYX 0:85b3fd62ea1a 852 /* Clear the old sample time */
NYX 0:85b3fd62ea1a 853 hadc->Instance->SMPR1 &= ~ADC_SMPR1(ADC_SMPR1_SMP10, sConfigInjected->InjectedChannel);
NYX 0:85b3fd62ea1a 854
NYX 0:85b3fd62ea1a 855 /* Set the new sample time */
NYX 0:85b3fd62ea1a 856 hadc->Instance->SMPR1 |= ADC_SMPR1(sConfigInjected->InjectedSamplingTime, sConfigInjected->InjectedChannel);
NYX 0:85b3fd62ea1a 857 }
NYX 0:85b3fd62ea1a 858 else /* ADC_Channel include in ADC_Channel_[0..9] */
NYX 0:85b3fd62ea1a 859 {
NYX 0:85b3fd62ea1a 860 /* Clear the old sample time */
NYX 0:85b3fd62ea1a 861 hadc->Instance->SMPR2 &= ~ADC_SMPR2(ADC_SMPR2_SMP0, sConfigInjected->InjectedChannel);
NYX 0:85b3fd62ea1a 862
NYX 0:85b3fd62ea1a 863 /* Set the new sample time */
NYX 0:85b3fd62ea1a 864 hadc->Instance->SMPR2 |= ADC_SMPR2(sConfigInjected->InjectedSamplingTime, sConfigInjected->InjectedChannel);
NYX 0:85b3fd62ea1a 865 }
NYX 0:85b3fd62ea1a 866
NYX 0:85b3fd62ea1a 867 /*---------------------------- ADCx JSQR Configuration -----------------*/
NYX 0:85b3fd62ea1a 868 hadc->Instance->JSQR &= ~(ADC_JSQR_JL);
NYX 0:85b3fd62ea1a 869 hadc->Instance->JSQR |= ADC_SQR1(sConfigInjected->InjectedNbrOfConversion);
NYX 0:85b3fd62ea1a 870
NYX 0:85b3fd62ea1a 871 /* Rank configuration */
NYX 0:85b3fd62ea1a 872
NYX 0:85b3fd62ea1a 873 /* Clear the old SQx bits for the selected rank */
NYX 0:85b3fd62ea1a 874 hadc->Instance->JSQR &= ~ADC_JSQR(ADC_JSQR_JSQ1, sConfigInjected->InjectedRank,sConfigInjected->InjectedNbrOfConversion);
NYX 0:85b3fd62ea1a 875
NYX 0:85b3fd62ea1a 876 /* Set the SQx bits for the selected rank */
NYX 0:85b3fd62ea1a 877 hadc->Instance->JSQR |= ADC_JSQR(sConfigInjected->InjectedChannel, sConfigInjected->InjectedRank,sConfigInjected->InjectedNbrOfConversion);
NYX 0:85b3fd62ea1a 878
NYX 0:85b3fd62ea1a 879 /* Enable external trigger if trigger selection is different of software */
NYX 0:85b3fd62ea1a 880 /* start. */
NYX 0:85b3fd62ea1a 881 /* Note: This configuration keeps the hardware feature of parameter */
NYX 0:85b3fd62ea1a 882 /* ExternalTrigConvEdge "trigger edge none" equivalent to */
NYX 0:85b3fd62ea1a 883 /* software start. */
NYX 0:85b3fd62ea1a 884 if(sConfigInjected->ExternalTrigInjecConv != ADC_INJECTED_SOFTWARE_START)
NYX 0:85b3fd62ea1a 885 {
NYX 0:85b3fd62ea1a 886 /* Select external trigger to start conversion */
NYX 0:85b3fd62ea1a 887 hadc->Instance->CR2 &= ~(ADC_CR2_JEXTSEL);
NYX 0:85b3fd62ea1a 888 hadc->Instance->CR2 |= sConfigInjected->ExternalTrigInjecConv;
NYX 0:85b3fd62ea1a 889
NYX 0:85b3fd62ea1a 890 /* Select external trigger polarity */
NYX 0:85b3fd62ea1a 891 hadc->Instance->CR2 &= ~(ADC_CR2_JEXTEN);
NYX 0:85b3fd62ea1a 892 hadc->Instance->CR2 |= sConfigInjected->ExternalTrigInjecConvEdge;
NYX 0:85b3fd62ea1a 893 }
NYX 0:85b3fd62ea1a 894 else
NYX 0:85b3fd62ea1a 895 {
NYX 0:85b3fd62ea1a 896 /* Reset the external trigger */
NYX 0:85b3fd62ea1a 897 hadc->Instance->CR2 &= ~(ADC_CR2_JEXTSEL);
NYX 0:85b3fd62ea1a 898 hadc->Instance->CR2 &= ~(ADC_CR2_JEXTEN);
NYX 0:85b3fd62ea1a 899 }
NYX 0:85b3fd62ea1a 900
NYX 0:85b3fd62ea1a 901 if (sConfigInjected->AutoInjectedConv != DISABLE)
NYX 0:85b3fd62ea1a 902 {
NYX 0:85b3fd62ea1a 903 /* Enable the selected ADC automatic injected group conversion */
NYX 0:85b3fd62ea1a 904 hadc->Instance->CR1 |= ADC_CR1_JAUTO;
NYX 0:85b3fd62ea1a 905 }
NYX 0:85b3fd62ea1a 906 else
NYX 0:85b3fd62ea1a 907 {
NYX 0:85b3fd62ea1a 908 /* Disable the selected ADC automatic injected group conversion */
NYX 0:85b3fd62ea1a 909 hadc->Instance->CR1 &= ~(ADC_CR1_JAUTO);
NYX 0:85b3fd62ea1a 910 }
NYX 0:85b3fd62ea1a 911
NYX 0:85b3fd62ea1a 912 if (sConfigInjected->InjectedDiscontinuousConvMode != DISABLE)
NYX 0:85b3fd62ea1a 913 {
NYX 0:85b3fd62ea1a 914 /* Enable the selected ADC injected discontinuous mode */
NYX 0:85b3fd62ea1a 915 hadc->Instance->CR1 |= ADC_CR1_JDISCEN;
NYX 0:85b3fd62ea1a 916 }
NYX 0:85b3fd62ea1a 917 else
NYX 0:85b3fd62ea1a 918 {
NYX 0:85b3fd62ea1a 919 /* Disable the selected ADC injected discontinuous mode */
NYX 0:85b3fd62ea1a 920 hadc->Instance->CR1 &= ~(ADC_CR1_JDISCEN);
NYX 0:85b3fd62ea1a 921 }
NYX 0:85b3fd62ea1a 922
NYX 0:85b3fd62ea1a 923 switch(sConfigInjected->InjectedRank)
NYX 0:85b3fd62ea1a 924 {
NYX 0:85b3fd62ea1a 925 case 1U:
NYX 0:85b3fd62ea1a 926 /* Set injected channel 1 offset */
NYX 0:85b3fd62ea1a 927 hadc->Instance->JOFR1 &= ~(ADC_JOFR1_JOFFSET1);
NYX 0:85b3fd62ea1a 928 hadc->Instance->JOFR1 |= sConfigInjected->InjectedOffset;
NYX 0:85b3fd62ea1a 929 break;
NYX 0:85b3fd62ea1a 930 case 2U:
NYX 0:85b3fd62ea1a 931 /* Set injected channel 2 offset */
NYX 0:85b3fd62ea1a 932 hadc->Instance->JOFR2 &= ~(ADC_JOFR2_JOFFSET2);
NYX 0:85b3fd62ea1a 933 hadc->Instance->JOFR2 |= sConfigInjected->InjectedOffset;
NYX 0:85b3fd62ea1a 934 break;
NYX 0:85b3fd62ea1a 935 case 3U:
NYX 0:85b3fd62ea1a 936 /* Set injected channel 3 offset */
NYX 0:85b3fd62ea1a 937 hadc->Instance->JOFR3 &= ~(ADC_JOFR3_JOFFSET3);
NYX 0:85b3fd62ea1a 938 hadc->Instance->JOFR3 |= sConfigInjected->InjectedOffset;
NYX 0:85b3fd62ea1a 939 break;
NYX 0:85b3fd62ea1a 940 default:
NYX 0:85b3fd62ea1a 941 /* Set injected channel 4 offset */
NYX 0:85b3fd62ea1a 942 hadc->Instance->JOFR4 &= ~(ADC_JOFR4_JOFFSET4);
NYX 0:85b3fd62ea1a 943 hadc->Instance->JOFR4 |= sConfigInjected->InjectedOffset;
NYX 0:85b3fd62ea1a 944 break;
NYX 0:85b3fd62ea1a 945 }
NYX 0:85b3fd62ea1a 946
NYX 0:85b3fd62ea1a 947 /* Pointer to the common control register to which is belonging hadc */
NYX 0:85b3fd62ea1a 948 /* (Depending on STM32F4 product, there may be up to 3 ADC and 1 common */
NYX 0:85b3fd62ea1a 949 /* control register) */
NYX 0:85b3fd62ea1a 950 tmpADC_Common = ADC_COMMON_REGISTER(hadc);
NYX 0:85b3fd62ea1a 951
NYX 0:85b3fd62ea1a 952 /* if ADC1 Channel_18 is selected enable VBAT Channel */
NYX 0:85b3fd62ea1a 953 if ((hadc->Instance == ADC1) && (sConfigInjected->InjectedChannel == ADC_CHANNEL_VBAT))
NYX 0:85b3fd62ea1a 954 {
NYX 0:85b3fd62ea1a 955 /* Enable the VBAT channel*/
NYX 0:85b3fd62ea1a 956 tmpADC_Common->CCR |= ADC_CCR_VBATE;
NYX 0:85b3fd62ea1a 957 }
NYX 0:85b3fd62ea1a 958
NYX 0:85b3fd62ea1a 959 /* if ADC1 Channel_16 or Channel_17 is selected enable TSVREFE Channel(Temperature sensor and VREFINT) */
NYX 0:85b3fd62ea1a 960 if ((hadc->Instance == ADC1) && ((sConfigInjected->InjectedChannel == ADC_CHANNEL_TEMPSENSOR) || (sConfigInjected->InjectedChannel == ADC_CHANNEL_VREFINT)))
NYX 0:85b3fd62ea1a 961 {
NYX 0:85b3fd62ea1a 962 /* Enable the TSVREFE channel*/
NYX 0:85b3fd62ea1a 963 tmpADC_Common->CCR |= ADC_CCR_TSVREFE;
NYX 0:85b3fd62ea1a 964 }
NYX 0:85b3fd62ea1a 965
NYX 0:85b3fd62ea1a 966 /* Process unlocked */
NYX 0:85b3fd62ea1a 967 __HAL_UNLOCK(hadc);
NYX 0:85b3fd62ea1a 968
NYX 0:85b3fd62ea1a 969 /* Return function status */
NYX 0:85b3fd62ea1a 970 return HAL_OK;
NYX 0:85b3fd62ea1a 971 }
NYX 0:85b3fd62ea1a 972
NYX 0:85b3fd62ea1a 973 /**
NYX 0:85b3fd62ea1a 974 * @brief Configures the ADC multi-mode
NYX 0:85b3fd62ea1a 975 * @param hadc : pointer to a ADC_HandleTypeDef structure that contains
NYX 0:85b3fd62ea1a 976 * the configuration information for the specified ADC.
NYX 0:85b3fd62ea1a 977 * @param multimode : pointer to an ADC_MultiModeTypeDef structure that contains
NYX 0:85b3fd62ea1a 978 * the configuration information for multimode.
NYX 0:85b3fd62ea1a 979 * @retval HAL status
NYX 0:85b3fd62ea1a 980 */
NYX 0:85b3fd62ea1a 981 HAL_StatusTypeDef HAL_ADCEx_MultiModeConfigChannel(ADC_HandleTypeDef* hadc, ADC_MultiModeTypeDef* multimode)
NYX 0:85b3fd62ea1a 982 {
NYX 0:85b3fd62ea1a 983
NYX 0:85b3fd62ea1a 984 ADC_Common_TypeDef *tmpADC_Common;
NYX 0:85b3fd62ea1a 985
NYX 0:85b3fd62ea1a 986 /* Check the parameters */
NYX 0:85b3fd62ea1a 987 assert_param(IS_ADC_MODE(multimode->Mode));
NYX 0:85b3fd62ea1a 988 assert_param(IS_ADC_DMA_ACCESS_MODE(multimode->DMAAccessMode));
NYX 0:85b3fd62ea1a 989 assert_param(IS_ADC_SAMPLING_DELAY(multimode->TwoSamplingDelay));
NYX 0:85b3fd62ea1a 990
NYX 0:85b3fd62ea1a 991 /* Process locked */
NYX 0:85b3fd62ea1a 992 __HAL_LOCK(hadc);
NYX 0:85b3fd62ea1a 993
NYX 0:85b3fd62ea1a 994 /* Pointer to the common control register to which is belonging hadc */
NYX 0:85b3fd62ea1a 995 /* (Depending on STM32F4 product, there may be up to 3 ADC and 1 common */
NYX 0:85b3fd62ea1a 996 /* control register) */
NYX 0:85b3fd62ea1a 997 tmpADC_Common = ADC_COMMON_REGISTER(hadc);
NYX 0:85b3fd62ea1a 998
NYX 0:85b3fd62ea1a 999 /* Set ADC mode */
NYX 0:85b3fd62ea1a 1000 tmpADC_Common->CCR &= ~(ADC_CCR_MULTI);
NYX 0:85b3fd62ea1a 1001 tmpADC_Common->CCR |= multimode->Mode;
NYX 0:85b3fd62ea1a 1002
NYX 0:85b3fd62ea1a 1003 /* Set the ADC DMA access mode */
NYX 0:85b3fd62ea1a 1004 tmpADC_Common->CCR &= ~(ADC_CCR_DMA);
NYX 0:85b3fd62ea1a 1005 tmpADC_Common->CCR |= multimode->DMAAccessMode;
NYX 0:85b3fd62ea1a 1006
NYX 0:85b3fd62ea1a 1007 /* Set delay between two sampling phases */
NYX 0:85b3fd62ea1a 1008 tmpADC_Common->CCR &= ~(ADC_CCR_DELAY);
NYX 0:85b3fd62ea1a 1009 tmpADC_Common->CCR |= multimode->TwoSamplingDelay;
NYX 0:85b3fd62ea1a 1010
NYX 0:85b3fd62ea1a 1011 /* Process unlocked */
NYX 0:85b3fd62ea1a 1012 __HAL_UNLOCK(hadc);
NYX 0:85b3fd62ea1a 1013
NYX 0:85b3fd62ea1a 1014 /* Return function status */
NYX 0:85b3fd62ea1a 1015 return HAL_OK;
NYX 0:85b3fd62ea1a 1016 }
NYX 0:85b3fd62ea1a 1017
NYX 0:85b3fd62ea1a 1018 /**
NYX 0:85b3fd62ea1a 1019 * @}
NYX 0:85b3fd62ea1a 1020 */
NYX 0:85b3fd62ea1a 1021
NYX 0:85b3fd62ea1a 1022 /**
NYX 0:85b3fd62ea1a 1023 * @brief DMA transfer complete callback.
NYX 0:85b3fd62ea1a 1024 * @param hdma: pointer to a DMA_HandleTypeDef structure that contains
NYX 0:85b3fd62ea1a 1025 * the configuration information for the specified DMA module.
NYX 0:85b3fd62ea1a 1026 * @retval None
NYX 0:85b3fd62ea1a 1027 */
NYX 0:85b3fd62ea1a 1028 static void ADC_MultiModeDMAConvCplt(DMA_HandleTypeDef *hdma)
NYX 0:85b3fd62ea1a 1029 {
NYX 0:85b3fd62ea1a 1030 /* Retrieve ADC handle corresponding to current DMA handle */
NYX 0:85b3fd62ea1a 1031 ADC_HandleTypeDef* hadc = ( ADC_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
NYX 0:85b3fd62ea1a 1032
NYX 0:85b3fd62ea1a 1033 /* Update state machine on conversion status if not in error state */
NYX 0:85b3fd62ea1a 1034 if (HAL_IS_BIT_CLR(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL | HAL_ADC_STATE_ERROR_DMA))
NYX 0:85b3fd62ea1a 1035 {
NYX 0:85b3fd62ea1a 1036 /* Update ADC state machine */
NYX 0:85b3fd62ea1a 1037 SET_BIT(hadc->State, HAL_ADC_STATE_REG_EOC);
NYX 0:85b3fd62ea1a 1038
NYX 0:85b3fd62ea1a 1039 /* Determine whether any further conversion upcoming on group regular */
NYX 0:85b3fd62ea1a 1040 /* by external trigger, continuous mode or scan sequence on going. */
NYX 0:85b3fd62ea1a 1041 /* Note: On STM32F4, there is no independent flag of end of sequence. */
NYX 0:85b3fd62ea1a 1042 /* The test of scan sequence on going is done either with scan */
NYX 0:85b3fd62ea1a 1043 /* sequence disabled or with end of conversion flag set to */
NYX 0:85b3fd62ea1a 1044 /* of end of sequence. */
NYX 0:85b3fd62ea1a 1045 if(ADC_IS_SOFTWARE_START_REGULAR(hadc) &&
NYX 0:85b3fd62ea1a 1046 (hadc->Init.ContinuousConvMode == DISABLE) &&
NYX 0:85b3fd62ea1a 1047 (HAL_IS_BIT_CLR(hadc->Instance->SQR1, ADC_SQR1_L) ||
NYX 0:85b3fd62ea1a 1048 HAL_IS_BIT_CLR(hadc->Instance->CR2, ADC_CR2_EOCS) ) )
NYX 0:85b3fd62ea1a 1049 {
NYX 0:85b3fd62ea1a 1050 /* Disable ADC end of single conversion interrupt on group regular */
NYX 0:85b3fd62ea1a 1051 /* Note: Overrun interrupt was enabled with EOC interrupt in */
NYX 0:85b3fd62ea1a 1052 /* HAL_ADC_Start_IT(), but is not disabled here because can be used */
NYX 0:85b3fd62ea1a 1053 /* by overrun IRQ process below. */
NYX 0:85b3fd62ea1a 1054 __HAL_ADC_DISABLE_IT(hadc, ADC_IT_EOC);
NYX 0:85b3fd62ea1a 1055
NYX 0:85b3fd62ea1a 1056 /* Set ADC state */
NYX 0:85b3fd62ea1a 1057 CLEAR_BIT(hadc->State, HAL_ADC_STATE_REG_BUSY);
NYX 0:85b3fd62ea1a 1058
NYX 0:85b3fd62ea1a 1059 if (HAL_IS_BIT_CLR(hadc->State, HAL_ADC_STATE_INJ_BUSY))
NYX 0:85b3fd62ea1a 1060 {
NYX 0:85b3fd62ea1a 1061 SET_BIT(hadc->State, HAL_ADC_STATE_READY);
NYX 0:85b3fd62ea1a 1062 }
NYX 0:85b3fd62ea1a 1063 }
NYX 0:85b3fd62ea1a 1064
NYX 0:85b3fd62ea1a 1065 /* Conversion complete callback */
NYX 0:85b3fd62ea1a 1066 HAL_ADC_ConvCpltCallback(hadc);
NYX 0:85b3fd62ea1a 1067 }
NYX 0:85b3fd62ea1a 1068 else
NYX 0:85b3fd62ea1a 1069 {
NYX 0:85b3fd62ea1a 1070 /* Call DMA error callback */
NYX 0:85b3fd62ea1a 1071 hadc->DMA_Handle->XferErrorCallback(hdma);
NYX 0:85b3fd62ea1a 1072 }
NYX 0:85b3fd62ea1a 1073 }
NYX 0:85b3fd62ea1a 1074
NYX 0:85b3fd62ea1a 1075 /**
NYX 0:85b3fd62ea1a 1076 * @brief DMA half transfer complete callback.
NYX 0:85b3fd62ea1a 1077 * @param hdma: pointer to a DMA_HandleTypeDef structure that contains
NYX 0:85b3fd62ea1a 1078 * the configuration information for the specified DMA module.
NYX 0:85b3fd62ea1a 1079 * @retval None
NYX 0:85b3fd62ea1a 1080 */
NYX 0:85b3fd62ea1a 1081 static void ADC_MultiModeDMAHalfConvCplt(DMA_HandleTypeDef *hdma)
NYX 0:85b3fd62ea1a 1082 {
NYX 0:85b3fd62ea1a 1083 ADC_HandleTypeDef* hadc = ( ADC_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
NYX 0:85b3fd62ea1a 1084 /* Conversion complete callback */
NYX 0:85b3fd62ea1a 1085 HAL_ADC_ConvHalfCpltCallback(hadc);
NYX 0:85b3fd62ea1a 1086 }
NYX 0:85b3fd62ea1a 1087
NYX 0:85b3fd62ea1a 1088 /**
NYX 0:85b3fd62ea1a 1089 * @brief DMA error callback
NYX 0:85b3fd62ea1a 1090 * @param hdma: pointer to a DMA_HandleTypeDef structure that contains
NYX 0:85b3fd62ea1a 1091 * the configuration information for the specified DMA module.
NYX 0:85b3fd62ea1a 1092 * @retval None
NYX 0:85b3fd62ea1a 1093 */
NYX 0:85b3fd62ea1a 1094 static void ADC_MultiModeDMAError(DMA_HandleTypeDef *hdma)
NYX 0:85b3fd62ea1a 1095 {
NYX 0:85b3fd62ea1a 1096 ADC_HandleTypeDef* hadc = ( ADC_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
NYX 0:85b3fd62ea1a 1097 hadc->State= HAL_ADC_STATE_ERROR_DMA;
NYX 0:85b3fd62ea1a 1098 /* Set ADC error code to DMA error */
NYX 0:85b3fd62ea1a 1099 hadc->ErrorCode |= HAL_ADC_ERROR_DMA;
NYX 0:85b3fd62ea1a 1100 HAL_ADC_ErrorCallback(hadc);
NYX 0:85b3fd62ea1a 1101 }
NYX 0:85b3fd62ea1a 1102
NYX 0:85b3fd62ea1a 1103 /**
NYX 0:85b3fd62ea1a 1104 * @}
NYX 0:85b3fd62ea1a 1105 */
NYX 0:85b3fd62ea1a 1106
NYX 0:85b3fd62ea1a 1107 #endif /* HAL_ADC_MODULE_ENABLED */
NYX 0:85b3fd62ea1a 1108 /**
NYX 0:85b3fd62ea1a 1109 * @}
NYX 0:85b3fd62ea1a 1110 */
NYX 0:85b3fd62ea1a 1111
NYX 0:85b3fd62ea1a 1112 /**
NYX 0:85b3fd62ea1a 1113 * @}
NYX 0:85b3fd62ea1a 1114 */
NYX 0:85b3fd62ea1a 1115
NYX 0:85b3fd62ea1a 1116 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/