Takaaki Numai / mbed-dev

inport from local

Dependents:   Hobbyking_Cheetah_0511

targets/TARGET_STM/TARGET_STM32F4/device/stm32f4xx_hal.h@0:85b3fd62ea1a, 2020-03-16 (annotated)

Committer:
NYX
Date:
Mon Mar 16 06:35:48 2020 +0000
Revision:
0:85b3fd62ea1a
reinport to mbed;

Who changed what in which revision?

UserRevisionLine numberNew contents of line
NYX 0:85b3fd62ea1a 1 /**
NYX 0:85b3fd62ea1a 2 ******************************************************************************
NYX 0:85b3fd62ea1a 3 * @file stm32f4xx_hal.h
NYX 0:85b3fd62ea1a 4 * @author MCD Application Team
NYX 0:85b3fd62ea1a 5 * @version V1.7.1
NYX 0:85b3fd62ea1a 6 * @date 14-April-2017
NYX 0:85b3fd62ea1a 7 * @brief This file contains all the functions prototypes for the HAL
NYX 0:85b3fd62ea1a 8 * module driver.
NYX 0:85b3fd62ea1a 9 ******************************************************************************
NYX 0:85b3fd62ea1a 10 * @attention
NYX 0:85b3fd62ea1a 11 *
NYX 0:85b3fd62ea1a 12 * <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
NYX 0:85b3fd62ea1a 13 *
NYX 0:85b3fd62ea1a 14 * Redistribution and use in source and binary forms, with or without modification,
NYX 0:85b3fd62ea1a 15 * are permitted provided that the following conditions are met:
NYX 0:85b3fd62ea1a 16 * 1. Redistributions of source code must retain the above copyright notice,
NYX 0:85b3fd62ea1a 17 * this list of conditions and the following disclaimer.
NYX 0:85b3fd62ea1a 18 * 2. Redistributions in binary form must reproduce the above copyright notice,
NYX 0:85b3fd62ea1a 19 * this list of conditions and the following disclaimer in the documentation
NYX 0:85b3fd62ea1a 20 * and/or other materials provided with the distribution.
NYX 0:85b3fd62ea1a 21 * 3. Neither the name of STMicroelectronics nor the names of its contributors
NYX 0:85b3fd62ea1a 22 * may be used to endorse or promote products derived from this software
NYX 0:85b3fd62ea1a 23 * without specific prior written permission.
NYX 0:85b3fd62ea1a 24 *
NYX 0:85b3fd62ea1a 25 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
NYX 0:85b3fd62ea1a 26 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
NYX 0:85b3fd62ea1a 27 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
NYX 0:85b3fd62ea1a 28 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
NYX 0:85b3fd62ea1a 29 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
NYX 0:85b3fd62ea1a 30 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
NYX 0:85b3fd62ea1a 31 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
NYX 0:85b3fd62ea1a 32 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
NYX 0:85b3fd62ea1a 33 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
NYX 0:85b3fd62ea1a 34 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
NYX 0:85b3fd62ea1a 35 *
NYX 0:85b3fd62ea1a 36 ******************************************************************************
NYX 0:85b3fd62ea1a 37 */
NYX 0:85b3fd62ea1a 38
NYX 0:85b3fd62ea1a 39 /* Define to prevent recursive inclusion -------------------------------------*/
NYX 0:85b3fd62ea1a 40 #ifndef __STM32F4xx_HAL_H
NYX 0:85b3fd62ea1a 41 #define __STM32F4xx_HAL_H
NYX 0:85b3fd62ea1a 42
NYX 0:85b3fd62ea1a 43 #ifdef __cplusplus
NYX 0:85b3fd62ea1a 44 extern "C" {
NYX 0:85b3fd62ea1a 45 #endif
NYX 0:85b3fd62ea1a 46
NYX 0:85b3fd62ea1a 47 /* Includes ------------------------------------------------------------------*/
NYX 0:85b3fd62ea1a 48 #include "stm32f4xx_hal_conf.h"
NYX 0:85b3fd62ea1a 49
NYX 0:85b3fd62ea1a 50 /** @addtogroup STM32F4xx_HAL_Driver
NYX 0:85b3fd62ea1a 51 * @{
NYX 0:85b3fd62ea1a 52 */
NYX 0:85b3fd62ea1a 53
NYX 0:85b3fd62ea1a 54 /** @addtogroup HAL
NYX 0:85b3fd62ea1a 55 * @{
NYX 0:85b3fd62ea1a 56 */
NYX 0:85b3fd62ea1a 57
NYX 0:85b3fd62ea1a 58 /* Exported types ------------------------------------------------------------*/
NYX 0:85b3fd62ea1a 59 /* Exported constants --------------------------------------------------------*/
NYX 0:85b3fd62ea1a 60
NYX 0:85b3fd62ea1a 61 /* Exported macro ------------------------------------------------------------*/
NYX 0:85b3fd62ea1a 62 /** @defgroup HAL_Exported_Macros HAL Exported Macros
NYX 0:85b3fd62ea1a 63 * @{
NYX 0:85b3fd62ea1a 64 */
NYX 0:85b3fd62ea1a 65
NYX 0:85b3fd62ea1a 66 /** @brief Freeze/Unfreeze Peripherals in Debug mode
NYX 0:85b3fd62ea1a 67 */
NYX 0:85b3fd62ea1a 68 #define __HAL_DBGMCU_FREEZE_TIM2() (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_TIM2_STOP))
NYX 0:85b3fd62ea1a 69 #define __HAL_DBGMCU_FREEZE_TIM3() (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_TIM3_STOP))
NYX 0:85b3fd62ea1a 70 #define __HAL_DBGMCU_FREEZE_TIM4() (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_TIM4_STOP))
NYX 0:85b3fd62ea1a 71 #define __HAL_DBGMCU_FREEZE_TIM5() (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_TIM5_STOP))
NYX 0:85b3fd62ea1a 72 #define __HAL_DBGMCU_FREEZE_TIM6() (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_TIM6_STOP))
NYX 0:85b3fd62ea1a 73 #define __HAL_DBGMCU_FREEZE_TIM7() (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_TIM7_STOP))
NYX 0:85b3fd62ea1a 74 #define __HAL_DBGMCU_FREEZE_TIM12() (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_TIM12_STOP))
NYX 0:85b3fd62ea1a 75 #define __HAL_DBGMCU_FREEZE_TIM13() (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_TIM13_STOP))
NYX 0:85b3fd62ea1a 76 #define __HAL_DBGMCU_FREEZE_TIM14() (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_TIM14_STOP))
NYX 0:85b3fd62ea1a 77 #define __HAL_DBGMCU_FREEZE_RTC() (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_RTC_STOP))
NYX 0:85b3fd62ea1a 78 #define __HAL_DBGMCU_FREEZE_WWDG() (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_WWDG_STOP))
NYX 0:85b3fd62ea1a 79 #define __HAL_DBGMCU_FREEZE_IWDG() (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_IWDG_STOP))
NYX 0:85b3fd62ea1a 80 #define __HAL_DBGMCU_FREEZE_I2C1_TIMEOUT() (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_I2C1_SMBUS_TIMEOUT))
NYX 0:85b3fd62ea1a 81 #define __HAL_DBGMCU_FREEZE_I2C2_TIMEOUT() (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_I2C2_SMBUS_TIMEOUT))
NYX 0:85b3fd62ea1a 82 #define __HAL_DBGMCU_FREEZE_I2C3_TIMEOUT() (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_I2C3_SMBUS_TIMEOUT))
NYX 0:85b3fd62ea1a 83 #define __HAL_DBGMCU_FREEZE_CAN1() (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_CAN1_STOP))
NYX 0:85b3fd62ea1a 84 #define __HAL_DBGMCU_FREEZE_CAN2() (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_CAN2_STOP))
NYX 0:85b3fd62ea1a 85 #define __HAL_DBGMCU_FREEZE_TIM1() (DBGMCU->APB2FZ |= (DBGMCU_APB2_FZ_DBG_TIM1_STOP))
NYX 0:85b3fd62ea1a 86 #define __HAL_DBGMCU_FREEZE_TIM8() (DBGMCU->APB2FZ |= (DBGMCU_APB2_FZ_DBG_TIM8_STOP))
NYX 0:85b3fd62ea1a 87 #define __HAL_DBGMCU_FREEZE_TIM9() (DBGMCU->APB2FZ |= (DBGMCU_APB2_FZ_DBG_TIM9_STOP))
NYX 0:85b3fd62ea1a 88 #define __HAL_DBGMCU_FREEZE_TIM10() (DBGMCU->APB2FZ |= (DBGMCU_APB2_FZ_DBG_TIM10_STOP))
NYX 0:85b3fd62ea1a 89 #define __HAL_DBGMCU_FREEZE_TIM11() (DBGMCU->APB2FZ |= (DBGMCU_APB2_FZ_DBG_TIM11_STOP))
NYX 0:85b3fd62ea1a 90
NYX 0:85b3fd62ea1a 91 #define __HAL_DBGMCU_UNFREEZE_TIM2() (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_TIM2_STOP))
NYX 0:85b3fd62ea1a 92 #define __HAL_DBGMCU_UNFREEZE_TIM3() (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_TIM3_STOP))
NYX 0:85b3fd62ea1a 93 #define __HAL_DBGMCU_UNFREEZE_TIM4() (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_TIM4_STOP))
NYX 0:85b3fd62ea1a 94 #define __HAL_DBGMCU_UNFREEZE_TIM5() (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_TIM5_STOP))
NYX 0:85b3fd62ea1a 95 #define __HAL_DBGMCU_UNFREEZE_TIM6() (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_TIM6_STOP))
NYX 0:85b3fd62ea1a 96 #define __HAL_DBGMCU_UNFREEZE_TIM7() (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_TIM7_STOP))
NYX 0:85b3fd62ea1a 97 #define __HAL_DBGMCU_UNFREEZE_TIM12() (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_TIM12_STOP))
NYX 0:85b3fd62ea1a 98 #define __HAL_DBGMCU_UNFREEZE_TIM13() (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_TIM13_STOP))
NYX 0:85b3fd62ea1a 99 #define __HAL_DBGMCU_UNFREEZE_TIM14() (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_TIM14_STOP))
NYX 0:85b3fd62ea1a 100 #define __HAL_DBGMCU_UNFREEZE_RTC() (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_RTC_STOP))
NYX 0:85b3fd62ea1a 101 #define __HAL_DBGMCU_UNFREEZE_WWDG() (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_WWDG_STOP))
NYX 0:85b3fd62ea1a 102 #define __HAL_DBGMCU_UNFREEZE_IWDG() (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_IWDG_STOP))
NYX 0:85b3fd62ea1a 103 #define __HAL_DBGMCU_UNFREEZE_I2C1_TIMEOUT() (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_I2C1_SMBUS_TIMEOUT))
NYX 0:85b3fd62ea1a 104 #define __HAL_DBGMCU_UNFREEZE_I2C2_TIMEOUT() (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_I2C2_SMBUS_TIMEOUT))
NYX 0:85b3fd62ea1a 105 #define __HAL_DBGMCU_UNFREEZE_I2C3_TIMEOUT() (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_I2C3_SMBUS_TIMEOUT))
NYX 0:85b3fd62ea1a 106 #define __HAL_DBGMCU_UNFREEZE_CAN1() (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_CAN1_STOP))
NYX 0:85b3fd62ea1a 107 #define __HAL_DBGMCU_UNFREEZE_CAN2() (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_CAN2_STOP))
NYX 0:85b3fd62ea1a 108 #define __HAL_DBGMCU_UNFREEZE_TIM1() (DBGMCU->APB2FZ &= ~(DBGMCU_APB2_FZ_DBG_TIM1_STOP))
NYX 0:85b3fd62ea1a 109 #define __HAL_DBGMCU_UNFREEZE_TIM8() (DBGMCU->APB2FZ &= ~(DBGMCU_APB2_FZ_DBG_TIM8_STOP))
NYX 0:85b3fd62ea1a 110 #define __HAL_DBGMCU_UNFREEZE_TIM9() (DBGMCU->APB2FZ &= ~(DBGMCU_APB2_FZ_DBG_TIM9_STOP))
NYX 0:85b3fd62ea1a 111 #define __HAL_DBGMCU_UNFREEZE_TIM10() (DBGMCU->APB2FZ &= ~(DBGMCU_APB2_FZ_DBG_TIM10_STOP))
NYX 0:85b3fd62ea1a 112 #define __HAL_DBGMCU_UNFREEZE_TIM11() (DBGMCU->APB2FZ &= ~(DBGMCU_APB2_FZ_DBG_TIM11_STOP))
NYX 0:85b3fd62ea1a 113
NYX 0:85b3fd62ea1a 114 /** @brief Main Flash memory mapped at 0x00000000
NYX 0:85b3fd62ea1a 115 */
NYX 0:85b3fd62ea1a 116 #define __HAL_SYSCFG_REMAPMEMORY_FLASH() (SYSCFG->MEMRMP &= ~(SYSCFG_MEMRMP_MEM_MODE))
NYX 0:85b3fd62ea1a 117
NYX 0:85b3fd62ea1a 118 /** @brief System Flash memory mapped at 0x00000000
NYX 0:85b3fd62ea1a 119 */
NYX 0:85b3fd62ea1a 120 #define __HAL_SYSCFG_REMAPMEMORY_SYSTEMFLASH() do {SYSCFG->MEMRMP &= ~(SYSCFG_MEMRMP_MEM_MODE);\
NYX 0:85b3fd62ea1a 121 SYSCFG->MEMRMP |= SYSCFG_MEMRMP_MEM_MODE_0;\
NYX 0:85b3fd62ea1a 122 }while(0);
NYX 0:85b3fd62ea1a 123
NYX 0:85b3fd62ea1a 124 /** @brief Embedded SRAM mapped at 0x00000000
NYX 0:85b3fd62ea1a 125 */
NYX 0:85b3fd62ea1a 126 #define __HAL_SYSCFG_REMAPMEMORY_SRAM() do {SYSCFG->MEMRMP &= ~(SYSCFG_MEMRMP_MEM_MODE);\
NYX 0:85b3fd62ea1a 127 SYSCFG->MEMRMP |= (SYSCFG_MEMRMP_MEM_MODE_0 | SYSCFG_MEMRMP_MEM_MODE_1);\
NYX 0:85b3fd62ea1a 128 }while(0);
NYX 0:85b3fd62ea1a 129
NYX 0:85b3fd62ea1a 130 #if defined(STM32F405xx) || defined(STM32F415xx) || defined(STM32F407xx)|| defined(STM32F417xx)
NYX 0:85b3fd62ea1a 131 /** @brief FSMC Bank1 (NOR/PSRAM 1 and 2) mapped at 0x00000000
NYX 0:85b3fd62ea1a 132 */
NYX 0:85b3fd62ea1a 133 #define __HAL_SYSCFG_REMAPMEMORY_FSMC() do {SYSCFG->MEMRMP &= ~(SYSCFG_MEMRMP_MEM_MODE);\
NYX 0:85b3fd62ea1a 134 SYSCFG->MEMRMP |= (SYSCFG_MEMRMP_MEM_MODE_1);\
NYX 0:85b3fd62ea1a 135 }while(0);
NYX 0:85b3fd62ea1a 136 #endif /* STM32F405xx || STM32F415xx || STM32F407xx || STM32F417xx */
NYX 0:85b3fd62ea1a 137
NYX 0:85b3fd62ea1a 138 #if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx)|| defined(STM32F439xx) ||\
NYX 0:85b3fd62ea1a 139 defined(STM32F469xx) || defined(STM32F479xx)
NYX 0:85b3fd62ea1a 140 /** @brief FMC Bank1 (NOR/PSRAM 1 and 2) mapped at 0x00000000
NYX 0:85b3fd62ea1a 141 */
NYX 0:85b3fd62ea1a 142 #define __HAL_SYSCFG_REMAPMEMORY_FMC() do {SYSCFG->MEMRMP &= ~(SYSCFG_MEMRMP_MEM_MODE);\
NYX 0:85b3fd62ea1a 143 SYSCFG->MEMRMP |= (SYSCFG_MEMRMP_MEM_MODE_1);\
NYX 0:85b3fd62ea1a 144 }while(0);
NYX 0:85b3fd62ea1a 145
NYX 0:85b3fd62ea1a 146 /** @brief FMC/SDRAM Bank 1 and 2 mapped at 0x00000000
NYX 0:85b3fd62ea1a 147 */
NYX 0:85b3fd62ea1a 148 #define __HAL_SYSCFG_REMAPMEMORY_FMC_SDRAM() do {SYSCFG->MEMRMP &= ~(SYSCFG_MEMRMP_MEM_MODE);\
NYX 0:85b3fd62ea1a 149 SYSCFG->MEMRMP |= (SYSCFG_MEMRMP_MEM_MODE_2);\
NYX 0:85b3fd62ea1a 150 }while(0);
NYX 0:85b3fd62ea1a 151 #endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || STM32F469xx || STM32F479xx */
NYX 0:85b3fd62ea1a 152
NYX 0:85b3fd62ea1a 153 #if defined(STM32F410Tx) || defined(STM32F410Cx) || defined(STM32F410Rx) || defined(STM32F413xx) || defined(STM32F423xx)
NYX 0:85b3fd62ea1a 154 /** @defgroup Cortex_Lockup_Enable Cortex Lockup Enable
NYX 0:85b3fd62ea1a 155 * @{
NYX 0:85b3fd62ea1a 156 */
NYX 0:85b3fd62ea1a 157 /** @brief SYSCFG Break Lockup lock
NYX 0:85b3fd62ea1a 158 * Enables and locks the connection of Cortex-M4 LOCKUP (Hardfault) output to TIM1/8 input
NYX 0:85b3fd62ea1a 159 * @note The selected configuration is locked and can be unlocked by system reset
NYX 0:85b3fd62ea1a 160 */
NYX 0:85b3fd62ea1a 161 #define __HAL_SYSCFG_BREAK_PVD_LOCK() do {SYSCFG->CFGR2 &= ~(SYSCFG_CFGR2_PVD_LOCK); \
NYX 0:85b3fd62ea1a 162 SYSCFG->CFGR2 |= SYSCFG_CFGR2_PVD_LOCK; \
NYX 0:85b3fd62ea1a 163 }while(0)
NYX 0:85b3fd62ea1a 164 /**
NYX 0:85b3fd62ea1a 165 * @}
NYX 0:85b3fd62ea1a 166 */
NYX 0:85b3fd62ea1a 167
NYX 0:85b3fd62ea1a 168 /** @defgroup PVD_Lock_Enable PVD Lock
NYX 0:85b3fd62ea1a 169 * @{
NYX 0:85b3fd62ea1a 170 */
NYX 0:85b3fd62ea1a 171 /** @brief SYSCFG Break PVD lock
NYX 0:85b3fd62ea1a 172 * Enables and locks the PVD connection with Timer1/8 Break Input, , as well as the PVDE and PLS[2:0] in the PWR_CR register
NYX 0:85b3fd62ea1a 173 * @note The selected configuration is locked and can be unlocked by system reset
NYX 0:85b3fd62ea1a 174 */
NYX 0:85b3fd62ea1a 175 #define __HAL_SYSCFG_BREAK_LOCKUP_LOCK() do {SYSCFG->CFGR2 &= ~(SYSCFG_CFGR2_LOCKUP_LOCK); \
NYX 0:85b3fd62ea1a 176 SYSCFG->CFGR2 |= SYSCFG_CFGR2_LOCKUP_LOCK; \
NYX 0:85b3fd62ea1a 177 }while(0)
NYX 0:85b3fd62ea1a 178 /**
NYX 0:85b3fd62ea1a 179 * @}
NYX 0:85b3fd62ea1a 180 */
NYX 0:85b3fd62ea1a 181 #endif /* STM32F410Tx || STM32F410Cx || STM32F410Rx || STM32F413xx || STM32F423xx */
NYX 0:85b3fd62ea1a 182 /**
NYX 0:85b3fd62ea1a 183 * @}
NYX 0:85b3fd62ea1a 184 */
NYX 0:85b3fd62ea1a 185
NYX 0:85b3fd62ea1a 186 /* Exported functions --------------------------------------------------------*/
NYX 0:85b3fd62ea1a 187 /** @addtogroup HAL_Exported_Functions
NYX 0:85b3fd62ea1a 188 * @{
NYX 0:85b3fd62ea1a 189 */
NYX 0:85b3fd62ea1a 190 /** @addtogroup HAL_Exported_Functions_Group1
NYX 0:85b3fd62ea1a 191 * @{
NYX 0:85b3fd62ea1a 192 */
NYX 0:85b3fd62ea1a 193 /* Initialization and de-initialization functions ******************************/
NYX 0:85b3fd62ea1a 194 HAL_StatusTypeDef HAL_InitPre(void);
NYX 0:85b3fd62ea1a 195 HAL_StatusTypeDef HAL_Init(void);
NYX 0:85b3fd62ea1a 196 HAL_StatusTypeDef HAL_DeInit(void);
NYX 0:85b3fd62ea1a 197 void HAL_MspInit(void);
NYX 0:85b3fd62ea1a 198 void HAL_MspDeInit(void);
NYX 0:85b3fd62ea1a 199 HAL_StatusTypeDef HAL_InitTick (uint32_t TickPriority);
NYX 0:85b3fd62ea1a 200 /**
NYX 0:85b3fd62ea1a 201 * @}
NYX 0:85b3fd62ea1a 202 */
NYX 0:85b3fd62ea1a 203
NYX 0:85b3fd62ea1a 204 /** @addtogroup HAL_Exported_Functions_Group2
NYX 0:85b3fd62ea1a 205 * @{
NYX 0:85b3fd62ea1a 206 */
NYX 0:85b3fd62ea1a 207 /* Peripheral Control functions ************************************************/
NYX 0:85b3fd62ea1a 208 void HAL_IncTick(void);
NYX 0:85b3fd62ea1a 209 void HAL_Delay(__IO uint32_t Delay);
NYX 0:85b3fd62ea1a 210 uint32_t HAL_GetTick(void);
NYX 0:85b3fd62ea1a 211 void HAL_SuspendTick(void);
NYX 0:85b3fd62ea1a 212 void HAL_ResumeTick(void);
NYX 0:85b3fd62ea1a 213 uint32_t HAL_GetHalVersion(void);
NYX 0:85b3fd62ea1a 214 uint32_t HAL_GetREVID(void);
NYX 0:85b3fd62ea1a 215 uint32_t HAL_GetDEVID(void);
NYX 0:85b3fd62ea1a 216 void HAL_DBGMCU_EnableDBGSleepMode(void);
NYX 0:85b3fd62ea1a 217 void HAL_DBGMCU_DisableDBGSleepMode(void);
NYX 0:85b3fd62ea1a 218 void HAL_DBGMCU_EnableDBGStopMode(void);
NYX 0:85b3fd62ea1a 219 void HAL_DBGMCU_DisableDBGStopMode(void);
NYX 0:85b3fd62ea1a 220 void HAL_DBGMCU_EnableDBGStandbyMode(void);
NYX 0:85b3fd62ea1a 221 void HAL_DBGMCU_DisableDBGStandbyMode(void);
NYX 0:85b3fd62ea1a 222 void HAL_EnableCompensationCell(void);
NYX 0:85b3fd62ea1a 223 void HAL_DisableCompensationCell(void);
NYX 0:85b3fd62ea1a 224 void HAL_GetUID(uint32_t *UID);
NYX 0:85b3fd62ea1a 225 #if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx)|| defined(STM32F439xx) ||\
NYX 0:85b3fd62ea1a 226 defined(STM32F469xx) || defined(STM32F479xx)
NYX 0:85b3fd62ea1a 227 void HAL_EnableMemorySwappingBank(void);
NYX 0:85b3fd62ea1a 228 void HAL_DisableMemorySwappingBank(void);
NYX 0:85b3fd62ea1a 229 #endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || STM32F469xx || STM32F479xx */
NYX 0:85b3fd62ea1a 230 /**
NYX 0:85b3fd62ea1a 231 * @}
NYX 0:85b3fd62ea1a 232 */
NYX 0:85b3fd62ea1a 233
NYX 0:85b3fd62ea1a 234 /**
NYX 0:85b3fd62ea1a 235 * @}
NYX 0:85b3fd62ea1a 236 */
NYX 0:85b3fd62ea1a 237 /* Private types -------------------------------------------------------------*/
NYX 0:85b3fd62ea1a 238 /* Private variables ---------------------------------------------------------*/
NYX 0:85b3fd62ea1a 239 /** @defgroup HAL_Private_Variables HAL Private Variables
NYX 0:85b3fd62ea1a 240 * @{
NYX 0:85b3fd62ea1a 241 */
NYX 0:85b3fd62ea1a 242 /**
NYX 0:85b3fd62ea1a 243 * @}
NYX 0:85b3fd62ea1a 244 */
NYX 0:85b3fd62ea1a 245 /* Private constants ---------------------------------------------------------*/
NYX 0:85b3fd62ea1a 246 /** @defgroup HAL_Private_Constants HAL Private Constants
NYX 0:85b3fd62ea1a 247 * @{
NYX 0:85b3fd62ea1a 248 */
NYX 0:85b3fd62ea1a 249 /**
NYX 0:85b3fd62ea1a 250 * @}
NYX 0:85b3fd62ea1a 251 */
NYX 0:85b3fd62ea1a 252 /* Private macros ------------------------------------------------------------*/
NYX 0:85b3fd62ea1a 253 /* Private functions ---------------------------------------------------------*/
NYX 0:85b3fd62ea1a 254 /**
NYX 0:85b3fd62ea1a 255 * @}
NYX 0:85b3fd62ea1a 256 */
NYX 0:85b3fd62ea1a 257
NYX 0:85b3fd62ea1a 258 /**
NYX 0:85b3fd62ea1a 259 * @}
NYX 0:85b3fd62ea1a 260 */
NYX 0:85b3fd62ea1a 261
NYX 0:85b3fd62ea1a 262 #ifdef __cplusplus
NYX 0:85b3fd62ea1a 263 }
NYX 0:85b3fd62ea1a 264 #endif
NYX 0:85b3fd62ea1a 265
NYX 0:85b3fd62ea1a 266 #endif /* __STM32F4xx_HAL_H */
NYX 0:85b3fd62ea1a 267
NYX 0:85b3fd62ea1a 268 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/