Takaaki Numai / mbed-dev

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cmsis/TARGET_CORTEX_M/TOOLCHAIN_ARM/cmsis_armcc.h@0:85b3fd62ea1a, 2020-03-16 (annotated)

Committer:
NYX
Date:
Mon Mar 16 06:35:48 2020 +0000
Revision:
0:85b3fd62ea1a
reinport to mbed;

Who changed what in which revision?

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NYX 0:85b3fd62ea1a 1 /**************************************************************************//**
NYX 0:85b3fd62ea1a 2 * @file cmsis_armcc.h
NYX 0:85b3fd62ea1a 3 * @brief CMSIS compiler ARMCC (ARM compiler V5) header file
NYX 0:85b3fd62ea1a 4 * @version V5.0.2
NYX 0:85b3fd62ea1a 5 * @date 13. February 2017
NYX 0:85b3fd62ea1a 6 ******************************************************************************/
NYX 0:85b3fd62ea1a 7 /*
NYX 0:85b3fd62ea1a 8 * Copyright (c) 2009-2017 ARM Limited. All rights reserved.
NYX 0:85b3fd62ea1a 9 *
NYX 0:85b3fd62ea1a 10 * SPDX-License-Identifier: Apache-2.0
NYX 0:85b3fd62ea1a 11 *
NYX 0:85b3fd62ea1a 12 * Licensed under the Apache License, Version 2.0 (the License); you may
NYX 0:85b3fd62ea1a 13 * not use this file except in compliance with the License.
NYX 0:85b3fd62ea1a 14 * You may obtain a copy of the License at
NYX 0:85b3fd62ea1a 15 *
NYX 0:85b3fd62ea1a 16 * www.apache.org/licenses/LICENSE-2.0
NYX 0:85b3fd62ea1a 17 *
NYX 0:85b3fd62ea1a 18 * Unless required by applicable law or agreed to in writing, software
NYX 0:85b3fd62ea1a 19 * distributed under the License is distributed on an AS IS BASIS, WITHOUT
NYX 0:85b3fd62ea1a 20 * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
NYX 0:85b3fd62ea1a 21 * See the License for the specific language governing permissions and
NYX 0:85b3fd62ea1a 22 * limitations under the License.
NYX 0:85b3fd62ea1a 23 */
NYX 0:85b3fd62ea1a 24
NYX 0:85b3fd62ea1a 25 #ifndef __CMSIS_ARMCC_H
NYX 0:85b3fd62ea1a 26 #define __CMSIS_ARMCC_H
NYX 0:85b3fd62ea1a 27
NYX 0:85b3fd62ea1a 28
NYX 0:85b3fd62ea1a 29 #if defined(__ARMCC_VERSION) && (__ARMCC_VERSION < 400677)
NYX 0:85b3fd62ea1a 30 #error "Please use ARM Compiler Toolchain V4.0.677 or later!"
NYX 0:85b3fd62ea1a 31 #endif
NYX 0:85b3fd62ea1a 32
NYX 0:85b3fd62ea1a 33 /* CMSIS compiler control architecture macros */
NYX 0:85b3fd62ea1a 34 #if ((defined (__TARGET_ARCH_6_M ) && (__TARGET_ARCH_6_M == 1)) || \
NYX 0:85b3fd62ea1a 35 (defined (__TARGET_ARCH_6S_M ) && (__TARGET_ARCH_6S_M == 1)) )
NYX 0:85b3fd62ea1a 36 #define __ARM_ARCH_6M__ 1
NYX 0:85b3fd62ea1a 37 #endif
NYX 0:85b3fd62ea1a 38
NYX 0:85b3fd62ea1a 39 #if (defined (__TARGET_ARCH_7_M ) && (__TARGET_ARCH_7_M == 1))
NYX 0:85b3fd62ea1a 40 #define __ARM_ARCH_7M__ 1
NYX 0:85b3fd62ea1a 41 #endif
NYX 0:85b3fd62ea1a 42
NYX 0:85b3fd62ea1a 43 #if (defined (__TARGET_ARCH_7E_M) && (__TARGET_ARCH_7E_M == 1))
NYX 0:85b3fd62ea1a 44 #define __ARM_ARCH_7EM__ 1
NYX 0:85b3fd62ea1a 45 #endif
NYX 0:85b3fd62ea1a 46
NYX 0:85b3fd62ea1a 47 /* __ARM_ARCH_8M_BASE__ not applicable */
NYX 0:85b3fd62ea1a 48 /* __ARM_ARCH_8M_MAIN__ not applicable */
NYX 0:85b3fd62ea1a 49
NYX 0:85b3fd62ea1a 50
NYX 0:85b3fd62ea1a 51 /* CMSIS compiler specific defines */
NYX 0:85b3fd62ea1a 52 #ifndef __ASM
NYX 0:85b3fd62ea1a 53 #define __ASM __asm
NYX 0:85b3fd62ea1a 54 #endif
NYX 0:85b3fd62ea1a 55 #ifndef __INLINE
NYX 0:85b3fd62ea1a 56 #define __INLINE __inline
NYX 0:85b3fd62ea1a 57 #endif
NYX 0:85b3fd62ea1a 58 #ifndef __STATIC_INLINE
NYX 0:85b3fd62ea1a 59 #define __STATIC_INLINE static __inline
NYX 0:85b3fd62ea1a 60 #endif
NYX 0:85b3fd62ea1a 61 #ifndef __NO_RETURN
NYX 0:85b3fd62ea1a 62 #define __NO_RETURN __declspec(noreturn)
NYX 0:85b3fd62ea1a 63 #endif
NYX 0:85b3fd62ea1a 64 #ifndef __USED
NYX 0:85b3fd62ea1a 65 #define __USED __attribute__((used))
NYX 0:85b3fd62ea1a 66 #endif
NYX 0:85b3fd62ea1a 67 #ifndef __WEAK
NYX 0:85b3fd62ea1a 68 #define __WEAK __attribute__((weak))
NYX 0:85b3fd62ea1a 69 #endif
NYX 0:85b3fd62ea1a 70 #ifndef __PACKED
NYX 0:85b3fd62ea1a 71 #define __PACKED __attribute__((packed))
NYX 0:85b3fd62ea1a 72 #endif
NYX 0:85b3fd62ea1a 73 #ifndef __PACKED_STRUCT
NYX 0:85b3fd62ea1a 74 #define __PACKED_STRUCT __packed struct
NYX 0:85b3fd62ea1a 75 #endif
NYX 0:85b3fd62ea1a 76 #ifndef __UNALIGNED_UINT32 /* deprecated */
NYX 0:85b3fd62ea1a 77 #define __UNALIGNED_UINT32(x) (*((__packed uint32_t *)(x)))
NYX 0:85b3fd62ea1a 78 #endif
NYX 0:85b3fd62ea1a 79 #ifndef __UNALIGNED_UINT16_WRITE
NYX 0:85b3fd62ea1a 80 #define __UNALIGNED_UINT16_WRITE(addr, val) ((*((__packed uint16_t *)(addr))) = (val))
NYX 0:85b3fd62ea1a 81 #endif
NYX 0:85b3fd62ea1a 82 #ifndef __UNALIGNED_UINT16_READ
NYX 0:85b3fd62ea1a 83 #define __UNALIGNED_UINT16_READ(addr) (*((const __packed uint16_t *)(addr)))
NYX 0:85b3fd62ea1a 84 #endif
NYX 0:85b3fd62ea1a 85 #ifndef __UNALIGNED_UINT32_WRITE
NYX 0:85b3fd62ea1a 86 #define __UNALIGNED_UINT32_WRITE(addr, val) ((*((__packed uint32_t *)(addr))) = (val))
NYX 0:85b3fd62ea1a 87 #endif
NYX 0:85b3fd62ea1a 88 #ifndef __UNALIGNED_UINT32_READ
NYX 0:85b3fd62ea1a 89 #define __UNALIGNED_UINT32_READ(addr) (*((const __packed uint32_t *)(addr)))
NYX 0:85b3fd62ea1a 90 #endif
NYX 0:85b3fd62ea1a 91 #ifndef __ALIGNED
NYX 0:85b3fd62ea1a 92 #define __ALIGNED(x) __attribute__((aligned(x)))
NYX 0:85b3fd62ea1a 93 #endif
NYX 0:85b3fd62ea1a 94
NYX 0:85b3fd62ea1a 95
NYX 0:85b3fd62ea1a 96 /* ########################### Core Function Access ########################### */
NYX 0:85b3fd62ea1a 97 /** \ingroup CMSIS_Core_FunctionInterface
NYX 0:85b3fd62ea1a 98 \defgroup CMSIS_Core_RegAccFunctions CMSIS Core Register Access Functions
NYX 0:85b3fd62ea1a 99 @{
NYX 0:85b3fd62ea1a 100 */
NYX 0:85b3fd62ea1a 101
NYX 0:85b3fd62ea1a 102 /**
NYX 0:85b3fd62ea1a 103 \brief Enable IRQ Interrupts
NYX 0:85b3fd62ea1a 104 \details Enables IRQ interrupts by clearing the I-bit in the CPSR.
NYX 0:85b3fd62ea1a 105 Can only be executed in Privileged modes.
NYX 0:85b3fd62ea1a 106 */
NYX 0:85b3fd62ea1a 107 /* intrinsic void __enable_irq(); */
NYX 0:85b3fd62ea1a 108
NYX 0:85b3fd62ea1a 109
NYX 0:85b3fd62ea1a 110 /**
NYX 0:85b3fd62ea1a 111 \brief Disable IRQ Interrupts
NYX 0:85b3fd62ea1a 112 \details Disables IRQ interrupts by setting the I-bit in the CPSR.
NYX 0:85b3fd62ea1a 113 Can only be executed in Privileged modes.
NYX 0:85b3fd62ea1a 114 */
NYX 0:85b3fd62ea1a 115 /* intrinsic void __disable_irq(); */
NYX 0:85b3fd62ea1a 116
NYX 0:85b3fd62ea1a 117 /**
NYX 0:85b3fd62ea1a 118 \brief Get Control Register
NYX 0:85b3fd62ea1a 119 \details Returns the content of the Control Register.
NYX 0:85b3fd62ea1a 120 \return Control Register value
NYX 0:85b3fd62ea1a 121 */
NYX 0:85b3fd62ea1a 122 __STATIC_INLINE uint32_t __get_CONTROL(void)
NYX 0:85b3fd62ea1a 123 {
NYX 0:85b3fd62ea1a 124 register uint32_t __regControl __ASM("control");
NYX 0:85b3fd62ea1a 125 return(__regControl);
NYX 0:85b3fd62ea1a 126 }
NYX 0:85b3fd62ea1a 127
NYX 0:85b3fd62ea1a 128
NYX 0:85b3fd62ea1a 129 /**
NYX 0:85b3fd62ea1a 130 \brief Set Control Register
NYX 0:85b3fd62ea1a 131 \details Writes the given value to the Control Register.
NYX 0:85b3fd62ea1a 132 \param [in] control Control Register value to set
NYX 0:85b3fd62ea1a 133 */
NYX 0:85b3fd62ea1a 134 __STATIC_INLINE void __set_CONTROL(uint32_t control)
NYX 0:85b3fd62ea1a 135 {
NYX 0:85b3fd62ea1a 136 register uint32_t __regControl __ASM("control");
NYX 0:85b3fd62ea1a 137 __regControl = control;
NYX 0:85b3fd62ea1a 138 }
NYX 0:85b3fd62ea1a 139
NYX 0:85b3fd62ea1a 140
NYX 0:85b3fd62ea1a 141 /**
NYX 0:85b3fd62ea1a 142 \brief Get IPSR Register
NYX 0:85b3fd62ea1a 143 \details Returns the content of the IPSR Register.
NYX 0:85b3fd62ea1a 144 \return IPSR Register value
NYX 0:85b3fd62ea1a 145 */
NYX 0:85b3fd62ea1a 146 __STATIC_INLINE uint32_t __get_IPSR(void)
NYX 0:85b3fd62ea1a 147 {
NYX 0:85b3fd62ea1a 148 register uint32_t __regIPSR __ASM("ipsr");
NYX 0:85b3fd62ea1a 149 return(__regIPSR);
NYX 0:85b3fd62ea1a 150 }
NYX 0:85b3fd62ea1a 151
NYX 0:85b3fd62ea1a 152
NYX 0:85b3fd62ea1a 153 /**
NYX 0:85b3fd62ea1a 154 \brief Get APSR Register
NYX 0:85b3fd62ea1a 155 \details Returns the content of the APSR Register.
NYX 0:85b3fd62ea1a 156 \return APSR Register value
NYX 0:85b3fd62ea1a 157 */
NYX 0:85b3fd62ea1a 158 __STATIC_INLINE uint32_t __get_APSR(void)
NYX 0:85b3fd62ea1a 159 {
NYX 0:85b3fd62ea1a 160 register uint32_t __regAPSR __ASM("apsr");
NYX 0:85b3fd62ea1a 161 return(__regAPSR);
NYX 0:85b3fd62ea1a 162 }
NYX 0:85b3fd62ea1a 163
NYX 0:85b3fd62ea1a 164
NYX 0:85b3fd62ea1a 165 /**
NYX 0:85b3fd62ea1a 166 \brief Get xPSR Register
NYX 0:85b3fd62ea1a 167 \details Returns the content of the xPSR Register.
NYX 0:85b3fd62ea1a 168 \return xPSR Register value
NYX 0:85b3fd62ea1a 169 */
NYX 0:85b3fd62ea1a 170 __STATIC_INLINE uint32_t __get_xPSR(void)
NYX 0:85b3fd62ea1a 171 {
NYX 0:85b3fd62ea1a 172 register uint32_t __regXPSR __ASM("xpsr");
NYX 0:85b3fd62ea1a 173 return(__regXPSR);
NYX 0:85b3fd62ea1a 174 }
NYX 0:85b3fd62ea1a 175
NYX 0:85b3fd62ea1a 176
NYX 0:85b3fd62ea1a 177 /**
NYX 0:85b3fd62ea1a 178 \brief Get Process Stack Pointer
NYX 0:85b3fd62ea1a 179 \details Returns the current value of the Process Stack Pointer (PSP).
NYX 0:85b3fd62ea1a 180 \return PSP Register value
NYX 0:85b3fd62ea1a 181 */
NYX 0:85b3fd62ea1a 182 __STATIC_INLINE uint32_t __get_PSP(void)
NYX 0:85b3fd62ea1a 183 {
NYX 0:85b3fd62ea1a 184 register uint32_t __regProcessStackPointer __ASM("psp");
NYX 0:85b3fd62ea1a 185 return(__regProcessStackPointer);
NYX 0:85b3fd62ea1a 186 }
NYX 0:85b3fd62ea1a 187
NYX 0:85b3fd62ea1a 188
NYX 0:85b3fd62ea1a 189 /**
NYX 0:85b3fd62ea1a 190 \brief Set Process Stack Pointer
NYX 0:85b3fd62ea1a 191 \details Assigns the given value to the Process Stack Pointer (PSP).
NYX 0:85b3fd62ea1a 192 \param [in] topOfProcStack Process Stack Pointer value to set
NYX 0:85b3fd62ea1a 193 */
NYX 0:85b3fd62ea1a 194 __STATIC_INLINE void __set_PSP(uint32_t topOfProcStack)
NYX 0:85b3fd62ea1a 195 {
NYX 0:85b3fd62ea1a 196 register uint32_t __regProcessStackPointer __ASM("psp");
NYX 0:85b3fd62ea1a 197 __regProcessStackPointer = topOfProcStack;
NYX 0:85b3fd62ea1a 198 }
NYX 0:85b3fd62ea1a 199
NYX 0:85b3fd62ea1a 200
NYX 0:85b3fd62ea1a 201 /**
NYX 0:85b3fd62ea1a 202 \brief Get Main Stack Pointer
NYX 0:85b3fd62ea1a 203 \details Returns the current value of the Main Stack Pointer (MSP).
NYX 0:85b3fd62ea1a 204 \return MSP Register value
NYX 0:85b3fd62ea1a 205 */
NYX 0:85b3fd62ea1a 206 __STATIC_INLINE uint32_t __get_MSP(void)
NYX 0:85b3fd62ea1a 207 {
NYX 0:85b3fd62ea1a 208 register uint32_t __regMainStackPointer __ASM("msp");
NYX 0:85b3fd62ea1a 209 return(__regMainStackPointer);
NYX 0:85b3fd62ea1a 210 }
NYX 0:85b3fd62ea1a 211
NYX 0:85b3fd62ea1a 212
NYX 0:85b3fd62ea1a 213 /**
NYX 0:85b3fd62ea1a 214 \brief Set Main Stack Pointer
NYX 0:85b3fd62ea1a 215 \details Assigns the given value to the Main Stack Pointer (MSP).
NYX 0:85b3fd62ea1a 216 \param [in] topOfMainStack Main Stack Pointer value to set
NYX 0:85b3fd62ea1a 217 */
NYX 0:85b3fd62ea1a 218 __STATIC_INLINE void __set_MSP(uint32_t topOfMainStack)
NYX 0:85b3fd62ea1a 219 {
NYX 0:85b3fd62ea1a 220 register uint32_t __regMainStackPointer __ASM("msp");
NYX 0:85b3fd62ea1a 221 __regMainStackPointer = topOfMainStack;
NYX 0:85b3fd62ea1a 222 }
NYX 0:85b3fd62ea1a 223
NYX 0:85b3fd62ea1a 224
NYX 0:85b3fd62ea1a 225 /**
NYX 0:85b3fd62ea1a 226 \brief Get Priority Mask
NYX 0:85b3fd62ea1a 227 \details Returns the current state of the priority mask bit from the Priority Mask Register.
NYX 0:85b3fd62ea1a 228 \return Priority Mask value
NYX 0:85b3fd62ea1a 229 */
NYX 0:85b3fd62ea1a 230 __STATIC_INLINE uint32_t __get_PRIMASK(void)
NYX 0:85b3fd62ea1a 231 {
NYX 0:85b3fd62ea1a 232 register uint32_t __regPriMask __ASM("primask");
NYX 0:85b3fd62ea1a 233 return(__regPriMask);
NYX 0:85b3fd62ea1a 234 }
NYX 0:85b3fd62ea1a 235
NYX 0:85b3fd62ea1a 236
NYX 0:85b3fd62ea1a 237 /**
NYX 0:85b3fd62ea1a 238 \brief Set Priority Mask
NYX 0:85b3fd62ea1a 239 \details Assigns the given value to the Priority Mask Register.
NYX 0:85b3fd62ea1a 240 \param [in] priMask Priority Mask
NYX 0:85b3fd62ea1a 241 */
NYX 0:85b3fd62ea1a 242 __STATIC_INLINE void __set_PRIMASK(uint32_t priMask)
NYX 0:85b3fd62ea1a 243 {
NYX 0:85b3fd62ea1a 244 register uint32_t __regPriMask __ASM("primask");
NYX 0:85b3fd62ea1a 245 __regPriMask = (priMask);
NYX 0:85b3fd62ea1a 246 }
NYX 0:85b3fd62ea1a 247
NYX 0:85b3fd62ea1a 248
NYX 0:85b3fd62ea1a 249 #if ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \
NYX 0:85b3fd62ea1a 250 (defined (__ARM_ARCH_7EM__) && (__ARM_ARCH_7EM__ == 1)) )
NYX 0:85b3fd62ea1a 251
NYX 0:85b3fd62ea1a 252 /**
NYX 0:85b3fd62ea1a 253 \brief Enable FIQ
NYX 0:85b3fd62ea1a 254 \details Enables FIQ interrupts by clearing the F-bit in the CPSR.
NYX 0:85b3fd62ea1a 255 Can only be executed in Privileged modes.
NYX 0:85b3fd62ea1a 256 */
NYX 0:85b3fd62ea1a 257 #define __enable_fault_irq __enable_fiq
NYX 0:85b3fd62ea1a 258
NYX 0:85b3fd62ea1a 259
NYX 0:85b3fd62ea1a 260 /**
NYX 0:85b3fd62ea1a 261 \brief Disable FIQ
NYX 0:85b3fd62ea1a 262 \details Disables FIQ interrupts by setting the F-bit in the CPSR.
NYX 0:85b3fd62ea1a 263 Can only be executed in Privileged modes.
NYX 0:85b3fd62ea1a 264 */
NYX 0:85b3fd62ea1a 265 #define __disable_fault_irq __disable_fiq
NYX 0:85b3fd62ea1a 266
NYX 0:85b3fd62ea1a 267
NYX 0:85b3fd62ea1a 268 /**
NYX 0:85b3fd62ea1a 269 \brief Get Base Priority
NYX 0:85b3fd62ea1a 270 \details Returns the current value of the Base Priority register.
NYX 0:85b3fd62ea1a 271 \return Base Priority register value
NYX 0:85b3fd62ea1a 272 */
NYX 0:85b3fd62ea1a 273 __STATIC_INLINE uint32_t __get_BASEPRI(void)
NYX 0:85b3fd62ea1a 274 {
NYX 0:85b3fd62ea1a 275 register uint32_t __regBasePri __ASM("basepri");
NYX 0:85b3fd62ea1a 276 return(__regBasePri);
NYX 0:85b3fd62ea1a 277 }
NYX 0:85b3fd62ea1a 278
NYX 0:85b3fd62ea1a 279
NYX 0:85b3fd62ea1a 280 /**
NYX 0:85b3fd62ea1a 281 \brief Set Base Priority
NYX 0:85b3fd62ea1a 282 \details Assigns the given value to the Base Priority register.
NYX 0:85b3fd62ea1a 283 \param [in] basePri Base Priority value to set
NYX 0:85b3fd62ea1a 284 */
NYX 0:85b3fd62ea1a 285 __STATIC_INLINE void __set_BASEPRI(uint32_t basePri)
NYX 0:85b3fd62ea1a 286 {
NYX 0:85b3fd62ea1a 287 register uint32_t __regBasePri __ASM("basepri");
NYX 0:85b3fd62ea1a 288 __regBasePri = (basePri & 0xFFU);
NYX 0:85b3fd62ea1a 289 }
NYX 0:85b3fd62ea1a 290
NYX 0:85b3fd62ea1a 291
NYX 0:85b3fd62ea1a 292 /**
NYX 0:85b3fd62ea1a 293 \brief Set Base Priority with condition
NYX 0:85b3fd62ea1a 294 \details Assigns the given value to the Base Priority register only if BASEPRI masking is disabled,
NYX 0:85b3fd62ea1a 295 or the new value increases the BASEPRI priority level.
NYX 0:85b3fd62ea1a 296 \param [in] basePri Base Priority value to set
NYX 0:85b3fd62ea1a 297 */
NYX 0:85b3fd62ea1a 298 __STATIC_INLINE void __set_BASEPRI_MAX(uint32_t basePri)
NYX 0:85b3fd62ea1a 299 {
NYX 0:85b3fd62ea1a 300 register uint32_t __regBasePriMax __ASM("basepri_max");
NYX 0:85b3fd62ea1a 301 __regBasePriMax = (basePri & 0xFFU);
NYX 0:85b3fd62ea1a 302 }
NYX 0:85b3fd62ea1a 303
NYX 0:85b3fd62ea1a 304
NYX 0:85b3fd62ea1a 305 /**
NYX 0:85b3fd62ea1a 306 \brief Get Fault Mask
NYX 0:85b3fd62ea1a 307 \details Returns the current value of the Fault Mask register.
NYX 0:85b3fd62ea1a 308 \return Fault Mask register value
NYX 0:85b3fd62ea1a 309 */
NYX 0:85b3fd62ea1a 310 __STATIC_INLINE uint32_t __get_FAULTMASK(void)
NYX 0:85b3fd62ea1a 311 {
NYX 0:85b3fd62ea1a 312 register uint32_t __regFaultMask __ASM("faultmask");
NYX 0:85b3fd62ea1a 313 return(__regFaultMask);
NYX 0:85b3fd62ea1a 314 }
NYX 0:85b3fd62ea1a 315
NYX 0:85b3fd62ea1a 316
NYX 0:85b3fd62ea1a 317 /**
NYX 0:85b3fd62ea1a 318 \brief Set Fault Mask
NYX 0:85b3fd62ea1a 319 \details Assigns the given value to the Fault Mask register.
NYX 0:85b3fd62ea1a 320 \param [in] faultMask Fault Mask value to set
NYX 0:85b3fd62ea1a 321 */
NYX 0:85b3fd62ea1a 322 __STATIC_INLINE void __set_FAULTMASK(uint32_t faultMask)
NYX 0:85b3fd62ea1a 323 {
NYX 0:85b3fd62ea1a 324 register uint32_t __regFaultMask __ASM("faultmask");
NYX 0:85b3fd62ea1a 325 __regFaultMask = (faultMask & (uint32_t)1U);
NYX 0:85b3fd62ea1a 326 }
NYX 0:85b3fd62ea1a 327
NYX 0:85b3fd62ea1a 328 #endif /* ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \
NYX 0:85b3fd62ea1a 329 (defined (__ARM_ARCH_7EM__) && (__ARM_ARCH_7EM__ == 1)) ) */
NYX 0:85b3fd62ea1a 330
NYX 0:85b3fd62ea1a 331
NYX 0:85b3fd62ea1a 332 #if ((defined (__ARM_ARCH_7EM__) && (__ARM_ARCH_7EM__ == 1)) )
NYX 0:85b3fd62ea1a 333
NYX 0:85b3fd62ea1a 334 /**
NYX 0:85b3fd62ea1a 335 \brief Get FPSCR
NYX 0:85b3fd62ea1a 336 \details Returns the current value of the Floating Point Status/Control register.
NYX 0:85b3fd62ea1a 337 \return Floating Point Status/Control register value
NYX 0:85b3fd62ea1a 338 */
NYX 0:85b3fd62ea1a 339 __STATIC_INLINE uint32_t __get_FPSCR(void)
NYX 0:85b3fd62ea1a 340 {
NYX 0:85b3fd62ea1a 341 #if ((defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)) && \
NYX 0:85b3fd62ea1a 342 (defined (__FPU_USED ) && (__FPU_USED == 1U)) )
NYX 0:85b3fd62ea1a 343 register uint32_t __regfpscr __ASM("fpscr");
NYX 0:85b3fd62ea1a 344 return(__regfpscr);
NYX 0:85b3fd62ea1a 345 #else
NYX 0:85b3fd62ea1a 346 return(0U);
NYX 0:85b3fd62ea1a 347 #endif
NYX 0:85b3fd62ea1a 348 }
NYX 0:85b3fd62ea1a 349
NYX 0:85b3fd62ea1a 350
NYX 0:85b3fd62ea1a 351 /**
NYX 0:85b3fd62ea1a 352 \brief Set FPSCR
NYX 0:85b3fd62ea1a 353 \details Assigns the given value to the Floating Point Status/Control register.
NYX 0:85b3fd62ea1a 354 \param [in] fpscr Floating Point Status/Control value to set
NYX 0:85b3fd62ea1a 355 */
NYX 0:85b3fd62ea1a 356 __STATIC_INLINE void __set_FPSCR(uint32_t fpscr)
NYX 0:85b3fd62ea1a 357 {
NYX 0:85b3fd62ea1a 358 #if ((defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)) && \
NYX 0:85b3fd62ea1a 359 (defined (__FPU_USED ) && (__FPU_USED == 1U)) )
NYX 0:85b3fd62ea1a 360 register uint32_t __regfpscr __ASM("fpscr");
NYX 0:85b3fd62ea1a 361 __regfpscr = (fpscr);
NYX 0:85b3fd62ea1a 362 #else
NYX 0:85b3fd62ea1a 363 (void)fpscr;
NYX 0:85b3fd62ea1a 364 #endif
NYX 0:85b3fd62ea1a 365 }
NYX 0:85b3fd62ea1a 366
NYX 0:85b3fd62ea1a 367 #endif /* ((defined (__ARM_ARCH_7EM__) && (__ARM_ARCH_7EM__ == 1)) ) */
NYX 0:85b3fd62ea1a 368
NYX 0:85b3fd62ea1a 369
NYX 0:85b3fd62ea1a 370
NYX 0:85b3fd62ea1a 371 /*@} end of CMSIS_Core_RegAccFunctions */
NYX 0:85b3fd62ea1a 372
NYX 0:85b3fd62ea1a 373
NYX 0:85b3fd62ea1a 374 /* ########################## Core Instruction Access ######################### */
NYX 0:85b3fd62ea1a 375 /** \defgroup CMSIS_Core_InstructionInterface CMSIS Core Instruction Interface
NYX 0:85b3fd62ea1a 376 Access to dedicated instructions
NYX 0:85b3fd62ea1a 377 @{
NYX 0:85b3fd62ea1a 378 */
NYX 0:85b3fd62ea1a 379
NYX 0:85b3fd62ea1a 380 /**
NYX 0:85b3fd62ea1a 381 \brief No Operation
NYX 0:85b3fd62ea1a 382 \details No Operation does nothing. This instruction can be used for code alignment purposes.
NYX 0:85b3fd62ea1a 383 */
NYX 0:85b3fd62ea1a 384 #define __NOP __nop
NYX 0:85b3fd62ea1a 385
NYX 0:85b3fd62ea1a 386
NYX 0:85b3fd62ea1a 387 /**
NYX 0:85b3fd62ea1a 388 \brief Wait For Interrupt
NYX 0:85b3fd62ea1a 389 \details Wait For Interrupt is a hint instruction that suspends execution until one of a number of events occurs.
NYX 0:85b3fd62ea1a 390 */
NYX 0:85b3fd62ea1a 391 #define __WFI __wfi
NYX 0:85b3fd62ea1a 392
NYX 0:85b3fd62ea1a 393
NYX 0:85b3fd62ea1a 394 /**
NYX 0:85b3fd62ea1a 395 \brief Wait For Event
NYX 0:85b3fd62ea1a 396 \details Wait For Event is a hint instruction that permits the processor to enter
NYX 0:85b3fd62ea1a 397 a low-power state until one of a number of events occurs.
NYX 0:85b3fd62ea1a 398 */
NYX 0:85b3fd62ea1a 399 #define __WFE __wfe
NYX 0:85b3fd62ea1a 400
NYX 0:85b3fd62ea1a 401
NYX 0:85b3fd62ea1a 402 /**
NYX 0:85b3fd62ea1a 403 \brief Send Event
NYX 0:85b3fd62ea1a 404 \details Send Event is a hint instruction. It causes an event to be signaled to the CPU.
NYX 0:85b3fd62ea1a 405 */
NYX 0:85b3fd62ea1a 406 #define __SEV __sev
NYX 0:85b3fd62ea1a 407
NYX 0:85b3fd62ea1a 408
NYX 0:85b3fd62ea1a 409 /**
NYX 0:85b3fd62ea1a 410 \brief Instruction Synchronization Barrier
NYX 0:85b3fd62ea1a 411 \details Instruction Synchronization Barrier flushes the pipeline in the processor,
NYX 0:85b3fd62ea1a 412 so that all instructions following the ISB are fetched from cache or memory,
NYX 0:85b3fd62ea1a 413 after the instruction has been completed.
NYX 0:85b3fd62ea1a 414 */
NYX 0:85b3fd62ea1a 415 #define __ISB() do {\
NYX 0:85b3fd62ea1a 416 __schedule_barrier();\
NYX 0:85b3fd62ea1a 417 __isb(0xF);\
NYX 0:85b3fd62ea1a 418 __schedule_barrier();\
NYX 0:85b3fd62ea1a 419 } while (0U)
NYX 0:85b3fd62ea1a 420
NYX 0:85b3fd62ea1a 421 /**
NYX 0:85b3fd62ea1a 422 \brief Data Synchronization Barrier
NYX 0:85b3fd62ea1a 423 \details Acts as a special kind of Data Memory Barrier.
NYX 0:85b3fd62ea1a 424 It completes when all explicit memory accesses before this instruction complete.
NYX 0:85b3fd62ea1a 425 */
NYX 0:85b3fd62ea1a 426 #define __DSB() do {\
NYX 0:85b3fd62ea1a 427 __schedule_barrier();\
NYX 0:85b3fd62ea1a 428 __dsb(0xF);\
NYX 0:85b3fd62ea1a 429 __schedule_barrier();\
NYX 0:85b3fd62ea1a 430 } while (0U)
NYX 0:85b3fd62ea1a 431
NYX 0:85b3fd62ea1a 432 /**
NYX 0:85b3fd62ea1a 433 \brief Data Memory Barrier
NYX 0:85b3fd62ea1a 434 \details Ensures the apparent order of the explicit memory operations before
NYX 0:85b3fd62ea1a 435 and after the instruction, without ensuring their completion.
NYX 0:85b3fd62ea1a 436 */
NYX 0:85b3fd62ea1a 437 #define __DMB() do {\
NYX 0:85b3fd62ea1a 438 __schedule_barrier();\
NYX 0:85b3fd62ea1a 439 __dmb(0xF);\
NYX 0:85b3fd62ea1a 440 __schedule_barrier();\
NYX 0:85b3fd62ea1a 441 } while (0U)
NYX 0:85b3fd62ea1a 442
NYX 0:85b3fd62ea1a 443 /**
NYX 0:85b3fd62ea1a 444 \brief Reverse byte order (32 bit)
NYX 0:85b3fd62ea1a 445 \details Reverses the byte order in integer value.
NYX 0:85b3fd62ea1a 446 \param [in] value Value to reverse
NYX 0:85b3fd62ea1a 447 \return Reversed value
NYX 0:85b3fd62ea1a 448 */
NYX 0:85b3fd62ea1a 449 #define __REV __rev
NYX 0:85b3fd62ea1a 450
NYX 0:85b3fd62ea1a 451
NYX 0:85b3fd62ea1a 452 /**
NYX 0:85b3fd62ea1a 453 \brief Reverse byte order (16 bit)
NYX 0:85b3fd62ea1a 454 \details Reverses the byte order in two unsigned short values.
NYX 0:85b3fd62ea1a 455 \param [in] value Value to reverse
NYX 0:85b3fd62ea1a 456 \return Reversed value
NYX 0:85b3fd62ea1a 457 */
NYX 0:85b3fd62ea1a 458 #ifndef __NO_EMBEDDED_ASM
NYX 0:85b3fd62ea1a 459 __attribute__((section(".rev16_text"))) __STATIC_INLINE __ASM uint32_t __REV16(uint32_t value)
NYX 0:85b3fd62ea1a 460 {
NYX 0:85b3fd62ea1a 461 rev16 r0, r0
NYX 0:85b3fd62ea1a 462 bx lr
NYX 0:85b3fd62ea1a 463 }
NYX 0:85b3fd62ea1a 464 #endif
NYX 0:85b3fd62ea1a 465
NYX 0:85b3fd62ea1a 466
NYX 0:85b3fd62ea1a 467 /**
NYX 0:85b3fd62ea1a 468 \brief Reverse byte order in signed short value
NYX 0:85b3fd62ea1a 469 \details Reverses the byte order in a signed short value with sign extension to integer.
NYX 0:85b3fd62ea1a 470 \param [in] value Value to reverse
NYX 0:85b3fd62ea1a 471 \return Reversed value
NYX 0:85b3fd62ea1a 472 */
NYX 0:85b3fd62ea1a 473 #ifndef __NO_EMBEDDED_ASM
NYX 0:85b3fd62ea1a 474 __attribute__((section(".revsh_text"))) __STATIC_INLINE __ASM int32_t __REVSH(int32_t value)
NYX 0:85b3fd62ea1a 475 {
NYX 0:85b3fd62ea1a 476 revsh r0, r0
NYX 0:85b3fd62ea1a 477 bx lr
NYX 0:85b3fd62ea1a 478 }
NYX 0:85b3fd62ea1a 479 #endif
NYX 0:85b3fd62ea1a 480
NYX 0:85b3fd62ea1a 481
NYX 0:85b3fd62ea1a 482 /**
NYX 0:85b3fd62ea1a 483 \brief Rotate Right in unsigned value (32 bit)
NYX 0:85b3fd62ea1a 484 \details Rotate Right (immediate) provides the value of the contents of a register rotated by a variable number of bits.
NYX 0:85b3fd62ea1a 485 \param [in] op1 Value to rotate
NYX 0:85b3fd62ea1a 486 \param [in] op2 Number of Bits to rotate
NYX 0:85b3fd62ea1a 487 \return Rotated value
NYX 0:85b3fd62ea1a 488 */
NYX 0:85b3fd62ea1a 489 #define __ROR __ror
NYX 0:85b3fd62ea1a 490
NYX 0:85b3fd62ea1a 491
NYX 0:85b3fd62ea1a 492 /**
NYX 0:85b3fd62ea1a 493 \brief Breakpoint
NYX 0:85b3fd62ea1a 494 \details Causes the processor to enter Debug state.
NYX 0:85b3fd62ea1a 495 Debug tools can use this to investigate system state when the instruction at a particular address is reached.
NYX 0:85b3fd62ea1a 496 \param [in] value is ignored by the processor.
NYX 0:85b3fd62ea1a 497 If required, a debugger can use it to store additional information about the breakpoint.
NYX 0:85b3fd62ea1a 498 */
NYX 0:85b3fd62ea1a 499 #define __BKPT(value) __breakpoint(value)
NYX 0:85b3fd62ea1a 500
NYX 0:85b3fd62ea1a 501
NYX 0:85b3fd62ea1a 502 /**
NYX 0:85b3fd62ea1a 503 \brief Reverse bit order of value
NYX 0:85b3fd62ea1a 504 \details Reverses the bit order of the given value.
NYX 0:85b3fd62ea1a 505 \param [in] value Value to reverse
NYX 0:85b3fd62ea1a 506 \return Reversed value
NYX 0:85b3fd62ea1a 507 */
NYX 0:85b3fd62ea1a 508 #if ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \
NYX 0:85b3fd62ea1a 509 (defined (__ARM_ARCH_7EM__) && (__ARM_ARCH_7EM__ == 1)) )
NYX 0:85b3fd62ea1a 510 #define __RBIT __rbit
NYX 0:85b3fd62ea1a 511 #else
NYX 0:85b3fd62ea1a 512 __attribute__((always_inline)) __STATIC_INLINE uint32_t __RBIT(uint32_t value)
NYX 0:85b3fd62ea1a 513 {
NYX 0:85b3fd62ea1a 514 uint32_t result;
NYX 0:85b3fd62ea1a 515 int32_t s = (4 /*sizeof(v)*/ * 8) - 1; /* extra shift needed at end */
NYX 0:85b3fd62ea1a 516
NYX 0:85b3fd62ea1a 517 result = value; /* r will be reversed bits of v; first get LSB of v */
NYX 0:85b3fd62ea1a 518 for (value >>= 1U; value; value >>= 1U)
NYX 0:85b3fd62ea1a 519 {
NYX 0:85b3fd62ea1a 520 result <<= 1U;
NYX 0:85b3fd62ea1a 521 result |= value & 1U;
NYX 0:85b3fd62ea1a 522 s--;
NYX 0:85b3fd62ea1a 523 }
NYX 0:85b3fd62ea1a 524 result <<= s; /* shift when v's highest bits are zero */
NYX 0:85b3fd62ea1a 525 return(result);
NYX 0:85b3fd62ea1a 526 }
NYX 0:85b3fd62ea1a 527 #endif
NYX 0:85b3fd62ea1a 528
NYX 0:85b3fd62ea1a 529
NYX 0:85b3fd62ea1a 530 /**
NYX 0:85b3fd62ea1a 531 \brief Count leading zeros
NYX 0:85b3fd62ea1a 532 \details Counts the number of leading zeros of a data value.
NYX 0:85b3fd62ea1a 533 \param [in] value Value to count the leading zeros
NYX 0:85b3fd62ea1a 534 \return number of leading zeros in value
NYX 0:85b3fd62ea1a 535 */
NYX 0:85b3fd62ea1a 536 #define __CLZ __clz
NYX 0:85b3fd62ea1a 537
NYX 0:85b3fd62ea1a 538
NYX 0:85b3fd62ea1a 539 #if ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \
NYX 0:85b3fd62ea1a 540 (defined (__ARM_ARCH_7EM__) && (__ARM_ARCH_7EM__ == 1)) )
NYX 0:85b3fd62ea1a 541
NYX 0:85b3fd62ea1a 542 /**
NYX 0:85b3fd62ea1a 543 \brief LDR Exclusive (8 bit)
NYX 0:85b3fd62ea1a 544 \details Executes a exclusive LDR instruction for 8 bit value.
NYX 0:85b3fd62ea1a 545 \param [in] ptr Pointer to data
NYX 0:85b3fd62ea1a 546 \return value of type uint8_t at (*ptr)
NYX 0:85b3fd62ea1a 547 */
NYX 0:85b3fd62ea1a 548 #if defined(__ARMCC_VERSION) && (__ARMCC_VERSION < 5060020)
NYX 0:85b3fd62ea1a 549 #define __LDREXB(ptr) ((uint8_t ) __ldrex(ptr))
NYX 0:85b3fd62ea1a 550 #else
NYX 0:85b3fd62ea1a 551 #define __LDREXB(ptr) _Pragma("push") _Pragma("diag_suppress 3731") ((uint8_t ) __ldrex(ptr)) _Pragma("pop")
NYX 0:85b3fd62ea1a 552 #endif
NYX 0:85b3fd62ea1a 553
NYX 0:85b3fd62ea1a 554
NYX 0:85b3fd62ea1a 555 /**
NYX 0:85b3fd62ea1a 556 \brief LDR Exclusive (16 bit)
NYX 0:85b3fd62ea1a 557 \details Executes a exclusive LDR instruction for 16 bit values.
NYX 0:85b3fd62ea1a 558 \param [in] ptr Pointer to data
NYX 0:85b3fd62ea1a 559 \return value of type uint16_t at (*ptr)
NYX 0:85b3fd62ea1a 560 */
NYX 0:85b3fd62ea1a 561 #if defined(__ARMCC_VERSION) && (__ARMCC_VERSION < 5060020)
NYX 0:85b3fd62ea1a 562 #define __LDREXH(ptr) ((uint16_t) __ldrex(ptr))
NYX 0:85b3fd62ea1a 563 #else
NYX 0:85b3fd62ea1a 564 #define __LDREXH(ptr) _Pragma("push") _Pragma("diag_suppress 3731") ((uint16_t) __ldrex(ptr)) _Pragma("pop")
NYX 0:85b3fd62ea1a 565 #endif
NYX 0:85b3fd62ea1a 566
NYX 0:85b3fd62ea1a 567
NYX 0:85b3fd62ea1a 568 /**
NYX 0:85b3fd62ea1a 569 \brief LDR Exclusive (32 bit)
NYX 0:85b3fd62ea1a 570 \details Executes a exclusive LDR instruction for 32 bit values.
NYX 0:85b3fd62ea1a 571 \param [in] ptr Pointer to data
NYX 0:85b3fd62ea1a 572 \return value of type uint32_t at (*ptr)
NYX 0:85b3fd62ea1a 573 */
NYX 0:85b3fd62ea1a 574 #if defined(__ARMCC_VERSION) && (__ARMCC_VERSION < 5060020)
NYX 0:85b3fd62ea1a 575 #define __LDREXW(ptr) ((uint32_t ) __ldrex(ptr))
NYX 0:85b3fd62ea1a 576 #else
NYX 0:85b3fd62ea1a 577 #define __LDREXW(ptr) _Pragma("push") _Pragma("diag_suppress 3731") ((uint32_t ) __ldrex(ptr)) _Pragma("pop")
NYX 0:85b3fd62ea1a 578 #endif
NYX 0:85b3fd62ea1a 579
NYX 0:85b3fd62ea1a 580
NYX 0:85b3fd62ea1a 581 /**
NYX 0:85b3fd62ea1a 582 \brief STR Exclusive (8 bit)
NYX 0:85b3fd62ea1a 583 \details Executes a exclusive STR instruction for 8 bit values.
NYX 0:85b3fd62ea1a 584 \param [in] value Value to store
NYX 0:85b3fd62ea1a 585 \param [in] ptr Pointer to location
NYX 0:85b3fd62ea1a 586 \return 0 Function succeeded
NYX 0:85b3fd62ea1a 587 \return 1 Function failed
NYX 0:85b3fd62ea1a 588 */
NYX 0:85b3fd62ea1a 589 #if defined(__ARMCC_VERSION) && (__ARMCC_VERSION < 5060020)
NYX 0:85b3fd62ea1a 590 #define __STREXB(value, ptr) __strex(value, ptr)
NYX 0:85b3fd62ea1a 591 #else
NYX 0:85b3fd62ea1a 592 #define __STREXB(value, ptr) _Pragma("push") _Pragma("diag_suppress 3731") __strex(value, ptr) _Pragma("pop")
NYX 0:85b3fd62ea1a 593 #endif
NYX 0:85b3fd62ea1a 594
NYX 0:85b3fd62ea1a 595
NYX 0:85b3fd62ea1a 596 /**
NYX 0:85b3fd62ea1a 597 \brief STR Exclusive (16 bit)
NYX 0:85b3fd62ea1a 598 \details Executes a exclusive STR instruction for 16 bit values.
NYX 0:85b3fd62ea1a 599 \param [in] value Value to store
NYX 0:85b3fd62ea1a 600 \param [in] ptr Pointer to location
NYX 0:85b3fd62ea1a 601 \return 0 Function succeeded
NYX 0:85b3fd62ea1a 602 \return 1 Function failed
NYX 0:85b3fd62ea1a 603 */
NYX 0:85b3fd62ea1a 604 #if defined(__ARMCC_VERSION) && (__ARMCC_VERSION < 5060020)
NYX 0:85b3fd62ea1a 605 #define __STREXH(value, ptr) __strex(value, ptr)
NYX 0:85b3fd62ea1a 606 #else
NYX 0:85b3fd62ea1a 607 #define __STREXH(value, ptr) _Pragma("push") _Pragma("diag_suppress 3731") __strex(value, ptr) _Pragma("pop")
NYX 0:85b3fd62ea1a 608 #endif
NYX 0:85b3fd62ea1a 609
NYX 0:85b3fd62ea1a 610
NYX 0:85b3fd62ea1a 611 /**
NYX 0:85b3fd62ea1a 612 \brief STR Exclusive (32 bit)
NYX 0:85b3fd62ea1a 613 \details Executes a exclusive STR instruction for 32 bit values.
NYX 0:85b3fd62ea1a 614 \param [in] value Value to store
NYX 0:85b3fd62ea1a 615 \param [in] ptr Pointer to location
NYX 0:85b3fd62ea1a 616 \return 0 Function succeeded
NYX 0:85b3fd62ea1a 617 \return 1 Function failed
NYX 0:85b3fd62ea1a 618 */
NYX 0:85b3fd62ea1a 619 #if defined(__ARMCC_VERSION) && (__ARMCC_VERSION < 5060020)
NYX 0:85b3fd62ea1a 620 #define __STREXW(value, ptr) __strex(value, ptr)
NYX 0:85b3fd62ea1a 621 #else
NYX 0:85b3fd62ea1a 622 #define __STREXW(value, ptr) _Pragma("push") _Pragma("diag_suppress 3731") __strex(value, ptr) _Pragma("pop")
NYX 0:85b3fd62ea1a 623 #endif
NYX 0:85b3fd62ea1a 624
NYX 0:85b3fd62ea1a 625
NYX 0:85b3fd62ea1a 626 /**
NYX 0:85b3fd62ea1a 627 \brief Remove the exclusive lock
NYX 0:85b3fd62ea1a 628 \details Removes the exclusive lock which is created by LDREX.
NYX 0:85b3fd62ea1a 629 */
NYX 0:85b3fd62ea1a 630 #define __CLREX __clrex
NYX 0:85b3fd62ea1a 631
NYX 0:85b3fd62ea1a 632
NYX 0:85b3fd62ea1a 633 /**
NYX 0:85b3fd62ea1a 634 \brief Signed Saturate
NYX 0:85b3fd62ea1a 635 \details Saturates a signed value.
NYX 0:85b3fd62ea1a 636 \param [in] value Value to be saturated
NYX 0:85b3fd62ea1a 637 \param [in] sat Bit position to saturate to (1..32)
NYX 0:85b3fd62ea1a 638 \return Saturated value
NYX 0:85b3fd62ea1a 639 */
NYX 0:85b3fd62ea1a 640 #define __SSAT __ssat
NYX 0:85b3fd62ea1a 641
NYX 0:85b3fd62ea1a 642
NYX 0:85b3fd62ea1a 643 /**
NYX 0:85b3fd62ea1a 644 \brief Unsigned Saturate
NYX 0:85b3fd62ea1a 645 \details Saturates an unsigned value.
NYX 0:85b3fd62ea1a 646 \param [in] value Value to be saturated
NYX 0:85b3fd62ea1a 647 \param [in] sat Bit position to saturate to (0..31)
NYX 0:85b3fd62ea1a 648 \return Saturated value
NYX 0:85b3fd62ea1a 649 */
NYX 0:85b3fd62ea1a 650 #define __USAT __usat
NYX 0:85b3fd62ea1a 651
NYX 0:85b3fd62ea1a 652
NYX 0:85b3fd62ea1a 653 /**
NYX 0:85b3fd62ea1a 654 \brief Rotate Right with Extend (32 bit)
NYX 0:85b3fd62ea1a 655 \details Moves each bit of a bitstring right by one bit.
NYX 0:85b3fd62ea1a 656 The carry input is shifted in at the left end of the bitstring.
NYX 0:85b3fd62ea1a 657 \param [in] value Value to rotate
NYX 0:85b3fd62ea1a 658 \return Rotated value
NYX 0:85b3fd62ea1a 659 */
NYX 0:85b3fd62ea1a 660 #ifndef __NO_EMBEDDED_ASM
NYX 0:85b3fd62ea1a 661 __attribute__((section(".rrx_text"))) __STATIC_INLINE __ASM uint32_t __RRX(uint32_t value)
NYX 0:85b3fd62ea1a 662 {
NYX 0:85b3fd62ea1a 663 rrx r0, r0
NYX 0:85b3fd62ea1a 664 bx lr
NYX 0:85b3fd62ea1a 665 }
NYX 0:85b3fd62ea1a 666 #endif
NYX 0:85b3fd62ea1a 667
NYX 0:85b3fd62ea1a 668
NYX 0:85b3fd62ea1a 669 /**
NYX 0:85b3fd62ea1a 670 \brief LDRT Unprivileged (8 bit)
NYX 0:85b3fd62ea1a 671 \details Executes a Unprivileged LDRT instruction for 8 bit value.
NYX 0:85b3fd62ea1a 672 \param [in] ptr Pointer to data
NYX 0:85b3fd62ea1a 673 \return value of type uint8_t at (*ptr)
NYX 0:85b3fd62ea1a 674 */
NYX 0:85b3fd62ea1a 675 #define __LDRBT(ptr) ((uint8_t ) __ldrt(ptr))
NYX 0:85b3fd62ea1a 676
NYX 0:85b3fd62ea1a 677
NYX 0:85b3fd62ea1a 678 /**
NYX 0:85b3fd62ea1a 679 \brief LDRT Unprivileged (16 bit)
NYX 0:85b3fd62ea1a 680 \details Executes a Unprivileged LDRT instruction for 16 bit values.
NYX 0:85b3fd62ea1a 681 \param [in] ptr Pointer to data
NYX 0:85b3fd62ea1a 682 \return value of type uint16_t at (*ptr)
NYX 0:85b3fd62ea1a 683 */
NYX 0:85b3fd62ea1a 684 #define __LDRHT(ptr) ((uint16_t) __ldrt(ptr))
NYX 0:85b3fd62ea1a 685
NYX 0:85b3fd62ea1a 686
NYX 0:85b3fd62ea1a 687 /**
NYX 0:85b3fd62ea1a 688 \brief LDRT Unprivileged (32 bit)
NYX 0:85b3fd62ea1a 689 \details Executes a Unprivileged LDRT instruction for 32 bit values.
NYX 0:85b3fd62ea1a 690 \param [in] ptr Pointer to data
NYX 0:85b3fd62ea1a 691 \return value of type uint32_t at (*ptr)
NYX 0:85b3fd62ea1a 692 */
NYX 0:85b3fd62ea1a 693 #define __LDRT(ptr) ((uint32_t ) __ldrt(ptr))
NYX 0:85b3fd62ea1a 694
NYX 0:85b3fd62ea1a 695
NYX 0:85b3fd62ea1a 696 /**
NYX 0:85b3fd62ea1a 697 \brief STRT Unprivileged (8 bit)
NYX 0:85b3fd62ea1a 698 \details Executes a Unprivileged STRT instruction for 8 bit values.
NYX 0:85b3fd62ea1a 699 \param [in] value Value to store
NYX 0:85b3fd62ea1a 700 \param [in] ptr Pointer to location
NYX 0:85b3fd62ea1a 701 */
NYX 0:85b3fd62ea1a 702 #define __STRBT(value, ptr) __strt(value, ptr)
NYX 0:85b3fd62ea1a 703
NYX 0:85b3fd62ea1a 704
NYX 0:85b3fd62ea1a 705 /**
NYX 0:85b3fd62ea1a 706 \brief STRT Unprivileged (16 bit)
NYX 0:85b3fd62ea1a 707 \details Executes a Unprivileged STRT instruction for 16 bit values.
NYX 0:85b3fd62ea1a 708 \param [in] value Value to store
NYX 0:85b3fd62ea1a 709 \param [in] ptr Pointer to location
NYX 0:85b3fd62ea1a 710 */
NYX 0:85b3fd62ea1a 711 #define __STRHT(value, ptr) __strt(value, ptr)
NYX 0:85b3fd62ea1a 712
NYX 0:85b3fd62ea1a 713
NYX 0:85b3fd62ea1a 714 /**
NYX 0:85b3fd62ea1a 715 \brief STRT Unprivileged (32 bit)
NYX 0:85b3fd62ea1a 716 \details Executes a Unprivileged STRT instruction for 32 bit values.
NYX 0:85b3fd62ea1a 717 \param [in] value Value to store
NYX 0:85b3fd62ea1a 718 \param [in] ptr Pointer to location
NYX 0:85b3fd62ea1a 719 */
NYX 0:85b3fd62ea1a 720 #define __STRT(value, ptr) __strt(value, ptr)
NYX 0:85b3fd62ea1a 721
NYX 0:85b3fd62ea1a 722 #endif /* ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \
NYX 0:85b3fd62ea1a 723 (defined (__ARM_ARCH_7EM__) && (__ARM_ARCH_7EM__ == 1)) ) */
NYX 0:85b3fd62ea1a 724
NYX 0:85b3fd62ea1a 725 /*@}*/ /* end of group CMSIS_Core_InstructionInterface */
NYX 0:85b3fd62ea1a 726
NYX 0:85b3fd62ea1a 727
NYX 0:85b3fd62ea1a 728 /* ################### Compiler specific Intrinsics ########################### */
NYX 0:85b3fd62ea1a 729 /** \defgroup CMSIS_SIMD_intrinsics CMSIS SIMD Intrinsics
NYX 0:85b3fd62ea1a 730 Access to dedicated SIMD instructions
NYX 0:85b3fd62ea1a 731 @{
NYX 0:85b3fd62ea1a 732 */
NYX 0:85b3fd62ea1a 733
NYX 0:85b3fd62ea1a 734 #if ((defined (__ARM_ARCH_7EM__) && (__ARM_ARCH_7EM__ == 1)) )
NYX 0:85b3fd62ea1a 735
NYX 0:85b3fd62ea1a 736 #define __SADD8 __sadd8
NYX 0:85b3fd62ea1a 737 #define __QADD8 __qadd8
NYX 0:85b3fd62ea1a 738 #define __SHADD8 __shadd8
NYX 0:85b3fd62ea1a 739 #define __UADD8 __uadd8
NYX 0:85b3fd62ea1a 740 #define __UQADD8 __uqadd8
NYX 0:85b3fd62ea1a 741 #define __UHADD8 __uhadd8
NYX 0:85b3fd62ea1a 742 #define __SSUB8 __ssub8
NYX 0:85b3fd62ea1a 743 #define __QSUB8 __qsub8
NYX 0:85b3fd62ea1a 744 #define __SHSUB8 __shsub8
NYX 0:85b3fd62ea1a 745 #define __USUB8 __usub8
NYX 0:85b3fd62ea1a 746 #define __UQSUB8 __uqsub8
NYX 0:85b3fd62ea1a 747 #define __UHSUB8 __uhsub8
NYX 0:85b3fd62ea1a 748 #define __SADD16 __sadd16
NYX 0:85b3fd62ea1a 749 #define __QADD16 __qadd16
NYX 0:85b3fd62ea1a 750 #define __SHADD16 __shadd16
NYX 0:85b3fd62ea1a 751 #define __UADD16 __uadd16
NYX 0:85b3fd62ea1a 752 #define __UQADD16 __uqadd16
NYX 0:85b3fd62ea1a 753 #define __UHADD16 __uhadd16
NYX 0:85b3fd62ea1a 754 #define __SSUB16 __ssub16
NYX 0:85b3fd62ea1a 755 #define __QSUB16 __qsub16
NYX 0:85b3fd62ea1a 756 #define __SHSUB16 __shsub16
NYX 0:85b3fd62ea1a 757 #define __USUB16 __usub16
NYX 0:85b3fd62ea1a 758 #define __UQSUB16 __uqsub16
NYX 0:85b3fd62ea1a 759 #define __UHSUB16 __uhsub16
NYX 0:85b3fd62ea1a 760 #define __SASX __sasx
NYX 0:85b3fd62ea1a 761 #define __QASX __qasx
NYX 0:85b3fd62ea1a 762 #define __SHASX __shasx
NYX 0:85b3fd62ea1a 763 #define __UASX __uasx
NYX 0:85b3fd62ea1a 764 #define __UQASX __uqasx
NYX 0:85b3fd62ea1a 765 #define __UHASX __uhasx
NYX 0:85b3fd62ea1a 766 #define __SSAX __ssax
NYX 0:85b3fd62ea1a 767 #define __QSAX __qsax
NYX 0:85b3fd62ea1a 768 #define __SHSAX __shsax
NYX 0:85b3fd62ea1a 769 #define __USAX __usax
NYX 0:85b3fd62ea1a 770 #define __UQSAX __uqsax
NYX 0:85b3fd62ea1a 771 #define __UHSAX __uhsax
NYX 0:85b3fd62ea1a 772 #define __USAD8 __usad8
NYX 0:85b3fd62ea1a 773 #define __USADA8 __usada8
NYX 0:85b3fd62ea1a 774 #define __SSAT16 __ssat16
NYX 0:85b3fd62ea1a 775 #define __USAT16 __usat16
NYX 0:85b3fd62ea1a 776 #define __UXTB16 __uxtb16
NYX 0:85b3fd62ea1a 777 #define __UXTAB16 __uxtab16
NYX 0:85b3fd62ea1a 778 #define __SXTB16 __sxtb16
NYX 0:85b3fd62ea1a 779 #define __SXTAB16 __sxtab16
NYX 0:85b3fd62ea1a 780 #define __SMUAD __smuad
NYX 0:85b3fd62ea1a 781 #define __SMUADX __smuadx
NYX 0:85b3fd62ea1a 782 #define __SMLAD __smlad
NYX 0:85b3fd62ea1a 783 #define __SMLADX __smladx
NYX 0:85b3fd62ea1a 784 #define __SMLALD __smlald
NYX 0:85b3fd62ea1a 785 #define __SMLALDX __smlaldx
NYX 0:85b3fd62ea1a 786 #define __SMUSD __smusd
NYX 0:85b3fd62ea1a 787 #define __SMUSDX __smusdx
NYX 0:85b3fd62ea1a 788 #define __SMLSD __smlsd
NYX 0:85b3fd62ea1a 789 #define __SMLSDX __smlsdx
NYX 0:85b3fd62ea1a 790 #define __SMLSLD __smlsld
NYX 0:85b3fd62ea1a 791 #define __SMLSLDX __smlsldx
NYX 0:85b3fd62ea1a 792 #define __SEL __sel
NYX 0:85b3fd62ea1a 793 #define __QADD __qadd
NYX 0:85b3fd62ea1a 794 #define __QSUB __qsub
NYX 0:85b3fd62ea1a 795
NYX 0:85b3fd62ea1a 796 #define __PKHBT(ARG1,ARG2,ARG3) ( ((((uint32_t)(ARG1)) ) & 0x0000FFFFUL) | \
NYX 0:85b3fd62ea1a 797 ((((uint32_t)(ARG2)) << (ARG3)) & 0xFFFF0000UL) )
NYX 0:85b3fd62ea1a 798
NYX 0:85b3fd62ea1a 799 #define __PKHTB(ARG1,ARG2,ARG3) ( ((((uint32_t)(ARG1)) ) & 0xFFFF0000UL) | \
NYX 0:85b3fd62ea1a 800 ((((uint32_t)(ARG2)) >> (ARG3)) & 0x0000FFFFUL) )
NYX 0:85b3fd62ea1a 801
NYX 0:85b3fd62ea1a 802 #define __SMMLA(ARG1,ARG2,ARG3) ( (int32_t)((((int64_t)(ARG1) * (ARG2)) + \
NYX 0:85b3fd62ea1a 803 ((int64_t)(ARG3) << 32U) ) >> 32U))
NYX 0:85b3fd62ea1a 804
NYX 0:85b3fd62ea1a 805 #endif /* ((defined (__ARM_ARCH_7EM__) && (__ARM_ARCH_7EM__ == 1)) ) */
NYX 0:85b3fd62ea1a 806 /*@} end of group CMSIS_SIMD_intrinsics */
NYX 0:85b3fd62ea1a 807
NYX 0:85b3fd62ea1a 808
NYX 0:85b3fd62ea1a 809 #endif /* __CMSIS_ARMCC_H */