ad7124.h

00001 /***************************************************************************//**
00002 *   @file    AD7124.h
00003 *   @brief   AD7124 header file.
00004 *   @devices AD7124-4, AD7124-8
00005 *
00006 ********************************************************************************
00007 * Copyright 2015(c) Analog Devices, Inc.
00008 *
00009 * All rights reserved.
00010 *
00011 * Redistribution and use in source and binary forms, with or without modification,
00012 * are permitted provided that the following conditions are met:
00013 *  - Redistributions of source code must retain the above copyright
00014 *    notice, this list of conditions and the following disclaimer.
00015 *  - Redistributions in binary form must reproduce the above copyright
00016 *    notice, this list of conditions and the following disclaimer in
00017 *    the documentation and/or other materials provided with the
00018 *    distribution.
00019 *  - Neither the name of Analog Devices, Inc. nor the names of its
00020 *    contributors may be used to endorse or promote products derived
00021 *    from this software without specific prior written permission.
00022 *  - The use of this software may or may not infringe the patent rights
00023 *    of one or more patent holders.  This license does not release you
00024 *    from the requirement that you obtain separate licenses from these
00025 *    patent holders to use this software.
00026 *  - Use of the software either in source or binary form, must be run
00027 *    on or directly connected to an Analog Devices Inc. component.
00028 *
00029 * THIS SOFTWARE IS PROVIDED BY ANALOG DEVICES "AS IS" AND ANY EXPRESS OR IMPLIED
00030 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, NON-INFRINGEMENT, MERCHANTABILITY
00031 * AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
00032 * IN NO EVENT SHALL ANALOG DEVICES BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
00033 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
00034 * INTELLECTUAL PROPERTY RIGHTS, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
00035 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
00036 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
00037 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
00038 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
00039 *******************************************************************************/
00040 
00041 #ifndef __AD7124_H__
00042 #define __AD7124_H__
00043 
00044 /******************************************************************************/
00045 /***************************** Include Files **********************************/
00046 /******************************************************************************/
00047 #include <stdint.h>
00048 #include "platform_drivers.h"
00049 
00050 /******************************************************************************/
00051 /******************* Register map and register definitions ********************/
00052 /******************************************************************************/
00053 
00054 #define AD7124_RW 1   /* Read and Write */
00055 #define AD7124_R  2   /* Read only */
00056 #define AD7124_W  3   /* Write only */
00057 
00058 /* AD7124 Register Map */
00059 #define AD7124_COMM_REG      0x00
00060 #define AD7124_STATUS_REG    0x00
00061 #define AD7124_ADC_CTRL_REG  0x01
00062 #define AD7124_DATA_REG      0x02
00063 #define AD7124_IO_CTRL1_REG  0x03
00064 #define AD7124_IO_CTRL2_REG  0x04
00065 #define AD7124_ID_REG        0x05
00066 #define AD7124_ERR_REG       0x06
00067 #define AD7124_ERREN_REG     0x07
00068 #define AD7124_CH0_MAP_REG   0x09
00069 #define AD7124_CH1_MAP_REG   0x0A
00070 #define AD7124_CH2_MAP_REG   0x0B
00071 #define AD7124_CH3_MAP_REG   0x0C
00072 #define AD7124_CH4_MAP_REG   0x0D
00073 #define AD7124_CH5_MAP_REG   0x0E
00074 #define AD7124_CH6_MAP_REG   0x0F
00075 #define AD7124_CH7_MAP_REG   0x10
00076 #define AD7124_CH8_MAP_REG   0x11
00077 #define AD7124_CH9_MAP_REG   0x12
00078 #define AD7124_CH10_MAP_REG  0x13
00079 #define AD7124_CH11_MAP_REG  0x14
00080 #define AD7124_CH12_MAP_REG  0x15
00081 #define AD7124_CH13_MAP_REG  0x16
00082 #define AD7124_CH14_MAP_REG  0x17
00083 #define AD7124_CH15_MAP_REG  0x18
00084 #define AD7124_CFG0_REG      0x19
00085 #define AD7124_CFG1_REG      0x1A
00086 #define AD7124_CFG2_REG      0x1B
00087 #define AD7124_CFG3_REG      0x1C
00088 #define AD7124_CFG4_REG      0x1D
00089 #define AD7124_CFG5_REG      0x1E
00090 #define AD7124_CFG6_REG      0x1F
00091 #define AD7124_CFG7_REG      0x20
00092 #define AD7124_FILT0_REG     0x21
00093 #define AD7124_FILT1_REG     0x22
00094 #define AD7124_FILT2_REG     0x23
00095 #define AD7124_FILT3_REG     0x24
00096 #define AD7124_FILT4_REG     0x25
00097 #define AD7124_FILT5_REG     0x26
00098 #define AD7124_FILT6_REG     0x27
00099 #define AD7124_FILT7_REG     0x28
00100 #define AD7124_OFFS0_REG     0x29
00101 #define AD7124_OFFS1_REG     0x2A
00102 #define AD7124_OFFS2_REG     0x2B
00103 #define AD7124_OFFS3_REG     0x2C
00104 #define AD7124_OFFS4_REG     0x2D
00105 #define AD7124_OFFS5_REG     0x2E
00106 #define AD7124_OFFS6_REG     0x2F
00107 #define AD7124_OFFS7_REG     0x30
00108 #define AD7124_GAIN0_REG     0x31
00109 #define AD7124_GAIN1_REG     0x32
00110 #define AD7124_GAIN2_REG     0x33
00111 #define AD7124_GAIN3_REG     0x34
00112 #define AD7124_GAIN4_REG     0x35
00113 #define AD7124_GAIN5_REG     0x36
00114 #define AD7124_GAIN6_REG     0x37
00115 #define AD7124_GAIN7_REG     0x38
00116 
00117 /* Communication Register bits */
00118 #define AD7124_COMM_REG_WEN    (0 << 7)
00119 #define AD7124_COMM_REG_WR     (0 << 6)
00120 #define AD7124_COMM_REG_RD     (1 << 6)
00121 #define AD7124_COMM_REG_RA(x)  ((x) & 0x3F)
00122 
00123 /* Status Register bits */
00124 #define AD7124_STATUS_REG_RDY          (1 << 7)
00125 #define AD7124_STATUS_REG_ERROR_FLAG   (1 << 6)
00126 #define AD7124_STATUS_REG_POR_FLAG     (1 << 4)
00127 #define AD7124_STATUS_REG_CH_ACTIVE(x) ((x) & 0xF)
00128 
00129 /* ADC_Control Register bits */
00130 #define AD7124_ADC_CTRL_REG_DOUT_RDY_DEL   (1 << 12)
00131 #define AD7124_ADC_CTRL_REG_CONT_READ      (1 << 11)
00132 #define AD7124_ADC_CTRL_REG_DATA_STATUS    (1 << 10)
00133 #define AD7124_ADC_CTRL_REG_CS_EN          (1 << 9)
00134 #define AD7124_ADC_CTRL_REG_REF_EN         (1 << 8)
00135 #define AD7124_ADC_CTRL_REG_POWER_MODE(x)  (((x) & 0x3) << 6)
00136 #define AD7124_ADC_CTRL_REG_MODE(x)        (((x) & 0xF) << 2)
00137 #define AD7124_ADC_CTRL_REG_CLK_SEL(x)     (((x) & 0x3) << 0)
00138 
00139 /* IO_Control_1 Register bits */
00140 #define AD7124_IO_CTRL1_REG_GPIO_DAT2     (1 << 23)
00141 #define AD7124_IO_CTRL1_REG_GPIO_DAT1     (1 << 22)
00142 #define AD7124_IO_CTRL1_REG_GPIO_CTRL2    (1 << 19)
00143 #define AD7124_IO_CTRL1_REG_GPIO_CTRL1    (1 << 18)
00144 #define AD7124_IO_CTRL1_REG_PDSW          (1 << 15)
00145 #define AD7124_IO_CTRL1_REG_IOUT1(x)      (((x) & 0x7) << 11)
00146 #define AD7124_IO_CTRL1_REG_IOUT0(x)      (((x) & 0x7) << 8)
00147 #define AD7124_IO_CTRL1_REG_IOUT_CH1(x)   (((x) & 0xF) << 4)
00148 #define AD7124_IO_CTRL1_REG_IOUT_CH0(x)   (((x) & 0xF) << 0)
00149 
00150 /* IO_Control_1 AD7124-8 specific bits */
00151 #define AD7124_8_IO_CTRL1_REG_GPIO_DAT4     (1 << 23)
00152 #define AD7124_8_IO_CTRL1_REG_GPIO_DAT3     (1 << 22)
00153 #define AD7124_8_IO_CTRL1_REG_GPIO_DAT2     (1 << 21)
00154 #define AD7124_8_IO_CTRL1_REG_GPIO_DAT1     (1 << 20)
00155 #define AD7124_8_IO_CTRL1_REG_GPIO_CTRL4    (1 << 19)
00156 #define AD7124_8_IO_CTRL1_REG_GPIO_CTRL3    (1 << 18)
00157 #define AD7124_8_IO_CTRL1_REG_GPIO_CTRL2    (1 << 17)
00158 #define AD7124_8_IO_CTRL1_REG_GPIO_CTRL1    (1 << 16)
00159 
00160 /* IO_Control_2 Register bits */
00161 #define AD7124_IO_CTRL2_REG_GPIO_VBIAS7   (1 << 15)
00162 #define AD7124_IO_CTRL2_REG_GPIO_VBIAS6   (1 << 14)
00163 #define AD7124_IO_CTRL2_REG_GPIO_VBIAS5   (1 << 11)
00164 #define AD7124_IO_CTRL2_REG_GPIO_VBIAS4   (1 << 10)
00165 #define AD7124_IO_CTRL2_REG_GPIO_VBIAS3   (1 << 5)
00166 #define AD7124_IO_CTRL2_REG_GPIO_VBIAS2   (1 << 4)
00167 #define AD7124_IO_CTRL2_REG_GPIO_VBIAS1   (1 << 1)
00168 #define AD7124_IO_CTRL2_REG_GPIO_VBIAS0   (1 << 0)
00169 
00170 /* IO_Control_2 AD7124-8 specific bits */
00171 #define AD7124_8_IO_CTRL2_REG_GPIO_VBIAS15  (1 << 15)
00172 #define AD7124_8_IO_CTRL2_REG_GPIO_VBIAS14  (1 << 14)
00173 #define AD7124_8_IO_CTRL2_REG_GPIO_VBIAS13  (1 << 13)
00174 #define AD7124_8_IO_CTRL2_REG_GPIO_VBIAS12  (1 << 12)
00175 #define AD7124_8_IO_CTRL2_REG_GPIO_VBIAS11  (1 << 11)
00176 #define AD7124_8_IO_CTRL2_REG_GPIO_VBIAS10  (1 << 10)
00177 #define AD7124_8_IO_CTRL2_REG_GPIO_VBIAS9   (1 << 9)
00178 #define AD7124_8_IO_CTRL2_REG_GPIO_VBIAS8   (1 << 8)
00179 #define AD7124_8_IO_CTRL2_REG_GPIO_VBIAS7   (1 << 7)
00180 #define AD7124_8_IO_CTRL2_REG_GPIO_VBIAS6   (1 << 6)
00181 #define AD7124_8_IO_CTRL2_REG_GPIO_VBIAS5   (1 << 5)
00182 #define AD7124_8_IO_CTRL2_REG_GPIO_VBIAS4   (1 << 4)
00183 #define AD7124_8_IO_CTRL2_REG_GPIO_VBIAS3   (1 << 3)
00184 #define AD7124_8_IO_CTRL2_REG_GPIO_VBIAS2   (1 << 2)
00185 #define AD7124_8_IO_CTRL2_REG_GPIO_VBIAS1   (1 << 1)
00186 #define AD7124_8_IO_CTRL2_REG_GPIO_VBIAS0   (1 << 0)
00187 
00188 /* ID Register bits */
00189 #define AD7124_ID_REG_DEVICE_ID(x)   (((x) & 0xF) << 4)
00190 #define AD7124_ID_REG_SILICON_REV(x) (((x) & 0xF) << 0)
00191 
00192 /* Error Register bits */
00193 #define AD7124_ERR_REG_LDO_CAP_ERR        (1 << 19)
00194 #define AD7124_ERR_REG_ADC_CAL_ERR        (1 << 18)
00195 #define AD7124_ERR_REG_ADC_CONV_ERR       (1 << 17)
00196 #define AD7124_ERR_REG_ADC_SAT_ERR        (1 << 16)
00197 #define AD7124_ERR_REG_AINP_OV_ERR        (1 << 15)
00198 #define AD7124_ERR_REG_AINP_UV_ERR        (1 << 14)
00199 #define AD7124_ERR_REG_AINM_OV_ERR        (1 << 13)
00200 #define AD7124_ERR_REG_AINM_UV_ERR        (1 << 12)
00201 #define AD7124_ERR_REG_REF_DET_ERR        (1 << 11)
00202 #define AD7124_ERR_REG_DLDO_PSM_ERR       (1 << 9)
00203 #define AD7124_ERR_REG_ALDO_PSM_ERR       (1 << 7)
00204 #define AD7124_ERR_REG_SPI_IGNORE_ERR     (1 << 6)
00205 #define AD7124_ERR_REG_SPI_SLCK_CNT_ERR   (1 << 5)
00206 #define AD7124_ERR_REG_SPI_READ_ERR       (1 << 4)
00207 #define AD7124_ERR_REG_SPI_WRITE_ERR      (1 << 3)
00208 #define AD7124_ERR_REG_SPI_CRC_ERR        (1 << 2)
00209 #define AD7124_ERR_REG_MM_CRC_ERR         (1 << 1)
00210 
00211 /* Error_En Register bits */
00212 #define AD7124_ERREN_REG_MCLK_CNT_EN           (1 << 22)
00213 #define AD7124_ERREN_REG_LDO_CAP_CHK_TEST_EN   (1 << 21)
00214 #define AD7124_ERREN_REG_LDO_CAP_CHK(x)        (((x) & 0x3) << 19)
00215 #define AD7124_ERREN_REG_ADC_CAL_ERR_EN        (1 << 18)
00216 #define AD7124_ERREN_REG_ADC_CONV_ERR_EN       (1 << 17)
00217 #define AD7124_ERREN_REG_ADC_SAT_ERR_EN        (1 << 16)
00218 #define AD7124_ERREN_REG_AINP_OV_ERR_EN        (1 << 15)
00219 #define AD7124_ERREN_REG_AINP_UV_ERR_EN        (1 << 14)
00220 #define AD7124_ERREN_REG_AINM_OV_ERR_EN        (1 << 13)
00221 #define AD7124_ERREN_REG_AINM_UV_ERR_EN        (1 << 12)
00222 #define AD7124_ERREN_REG_REF_DET_ERR_EN        (1 << 11)
00223 #define AD7124_ERREN_REG_DLDO_PSM_TRIP_TEST_EN (1 << 10)
00224 #define AD7124_ERREN_REG_DLDO_PSM_ERR_ERR      (1 << 9)
00225 #define AD7124_ERREN_REG_ALDO_PSM_TRIP_TEST_EN (1 << 8)
00226 #define AD7124_ERREN_REG_ALDO_PSM_ERR_EN       (1 << 7)
00227 #define AD7124_ERREN_REG_SPI_IGNORE_ERR_EN     (1 << 6)
00228 #define AD7124_ERREN_REG_SPI_SCLK_CNT_ERR_EN   (1 << 5)
00229 #define AD7124_ERREN_REG_SPI_READ_ERR_EN       (1 << 4)
00230 #define AD7124_ERREN_REG_SPI_WRITE_ERR_EN      (1 << 3)
00231 #define AD7124_ERREN_REG_SPI_CRC_ERR_EN        (1 << 2)
00232 #define AD7124_ERREN_REG_MM_CRC_ERR_EN         (1 << 1)
00233 
00234 /* Channel Registers 0-15 bits */
00235 #define AD7124_CH_MAP_REG_CH_ENABLE    (1 << 15)
00236 #define AD7124_CH_MAP_REG_SETUP(x)     (((x) & 0x7) << 12)
00237 #define AD7124_CH_MAP_REG_AINP(x)      (((x) & 0x1F) << 5)
00238 #define AD7124_CH_MAP_REG_AINM(x)      (((x) & 0x1F) << 0)
00239 
00240 /* Configuration Registers 0-7 bits */
00241 #define AD7124_CFG_REG_BIPOLAR     (1 << 11)
00242 #define AD7124_CFG_REG_BURNOUT(x)  (((x) & 0x3) << 9)
00243 #define AD7124_CFG_REG_REF_BUFP    (1 << 8)
00244 #define AD7124_CFG_REG_REF_BUFM    (1 << 7)
00245 #define AD7124_CFG_REG_AIN_BUFP    (1 << 6)
00246 #define AD7124_CFG_REG_AINN_BUFM   (1 << 5)
00247 #define AD7124_CFG_REG_REF_SEL(x)  ((x) & 0x3) << 3
00248 #define AD7124_CFG_REG_PGA(x)      (((x) & 0x7) << 0)
00249 
00250 /* Filter Register 0-7 bits */
00251 #define AD7124_FILT_REG_FILTER(x)         (((x) & 0x7) << 21)
00252 #define AD7124_FILT_REG_REJ60             (1 << 20)
00253 #define AD7124_FILT_REG_POST_FILTER(x)    (((x) & 0x7) << 17)
00254 #define AD7124_FILT_REG_SINGLE_CYCLE      (1 << 16)
00255 #define AD7124_FILT_REG_FS(x)             (((x) & 0x7FF) << 0)
00256 
00257 /******************************************************************************/
00258 /*************************** Types Declarations *******************************/
00259 /******************************************************************************/
00260 
00261 /*! Device register info */
00262 struct ad7124_st_reg  {
00263     int32_t addr;
00264     int32_t value;
00265     int32_t size;
00266     int32_t rw;
00267 };
00268 
00269 /*! AD7124 registers list*/
00270 enum ad7124_registers {
00271     AD7124_Status = 0x00,
00272     AD7124_ADC_Control,
00273     AD7124_Data,
00274     AD7124_IOCon1,
00275     AD7124_IOCon2,
00276     AD7124_ID,
00277     AD7124_Error,
00278     AD7124_Error_En,
00279     AD7124_Mclk_Count,
00280     AD7124_Channel_0,
00281     AD7124_Channel_1,
00282     AD7124_Channel_2,
00283     AD7124_Channel_3,
00284     AD7124_Channel_4,
00285     AD7124_Channel_5,
00286     AD7124_Channel_6,
00287     AD7124_Channel_7,
00288     AD7124_Channel_8,
00289     AD7124_Channel_9,
00290     AD7124_Channel_10,
00291     AD7124_Channel_11,
00292     AD7124_Channel_12,
00293     AD7124_Channel_13,
00294     AD7124_Channel_14,
00295     AD7124_Channel_15,
00296     AD7124_Config_0,
00297     AD7124_Config_1,
00298     AD7124_Config_2,
00299     AD7124_Config_3,
00300     AD7124_Config_4,
00301     AD7124_Config_5,
00302     AD7124_Config_6,
00303     AD7124_Config_7,
00304     AD7124_Filter_0,
00305     AD7124_Filter_1,
00306     AD7124_Filter_2,
00307     AD7124_Filter_3,
00308     AD7124_Filter_4,
00309     AD7124_Filter_5,
00310     AD7124_Filter_6,
00311     AD7124_Filter_7,
00312     AD7124_Offset_0,
00313     AD7124_Offset_1,
00314     AD7124_Offset_2,
00315     AD7124_Offset_3,
00316     AD7124_Offset_4,
00317     AD7124_Offset_5,
00318     AD7124_Offset_6,
00319     AD7124_Offset_7,
00320     AD7124_Gain_0,
00321     AD7124_Gain_1,
00322     AD7124_Gain_2,
00323     AD7124_Gain_3,
00324     AD7124_Gain_4,
00325     AD7124_Gain_5,
00326     AD7124_Gain_6,
00327     AD7124_Gain_7,
00328     AD7124_REG_NO
00329 };
00330 
00331 /*
00332  * The structure describes the device and is used with the ad7124 driver.
00333  * @spi_desc: A reference to the SPI configuration of the device.
00334  * @regs: A reference to the register list of the device that the user must
00335  *       provide when calling the Setup() function.
00336  * @userCRC: Whether to do or not a cyclic redundancy check on SPI transfers.
00337  * @check_ready: When enabled all register read and write calls will first wait
00338  *               until the device is ready to accept user requests.
00339  * @spi_rdy_poll_cnt: Number of times the driver should read the Error register
00340  *                    to check if the device is ready to accept user requests,
00341  *                    before a timeout error will be issued.
00342  */
00343 struct ad7124_dev {
00344     /* SPI */
00345     spi_desc        *spi_desc;
00346     /* Device Settings */
00347     struct ad7124_st_reg     *regs;
00348     int16_t use_crc;
00349     int16_t check_ready;
00350     int16_t spi_rdy_poll_cnt;
00351 };
00352 
00353 struct ad7124_init_param {
00354     /* SPI */
00355     spi_init_param      spi_init;
00356     /* Device Settings */
00357     struct ad7124_st_reg     *regs;
00358     int16_t spi_rdy_poll_cnt;
00359 };
00360 
00361 /******************************************************************************/
00362 /******************* AD7124 Constants *****************************************/
00363 /******************************************************************************/
00364 #define AD7124_CRC8_POLYNOMIAL_REPRESENTATION 0x07 /* x8 + x2 + x + 1 */
00365 #define AD7124_DISABLE_CRC 0
00366 #define AD7124_USE_CRC 1
00367 
00368 /******************************************************************************/
00369 /************************ Functions Declarations ******************************/
00370 /******************************************************************************/
00371 
00372 /*! Reads the value of the specified register. */
00373 int32_t ad7124_read_register(struct ad7124_dev *dev,
00374                  struct ad7124_st_reg * p_reg);
00375 
00376 /*! Writes the value of the specified register. */
00377 int32_t ad7124_write_register(struct ad7124_dev *dev,
00378                   struct ad7124_st_reg  reg);
00379 
00380 /*! Reads the value of the specified register without a device state check. */
00381 int32_t ad7124_no_check_read_register(struct ad7124_dev *dev,
00382                       struct ad7124_st_reg * p_reg);
00383 
00384 /*! Writes the value of the specified register without a device state check. */
00385 int32_t ad7124_no_check_write_register(struct ad7124_dev *dev,
00386                        struct ad7124_st_reg  reg);
00387 
00388 /*! Resets the device. */
00389 int32_t ad7124_reset(struct ad7124_dev *dev);
00390 
00391 /*! Waits until the device can accept read and write user actions. */
00392 int32_t ad7124_wait_for_spi_ready(struct ad7124_dev *dev,
00393                   uint32_t timeout);
00394 
00395 /*! Waits until the device finishes the power-on reset operation. */
00396 int32_t ad7124_wait_to_power_on(struct ad7124_dev *dev,
00397                 uint32_t timeout);
00398 
00399 /*! Waits until a new conversion result is available. */
00400 int32_t ad7124_wait_for_conv_ready(struct ad7124_dev *dev,
00401                    uint32_t timeout);
00402 
00403 /*! Reads the conversion result from the device. */
00404 int32_t ad7124_read_data(struct ad7124_dev *dev,
00405              int32_t* p_data);
00406 
00407 /*! Computes the CRC checksum for a data buffer. */
00408 uint8_t ad7124_compute_crc8(uint8_t* p_buf,
00409                 uint8_t buf_size);
00410 
00411 /*! Updates the CRC settings. */
00412 void ad7124_update_crcsetting(struct ad7124_dev *dev);
00413 
00414 /*! Updates the device SPI interface settings. */
00415 void ad7124_update_dev_spi_settings(struct ad7124_dev *dev);
00416 
00417 /*! Initializes the AD7124. */
00418 int32_t ad7124_setup(struct ad7124_dev **device,
00419              struct ad7124_init_param init_param);
00420 /*! Free the resources allocated by AD7124_Setup(). */
00421 int32_t ad7124_remove(struct ad7124_dev *dev);
00422 
00423 #endif /* __AD7124_H__ */