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TARGET_NUCLEO_F070RB/stm32f0xx_hal_pwr_ex.h@99:7f6c6de930c0, 2015-05-03 (annotated)
- Committer:
- Mikchel
- Date:
- Sun May 03 16:04:42 2015 +0000
- Revision:
- 99:7f6c6de930c0
- Parent:
- 93:e188a91d3eaa
12
Who changed what in which revision?
| User | Revision | Line number | New contents of line |
|---|---|---|---|
| Kojto | 93:e188a91d3eaa | 1 | /** |
| Kojto | 93:e188a91d3eaa | 2 | ****************************************************************************** |
| Kojto | 93:e188a91d3eaa | 3 | * @file stm32f0xx_hal_pwr_ex.h |
| Kojto | 93:e188a91d3eaa | 4 | * @author MCD Application Team |
| Kojto | 93:e188a91d3eaa | 5 | * @version V1.2.0 |
| Kojto | 93:e188a91d3eaa | 6 | * @date 11-December-2014 |
| Kojto | 93:e188a91d3eaa | 7 | * @brief Header file of PWR HAL Extension module. |
| Kojto | 93:e188a91d3eaa | 8 | ****************************************************************************** |
| Kojto | 93:e188a91d3eaa | 9 | * @attention |
| Kojto | 93:e188a91d3eaa | 10 | * |
| Kojto | 93:e188a91d3eaa | 11 | * <h2><center>© COPYRIGHT(c) 2014 STMicroelectronics</center></h2> |
| Kojto | 93:e188a91d3eaa | 12 | * |
| Kojto | 93:e188a91d3eaa | 13 | * Redistribution and use in source and binary forms, with or without modification, |
| Kojto | 93:e188a91d3eaa | 14 | * are permitted provided that the following conditions are met: |
| Kojto | 93:e188a91d3eaa | 15 | * 1. Redistributions of source code must retain the above copyright notice, |
| Kojto | 93:e188a91d3eaa | 16 | * this list of conditions and the following disclaimer. |
| Kojto | 93:e188a91d3eaa | 17 | * 2. Redistributions in binary form must reproduce the above copyright notice, |
| Kojto | 93:e188a91d3eaa | 18 | * this list of conditions and the following disclaimer in the documentation |
| Kojto | 93:e188a91d3eaa | 19 | * and/or other materials provided with the distribution. |
| Kojto | 93:e188a91d3eaa | 20 | * 3. Neither the name of STMicroelectronics nor the names of its contributors |
| Kojto | 93:e188a91d3eaa | 21 | * may be used to endorse or promote products derived from this software |
| Kojto | 93:e188a91d3eaa | 22 | * without specific prior written permission. |
| Kojto | 93:e188a91d3eaa | 23 | * |
| Kojto | 93:e188a91d3eaa | 24 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
| Kojto | 93:e188a91d3eaa | 25 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
| Kojto | 93:e188a91d3eaa | 26 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
| Kojto | 93:e188a91d3eaa | 27 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE |
| Kojto | 93:e188a91d3eaa | 28 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
| Kojto | 93:e188a91d3eaa | 29 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR |
| Kojto | 93:e188a91d3eaa | 30 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
| Kojto | 93:e188a91d3eaa | 31 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
| Kojto | 93:e188a91d3eaa | 32 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
| Kojto | 93:e188a91d3eaa | 33 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
| Kojto | 93:e188a91d3eaa | 34 | * |
| Kojto | 93:e188a91d3eaa | 35 | ****************************************************************************** |
| Kojto | 93:e188a91d3eaa | 36 | */ |
| Kojto | 93:e188a91d3eaa | 37 | |
| Kojto | 93:e188a91d3eaa | 38 | /* Define to prevent recursive inclusion -------------------------------------*/ |
| Kojto | 93:e188a91d3eaa | 39 | #ifndef __STM32F0xx_HAL_PWR_EX_H |
| Kojto | 93:e188a91d3eaa | 40 | #define __STM32F0xx_HAL_PWR_EX_H |
| Kojto | 93:e188a91d3eaa | 41 | |
| Kojto | 93:e188a91d3eaa | 42 | #ifdef __cplusplus |
| Kojto | 93:e188a91d3eaa | 43 | extern "C" { |
| Kojto | 93:e188a91d3eaa | 44 | #endif |
| Kojto | 93:e188a91d3eaa | 45 | |
| Kojto | 93:e188a91d3eaa | 46 | /* Includes ------------------------------------------------------------------*/ |
| Kojto | 93:e188a91d3eaa | 47 | #include "stm32f0xx_hal_def.h" |
| Kojto | 93:e188a91d3eaa | 48 | |
| Kojto | 93:e188a91d3eaa | 49 | /** @addtogroup STM32F0xx_HAL_Driver |
| Kojto | 93:e188a91d3eaa | 50 | * @{ |
| Kojto | 93:e188a91d3eaa | 51 | */ |
| Kojto | 93:e188a91d3eaa | 52 | |
| Kojto | 93:e188a91d3eaa | 53 | /** @addtogroup PWREx |
| Kojto | 93:e188a91d3eaa | 54 | * @{ |
| Kojto | 93:e188a91d3eaa | 55 | */ |
| Kojto | 93:e188a91d3eaa | 56 | |
| Kojto | 93:e188a91d3eaa | 57 | /* Exported types ------------------------------------------------------------*/ |
| Kojto | 93:e188a91d3eaa | 58 | |
| Kojto | 93:e188a91d3eaa | 59 | /** @defgroup PWREx_Exported_Types PWREx Exported Types |
| Kojto | 93:e188a91d3eaa | 60 | * @{ |
| Kojto | 93:e188a91d3eaa | 61 | */ |
| Kojto | 93:e188a91d3eaa | 62 | |
| Kojto | 93:e188a91d3eaa | 63 | #if defined (STM32F031x6) || defined (STM32F042x6) || defined (STM32F051x8) || \ |
| Kojto | 93:e188a91d3eaa | 64 | defined (STM32F071xB) || defined (STM32F072xB) || \ |
| Kojto | 93:e188a91d3eaa | 65 | defined (STM32F091xC) |
| Kojto | 93:e188a91d3eaa | 66 | |
| Kojto | 93:e188a91d3eaa | 67 | /** |
| Kojto | 93:e188a91d3eaa | 68 | * @brief PWR PVD configuration structure definition |
| Kojto | 93:e188a91d3eaa | 69 | */ |
| Kojto | 93:e188a91d3eaa | 70 | typedef struct |
| Kojto | 93:e188a91d3eaa | 71 | { |
| Kojto | 93:e188a91d3eaa | 72 | uint32_t PVDLevel; /*!< PVDLevel: Specifies the PVD detection level |
| Kojto | 93:e188a91d3eaa | 73 | This parameter can be a value of @ref PWREx_PVD_detection_level */ |
| Kojto | 93:e188a91d3eaa | 74 | |
| Kojto | 93:e188a91d3eaa | 75 | uint32_t Mode; /*!< Mode: Specifies the operating mode for the selected pins. |
| Kojto | 93:e188a91d3eaa | 76 | This parameter can be a value of @ref PWREx_PVD_Mode */ |
| Kojto | 93:e188a91d3eaa | 77 | }PWR_PVDTypeDef; |
| Kojto | 93:e188a91d3eaa | 78 | |
| Kojto | 93:e188a91d3eaa | 79 | #endif /* defined (STM32F031x6) || defined (STM32F042x6) || defined (STM32F051x8) || */ |
| Kojto | 93:e188a91d3eaa | 80 | /* defined (STM32F071xB) || defined (STM32F072xB) || */ |
| Kojto | 93:e188a91d3eaa | 81 | /* defined (STM32F091xC) */ |
| Kojto | 93:e188a91d3eaa | 82 | /** |
| Kojto | 93:e188a91d3eaa | 83 | * @} |
| Kojto | 93:e188a91d3eaa | 84 | */ |
| Kojto | 93:e188a91d3eaa | 85 | /* Exported constants --------------------------------------------------------*/ |
| Kojto | 93:e188a91d3eaa | 86 | |
| Kojto | 93:e188a91d3eaa | 87 | /** @defgroup PWREx_Exported_Constants PWREx Exported Constants |
| Kojto | 93:e188a91d3eaa | 88 | * @{ |
| Kojto | 93:e188a91d3eaa | 89 | */ |
| Kojto | 93:e188a91d3eaa | 90 | |
| Kojto | 93:e188a91d3eaa | 91 | |
| Kojto | 93:e188a91d3eaa | 92 | /** @defgroup PWREx_WakeUp_Pins PWREx Wakeup Pins |
| Kojto | 93:e188a91d3eaa | 93 | * @{ |
| Kojto | 93:e188a91d3eaa | 94 | */ |
| Kojto | 93:e188a91d3eaa | 95 | #if defined (STM32F071xB) || defined (STM32F072xB) || defined (STM32F078xx) || defined (STM32F070xB) || \ |
| Kojto | 93:e188a91d3eaa | 96 | defined (STM32F091xC) || defined (STM32F098xx) || defined (STM32F030xC) |
| Kojto | 93:e188a91d3eaa | 97 | #define PWR_WAKEUP_PIN1 ((uint32_t)0x00) |
| Kojto | 93:e188a91d3eaa | 98 | #define PWR_WAKEUP_PIN2 ((uint32_t)0x01) |
| Kojto | 93:e188a91d3eaa | 99 | #define PWR_WAKEUP_PIN3 ((uint32_t)0x02) |
| Kojto | 93:e188a91d3eaa | 100 | #define PWR_WAKEUP_PIN4 ((uint32_t)0x03) |
| Kojto | 93:e188a91d3eaa | 101 | #define PWR_WAKEUP_PIN5 ((uint32_t)0x04) |
| Kojto | 93:e188a91d3eaa | 102 | #define PWR_WAKEUP_PIN6 ((uint32_t)0x05) |
| Kojto | 93:e188a91d3eaa | 103 | #define PWR_WAKEUP_PIN7 ((uint32_t)0x06) |
| Kojto | 93:e188a91d3eaa | 104 | #define PWR_WAKEUP_PIN8 ((uint32_t)0x07) |
| Kojto | 93:e188a91d3eaa | 105 | |
| Kojto | 93:e188a91d3eaa | 106 | #define IS_PWR_WAKEUP_PIN(PIN) (((PIN) == PWR_WAKEUP_PIN1) || \ |
| Kojto | 93:e188a91d3eaa | 107 | ((PIN) == PWR_WAKEUP_PIN2) || \ |
| Kojto | 93:e188a91d3eaa | 108 | ((PIN) == PWR_WAKEUP_PIN3) || \ |
| Kojto | 93:e188a91d3eaa | 109 | ((PIN) == PWR_WAKEUP_PIN4) || \ |
| Kojto | 93:e188a91d3eaa | 110 | ((PIN) == PWR_WAKEUP_PIN5) || \ |
| Kojto | 93:e188a91d3eaa | 111 | ((PIN) == PWR_WAKEUP_PIN6) || \ |
| Kojto | 93:e188a91d3eaa | 112 | ((PIN) == PWR_WAKEUP_PIN7) || \ |
| Kojto | 93:e188a91d3eaa | 113 | ((PIN) == PWR_WAKEUP_PIN8)) |
| Kojto | 93:e188a91d3eaa | 114 | #else |
| Kojto | 93:e188a91d3eaa | 115 | #define PWR_WAKEUP_PIN1 ((uint32_t)0x00) |
| Kojto | 93:e188a91d3eaa | 116 | #define PWR_WAKEUP_PIN2 ((uint32_t)0x01) |
| Kojto | 93:e188a91d3eaa | 117 | |
| Kojto | 93:e188a91d3eaa | 118 | #define IS_PWR_WAKEUP_PIN(PIN) (((PIN) == PWR_WAKEUP_PIN1) || \ |
| Kojto | 93:e188a91d3eaa | 119 | ((PIN) == PWR_WAKEUP_PIN2)) |
| Kojto | 93:e188a91d3eaa | 120 | #endif /* defined (STM32F071xB) || defined (STM32F072xB) || defined (STM32F078xx) || defined (STM32F070xB) || */ |
| Kojto | 93:e188a91d3eaa | 121 | /* defined (STM32F091xC) || defined (STM32F098xx) || defined (STM32F030xC) */ |
| Kojto | 93:e188a91d3eaa | 122 | /** |
| Kojto | 93:e188a91d3eaa | 123 | * @} |
| Kojto | 93:e188a91d3eaa | 124 | */ |
| Kojto | 93:e188a91d3eaa | 125 | |
| Kojto | 93:e188a91d3eaa | 126 | /** @defgroup PWREx_EXTI_Line PWREx EXTI Line |
| Kojto | 93:e188a91d3eaa | 127 | * @{ |
| Kojto | 93:e188a91d3eaa | 128 | */ |
| Kojto | 93:e188a91d3eaa | 129 | #if defined (STM32F031x6) || defined (STM32F042x6) || defined (STM32F051x8) || \ |
| Kojto | 93:e188a91d3eaa | 130 | defined (STM32F071xB) || defined (STM32F072xB) || \ |
| Kojto | 93:e188a91d3eaa | 131 | defined (STM32F091xC) |
| Kojto | 93:e188a91d3eaa | 132 | |
| Kojto | 93:e188a91d3eaa | 133 | #define PWR_EXTI_LINE_PVD ((uint32_t)0x00010000) /*!< External interrupt line 16 Connected to the PVD EXTI Line */ |
| Kojto | 93:e188a91d3eaa | 134 | |
| Kojto | 93:e188a91d3eaa | 135 | #endif /* defined (STM32F031x6) || defined (STM32F042x6) || defined (STM32F051x8) || */ |
| Kojto | 93:e188a91d3eaa | 136 | /* defined (STM32F071xB) || defined (STM32F072xB) || */ |
| Kojto | 93:e188a91d3eaa | 137 | /* defined (STM32F091xC) */ |
| Kojto | 93:e188a91d3eaa | 138 | |
| Kojto | 93:e188a91d3eaa | 139 | #if defined (STM32F042x6) || defined (STM32F048xx) || \ |
| Kojto | 93:e188a91d3eaa | 140 | defined (STM32F071xB) || defined (STM32F072xB) || defined (STM32F078xx) || \ |
| Kojto | 93:e188a91d3eaa | 141 | defined (STM32F091xC) || defined (STM32F098xx) |
| Kojto | 93:e188a91d3eaa | 142 | |
| Kojto | 93:e188a91d3eaa | 143 | #define PWR_EXTI_LINE_VDDIO2 ((uint32_t)0x80000000) /*!< External interrupt line 31 Connected to the Vddio2 Monitor EXTI Line */ |
| Kojto | 93:e188a91d3eaa | 144 | |
| Kojto | 93:e188a91d3eaa | 145 | #endif /* defined (STM32F042x6) || defined (STM32F048xx) ||\ |
| Kojto | 93:e188a91d3eaa | 146 | defined (STM32F071xB) || defined (STM32F072xB) || defined (STM32F078xx) || \ |
| Kojto | 93:e188a91d3eaa | 147 | defined (STM32F091xC) || defined (STM32F098xx) ||*/ |
| Kojto | 93:e188a91d3eaa | 148 | /** |
| Kojto | 93:e188a91d3eaa | 149 | * @} |
| Kojto | 93:e188a91d3eaa | 150 | */ |
| Kojto | 93:e188a91d3eaa | 151 | |
| Kojto | 93:e188a91d3eaa | 152 | #if defined (STM32F031x6) || defined (STM32F042x6) || defined (STM32F051x8) || \ |
| Kojto | 93:e188a91d3eaa | 153 | defined (STM32F071xB) || defined (STM32F072xB) || \ |
| Kojto | 93:e188a91d3eaa | 154 | defined (STM32F091xC) |
| Kojto | 93:e188a91d3eaa | 155 | /** @defgroup PWREx_PVD_detection_level PWREx PVD detection level |
| Kojto | 93:e188a91d3eaa | 156 | * @{ |
| Kojto | 93:e188a91d3eaa | 157 | */ |
| Kojto | 93:e188a91d3eaa | 158 | #define PWR_PVDLEVEL_0 PWR_CR_PLS_LEV0 |
| Kojto | 93:e188a91d3eaa | 159 | #define PWR_PVDLEVEL_1 PWR_CR_PLS_LEV1 |
| Kojto | 93:e188a91d3eaa | 160 | #define PWR_PVDLEVEL_2 PWR_CR_PLS_LEV2 |
| Kojto | 93:e188a91d3eaa | 161 | #define PWR_PVDLEVEL_3 PWR_CR_PLS_LEV3 |
| Kojto | 93:e188a91d3eaa | 162 | #define PWR_PVDLEVEL_4 PWR_CR_PLS_LEV4 |
| Kojto | 93:e188a91d3eaa | 163 | #define PWR_PVDLEVEL_5 PWR_CR_PLS_LEV5 |
| Kojto | 93:e188a91d3eaa | 164 | #define PWR_PVDLEVEL_6 PWR_CR_PLS_LEV6 |
| Kojto | 93:e188a91d3eaa | 165 | #define PWR_PVDLEVEL_7 PWR_CR_PLS_LEV7 |
| Kojto | 93:e188a91d3eaa | 166 | #define IS_PWR_PVD_LEVEL(LEVEL) (((LEVEL) == PWR_PVDLEVEL_0) || ((LEVEL) == PWR_PVDLEVEL_1)|| \ |
| Kojto | 93:e188a91d3eaa | 167 | ((LEVEL) == PWR_PVDLEVEL_2) || ((LEVEL) == PWR_PVDLEVEL_3)|| \ |
| Kojto | 93:e188a91d3eaa | 168 | ((LEVEL) == PWR_PVDLEVEL_4) || ((LEVEL) == PWR_PVDLEVEL_5)|| \ |
| Kojto | 93:e188a91d3eaa | 169 | ((LEVEL) == PWR_PVDLEVEL_6) || ((LEVEL) == PWR_PVDLEVEL_7)) |
| Kojto | 93:e188a91d3eaa | 170 | /** |
| Kojto | 93:e188a91d3eaa | 171 | * @} |
| Kojto | 93:e188a91d3eaa | 172 | */ |
| Kojto | 93:e188a91d3eaa | 173 | |
| Kojto | 93:e188a91d3eaa | 174 | /** @defgroup PWREx_PVD_Mode PWREx PVD Mode |
| Kojto | 93:e188a91d3eaa | 175 | * @{ |
| Kojto | 93:e188a91d3eaa | 176 | */ |
| Kojto | 93:e188a91d3eaa | 177 | #define PWR_PVD_MODE_NORMAL ((uint32_t)0x00000000) /*!< basic mode is used */ |
| Kojto | 93:e188a91d3eaa | 178 | #define PWR_PVD_MODE_IT_RISING ((uint32_t)0x00010001) /*!< External Interrupt Mode with Rising edge trigger detection */ |
| Kojto | 93:e188a91d3eaa | 179 | #define PWR_PVD_MODE_IT_FALLING ((uint32_t)0x00010002) /*!< External Interrupt Mode with Falling edge trigger detection */ |
| Kojto | 93:e188a91d3eaa | 180 | #define PWR_PVD_MODE_IT_RISING_FALLING ((uint32_t)0x00010003) /*!< External Interrupt Mode with Rising/Falling edge trigger detection */ |
| Kojto | 93:e188a91d3eaa | 181 | #define PWR_PVD_MODE_EVENT_RISING ((uint32_t)0x00020001) /*!< Event Mode with Rising edge trigger detection */ |
| Kojto | 93:e188a91d3eaa | 182 | #define PWR_PVD_MODE_EVENT_FALLING ((uint32_t)0x00020002) /*!< Event Mode with Falling edge trigger detection */ |
| Kojto | 93:e188a91d3eaa | 183 | #define PWR_PVD_MODE_EVENT_RISING_FALLING ((uint32_t)0x00020003) /*!< Event Mode with Rising/Falling edge trigger detection */ |
| Kojto | 93:e188a91d3eaa | 184 | |
| Kojto | 93:e188a91d3eaa | 185 | #define IS_PWR_PVD_MODE(MODE) (((MODE) == PWR_PVD_MODE_IT_RISING)|| ((MODE) == PWR_PVD_MODE_IT_FALLING) || \ |
| Kojto | 93:e188a91d3eaa | 186 | ((MODE) == PWR_PVD_MODE_IT_RISING_FALLING) || ((MODE) == PWR_PVD_MODE_EVENT_RISING) || \ |
| Kojto | 93:e188a91d3eaa | 187 | ((MODE) == PWR_PVD_MODE_EVENT_FALLING) || ((MODE) == PWR_PVD_MODE_EVENT_RISING_FALLING) || \ |
| Kojto | 93:e188a91d3eaa | 188 | ((MODE) == PWR_PVD_MODE_NORMAL)) |
| Kojto | 93:e188a91d3eaa | 189 | /** |
| Kojto | 93:e188a91d3eaa | 190 | * @} |
| Kojto | 93:e188a91d3eaa | 191 | */ |
| Kojto | 93:e188a91d3eaa | 192 | #endif /* defined (STM32F031x6) || defined (STM32F042x6) || defined (STM32F051x8) || */ |
| Kojto | 93:e188a91d3eaa | 193 | /* defined (STM32F071xB) || defined (STM32F072xB) || */ |
| Kojto | 93:e188a91d3eaa | 194 | /* defined (STM32F091xC) */ |
| Kojto | 93:e188a91d3eaa | 195 | |
| Kojto | 93:e188a91d3eaa | 196 | /** @defgroup PWREx_Flag PWREx Flag |
| Kojto | 93:e188a91d3eaa | 197 | * @{ |
| Kojto | 93:e188a91d3eaa | 198 | */ |
| Kojto | 93:e188a91d3eaa | 199 | #if defined (STM32F031x6) || defined (STM32F042x6) || defined (STM32F051x8) || \ |
| Kojto | 93:e188a91d3eaa | 200 | defined (STM32F071xB) || defined (STM32F072xB) || \ |
| Kojto | 93:e188a91d3eaa | 201 | defined (STM32F091xC) |
| Kojto | 93:e188a91d3eaa | 202 | |
| Kojto | 93:e188a91d3eaa | 203 | #define PWR_FLAG_WU PWR_CSR_WUF |
| Kojto | 93:e188a91d3eaa | 204 | #define PWR_FLAG_SB PWR_CSR_SBF |
| Kojto | 93:e188a91d3eaa | 205 | #define PWR_FLAG_PVDO PWR_CSR_PVDO |
| Kojto | 93:e188a91d3eaa | 206 | #define PWR_FLAG_VREFINTRDY PWR_CSR_VREFINTRDYF |
| Kojto | 93:e188a91d3eaa | 207 | #elif defined (STM32F070x6) || defined (STM32F070xB) || defined (STM32F030xC) |
| Kojto | 93:e188a91d3eaa | 208 | #define PWR_FLAG_WU PWR_CSR_WUF |
| Kojto | 93:e188a91d3eaa | 209 | #define PWR_FLAG_SB PWR_CSR_SBF |
| Kojto | 93:e188a91d3eaa | 210 | #define PWR_FLAG_VREFINTRDY PWR_CSR_VREFINTRDYF |
| Kojto | 93:e188a91d3eaa | 211 | #else |
| Kojto | 93:e188a91d3eaa | 212 | #define PWR_FLAG_WU PWR_CSR_WUF |
| Kojto | 93:e188a91d3eaa | 213 | #define PWR_FLAG_SB PWR_CSR_SBF |
| Kojto | 93:e188a91d3eaa | 214 | |
| Kojto | 93:e188a91d3eaa | 215 | #endif /* defined (STM32F031x6) || defined (STM32F042x6) || defined (STM32F051x8) || */ |
| Kojto | 93:e188a91d3eaa | 216 | /* defined (STM32F071xB) || defined (STM32F072xB) || */ |
| Kojto | 93:e188a91d3eaa | 217 | /* defined (STM32F091xC) */ |
| Kojto | 93:e188a91d3eaa | 218 | /** |
| Kojto | 93:e188a91d3eaa | 219 | * @} |
| Kojto | 93:e188a91d3eaa | 220 | */ |
| Kojto | 93:e188a91d3eaa | 221 | |
| Kojto | 93:e188a91d3eaa | 222 | /** |
| Kojto | 93:e188a91d3eaa | 223 | * @} |
| Kojto | 93:e188a91d3eaa | 224 | */ |
| Kojto | 93:e188a91d3eaa | 225 | |
| Kojto | 93:e188a91d3eaa | 226 | /* Exported macro ------------------------------------------------------------*/ |
| Kojto | 93:e188a91d3eaa | 227 | /** @defgroup PWREx_Exported_Macros PWREx Exported Macros |
| Kojto | 93:e188a91d3eaa | 228 | * @{ |
| Kojto | 93:e188a91d3eaa | 229 | */ |
| Kojto | 93:e188a91d3eaa | 230 | #if defined (STM32F031x6) || defined (STM32F042x6) || defined (STM32F051x8) || \ |
| Kojto | 93:e188a91d3eaa | 231 | defined (STM32F071xB) || defined (STM32F072xB) || \ |
| Kojto | 93:e188a91d3eaa | 232 | defined (STM32F091xC) |
| Kojto | 93:e188a91d3eaa | 233 | /** |
| Kojto | 93:e188a91d3eaa | 234 | * @brief Enable interrupt on PVD Exti Line 16. |
| Kojto | 93:e188a91d3eaa | 235 | * @retval None. |
| Kojto | 93:e188a91d3eaa | 236 | */ |
| Kojto | 93:e188a91d3eaa | 237 | #define __HAL_PWR_PVD_EXTI_ENABLE_IT() (EXTI->IMR |= (PWR_EXTI_LINE_PVD)) |
| Kojto | 93:e188a91d3eaa | 238 | |
| Kojto | 93:e188a91d3eaa | 239 | /** |
| Kojto | 93:e188a91d3eaa | 240 | * @brief Disable interrupt on PVD Exti Line 16. |
| Kojto | 93:e188a91d3eaa | 241 | * @retval None. |
| Kojto | 93:e188a91d3eaa | 242 | */ |
| Kojto | 93:e188a91d3eaa | 243 | #define __HAL_PWR_PVD_EXTI_DISABLE_IT() (EXTI->IMR &= ~(PWR_EXTI_LINE_PVD)) |
| Kojto | 93:e188a91d3eaa | 244 | |
| Kojto | 93:e188a91d3eaa | 245 | /** |
| Kojto | 93:e188a91d3eaa | 246 | * @brief Enable event on PVD Exti Line 16. |
| Kojto | 93:e188a91d3eaa | 247 | * @retval None. |
| Kojto | 93:e188a91d3eaa | 248 | */ |
| Kojto | 93:e188a91d3eaa | 249 | #define __HAL_PWR_PVD_EXTI_ENABLE_EVENT() (EXTI->EMR |= (PWR_EXTI_LINE_PVD)) |
| Kojto | 93:e188a91d3eaa | 250 | |
| Kojto | 93:e188a91d3eaa | 251 | /** |
| Kojto | 93:e188a91d3eaa | 252 | * @brief Disable event on PVD Exti Line 16. |
| Kojto | 93:e188a91d3eaa | 253 | * @retval None. |
| Kojto | 93:e188a91d3eaa | 254 | */ |
| Kojto | 93:e188a91d3eaa | 255 | #define __HAL_PWR_PVD_EXTI_DISABLE_EVENT() (EXTI->EMR &= ~(PWR_EXTI_LINE_PVD)) |
| Kojto | 93:e188a91d3eaa | 256 | |
| Kojto | 93:e188a91d3eaa | 257 | /** |
| Kojto | 93:e188a91d3eaa | 258 | * @brief PVD EXTI line configuration: clear falling edge and rising edge trigger. |
| Kojto | 93:e188a91d3eaa | 259 | * @retval None. |
| Kojto | 93:e188a91d3eaa | 260 | */ |
| Kojto | 93:e188a91d3eaa | 261 | #define __HAL_PWR_PVD_EXTI_CLEAR_EGDE_TRIGGER() EXTI->FTSR &= ~(PWR_EXTI_LINE_PVD); \ |
| Kojto | 93:e188a91d3eaa | 262 | EXTI->RTSR &= ~(PWR_EXTI_LINE_PVD) |
| Kojto | 93:e188a91d3eaa | 263 | |
| Kojto | 93:e188a91d3eaa | 264 | /** |
| Kojto | 93:e188a91d3eaa | 265 | * @brief PVD EXTI line configuration: set falling edge trigger. |
| Kojto | 93:e188a91d3eaa | 266 | * @retval None. |
| Kojto | 93:e188a91d3eaa | 267 | */ |
| Kojto | 93:e188a91d3eaa | 268 | #define __HAL_PWR_PVD_EXTI_SET_FALLING_EGDE_TRIGGER() EXTI->FTSR |= (PWR_EXTI_LINE_PVD) |
| Kojto | 93:e188a91d3eaa | 269 | |
| Kojto | 93:e188a91d3eaa | 270 | /** |
| Kojto | 93:e188a91d3eaa | 271 | * @brief PVD EXTI line configuration: set rising edge trigger. |
| Kojto | 93:e188a91d3eaa | 272 | * @retval None. |
| Kojto | 93:e188a91d3eaa | 273 | */ |
| Kojto | 93:e188a91d3eaa | 274 | #define __HAL_PWR_PVD_EXTI_SET_RISING_EDGE_TRIGGER() EXTI->RTSR |= (PWR_EXTI_LINE_PVD) |
| Kojto | 93:e188a91d3eaa | 275 | |
| Kojto | 93:e188a91d3eaa | 276 | /** |
| Kojto | 93:e188a91d3eaa | 277 | * @brief Check whether the specified PVD EXTI interrupt flag is set or not. |
| Kojto | 93:e188a91d3eaa | 278 | * @retval EXTI PVD Line Status. |
| Kojto | 93:e188a91d3eaa | 279 | */ |
| Kojto | 93:e188a91d3eaa | 280 | #define __HAL_PWR_PVD_EXTI_GET_FLAG() (EXTI->PR & (PWR_EXTI_LINE_PVD)) |
| Kojto | 93:e188a91d3eaa | 281 | |
| Kojto | 93:e188a91d3eaa | 282 | /** |
| Kojto | 93:e188a91d3eaa | 283 | * @brief Clear the PVD EXTI flag. |
| Kojto | 93:e188a91d3eaa | 284 | * @retval None. |
| Kojto | 93:e188a91d3eaa | 285 | */ |
| Kojto | 93:e188a91d3eaa | 286 | #define __HAL_PWR_PVD_EXTI_CLEAR_FLAG() (EXTI->PR = (PWR_EXTI_LINE_PVD)) |
| Kojto | 93:e188a91d3eaa | 287 | |
| Kojto | 93:e188a91d3eaa | 288 | /** |
| Kojto | 93:e188a91d3eaa | 289 | * @brief Generate a Software interrupt on selected EXTI line. |
| Kojto | 93:e188a91d3eaa | 290 | * @retval None. |
| Kojto | 93:e188a91d3eaa | 291 | */ |
| Kojto | 93:e188a91d3eaa | 292 | #define __HAL_PWR_PVD_EXTI_GENERATE_SWIT() (EXTI->SWIER |= (PWR_EXTI_LINE_PVD)) |
| Kojto | 93:e188a91d3eaa | 293 | |
| Kojto | 93:e188a91d3eaa | 294 | #endif /* defined (STM32F031x6) || defined (STM32F042x6) || defined (STM32F051x8) || */ |
| Kojto | 93:e188a91d3eaa | 295 | /* defined (STM32F071xB) || defined (STM32F072xB) || */ |
| Kojto | 93:e188a91d3eaa | 296 | /* defined (STM32F091xC) */ |
| Kojto | 93:e188a91d3eaa | 297 | |
| Kojto | 93:e188a91d3eaa | 298 | |
| Kojto | 93:e188a91d3eaa | 299 | #if defined (STM32F042x6) || defined (STM32F048xx) || \ |
| Kojto | 93:e188a91d3eaa | 300 | defined (STM32F071xB) || defined (STM32F072xB) || defined (STM32F078xx) || \ |
| Kojto | 93:e188a91d3eaa | 301 | defined (STM32F091xC) || defined (STM32F098xx) |
| Kojto | 93:e188a91d3eaa | 302 | /** |
| Kojto | 93:e188a91d3eaa | 303 | * @brief Enable interrupt on Vddio2 Monitor Exti Line 31. |
| Kojto | 93:e188a91d3eaa | 304 | * @retval None. |
| Kojto | 93:e188a91d3eaa | 305 | */ |
| Kojto | 93:e188a91d3eaa | 306 | #define __HAL_PWR_VDDIO2_EXTI_ENABLE_IT() (EXTI->IMR |= (PWR_EXTI_LINE_VDDIO2)) |
| Kojto | 93:e188a91d3eaa | 307 | |
| Kojto | 93:e188a91d3eaa | 308 | /** |
| Kojto | 93:e188a91d3eaa | 309 | * @brief Disable interrupt on Vddio2 Monitor Exti Line 31. |
| Kojto | 93:e188a91d3eaa | 310 | * @retval None. |
| Kojto | 93:e188a91d3eaa | 311 | */ |
| Kojto | 93:e188a91d3eaa | 312 | #define __HAL_PWR_VDDIO2_EXTI_DISABLE_IT() (EXTI->IMR &= ~(PWR_EXTI_LINE_VDDIO2)) |
| Kojto | 93:e188a91d3eaa | 313 | |
| Kojto | 93:e188a91d3eaa | 314 | /** |
| Kojto | 93:e188a91d3eaa | 315 | * @brief Vddio2 Monitor EXTI line configuration: clear falling edge and rising edge trigger. |
| Kojto | 93:e188a91d3eaa | 316 | * @retval None. |
| Kojto | 93:e188a91d3eaa | 317 | */ |
| Kojto | 93:e188a91d3eaa | 318 | #define __HAL_PWR_VDDIO2_EXTI_CLEAR_EGDE_TRIGGER() EXTI->FTSR &= ~(PWR_EXTI_LINE_VDDIO2); \ |
| Kojto | 93:e188a91d3eaa | 319 | EXTI->RTSR &= ~(PWR_EXTI_LINE_VDDIO2) |
| Kojto | 93:e188a91d3eaa | 320 | |
| Kojto | 93:e188a91d3eaa | 321 | /** |
| Kojto | 93:e188a91d3eaa | 322 | * @brief Vddio2 Monitor EXTI line configuration: set falling edge trigger. |
| Kojto | 93:e188a91d3eaa | 323 | * @retval None. |
| Kojto | 93:e188a91d3eaa | 324 | */ |
| Kojto | 93:e188a91d3eaa | 325 | #define __HAL_PWR_VDDIO2_EXTI_SET_FALLING_EGDE_TRIGGER() EXTI->FTSR |= (PWR_EXTI_LINE_VDDIO2) |
| Kojto | 93:e188a91d3eaa | 326 | |
| Kojto | 93:e188a91d3eaa | 327 | /** |
| Kojto | 93:e188a91d3eaa | 328 | * @brief Check whether the specified VDDIO2 monitor EXTI interrupt flag is set or not. |
| Kojto | 93:e188a91d3eaa | 329 | * @retval EXTI VDDIO2 Monitor Line Status. |
| Kojto | 93:e188a91d3eaa | 330 | */ |
| Kojto | 93:e188a91d3eaa | 331 | #define __HAL_PWR_VDDIO2_EXTI_GET_FLAG() (EXTI->PR & (PWR_EXTI_LINE_VDDIO2)) |
| Kojto | 93:e188a91d3eaa | 332 | |
| Kojto | 93:e188a91d3eaa | 333 | /** |
| Kojto | 93:e188a91d3eaa | 334 | * @brief Clear the VDDIO2 Monitor EXTI flag. |
| Kojto | 93:e188a91d3eaa | 335 | * @retval None. |
| Kojto | 93:e188a91d3eaa | 336 | */ |
| Kojto | 93:e188a91d3eaa | 337 | #define __HAL_PWR_VDDIO2_EXTI_CLEAR_FLAG() (EXTI->PR = (PWR_EXTI_LINE_VDDIO2)) |
| Kojto | 93:e188a91d3eaa | 338 | |
| Kojto | 93:e188a91d3eaa | 339 | /** |
| Kojto | 93:e188a91d3eaa | 340 | * @brief Generate a Software interrupt on selected EXTI line. |
| Kojto | 93:e188a91d3eaa | 341 | * @retval None. |
| Kojto | 93:e188a91d3eaa | 342 | */ |
| Kojto | 93:e188a91d3eaa | 343 | #define __HAL_PWR_VDDIO2_EXTI_GENERATE_SWIT() (EXTI->SWIER |= (PWR_EXTI_LINE_VDDIO2)) |
| Kojto | 93:e188a91d3eaa | 344 | |
| Kojto | 93:e188a91d3eaa | 345 | |
| Kojto | 93:e188a91d3eaa | 346 | #endif /* defined (STM32F042x6) || defined (STM32F048xx) ||\ |
| Kojto | 93:e188a91d3eaa | 347 | defined (STM32F071xB) || defined (STM32F072xB) || defined (STM32F078xx) || \ |
| Kojto | 93:e188a91d3eaa | 348 | defined (STM32F091xC) || defined (STM32F098xx) */ |
| Kojto | 93:e188a91d3eaa | 349 | |
| Kojto | 93:e188a91d3eaa | 350 | /** |
| Kojto | 93:e188a91d3eaa | 351 | * @} |
| Kojto | 93:e188a91d3eaa | 352 | */ |
| Kojto | 93:e188a91d3eaa | 353 | |
| Kojto | 93:e188a91d3eaa | 354 | /* Exported functions --------------------------------------------------------*/ |
| Kojto | 93:e188a91d3eaa | 355 | |
| Kojto | 93:e188a91d3eaa | 356 | /** @addtogroup PWREx_Exported_Functions PWREx Exported Functions |
| Kojto | 93:e188a91d3eaa | 357 | * @{ |
| Kojto | 93:e188a91d3eaa | 358 | */ |
| Kojto | 93:e188a91d3eaa | 359 | |
| Kojto | 93:e188a91d3eaa | 360 | /** @addtogroup PWREx_Exported_Functions_Group1 |
| Kojto | 93:e188a91d3eaa | 361 | * @{ |
| Kojto | 93:e188a91d3eaa | 362 | */ |
| Kojto | 93:e188a91d3eaa | 363 | /* I/O operation functions ***************************************************/ |
| Kojto | 93:e188a91d3eaa | 364 | #if defined (STM32F031x6) || defined (STM32F042x6) || defined (STM32F051x8) || \ |
| Kojto | 93:e188a91d3eaa | 365 | defined (STM32F071xB) || defined (STM32F072xB) || \ |
| Kojto | 93:e188a91d3eaa | 366 | defined (STM32F091xC) |
| Kojto | 93:e188a91d3eaa | 367 | void HAL_PWR_PVD_IRQHandler(void); |
| Kojto | 93:e188a91d3eaa | 368 | void HAL_PWR_PVDCallback(void); |
| Kojto | 93:e188a91d3eaa | 369 | #endif /* defined (STM32F031x6) || defined (STM32F042x6) || defined (STM32F051x8) || */ |
| Kojto | 93:e188a91d3eaa | 370 | /* defined (STM32F071xB) || defined (STM32F072xB) || */ |
| Kojto | 93:e188a91d3eaa | 371 | /* defined (STM32F091xC) */ |
| Kojto | 93:e188a91d3eaa | 372 | |
| Kojto | 93:e188a91d3eaa | 373 | #if defined (STM32F042x6) || defined (STM32F048xx) || \ |
| Kojto | 93:e188a91d3eaa | 374 | defined (STM32F071xB) || defined (STM32F072xB) || defined (STM32F078xx) || \ |
| Kojto | 93:e188a91d3eaa | 375 | defined (STM32F091xC) || defined (STM32F098xx) |
| Kojto | 93:e188a91d3eaa | 376 | void HAL_PWR_Vddio2Monitor_IRQHandler(void); |
| Kojto | 93:e188a91d3eaa | 377 | void HAL_PWR_Vddio2MonitorCallback(void); |
| Kojto | 93:e188a91d3eaa | 378 | #endif /* defined (STM32F042x6) || defined (STM32F048xx) || \ |
| Kojto | 93:e188a91d3eaa | 379 | defined (STM32F071xB) || defined (STM32F072xB) || defined (STM32F078xx) || \ |
| Kojto | 93:e188a91d3eaa | 380 | defined (STM32F091xC) || defined (STM32F098xx) */ |
| Kojto | 93:e188a91d3eaa | 381 | |
| Kojto | 93:e188a91d3eaa | 382 | /* Peripheral Control functions **********************************************/ |
| Kojto | 93:e188a91d3eaa | 383 | #if defined (STM32F031x6) || defined (STM32F042x6) || defined (STM32F051x8) || \ |
| Kojto | 93:e188a91d3eaa | 384 | defined (STM32F071xB) || defined (STM32F072xB) || \ |
| Kojto | 93:e188a91d3eaa | 385 | defined (STM32F091xC) |
| Kojto | 93:e188a91d3eaa | 386 | void HAL_PWR_PVDConfig(PWR_PVDTypeDef *sConfigPVD); |
| Kojto | 93:e188a91d3eaa | 387 | void HAL_PWR_EnablePVD(void); |
| Kojto | 93:e188a91d3eaa | 388 | void HAL_PWR_DisablePVD(void); |
| Kojto | 93:e188a91d3eaa | 389 | #endif /* defined (STM32F031x6) || defined (STM32F042x6) || defined (STM32F051x8) || */ |
| Kojto | 93:e188a91d3eaa | 390 | /* defined (STM32F071xB) || defined (STM32F072xB) || */ |
| Kojto | 93:e188a91d3eaa | 391 | /* defined (STM32F091xC) */ |
| Kojto | 93:e188a91d3eaa | 392 | |
| Kojto | 93:e188a91d3eaa | 393 | #if defined (STM32F042x6) || defined (STM32F048xx) || \ |
| Kojto | 93:e188a91d3eaa | 394 | defined (STM32F071xB) || defined (STM32F072xB) || defined (STM32F078xx) || \ |
| Kojto | 93:e188a91d3eaa | 395 | defined (STM32F091xC) || defined (STM32F098xx) |
| Kojto | 93:e188a91d3eaa | 396 | void HAL_PWR_EnableVddio2Monitor(void); |
| Kojto | 93:e188a91d3eaa | 397 | void HAL_PWR_DisableVddio2Monitor(void); |
| Kojto | 93:e188a91d3eaa | 398 | #endif /* defined (STM32F042x6) || defined (STM32F048xx) || \ |
| Kojto | 93:e188a91d3eaa | 399 | defined (STM32F071xB) || defined (STM32F072xB) || defined (STM32F078xx) || \ |
| Kojto | 93:e188a91d3eaa | 400 | defined (STM32F091xC) || defined (STM32F098xx) */ |
| Kojto | 93:e188a91d3eaa | 401 | |
| Kojto | 93:e188a91d3eaa | 402 | /** |
| Kojto | 93:e188a91d3eaa | 403 | * @} |
| Kojto | 93:e188a91d3eaa | 404 | */ |
| Kojto | 93:e188a91d3eaa | 405 | |
| Kojto | 93:e188a91d3eaa | 406 | /** |
| Kojto | 93:e188a91d3eaa | 407 | * @} |
| Kojto | 93:e188a91d3eaa | 408 | */ |
| Kojto | 93:e188a91d3eaa | 409 | |
| Kojto | 93:e188a91d3eaa | 410 | /** |
| Kojto | 93:e188a91d3eaa | 411 | * @} |
| Kojto | 93:e188a91d3eaa | 412 | */ |
| Kojto | 93:e188a91d3eaa | 413 | |
| Kojto | 93:e188a91d3eaa | 414 | /** |
| Kojto | 93:e188a91d3eaa | 415 | * @} |
| Kojto | 93:e188a91d3eaa | 416 | */ |
| Kojto | 93:e188a91d3eaa | 417 | |
| Kojto | 93:e188a91d3eaa | 418 | #ifdef __cplusplus |
| Kojto | 93:e188a91d3eaa | 419 | } |
| Kojto | 93:e188a91d3eaa | 420 | #endif |
| Kojto | 93:e188a91d3eaa | 421 | |
| Kojto | 93:e188a91d3eaa | 422 | #endif /* __STM32F0xx_HAL_PWR_EX_H */ |
| Kojto | 93:e188a91d3eaa | 423 | |
| Kojto | 93:e188a91d3eaa | 424 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |
| Kojto | 93:e188a91d3eaa | 425 |