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TARGET_MTS_MDOT_F411RE/stm32f4xx_ll_fmc.h@99:7f6c6de930c0, 2015-05-03 (annotated)

Committer:
Mikchel
Date:
Sun May 03 16:04:42 2015 +0000
Revision:
99:7f6c6de930c0
Parent:
93:e188a91d3eaa 
12

Who changed what in which revision?

UserRevisionLine numberNew contents of line
Kojto 93:e188a91d3eaa 1 /**
Kojto 93:e188a91d3eaa 2 ******************************************************************************
Kojto 93:e188a91d3eaa 3 * @file stm32f4xx_ll_fmc.h
Kojto 93:e188a91d3eaa 4 * @author MCD Application Team
Kojto 93:e188a91d3eaa 5 * @version V1.1.0
Kojto 93:e188a91d3eaa 6 * @date 19-June-2014
Kojto 93:e188a91d3eaa 7 * @brief Header file of FMC HAL module.
Kojto 93:e188a91d3eaa 8 ******************************************************************************
Kojto 93:e188a91d3eaa 9 * @attention
Kojto 93:e188a91d3eaa 10 *
Kojto 93:e188a91d3eaa 11 * <h2><center>&copy; COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
Kojto 93:e188a91d3eaa 12 *
Kojto 93:e188a91d3eaa 13 * Redistribution and use in source and binary forms, with or without modification,
Kojto 93:e188a91d3eaa 14 * are permitted provided that the following conditions are met:
Kojto 93:e188a91d3eaa 15 * 1. Redistributions of source code must retain the above copyright notice,
Kojto 93:e188a91d3eaa 16 * this list of conditions and the following disclaimer.
Kojto 93:e188a91d3eaa 17 * 2. Redistributions in binary form must reproduce the above copyright notice,
Kojto 93:e188a91d3eaa 18 * this list of conditions and the following disclaimer in the documentation
Kojto 93:e188a91d3eaa 19 * and/or other materials provided with the distribution.
Kojto 93:e188a91d3eaa 20 * 3. Neither the name of STMicroelectronics nor the names of its contributors
Kojto 93:e188a91d3eaa 21 * may be used to endorse or promote products derived from this software
Kojto 93:e188a91d3eaa 22 * without specific prior written permission.
Kojto 93:e188a91d3eaa 23 *
Kojto 93:e188a91d3eaa 24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
Kojto 93:e188a91d3eaa 25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
Kojto 93:e188a91d3eaa 26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
Kojto 93:e188a91d3eaa 27 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
Kojto 93:e188a91d3eaa 28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
Kojto 93:e188a91d3eaa 29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
Kojto 93:e188a91d3eaa 30 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
Kojto 93:e188a91d3eaa 31 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
Kojto 93:e188a91d3eaa 32 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
Kojto 93:e188a91d3eaa 33 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
Kojto 93:e188a91d3eaa 34 *
Kojto 93:e188a91d3eaa 35 ******************************************************************************
Kojto 93:e188a91d3eaa 36 */
Kojto 93:e188a91d3eaa 37
Kojto 93:e188a91d3eaa 38 /* Define to prevent recursive inclusion -------------------------------------*/
Kojto 93:e188a91d3eaa 39 #ifndef __STM32F4xx_LL_FMC_H
Kojto 93:e188a91d3eaa 40 #define __STM32F4xx_LL_FMC_H
Kojto 93:e188a91d3eaa 41
Kojto 93:e188a91d3eaa 42 #ifdef __cplusplus
Kojto 93:e188a91d3eaa 43 extern "C" {
Kojto 93:e188a91d3eaa 44 #endif
Kojto 93:e188a91d3eaa 45
Kojto 93:e188a91d3eaa 46 #if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx)
Kojto 93:e188a91d3eaa 47
Kojto 93:e188a91d3eaa 48 /* Includes ------------------------------------------------------------------*/
Kojto 93:e188a91d3eaa 49 #include "stm32f4xx_hal_def.h"
Kojto 93:e188a91d3eaa 50
Kojto 93:e188a91d3eaa 51 /** @addtogroup STM32F4xx_HAL_Driver
Kojto 93:e188a91d3eaa 52 * @{
Kojto 93:e188a91d3eaa 53 */
Kojto 93:e188a91d3eaa 54
Kojto 93:e188a91d3eaa 55 /** @addtogroup FMC
Kojto 93:e188a91d3eaa 56 * @{
Kojto 93:e188a91d3eaa 57 */
Kojto 93:e188a91d3eaa 58
Kojto 93:e188a91d3eaa 59 /* Exported typedef ----------------------------------------------------------*/
Kojto 93:e188a91d3eaa 60 #define FMC_NORSRAM_TypeDef FMC_Bank1_TypeDef
Kojto 93:e188a91d3eaa 61 #define FMC_NORSRAM_EXTENDED_TypeDef FMC_Bank1E_TypeDef
Kojto 93:e188a91d3eaa 62 #define FMC_NAND_TypeDef FMC_Bank2_3_TypeDef
Kojto 93:e188a91d3eaa 63 #define FMC_PCCARD_TypeDef FMC_Bank4_TypeDef
Kojto 93:e188a91d3eaa 64 #define FMC_SDRAM_TypeDef FMC_Bank5_6_TypeDef
Kojto 93:e188a91d3eaa 65
Kojto 93:e188a91d3eaa 66 #define FMC_NORSRAM_DEVICE FMC_Bank1
Kojto 93:e188a91d3eaa 67 #define FMC_NORSRAM_EXTENDED_DEVICE FMC_Bank1E
Kojto 93:e188a91d3eaa 68 #define FMC_NAND_DEVICE FMC_Bank2_3
Kojto 93:e188a91d3eaa 69 #define FMC_PCCARD_DEVICE FMC_Bank4
Kojto 93:e188a91d3eaa 70 #define FMC_SDRAM_DEVICE FMC_Bank5_6
Kojto 93:e188a91d3eaa 71
Kojto 93:e188a91d3eaa 72 /**
Kojto 93:e188a91d3eaa 73 * @brief FMC_NORSRAM Configuration Structure definition
Kojto 93:e188a91d3eaa 74 */
Kojto 93:e188a91d3eaa 75 typedef struct
Kojto 93:e188a91d3eaa 76 {
Kojto 93:e188a91d3eaa 77 uint32_t NSBank; /*!< Specifies the NORSRAM memory device that will be used.
Kojto 93:e188a91d3eaa 78 This parameter can be a value of @ref FMC_NORSRAM_Bank */
Kojto 93:e188a91d3eaa 79
Kojto 93:e188a91d3eaa 80 uint32_t DataAddressMux; /*!< Specifies whether the address and data values are
Kojto 93:e188a91d3eaa 81 multiplexed on the data bus or not.
Kojto 93:e188a91d3eaa 82 This parameter can be a value of @ref FMC_Data_Address_Bus_Multiplexing */
Kojto 93:e188a91d3eaa 83
Kojto 93:e188a91d3eaa 84 uint32_t MemoryType; /*!< Specifies the type of external memory attached to
Kojto 93:e188a91d3eaa 85 the corresponding memory device.
Kojto 93:e188a91d3eaa 86 This parameter can be a value of @ref FMC_Memory_Type */
Kojto 93:e188a91d3eaa 87
Kojto 93:e188a91d3eaa 88 uint32_t MemoryDataWidth; /*!< Specifies the external memory device width.
Kojto 93:e188a91d3eaa 89 This parameter can be a value of @ref FMC_NORSRAM_Data_Width */
Kojto 93:e188a91d3eaa 90
Kojto 93:e188a91d3eaa 91 uint32_t BurstAccessMode; /*!< Enables or disables the burst access mode for Flash memory,
Kojto 93:e188a91d3eaa 92 valid only with synchronous burst Flash memories.
Kojto 93:e188a91d3eaa 93 This parameter can be a value of @ref FMC_Burst_Access_Mode */
Kojto 93:e188a91d3eaa 94
Kojto 93:e188a91d3eaa 95 uint32_t WaitSignalPolarity; /*!< Specifies the wait signal polarity, valid only when accessing
Kojto 93:e188a91d3eaa 96 the Flash memory in burst mode.
Kojto 93:e188a91d3eaa 97 This parameter can be a value of @ref FMC_Wait_Signal_Polarity */
Kojto 93:e188a91d3eaa 98
Kojto 93:e188a91d3eaa 99 uint32_t WrapMode; /*!< Enables or disables the Wrapped burst access mode for Flash
Kojto 93:e188a91d3eaa 100 memory, valid only when accessing Flash memories in burst mode.
Kojto 93:e188a91d3eaa 101 This parameter can be a value of @ref FMC_Wrap_Mode */
Kojto 93:e188a91d3eaa 102
Kojto 93:e188a91d3eaa 103 uint32_t WaitSignalActive; /*!< Specifies if the wait signal is asserted by the memory one
Kojto 93:e188a91d3eaa 104 clock cycle before the wait state or during the wait state,
Kojto 93:e188a91d3eaa 105 valid only when accessing memories in burst mode.
Kojto 93:e188a91d3eaa 106 This parameter can be a value of @ref FMC_Wait_Timing */
Kojto 93:e188a91d3eaa 107
Kojto 93:e188a91d3eaa 108 uint32_t WriteOperation; /*!< Enables or disables the write operation in the selected device by the FMC.
Kojto 93:e188a91d3eaa 109 This parameter can be a value of @ref FMC_Write_Operation */
Kojto 93:e188a91d3eaa 110
Kojto 93:e188a91d3eaa 111 uint32_t WaitSignal; /*!< Enables or disables the wait state insertion via wait
Kojto 93:e188a91d3eaa 112 signal, valid for Flash memory access in burst mode.
Kojto 93:e188a91d3eaa 113 This parameter can be a value of @ref FMC_Wait_Signal */
Kojto 93:e188a91d3eaa 114
Kojto 93:e188a91d3eaa 115 uint32_t ExtendedMode; /*!< Enables or disables the extended mode.
Kojto 93:e188a91d3eaa 116 This parameter can be a value of @ref FMC_Extended_Mode */
Kojto 93:e188a91d3eaa 117
Kojto 93:e188a91d3eaa 118 uint32_t AsynchronousWait; /*!< Enables or disables wait signal during asynchronous transfers,
Kojto 93:e188a91d3eaa 119 valid only with asynchronous Flash memories.
Kojto 93:e188a91d3eaa 120 This parameter can be a value of @ref FMC_AsynchronousWait */
Kojto 93:e188a91d3eaa 121
Kojto 93:e188a91d3eaa 122 uint32_t WriteBurst; /*!< Enables or disables the write burst operation.
Kojto 93:e188a91d3eaa 123 This parameter can be a value of @ref FMC_Write_Burst */
Kojto 93:e188a91d3eaa 124
Kojto 93:e188a91d3eaa 125 uint32_t ContinuousClock; /*!< Enables or disables the FMC clock output to external memory devices.
Kojto 93:e188a91d3eaa 126 This parameter is only enabled through the FMC_BCR1 register, and don't care
Kojto 93:e188a91d3eaa 127 through FMC_BCR2..4 registers.
Kojto 93:e188a91d3eaa 128 This parameter can be a value of @ref FMC_Continous_Clock */
Kojto 93:e188a91d3eaa 129
Kojto 93:e188a91d3eaa 130 }FMC_NORSRAM_InitTypeDef;
Kojto 93:e188a91d3eaa 131
Kojto 93:e188a91d3eaa 132 /**
Kojto 93:e188a91d3eaa 133 * @brief FMC_NORSRAM Timing parameters structure definition
Kojto 93:e188a91d3eaa 134 */
Kojto 93:e188a91d3eaa 135 typedef struct
Kojto 93:e188a91d3eaa 136 {
Kojto 93:e188a91d3eaa 137 uint32_t AddressSetupTime; /*!< Defines the number of HCLK cycles to configure
Kojto 93:e188a91d3eaa 138 the duration of the address setup time.
Kojto 93:e188a91d3eaa 139 This parameter can be a value between Min_Data = 0 and Max_Data = 15.
Kojto 93:e188a91d3eaa 140 @note This parameter is not used with synchronous NOR Flash memories. */
Kojto 93:e188a91d3eaa 141
Kojto 93:e188a91d3eaa 142 uint32_t AddressHoldTime; /*!< Defines the number of HCLK cycles to configure
Kojto 93:e188a91d3eaa 143 the duration of the address hold time.
Kojto 93:e188a91d3eaa 144 This parameter can be a value between Min_Data = 1 and Max_Data = 15.
Kojto 93:e188a91d3eaa 145 @note This parameter is not used with synchronous NOR Flash memories. */
Kojto 93:e188a91d3eaa 146
Kojto 93:e188a91d3eaa 147 uint32_t DataSetupTime; /*!< Defines the number of HCLK cycles to configure
Kojto 93:e188a91d3eaa 148 the duration of the data setup time.
Kojto 93:e188a91d3eaa 149 This parameter can be a value between Min_Data = 1 and Max_Data = 255.
Kojto 93:e188a91d3eaa 150 @note This parameter is used for SRAMs, ROMs and asynchronous multiplexed
Kojto 93:e188a91d3eaa 151 NOR Flash memories. */
Kojto 93:e188a91d3eaa 152
Kojto 93:e188a91d3eaa 153 uint32_t BusTurnAroundDuration; /*!< Defines the number of HCLK cycles to configure
Kojto 93:e188a91d3eaa 154 the duration of the bus turnaround.
Kojto 93:e188a91d3eaa 155 This parameter can be a value between Min_Data = 0 and Max_Data = 15.
Kojto 93:e188a91d3eaa 156 @note This parameter is only used for multiplexed NOR Flash memories. */
Kojto 93:e188a91d3eaa 157
Kojto 93:e188a91d3eaa 158 uint32_t CLKDivision; /*!< Defines the period of CLK clock output signal, expressed in number of
Kojto 93:e188a91d3eaa 159 HCLK cycles. This parameter can be a value between Min_Data = 2 and Max_Data = 16.
Kojto 93:e188a91d3eaa 160 @note This parameter is not used for asynchronous NOR Flash, SRAM or ROM
Kojto 93:e188a91d3eaa 161 accesses. */
Kojto 93:e188a91d3eaa 162
Kojto 93:e188a91d3eaa 163 uint32_t DataLatency; /*!< Defines the number of memory clock cycles to issue
Kojto 93:e188a91d3eaa 164 to the memory before getting the first data.
Kojto 93:e188a91d3eaa 165 The parameter value depends on the memory type as shown below:
Kojto 93:e188a91d3eaa 166 - It must be set to 0 in case of a CRAM
Kojto 93:e188a91d3eaa 167 - It is don't care in asynchronous NOR, SRAM or ROM accesses
Kojto 93:e188a91d3eaa 168 - It may assume a value between Min_Data = 2 and Max_Data = 17 in NOR Flash memories
Kojto 93:e188a91d3eaa 169 with synchronous burst mode enable */
Kojto 93:e188a91d3eaa 170
Kojto 93:e188a91d3eaa 171 uint32_t AccessMode; /*!< Specifies the asynchronous access mode.
Kojto 93:e188a91d3eaa 172 This parameter can be a value of @ref FMC_Access_Mode */
Kojto 93:e188a91d3eaa 173 }FMC_NORSRAM_TimingTypeDef;
Kojto 93:e188a91d3eaa 174
Kojto 93:e188a91d3eaa 175 /**
Kojto 93:e188a91d3eaa 176 * @brief FMC_NAND Configuration Structure definition
Kojto 93:e188a91d3eaa 177 */
Kojto 93:e188a91d3eaa 178 typedef struct
Kojto 93:e188a91d3eaa 179 {
Kojto 93:e188a91d3eaa 180 uint32_t NandBank; /*!< Specifies the NAND memory device that will be used.
Kojto 93:e188a91d3eaa 181 This parameter can be a value of @ref FMC_NAND_Bank */
Kojto 93:e188a91d3eaa 182
Kojto 93:e188a91d3eaa 183 uint32_t Waitfeature; /*!< Enables or disables the Wait feature for the NAND Memory device.
Kojto 93:e188a91d3eaa 184 This parameter can be any value of @ref FMC_Wait_feature */
Kojto 93:e188a91d3eaa 185
Kojto 93:e188a91d3eaa 186 uint32_t MemoryDataWidth; /*!< Specifies the external memory device width.
Kojto 93:e188a91d3eaa 187 This parameter can be any value of @ref FMC_NAND_Data_Width */
Kojto 93:e188a91d3eaa 188
Kojto 93:e188a91d3eaa 189 uint32_t EccComputation; /*!< Enables or disables the ECC computation.
Kojto 93:e188a91d3eaa 190 This parameter can be any value of @ref FMC_ECC */
Kojto 93:e188a91d3eaa 191
Kojto 93:e188a91d3eaa 192 uint32_t ECCPageSize; /*!< Defines the page size for the extended ECC.
Kojto 93:e188a91d3eaa 193 This parameter can be any value of @ref FMC_ECC_Page_Size */
Kojto 93:e188a91d3eaa 194
Kojto 93:e188a91d3eaa 195 uint32_t TCLRSetupTime; /*!< Defines the number of HCLK cycles to configure the
Kojto 93:e188a91d3eaa 196 delay between CLE low and RE low.
Kojto 93:e188a91d3eaa 197 This parameter can be a value between Min_Data = 0 and Max_Data = 255 */
Kojto 93:e188a91d3eaa 198
Kojto 93:e188a91d3eaa 199 uint32_t TARSetupTime; /*!< Defines the number of HCLK cycles to configure the
Kojto 93:e188a91d3eaa 200 delay between ALE low and RE low.
Kojto 93:e188a91d3eaa 201 This parameter can be a number between Min_Data = 0 and Max_Data = 255 */
Kojto 93:e188a91d3eaa 202 }FMC_NAND_InitTypeDef;
Kojto 93:e188a91d3eaa 203
Kojto 93:e188a91d3eaa 204 /**
Kojto 93:e188a91d3eaa 205 * @brief FMC_NAND_PCCARD Timing parameters structure definition
Kojto 93:e188a91d3eaa 206 */
Kojto 93:e188a91d3eaa 207 typedef struct
Kojto 93:e188a91d3eaa 208 {
Kojto 93:e188a91d3eaa 209 uint32_t SetupTime; /*!< Defines the number of HCLK cycles to setup address before
Kojto 93:e188a91d3eaa 210 the command assertion for NAND-Flash read or write access
Kojto 93:e188a91d3eaa 211 to common/Attribute or I/O memory space (depending on
Kojto 93:e188a91d3eaa 212 the memory space timing to be configured).
Kojto 93:e188a91d3eaa 213 This parameter can be a value between Min_Data = 0 and Max_Data = 255 */
Kojto 93:e188a91d3eaa 214
Kojto 93:e188a91d3eaa 215 uint32_t WaitSetupTime; /*!< Defines the minimum number of HCLK cycles to assert the
Kojto 93:e188a91d3eaa 216 command for NAND-Flash read or write access to
Kojto 93:e188a91d3eaa 217 common/Attribute or I/O memory space (depending on the
Kojto 93:e188a91d3eaa 218 memory space timing to be configured).
Kojto 93:e188a91d3eaa 219 This parameter can be a number between Min_Data = 0 and Max_Data = 255 */
Kojto 93:e188a91d3eaa 220
Kojto 93:e188a91d3eaa 221 uint32_t HoldSetupTime; /*!< Defines the number of HCLK clock cycles to hold address
Kojto 93:e188a91d3eaa 222 (and data for write access) after the command de-assertion
Kojto 93:e188a91d3eaa 223 for NAND-Flash read or write access to common/Attribute
Kojto 93:e188a91d3eaa 224 or I/O memory space (depending on the memory space timing
Kojto 93:e188a91d3eaa 225 to be configured).
Kojto 93:e188a91d3eaa 226 This parameter can be a number between Min_Data = 0 and Max_Data = 255 */
Kojto 93:e188a91d3eaa 227
Kojto 93:e188a91d3eaa 228 uint32_t HiZSetupTime; /*!< Defines the number of HCLK clock cycles during which the
Kojto 93:e188a91d3eaa 229 data bus is kept in HiZ after the start of a NAND-Flash
Kojto 93:e188a91d3eaa 230 write access to common/Attribute or I/O memory space (depending
Kojto 93:e188a91d3eaa 231 on the memory space timing to be configured).
Kojto 93:e188a91d3eaa 232 This parameter can be a number between Min_Data = 0 and Max_Data = 255 */
Kojto 93:e188a91d3eaa 233 }FMC_NAND_PCC_TimingTypeDef;
Kojto 93:e188a91d3eaa 234
Kojto 93:e188a91d3eaa 235 /**
Kojto 93:e188a91d3eaa 236 * @brief FMC_NAND Configuration Structure definition
Kojto 93:e188a91d3eaa 237 */
Kojto 93:e188a91d3eaa 238 typedef struct
Kojto 93:e188a91d3eaa 239 {
Kojto 93:e188a91d3eaa 240 uint32_t Waitfeature; /*!< Enables or disables the Wait feature for the PCCARD Memory device.
Kojto 93:e188a91d3eaa 241 This parameter can be any value of @ref FMC_Wait_feature */
Kojto 93:e188a91d3eaa 242
Kojto 93:e188a91d3eaa 243 uint32_t TCLRSetupTime; /*!< Defines the number of HCLK cycles to configure the
Kojto 93:e188a91d3eaa 244 delay between CLE low and RE low.
Kojto 93:e188a91d3eaa 245 This parameter can be a value between Min_Data = 0 and Max_Data = 255 */
Kojto 93:e188a91d3eaa 246
Kojto 93:e188a91d3eaa 247 uint32_t TARSetupTime; /*!< Defines the number of HCLK cycles to configure the
Kojto 93:e188a91d3eaa 248 delay between ALE low and RE low.
Kojto 93:e188a91d3eaa 249 This parameter can be a number between Min_Data = 0 and Max_Data = 255 */
Kojto 93:e188a91d3eaa 250 }FMC_PCCARD_InitTypeDef;
Kojto 93:e188a91d3eaa 251
Kojto 93:e188a91d3eaa 252 /**
Kojto 93:e188a91d3eaa 253 * @brief FMC_SDRAM Configuration Structure definition
Kojto 93:e188a91d3eaa 254 */
Kojto 93:e188a91d3eaa 255 typedef struct
Kojto 93:e188a91d3eaa 256 {
Kojto 93:e188a91d3eaa 257 uint32_t SDBank; /*!< Specifies the SDRAM memory device that will be used.
Kojto 93:e188a91d3eaa 258 This parameter can be a value of @ref FMC_SDRAM_Bank */
Kojto 93:e188a91d3eaa 259
Kojto 93:e188a91d3eaa 260 uint32_t ColumnBitsNumber; /*!< Defines the number of bits of column address.
Kojto 93:e188a91d3eaa 261 This parameter can be a value of @ref FMC_SDRAM_Column_Bits_number. */
Kojto 93:e188a91d3eaa 262
Kojto 93:e188a91d3eaa 263 uint32_t RowBitsNumber; /*!< Defines the number of bits of column address.
Kojto 93:e188a91d3eaa 264 This parameter can be a value of @ref FMC_SDRAM_Row_Bits_number. */
Kojto 93:e188a91d3eaa 265
Kojto 93:e188a91d3eaa 266 uint32_t MemoryDataWidth; /*!< Defines the memory device width.
Kojto 93:e188a91d3eaa 267 This parameter can be a value of @ref FMC_SDRAM_Memory_Bus_Width. */
Kojto 93:e188a91d3eaa 268
Kojto 93:e188a91d3eaa 269 uint32_t InternalBankNumber; /*!< Defines the number of the device's internal banks.
Kojto 93:e188a91d3eaa 270 This parameter can be of @ref FMC_SDRAM_Internal_Banks_Number. */
Kojto 93:e188a91d3eaa 271
Kojto 93:e188a91d3eaa 272 uint32_t CASLatency; /*!< Defines the SDRAM CAS latency in number of memory clock cycles.
Kojto 93:e188a91d3eaa 273 This parameter can be a value of @ref FMC_SDRAM_CAS_Latency. */
Kojto 93:e188a91d3eaa 274
Kojto 93:e188a91d3eaa 275 uint32_t WriteProtection; /*!< Enables the SDRAM device to be accessed in write mode.
Kojto 93:e188a91d3eaa 276 This parameter can be a value of @ref FMC_SDRAM_Write_Protection. */
Kojto 93:e188a91d3eaa 277
Kojto 93:e188a91d3eaa 278 uint32_t SDClockPeriod; /*!< Define the SDRAM Clock Period for both SDRAM devices and they allow
Kojto 93:e188a91d3eaa 279 to disable the clock before changing frequency.
Kojto 93:e188a91d3eaa 280 This parameter can be a value of @ref FMC_SDRAM_Clock_Period. */
Kojto 93:e188a91d3eaa 281
Kojto 93:e188a91d3eaa 282 uint32_t ReadBurst; /*!< This bit enable the SDRAM controller to anticipate the next read
Kojto 93:e188a91d3eaa 283 commands during the CAS latency and stores data in the Read FIFO.
Kojto 93:e188a91d3eaa 284 This parameter can be a value of @ref FMC_SDRAM_Read_Burst. */
Kojto 93:e188a91d3eaa 285
Kojto 93:e188a91d3eaa 286 uint32_t ReadPipeDelay; /*!< Define the delay in system clock cycles on read data path.
Kojto 93:e188a91d3eaa 287 This parameter can be a value of @ref FMC_SDRAM_Read_Pipe_Delay. */
Kojto 93:e188a91d3eaa 288 }FMC_SDRAM_InitTypeDef;
Kojto 93:e188a91d3eaa 289
Kojto 93:e188a91d3eaa 290 /**
Kojto 93:e188a91d3eaa 291 * @brief FMC_SDRAM Timing parameters structure definition
Kojto 93:e188a91d3eaa 292 */
Kojto 93:e188a91d3eaa 293 typedef struct
Kojto 93:e188a91d3eaa 294 {
Kojto 93:e188a91d3eaa 295 uint32_t LoadToActiveDelay; /*!< Defines the delay between a Load Mode Register command and
Kojto 93:e188a91d3eaa 296 an active or Refresh command in number of memory clock cycles.
Kojto 93:e188a91d3eaa 297 This parameter can be a value between Min_Data = 1 and Max_Data = 16 */
Kojto 93:e188a91d3eaa 298
Kojto 93:e188a91d3eaa 299 uint32_t ExitSelfRefreshDelay; /*!< Defines the delay from releasing the self refresh command to
Kojto 93:e188a91d3eaa 300 issuing the Activate command in number of memory clock cycles.
Kojto 93:e188a91d3eaa 301 This parameter can be a value between Min_Data = 1 and Max_Data = 16 */
Kojto 93:e188a91d3eaa 302
Kojto 93:e188a91d3eaa 303 uint32_t SelfRefreshTime; /*!< Defines the minimum Self Refresh period in number of memory clock
Kojto 93:e188a91d3eaa 304 cycles.
Kojto 93:e188a91d3eaa 305 This parameter can be a value between Min_Data = 1 and Max_Data = 16 */
Kojto 93:e188a91d3eaa 306
Kojto 93:e188a91d3eaa 307 uint32_t RowCycleDelay; /*!< Defines the delay between the Refresh command and the Activate command
Kojto 93:e188a91d3eaa 308 and the delay between two consecutive Refresh commands in number of
Kojto 93:e188a91d3eaa 309 memory clock cycles.
Kojto 93:e188a91d3eaa 310 This parameter can be a value between Min_Data = 1 and Max_Data = 16 */
Kojto 93:e188a91d3eaa 311
Kojto 93:e188a91d3eaa 312 uint32_t WriteRecoveryTime; /*!< Defines the Write recovery Time in number of memory clock cycles.
Kojto 93:e188a91d3eaa 313 This parameter can be a value between Min_Data = 1 and Max_Data = 16 */
Kojto 93:e188a91d3eaa 314
Kojto 93:e188a91d3eaa 315 uint32_t RPDelay; /*!< Defines the delay between a Precharge Command and an other command
Kojto 93:e188a91d3eaa 316 in number of memory clock cycles.
Kojto 93:e188a91d3eaa 317 This parameter can be a value between Min_Data = 1 and Max_Data = 16 */
Kojto 93:e188a91d3eaa 318
Kojto 93:e188a91d3eaa 319 uint32_t RCDDelay; /*!< Defines the delay between the Activate Command and a Read/Write
Kojto 93:e188a91d3eaa 320 command in number of memory clock cycles.
Kojto 93:e188a91d3eaa 321 This parameter can be a value between Min_Data = 1 and Max_Data = 16 */
Kojto 93:e188a91d3eaa 322 }FMC_SDRAM_TimingTypeDef;
Kojto 93:e188a91d3eaa 323
Kojto 93:e188a91d3eaa 324 /**
Kojto 93:e188a91d3eaa 325 * @brief SDRAM command parameters structure definition
Kojto 93:e188a91d3eaa 326 */
Kojto 93:e188a91d3eaa 327 typedef struct
Kojto 93:e188a91d3eaa 328 {
Kojto 93:e188a91d3eaa 329 uint32_t CommandMode; /*!< Defines the command issued to the SDRAM device.
Kojto 93:e188a91d3eaa 330 This parameter can be a value of @ref FMC_SDRAM_Command_Mode. */
Kojto 93:e188a91d3eaa 331
Kojto 93:e188a91d3eaa 332 uint32_t CommandTarget; /*!< Defines which device (1 or 2) the command will be issued to.
Kojto 93:e188a91d3eaa 333 This parameter can be a value of @ref FMC_SDRAM_Command_Target. */
Kojto 93:e188a91d3eaa 334
Kojto 93:e188a91d3eaa 335 uint32_t AutoRefreshNumber; /*!< Defines the number of consecutive auto refresh command issued
Kojto 93:e188a91d3eaa 336 in auto refresh mode.
Kojto 93:e188a91d3eaa 337 This parameter can be a value between Min_Data = 1 and Max_Data = 16 */
Kojto 93:e188a91d3eaa 338 uint32_t ModeRegisterDefinition; /*!< Defines the SDRAM Mode register content */
Kojto 93:e188a91d3eaa 339 }FMC_SDRAM_CommandTypeDef;
Kojto 93:e188a91d3eaa 340
Kojto 93:e188a91d3eaa 341 /* Exported constants --------------------------------------------------------*/
Kojto 93:e188a91d3eaa 342
Kojto 93:e188a91d3eaa 343 /** @defgroup FMC_NOR_SRAM_Controller
Kojto 93:e188a91d3eaa 344 * @{
Kojto 93:e188a91d3eaa 345 */
Kojto 93:e188a91d3eaa 346
Kojto 93:e188a91d3eaa 347 /** @defgroup FMC_NORSRAM_Bank
Kojto 93:e188a91d3eaa 348 * @{
Kojto 93:e188a91d3eaa 349 */
Kojto 93:e188a91d3eaa 350 #define FMC_NORSRAM_BANK1 ((uint32_t)0x00000000)
Kojto 93:e188a91d3eaa 351 #define FMC_NORSRAM_BANK2 ((uint32_t)0x00000002)
Kojto 93:e188a91d3eaa 352 #define FMC_NORSRAM_BANK3 ((uint32_t)0x00000004)
Kojto 93:e188a91d3eaa 353 #define FMC_NORSRAM_BANK4 ((uint32_t)0x00000006)
Kojto 93:e188a91d3eaa 354
Kojto 93:e188a91d3eaa 355 #define IS_FMC_NORSRAM_BANK(BANK) (((BANK) == FMC_NORSRAM_BANK1) || \
Kojto 93:e188a91d3eaa 356 ((BANK) == FMC_NORSRAM_BANK2) || \
Kojto 93:e188a91d3eaa 357 ((BANK) == FMC_NORSRAM_BANK3) || \
Kojto 93:e188a91d3eaa 358 ((BANK) == FMC_NORSRAM_BANK4))
Kojto 93:e188a91d3eaa 359 /**
Kojto 93:e188a91d3eaa 360 * @}
Kojto 93:e188a91d3eaa 361 */
Kojto 93:e188a91d3eaa 362
Kojto 93:e188a91d3eaa 363 /** @defgroup FMC_Data_Address_Bus_Multiplexing
Kojto 93:e188a91d3eaa 364 * @{
Kojto 93:e188a91d3eaa 365 */
Kojto 93:e188a91d3eaa 366 #define FMC_DATA_ADDRESS_MUX_DISABLE ((uint32_t)0x00000000)
Kojto 93:e188a91d3eaa 367 #define FMC_DATA_ADDRESS_MUX_ENABLE ((uint32_t)0x00000002)
Kojto 93:e188a91d3eaa 368
Kojto 93:e188a91d3eaa 369 #define IS_FMC_MUX(MUX) (((MUX) == FMC_DATA_ADDRESS_MUX_DISABLE) || \
Kojto 93:e188a91d3eaa 370 ((MUX) == FMC_DATA_ADDRESS_MUX_ENABLE))
Kojto 93:e188a91d3eaa 371 /**
Kojto 93:e188a91d3eaa 372 * @}
Kojto 93:e188a91d3eaa 373 */
Kojto 93:e188a91d3eaa 374
Kojto 93:e188a91d3eaa 375 /** @defgroup FMC_Memory_Type
Kojto 93:e188a91d3eaa 376 * @{
Kojto 93:e188a91d3eaa 377 */
Kojto 93:e188a91d3eaa 378 #define FMC_MEMORY_TYPE_SRAM ((uint32_t)0x00000000)
Kojto 93:e188a91d3eaa 379 #define FMC_MEMORY_TYPE_PSRAM ((uint32_t)0x00000004)
Kojto 93:e188a91d3eaa 380 #define FMC_MEMORY_TYPE_NOR ((uint32_t)0x00000008)
Kojto 93:e188a91d3eaa 381
Kojto 93:e188a91d3eaa 382 #define IS_FMC_MEMORY(MEMORY) (((MEMORY) == FMC_MEMORY_TYPE_SRAM) || \
Kojto 93:e188a91d3eaa 383 ((MEMORY) == FMC_MEMORY_TYPE_PSRAM)|| \
Kojto 93:e188a91d3eaa 384 ((MEMORY) == FMC_MEMORY_TYPE_NOR))
Kojto 93:e188a91d3eaa 385 /**
Kojto 93:e188a91d3eaa 386 * @}
Kojto 93:e188a91d3eaa 387 */
Kojto 93:e188a91d3eaa 388
Kojto 93:e188a91d3eaa 389 /** @defgroup FMC_NORSRAM_Data_Width
Kojto 93:e188a91d3eaa 390 * @{
Kojto 93:e188a91d3eaa 391 */
Kojto 93:e188a91d3eaa 392 #define FMC_NORSRAM_MEM_BUS_WIDTH_8 ((uint32_t)0x00000000)
Kojto 93:e188a91d3eaa 393 #define FMC_NORSRAM_MEM_BUS_WIDTH_16 ((uint32_t)0x00000010)
Kojto 93:e188a91d3eaa 394 #define FMC_NORSRAM_MEM_BUS_WIDTH_32 ((uint32_t)0x00000020)
Kojto 93:e188a91d3eaa 395
Kojto 93:e188a91d3eaa 396 #define IS_FMC_NORSRAM_MEMORY_WIDTH(WIDTH) (((WIDTH) == FMC_NORSRAM_MEM_BUS_WIDTH_8) || \
Kojto 93:e188a91d3eaa 397 ((WIDTH) == FMC_NORSRAM_MEM_BUS_WIDTH_16) || \
Kojto 93:e188a91d3eaa 398 ((WIDTH) == FMC_NORSRAM_MEM_BUS_WIDTH_32))
Kojto 93:e188a91d3eaa 399 /**
Kojto 93:e188a91d3eaa 400 * @}
Kojto 93:e188a91d3eaa 401 */
Kojto 93:e188a91d3eaa 402
Kojto 93:e188a91d3eaa 403 /** @defgroup FMC_NORSRAM_Flash_Access
Kojto 93:e188a91d3eaa 404 * @{
Kojto 93:e188a91d3eaa 405 */
Kojto 93:e188a91d3eaa 406 #define FMC_NORSRAM_FLASH_ACCESS_ENABLE ((uint32_t)0x00000040)
Kojto 93:e188a91d3eaa 407 #define FMC_NORSRAM_FLASH_ACCESS_DISABLE ((uint32_t)0x00000000)
Kojto 93:e188a91d3eaa 408 /**
Kojto 93:e188a91d3eaa 409 * @}
Kojto 93:e188a91d3eaa 410 */
Kojto 93:e188a91d3eaa 411
Kojto 93:e188a91d3eaa 412 /** @defgroup FMC_Burst_Access_Mode
Kojto 93:e188a91d3eaa 413 * @{
Kojto 93:e188a91d3eaa 414 */
Kojto 93:e188a91d3eaa 415 #define FMC_BURST_ACCESS_MODE_DISABLE ((uint32_t)0x00000000)
Kojto 93:e188a91d3eaa 416 #define FMC_BURST_ACCESS_MODE_ENABLE ((uint32_t)0x00000100)
Kojto 93:e188a91d3eaa 417
Kojto 93:e188a91d3eaa 418 #define IS_FMC_BURSTMODE(STATE) (((STATE) == FMC_BURST_ACCESS_MODE_DISABLE) || \
Kojto 93:e188a91d3eaa 419 ((STATE) == FMC_BURST_ACCESS_MODE_ENABLE))
Kojto 93:e188a91d3eaa 420 /**
Kojto 93:e188a91d3eaa 421 * @}
Kojto 93:e188a91d3eaa 422 */
Kojto 93:e188a91d3eaa 423
Kojto 93:e188a91d3eaa 424
Kojto 93:e188a91d3eaa 425 /** @defgroup FMC_Wait_Signal_Polarity
Kojto 93:e188a91d3eaa 426 * @{
Kojto 93:e188a91d3eaa 427 */
Kojto 93:e188a91d3eaa 428 #define FMC_WAIT_SIGNAL_POLARITY_LOW ((uint32_t)0x00000000)
Kojto 93:e188a91d3eaa 429 #define FMC_WAIT_SIGNAL_POLARITY_HIGH ((uint32_t)0x00000200)
Kojto 93:e188a91d3eaa 430
Kojto 93:e188a91d3eaa 431 #define IS_FMC_WAIT_POLARITY(POLARITY) (((POLARITY) == FMC_WAIT_SIGNAL_POLARITY_LOW) || \
Kojto 93:e188a91d3eaa 432 ((POLARITY) == FMC_WAIT_SIGNAL_POLARITY_HIGH))
Kojto 93:e188a91d3eaa 433 /**
Kojto 93:e188a91d3eaa 434 * @}
Kojto 93:e188a91d3eaa 435 */
Kojto 93:e188a91d3eaa 436
Kojto 93:e188a91d3eaa 437 /** @defgroup FMC_Wrap_Mode
Kojto 93:e188a91d3eaa 438 * @{
Kojto 93:e188a91d3eaa 439 */
Kojto 93:e188a91d3eaa 440 #define FMC_WRAP_MODE_DISABLE ((uint32_t)0x00000000)
Kojto 93:e188a91d3eaa 441 #define FMC_WRAP_MODE_ENABLE ((uint32_t)0x00000400)
Kojto 93:e188a91d3eaa 442
Kojto 93:e188a91d3eaa 443 #define IS_FMC_WRAP_MODE(MODE) (((MODE) == FMC_WRAP_MODE_DISABLE) || \
Kojto 93:e188a91d3eaa 444 ((MODE) == FMC_WRAP_MODE_ENABLE))
Kojto 93:e188a91d3eaa 445 /**
Kojto 93:e188a91d3eaa 446 * @}
Kojto 93:e188a91d3eaa 447 */
Kojto 93:e188a91d3eaa 448
Kojto 93:e188a91d3eaa 449 /** @defgroup FMC_Wait_Timing
Kojto 93:e188a91d3eaa 450 * @{
Kojto 93:e188a91d3eaa 451 */
Kojto 93:e188a91d3eaa 452 #define FMC_WAIT_TIMING_BEFORE_WS ((uint32_t)0x00000000)
Kojto 93:e188a91d3eaa 453 #define FMC_WAIT_TIMING_DURING_WS ((uint32_t)0x00000800)
Kojto 93:e188a91d3eaa 454
Kojto 93:e188a91d3eaa 455 #define IS_FMC_WAIT_SIGNAL_ACTIVE(ACTIVE) (((ACTIVE) == FMC_WAIT_TIMING_BEFORE_WS) || \
Kojto 93:e188a91d3eaa 456 ((ACTIVE) == FMC_WAIT_TIMING_DURING_WS))
Kojto 93:e188a91d3eaa 457 /**
Kojto 93:e188a91d3eaa 458 * @}
Kojto 93:e188a91d3eaa 459 */
Kojto 93:e188a91d3eaa 460
Kojto 93:e188a91d3eaa 461 /** @defgroup FMC_Write_Operation
Kojto 93:e188a91d3eaa 462 * @{
Kojto 93:e188a91d3eaa 463 */
Kojto 93:e188a91d3eaa 464 #define FMC_WRITE_OPERATION_DISABLE ((uint32_t)0x00000000)
Kojto 93:e188a91d3eaa 465 #define FMC_WRITE_OPERATION_ENABLE ((uint32_t)0x00001000)
Kojto 93:e188a91d3eaa 466
Kojto 93:e188a91d3eaa 467 #define IS_FMC_WRITE_OPERATION(OPERATION) (((OPERATION) == FMC_WRITE_OPERATION_DISABLE) || \
Kojto 93:e188a91d3eaa 468 ((OPERATION) == FMC_WRITE_OPERATION_ENABLE))
Kojto 93:e188a91d3eaa 469 /**
Kojto 93:e188a91d3eaa 470 * @}
Kojto 93:e188a91d3eaa 471 */
Kojto 93:e188a91d3eaa 472
Kojto 93:e188a91d3eaa 473 /** @defgroup FMC_Wait_Signal
Kojto 93:e188a91d3eaa 474 * @{
Kojto 93:e188a91d3eaa 475 */
Kojto 93:e188a91d3eaa 476 #define FMC_WAIT_SIGNAL_DISABLE ((uint32_t)0x00000000)
Kojto 93:e188a91d3eaa 477 #define FMC_WAIT_SIGNAL_ENABLE ((uint32_t)0x00002000)
Kojto 93:e188a91d3eaa 478
Kojto 93:e188a91d3eaa 479 #define IS_FMC_WAITE_SIGNAL(SIGNAL) (((SIGNAL) == FMC_WAIT_SIGNAL_DISABLE) || \
Kojto 93:e188a91d3eaa 480 ((SIGNAL) == FMC_WAIT_SIGNAL_ENABLE))
Kojto 93:e188a91d3eaa 481 /**
Kojto 93:e188a91d3eaa 482 * @}
Kojto 93:e188a91d3eaa 483 */
Kojto 93:e188a91d3eaa 484
Kojto 93:e188a91d3eaa 485 /** @defgroup FMC_Extended_Mode
Kojto 93:e188a91d3eaa 486 * @{
Kojto 93:e188a91d3eaa 487 */
Kojto 93:e188a91d3eaa 488 #define FMC_EXTENDED_MODE_DISABLE ((uint32_t)0x00000000)
Kojto 93:e188a91d3eaa 489 #define FMC_EXTENDED_MODE_ENABLE ((uint32_t)0x00004000)
Kojto 93:e188a91d3eaa 490
Kojto 93:e188a91d3eaa 491 #define IS_FMC_EXTENDED_MODE(MODE) (((MODE) == FMC_EXTENDED_MODE_DISABLE) || \
Kojto 93:e188a91d3eaa 492 ((MODE) == FMC_EXTENDED_MODE_ENABLE))
Kojto 93:e188a91d3eaa 493 /**
Kojto 93:e188a91d3eaa 494 * @}
Kojto 93:e188a91d3eaa 495 */
Kojto 93:e188a91d3eaa 496
Kojto 93:e188a91d3eaa 497 /** @defgroup FMC_AsynchronousWait
Kojto 93:e188a91d3eaa 498 * @{
Kojto 93:e188a91d3eaa 499 */
Kojto 93:e188a91d3eaa 500 #define FMC_ASYNCHRONOUS_WAIT_DISABLE ((uint32_t)0x00000000)
Kojto 93:e188a91d3eaa 501 #define FMC_ASYNCHRONOUS_WAIT_ENABLE ((uint32_t)0x00008000)
Kojto 93:e188a91d3eaa 502
Kojto 93:e188a91d3eaa 503 #define IS_FMC_ASYNWAIT(STATE) (((STATE) == FMC_ASYNCHRONOUS_WAIT_DISABLE) || \
Kojto 93:e188a91d3eaa 504 ((STATE) == FMC_ASYNCHRONOUS_WAIT_ENABLE))
Kojto 93:e188a91d3eaa 505 /**
Kojto 93:e188a91d3eaa 506 * @}
Kojto 93:e188a91d3eaa 507 */
Kojto 93:e188a91d3eaa 508
Kojto 93:e188a91d3eaa 509 /** @defgroup FMC_Write_Burst
Kojto 93:e188a91d3eaa 510 * @{
Kojto 93:e188a91d3eaa 511 */
Kojto 93:e188a91d3eaa 512 #define FMC_WRITE_BURST_DISABLE ((uint32_t)0x00000000)
Kojto 93:e188a91d3eaa 513 #define FMC_WRITE_BURST_ENABLE ((uint32_t)0x00080000)
Kojto 93:e188a91d3eaa 514
Kojto 93:e188a91d3eaa 515 #define IS_FMC_WRITE_BURST(BURST) (((BURST) == FMC_WRITE_BURST_DISABLE) || \
Kojto 93:e188a91d3eaa 516 ((BURST) == FMC_WRITE_BURST_ENABLE))
Kojto 93:e188a91d3eaa 517 /**
Kojto 93:e188a91d3eaa 518 * @}
Kojto 93:e188a91d3eaa 519 */
Kojto 93:e188a91d3eaa 520
Kojto 93:e188a91d3eaa 521 /** @defgroup FMC_Continous_Clock
Kojto 93:e188a91d3eaa 522 * @{
Kojto 93:e188a91d3eaa 523 */
Kojto 93:e188a91d3eaa 524 #define FMC_CONTINUOUS_CLOCK_SYNC_ONLY ((uint32_t)0x00000000)
Kojto 93:e188a91d3eaa 525 #define FMC_CONTINUOUS_CLOCK_SYNC_ASYNC ((uint32_t)0x00100000)
Kojto 93:e188a91d3eaa 526
Kojto 93:e188a91d3eaa 527 #define IS_FMC_CONTINOUS_CLOCK(CCLOCK) (((CCLOCK) == FMC_CONTINUOUS_CLOCK_SYNC_ONLY) || \
Kojto 93:e188a91d3eaa 528 ((CCLOCK) == FMC_CONTINUOUS_CLOCK_SYNC_ASYNC))
Kojto 93:e188a91d3eaa 529 /**
Kojto 93:e188a91d3eaa 530 * @}
Kojto 93:e188a91d3eaa 531 */
Kojto 93:e188a91d3eaa 532
Kojto 93:e188a91d3eaa 533 /** @defgroup FMC_Address_Setup_Time
Kojto 93:e188a91d3eaa 534 * @{
Kojto 93:e188a91d3eaa 535 */
Kojto 93:e188a91d3eaa 536 #define IS_FMC_ADDRESS_SETUP_TIME(TIME) ((TIME) <= 15)
Kojto 93:e188a91d3eaa 537 /**
Kojto 93:e188a91d3eaa 538 * @}
Kojto 93:e188a91d3eaa 539 */
Kojto 93:e188a91d3eaa 540
Kojto 93:e188a91d3eaa 541 /** @defgroup FMC_Address_Hold_Time
Kojto 93:e188a91d3eaa 542 * @{
Kojto 93:e188a91d3eaa 543 */
Kojto 93:e188a91d3eaa 544 #define IS_FMC_ADDRESS_HOLD_TIME(TIME) (((TIME) > 0) && ((TIME) <= 15))
Kojto 93:e188a91d3eaa 545 /**
Kojto 93:e188a91d3eaa 546 * @}
Kojto 93:e188a91d3eaa 547 */
Kojto 93:e188a91d3eaa 548
Kojto 93:e188a91d3eaa 549 /** @defgroup FMC_Data_Setup_Time
Kojto 93:e188a91d3eaa 550 * @{
Kojto 93:e188a91d3eaa 551 */
Kojto 93:e188a91d3eaa 552 #define IS_FMC_DATASETUP_TIME(TIME) (((TIME) > 0) && ((TIME) <= 255))
Kojto 93:e188a91d3eaa 553 /**
Kojto 93:e188a91d3eaa 554 * @}
Kojto 93:e188a91d3eaa 555 */
Kojto 93:e188a91d3eaa 556
Kojto 93:e188a91d3eaa 557 /** @defgroup FMC_Bus_Turn_around_Duration
Kojto 93:e188a91d3eaa 558 * @{
Kojto 93:e188a91d3eaa 559 */
Kojto 93:e188a91d3eaa 560 #define IS_FMC_TURNAROUND_TIME(TIME) ((TIME) <= 15)
Kojto 93:e188a91d3eaa 561 /**
Kojto 93:e188a91d3eaa 562 * @}
Kojto 93:e188a91d3eaa 563 */
Kojto 93:e188a91d3eaa 564
Kojto 93:e188a91d3eaa 565 /** @defgroup FMC_CLK_Division
Kojto 93:e188a91d3eaa 566 * @{
Kojto 93:e188a91d3eaa 567 */
Kojto 93:e188a91d3eaa 568 #define IS_FMC_CLK_DIV(DIV) (((DIV) > 1) && ((DIV) <= 16))
Kojto 93:e188a91d3eaa 569 /**
Kojto 93:e188a91d3eaa 570 * @}
Kojto 93:e188a91d3eaa 571 */
Kojto 93:e188a91d3eaa 572
Kojto 93:e188a91d3eaa 573 /** @defgroup FMC_Data_Latency
Kojto 93:e188a91d3eaa 574 * @{
Kojto 93:e188a91d3eaa 575 */
Kojto 93:e188a91d3eaa 576 #define IS_FMC_DATA_LATENCY(LATENCY) (((LATENCY) > 1) && ((LATENCY) <= 17))
Kojto 93:e188a91d3eaa 577 /**
Kojto 93:e188a91d3eaa 578 * @}
Kojto 93:e188a91d3eaa 579 */
Kojto 93:e188a91d3eaa 580
Kojto 93:e188a91d3eaa 581 /** @defgroup FMC_Access_Mode
Kojto 93:e188a91d3eaa 582 * @{
Kojto 93:e188a91d3eaa 583 */
Kojto 93:e188a91d3eaa 584 #define FMC_ACCESS_MODE_A ((uint32_t)0x00000000)
Kojto 93:e188a91d3eaa 585 #define FMC_ACCESS_MODE_B ((uint32_t)0x10000000)
Kojto 93:e188a91d3eaa 586 #define FMC_ACCESS_MODE_C ((uint32_t)0x20000000)
Kojto 93:e188a91d3eaa 587 #define FMC_ACCESS_MODE_D ((uint32_t)0x30000000)
Kojto 93:e188a91d3eaa 588
Kojto 93:e188a91d3eaa 589 #define IS_FMC_ACCESS_MODE(MODE) (((MODE) == FMC_ACCESS_MODE_A) || \
Kojto 93:e188a91d3eaa 590 ((MODE) == FMC_ACCESS_MODE_B) || \
Kojto 93:e188a91d3eaa 591 ((MODE) == FMC_ACCESS_MODE_C) || \
Kojto 93:e188a91d3eaa 592 ((MODE) == FMC_ACCESS_MODE_D))
Kojto 93:e188a91d3eaa 593 /**
Kojto 93:e188a91d3eaa 594 * @}
Kojto 93:e188a91d3eaa 595 */
Kojto 93:e188a91d3eaa 596
Kojto 93:e188a91d3eaa 597 /**
Kojto 93:e188a91d3eaa 598 * @}
Kojto 93:e188a91d3eaa 599 */
Kojto 93:e188a91d3eaa 600
Kojto 93:e188a91d3eaa 601 /** @defgroup FMC_NAND_Controller
Kojto 93:e188a91d3eaa 602 * @{
Kojto 93:e188a91d3eaa 603 */
Kojto 93:e188a91d3eaa 604
Kojto 93:e188a91d3eaa 605 /** @defgroup FMC_NAND_Bank
Kojto 93:e188a91d3eaa 606 * @{
Kojto 93:e188a91d3eaa 607 */
Kojto 93:e188a91d3eaa 608 #define FMC_NAND_BANK2 ((uint32_t)0x00000010)
Kojto 93:e188a91d3eaa 609 #define FMC_NAND_BANK3 ((uint32_t)0x00000100)
Kojto 93:e188a91d3eaa 610
Kojto 93:e188a91d3eaa 611 #define IS_FMC_NAND_BANK(BANK) (((BANK) == FMC_NAND_BANK2) || \
Kojto 93:e188a91d3eaa 612 ((BANK) == FMC_NAND_BANK3))
Kojto 93:e188a91d3eaa 613 /**
Kojto 93:e188a91d3eaa 614 * @}
Kojto 93:e188a91d3eaa 615 */
Kojto 93:e188a91d3eaa 616
Kojto 93:e188a91d3eaa 617 /** @defgroup FMC_Wait_feature
Kojto 93:e188a91d3eaa 618 * @{
Kojto 93:e188a91d3eaa 619 */
Kojto 93:e188a91d3eaa 620 #define FMC_NAND_PCC_WAIT_FEATURE_DISABLE ((uint32_t)0x00000000)
Kojto 93:e188a91d3eaa 621 #define FMC_NAND_PCC_WAIT_FEATURE_ENABLE ((uint32_t)0x00000002)
Kojto 93:e188a91d3eaa 622
Kojto 93:e188a91d3eaa 623 #define IS_FMC_WAIT_FEATURE(FEATURE) (((FEATURE) == FMC_NAND_PCC_WAIT_FEATURE_DISABLE) || \
Kojto 93:e188a91d3eaa 624 ((FEATURE) == FMC_NAND_PCC_WAIT_FEATURE_ENABLE))
Kojto 93:e188a91d3eaa 625 /**
Kojto 93:e188a91d3eaa 626 * @}
Kojto 93:e188a91d3eaa 627 */
Kojto 93:e188a91d3eaa 628
Kojto 93:e188a91d3eaa 629 /** @defgroup FMC_PCR_Memory_Type
Kojto 93:e188a91d3eaa 630 * @{
Kojto 93:e188a91d3eaa 631 */
Kojto 93:e188a91d3eaa 632 #define FMC_PCR_MEMORY_TYPE_PCCARD ((uint32_t)0x00000000)
Kojto 93:e188a91d3eaa 633 #define FMC_PCR_MEMORY_TYPE_NAND ((uint32_t)0x00000008)
Kojto 93:e188a91d3eaa 634 /**
Kojto 93:e188a91d3eaa 635 * @}
Kojto 93:e188a91d3eaa 636 */
Kojto 93:e188a91d3eaa 637
Kojto 93:e188a91d3eaa 638 /** @defgroup FMC_NAND_Data_Width
Kojto 93:e188a91d3eaa 639 * @{
Kojto 93:e188a91d3eaa 640 */
Kojto 93:e188a91d3eaa 641 #define FMC_NAND_PCC_MEM_BUS_WIDTH_8 ((uint32_t)0x00000000)
Kojto 93:e188a91d3eaa 642 #define FMC_NAND_PCC_MEM_BUS_WIDTH_16 ((uint32_t)0x00000010)
Kojto 93:e188a91d3eaa 643
Kojto 93:e188a91d3eaa 644 #define IS_FMC_NAND_MEMORY_WIDTH(WIDTH) (((WIDTH) == FMC_NAND_PCC_MEM_BUS_WIDTH_8) || \
Kojto 93:e188a91d3eaa 645 ((WIDTH) == FMC_NAND_PCC_MEM_BUS_WIDTH_16))
Kojto 93:e188a91d3eaa 646 /**
Kojto 93:e188a91d3eaa 647 * @}
Kojto 93:e188a91d3eaa 648 */
Kojto 93:e188a91d3eaa 649
Kojto 93:e188a91d3eaa 650 /** @defgroup FMC_ECC
Kojto 93:e188a91d3eaa 651 * @{
Kojto 93:e188a91d3eaa 652 */
Kojto 93:e188a91d3eaa 653 #define FMC_NAND_ECC_DISABLE ((uint32_t)0x00000000)
Kojto 93:e188a91d3eaa 654 #define FMC_NAND_ECC_ENABLE ((uint32_t)0x00000040)
Kojto 93:e188a91d3eaa 655
Kojto 93:e188a91d3eaa 656 #define IS_FMC_ECC_STATE(STATE) (((STATE) == FMC_NAND_ECC_DISABLE) || \
Kojto 93:e188a91d3eaa 657 ((STATE) == FMC_NAND_ECC_ENABLE))
Kojto 93:e188a91d3eaa 658 /**
Kojto 93:e188a91d3eaa 659 * @}
Kojto 93:e188a91d3eaa 660 */
Kojto 93:e188a91d3eaa 661
Kojto 93:e188a91d3eaa 662 /** @defgroup FMC_ECC_Page_Size
Kojto 93:e188a91d3eaa 663 * @{
Kojto 93:e188a91d3eaa 664 */
Kojto 93:e188a91d3eaa 665 #define FMC_NAND_ECC_PAGE_SIZE_256BYTE ((uint32_t)0x00000000)
Kojto 93:e188a91d3eaa 666 #define FMC_NAND_ECC_PAGE_SIZE_512BYTE ((uint32_t)0x00020000)
Kojto 93:e188a91d3eaa 667 #define FMC_NAND_ECC_PAGE_SIZE_1024BYTE ((uint32_t)0x00040000)
Kojto 93:e188a91d3eaa 668 #define FMC_NAND_ECC_PAGE_SIZE_2048BYTE ((uint32_t)0x00060000)
Kojto 93:e188a91d3eaa 669 #define FMC_NAND_ECC_PAGE_SIZE_4096BYTE ((uint32_t)0x00080000)
Kojto 93:e188a91d3eaa 670 #define FMC_NAND_ECC_PAGE_SIZE_8192BYTE ((uint32_t)0x000A0000)
Kojto 93:e188a91d3eaa 671
Kojto 93:e188a91d3eaa 672 #define IS_FMC_ECCPAGE_SIZE(SIZE) (((SIZE) == FMC_NAND_ECC_PAGE_SIZE_256BYTE) || \
Kojto 93:e188a91d3eaa 673 ((SIZE) == FMC_NAND_ECC_PAGE_SIZE_512BYTE) || \
Kojto 93:e188a91d3eaa 674 ((SIZE) == FMC_NAND_ECC_PAGE_SIZE_1024BYTE) || \
Kojto 93:e188a91d3eaa 675 ((SIZE) == FMC_NAND_ECC_PAGE_SIZE_2048BYTE) || \
Kojto 93:e188a91d3eaa 676 ((SIZE) == FMC_NAND_ECC_PAGE_SIZE_4096BYTE) || \
Kojto 93:e188a91d3eaa 677 ((SIZE) == FMC_NAND_ECC_PAGE_SIZE_8192BYTE))
Kojto 93:e188a91d3eaa 678 /**
Kojto 93:e188a91d3eaa 679 * @}
Kojto 93:e188a91d3eaa 680 */
Kojto 93:e188a91d3eaa 681
Kojto 93:e188a91d3eaa 682 /** @defgroup FMC_TCLR_Setup_Time
Kojto 93:e188a91d3eaa 683 * @{
Kojto 93:e188a91d3eaa 684 */
Kojto 93:e188a91d3eaa 685 #define IS_FMC_TCLR_TIME(TIME) ((TIME) <= 255)
Kojto 93:e188a91d3eaa 686 /**
Kojto 93:e188a91d3eaa 687 * @}
Kojto 93:e188a91d3eaa 688 */
Kojto 93:e188a91d3eaa 689
Kojto 93:e188a91d3eaa 690 /** @defgroup FMC_TAR_Setup_Time
Kojto 93:e188a91d3eaa 691 * @{
Kojto 93:e188a91d3eaa 692 */
Kojto 93:e188a91d3eaa 693 #define IS_FMC_TAR_TIME(TIME) ((TIME) <= 255)
Kojto 93:e188a91d3eaa 694 /**
Kojto 93:e188a91d3eaa 695 * @}
Kojto 93:e188a91d3eaa 696 */
Kojto 93:e188a91d3eaa 697
Kojto 93:e188a91d3eaa 698 /** @defgroup FMC_Setup_Time
Kojto 93:e188a91d3eaa 699 * @{
Kojto 93:e188a91d3eaa 700 */
Kojto 93:e188a91d3eaa 701 #define IS_FMC_SETUP_TIME(TIME) ((TIME) <= 255)
Kojto 93:e188a91d3eaa 702 /**
Kojto 93:e188a91d3eaa 703 * @}
Kojto 93:e188a91d3eaa 704 */
Kojto 93:e188a91d3eaa 705
Kojto 93:e188a91d3eaa 706 /** @defgroup FMC_Wait_Setup_Time
Kojto 93:e188a91d3eaa 707 * @{
Kojto 93:e188a91d3eaa 708 */
Kojto 93:e188a91d3eaa 709 #define IS_FMC_WAIT_TIME(TIME) ((TIME) <= 255)
Kojto 93:e188a91d3eaa 710 /**
Kojto 93:e188a91d3eaa 711 * @}
Kojto 93:e188a91d3eaa 712 */
Kojto 93:e188a91d3eaa 713
Kojto 93:e188a91d3eaa 714 /** @defgroup FMC_Hold_Setup_Time
Kojto 93:e188a91d3eaa 715 * @{
Kojto 93:e188a91d3eaa 716 */
Kojto 93:e188a91d3eaa 717 #define IS_FMC_HOLD_TIME(TIME) ((TIME) <= 255)
Kojto 93:e188a91d3eaa 718 /**
Kojto 93:e188a91d3eaa 719 * @}
Kojto 93:e188a91d3eaa 720 */
Kojto 93:e188a91d3eaa 721
Kojto 93:e188a91d3eaa 722 /** @defgroup FMC_HiZ_Setup_Time
Kojto 93:e188a91d3eaa 723 * @{
Kojto 93:e188a91d3eaa 724 */
Kojto 93:e188a91d3eaa 725 #define IS_FMC_HIZ_TIME(TIME) ((TIME) <= 255)
Kojto 93:e188a91d3eaa 726 /**
Kojto 93:e188a91d3eaa 727 * @}
Kojto 93:e188a91d3eaa 728 */
Kojto 93:e188a91d3eaa 729
Kojto 93:e188a91d3eaa 730 /**
Kojto 93:e188a91d3eaa 731 * @}
Kojto 93:e188a91d3eaa 732 */
Kojto 93:e188a91d3eaa 733
Kojto 93:e188a91d3eaa 734 /** @defgroup FMC_SDRAM_Controller
Kojto 93:e188a91d3eaa 735 * @{
Kojto 93:e188a91d3eaa 736 */
Kojto 93:e188a91d3eaa 737
Kojto 93:e188a91d3eaa 738 /** @defgroup FMC_SDRAM_Bank
Kojto 93:e188a91d3eaa 739 * @{
Kojto 93:e188a91d3eaa 740 */
Kojto 93:e188a91d3eaa 741 #define FMC_SDRAM_BANK1 ((uint32_t)0x00000000)
Kojto 93:e188a91d3eaa 742 #define FMC_SDRAM_BANK2 ((uint32_t)0x00000001)
Kojto 93:e188a91d3eaa 743
Kojto 93:e188a91d3eaa 744 #define IS_FMC_SDRAM_BANK(BANK) (((BANK) == FMC_SDRAM_BANK1) || \
Kojto 93:e188a91d3eaa 745 ((BANK) == FMC_SDRAM_BANK2))
Kojto 93:e188a91d3eaa 746 /**
Kojto 93:e188a91d3eaa 747 * @}
Kojto 93:e188a91d3eaa 748 */
Kojto 93:e188a91d3eaa 749
Kojto 93:e188a91d3eaa 750 /** @defgroup FMC_SDRAM_Column_Bits_number
Kojto 93:e188a91d3eaa 751 * @{
Kojto 93:e188a91d3eaa 752 */
Kojto 93:e188a91d3eaa 753 #define FMC_SDRAM_COLUMN_BITS_NUM_8 ((uint32_t)0x00000000)
Kojto 93:e188a91d3eaa 754 #define FMC_SDRAM_COLUMN_BITS_NUM_9 ((uint32_t)0x00000001)
Kojto 93:e188a91d3eaa 755 #define FMC_SDRAM_COLUMN_BITS_NUM_10 ((uint32_t)0x00000002)
Kojto 93:e188a91d3eaa 756 #define FMC_SDRAM_COLUMN_BITS_NUM_11 ((uint32_t)0x00000003)
Kojto 93:e188a91d3eaa 757
Kojto 93:e188a91d3eaa 758 #define IS_FMC_COLUMNBITS_NUMBER(COLUMN) (((COLUMN) == FMC_SDRAM_COLUMN_BITS_NUM_8) || \
Kojto 93:e188a91d3eaa 759 ((COLUMN) == FMC_SDRAM_COLUMN_BITS_NUM_9) || \
Kojto 93:e188a91d3eaa 760 ((COLUMN) == FMC_SDRAM_COLUMN_BITS_NUM_10) || \
Kojto 93:e188a91d3eaa 761 ((COLUMN) == FMC_SDRAM_COLUMN_BITS_NUM_11))
Kojto 93:e188a91d3eaa 762 /**
Kojto 93:e188a91d3eaa 763 * @}
Kojto 93:e188a91d3eaa 764 */
Kojto 93:e188a91d3eaa 765
Kojto 93:e188a91d3eaa 766 /** @defgroup FMC_SDRAM_Row_Bits_number
Kojto 93:e188a91d3eaa 767 * @{
Kojto 93:e188a91d3eaa 768 */
Kojto 93:e188a91d3eaa 769 #define FMC_SDRAM_ROW_BITS_NUM_11 ((uint32_t)0x00000000)
Kojto 93:e188a91d3eaa 770 #define FMC_SDRAM_ROW_BITS_NUM_12 ((uint32_t)0x00000004)
Kojto 93:e188a91d3eaa 771 #define FMC_SDRAM_ROW_BITS_NUM_13 ((uint32_t)0x00000008)
Kojto 93:e188a91d3eaa 772
Kojto 93:e188a91d3eaa 773 #define IS_FMC_ROWBITS_NUMBER(ROW) (((ROW) == FMC_SDRAM_ROW_BITS_NUM_11) || \
Kojto 93:e188a91d3eaa 774 ((ROW) == FMC_SDRAM_ROW_BITS_NUM_12) || \
Kojto 93:e188a91d3eaa 775 ((ROW) == FMC_SDRAM_ROW_BITS_NUM_13))
Kojto 93:e188a91d3eaa 776 /**
Kojto 93:e188a91d3eaa 777 * @}
Kojto 93:e188a91d3eaa 778 */
Kojto 93:e188a91d3eaa 779
Kojto 93:e188a91d3eaa 780 /** @defgroup FMC_SDRAM_Memory_Bus_Width
Kojto 93:e188a91d3eaa 781 * @{
Kojto 93:e188a91d3eaa 782 */
Kojto 93:e188a91d3eaa 783 #define FMC_SDRAM_MEM_BUS_WIDTH_8 ((uint32_t)0x00000000)
Kojto 93:e188a91d3eaa 784 #define FMC_SDRAM_MEM_BUS_WIDTH_16 ((uint32_t)0x00000010)
Kojto 93:e188a91d3eaa 785 #define FMC_SDRAM_MEM_BUS_WIDTH_32 ((uint32_t)0x00000020)
Kojto 93:e188a91d3eaa 786
Kojto 93:e188a91d3eaa 787 #define IS_FMC_SDMEMORY_WIDTH(WIDTH) (((WIDTH) == FMC_SDRAM_MEM_BUS_WIDTH_8) || \
Kojto 93:e188a91d3eaa 788 ((WIDTH) == FMC_SDRAM_MEM_BUS_WIDTH_16) || \
Kojto 93:e188a91d3eaa 789 ((WIDTH) == FMC_SDRAM_MEM_BUS_WIDTH_32))
Kojto 93:e188a91d3eaa 790 /**
Kojto 93:e188a91d3eaa 791 * @}
Kojto 93:e188a91d3eaa 792 */
Kojto 93:e188a91d3eaa 793
Kojto 93:e188a91d3eaa 794 /** @defgroup FMC_SDRAM_Internal_Banks_Number
Kojto 93:e188a91d3eaa 795 * @{
Kojto 93:e188a91d3eaa 796 */
Kojto 93:e188a91d3eaa 797 #define FMC_SDRAM_INTERN_BANKS_NUM_2 ((uint32_t)0x00000000)
Kojto 93:e188a91d3eaa 798 #define FMC_SDRAM_INTERN_BANKS_NUM_4 ((uint32_t)0x00000040)
Kojto 93:e188a91d3eaa 799
Kojto 93:e188a91d3eaa 800 #define IS_FMC_INTERNALBANK_NUMBER(NUMBER) (((NUMBER) == FMC_SDRAM_INTERN_BANKS_NUM_2) || \
Kojto 93:e188a91d3eaa 801 ((NUMBER) == FMC_SDRAM_INTERN_BANKS_NUM_4))
Kojto 93:e188a91d3eaa 802 /**
Kojto 93:e188a91d3eaa 803 * @}
Kojto 93:e188a91d3eaa 804 */
Kojto 93:e188a91d3eaa 805
Kojto 93:e188a91d3eaa 806 /** @defgroup FMC_SDRAM_CAS_Latency
Kojto 93:e188a91d3eaa 807 * @{
Kojto 93:e188a91d3eaa 808 */
Kojto 93:e188a91d3eaa 809 #define FMC_SDRAM_CAS_LATENCY_1 ((uint32_t)0x00000080)
Kojto 93:e188a91d3eaa 810 #define FMC_SDRAM_CAS_LATENCY_2 ((uint32_t)0x00000100)
Kojto 93:e188a91d3eaa 811 #define FMC_SDRAM_CAS_LATENCY_3 ((uint32_t)0x00000180)
Kojto 93:e188a91d3eaa 812
Kojto 93:e188a91d3eaa 813 #define IS_FMC_CAS_LATENCY(LATENCY) (((LATENCY) == FMC_SDRAM_CAS_LATENCY_1) || \
Kojto 93:e188a91d3eaa 814 ((LATENCY) == FMC_SDRAM_CAS_LATENCY_2) || \
Kojto 93:e188a91d3eaa 815 ((LATENCY) == FMC_SDRAM_CAS_LATENCY_3))
Kojto 93:e188a91d3eaa 816 /**
Kojto 93:e188a91d3eaa 817 * @}
Kojto 93:e188a91d3eaa 818 */
Kojto 93:e188a91d3eaa 819
Kojto 93:e188a91d3eaa 820 /** @defgroup FMC_SDRAM_Write_Protection
Kojto 93:e188a91d3eaa 821 * @{
Kojto 93:e188a91d3eaa 822 */
Kojto 93:e188a91d3eaa 823 #define FMC_SDRAM_WRITE_PROTECTION_DISABLE ((uint32_t)0x00000000)
Kojto 93:e188a91d3eaa 824 #define FMC_SDRAM_WRITE_PROTECTION_ENABLE ((uint32_t)0x00000200)
Kojto 93:e188a91d3eaa 825
Kojto 93:e188a91d3eaa 826 #define IS_FMC_WRITE_PROTECTION(WRITE) (((WRITE) == FMC_SDRAM_WRITE_PROTECTION_DISABLE) || \
Kojto 93:e188a91d3eaa 827 ((WRITE) == FMC_SDRAM_WRITE_PROTECTION_ENABLE))
Kojto 93:e188a91d3eaa 828 /**
Kojto 93:e188a91d3eaa 829 * @}
Kojto 93:e188a91d3eaa 830 */
Kojto 93:e188a91d3eaa 831
Kojto 93:e188a91d3eaa 832 /** @defgroup FMC_SDRAM_Clock_Period
Kojto 93:e188a91d3eaa 833 * @{
Kojto 93:e188a91d3eaa 834 */
Kojto 93:e188a91d3eaa 835 #define FMC_SDRAM_CLOCK_DISABLE ((uint32_t)0x00000000)
Kojto 93:e188a91d3eaa 836 #define FMC_SDRAM_CLOCK_PERIOD_2 ((uint32_t)0x00000800)
Kojto 93:e188a91d3eaa 837 #define FMC_SDRAM_CLOCK_PERIOD_3 ((uint32_t)0x00000C00)
Kojto 93:e188a91d3eaa 838
Kojto 93:e188a91d3eaa 839 #define IS_FMC_SDCLOCK_PERIOD(PERIOD) (((PERIOD) == FMC_SDRAM_CLOCK_DISABLE) || \
Kojto 93:e188a91d3eaa 840 ((PERIOD) == FMC_SDRAM_CLOCK_PERIOD_2) || \
Kojto 93:e188a91d3eaa 841 ((PERIOD) == FMC_SDRAM_CLOCK_PERIOD_3))
Kojto 93:e188a91d3eaa 842 /**
Kojto 93:e188a91d3eaa 843 * @}
Kojto 93:e188a91d3eaa 844 */
Kojto 93:e188a91d3eaa 845
Kojto 93:e188a91d3eaa 846 /** @defgroup FMC_SDRAM_Read_Burst
Kojto 93:e188a91d3eaa 847 * @{
Kojto 93:e188a91d3eaa 848 */
Kojto 93:e188a91d3eaa 849 #define FMC_SDRAM_RBURST_DISABLE ((uint32_t)0x00000000)
Kojto 93:e188a91d3eaa 850 #define FMC_SDRAM_RBURST_ENABLE ((uint32_t)0x00001000)
Kojto 93:e188a91d3eaa 851
Kojto 93:e188a91d3eaa 852 #define IS_FMC_READ_BURST(RBURST) (((RBURST) == FMC_SDRAM_RBURST_DISABLE) || \
Kojto 93:e188a91d3eaa 853 ((RBURST) == FMC_SDRAM_RBURST_ENABLE))
Kojto 93:e188a91d3eaa 854 /**
Kojto 93:e188a91d3eaa 855 * @}
Kojto 93:e188a91d3eaa 856 */
Kojto 93:e188a91d3eaa 857
Kojto 93:e188a91d3eaa 858 /** @defgroup FMC_SDRAM_Read_Pipe_Delay
Kojto 93:e188a91d3eaa 859 * @{
Kojto 93:e188a91d3eaa 860 */
Kojto 93:e188a91d3eaa 861 #define FMC_SDRAM_RPIPE_DELAY_0 ((uint32_t)0x00000000)
Kojto 93:e188a91d3eaa 862 #define FMC_SDRAM_RPIPE_DELAY_1 ((uint32_t)0x00002000)
Kojto 93:e188a91d3eaa 863 #define FMC_SDRAM_RPIPE_DELAY_2 ((uint32_t)0x00004000)
Kojto 93:e188a91d3eaa 864
Kojto 93:e188a91d3eaa 865 #define IS_FMC_READPIPE_DELAY(DELAY) (((DELAY) == FMC_SDRAM_RPIPE_DELAY_0) || \
Kojto 93:e188a91d3eaa 866 ((DELAY) == FMC_SDRAM_RPIPE_DELAY_1) || \
Kojto 93:e188a91d3eaa 867 ((DELAY) == FMC_SDRAM_RPIPE_DELAY_2))
Kojto 93:e188a91d3eaa 868 /**
Kojto 93:e188a91d3eaa 869 * @}
Kojto 93:e188a91d3eaa 870 */
Kojto 93:e188a91d3eaa 871
Kojto 93:e188a91d3eaa 872 /** @defgroup FMC_SDRAM_LoadToActive_Delay
Kojto 93:e188a91d3eaa 873 * @{
Kojto 93:e188a91d3eaa 874 */
Kojto 93:e188a91d3eaa 875 #define IS_FMC_LOADTOACTIVE_DELAY(DELAY) (((DELAY) > 0) && ((DELAY) <= 16))
Kojto 93:e188a91d3eaa 876 /**
Kojto 93:e188a91d3eaa 877 * @}
Kojto 93:e188a91d3eaa 878 */
Kojto 93:e188a91d3eaa 879
Kojto 93:e188a91d3eaa 880 /** @defgroup FMC_SDRAM_ExitSelfRefresh_Delay
Kojto 93:e188a91d3eaa 881 * @{
Kojto 93:e188a91d3eaa 882 */
Kojto 93:e188a91d3eaa 883 #define IS_FMC_EXITSELFREFRESH_DELAY(DELAY) (((DELAY) > 0) && ((DELAY) <= 16))
Kojto 93:e188a91d3eaa 884 /**
Kojto 93:e188a91d3eaa 885 * @}
Kojto 93:e188a91d3eaa 886 */
Kojto 93:e188a91d3eaa 887
Kojto 93:e188a91d3eaa 888 /** @defgroup FMC_SDRAM_SelfRefresh_Time
Kojto 93:e188a91d3eaa 889 * @{
Kojto 93:e188a91d3eaa 890 */
Kojto 93:e188a91d3eaa 891 #define IS_FMC_SELFREFRESH_TIME(TIME) (((TIME) > 0) && ((TIME) <= 16))
Kojto 93:e188a91d3eaa 892 /**
Kojto 93:e188a91d3eaa 893 * @}
Kojto 93:e188a91d3eaa 894 */
Kojto 93:e188a91d3eaa 895
Kojto 93:e188a91d3eaa 896 /** @defgroup FMC_SDRAM_RowCycle_Delay
Kojto 93:e188a91d3eaa 897 * @{
Kojto 93:e188a91d3eaa 898 */
Kojto 93:e188a91d3eaa 899 #define IS_FMC_ROWCYCLE_DELAY(DELAY) (((DELAY) > 0) && ((DELAY) <= 16))
Kojto 93:e188a91d3eaa 900 /**
Kojto 93:e188a91d3eaa 901 * @}
Kojto 93:e188a91d3eaa 902 */
Kojto 93:e188a91d3eaa 903
Kojto 93:e188a91d3eaa 904 /** @defgroup FMC_SDRAM_Write_Recovery_Time
Kojto 93:e188a91d3eaa 905 * @{
Kojto 93:e188a91d3eaa 906 */
Kojto 93:e188a91d3eaa 907 #define IS_FMC_WRITE_RECOVERY_TIME(TIME) (((TIME) > 0) && ((TIME) <= 16))
Kojto 93:e188a91d3eaa 908 /**
Kojto 93:e188a91d3eaa 909 * @}
Kojto 93:e188a91d3eaa 910 */
Kojto 93:e188a91d3eaa 911
Kojto 93:e188a91d3eaa 912 /** @defgroup FMC_SDRAM_RP_Delay
Kojto 93:e188a91d3eaa 913 * @{
Kojto 93:e188a91d3eaa 914 */
Kojto 93:e188a91d3eaa 915 #define IS_FMC_RP_DELAY(DELAY) (((DELAY) > 0) && ((DELAY) <= 16))
Kojto 93:e188a91d3eaa 916 /**
Kojto 93:e188a91d3eaa 917 * @}
Kojto 93:e188a91d3eaa 918 */
Kojto 93:e188a91d3eaa 919
Kojto 93:e188a91d3eaa 920 /** @defgroup FMC_SDRAM_RCD_Delay
Kojto 93:e188a91d3eaa 921 * @{
Kojto 93:e188a91d3eaa 922 */
Kojto 93:e188a91d3eaa 923 #define IS_FMC_RCD_DELAY(DELAY) (((DELAY) > 0) && ((DELAY) <= 16))
Kojto 93:e188a91d3eaa 924
Kojto 93:e188a91d3eaa 925 /**
Kojto 93:e188a91d3eaa 926 * @}
Kojto 93:e188a91d3eaa 927 */
Kojto 93:e188a91d3eaa 928
Kojto 93:e188a91d3eaa 929 /** @defgroup FMC_SDRAM_Command_Mode
Kojto 93:e188a91d3eaa 930 * @{
Kojto 93:e188a91d3eaa 931 */
Kojto 93:e188a91d3eaa 932 #define FMC_SDRAM_CMD_NORMAL_MODE ((uint32_t)0x00000000)
Kojto 93:e188a91d3eaa 933 #define FMC_SDRAM_CMD_CLK_ENABLE ((uint32_t)0x00000001)
Kojto 93:e188a91d3eaa 934 #define FMC_SDRAM_CMD_PALL ((uint32_t)0x00000002)
Kojto 93:e188a91d3eaa 935 #define FMC_SDRAM_CMD_AUTOREFRESH_MODE ((uint32_t)0x00000003)
Kojto 93:e188a91d3eaa 936 #define FMC_SDRAM_CMD_LOAD_MODE ((uint32_t)0x00000004)
Kojto 93:e188a91d3eaa 937 #define FMC_SDRAM_CMD_SELFREFRESH_MODE ((uint32_t)0x00000005)
Kojto 93:e188a91d3eaa 938 #define FMC_SDRAM_CMD_POWERDOWN_MODE ((uint32_t)0x00000006)
Kojto 93:e188a91d3eaa 939
Kojto 93:e188a91d3eaa 940 #define IS_FMC_COMMAND_MODE(COMMAND) (((COMMAND) == FMC_SDRAM_CMD_NORMAL_MODE) || \
Kojto 93:e188a91d3eaa 941 ((COMMAND) == FMC_SDRAM_CMD_CLK_ENABLE) || \
Kojto 93:e188a91d3eaa 942 ((COMMAND) == FMC_SDRAM_CMD_PALL) || \
Kojto 93:e188a91d3eaa 943 ((COMMAND) == FMC_SDRAM_CMD_AUTOREFRESH_MODE) || \
Kojto 93:e188a91d3eaa 944 ((COMMAND) == FMC_SDRAM_CMD_LOAD_MODE) || \
Kojto 93:e188a91d3eaa 945 ((COMMAND) == FMC_SDRAM_CMD_SELFREFRESH_MODE) || \
Kojto 93:e188a91d3eaa 946 ((COMMAND) == FMC_SDRAM_CMD_POWERDOWN_MODE))
Kojto 93:e188a91d3eaa 947 /**
Kojto 93:e188a91d3eaa 948 * @}
Kojto 93:e188a91d3eaa 949 */
Kojto 93:e188a91d3eaa 950
Kojto 93:e188a91d3eaa 951 /** @defgroup FMC_SDRAM_Command_Target
Kojto 93:e188a91d3eaa 952 * @{
Kojto 93:e188a91d3eaa 953 */
Kojto 93:e188a91d3eaa 954 #define FMC_SDRAM_CMD_TARGET_BANK2 FMC_SDCMR_CTB2
Kojto 93:e188a91d3eaa 955 #define FMC_SDRAM_CMD_TARGET_BANK1 FMC_SDCMR_CTB1
Kojto 93:e188a91d3eaa 956 #define FMC_SDRAM_CMD_TARGET_BANK1_2 ((uint32_t)0x00000018)
Kojto 93:e188a91d3eaa 957
Kojto 93:e188a91d3eaa 958 #define IS_FMC_COMMAND_TARGET(TARGET) (((TARGET) == FMC_SDRAM_CMD_TARGET_BANK1) || \
Kojto 93:e188a91d3eaa 959 ((TARGET) == FMC_SDRAM_CMD_TARGET_BANK2) || \
Kojto 93:e188a91d3eaa 960 ((TARGET) == FMC_SDRAM_CMD_TARGET_BANK1_2))
Kojto 93:e188a91d3eaa 961 /**
Kojto 93:e188a91d3eaa 962 * @}
Kojto 93:e188a91d3eaa 963 */
Kojto 93:e188a91d3eaa 964
Kojto 93:e188a91d3eaa 965 /** @defgroup FMC_SDRAM_AutoRefresh_Number
Kojto 93:e188a91d3eaa 966 * @{
Kojto 93:e188a91d3eaa 967 */
Kojto 93:e188a91d3eaa 968 #define IS_FMC_AUTOREFRESH_NUMBER(NUMBER) (((NUMBER) > 0) && ((NUMBER) <= 16))
Kojto 93:e188a91d3eaa 969 /**
Kojto 93:e188a91d3eaa 970 * @}
Kojto 93:e188a91d3eaa 971 */
Kojto 93:e188a91d3eaa 972
Kojto 93:e188a91d3eaa 973 /** @defgroup FMC_SDRAM_ModeRegister_Definition
Kojto 93:e188a91d3eaa 974 * @{
Kojto 93:e188a91d3eaa 975 */
Kojto 93:e188a91d3eaa 976 #define IS_FMC_MODE_REGISTER(CONTENT) ((CONTENT) <= 8191)
Kojto 93:e188a91d3eaa 977 /**
Kojto 93:e188a91d3eaa 978 * @}
Kojto 93:e188a91d3eaa 979 */
Kojto 93:e188a91d3eaa 980
Kojto 93:e188a91d3eaa 981 /** @defgroup FMC_SDRAM_Refresh_rate
Kojto 93:e188a91d3eaa 982 * @{
Kojto 93:e188a91d3eaa 983 */
Kojto 93:e188a91d3eaa 984 #define IS_FMC_REFRESH_RATE(RATE) ((RATE) <= 8191)
Kojto 93:e188a91d3eaa 985 /**
Kojto 93:e188a91d3eaa 986 * @}
Kojto 93:e188a91d3eaa 987 */
Kojto 93:e188a91d3eaa 988
Kojto 93:e188a91d3eaa 989 /** @defgroup FMC_SDRAM_Mode_Status
Kojto 93:e188a91d3eaa 990 * @{
Kojto 93:e188a91d3eaa 991 */
Kojto 93:e188a91d3eaa 992 #define FMC_SDRAM_NORMAL_MODE ((uint32_t)0x00000000)
Kojto 93:e188a91d3eaa 993 #define FMC_SDRAM_SELF_REFRESH_MODE FMC_SDSR_MODES1_0
Kojto 93:e188a91d3eaa 994 #define FMC_SDRAM_POWER_DOWN_MODE FMC_SDSR_MODES1_1
Kojto 93:e188a91d3eaa 995 /**
Kojto 93:e188a91d3eaa 996 * @}
Kojto 93:e188a91d3eaa 997 */
Kojto 93:e188a91d3eaa 998
Kojto 93:e188a91d3eaa 999 /** @defgroup FMC_NORSRAM_Device_Instance
Kojto 93:e188a91d3eaa 1000 * @{
Kojto 93:e188a91d3eaa 1001 */
Kojto 93:e188a91d3eaa 1002 #define IS_FMC_NORSRAM_DEVICE(INSTANCE) ((INSTANCE) == FMC_NORSRAM_DEVICE)
Kojto 93:e188a91d3eaa 1003 /**
Kojto 93:e188a91d3eaa 1004 * @}
Kojto 93:e188a91d3eaa 1005 */
Kojto 93:e188a91d3eaa 1006
Kojto 93:e188a91d3eaa 1007 /** @defgroup FMC_NORSRAM_EXTENDED_Device_Instance
Kojto 93:e188a91d3eaa 1008 * @{
Kojto 93:e188a91d3eaa 1009 */
Kojto 93:e188a91d3eaa 1010 #define IS_FMC_NORSRAM_EXTENDED_DEVICE(INSTANCE) ((INSTANCE) == FMC_NORSRAM_EXTENDED_DEVICE)
Kojto 93:e188a91d3eaa 1011 /**
Kojto 93:e188a91d3eaa 1012 * @}
Kojto 93:e188a91d3eaa 1013 */
Kojto 93:e188a91d3eaa 1014
Kojto 93:e188a91d3eaa 1015 /** @defgroup FMC_NAND_Device_Instance
Kojto 93:e188a91d3eaa 1016 * @{
Kojto 93:e188a91d3eaa 1017 */
Kojto 93:e188a91d3eaa 1018 #define IS_FMC_NAND_DEVICE(INSTANCE) ((INSTANCE) == FMC_NAND_DEVICE)
Kojto 93:e188a91d3eaa 1019 /**
Kojto 93:e188a91d3eaa 1020 * @}
Kojto 93:e188a91d3eaa 1021 */
Kojto 93:e188a91d3eaa 1022
Kojto 93:e188a91d3eaa 1023 /** @defgroup FMC_PCCARD_Device_Instance
Kojto 93:e188a91d3eaa 1024 * @{
Kojto 93:e188a91d3eaa 1025 */
Kojto 93:e188a91d3eaa 1026 #define IS_FMC_PCCARD_DEVICE(INSTANCE) ((INSTANCE) == FMC_PCCARD_DEVICE)
Kojto 93:e188a91d3eaa 1027 /**
Kojto 93:e188a91d3eaa 1028 * @}
Kojto 93:e188a91d3eaa 1029 */
Kojto 93:e188a91d3eaa 1030
Kojto 93:e188a91d3eaa 1031 /** @defgroup FMC_SDRAM_Device_Instance
Kojto 93:e188a91d3eaa 1032 * @{
Kojto 93:e188a91d3eaa 1033 */
Kojto 93:e188a91d3eaa 1034 #define IS_FMC_SDRAM_DEVICE(INSTANCE) ((INSTANCE) == FMC_SDRAM_DEVICE)
Kojto 93:e188a91d3eaa 1035 /**
Kojto 93:e188a91d3eaa 1036 * @}
Kojto 93:e188a91d3eaa 1037 */
Kojto 93:e188a91d3eaa 1038
Kojto 93:e188a91d3eaa 1039 /**
Kojto 93:e188a91d3eaa 1040 * @}
Kojto 93:e188a91d3eaa 1041 */
Kojto 93:e188a91d3eaa 1042
Kojto 93:e188a91d3eaa 1043 /** @defgroup FMC_Interrupt_definition
Kojto 93:e188a91d3eaa 1044 * @brief FMC Interrupt definition
Kojto 93:e188a91d3eaa 1045 * @{
Kojto 93:e188a91d3eaa 1046 */
Kojto 93:e188a91d3eaa 1047 #define FMC_IT_RISING_EDGE ((uint32_t)0x00000008)
Kojto 93:e188a91d3eaa 1048 #define FMC_IT_LEVEL ((uint32_t)0x00000010)
Kojto 93:e188a91d3eaa 1049 #define FMC_IT_FALLING_EDGE ((uint32_t)0x00000020)
Kojto 93:e188a91d3eaa 1050 #define FMC_IT_REFRESH_ERROR ((uint32_t)0x00004000)
Kojto 93:e188a91d3eaa 1051
Kojto 93:e188a91d3eaa 1052 #define IS_FMC_IT(IT) ((((IT) & (uint32_t)0xFFFFBFC7) == 0x00000000) && ((IT) != 0x00000000))
Kojto 93:e188a91d3eaa 1053
Kojto 93:e188a91d3eaa 1054 #define IS_FMC_GET_IT(IT) (((IT) == FMC_IT_RISING_EDGE) || \
Kojto 93:e188a91d3eaa 1055 ((IT) == FMC_IT_LEVEL) || \
Kojto 93:e188a91d3eaa 1056 ((IT) == FMC_IT_FALLING_EDGE) || \
Kojto 93:e188a91d3eaa 1057 ((IT) == FMC_IT_REFRESH_ERROR))
Kojto 93:e188a91d3eaa 1058 /**
Kojto 93:e188a91d3eaa 1059 * @}
Kojto 93:e188a91d3eaa 1060 */
Kojto 93:e188a91d3eaa 1061
Kojto 93:e188a91d3eaa 1062 /** @defgroup FMC_Flag_definition
Kojto 93:e188a91d3eaa 1063 * @brief FMC Flag definition
Kojto 93:e188a91d3eaa 1064 * @{
Kojto 93:e188a91d3eaa 1065 */
Kojto 93:e188a91d3eaa 1066 #define FMC_FLAG_RISING_EDGE ((uint32_t)0x00000001)
Kojto 93:e188a91d3eaa 1067 #define FMC_FLAG_LEVEL ((uint32_t)0x00000002)
Kojto 93:e188a91d3eaa 1068 #define FMC_FLAG_FALLING_EDGE ((uint32_t)0x00000004)
Kojto 93:e188a91d3eaa 1069 #define FMC_FLAG_FEMPT ((uint32_t)0x00000040)
Kojto 93:e188a91d3eaa 1070 #define FMC_SDRAM_FLAG_REFRESH_IT FMC_SDSR_RE
Kojto 93:e188a91d3eaa 1071 #define FMC_SDRAM_FLAG_BUSY FMC_SDSR_BUSY
Kojto 93:e188a91d3eaa 1072 #define FMC_SDRAM_FLAG_REFRESH_ERROR FMC_SDRTR_CRE
Kojto 93:e188a91d3eaa 1073
Kojto 93:e188a91d3eaa 1074 #define IS_FMC_GET_FLAG(FLAG) (((FLAG) == FMC_FLAG_RISING_EDGE) || \
Kojto 93:e188a91d3eaa 1075 ((FLAG) == FMC_FLAG_LEVEL) || \
Kojto 93:e188a91d3eaa 1076 ((FLAG) == FMC_FLAG_FALLING_EDGE) || \
Kojto 93:e188a91d3eaa 1077 ((FLAG) == FMC_FLAG_FEMPT) || \
Kojto 93:e188a91d3eaa 1078 ((FLAG) == FMC_SDRAM_FLAG_REFRESH_IT) || \
Kojto 93:e188a91d3eaa 1079 ((FLAG) == FMC_SDRAM_FLAG_BUSY))
Kojto 93:e188a91d3eaa 1080
Kojto 93:e188a91d3eaa 1081 #define IS_FMC_CLEAR_FLAG(FLAG) ((((FLAG) & (uint32_t)0xFFFFFFF8) == 0x00000000) && ((FLAG) != 0x00000000))
Kojto 93:e188a91d3eaa 1082 /**
Kojto 93:e188a91d3eaa 1083 * @}
Kojto 93:e188a91d3eaa 1084 */
Kojto 93:e188a91d3eaa 1085
Kojto 93:e188a91d3eaa 1086 /* Exported macro ------------------------------------------------------------*/
Kojto 93:e188a91d3eaa 1087
Kojto 93:e188a91d3eaa 1088 /** @defgroup FMC_NOR_Macros
Kojto 93:e188a91d3eaa 1089 * @brief macros to handle NOR device enable/disable and read/write operations
Kojto 93:e188a91d3eaa 1090 * @{
Kojto 93:e188a91d3eaa 1091 */
Kojto 93:e188a91d3eaa 1092
Kojto 93:e188a91d3eaa 1093 /**
Kojto 93:e188a91d3eaa 1094 * @brief Enable the NORSRAM device access.
Kojto 93:e188a91d3eaa 1095 * @param __INSTANCE__: FMC_NORSRAM Instance
Kojto 93:e188a91d3eaa 1096 * @param __BANK__: FMC_NORSRAM Bank
Kojto 93:e188a91d3eaa 1097 * @retval None
Kojto 93:e188a91d3eaa 1098 */
Kojto 93:e188a91d3eaa 1099 #define __FMC_NORSRAM_ENABLE(__INSTANCE__, __BANK__) ((__INSTANCE__)->BTCR[(__BANK__)] |= FMC_BCR1_MBKEN)
Kojto 93:e188a91d3eaa 1100
Kojto 93:e188a91d3eaa 1101 /**
Kojto 93:e188a91d3eaa 1102 * @brief Disable the NORSRAM device access.
Kojto 93:e188a91d3eaa 1103 * @param __INSTANCE__: FMC_NORSRAM Instance
Kojto 93:e188a91d3eaa 1104 * @param __BANK__: FMC_NORSRAM Bank
Kojto 93:e188a91d3eaa 1105 * @retval None
Kojto 93:e188a91d3eaa 1106 */
Kojto 93:e188a91d3eaa 1107 #define __FMC_NORSRAM_DISABLE(__INSTANCE__, __BANK__) ((__INSTANCE__)->BTCR[(__BANK__)] &= ~FMC_BCR1_MBKEN)
Kojto 93:e188a91d3eaa 1108
Kojto 93:e188a91d3eaa 1109 /**
Kojto 93:e188a91d3eaa 1110 * @}
Kojto 93:e188a91d3eaa 1111 */
Kojto 93:e188a91d3eaa 1112
Kojto 93:e188a91d3eaa 1113 /** @defgroup FMC_NAND_Macros
Kojto 93:e188a91d3eaa 1114 * @brief macros to handle NAND device enable/disable
Kojto 93:e188a91d3eaa 1115 * @{
Kojto 93:e188a91d3eaa 1116 */
Kojto 93:e188a91d3eaa 1117
Kojto 93:e188a91d3eaa 1118 /**
Kojto 93:e188a91d3eaa 1119 * @brief Enable the NAND device access.
Kojto 93:e188a91d3eaa 1120 * @param __INSTANCE__: FMC_NAND Instance
Kojto 93:e188a91d3eaa 1121 * @param __BANK__: FMC_NAND Bank
Kojto 93:e188a91d3eaa 1122 * @retval None
Kojto 93:e188a91d3eaa 1123 */
Kojto 93:e188a91d3eaa 1124 #define __FMC_NAND_ENABLE(__INSTANCE__, __BANK__) (((__BANK__) == FMC_NAND_BANK2)? ((__INSTANCE__)->PCR2 |= FMC_PCR2_PBKEN): \
Kojto 93:e188a91d3eaa 1125 ((__INSTANCE__)->PCR3 |= FMC_PCR3_PBKEN))
Kojto 93:e188a91d3eaa 1126
Kojto 93:e188a91d3eaa 1127 /**
Kojto 93:e188a91d3eaa 1128 * @brief Disable the NAND device access.
Kojto 93:e188a91d3eaa 1129 * @param __INSTANCE__: FMC_NAND Instance
Kojto 93:e188a91d3eaa 1130 * @param __BANK__: FMC_NAND Bank
Kojto 93:e188a91d3eaa 1131 * @retval None
Kojto 93:e188a91d3eaa 1132 */
Kojto 93:e188a91d3eaa 1133 #define __FMC_NAND_DISABLE(__INSTANCE__, __BANK__) (((__BANK__) == FMC_NAND_BANK2)? ((__INSTANCE__)->PCR2 &= ~FMC_PCR2_PBKEN): \
Kojto 93:e188a91d3eaa 1134 ((__INSTANCE__)->PCR3 &= ~FMC_PCR3_PBKEN))
Kojto 93:e188a91d3eaa 1135 /**
Kojto 93:e188a91d3eaa 1136 * @}
Kojto 93:e188a91d3eaa 1137 */
Kojto 93:e188a91d3eaa 1138
Kojto 93:e188a91d3eaa 1139 /** @defgroup FMC_PCCARD_Macros
Kojto 93:e188a91d3eaa 1140 * @brief macros to handle SRAM read/write operations
Kojto 93:e188a91d3eaa 1141 * @{
Kojto 93:e188a91d3eaa 1142 */
Kojto 93:e188a91d3eaa 1143
Kojto 93:e188a91d3eaa 1144 /**
Kojto 93:e188a91d3eaa 1145 * @brief Enable the PCCARD device access.
Kojto 93:e188a91d3eaa 1146 * @param __INSTANCE__: FMC_PCCARD Instance
Kojto 93:e188a91d3eaa 1147 * @retval None
Kojto 93:e188a91d3eaa 1148 */
Kojto 93:e188a91d3eaa 1149 #define __FMC_PCCARD_ENABLE(__INSTANCE__) ((__INSTANCE__)->PCR4 |= FMC_PCR4_PBKEN)
Kojto 93:e188a91d3eaa 1150
Kojto 93:e188a91d3eaa 1151 /**
Kojto 93:e188a91d3eaa 1152 * @brief Disable the PCCARD device access.
Kojto 93:e188a91d3eaa 1153 * @param __INSTANCE__: FMC_PCCARD Instance
Kojto 93:e188a91d3eaa 1154 * @retval None
Kojto 93:e188a91d3eaa 1155 */
Kojto 93:e188a91d3eaa 1156 #define __FMC_PCCARD_DISABLE(__INSTANCE__) ((__INSTANCE__)->PCR4 &= ~FMC_PCR4_PBKEN)
Kojto 93:e188a91d3eaa 1157 /**
Kojto 93:e188a91d3eaa 1158 * @}
Kojto 93:e188a91d3eaa 1159 */
Kojto 93:e188a91d3eaa 1160
Kojto 93:e188a91d3eaa 1161 /** @defgroup FMC_Interrupt
Kojto 93:e188a91d3eaa 1162 * @brief macros to handle FMC interrupts
Kojto 93:e188a91d3eaa 1163 * @{
Kojto 93:e188a91d3eaa 1164 */
Kojto 93:e188a91d3eaa 1165
Kojto 93:e188a91d3eaa 1166 /**
Kojto 93:e188a91d3eaa 1167 * @brief Enable the NAND device interrupt.
Kojto 93:e188a91d3eaa 1168 * @param __INSTANCE__: FMC_NAND instance
Kojto 93:e188a91d3eaa 1169 * @param __BANK__: FMC_NAND Bank
Kojto 93:e188a91d3eaa 1170 * @param __INTERRUPT__: FMC_NAND interrupt
Kojto 93:e188a91d3eaa 1171 * This parameter can be any combination of the following values:
Kojto 93:e188a91d3eaa 1172 * @arg FMC_IT_RISING_EDGE: Interrupt rising edge.
Kojto 93:e188a91d3eaa 1173 * @arg FMC_IT_LEVEL: Interrupt level.
Kojto 93:e188a91d3eaa 1174 * @arg FMC_IT_FALLING_EDGE: Interrupt falling edge.
Kojto 93:e188a91d3eaa 1175 * @retval None
Kojto 93:e188a91d3eaa 1176 */
Kojto 93:e188a91d3eaa 1177 #define __FMC_NAND_ENABLE_IT(__INSTANCE__, __BANK__, __INTERRUPT__) (((__BANK__) == FMC_NAND_BANK2)? ((__INSTANCE__)->SR2 |= (__INTERRUPT__)): \
Kojto 93:e188a91d3eaa 1178 ((__INSTANCE__)->SR3 |= (__INTERRUPT__)))
Kojto 93:e188a91d3eaa 1179
Kojto 93:e188a91d3eaa 1180 /**
Kojto 93:e188a91d3eaa 1181 * @brief Disable the NAND device interrupt.
Kojto 93:e188a91d3eaa 1182 * @param __INSTANCE__: FMC_NAND handle
Kojto 93:e188a91d3eaa 1183 * @param __BANK__: FMC_NAND Bank
Kojto 93:e188a91d3eaa 1184 * @param __INTERRUPT__: FMC_NAND interrupt
Kojto 93:e188a91d3eaa 1185 * This parameter can be any combination of the following values:
Kojto 93:e188a91d3eaa 1186 * @arg FMC_IT_RISING_EDGE: Interrupt rising edge.
Kojto 93:e188a91d3eaa 1187 * @arg FMC_IT_LEVEL: Interrupt level.
Kojto 93:e188a91d3eaa 1188 * @arg FMC_IT_FALLING_EDGE: Interrupt falling edge.
Kojto 93:e188a91d3eaa 1189 * @retval None
Kojto 93:e188a91d3eaa 1190 */
Kojto 93:e188a91d3eaa 1191 #define __FMC_NAND_DISABLE_IT(__INSTANCE__, __BANK__, __INTERRUPT__) (((__BANK__) == FMC_NAND_BANK2)? ((__INSTANCE__)->SR2 &= ~(__INTERRUPT__)): \
Kojto 93:e188a91d3eaa 1192 ((__INSTANCE__)->SR3 &= ~(__INTERRUPT__)))
Kojto 93:e188a91d3eaa 1193
Kojto 93:e188a91d3eaa 1194 /**
Kojto 93:e188a91d3eaa 1195 * @brief Get flag status of the NAND device.
Kojto 93:e188a91d3eaa 1196 * @param __INSTANCE__: FMC_NAND handle
Kojto 93:e188a91d3eaa 1197 * @param __BANK__: FMC_NAND Bank
Kojto 93:e188a91d3eaa 1198 * @param __FLAG__: FMC_NAND flag
Kojto 93:e188a91d3eaa 1199 * This parameter can be any combination of the following values:
Kojto 93:e188a91d3eaa 1200 * @arg FMC_FLAG_RISING_EDGE: Interrupt rising edge flag.
Kojto 93:e188a91d3eaa 1201 * @arg FMC_FLAG_LEVEL: Interrupt level edge flag.
Kojto 93:e188a91d3eaa 1202 * @arg FMC_FLAG_FALLING_EDGE: Interrupt falling edge flag.
Kojto 93:e188a91d3eaa 1203 * @arg FMC_FLAG_FEMPT: FIFO empty flag.
Kojto 93:e188a91d3eaa 1204 * @retval The state of FLAG (SET or RESET).
Kojto 93:e188a91d3eaa 1205 */
Kojto 93:e188a91d3eaa 1206 #define __FMC_NAND_GET_FLAG(__INSTANCE__, __BANK__, __FLAG__) (((__BANK__) == FMC_NAND_BANK2)? (((__INSTANCE__)->SR2 &(__FLAG__)) == (__FLAG__)): \
Kojto 93:e188a91d3eaa 1207 (((__INSTANCE__)->SR3 &(__FLAG__)) == (__FLAG__)))
Kojto 93:e188a91d3eaa 1208 /**
Kojto 93:e188a91d3eaa 1209 * @brief Clear flag status of the NAND device.
Kojto 93:e188a91d3eaa 1210 * @param __INSTANCE__: FMC_NAND handle
Kojto 93:e188a91d3eaa 1211 * @param __BANK__: FMC_NAND Bank
Kojto 93:e188a91d3eaa 1212 * @param __FLAG__: FMC_NAND flag
Kojto 93:e188a91d3eaa 1213 * This parameter can be any combination of the following values:
Kojto 93:e188a91d3eaa 1214 * @arg FMC_FLAG_RISING_EDGE: Interrupt rising edge flag.
Kojto 93:e188a91d3eaa 1215 * @arg FMC_FLAG_LEVEL: Interrupt level edge flag.
Kojto 93:e188a91d3eaa 1216 * @arg FMC_FLAG_FALLING_EDGE: Interrupt falling edge flag.
Kojto 93:e188a91d3eaa 1217 * @arg FMC_FLAG_FEMPT: FIFO empty flag.
Kojto 93:e188a91d3eaa 1218 * @retval None
Kojto 93:e188a91d3eaa 1219 */
Kojto 93:e188a91d3eaa 1220 #define __FMC_NAND_CLEAR_FLAG(__INSTANCE__, __BANK__, __FLAG__) (((__BANK__) == FMC_NAND_BANK2)? ((__INSTANCE__)->SR2 &= ~(__FLAG__)): \
Kojto 93:e188a91d3eaa 1221 ((__INSTANCE__)->SR3 &= ~(__FLAG__)))
Kojto 93:e188a91d3eaa 1222 /**
Kojto 93:e188a91d3eaa 1223 * @brief Enable the PCCARD device interrupt.
Kojto 93:e188a91d3eaa 1224 * @param __INSTANCE__: FMC_PCCARD instance
Kojto 93:e188a91d3eaa 1225 * @param __INTERRUPT__: FMC_PCCARD interrupt
Kojto 93:e188a91d3eaa 1226 * This parameter can be any combination of the following values:
Kojto 93:e188a91d3eaa 1227 * @arg FMC_IT_RISING_EDGE: Interrupt rising edge.
Kojto 93:e188a91d3eaa 1228 * @arg FMC_IT_LEVEL: Interrupt level.
Kojto 93:e188a91d3eaa 1229 * @arg FMC_IT_FALLING_EDGE: Interrupt falling edge.
Kojto 93:e188a91d3eaa 1230 * @retval None
Kojto 93:e188a91d3eaa 1231 */
Kojto 93:e188a91d3eaa 1232 #define __FMC_PCCARD_ENABLE_IT(__INSTANCE__, __INTERRUPT__) ((__INSTANCE__)->SR4 |= (__INTERRUPT__))
Kojto 93:e188a91d3eaa 1233
Kojto 93:e188a91d3eaa 1234 /**
Kojto 93:e188a91d3eaa 1235 * @brief Disable the PCCARD device interrupt.
Kojto 93:e188a91d3eaa 1236 * @param __INSTANCE__: FMC_PCCARD instance
Kojto 93:e188a91d3eaa 1237 * @param __INTERRUPT__: FMC_PCCARD interrupt
Kojto 93:e188a91d3eaa 1238 * This parameter can be any combination of the following values:
Kojto 93:e188a91d3eaa 1239 * @arg FMC_IT_RISING_EDGE: Interrupt rising edge.
Kojto 93:e188a91d3eaa 1240 * @arg FMC_IT_LEVEL: Interrupt level.
Kojto 93:e188a91d3eaa 1241 * @arg FMC_IT_FALLING_EDGE: Interrupt falling edge.
Kojto 93:e188a91d3eaa 1242 * @retval None
Kojto 93:e188a91d3eaa 1243 */
Kojto 93:e188a91d3eaa 1244 #define __FMC_PCCARD_DISABLE_IT(__INSTANCE__, __INTERRUPT__) ((__INSTANCE__)->SR4 &= ~(__INTERRUPT__))
Kojto 93:e188a91d3eaa 1245
Kojto 93:e188a91d3eaa 1246 /**
Kojto 93:e188a91d3eaa 1247 * @brief Get flag status of the PCCARD device.
Kojto 93:e188a91d3eaa 1248 * @param __INSTANCE__: FMC_PCCARD instance
Kojto 93:e188a91d3eaa 1249 * @param __FLAG__: FMC_PCCARD flag
Kojto 93:e188a91d3eaa 1250 * This parameter can be any combination of the following values:
Kojto 93:e188a91d3eaa 1251 * @arg FMC_FLAG_RISING_EDGE: Interrupt rising edge flag.
Kojto 93:e188a91d3eaa 1252 * @arg FMC_FLAG_LEVEL: Interrupt level edge flag.
Kojto 93:e188a91d3eaa 1253 * @arg FMC_FLAG_FALLING_EDGE: Interrupt falling edge flag.
Kojto 93:e188a91d3eaa 1254 * @arg FMC_FLAG_FEMPT: FIFO empty flag.
Kojto 93:e188a91d3eaa 1255 * @retval The state of FLAG (SET or RESET).
Kojto 93:e188a91d3eaa 1256 */
Kojto 93:e188a91d3eaa 1257 #define __FMC_PCCARD_GET_FLAG(__INSTANCE__, __FLAG__) (((__INSTANCE__)->SR4 &(__FLAG__)) == (__FLAG__))
Kojto 93:e188a91d3eaa 1258
Kojto 93:e188a91d3eaa 1259 /**
Kojto 93:e188a91d3eaa 1260 * @brief Clear flag status of the PCCARD device.
Kojto 93:e188a91d3eaa 1261 * @param __INSTANCE__: FMC_PCCARD instance
Kojto 93:e188a91d3eaa 1262 * @param __FLAG__: FMC_PCCARD flag
Kojto 93:e188a91d3eaa 1263 * This parameter can be any combination of the following values:
Kojto 93:e188a91d3eaa 1264 * @arg FMC_FLAG_RISING_EDGE: Interrupt rising edge flag.
Kojto 93:e188a91d3eaa 1265 * @arg FMC_FLAG_LEVEL: Interrupt level edge flag.
Kojto 93:e188a91d3eaa 1266 * @arg FMC_FLAG_FALLING_EDGE: Interrupt falling edge flag.
Kojto 93:e188a91d3eaa 1267 * @arg FMC_FLAG_FEMPT: FIFO empty flag.
Kojto 93:e188a91d3eaa 1268 * @retval None
Kojto 93:e188a91d3eaa 1269 */
Kojto 93:e188a91d3eaa 1270 #define __FMC_PCCARD_CLEAR_FLAG(__INSTANCE__, __FLAG__) ((__INSTANCE__)->SR4 &= ~(__FLAG__))
Kojto 93:e188a91d3eaa 1271
Kojto 93:e188a91d3eaa 1272 /**
Kojto 93:e188a91d3eaa 1273 * @brief Enable the SDRAM device interrupt.
Kojto 93:e188a91d3eaa 1274 * @param __INSTANCE__: FMC_SDRAM instance
Kojto 93:e188a91d3eaa 1275 * @param __INTERRUPT__: FMC_SDRAM interrupt
Kojto 93:e188a91d3eaa 1276 * This parameter can be any combination of the following values:
Kojto 93:e188a91d3eaa 1277 * @arg FMC_IT_REFRESH_ERROR: Interrupt refresh error
Kojto 93:e188a91d3eaa 1278 * @retval None
Kojto 93:e188a91d3eaa 1279 */
Kojto 93:e188a91d3eaa 1280 #define __FMC_SDRAM_ENABLE_IT(__INSTANCE__, __INTERRUPT__) ((__INSTANCE__)->SDRTR |= (__INTERRUPT__))
Kojto 93:e188a91d3eaa 1281
Kojto 93:e188a91d3eaa 1282 /**
Kojto 93:e188a91d3eaa 1283 * @brief Disable the SDRAM device interrupt.
Kojto 93:e188a91d3eaa 1284 * @param __INSTANCE__: FMC_SDRAM instance
Kojto 93:e188a91d3eaa 1285 * @param __INTERRUPT__: FMC_SDRAM interrupt
Kojto 93:e188a91d3eaa 1286 * This parameter can be any combination of the following values:
Kojto 93:e188a91d3eaa 1287 * @arg FMC_IT_REFRESH_ERROR: Interrupt refresh error
Kojto 93:e188a91d3eaa 1288 * @retval None
Kojto 93:e188a91d3eaa 1289 */
Kojto 93:e188a91d3eaa 1290 #define __FMC_SDRAM_DISABLE_IT(__INSTANCE__, __INTERRUPT__) ((__INSTANCE__)->SDRTR &= ~(__INTERRUPT__))
Kojto 93:e188a91d3eaa 1291
Kojto 93:e188a91d3eaa 1292 /**
Kojto 93:e188a91d3eaa 1293 * @brief Get flag status of the SDRAM device.
Kojto 93:e188a91d3eaa 1294 * @param __INSTANCE__: FMC_SDRAM instance
Kojto 93:e188a91d3eaa 1295 * @param __FLAG__: FMC_SDRAM flag
Kojto 93:e188a91d3eaa 1296 * This parameter can be any combination of the following values:
Kojto 93:e188a91d3eaa 1297 * @arg FMC_SDRAM_FLAG_REFRESH_IT: Interrupt refresh error.
Kojto 93:e188a91d3eaa 1298 * @arg FMC_SDRAM_FLAG_BUSY: SDRAM busy flag.
Kojto 93:e188a91d3eaa 1299 * @arg FMC_SDRAM_FLAG_REFRESH_ERROR: Refresh error flag.
Kojto 93:e188a91d3eaa 1300 * @retval The state of FLAG (SET or RESET).
Kojto 93:e188a91d3eaa 1301 */
Kojto 93:e188a91d3eaa 1302 #define __FMC_SDRAM_GET_FLAG(__INSTANCE__, __FLAG__) (((__INSTANCE__)->SDSR &(__FLAG__)) == (__FLAG__))
Kojto 93:e188a91d3eaa 1303
Kojto 93:e188a91d3eaa 1304 /**
Kojto 93:e188a91d3eaa 1305 * @brief Clear flag status of the SDRAM device.
Kojto 93:e188a91d3eaa 1306 * @param __INSTANCE__: FMC_SDRAM instance
Kojto 93:e188a91d3eaa 1307 * @param __FLAG__: FMC_SDRAM flag
Kojto 93:e188a91d3eaa 1308 * This parameter can be any combination of the following values:
Kojto 93:e188a91d3eaa 1309 * @arg FMC_SDRAM_FLAG_REFRESH_ERROR
Kojto 93:e188a91d3eaa 1310 * @retval None
Kojto 93:e188a91d3eaa 1311 */
Kojto 93:e188a91d3eaa 1312 #define __FMC_SDRAM_CLEAR_FLAG(__INSTANCE__, __FLAG__) ((__INSTANCE__)->SDRTR |= (__FLAG__))
Kojto 93:e188a91d3eaa 1313 /**
Kojto 93:e188a91d3eaa 1314 * @}
Kojto 93:e188a91d3eaa 1315 */
Kojto 93:e188a91d3eaa 1316
Kojto 93:e188a91d3eaa 1317 /* Exported functions --------------------------------------------------------*/
Kojto 93:e188a91d3eaa 1318
Kojto 93:e188a91d3eaa 1319 /* FMC_NORSRAM Controller functions *******************************************/
Kojto 93:e188a91d3eaa 1320 /* Initialization/de-initialization functions */
Kojto 93:e188a91d3eaa 1321 HAL_StatusTypeDef FMC_NORSRAM_Init(FMC_NORSRAM_TypeDef *Device, FMC_NORSRAM_InitTypeDef *Init);
Kojto 93:e188a91d3eaa 1322 HAL_StatusTypeDef FMC_NORSRAM_Timing_Init(FMC_NORSRAM_TypeDef *Device, FMC_NORSRAM_TimingTypeDef *Timing, uint32_t Bank);
Kojto 93:e188a91d3eaa 1323 HAL_StatusTypeDef FMC_NORSRAM_Extended_Timing_Init(FMC_NORSRAM_EXTENDED_TypeDef *Device, FMC_NORSRAM_TimingTypeDef *Timing, uint32_t Bank, uint32_t ExtendedMode);
Kojto 93:e188a91d3eaa 1324 HAL_StatusTypeDef FMC_NORSRAM_DeInit(FMC_NORSRAM_TypeDef *Device, FMC_NORSRAM_EXTENDED_TypeDef *ExDevice, uint32_t Bank);
Kojto 93:e188a91d3eaa 1325
Kojto 93:e188a91d3eaa 1326 /* FMC_NORSRAM Control functions */
Kojto 93:e188a91d3eaa 1327 HAL_StatusTypeDef FMC_NORSRAM_WriteOperation_Enable(FMC_NORSRAM_TypeDef *Device, uint32_t Bank);
Kojto 93:e188a91d3eaa 1328 HAL_StatusTypeDef FMC_NORSRAM_WriteOperation_Disable(FMC_NORSRAM_TypeDef *Device, uint32_t Bank);
Kojto 93:e188a91d3eaa 1329
Kojto 93:e188a91d3eaa 1330 /* FMC_NAND Controller functions **********************************************/
Kojto 93:e188a91d3eaa 1331 /* Initialization/de-initialization functions */
Kojto 93:e188a91d3eaa 1332 HAL_StatusTypeDef FMC_NAND_Init(FMC_NAND_TypeDef *Device, FMC_NAND_InitTypeDef *Init);
Kojto 93:e188a91d3eaa 1333 HAL_StatusTypeDef FMC_NAND_CommonSpace_Timing_Init(FMC_NAND_TypeDef *Device, FMC_NAND_PCC_TimingTypeDef *Timing, uint32_t Bank);
Kojto 93:e188a91d3eaa 1334 HAL_StatusTypeDef FMC_NAND_AttributeSpace_Timing_Init(FMC_NAND_TypeDef *Device, FMC_NAND_PCC_TimingTypeDef *Timing, uint32_t Bank);
Kojto 93:e188a91d3eaa 1335 HAL_StatusTypeDef FMC_NAND_DeInit(FMC_NAND_TypeDef *Device, uint32_t Bank);
Kojto 93:e188a91d3eaa 1336
Kojto 93:e188a91d3eaa 1337 /* FMC_NAND Control functions */
Kojto 93:e188a91d3eaa 1338 HAL_StatusTypeDef FMC_NAND_ECC_Enable(FMC_NAND_TypeDef *Device, uint32_t Bank);
Kojto 93:e188a91d3eaa 1339 HAL_StatusTypeDef FMC_NAND_ECC_Disable(FMC_NAND_TypeDef *Device, uint32_t Bank);
Kojto 93:e188a91d3eaa 1340 HAL_StatusTypeDef FMC_NAND_GetECC(FMC_NAND_TypeDef *Device, uint32_t *ECCval, uint32_t Bank, uint32_t Timeout);
Kojto 93:e188a91d3eaa 1341
Kojto 93:e188a91d3eaa 1342 /* FMC_PCCARD Controller functions ********************************************/
Kojto 93:e188a91d3eaa 1343 /* Initialization/de-initialization functions */
Kojto 93:e188a91d3eaa 1344 HAL_StatusTypeDef FMC_PCCARD_Init(FMC_PCCARD_TypeDef *Device, FMC_PCCARD_InitTypeDef *Init);
Kojto 93:e188a91d3eaa 1345 HAL_StatusTypeDef FMC_PCCARD_CommonSpace_Timing_Init(FMC_PCCARD_TypeDef *Device, FMC_NAND_PCC_TimingTypeDef *Timing);
Kojto 93:e188a91d3eaa 1346 HAL_StatusTypeDef FMC_PCCARD_AttributeSpace_Timing_Init(FMC_PCCARD_TypeDef *Device, FMC_NAND_PCC_TimingTypeDef *Timing);
Kojto 93:e188a91d3eaa 1347 HAL_StatusTypeDef FMC_PCCARD_IOSpace_Timing_Init(FMC_PCCARD_TypeDef *Device, FMC_NAND_PCC_TimingTypeDef *Timing);
Kojto 93:e188a91d3eaa 1348 HAL_StatusTypeDef FMC_PCCARD_DeInit(FMC_PCCARD_TypeDef *Device);
Kojto 93:e188a91d3eaa 1349
Kojto 93:e188a91d3eaa 1350 /* FMC_SDRAM Controller functions *********************************************/
Kojto 93:e188a91d3eaa 1351 /* Initialization/de-initialization functions */
Kojto 93:e188a91d3eaa 1352 HAL_StatusTypeDef FMC_SDRAM_Init(FMC_SDRAM_TypeDef *Device, FMC_SDRAM_InitTypeDef *Init);
Kojto 93:e188a91d3eaa 1353 HAL_StatusTypeDef FMC_SDRAM_Timing_Init(FMC_SDRAM_TypeDef *Device, FMC_SDRAM_TimingTypeDef *Timing, uint32_t Bank);
Kojto 93:e188a91d3eaa 1354 HAL_StatusTypeDef FMC_SDRAM_DeInit(FMC_SDRAM_TypeDef *Device, uint32_t Bank);
Kojto 93:e188a91d3eaa 1355
Kojto 93:e188a91d3eaa 1356 /* FMC_SDRAM Control functions */
Kojto 93:e188a91d3eaa 1357 HAL_StatusTypeDef FMC_SDRAM_WriteProtection_Enable(FMC_SDRAM_TypeDef *Device, uint32_t Bank);
Kojto 93:e188a91d3eaa 1358 HAL_StatusTypeDef FMC_SDRAM_WriteProtection_Disable(FMC_SDRAM_TypeDef *Device, uint32_t Bank);
Kojto 93:e188a91d3eaa 1359 HAL_StatusTypeDef FMC_SDRAM_SendCommand(FMC_SDRAM_TypeDef *Device, FMC_SDRAM_CommandTypeDef *Command, uint32_t Timeout);
Kojto 93:e188a91d3eaa 1360 HAL_StatusTypeDef FMC_SDRAM_ProgramRefreshRate(FMC_SDRAM_TypeDef *Device, uint32_t RefreshRate);
Kojto 93:e188a91d3eaa 1361 HAL_StatusTypeDef FMC_SDRAM_SetAutoRefreshNumber(FMC_SDRAM_TypeDef *Device, uint32_t AutoRefreshNumber);
Kojto 93:e188a91d3eaa 1362 uint32_t FMC_SDRAM_GetModeStatus(FMC_SDRAM_TypeDef *Device, uint32_t Bank);
Kojto 93:e188a91d3eaa 1363
Kojto 93:e188a91d3eaa 1364 #endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx */
Kojto 93:e188a91d3eaa 1365 /**
Kojto 93:e188a91d3eaa 1366 * @}
Kojto 93:e188a91d3eaa 1367 */
Kojto 93:e188a91d3eaa 1368
Kojto 93:e188a91d3eaa 1369 /**
Kojto 93:e188a91d3eaa 1370 * @}
Kojto 93:e188a91d3eaa 1371 */
Kojto 93:e188a91d3eaa 1372
Kojto 93:e188a91d3eaa 1373 #ifdef __cplusplus
Kojto 93:e188a91d3eaa 1374 }
Kojto 93:e188a91d3eaa 1375 #endif
Kojto 93:e188a91d3eaa 1376
Kojto 93:e188a91d3eaa 1377 #endif /* __STM32F4xx_LL_FMC_H */
Kojto 93:e188a91d3eaa 1378
Kojto 93:e188a91d3eaa 1379 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/