Egor Rumjantsev
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TARGET_EFM32ZG_STK3200/efm32zg_timer.h@99:7f6c6de930c0, 2015-05-03 (annotated)
- Committer:
- Mikchel
- Date:
- Sun May 03 16:04:42 2015 +0000
- Revision:
- 99:7f6c6de930c0
- Parent:
- 98:8ab26030e058
12
Who changed what in which revision?
| User | Revision | Line number | New contents of line |
|---|---|---|---|
| Kojto | 98:8ab26030e058 | 1 | /**************************************************************************//** |
| Kojto | 98:8ab26030e058 | 2 | * @file efm32zg_timer.h |
| Kojto | 98:8ab26030e058 | 3 | * @brief EFM32ZG_TIMER register and bit field definitions |
| Kojto | 98:8ab26030e058 | 4 | * @version 3.20.6 |
| Kojto | 98:8ab26030e058 | 5 | ****************************************************************************** |
| Kojto | 98:8ab26030e058 | 6 | * @section License |
| Kojto | 98:8ab26030e058 | 7 | * <b>(C) Copyright 2014 Silicon Laboratories, Inc. http://www.silabs.com</b> |
| Kojto | 98:8ab26030e058 | 8 | ****************************************************************************** |
| Kojto | 98:8ab26030e058 | 9 | * |
| Kojto | 98:8ab26030e058 | 10 | * Permission is granted to anyone to use this software for any purpose, |
| Kojto | 98:8ab26030e058 | 11 | * including commercial applications, and to alter it and redistribute it |
| Kojto | 98:8ab26030e058 | 12 | * freely, subject to the following restrictions: |
| Kojto | 98:8ab26030e058 | 13 | * |
| Kojto | 98:8ab26030e058 | 14 | * 1. The origin of this software must not be misrepresented; you must not |
| Kojto | 98:8ab26030e058 | 15 | * claim that you wrote the original software.@n |
| Kojto | 98:8ab26030e058 | 16 | * 2. Altered source versions must be plainly marked as such, and must not be |
| Kojto | 98:8ab26030e058 | 17 | * misrepresented as being the original software.@n |
| Kojto | 98:8ab26030e058 | 18 | * 3. This notice may not be removed or altered from any source distribution. |
| Kojto | 98:8ab26030e058 | 19 | * |
| Kojto | 98:8ab26030e058 | 20 | * DISCLAIMER OF WARRANTY/LIMITATION OF REMEDIES: Silicon Laboratories, Inc. |
| Kojto | 98:8ab26030e058 | 21 | * has no obligation to support this Software. Silicon Laboratories, Inc. is |
| Kojto | 98:8ab26030e058 | 22 | * providing the Software "AS IS", with no express or implied warranties of any |
| Kojto | 98:8ab26030e058 | 23 | * kind, including, but not limited to, any implied warranties of |
| Kojto | 98:8ab26030e058 | 24 | * merchantability or fitness for any particular purpose or warranties against |
| Kojto | 98:8ab26030e058 | 25 | * infringement of any proprietary rights of a third party. |
| Kojto | 98:8ab26030e058 | 26 | * |
| Kojto | 98:8ab26030e058 | 27 | * Silicon Laboratories, Inc. will not be liable for any consequential, |
| Kojto | 98:8ab26030e058 | 28 | * incidental, or special damages, or any other relief, or for any claim by |
| Kojto | 98:8ab26030e058 | 29 | * any third party, arising from your use of this Software. |
| Kojto | 98:8ab26030e058 | 30 | * |
| Kojto | 98:8ab26030e058 | 31 | *****************************************************************************/ |
| Kojto | 98:8ab26030e058 | 32 | /**************************************************************************//** |
| Kojto | 98:8ab26030e058 | 33 | * @defgroup EFM32ZG_TIMER |
| Kojto | 98:8ab26030e058 | 34 | * @{ |
| Kojto | 98:8ab26030e058 | 35 | * @brief EFM32ZG_TIMER Register Declaration |
| Kojto | 98:8ab26030e058 | 36 | *****************************************************************************/ |
| Kojto | 98:8ab26030e058 | 37 | typedef struct |
| Kojto | 98:8ab26030e058 | 38 | { |
| Kojto | 98:8ab26030e058 | 39 | __IO uint32_t CTRL; /**< Control Register */ |
| Kojto | 98:8ab26030e058 | 40 | __IO uint32_t CMD; /**< Command Register */ |
| Kojto | 98:8ab26030e058 | 41 | __I uint32_t STATUS; /**< Status Register */ |
| Kojto | 98:8ab26030e058 | 42 | __IO uint32_t IEN; /**< Interrupt Enable Register */ |
| Kojto | 98:8ab26030e058 | 43 | __I uint32_t IF; /**< Interrupt Flag Register */ |
| Kojto | 98:8ab26030e058 | 44 | __IO uint32_t IFS; /**< Interrupt Flag Set Register */ |
| Kojto | 98:8ab26030e058 | 45 | __IO uint32_t IFC; /**< Interrupt Flag Clear Register */ |
| Kojto | 98:8ab26030e058 | 46 | __IO uint32_t TOP; /**< Counter Top Value Register */ |
| Kojto | 98:8ab26030e058 | 47 | __IO uint32_t TOPB; /**< Counter Top Value Buffer Register */ |
| Kojto | 98:8ab26030e058 | 48 | __IO uint32_t CNT; /**< Counter Value Register */ |
| Kojto | 98:8ab26030e058 | 49 | __IO uint32_t ROUTE; /**< I/O Routing Register */ |
| Kojto | 98:8ab26030e058 | 50 | |
| Kojto | 98:8ab26030e058 | 51 | uint32_t RESERVED0[1]; /**< Reserved registers */ |
| Kojto | 98:8ab26030e058 | 52 | |
| Kojto | 98:8ab26030e058 | 53 | TIMER_CC_TypeDef CC[3]; /**< Compare/Capture Channel */ |
| Kojto | 98:8ab26030e058 | 54 | } TIMER_TypeDef; /** @} */ |
| Kojto | 98:8ab26030e058 | 55 | |
| Kojto | 98:8ab26030e058 | 56 | /**************************************************************************//** |
| Kojto | 98:8ab26030e058 | 57 | * @defgroup EFM32ZG_TIMER_BitFields |
| Kojto | 98:8ab26030e058 | 58 | * @{ |
| Kojto | 98:8ab26030e058 | 59 | *****************************************************************************/ |
| Kojto | 98:8ab26030e058 | 60 | |
| Kojto | 98:8ab26030e058 | 61 | /* Bit fields for TIMER CTRL */ |
| Kojto | 98:8ab26030e058 | 62 | #define _TIMER_CTRL_RESETVALUE 0x00000000UL /**< Default value for TIMER_CTRL */ |
| Kojto | 98:8ab26030e058 | 63 | #define _TIMER_CTRL_MASK 0x3F032FFBUL /**< Mask for TIMER_CTRL */ |
| Kojto | 98:8ab26030e058 | 64 | #define _TIMER_CTRL_MODE_SHIFT 0 /**< Shift value for TIMER_MODE */ |
| Kojto | 98:8ab26030e058 | 65 | #define _TIMER_CTRL_MODE_MASK 0x3UL /**< Bit mask for TIMER_MODE */ |
| Kojto | 98:8ab26030e058 | 66 | #define _TIMER_CTRL_MODE_DEFAULT 0x00000000UL /**< Mode DEFAULT for TIMER_CTRL */ |
| Kojto | 98:8ab26030e058 | 67 | #define _TIMER_CTRL_MODE_UP 0x00000000UL /**< Mode UP for TIMER_CTRL */ |
| Kojto | 98:8ab26030e058 | 68 | #define _TIMER_CTRL_MODE_DOWN 0x00000001UL /**< Mode DOWN for TIMER_CTRL */ |
| Kojto | 98:8ab26030e058 | 69 | #define _TIMER_CTRL_MODE_UPDOWN 0x00000002UL /**< Mode UPDOWN for TIMER_CTRL */ |
| Kojto | 98:8ab26030e058 | 70 | #define _TIMER_CTRL_MODE_QDEC 0x00000003UL /**< Mode QDEC for TIMER_CTRL */ |
| Kojto | 98:8ab26030e058 | 71 | #define TIMER_CTRL_MODE_DEFAULT (_TIMER_CTRL_MODE_DEFAULT << 0) /**< Shifted mode DEFAULT for TIMER_CTRL */ |
| Kojto | 98:8ab26030e058 | 72 | #define TIMER_CTRL_MODE_UP (_TIMER_CTRL_MODE_UP << 0) /**< Shifted mode UP for TIMER_CTRL */ |
| Kojto | 98:8ab26030e058 | 73 | #define TIMER_CTRL_MODE_DOWN (_TIMER_CTRL_MODE_DOWN << 0) /**< Shifted mode DOWN for TIMER_CTRL */ |
| Kojto | 98:8ab26030e058 | 74 | #define TIMER_CTRL_MODE_UPDOWN (_TIMER_CTRL_MODE_UPDOWN << 0) /**< Shifted mode UPDOWN for TIMER_CTRL */ |
| Kojto | 98:8ab26030e058 | 75 | #define TIMER_CTRL_MODE_QDEC (_TIMER_CTRL_MODE_QDEC << 0) /**< Shifted mode QDEC for TIMER_CTRL */ |
| Kojto | 98:8ab26030e058 | 76 | #define TIMER_CTRL_SYNC (0x1UL << 3) /**< Timer Start/Stop/Reload Synchronization */ |
| Kojto | 98:8ab26030e058 | 77 | #define _TIMER_CTRL_SYNC_SHIFT 3 /**< Shift value for TIMER_SYNC */ |
| Kojto | 98:8ab26030e058 | 78 | #define _TIMER_CTRL_SYNC_MASK 0x8UL /**< Bit mask for TIMER_SYNC */ |
| Kojto | 98:8ab26030e058 | 79 | #define _TIMER_CTRL_SYNC_DEFAULT 0x00000000UL /**< Mode DEFAULT for TIMER_CTRL */ |
| Kojto | 98:8ab26030e058 | 80 | #define TIMER_CTRL_SYNC_DEFAULT (_TIMER_CTRL_SYNC_DEFAULT << 3) /**< Shifted mode DEFAULT for TIMER_CTRL */ |
| Kojto | 98:8ab26030e058 | 81 | #define TIMER_CTRL_OSMEN (0x1UL << 4) /**< One-shot Mode Enable */ |
| Kojto | 98:8ab26030e058 | 82 | #define _TIMER_CTRL_OSMEN_SHIFT 4 /**< Shift value for TIMER_OSMEN */ |
| Kojto | 98:8ab26030e058 | 83 | #define _TIMER_CTRL_OSMEN_MASK 0x10UL /**< Bit mask for TIMER_OSMEN */ |
| Kojto | 98:8ab26030e058 | 84 | #define _TIMER_CTRL_OSMEN_DEFAULT 0x00000000UL /**< Mode DEFAULT for TIMER_CTRL */ |
| Kojto | 98:8ab26030e058 | 85 | #define TIMER_CTRL_OSMEN_DEFAULT (_TIMER_CTRL_OSMEN_DEFAULT << 4) /**< Shifted mode DEFAULT for TIMER_CTRL */ |
| Kojto | 98:8ab26030e058 | 86 | #define TIMER_CTRL_QDM (0x1UL << 5) /**< Quadrature Decoder Mode Selection */ |
| Kojto | 98:8ab26030e058 | 87 | #define _TIMER_CTRL_QDM_SHIFT 5 /**< Shift value for TIMER_QDM */ |
| Kojto | 98:8ab26030e058 | 88 | #define _TIMER_CTRL_QDM_MASK 0x20UL /**< Bit mask for TIMER_QDM */ |
| Kojto | 98:8ab26030e058 | 89 | #define _TIMER_CTRL_QDM_DEFAULT 0x00000000UL /**< Mode DEFAULT for TIMER_CTRL */ |
| Kojto | 98:8ab26030e058 | 90 | #define _TIMER_CTRL_QDM_X2 0x00000000UL /**< Mode X2 for TIMER_CTRL */ |
| Kojto | 98:8ab26030e058 | 91 | #define _TIMER_CTRL_QDM_X4 0x00000001UL /**< Mode X4 for TIMER_CTRL */ |
| Kojto | 98:8ab26030e058 | 92 | #define TIMER_CTRL_QDM_DEFAULT (_TIMER_CTRL_QDM_DEFAULT << 5) /**< Shifted mode DEFAULT for TIMER_CTRL */ |
| Kojto | 98:8ab26030e058 | 93 | #define TIMER_CTRL_QDM_X2 (_TIMER_CTRL_QDM_X2 << 5) /**< Shifted mode X2 for TIMER_CTRL */ |
| Kojto | 98:8ab26030e058 | 94 | #define TIMER_CTRL_QDM_X4 (_TIMER_CTRL_QDM_X4 << 5) /**< Shifted mode X4 for TIMER_CTRL */ |
| Kojto | 98:8ab26030e058 | 95 | #define TIMER_CTRL_DEBUGRUN (0x1UL << 6) /**< Debug Mode Run Enable */ |
| Kojto | 98:8ab26030e058 | 96 | #define _TIMER_CTRL_DEBUGRUN_SHIFT 6 /**< Shift value for TIMER_DEBUGRUN */ |
| Kojto | 98:8ab26030e058 | 97 | #define _TIMER_CTRL_DEBUGRUN_MASK 0x40UL /**< Bit mask for TIMER_DEBUGRUN */ |
| Kojto | 98:8ab26030e058 | 98 | #define _TIMER_CTRL_DEBUGRUN_DEFAULT 0x00000000UL /**< Mode DEFAULT for TIMER_CTRL */ |
| Kojto | 98:8ab26030e058 | 99 | #define TIMER_CTRL_DEBUGRUN_DEFAULT (_TIMER_CTRL_DEBUGRUN_DEFAULT << 6) /**< Shifted mode DEFAULT for TIMER_CTRL */ |
| Kojto | 98:8ab26030e058 | 100 | #define TIMER_CTRL_DMACLRACT (0x1UL << 7) /**< DMA Request Clear on Active */ |
| Kojto | 98:8ab26030e058 | 101 | #define _TIMER_CTRL_DMACLRACT_SHIFT 7 /**< Shift value for TIMER_DMACLRACT */ |
| Kojto | 98:8ab26030e058 | 102 | #define _TIMER_CTRL_DMACLRACT_MASK 0x80UL /**< Bit mask for TIMER_DMACLRACT */ |
| Kojto | 98:8ab26030e058 | 103 | #define _TIMER_CTRL_DMACLRACT_DEFAULT 0x00000000UL /**< Mode DEFAULT for TIMER_CTRL */ |
| Kojto | 98:8ab26030e058 | 104 | #define TIMER_CTRL_DMACLRACT_DEFAULT (_TIMER_CTRL_DMACLRACT_DEFAULT << 7) /**< Shifted mode DEFAULT for TIMER_CTRL */ |
| Kojto | 98:8ab26030e058 | 105 | #define _TIMER_CTRL_RISEA_SHIFT 8 /**< Shift value for TIMER_RISEA */ |
| Kojto | 98:8ab26030e058 | 106 | #define _TIMER_CTRL_RISEA_MASK 0x300UL /**< Bit mask for TIMER_RISEA */ |
| Kojto | 98:8ab26030e058 | 107 | #define _TIMER_CTRL_RISEA_DEFAULT 0x00000000UL /**< Mode DEFAULT for TIMER_CTRL */ |
| Kojto | 98:8ab26030e058 | 108 | #define _TIMER_CTRL_RISEA_NONE 0x00000000UL /**< Mode NONE for TIMER_CTRL */ |
| Kojto | 98:8ab26030e058 | 109 | #define _TIMER_CTRL_RISEA_START 0x00000001UL /**< Mode START for TIMER_CTRL */ |
| Kojto | 98:8ab26030e058 | 110 | #define _TIMER_CTRL_RISEA_STOP 0x00000002UL /**< Mode STOP for TIMER_CTRL */ |
| Kojto | 98:8ab26030e058 | 111 | #define _TIMER_CTRL_RISEA_RELOADSTART 0x00000003UL /**< Mode RELOADSTART for TIMER_CTRL */ |
| Kojto | 98:8ab26030e058 | 112 | #define TIMER_CTRL_RISEA_DEFAULT (_TIMER_CTRL_RISEA_DEFAULT << 8) /**< Shifted mode DEFAULT for TIMER_CTRL */ |
| Kojto | 98:8ab26030e058 | 113 | #define TIMER_CTRL_RISEA_NONE (_TIMER_CTRL_RISEA_NONE << 8) /**< Shifted mode NONE for TIMER_CTRL */ |
| Kojto | 98:8ab26030e058 | 114 | #define TIMER_CTRL_RISEA_START (_TIMER_CTRL_RISEA_START << 8) /**< Shifted mode START for TIMER_CTRL */ |
| Kojto | 98:8ab26030e058 | 115 | #define TIMER_CTRL_RISEA_STOP (_TIMER_CTRL_RISEA_STOP << 8) /**< Shifted mode STOP for TIMER_CTRL */ |
| Kojto | 98:8ab26030e058 | 116 | #define TIMER_CTRL_RISEA_RELOADSTART (_TIMER_CTRL_RISEA_RELOADSTART << 8) /**< Shifted mode RELOADSTART for TIMER_CTRL */ |
| Kojto | 98:8ab26030e058 | 117 | #define _TIMER_CTRL_FALLA_SHIFT 10 /**< Shift value for TIMER_FALLA */ |
| Kojto | 98:8ab26030e058 | 118 | #define _TIMER_CTRL_FALLA_MASK 0xC00UL /**< Bit mask for TIMER_FALLA */ |
| Kojto | 98:8ab26030e058 | 119 | #define _TIMER_CTRL_FALLA_DEFAULT 0x00000000UL /**< Mode DEFAULT for TIMER_CTRL */ |
| Kojto | 98:8ab26030e058 | 120 | #define _TIMER_CTRL_FALLA_NONE 0x00000000UL /**< Mode NONE for TIMER_CTRL */ |
| Kojto | 98:8ab26030e058 | 121 | #define _TIMER_CTRL_FALLA_START 0x00000001UL /**< Mode START for TIMER_CTRL */ |
| Kojto | 98:8ab26030e058 | 122 | #define _TIMER_CTRL_FALLA_STOP 0x00000002UL /**< Mode STOP for TIMER_CTRL */ |
| Kojto | 98:8ab26030e058 | 123 | #define _TIMER_CTRL_FALLA_RELOADSTART 0x00000003UL /**< Mode RELOADSTART for TIMER_CTRL */ |
| Kojto | 98:8ab26030e058 | 124 | #define TIMER_CTRL_FALLA_DEFAULT (_TIMER_CTRL_FALLA_DEFAULT << 10) /**< Shifted mode DEFAULT for TIMER_CTRL */ |
| Kojto | 98:8ab26030e058 | 125 | #define TIMER_CTRL_FALLA_NONE (_TIMER_CTRL_FALLA_NONE << 10) /**< Shifted mode NONE for TIMER_CTRL */ |
| Kojto | 98:8ab26030e058 | 126 | #define TIMER_CTRL_FALLA_START (_TIMER_CTRL_FALLA_START << 10) /**< Shifted mode START for TIMER_CTRL */ |
| Kojto | 98:8ab26030e058 | 127 | #define TIMER_CTRL_FALLA_STOP (_TIMER_CTRL_FALLA_STOP << 10) /**< Shifted mode STOP for TIMER_CTRL */ |
| Kojto | 98:8ab26030e058 | 128 | #define TIMER_CTRL_FALLA_RELOADSTART (_TIMER_CTRL_FALLA_RELOADSTART << 10) /**< Shifted mode RELOADSTART for TIMER_CTRL */ |
| Kojto | 98:8ab26030e058 | 129 | #define TIMER_CTRL_X2CNT (0x1UL << 13) /**< 2x Count Mode */ |
| Kojto | 98:8ab26030e058 | 130 | #define _TIMER_CTRL_X2CNT_SHIFT 13 /**< Shift value for TIMER_X2CNT */ |
| Kojto | 98:8ab26030e058 | 131 | #define _TIMER_CTRL_X2CNT_MASK 0x2000UL /**< Bit mask for TIMER_X2CNT */ |
| Kojto | 98:8ab26030e058 | 132 | #define _TIMER_CTRL_X2CNT_DEFAULT 0x00000000UL /**< Mode DEFAULT for TIMER_CTRL */ |
| Kojto | 98:8ab26030e058 | 133 | #define TIMER_CTRL_X2CNT_DEFAULT (_TIMER_CTRL_X2CNT_DEFAULT << 13) /**< Shifted mode DEFAULT for TIMER_CTRL */ |
| Kojto | 98:8ab26030e058 | 134 | #define _TIMER_CTRL_CLKSEL_SHIFT 16 /**< Shift value for TIMER_CLKSEL */ |
| Kojto | 98:8ab26030e058 | 135 | #define _TIMER_CTRL_CLKSEL_MASK 0x30000UL /**< Bit mask for TIMER_CLKSEL */ |
| Kojto | 98:8ab26030e058 | 136 | #define _TIMER_CTRL_CLKSEL_DEFAULT 0x00000000UL /**< Mode DEFAULT for TIMER_CTRL */ |
| Kojto | 98:8ab26030e058 | 137 | #define _TIMER_CTRL_CLKSEL_PRESCHFPERCLK 0x00000000UL /**< Mode PRESCHFPERCLK for TIMER_CTRL */ |
| Kojto | 98:8ab26030e058 | 138 | #define _TIMER_CTRL_CLKSEL_CC1 0x00000001UL /**< Mode CC1 for TIMER_CTRL */ |
| Kojto | 98:8ab26030e058 | 139 | #define _TIMER_CTRL_CLKSEL_TIMEROUF 0x00000002UL /**< Mode TIMEROUF for TIMER_CTRL */ |
| Kojto | 98:8ab26030e058 | 140 | #define TIMER_CTRL_CLKSEL_DEFAULT (_TIMER_CTRL_CLKSEL_DEFAULT << 16) /**< Shifted mode DEFAULT for TIMER_CTRL */ |
| Kojto | 98:8ab26030e058 | 141 | #define TIMER_CTRL_CLKSEL_PRESCHFPERCLK (_TIMER_CTRL_CLKSEL_PRESCHFPERCLK << 16) /**< Shifted mode PRESCHFPERCLK for TIMER_CTRL */ |
| Kojto | 98:8ab26030e058 | 142 | #define TIMER_CTRL_CLKSEL_CC1 (_TIMER_CTRL_CLKSEL_CC1 << 16) /**< Shifted mode CC1 for TIMER_CTRL */ |
| Kojto | 98:8ab26030e058 | 143 | #define TIMER_CTRL_CLKSEL_TIMEROUF (_TIMER_CTRL_CLKSEL_TIMEROUF << 16) /**< Shifted mode TIMEROUF for TIMER_CTRL */ |
| Kojto | 98:8ab26030e058 | 144 | #define _TIMER_CTRL_PRESC_SHIFT 24 /**< Shift value for TIMER_PRESC */ |
| Kojto | 98:8ab26030e058 | 145 | #define _TIMER_CTRL_PRESC_MASK 0xF000000UL /**< Bit mask for TIMER_PRESC */ |
| Kojto | 98:8ab26030e058 | 146 | #define _TIMER_CTRL_PRESC_DEFAULT 0x00000000UL /**< Mode DEFAULT for TIMER_CTRL */ |
| Kojto | 98:8ab26030e058 | 147 | #define _TIMER_CTRL_PRESC_DIV1 0x00000000UL /**< Mode DIV1 for TIMER_CTRL */ |
| Kojto | 98:8ab26030e058 | 148 | #define _TIMER_CTRL_PRESC_DIV2 0x00000001UL /**< Mode DIV2 for TIMER_CTRL */ |
| Kojto | 98:8ab26030e058 | 149 | #define _TIMER_CTRL_PRESC_DIV4 0x00000002UL /**< Mode DIV4 for TIMER_CTRL */ |
| Kojto | 98:8ab26030e058 | 150 | #define _TIMER_CTRL_PRESC_DIV8 0x00000003UL /**< Mode DIV8 for TIMER_CTRL */ |
| Kojto | 98:8ab26030e058 | 151 | #define _TIMER_CTRL_PRESC_DIV16 0x00000004UL /**< Mode DIV16 for TIMER_CTRL */ |
| Kojto | 98:8ab26030e058 | 152 | #define _TIMER_CTRL_PRESC_DIV32 0x00000005UL /**< Mode DIV32 for TIMER_CTRL */ |
| Kojto | 98:8ab26030e058 | 153 | #define _TIMER_CTRL_PRESC_DIV64 0x00000006UL /**< Mode DIV64 for TIMER_CTRL */ |
| Kojto | 98:8ab26030e058 | 154 | #define _TIMER_CTRL_PRESC_DIV128 0x00000007UL /**< Mode DIV128 for TIMER_CTRL */ |
| Kojto | 98:8ab26030e058 | 155 | #define _TIMER_CTRL_PRESC_DIV256 0x00000008UL /**< Mode DIV256 for TIMER_CTRL */ |
| Kojto | 98:8ab26030e058 | 156 | #define _TIMER_CTRL_PRESC_DIV512 0x00000009UL /**< Mode DIV512 for TIMER_CTRL */ |
| Kojto | 98:8ab26030e058 | 157 | #define _TIMER_CTRL_PRESC_DIV1024 0x0000000AUL /**< Mode DIV1024 for TIMER_CTRL */ |
| Kojto | 98:8ab26030e058 | 158 | #define TIMER_CTRL_PRESC_DEFAULT (_TIMER_CTRL_PRESC_DEFAULT << 24) /**< Shifted mode DEFAULT for TIMER_CTRL */ |
| Kojto | 98:8ab26030e058 | 159 | #define TIMER_CTRL_PRESC_DIV1 (_TIMER_CTRL_PRESC_DIV1 << 24) /**< Shifted mode DIV1 for TIMER_CTRL */ |
| Kojto | 98:8ab26030e058 | 160 | #define TIMER_CTRL_PRESC_DIV2 (_TIMER_CTRL_PRESC_DIV2 << 24) /**< Shifted mode DIV2 for TIMER_CTRL */ |
| Kojto | 98:8ab26030e058 | 161 | #define TIMER_CTRL_PRESC_DIV4 (_TIMER_CTRL_PRESC_DIV4 << 24) /**< Shifted mode DIV4 for TIMER_CTRL */ |
| Kojto | 98:8ab26030e058 | 162 | #define TIMER_CTRL_PRESC_DIV8 (_TIMER_CTRL_PRESC_DIV8 << 24) /**< Shifted mode DIV8 for TIMER_CTRL */ |
| Kojto | 98:8ab26030e058 | 163 | #define TIMER_CTRL_PRESC_DIV16 (_TIMER_CTRL_PRESC_DIV16 << 24) /**< Shifted mode DIV16 for TIMER_CTRL */ |
| Kojto | 98:8ab26030e058 | 164 | #define TIMER_CTRL_PRESC_DIV32 (_TIMER_CTRL_PRESC_DIV32 << 24) /**< Shifted mode DIV32 for TIMER_CTRL */ |
| Kojto | 98:8ab26030e058 | 165 | #define TIMER_CTRL_PRESC_DIV64 (_TIMER_CTRL_PRESC_DIV64 << 24) /**< Shifted mode DIV64 for TIMER_CTRL */ |
| Kojto | 98:8ab26030e058 | 166 | #define TIMER_CTRL_PRESC_DIV128 (_TIMER_CTRL_PRESC_DIV128 << 24) /**< Shifted mode DIV128 for TIMER_CTRL */ |
| Kojto | 98:8ab26030e058 | 167 | #define TIMER_CTRL_PRESC_DIV256 (_TIMER_CTRL_PRESC_DIV256 << 24) /**< Shifted mode DIV256 for TIMER_CTRL */ |
| Kojto | 98:8ab26030e058 | 168 | #define TIMER_CTRL_PRESC_DIV512 (_TIMER_CTRL_PRESC_DIV512 << 24) /**< Shifted mode DIV512 for TIMER_CTRL */ |
| Kojto | 98:8ab26030e058 | 169 | #define TIMER_CTRL_PRESC_DIV1024 (_TIMER_CTRL_PRESC_DIV1024 << 24) /**< Shifted mode DIV1024 for TIMER_CTRL */ |
| Kojto | 98:8ab26030e058 | 170 | #define TIMER_CTRL_ATI (0x1UL << 28) /**< Always Track Inputs */ |
| Kojto | 98:8ab26030e058 | 171 | #define _TIMER_CTRL_ATI_SHIFT 28 /**< Shift value for TIMER_ATI */ |
| Kojto | 98:8ab26030e058 | 172 | #define _TIMER_CTRL_ATI_MASK 0x10000000UL /**< Bit mask for TIMER_ATI */ |
| Kojto | 98:8ab26030e058 | 173 | #define _TIMER_CTRL_ATI_DEFAULT 0x00000000UL /**< Mode DEFAULT for TIMER_CTRL */ |
| Kojto | 98:8ab26030e058 | 174 | #define TIMER_CTRL_ATI_DEFAULT (_TIMER_CTRL_ATI_DEFAULT << 28) /**< Shifted mode DEFAULT for TIMER_CTRL */ |
| Kojto | 98:8ab26030e058 | 175 | #define TIMER_CTRL_RSSCOIST (0x1UL << 29) /**< Reload-Start Sets Compare Ouptut initial State */ |
| Kojto | 98:8ab26030e058 | 176 | #define _TIMER_CTRL_RSSCOIST_SHIFT 29 /**< Shift value for TIMER_RSSCOIST */ |
| Kojto | 98:8ab26030e058 | 177 | #define _TIMER_CTRL_RSSCOIST_MASK 0x20000000UL /**< Bit mask for TIMER_RSSCOIST */ |
| Kojto | 98:8ab26030e058 | 178 | #define _TIMER_CTRL_RSSCOIST_DEFAULT 0x00000000UL /**< Mode DEFAULT for TIMER_CTRL */ |
| Kojto | 98:8ab26030e058 | 179 | #define TIMER_CTRL_RSSCOIST_DEFAULT (_TIMER_CTRL_RSSCOIST_DEFAULT << 29) /**< Shifted mode DEFAULT for TIMER_CTRL */ |
| Kojto | 98:8ab26030e058 | 180 | |
| Kojto | 98:8ab26030e058 | 181 | /* Bit fields for TIMER CMD */ |
| Kojto | 98:8ab26030e058 | 182 | #define _TIMER_CMD_RESETVALUE 0x00000000UL /**< Default value for TIMER_CMD */ |
| Kojto | 98:8ab26030e058 | 183 | #define _TIMER_CMD_MASK 0x00000003UL /**< Mask for TIMER_CMD */ |
| Kojto | 98:8ab26030e058 | 184 | #define TIMER_CMD_START (0x1UL << 0) /**< Start Timer */ |
| Kojto | 98:8ab26030e058 | 185 | #define _TIMER_CMD_START_SHIFT 0 /**< Shift value for TIMER_START */ |
| Kojto | 98:8ab26030e058 | 186 | #define _TIMER_CMD_START_MASK 0x1UL /**< Bit mask for TIMER_START */ |
| Kojto | 98:8ab26030e058 | 187 | #define _TIMER_CMD_START_DEFAULT 0x00000000UL /**< Mode DEFAULT for TIMER_CMD */ |
| Kojto | 98:8ab26030e058 | 188 | #define TIMER_CMD_START_DEFAULT (_TIMER_CMD_START_DEFAULT << 0) /**< Shifted mode DEFAULT for TIMER_CMD */ |
| Kojto | 98:8ab26030e058 | 189 | #define TIMER_CMD_STOP (0x1UL << 1) /**< Stop Timer */ |
| Kojto | 98:8ab26030e058 | 190 | #define _TIMER_CMD_STOP_SHIFT 1 /**< Shift value for TIMER_STOP */ |
| Kojto | 98:8ab26030e058 | 191 | #define _TIMER_CMD_STOP_MASK 0x2UL /**< Bit mask for TIMER_STOP */ |
| Kojto | 98:8ab26030e058 | 192 | #define _TIMER_CMD_STOP_DEFAULT 0x00000000UL /**< Mode DEFAULT for TIMER_CMD */ |
| Kojto | 98:8ab26030e058 | 193 | #define TIMER_CMD_STOP_DEFAULT (_TIMER_CMD_STOP_DEFAULT << 1) /**< Shifted mode DEFAULT for TIMER_CMD */ |
| Kojto | 98:8ab26030e058 | 194 | |
| Kojto | 98:8ab26030e058 | 195 | /* Bit fields for TIMER STATUS */ |
| Kojto | 98:8ab26030e058 | 196 | #define _TIMER_STATUS_RESETVALUE 0x00000000UL /**< Default value for TIMER_STATUS */ |
| Kojto | 98:8ab26030e058 | 197 | #define _TIMER_STATUS_MASK 0x07070707UL /**< Mask for TIMER_STATUS */ |
| Kojto | 98:8ab26030e058 | 198 | #define TIMER_STATUS_RUNNING (0x1UL << 0) /**< Running */ |
| Kojto | 98:8ab26030e058 | 199 | #define _TIMER_STATUS_RUNNING_SHIFT 0 /**< Shift value for TIMER_RUNNING */ |
| Kojto | 98:8ab26030e058 | 200 | #define _TIMER_STATUS_RUNNING_MASK 0x1UL /**< Bit mask for TIMER_RUNNING */ |
| Kojto | 98:8ab26030e058 | 201 | #define _TIMER_STATUS_RUNNING_DEFAULT 0x00000000UL /**< Mode DEFAULT for TIMER_STATUS */ |
| Kojto | 98:8ab26030e058 | 202 | #define TIMER_STATUS_RUNNING_DEFAULT (_TIMER_STATUS_RUNNING_DEFAULT << 0) /**< Shifted mode DEFAULT for TIMER_STATUS */ |
| Kojto | 98:8ab26030e058 | 203 | #define TIMER_STATUS_DIR (0x1UL << 1) /**< Direction */ |
| Kojto | 98:8ab26030e058 | 204 | #define _TIMER_STATUS_DIR_SHIFT 1 /**< Shift value for TIMER_DIR */ |
| Kojto | 98:8ab26030e058 | 205 | #define _TIMER_STATUS_DIR_MASK 0x2UL /**< Bit mask for TIMER_DIR */ |
| Kojto | 98:8ab26030e058 | 206 | #define _TIMER_STATUS_DIR_DEFAULT 0x00000000UL /**< Mode DEFAULT for TIMER_STATUS */ |
| Kojto | 98:8ab26030e058 | 207 | #define _TIMER_STATUS_DIR_UP 0x00000000UL /**< Mode UP for TIMER_STATUS */ |
| Kojto | 98:8ab26030e058 | 208 | #define _TIMER_STATUS_DIR_DOWN 0x00000001UL /**< Mode DOWN for TIMER_STATUS */ |
| Kojto | 98:8ab26030e058 | 209 | #define TIMER_STATUS_DIR_DEFAULT (_TIMER_STATUS_DIR_DEFAULT << 1) /**< Shifted mode DEFAULT for TIMER_STATUS */ |
| Kojto | 98:8ab26030e058 | 210 | #define TIMER_STATUS_DIR_UP (_TIMER_STATUS_DIR_UP << 1) /**< Shifted mode UP for TIMER_STATUS */ |
| Kojto | 98:8ab26030e058 | 211 | #define TIMER_STATUS_DIR_DOWN (_TIMER_STATUS_DIR_DOWN << 1) /**< Shifted mode DOWN for TIMER_STATUS */ |
| Kojto | 98:8ab26030e058 | 212 | #define TIMER_STATUS_TOPBV (0x1UL << 2) /**< TOPB Valid */ |
| Kojto | 98:8ab26030e058 | 213 | #define _TIMER_STATUS_TOPBV_SHIFT 2 /**< Shift value for TIMER_TOPBV */ |
| Kojto | 98:8ab26030e058 | 214 | #define _TIMER_STATUS_TOPBV_MASK 0x4UL /**< Bit mask for TIMER_TOPBV */ |
| Kojto | 98:8ab26030e058 | 215 | #define _TIMER_STATUS_TOPBV_DEFAULT 0x00000000UL /**< Mode DEFAULT for TIMER_STATUS */ |
| Kojto | 98:8ab26030e058 | 216 | #define TIMER_STATUS_TOPBV_DEFAULT (_TIMER_STATUS_TOPBV_DEFAULT << 2) /**< Shifted mode DEFAULT for TIMER_STATUS */ |
| Kojto | 98:8ab26030e058 | 217 | #define TIMER_STATUS_CCVBV0 (0x1UL << 8) /**< CC0 CCVB Valid */ |
| Kojto | 98:8ab26030e058 | 218 | #define _TIMER_STATUS_CCVBV0_SHIFT 8 /**< Shift value for TIMER_CCVBV0 */ |
| Kojto | 98:8ab26030e058 | 219 | #define _TIMER_STATUS_CCVBV0_MASK 0x100UL /**< Bit mask for TIMER_CCVBV0 */ |
| Kojto | 98:8ab26030e058 | 220 | #define _TIMER_STATUS_CCVBV0_DEFAULT 0x00000000UL /**< Mode DEFAULT for TIMER_STATUS */ |
| Kojto | 98:8ab26030e058 | 221 | #define TIMER_STATUS_CCVBV0_DEFAULT (_TIMER_STATUS_CCVBV0_DEFAULT << 8) /**< Shifted mode DEFAULT for TIMER_STATUS */ |
| Kojto | 98:8ab26030e058 | 222 | #define TIMER_STATUS_CCVBV1 (0x1UL << 9) /**< CC1 CCVB Valid */ |
| Kojto | 98:8ab26030e058 | 223 | #define _TIMER_STATUS_CCVBV1_SHIFT 9 /**< Shift value for TIMER_CCVBV1 */ |
| Kojto | 98:8ab26030e058 | 224 | #define _TIMER_STATUS_CCVBV1_MASK 0x200UL /**< Bit mask for TIMER_CCVBV1 */ |
| Kojto | 98:8ab26030e058 | 225 | #define _TIMER_STATUS_CCVBV1_DEFAULT 0x00000000UL /**< Mode DEFAULT for TIMER_STATUS */ |
| Kojto | 98:8ab26030e058 | 226 | #define TIMER_STATUS_CCVBV1_DEFAULT (_TIMER_STATUS_CCVBV1_DEFAULT << 9) /**< Shifted mode DEFAULT for TIMER_STATUS */ |
| Kojto | 98:8ab26030e058 | 227 | #define TIMER_STATUS_CCVBV2 (0x1UL << 10) /**< CC2 CCVB Valid */ |
| Kojto | 98:8ab26030e058 | 228 | #define _TIMER_STATUS_CCVBV2_SHIFT 10 /**< Shift value for TIMER_CCVBV2 */ |
| Kojto | 98:8ab26030e058 | 229 | #define _TIMER_STATUS_CCVBV2_MASK 0x400UL /**< Bit mask for TIMER_CCVBV2 */ |
| Kojto | 98:8ab26030e058 | 230 | #define _TIMER_STATUS_CCVBV2_DEFAULT 0x00000000UL /**< Mode DEFAULT for TIMER_STATUS */ |
| Kojto | 98:8ab26030e058 | 231 | #define TIMER_STATUS_CCVBV2_DEFAULT (_TIMER_STATUS_CCVBV2_DEFAULT << 10) /**< Shifted mode DEFAULT for TIMER_STATUS */ |
| Kojto | 98:8ab26030e058 | 232 | #define TIMER_STATUS_ICV0 (0x1UL << 16) /**< CC0 Input Capture Valid */ |
| Kojto | 98:8ab26030e058 | 233 | #define _TIMER_STATUS_ICV0_SHIFT 16 /**< Shift value for TIMER_ICV0 */ |
| Kojto | 98:8ab26030e058 | 234 | #define _TIMER_STATUS_ICV0_MASK 0x10000UL /**< Bit mask for TIMER_ICV0 */ |
| Kojto | 98:8ab26030e058 | 235 | #define _TIMER_STATUS_ICV0_DEFAULT 0x00000000UL /**< Mode DEFAULT for TIMER_STATUS */ |
| Kojto | 98:8ab26030e058 | 236 | #define TIMER_STATUS_ICV0_DEFAULT (_TIMER_STATUS_ICV0_DEFAULT << 16) /**< Shifted mode DEFAULT for TIMER_STATUS */ |
| Kojto | 98:8ab26030e058 | 237 | #define TIMER_STATUS_ICV1 (0x1UL << 17) /**< CC1 Input Capture Valid */ |
| Kojto | 98:8ab26030e058 | 238 | #define _TIMER_STATUS_ICV1_SHIFT 17 /**< Shift value for TIMER_ICV1 */ |
| Kojto | 98:8ab26030e058 | 239 | #define _TIMER_STATUS_ICV1_MASK 0x20000UL /**< Bit mask for TIMER_ICV1 */ |
| Kojto | 98:8ab26030e058 | 240 | #define _TIMER_STATUS_ICV1_DEFAULT 0x00000000UL /**< Mode DEFAULT for TIMER_STATUS */ |
| Kojto | 98:8ab26030e058 | 241 | #define TIMER_STATUS_ICV1_DEFAULT (_TIMER_STATUS_ICV1_DEFAULT << 17) /**< Shifted mode DEFAULT for TIMER_STATUS */ |
| Kojto | 98:8ab26030e058 | 242 | #define TIMER_STATUS_ICV2 (0x1UL << 18) /**< CC2 Input Capture Valid */ |
| Kojto | 98:8ab26030e058 | 243 | #define _TIMER_STATUS_ICV2_SHIFT 18 /**< Shift value for TIMER_ICV2 */ |
| Kojto | 98:8ab26030e058 | 244 | #define _TIMER_STATUS_ICV2_MASK 0x40000UL /**< Bit mask for TIMER_ICV2 */ |
| Kojto | 98:8ab26030e058 | 245 | #define _TIMER_STATUS_ICV2_DEFAULT 0x00000000UL /**< Mode DEFAULT for TIMER_STATUS */ |
| Kojto | 98:8ab26030e058 | 246 | #define TIMER_STATUS_ICV2_DEFAULT (_TIMER_STATUS_ICV2_DEFAULT << 18) /**< Shifted mode DEFAULT for TIMER_STATUS */ |
| Kojto | 98:8ab26030e058 | 247 | #define TIMER_STATUS_CCPOL0 (0x1UL << 24) /**< CC0 Polarity */ |
| Kojto | 98:8ab26030e058 | 248 | #define _TIMER_STATUS_CCPOL0_SHIFT 24 /**< Shift value for TIMER_CCPOL0 */ |
| Kojto | 98:8ab26030e058 | 249 | #define _TIMER_STATUS_CCPOL0_MASK 0x1000000UL /**< Bit mask for TIMER_CCPOL0 */ |
| Kojto | 98:8ab26030e058 | 250 | #define _TIMER_STATUS_CCPOL0_DEFAULT 0x00000000UL /**< Mode DEFAULT for TIMER_STATUS */ |
| Kojto | 98:8ab26030e058 | 251 | #define _TIMER_STATUS_CCPOL0_LOWRISE 0x00000000UL /**< Mode LOWRISE for TIMER_STATUS */ |
| Kojto | 98:8ab26030e058 | 252 | #define _TIMER_STATUS_CCPOL0_HIGHFALL 0x00000001UL /**< Mode HIGHFALL for TIMER_STATUS */ |
| Kojto | 98:8ab26030e058 | 253 | #define TIMER_STATUS_CCPOL0_DEFAULT (_TIMER_STATUS_CCPOL0_DEFAULT << 24) /**< Shifted mode DEFAULT for TIMER_STATUS */ |
| Kojto | 98:8ab26030e058 | 254 | #define TIMER_STATUS_CCPOL0_LOWRISE (_TIMER_STATUS_CCPOL0_LOWRISE << 24) /**< Shifted mode LOWRISE for TIMER_STATUS */ |
| Kojto | 98:8ab26030e058 | 255 | #define TIMER_STATUS_CCPOL0_HIGHFALL (_TIMER_STATUS_CCPOL0_HIGHFALL << 24) /**< Shifted mode HIGHFALL for TIMER_STATUS */ |
| Kojto | 98:8ab26030e058 | 256 | #define TIMER_STATUS_CCPOL1 (0x1UL << 25) /**< CC1 Polarity */ |
| Kojto | 98:8ab26030e058 | 257 | #define _TIMER_STATUS_CCPOL1_SHIFT 25 /**< Shift value for TIMER_CCPOL1 */ |
| Kojto | 98:8ab26030e058 | 258 | #define _TIMER_STATUS_CCPOL1_MASK 0x2000000UL /**< Bit mask for TIMER_CCPOL1 */ |
| Kojto | 98:8ab26030e058 | 259 | #define _TIMER_STATUS_CCPOL1_DEFAULT 0x00000000UL /**< Mode DEFAULT for TIMER_STATUS */ |
| Kojto | 98:8ab26030e058 | 260 | #define _TIMER_STATUS_CCPOL1_LOWRISE 0x00000000UL /**< Mode LOWRISE for TIMER_STATUS */ |
| Kojto | 98:8ab26030e058 | 261 | #define _TIMER_STATUS_CCPOL1_HIGHFALL 0x00000001UL /**< Mode HIGHFALL for TIMER_STATUS */ |
| Kojto | 98:8ab26030e058 | 262 | #define TIMER_STATUS_CCPOL1_DEFAULT (_TIMER_STATUS_CCPOL1_DEFAULT << 25) /**< Shifted mode DEFAULT for TIMER_STATUS */ |
| Kojto | 98:8ab26030e058 | 263 | #define TIMER_STATUS_CCPOL1_LOWRISE (_TIMER_STATUS_CCPOL1_LOWRISE << 25) /**< Shifted mode LOWRISE for TIMER_STATUS */ |
| Kojto | 98:8ab26030e058 | 264 | #define TIMER_STATUS_CCPOL1_HIGHFALL (_TIMER_STATUS_CCPOL1_HIGHFALL << 25) /**< Shifted mode HIGHFALL for TIMER_STATUS */ |
| Kojto | 98:8ab26030e058 | 265 | #define TIMER_STATUS_CCPOL2 (0x1UL << 26) /**< CC2 Polarity */ |
| Kojto | 98:8ab26030e058 | 266 | #define _TIMER_STATUS_CCPOL2_SHIFT 26 /**< Shift value for TIMER_CCPOL2 */ |
| Kojto | 98:8ab26030e058 | 267 | #define _TIMER_STATUS_CCPOL2_MASK 0x4000000UL /**< Bit mask for TIMER_CCPOL2 */ |
| Kojto | 98:8ab26030e058 | 268 | #define _TIMER_STATUS_CCPOL2_DEFAULT 0x00000000UL /**< Mode DEFAULT for TIMER_STATUS */ |
| Kojto | 98:8ab26030e058 | 269 | #define _TIMER_STATUS_CCPOL2_LOWRISE 0x00000000UL /**< Mode LOWRISE for TIMER_STATUS */ |
| Kojto | 98:8ab26030e058 | 270 | #define _TIMER_STATUS_CCPOL2_HIGHFALL 0x00000001UL /**< Mode HIGHFALL for TIMER_STATUS */ |
| Kojto | 98:8ab26030e058 | 271 | #define TIMER_STATUS_CCPOL2_DEFAULT (_TIMER_STATUS_CCPOL2_DEFAULT << 26) /**< Shifted mode DEFAULT for TIMER_STATUS */ |
| Kojto | 98:8ab26030e058 | 272 | #define TIMER_STATUS_CCPOL2_LOWRISE (_TIMER_STATUS_CCPOL2_LOWRISE << 26) /**< Shifted mode LOWRISE for TIMER_STATUS */ |
| Kojto | 98:8ab26030e058 | 273 | #define TIMER_STATUS_CCPOL2_HIGHFALL (_TIMER_STATUS_CCPOL2_HIGHFALL << 26) /**< Shifted mode HIGHFALL for TIMER_STATUS */ |
| Kojto | 98:8ab26030e058 | 274 | |
| Kojto | 98:8ab26030e058 | 275 | /* Bit fields for TIMER IEN */ |
| Kojto | 98:8ab26030e058 | 276 | #define _TIMER_IEN_RESETVALUE 0x00000000UL /**< Default value for TIMER_IEN */ |
| Kojto | 98:8ab26030e058 | 277 | #define _TIMER_IEN_MASK 0x00000773UL /**< Mask for TIMER_IEN */ |
| Kojto | 98:8ab26030e058 | 278 | #define TIMER_IEN_OF (0x1UL << 0) /**< Overflow Interrupt Enable */ |
| Kojto | 98:8ab26030e058 | 279 | #define _TIMER_IEN_OF_SHIFT 0 /**< Shift value for TIMER_OF */ |
| Kojto | 98:8ab26030e058 | 280 | #define _TIMER_IEN_OF_MASK 0x1UL /**< Bit mask for TIMER_OF */ |
| Kojto | 98:8ab26030e058 | 281 | #define _TIMER_IEN_OF_DEFAULT 0x00000000UL /**< Mode DEFAULT for TIMER_IEN */ |
| Kojto | 98:8ab26030e058 | 282 | #define TIMER_IEN_OF_DEFAULT (_TIMER_IEN_OF_DEFAULT << 0) /**< Shifted mode DEFAULT for TIMER_IEN */ |
| Kojto | 98:8ab26030e058 | 283 | #define TIMER_IEN_UF (0x1UL << 1) /**< Underflow Interrupt Enable */ |
| Kojto | 98:8ab26030e058 | 284 | #define _TIMER_IEN_UF_SHIFT 1 /**< Shift value for TIMER_UF */ |
| Kojto | 98:8ab26030e058 | 285 | #define _TIMER_IEN_UF_MASK 0x2UL /**< Bit mask for TIMER_UF */ |
| Kojto | 98:8ab26030e058 | 286 | #define _TIMER_IEN_UF_DEFAULT 0x00000000UL /**< Mode DEFAULT for TIMER_IEN */ |
| Kojto | 98:8ab26030e058 | 287 | #define TIMER_IEN_UF_DEFAULT (_TIMER_IEN_UF_DEFAULT << 1) /**< Shifted mode DEFAULT for TIMER_IEN */ |
| Kojto | 98:8ab26030e058 | 288 | #define TIMER_IEN_CC0 (0x1UL << 4) /**< CC Channel 0 Interrupt Enable */ |
| Kojto | 98:8ab26030e058 | 289 | #define _TIMER_IEN_CC0_SHIFT 4 /**< Shift value for TIMER_CC0 */ |
| Kojto | 98:8ab26030e058 | 290 | #define _TIMER_IEN_CC0_MASK 0x10UL /**< Bit mask for TIMER_CC0 */ |
| Kojto | 98:8ab26030e058 | 291 | #define _TIMER_IEN_CC0_DEFAULT 0x00000000UL /**< Mode DEFAULT for TIMER_IEN */ |
| Kojto | 98:8ab26030e058 | 292 | #define TIMER_IEN_CC0_DEFAULT (_TIMER_IEN_CC0_DEFAULT << 4) /**< Shifted mode DEFAULT for TIMER_IEN */ |
| Kojto | 98:8ab26030e058 | 293 | #define TIMER_IEN_CC1 (0x1UL << 5) /**< CC Channel 1 Interrupt Enable */ |
| Kojto | 98:8ab26030e058 | 294 | #define _TIMER_IEN_CC1_SHIFT 5 /**< Shift value for TIMER_CC1 */ |
| Kojto | 98:8ab26030e058 | 295 | #define _TIMER_IEN_CC1_MASK 0x20UL /**< Bit mask for TIMER_CC1 */ |
| Kojto | 98:8ab26030e058 | 296 | #define _TIMER_IEN_CC1_DEFAULT 0x00000000UL /**< Mode DEFAULT for TIMER_IEN */ |
| Kojto | 98:8ab26030e058 | 297 | #define TIMER_IEN_CC1_DEFAULT (_TIMER_IEN_CC1_DEFAULT << 5) /**< Shifted mode DEFAULT for TIMER_IEN */ |
| Kojto | 98:8ab26030e058 | 298 | #define TIMER_IEN_CC2 (0x1UL << 6) /**< CC Channel 2 Interrupt Enable */ |
| Kojto | 98:8ab26030e058 | 299 | #define _TIMER_IEN_CC2_SHIFT 6 /**< Shift value for TIMER_CC2 */ |
| Kojto | 98:8ab26030e058 | 300 | #define _TIMER_IEN_CC2_MASK 0x40UL /**< Bit mask for TIMER_CC2 */ |
| Kojto | 98:8ab26030e058 | 301 | #define _TIMER_IEN_CC2_DEFAULT 0x00000000UL /**< Mode DEFAULT for TIMER_IEN */ |
| Kojto | 98:8ab26030e058 | 302 | #define TIMER_IEN_CC2_DEFAULT (_TIMER_IEN_CC2_DEFAULT << 6) /**< Shifted mode DEFAULT for TIMER_IEN */ |
| Kojto | 98:8ab26030e058 | 303 | #define TIMER_IEN_ICBOF0 (0x1UL << 8) /**< CC Channel 0 Input Capture Buffer Overflow Interrupt Enable */ |
| Kojto | 98:8ab26030e058 | 304 | #define _TIMER_IEN_ICBOF0_SHIFT 8 /**< Shift value for TIMER_ICBOF0 */ |
| Kojto | 98:8ab26030e058 | 305 | #define _TIMER_IEN_ICBOF0_MASK 0x100UL /**< Bit mask for TIMER_ICBOF0 */ |
| Kojto | 98:8ab26030e058 | 306 | #define _TIMER_IEN_ICBOF0_DEFAULT 0x00000000UL /**< Mode DEFAULT for TIMER_IEN */ |
| Kojto | 98:8ab26030e058 | 307 | #define TIMER_IEN_ICBOF0_DEFAULT (_TIMER_IEN_ICBOF0_DEFAULT << 8) /**< Shifted mode DEFAULT for TIMER_IEN */ |
| Kojto | 98:8ab26030e058 | 308 | #define TIMER_IEN_ICBOF1 (0x1UL << 9) /**< CC Channel 1 Input Capture Buffer Overflow Interrupt Enable */ |
| Kojto | 98:8ab26030e058 | 309 | #define _TIMER_IEN_ICBOF1_SHIFT 9 /**< Shift value for TIMER_ICBOF1 */ |
| Kojto | 98:8ab26030e058 | 310 | #define _TIMER_IEN_ICBOF1_MASK 0x200UL /**< Bit mask for TIMER_ICBOF1 */ |
| Kojto | 98:8ab26030e058 | 311 | #define _TIMER_IEN_ICBOF1_DEFAULT 0x00000000UL /**< Mode DEFAULT for TIMER_IEN */ |
| Kojto | 98:8ab26030e058 | 312 | #define TIMER_IEN_ICBOF1_DEFAULT (_TIMER_IEN_ICBOF1_DEFAULT << 9) /**< Shifted mode DEFAULT for TIMER_IEN */ |
| Kojto | 98:8ab26030e058 | 313 | #define TIMER_IEN_ICBOF2 (0x1UL << 10) /**< CC Channel 2 Input Capture Buffer Overflow Interrupt Enable */ |
| Kojto | 98:8ab26030e058 | 314 | #define _TIMER_IEN_ICBOF2_SHIFT 10 /**< Shift value for TIMER_ICBOF2 */ |
| Kojto | 98:8ab26030e058 | 315 | #define _TIMER_IEN_ICBOF2_MASK 0x400UL /**< Bit mask for TIMER_ICBOF2 */ |
| Kojto | 98:8ab26030e058 | 316 | #define _TIMER_IEN_ICBOF2_DEFAULT 0x00000000UL /**< Mode DEFAULT for TIMER_IEN */ |
| Kojto | 98:8ab26030e058 | 317 | #define TIMER_IEN_ICBOF2_DEFAULT (_TIMER_IEN_ICBOF2_DEFAULT << 10) /**< Shifted mode DEFAULT for TIMER_IEN */ |
| Kojto | 98:8ab26030e058 | 318 | |
| Kojto | 98:8ab26030e058 | 319 | /* Bit fields for TIMER IF */ |
| Kojto | 98:8ab26030e058 | 320 | #define _TIMER_IF_RESETVALUE 0x00000000UL /**< Default value for TIMER_IF */ |
| Kojto | 98:8ab26030e058 | 321 | #define _TIMER_IF_MASK 0x00000773UL /**< Mask for TIMER_IF */ |
| Kojto | 98:8ab26030e058 | 322 | #define TIMER_IF_OF (0x1UL << 0) /**< Overflow Interrupt Flag */ |
| Kojto | 98:8ab26030e058 | 323 | #define _TIMER_IF_OF_SHIFT 0 /**< Shift value for TIMER_OF */ |
| Kojto | 98:8ab26030e058 | 324 | #define _TIMER_IF_OF_MASK 0x1UL /**< Bit mask for TIMER_OF */ |
| Kojto | 98:8ab26030e058 | 325 | #define _TIMER_IF_OF_DEFAULT 0x00000000UL /**< Mode DEFAULT for TIMER_IF */ |
| Kojto | 98:8ab26030e058 | 326 | #define TIMER_IF_OF_DEFAULT (_TIMER_IF_OF_DEFAULT << 0) /**< Shifted mode DEFAULT for TIMER_IF */ |
| Kojto | 98:8ab26030e058 | 327 | #define TIMER_IF_UF (0x1UL << 1) /**< Underflow Interrupt Flag */ |
| Kojto | 98:8ab26030e058 | 328 | #define _TIMER_IF_UF_SHIFT 1 /**< Shift value for TIMER_UF */ |
| Kojto | 98:8ab26030e058 | 329 | #define _TIMER_IF_UF_MASK 0x2UL /**< Bit mask for TIMER_UF */ |
| Kojto | 98:8ab26030e058 | 330 | #define _TIMER_IF_UF_DEFAULT 0x00000000UL /**< Mode DEFAULT for TIMER_IF */ |
| Kojto | 98:8ab26030e058 | 331 | #define TIMER_IF_UF_DEFAULT (_TIMER_IF_UF_DEFAULT << 1) /**< Shifted mode DEFAULT for TIMER_IF */ |
| Kojto | 98:8ab26030e058 | 332 | #define TIMER_IF_CC0 (0x1UL << 4) /**< CC Channel 0 Interrupt Flag */ |
| Kojto | 98:8ab26030e058 | 333 | #define _TIMER_IF_CC0_SHIFT 4 /**< Shift value for TIMER_CC0 */ |
| Kojto | 98:8ab26030e058 | 334 | #define _TIMER_IF_CC0_MASK 0x10UL /**< Bit mask for TIMER_CC0 */ |
| Kojto | 98:8ab26030e058 | 335 | #define _TIMER_IF_CC0_DEFAULT 0x00000000UL /**< Mode DEFAULT for TIMER_IF */ |
| Kojto | 98:8ab26030e058 | 336 | #define TIMER_IF_CC0_DEFAULT (_TIMER_IF_CC0_DEFAULT << 4) /**< Shifted mode DEFAULT for TIMER_IF */ |
| Kojto | 98:8ab26030e058 | 337 | #define TIMER_IF_CC1 (0x1UL << 5) /**< CC Channel 1 Interrupt Flag */ |
| Kojto | 98:8ab26030e058 | 338 | #define _TIMER_IF_CC1_SHIFT 5 /**< Shift value for TIMER_CC1 */ |
| Kojto | 98:8ab26030e058 | 339 | #define _TIMER_IF_CC1_MASK 0x20UL /**< Bit mask for TIMER_CC1 */ |
| Kojto | 98:8ab26030e058 | 340 | #define _TIMER_IF_CC1_DEFAULT 0x00000000UL /**< Mode DEFAULT for TIMER_IF */ |
| Kojto | 98:8ab26030e058 | 341 | #define TIMER_IF_CC1_DEFAULT (_TIMER_IF_CC1_DEFAULT << 5) /**< Shifted mode DEFAULT for TIMER_IF */ |
| Kojto | 98:8ab26030e058 | 342 | #define TIMER_IF_CC2 (0x1UL << 6) /**< CC Channel 2 Interrupt Flag */ |
| Kojto | 98:8ab26030e058 | 343 | #define _TIMER_IF_CC2_SHIFT 6 /**< Shift value for TIMER_CC2 */ |
| Kojto | 98:8ab26030e058 | 344 | #define _TIMER_IF_CC2_MASK 0x40UL /**< Bit mask for TIMER_CC2 */ |
| Kojto | 98:8ab26030e058 | 345 | #define _TIMER_IF_CC2_DEFAULT 0x00000000UL /**< Mode DEFAULT for TIMER_IF */ |
| Kojto | 98:8ab26030e058 | 346 | #define TIMER_IF_CC2_DEFAULT (_TIMER_IF_CC2_DEFAULT << 6) /**< Shifted mode DEFAULT for TIMER_IF */ |
| Kojto | 98:8ab26030e058 | 347 | #define TIMER_IF_ICBOF0 (0x1UL << 8) /**< CC Channel 0 Input Capture Buffer Overflow Interrupt Flag */ |
| Kojto | 98:8ab26030e058 | 348 | #define _TIMER_IF_ICBOF0_SHIFT 8 /**< Shift value for TIMER_ICBOF0 */ |
| Kojto | 98:8ab26030e058 | 349 | #define _TIMER_IF_ICBOF0_MASK 0x100UL /**< Bit mask for TIMER_ICBOF0 */ |
| Kojto | 98:8ab26030e058 | 350 | #define _TIMER_IF_ICBOF0_DEFAULT 0x00000000UL /**< Mode DEFAULT for TIMER_IF */ |
| Kojto | 98:8ab26030e058 | 351 | #define TIMER_IF_ICBOF0_DEFAULT (_TIMER_IF_ICBOF0_DEFAULT << 8) /**< Shifted mode DEFAULT for TIMER_IF */ |
| Kojto | 98:8ab26030e058 | 352 | #define TIMER_IF_ICBOF1 (0x1UL << 9) /**< CC Channel 1 Input Capture Buffer Overflow Interrupt Flag */ |
| Kojto | 98:8ab26030e058 | 353 | #define _TIMER_IF_ICBOF1_SHIFT 9 /**< Shift value for TIMER_ICBOF1 */ |
| Kojto | 98:8ab26030e058 | 354 | #define _TIMER_IF_ICBOF1_MASK 0x200UL /**< Bit mask for TIMER_ICBOF1 */ |
| Kojto | 98:8ab26030e058 | 355 | #define _TIMER_IF_ICBOF1_DEFAULT 0x00000000UL /**< Mode DEFAULT for TIMER_IF */ |
| Kojto | 98:8ab26030e058 | 356 | #define TIMER_IF_ICBOF1_DEFAULT (_TIMER_IF_ICBOF1_DEFAULT << 9) /**< Shifted mode DEFAULT for TIMER_IF */ |
| Kojto | 98:8ab26030e058 | 357 | #define TIMER_IF_ICBOF2 (0x1UL << 10) /**< CC Channel 2 Input Capture Buffer Overflow Interrupt Flag */ |
| Kojto | 98:8ab26030e058 | 358 | #define _TIMER_IF_ICBOF2_SHIFT 10 /**< Shift value for TIMER_ICBOF2 */ |
| Kojto | 98:8ab26030e058 | 359 | #define _TIMER_IF_ICBOF2_MASK 0x400UL /**< Bit mask for TIMER_ICBOF2 */ |
| Kojto | 98:8ab26030e058 | 360 | #define _TIMER_IF_ICBOF2_DEFAULT 0x00000000UL /**< Mode DEFAULT for TIMER_IF */ |
| Kojto | 98:8ab26030e058 | 361 | #define TIMER_IF_ICBOF2_DEFAULT (_TIMER_IF_ICBOF2_DEFAULT << 10) /**< Shifted mode DEFAULT for TIMER_IF */ |
| Kojto | 98:8ab26030e058 | 362 | |
| Kojto | 98:8ab26030e058 | 363 | /* Bit fields for TIMER IFS */ |
| Kojto | 98:8ab26030e058 | 364 | #define _TIMER_IFS_RESETVALUE 0x00000000UL /**< Default value for TIMER_IFS */ |
| Kojto | 98:8ab26030e058 | 365 | #define _TIMER_IFS_MASK 0x00000773UL /**< Mask for TIMER_IFS */ |
| Kojto | 98:8ab26030e058 | 366 | #define TIMER_IFS_OF (0x1UL << 0) /**< Overflow Interrupt Flag Set */ |
| Kojto | 98:8ab26030e058 | 367 | #define _TIMER_IFS_OF_SHIFT 0 /**< Shift value for TIMER_OF */ |
| Kojto | 98:8ab26030e058 | 368 | #define _TIMER_IFS_OF_MASK 0x1UL /**< Bit mask for TIMER_OF */ |
| Kojto | 98:8ab26030e058 | 369 | #define _TIMER_IFS_OF_DEFAULT 0x00000000UL /**< Mode DEFAULT for TIMER_IFS */ |
| Kojto | 98:8ab26030e058 | 370 | #define TIMER_IFS_OF_DEFAULT (_TIMER_IFS_OF_DEFAULT << 0) /**< Shifted mode DEFAULT for TIMER_IFS */ |
| Kojto | 98:8ab26030e058 | 371 | #define TIMER_IFS_UF (0x1UL << 1) /**< Underflow Interrupt Flag Set */ |
| Kojto | 98:8ab26030e058 | 372 | #define _TIMER_IFS_UF_SHIFT 1 /**< Shift value for TIMER_UF */ |
| Kojto | 98:8ab26030e058 | 373 | #define _TIMER_IFS_UF_MASK 0x2UL /**< Bit mask for TIMER_UF */ |
| Kojto | 98:8ab26030e058 | 374 | #define _TIMER_IFS_UF_DEFAULT 0x00000000UL /**< Mode DEFAULT for TIMER_IFS */ |
| Kojto | 98:8ab26030e058 | 375 | #define TIMER_IFS_UF_DEFAULT (_TIMER_IFS_UF_DEFAULT << 1) /**< Shifted mode DEFAULT for TIMER_IFS */ |
| Kojto | 98:8ab26030e058 | 376 | #define TIMER_IFS_CC0 (0x1UL << 4) /**< CC Channel 0 Interrupt Flag Set */ |
| Kojto | 98:8ab26030e058 | 377 | #define _TIMER_IFS_CC0_SHIFT 4 /**< Shift value for TIMER_CC0 */ |
| Kojto | 98:8ab26030e058 | 378 | #define _TIMER_IFS_CC0_MASK 0x10UL /**< Bit mask for TIMER_CC0 */ |
| Kojto | 98:8ab26030e058 | 379 | #define _TIMER_IFS_CC0_DEFAULT 0x00000000UL /**< Mode DEFAULT for TIMER_IFS */ |
| Kojto | 98:8ab26030e058 | 380 | #define TIMER_IFS_CC0_DEFAULT (_TIMER_IFS_CC0_DEFAULT << 4) /**< Shifted mode DEFAULT for TIMER_IFS */ |
| Kojto | 98:8ab26030e058 | 381 | #define TIMER_IFS_CC1 (0x1UL << 5) /**< CC Channel 1 Interrupt Flag Set */ |
| Kojto | 98:8ab26030e058 | 382 | #define _TIMER_IFS_CC1_SHIFT 5 /**< Shift value for TIMER_CC1 */ |
| Kojto | 98:8ab26030e058 | 383 | #define _TIMER_IFS_CC1_MASK 0x20UL /**< Bit mask for TIMER_CC1 */ |
| Kojto | 98:8ab26030e058 | 384 | #define _TIMER_IFS_CC1_DEFAULT 0x00000000UL /**< Mode DEFAULT for TIMER_IFS */ |
| Kojto | 98:8ab26030e058 | 385 | #define TIMER_IFS_CC1_DEFAULT (_TIMER_IFS_CC1_DEFAULT << 5) /**< Shifted mode DEFAULT for TIMER_IFS */ |
| Kojto | 98:8ab26030e058 | 386 | #define TIMER_IFS_CC2 (0x1UL << 6) /**< CC Channel 2 Interrupt Flag Set */ |
| Kojto | 98:8ab26030e058 | 387 | #define _TIMER_IFS_CC2_SHIFT 6 /**< Shift value for TIMER_CC2 */ |
| Kojto | 98:8ab26030e058 | 388 | #define _TIMER_IFS_CC2_MASK 0x40UL /**< Bit mask for TIMER_CC2 */ |
| Kojto | 98:8ab26030e058 | 389 | #define _TIMER_IFS_CC2_DEFAULT 0x00000000UL /**< Mode DEFAULT for TIMER_IFS */ |
| Kojto | 98:8ab26030e058 | 390 | #define TIMER_IFS_CC2_DEFAULT (_TIMER_IFS_CC2_DEFAULT << 6) /**< Shifted mode DEFAULT for TIMER_IFS */ |
| Kojto | 98:8ab26030e058 | 391 | #define TIMER_IFS_ICBOF0 (0x1UL << 8) /**< CC Channel 0 Input Capture Buffer Overflow Interrupt Flag Set */ |
| Kojto | 98:8ab26030e058 | 392 | #define _TIMER_IFS_ICBOF0_SHIFT 8 /**< Shift value for TIMER_ICBOF0 */ |
| Kojto | 98:8ab26030e058 | 393 | #define _TIMER_IFS_ICBOF0_MASK 0x100UL /**< Bit mask for TIMER_ICBOF0 */ |
| Kojto | 98:8ab26030e058 | 394 | #define _TIMER_IFS_ICBOF0_DEFAULT 0x00000000UL /**< Mode DEFAULT for TIMER_IFS */ |
| Kojto | 98:8ab26030e058 | 395 | #define TIMER_IFS_ICBOF0_DEFAULT (_TIMER_IFS_ICBOF0_DEFAULT << 8) /**< Shifted mode DEFAULT for TIMER_IFS */ |
| Kojto | 98:8ab26030e058 | 396 | #define TIMER_IFS_ICBOF1 (0x1UL << 9) /**< CC Channel 1 Input Capture Buffer Overflow Interrupt Flag Set */ |
| Kojto | 98:8ab26030e058 | 397 | #define _TIMER_IFS_ICBOF1_SHIFT 9 /**< Shift value for TIMER_ICBOF1 */ |
| Kojto | 98:8ab26030e058 | 398 | #define _TIMER_IFS_ICBOF1_MASK 0x200UL /**< Bit mask for TIMER_ICBOF1 */ |
| Kojto | 98:8ab26030e058 | 399 | #define _TIMER_IFS_ICBOF1_DEFAULT 0x00000000UL /**< Mode DEFAULT for TIMER_IFS */ |
| Kojto | 98:8ab26030e058 | 400 | #define TIMER_IFS_ICBOF1_DEFAULT (_TIMER_IFS_ICBOF1_DEFAULT << 9) /**< Shifted mode DEFAULT for TIMER_IFS */ |
| Kojto | 98:8ab26030e058 | 401 | #define TIMER_IFS_ICBOF2 (0x1UL << 10) /**< CC Channel 2 Input Capture Buffer Overflow Interrupt Flag Set */ |
| Kojto | 98:8ab26030e058 | 402 | #define _TIMER_IFS_ICBOF2_SHIFT 10 /**< Shift value for TIMER_ICBOF2 */ |
| Kojto | 98:8ab26030e058 | 403 | #define _TIMER_IFS_ICBOF2_MASK 0x400UL /**< Bit mask for TIMER_ICBOF2 */ |
| Kojto | 98:8ab26030e058 | 404 | #define _TIMER_IFS_ICBOF2_DEFAULT 0x00000000UL /**< Mode DEFAULT for TIMER_IFS */ |
| Kojto | 98:8ab26030e058 | 405 | #define TIMER_IFS_ICBOF2_DEFAULT (_TIMER_IFS_ICBOF2_DEFAULT << 10) /**< Shifted mode DEFAULT for TIMER_IFS */ |
| Kojto | 98:8ab26030e058 | 406 | |
| Kojto | 98:8ab26030e058 | 407 | /* Bit fields for TIMER IFC */ |
| Kojto | 98:8ab26030e058 | 408 | #define _TIMER_IFC_RESETVALUE 0x00000000UL /**< Default value for TIMER_IFC */ |
| Kojto | 98:8ab26030e058 | 409 | #define _TIMER_IFC_MASK 0x00000773UL /**< Mask for TIMER_IFC */ |
| Kojto | 98:8ab26030e058 | 410 | #define TIMER_IFC_OF (0x1UL << 0) /**< Overflow Interrupt Flag Clear */ |
| Kojto | 98:8ab26030e058 | 411 | #define _TIMER_IFC_OF_SHIFT 0 /**< Shift value for TIMER_OF */ |
| Kojto | 98:8ab26030e058 | 412 | #define _TIMER_IFC_OF_MASK 0x1UL /**< Bit mask for TIMER_OF */ |
| Kojto | 98:8ab26030e058 | 413 | #define _TIMER_IFC_OF_DEFAULT 0x00000000UL /**< Mode DEFAULT for TIMER_IFC */ |
| Kojto | 98:8ab26030e058 | 414 | #define TIMER_IFC_OF_DEFAULT (_TIMER_IFC_OF_DEFAULT << 0) /**< Shifted mode DEFAULT for TIMER_IFC */ |
| Kojto | 98:8ab26030e058 | 415 | #define TIMER_IFC_UF (0x1UL << 1) /**< Underflow Interrupt Flag Clear */ |
| Kojto | 98:8ab26030e058 | 416 | #define _TIMER_IFC_UF_SHIFT 1 /**< Shift value for TIMER_UF */ |
| Kojto | 98:8ab26030e058 | 417 | #define _TIMER_IFC_UF_MASK 0x2UL /**< Bit mask for TIMER_UF */ |
| Kojto | 98:8ab26030e058 | 418 | #define _TIMER_IFC_UF_DEFAULT 0x00000000UL /**< Mode DEFAULT for TIMER_IFC */ |
| Kojto | 98:8ab26030e058 | 419 | #define TIMER_IFC_UF_DEFAULT (_TIMER_IFC_UF_DEFAULT << 1) /**< Shifted mode DEFAULT for TIMER_IFC */ |
| Kojto | 98:8ab26030e058 | 420 | #define TIMER_IFC_CC0 (0x1UL << 4) /**< CC Channel 0 Interrupt Flag Clear */ |
| Kojto | 98:8ab26030e058 | 421 | #define _TIMER_IFC_CC0_SHIFT 4 /**< Shift value for TIMER_CC0 */ |
| Kojto | 98:8ab26030e058 | 422 | #define _TIMER_IFC_CC0_MASK 0x10UL /**< Bit mask for TIMER_CC0 */ |
| Kojto | 98:8ab26030e058 | 423 | #define _TIMER_IFC_CC0_DEFAULT 0x00000000UL /**< Mode DEFAULT for TIMER_IFC */ |
| Kojto | 98:8ab26030e058 | 424 | #define TIMER_IFC_CC0_DEFAULT (_TIMER_IFC_CC0_DEFAULT << 4) /**< Shifted mode DEFAULT for TIMER_IFC */ |
| Kojto | 98:8ab26030e058 | 425 | #define TIMER_IFC_CC1 (0x1UL << 5) /**< CC Channel 1 Interrupt Flag Clear */ |
| Kojto | 98:8ab26030e058 | 426 | #define _TIMER_IFC_CC1_SHIFT 5 /**< Shift value for TIMER_CC1 */ |
| Kojto | 98:8ab26030e058 | 427 | #define _TIMER_IFC_CC1_MASK 0x20UL /**< Bit mask for TIMER_CC1 */ |
| Kojto | 98:8ab26030e058 | 428 | #define _TIMER_IFC_CC1_DEFAULT 0x00000000UL /**< Mode DEFAULT for TIMER_IFC */ |
| Kojto | 98:8ab26030e058 | 429 | #define TIMER_IFC_CC1_DEFAULT (_TIMER_IFC_CC1_DEFAULT << 5) /**< Shifted mode DEFAULT for TIMER_IFC */ |
| Kojto | 98:8ab26030e058 | 430 | #define TIMER_IFC_CC2 (0x1UL << 6) /**< CC Channel 2 Interrupt Flag Clear */ |
| Kojto | 98:8ab26030e058 | 431 | #define _TIMER_IFC_CC2_SHIFT 6 /**< Shift value for TIMER_CC2 */ |
| Kojto | 98:8ab26030e058 | 432 | #define _TIMER_IFC_CC2_MASK 0x40UL /**< Bit mask for TIMER_CC2 */ |
| Kojto | 98:8ab26030e058 | 433 | #define _TIMER_IFC_CC2_DEFAULT 0x00000000UL /**< Mode DEFAULT for TIMER_IFC */ |
| Kojto | 98:8ab26030e058 | 434 | #define TIMER_IFC_CC2_DEFAULT (_TIMER_IFC_CC2_DEFAULT << 6) /**< Shifted mode DEFAULT for TIMER_IFC */ |
| Kojto | 98:8ab26030e058 | 435 | #define TIMER_IFC_ICBOF0 (0x1UL << 8) /**< CC Channel 0 Input Capture Buffer Overflow Interrupt Flag Clear */ |
| Kojto | 98:8ab26030e058 | 436 | #define _TIMER_IFC_ICBOF0_SHIFT 8 /**< Shift value for TIMER_ICBOF0 */ |
| Kojto | 98:8ab26030e058 | 437 | #define _TIMER_IFC_ICBOF0_MASK 0x100UL /**< Bit mask for TIMER_ICBOF0 */ |
| Kojto | 98:8ab26030e058 | 438 | #define _TIMER_IFC_ICBOF0_DEFAULT 0x00000000UL /**< Mode DEFAULT for TIMER_IFC */ |
| Kojto | 98:8ab26030e058 | 439 | #define TIMER_IFC_ICBOF0_DEFAULT (_TIMER_IFC_ICBOF0_DEFAULT << 8) /**< Shifted mode DEFAULT for TIMER_IFC */ |
| Kojto | 98:8ab26030e058 | 440 | #define TIMER_IFC_ICBOF1 (0x1UL << 9) /**< CC Channel 1 Input Capture Buffer Overflow Interrupt Flag Clear */ |
| Kojto | 98:8ab26030e058 | 441 | #define _TIMER_IFC_ICBOF1_SHIFT 9 /**< Shift value for TIMER_ICBOF1 */ |
| Kojto | 98:8ab26030e058 | 442 | #define _TIMER_IFC_ICBOF1_MASK 0x200UL /**< Bit mask for TIMER_ICBOF1 */ |
| Kojto | 98:8ab26030e058 | 443 | #define _TIMER_IFC_ICBOF1_DEFAULT 0x00000000UL /**< Mode DEFAULT for TIMER_IFC */ |
| Kojto | 98:8ab26030e058 | 444 | #define TIMER_IFC_ICBOF1_DEFAULT (_TIMER_IFC_ICBOF1_DEFAULT << 9) /**< Shifted mode DEFAULT for TIMER_IFC */ |
| Kojto | 98:8ab26030e058 | 445 | #define TIMER_IFC_ICBOF2 (0x1UL << 10) /**< CC Channel 2 Input Capture Buffer Overflow Interrupt Flag Clear */ |
| Kojto | 98:8ab26030e058 | 446 | #define _TIMER_IFC_ICBOF2_SHIFT 10 /**< Shift value for TIMER_ICBOF2 */ |
| Kojto | 98:8ab26030e058 | 447 | #define _TIMER_IFC_ICBOF2_MASK 0x400UL /**< Bit mask for TIMER_ICBOF2 */ |
| Kojto | 98:8ab26030e058 | 448 | #define _TIMER_IFC_ICBOF2_DEFAULT 0x00000000UL /**< Mode DEFAULT for TIMER_IFC */ |
| Kojto | 98:8ab26030e058 | 449 | #define TIMER_IFC_ICBOF2_DEFAULT (_TIMER_IFC_ICBOF2_DEFAULT << 10) /**< Shifted mode DEFAULT for TIMER_IFC */ |
| Kojto | 98:8ab26030e058 | 450 | |
| Kojto | 98:8ab26030e058 | 451 | /* Bit fields for TIMER TOP */ |
| Kojto | 98:8ab26030e058 | 452 | #define _TIMER_TOP_RESETVALUE 0x0000FFFFUL /**< Default value for TIMER_TOP */ |
| Kojto | 98:8ab26030e058 | 453 | #define _TIMER_TOP_MASK 0x0000FFFFUL /**< Mask for TIMER_TOP */ |
| Kojto | 98:8ab26030e058 | 454 | #define _TIMER_TOP_TOP_SHIFT 0 /**< Shift value for TIMER_TOP */ |
| Kojto | 98:8ab26030e058 | 455 | #define _TIMER_TOP_TOP_MASK 0xFFFFUL /**< Bit mask for TIMER_TOP */ |
| Kojto | 98:8ab26030e058 | 456 | #define _TIMER_TOP_TOP_DEFAULT 0x0000FFFFUL /**< Mode DEFAULT for TIMER_TOP */ |
| Kojto | 98:8ab26030e058 | 457 | #define TIMER_TOP_TOP_DEFAULT (_TIMER_TOP_TOP_DEFAULT << 0) /**< Shifted mode DEFAULT for TIMER_TOP */ |
| Kojto | 98:8ab26030e058 | 458 | |
| Kojto | 98:8ab26030e058 | 459 | /* Bit fields for TIMER TOPB */ |
| Kojto | 98:8ab26030e058 | 460 | #define _TIMER_TOPB_RESETVALUE 0x00000000UL /**< Default value for TIMER_TOPB */ |
| Kojto | 98:8ab26030e058 | 461 | #define _TIMER_TOPB_MASK 0x0000FFFFUL /**< Mask for TIMER_TOPB */ |
| Kojto | 98:8ab26030e058 | 462 | #define _TIMER_TOPB_TOPB_SHIFT 0 /**< Shift value for TIMER_TOPB */ |
| Kojto | 98:8ab26030e058 | 463 | #define _TIMER_TOPB_TOPB_MASK 0xFFFFUL /**< Bit mask for TIMER_TOPB */ |
| Kojto | 98:8ab26030e058 | 464 | #define _TIMER_TOPB_TOPB_DEFAULT 0x00000000UL /**< Mode DEFAULT for TIMER_TOPB */ |
| Kojto | 98:8ab26030e058 | 465 | #define TIMER_TOPB_TOPB_DEFAULT (_TIMER_TOPB_TOPB_DEFAULT << 0) /**< Shifted mode DEFAULT for TIMER_TOPB */ |
| Kojto | 98:8ab26030e058 | 466 | |
| Kojto | 98:8ab26030e058 | 467 | /* Bit fields for TIMER CNT */ |
| Kojto | 98:8ab26030e058 | 468 | #define _TIMER_CNT_RESETVALUE 0x00000000UL /**< Default value for TIMER_CNT */ |
| Kojto | 98:8ab26030e058 | 469 | #define _TIMER_CNT_MASK 0x0000FFFFUL /**< Mask for TIMER_CNT */ |
| Kojto | 98:8ab26030e058 | 470 | #define _TIMER_CNT_CNT_SHIFT 0 /**< Shift value for TIMER_CNT */ |
| Kojto | 98:8ab26030e058 | 471 | #define _TIMER_CNT_CNT_MASK 0xFFFFUL /**< Bit mask for TIMER_CNT */ |
| Kojto | 98:8ab26030e058 | 472 | #define _TIMER_CNT_CNT_DEFAULT 0x00000000UL /**< Mode DEFAULT for TIMER_CNT */ |
| Kojto | 98:8ab26030e058 | 473 | #define TIMER_CNT_CNT_DEFAULT (_TIMER_CNT_CNT_DEFAULT << 0) /**< Shifted mode DEFAULT for TIMER_CNT */ |
| Kojto | 98:8ab26030e058 | 474 | |
| Kojto | 98:8ab26030e058 | 475 | /* Bit fields for TIMER ROUTE */ |
| Kojto | 98:8ab26030e058 | 476 | #define _TIMER_ROUTE_RESETVALUE 0x00000000UL /**< Default value for TIMER_ROUTE */ |
| Kojto | 98:8ab26030e058 | 477 | #define _TIMER_ROUTE_MASK 0x00070007UL /**< Mask for TIMER_ROUTE */ |
| Kojto | 98:8ab26030e058 | 478 | #define TIMER_ROUTE_CC0PEN (0x1UL << 0) /**< CC Channel 0 Pin Enable */ |
| Kojto | 98:8ab26030e058 | 479 | #define _TIMER_ROUTE_CC0PEN_SHIFT 0 /**< Shift value for TIMER_CC0PEN */ |
| Kojto | 98:8ab26030e058 | 480 | #define _TIMER_ROUTE_CC0PEN_MASK 0x1UL /**< Bit mask for TIMER_CC0PEN */ |
| Kojto | 98:8ab26030e058 | 481 | #define _TIMER_ROUTE_CC0PEN_DEFAULT 0x00000000UL /**< Mode DEFAULT for TIMER_ROUTE */ |
| Kojto | 98:8ab26030e058 | 482 | #define TIMER_ROUTE_CC0PEN_DEFAULT (_TIMER_ROUTE_CC0PEN_DEFAULT << 0) /**< Shifted mode DEFAULT for TIMER_ROUTE */ |
| Kojto | 98:8ab26030e058 | 483 | #define TIMER_ROUTE_CC1PEN (0x1UL << 1) /**< CC Channel 1 Pin Enable */ |
| Kojto | 98:8ab26030e058 | 484 | #define _TIMER_ROUTE_CC1PEN_SHIFT 1 /**< Shift value for TIMER_CC1PEN */ |
| Kojto | 98:8ab26030e058 | 485 | #define _TIMER_ROUTE_CC1PEN_MASK 0x2UL /**< Bit mask for TIMER_CC1PEN */ |
| Kojto | 98:8ab26030e058 | 486 | #define _TIMER_ROUTE_CC1PEN_DEFAULT 0x00000000UL /**< Mode DEFAULT for TIMER_ROUTE */ |
| Kojto | 98:8ab26030e058 | 487 | #define TIMER_ROUTE_CC1PEN_DEFAULT (_TIMER_ROUTE_CC1PEN_DEFAULT << 1) /**< Shifted mode DEFAULT for TIMER_ROUTE */ |
| Kojto | 98:8ab26030e058 | 488 | #define TIMER_ROUTE_CC2PEN (0x1UL << 2) /**< CC Channel 2 Pin Enable */ |
| Kojto | 98:8ab26030e058 | 489 | #define _TIMER_ROUTE_CC2PEN_SHIFT 2 /**< Shift value for TIMER_CC2PEN */ |
| Kojto | 98:8ab26030e058 | 490 | #define _TIMER_ROUTE_CC2PEN_MASK 0x4UL /**< Bit mask for TIMER_CC2PEN */ |
| Kojto | 98:8ab26030e058 | 491 | #define _TIMER_ROUTE_CC2PEN_DEFAULT 0x00000000UL /**< Mode DEFAULT for TIMER_ROUTE */ |
| Kojto | 98:8ab26030e058 | 492 | #define TIMER_ROUTE_CC2PEN_DEFAULT (_TIMER_ROUTE_CC2PEN_DEFAULT << 2) /**< Shifted mode DEFAULT for TIMER_ROUTE */ |
| Kojto | 98:8ab26030e058 | 493 | #define _TIMER_ROUTE_LOCATION_SHIFT 16 /**< Shift value for TIMER_LOCATION */ |
| Kojto | 98:8ab26030e058 | 494 | #define _TIMER_ROUTE_LOCATION_MASK 0x70000UL /**< Bit mask for TIMER_LOCATION */ |
| Kojto | 98:8ab26030e058 | 495 | #define _TIMER_ROUTE_LOCATION_DEFAULT 0x00000000UL /**< Mode DEFAULT for TIMER_ROUTE */ |
| Kojto | 98:8ab26030e058 | 496 | #define _TIMER_ROUTE_LOCATION_LOC0 0x00000000UL /**< Mode LOC0 for TIMER_ROUTE */ |
| Kojto | 98:8ab26030e058 | 497 | #define _TIMER_ROUTE_LOCATION_LOC1 0x00000001UL /**< Mode LOC1 for TIMER_ROUTE */ |
| Kojto | 98:8ab26030e058 | 498 | #define _TIMER_ROUTE_LOCATION_LOC2 0x00000002UL /**< Mode LOC2 for TIMER_ROUTE */ |
| Kojto | 98:8ab26030e058 | 499 | #define _TIMER_ROUTE_LOCATION_LOC3 0x00000003UL /**< Mode LOC3 for TIMER_ROUTE */ |
| Kojto | 98:8ab26030e058 | 500 | #define _TIMER_ROUTE_LOCATION_LOC4 0x00000004UL /**< Mode LOC4 for TIMER_ROUTE */ |
| Kojto | 98:8ab26030e058 | 501 | #define _TIMER_ROUTE_LOCATION_LOC5 0x00000005UL /**< Mode LOC5 for TIMER_ROUTE */ |
| Kojto | 98:8ab26030e058 | 502 | #define TIMER_ROUTE_LOCATION_DEFAULT (_TIMER_ROUTE_LOCATION_DEFAULT << 16) /**< Shifted mode DEFAULT for TIMER_ROUTE */ |
| Kojto | 98:8ab26030e058 | 503 | #define TIMER_ROUTE_LOCATION_LOC0 (_TIMER_ROUTE_LOCATION_LOC0 << 16) /**< Shifted mode LOC0 for TIMER_ROUTE */ |
| Kojto | 98:8ab26030e058 | 504 | #define TIMER_ROUTE_LOCATION_LOC1 (_TIMER_ROUTE_LOCATION_LOC1 << 16) /**< Shifted mode LOC1 for TIMER_ROUTE */ |
| Kojto | 98:8ab26030e058 | 505 | #define TIMER_ROUTE_LOCATION_LOC2 (_TIMER_ROUTE_LOCATION_LOC2 << 16) /**< Shifted mode LOC2 for TIMER_ROUTE */ |
| Kojto | 98:8ab26030e058 | 506 | #define TIMER_ROUTE_LOCATION_LOC3 (_TIMER_ROUTE_LOCATION_LOC3 << 16) /**< Shifted mode LOC3 for TIMER_ROUTE */ |
| Kojto | 98:8ab26030e058 | 507 | #define TIMER_ROUTE_LOCATION_LOC4 (_TIMER_ROUTE_LOCATION_LOC4 << 16) /**< Shifted mode LOC4 for TIMER_ROUTE */ |
| Kojto | 98:8ab26030e058 | 508 | #define TIMER_ROUTE_LOCATION_LOC5 (_TIMER_ROUTE_LOCATION_LOC5 << 16) /**< Shifted mode LOC5 for TIMER_ROUTE */ |
| Kojto | 98:8ab26030e058 | 509 | |
| Kojto | 98:8ab26030e058 | 510 | /* Bit fields for TIMER CC_CTRL */ |
| Kojto | 98:8ab26030e058 | 511 | #define _TIMER_CC_CTRL_RESETVALUE 0x00000000UL /**< Default value for TIMER_CC_CTRL */ |
| Kojto | 98:8ab26030e058 | 512 | #define _TIMER_CC_CTRL_MASK 0x1F333F17UL /**< Mask for TIMER_CC_CTRL */ |
| Kojto | 98:8ab26030e058 | 513 | #define _TIMER_CC_CTRL_MODE_SHIFT 0 /**< Shift value for TIMER_MODE */ |
| Kojto | 98:8ab26030e058 | 514 | #define _TIMER_CC_CTRL_MODE_MASK 0x3UL /**< Bit mask for TIMER_MODE */ |
| Kojto | 98:8ab26030e058 | 515 | #define _TIMER_CC_CTRL_MODE_DEFAULT 0x00000000UL /**< Mode DEFAULT for TIMER_CC_CTRL */ |
| Kojto | 98:8ab26030e058 | 516 | #define _TIMER_CC_CTRL_MODE_OFF 0x00000000UL /**< Mode OFF for TIMER_CC_CTRL */ |
| Kojto | 98:8ab26030e058 | 517 | #define _TIMER_CC_CTRL_MODE_INPUTCAPTURE 0x00000001UL /**< Mode INPUTCAPTURE for TIMER_CC_CTRL */ |
| Kojto | 98:8ab26030e058 | 518 | #define _TIMER_CC_CTRL_MODE_OUTPUTCOMPARE 0x00000002UL /**< Mode OUTPUTCOMPARE for TIMER_CC_CTRL */ |
| Kojto | 98:8ab26030e058 | 519 | #define _TIMER_CC_CTRL_MODE_PWM 0x00000003UL /**< Mode PWM for TIMER_CC_CTRL */ |
| Kojto | 98:8ab26030e058 | 520 | #define TIMER_CC_CTRL_MODE_DEFAULT (_TIMER_CC_CTRL_MODE_DEFAULT << 0) /**< Shifted mode DEFAULT for TIMER_CC_CTRL */ |
| Kojto | 98:8ab26030e058 | 521 | #define TIMER_CC_CTRL_MODE_OFF (_TIMER_CC_CTRL_MODE_OFF << 0) /**< Shifted mode OFF for TIMER_CC_CTRL */ |
| Kojto | 98:8ab26030e058 | 522 | #define TIMER_CC_CTRL_MODE_INPUTCAPTURE (_TIMER_CC_CTRL_MODE_INPUTCAPTURE << 0) /**< Shifted mode INPUTCAPTURE for TIMER_CC_CTRL */ |
| Kojto | 98:8ab26030e058 | 523 | #define TIMER_CC_CTRL_MODE_OUTPUTCOMPARE (_TIMER_CC_CTRL_MODE_OUTPUTCOMPARE << 0) /**< Shifted mode OUTPUTCOMPARE for TIMER_CC_CTRL */ |
| Kojto | 98:8ab26030e058 | 524 | #define TIMER_CC_CTRL_MODE_PWM (_TIMER_CC_CTRL_MODE_PWM << 0) /**< Shifted mode PWM for TIMER_CC_CTRL */ |
| Kojto | 98:8ab26030e058 | 525 | #define TIMER_CC_CTRL_OUTINV (0x1UL << 2) /**< Output Invert */ |
| Kojto | 98:8ab26030e058 | 526 | #define _TIMER_CC_CTRL_OUTINV_SHIFT 2 /**< Shift value for TIMER_OUTINV */ |
| Kojto | 98:8ab26030e058 | 527 | #define _TIMER_CC_CTRL_OUTINV_MASK 0x4UL /**< Bit mask for TIMER_OUTINV */ |
| Kojto | 98:8ab26030e058 | 528 | #define _TIMER_CC_CTRL_OUTINV_DEFAULT 0x00000000UL /**< Mode DEFAULT for TIMER_CC_CTRL */ |
| Kojto | 98:8ab26030e058 | 529 | #define TIMER_CC_CTRL_OUTINV_DEFAULT (_TIMER_CC_CTRL_OUTINV_DEFAULT << 2) /**< Shifted mode DEFAULT for TIMER_CC_CTRL */ |
| Kojto | 98:8ab26030e058 | 530 | #define TIMER_CC_CTRL_COIST (0x1UL << 4) /**< Compare Output Initial State */ |
| Kojto | 98:8ab26030e058 | 531 | #define _TIMER_CC_CTRL_COIST_SHIFT 4 /**< Shift value for TIMER_COIST */ |
| Kojto | 98:8ab26030e058 | 532 | #define _TIMER_CC_CTRL_COIST_MASK 0x10UL /**< Bit mask for TIMER_COIST */ |
| Kojto | 98:8ab26030e058 | 533 | #define _TIMER_CC_CTRL_COIST_DEFAULT 0x00000000UL /**< Mode DEFAULT for TIMER_CC_CTRL */ |
| Kojto | 98:8ab26030e058 | 534 | #define TIMER_CC_CTRL_COIST_DEFAULT (_TIMER_CC_CTRL_COIST_DEFAULT << 4) /**< Shifted mode DEFAULT for TIMER_CC_CTRL */ |
| Kojto | 98:8ab26030e058 | 535 | #define _TIMER_CC_CTRL_CMOA_SHIFT 8 /**< Shift value for TIMER_CMOA */ |
| Kojto | 98:8ab26030e058 | 536 | #define _TIMER_CC_CTRL_CMOA_MASK 0x300UL /**< Bit mask for TIMER_CMOA */ |
| Kojto | 98:8ab26030e058 | 537 | #define _TIMER_CC_CTRL_CMOA_DEFAULT 0x00000000UL /**< Mode DEFAULT for TIMER_CC_CTRL */ |
| Kojto | 98:8ab26030e058 | 538 | #define _TIMER_CC_CTRL_CMOA_NONE 0x00000000UL /**< Mode NONE for TIMER_CC_CTRL */ |
| Kojto | 98:8ab26030e058 | 539 | #define _TIMER_CC_CTRL_CMOA_TOGGLE 0x00000001UL /**< Mode TOGGLE for TIMER_CC_CTRL */ |
| Kojto | 98:8ab26030e058 | 540 | #define _TIMER_CC_CTRL_CMOA_CLEAR 0x00000002UL /**< Mode CLEAR for TIMER_CC_CTRL */ |
| Kojto | 98:8ab26030e058 | 541 | #define _TIMER_CC_CTRL_CMOA_SET 0x00000003UL /**< Mode SET for TIMER_CC_CTRL */ |
| Kojto | 98:8ab26030e058 | 542 | #define TIMER_CC_CTRL_CMOA_DEFAULT (_TIMER_CC_CTRL_CMOA_DEFAULT << 8) /**< Shifted mode DEFAULT for TIMER_CC_CTRL */ |
| Kojto | 98:8ab26030e058 | 543 | #define TIMER_CC_CTRL_CMOA_NONE (_TIMER_CC_CTRL_CMOA_NONE << 8) /**< Shifted mode NONE for TIMER_CC_CTRL */ |
| Kojto | 98:8ab26030e058 | 544 | #define TIMER_CC_CTRL_CMOA_TOGGLE (_TIMER_CC_CTRL_CMOA_TOGGLE << 8) /**< Shifted mode TOGGLE for TIMER_CC_CTRL */ |
| Kojto | 98:8ab26030e058 | 545 | #define TIMER_CC_CTRL_CMOA_CLEAR (_TIMER_CC_CTRL_CMOA_CLEAR << 8) /**< Shifted mode CLEAR for TIMER_CC_CTRL */ |
| Kojto | 98:8ab26030e058 | 546 | #define TIMER_CC_CTRL_CMOA_SET (_TIMER_CC_CTRL_CMOA_SET << 8) /**< Shifted mode SET for TIMER_CC_CTRL */ |
| Kojto | 98:8ab26030e058 | 547 | #define _TIMER_CC_CTRL_COFOA_SHIFT 10 /**< Shift value for TIMER_COFOA */ |
| Kojto | 98:8ab26030e058 | 548 | #define _TIMER_CC_CTRL_COFOA_MASK 0xC00UL /**< Bit mask for TIMER_COFOA */ |
| Kojto | 98:8ab26030e058 | 549 | #define _TIMER_CC_CTRL_COFOA_DEFAULT 0x00000000UL /**< Mode DEFAULT for TIMER_CC_CTRL */ |
| Kojto | 98:8ab26030e058 | 550 | #define _TIMER_CC_CTRL_COFOA_NONE 0x00000000UL /**< Mode NONE for TIMER_CC_CTRL */ |
| Kojto | 98:8ab26030e058 | 551 | #define _TIMER_CC_CTRL_COFOA_TOGGLE 0x00000001UL /**< Mode TOGGLE for TIMER_CC_CTRL */ |
| Kojto | 98:8ab26030e058 | 552 | #define _TIMER_CC_CTRL_COFOA_CLEAR 0x00000002UL /**< Mode CLEAR for TIMER_CC_CTRL */ |
| Kojto | 98:8ab26030e058 | 553 | #define _TIMER_CC_CTRL_COFOA_SET 0x00000003UL /**< Mode SET for TIMER_CC_CTRL */ |
| Kojto | 98:8ab26030e058 | 554 | #define TIMER_CC_CTRL_COFOA_DEFAULT (_TIMER_CC_CTRL_COFOA_DEFAULT << 10) /**< Shifted mode DEFAULT for TIMER_CC_CTRL */ |
| Kojto | 98:8ab26030e058 | 555 | #define TIMER_CC_CTRL_COFOA_NONE (_TIMER_CC_CTRL_COFOA_NONE << 10) /**< Shifted mode NONE for TIMER_CC_CTRL */ |
| Kojto | 98:8ab26030e058 | 556 | #define TIMER_CC_CTRL_COFOA_TOGGLE (_TIMER_CC_CTRL_COFOA_TOGGLE << 10) /**< Shifted mode TOGGLE for TIMER_CC_CTRL */ |
| Kojto | 98:8ab26030e058 | 557 | #define TIMER_CC_CTRL_COFOA_CLEAR (_TIMER_CC_CTRL_COFOA_CLEAR << 10) /**< Shifted mode CLEAR for TIMER_CC_CTRL */ |
| Kojto | 98:8ab26030e058 | 558 | #define TIMER_CC_CTRL_COFOA_SET (_TIMER_CC_CTRL_COFOA_SET << 10) /**< Shifted mode SET for TIMER_CC_CTRL */ |
| Kojto | 98:8ab26030e058 | 559 | #define _TIMER_CC_CTRL_CUFOA_SHIFT 12 /**< Shift value for TIMER_CUFOA */ |
| Kojto | 98:8ab26030e058 | 560 | #define _TIMER_CC_CTRL_CUFOA_MASK 0x3000UL /**< Bit mask for TIMER_CUFOA */ |
| Kojto | 98:8ab26030e058 | 561 | #define _TIMER_CC_CTRL_CUFOA_DEFAULT 0x00000000UL /**< Mode DEFAULT for TIMER_CC_CTRL */ |
| Kojto | 98:8ab26030e058 | 562 | #define _TIMER_CC_CTRL_CUFOA_NONE 0x00000000UL /**< Mode NONE for TIMER_CC_CTRL */ |
| Kojto | 98:8ab26030e058 | 563 | #define _TIMER_CC_CTRL_CUFOA_TOGGLE 0x00000001UL /**< Mode TOGGLE for TIMER_CC_CTRL */ |
| Kojto | 98:8ab26030e058 | 564 | #define _TIMER_CC_CTRL_CUFOA_CLEAR 0x00000002UL /**< Mode CLEAR for TIMER_CC_CTRL */ |
| Kojto | 98:8ab26030e058 | 565 | #define _TIMER_CC_CTRL_CUFOA_SET 0x00000003UL /**< Mode SET for TIMER_CC_CTRL */ |
| Kojto | 98:8ab26030e058 | 566 | #define TIMER_CC_CTRL_CUFOA_DEFAULT (_TIMER_CC_CTRL_CUFOA_DEFAULT << 12) /**< Shifted mode DEFAULT for TIMER_CC_CTRL */ |
| Kojto | 98:8ab26030e058 | 567 | #define TIMER_CC_CTRL_CUFOA_NONE (_TIMER_CC_CTRL_CUFOA_NONE << 12) /**< Shifted mode NONE for TIMER_CC_CTRL */ |
| Kojto | 98:8ab26030e058 | 568 | #define TIMER_CC_CTRL_CUFOA_TOGGLE (_TIMER_CC_CTRL_CUFOA_TOGGLE << 12) /**< Shifted mode TOGGLE for TIMER_CC_CTRL */ |
| Kojto | 98:8ab26030e058 | 569 | #define TIMER_CC_CTRL_CUFOA_CLEAR (_TIMER_CC_CTRL_CUFOA_CLEAR << 12) /**< Shifted mode CLEAR for TIMER_CC_CTRL */ |
| Kojto | 98:8ab26030e058 | 570 | #define TIMER_CC_CTRL_CUFOA_SET (_TIMER_CC_CTRL_CUFOA_SET << 12) /**< Shifted mode SET for TIMER_CC_CTRL */ |
| Kojto | 98:8ab26030e058 | 571 | #define _TIMER_CC_CTRL_PRSSEL_SHIFT 16 /**< Shift value for TIMER_PRSSEL */ |
| Kojto | 98:8ab26030e058 | 572 | #define _TIMER_CC_CTRL_PRSSEL_MASK 0x30000UL /**< Bit mask for TIMER_PRSSEL */ |
| Kojto | 98:8ab26030e058 | 573 | #define _TIMER_CC_CTRL_PRSSEL_DEFAULT 0x00000000UL /**< Mode DEFAULT for TIMER_CC_CTRL */ |
| Kojto | 98:8ab26030e058 | 574 | #define _TIMER_CC_CTRL_PRSSEL_PRSCH0 0x00000000UL /**< Mode PRSCH0 for TIMER_CC_CTRL */ |
| Kojto | 98:8ab26030e058 | 575 | #define _TIMER_CC_CTRL_PRSSEL_PRSCH1 0x00000001UL /**< Mode PRSCH1 for TIMER_CC_CTRL */ |
| Kojto | 98:8ab26030e058 | 576 | #define _TIMER_CC_CTRL_PRSSEL_PRSCH2 0x00000002UL /**< Mode PRSCH2 for TIMER_CC_CTRL */ |
| Kojto | 98:8ab26030e058 | 577 | #define _TIMER_CC_CTRL_PRSSEL_PRSCH3 0x00000003UL /**< Mode PRSCH3 for TIMER_CC_CTRL */ |
| Kojto | 98:8ab26030e058 | 578 | #define TIMER_CC_CTRL_PRSSEL_DEFAULT (_TIMER_CC_CTRL_PRSSEL_DEFAULT << 16) /**< Shifted mode DEFAULT for TIMER_CC_CTRL */ |
| Kojto | 98:8ab26030e058 | 579 | #define TIMER_CC_CTRL_PRSSEL_PRSCH0 (_TIMER_CC_CTRL_PRSSEL_PRSCH0 << 16) /**< Shifted mode PRSCH0 for TIMER_CC_CTRL */ |
| Kojto | 98:8ab26030e058 | 580 | #define TIMER_CC_CTRL_PRSSEL_PRSCH1 (_TIMER_CC_CTRL_PRSSEL_PRSCH1 << 16) /**< Shifted mode PRSCH1 for TIMER_CC_CTRL */ |
| Kojto | 98:8ab26030e058 | 581 | #define TIMER_CC_CTRL_PRSSEL_PRSCH2 (_TIMER_CC_CTRL_PRSSEL_PRSCH2 << 16) /**< Shifted mode PRSCH2 for TIMER_CC_CTRL */ |
| Kojto | 98:8ab26030e058 | 582 | #define TIMER_CC_CTRL_PRSSEL_PRSCH3 (_TIMER_CC_CTRL_PRSSEL_PRSCH3 << 16) /**< Shifted mode PRSCH3 for TIMER_CC_CTRL */ |
| Kojto | 98:8ab26030e058 | 583 | #define TIMER_CC_CTRL_INSEL (0x1UL << 20) /**< Input Selection */ |
| Kojto | 98:8ab26030e058 | 584 | #define _TIMER_CC_CTRL_INSEL_SHIFT 20 /**< Shift value for TIMER_INSEL */ |
| Kojto | 98:8ab26030e058 | 585 | #define _TIMER_CC_CTRL_INSEL_MASK 0x100000UL /**< Bit mask for TIMER_INSEL */ |
| Kojto | 98:8ab26030e058 | 586 | #define _TIMER_CC_CTRL_INSEL_DEFAULT 0x00000000UL /**< Mode DEFAULT for TIMER_CC_CTRL */ |
| Kojto | 98:8ab26030e058 | 587 | #define _TIMER_CC_CTRL_INSEL_PIN 0x00000000UL /**< Mode PIN for TIMER_CC_CTRL */ |
| Kojto | 98:8ab26030e058 | 588 | #define _TIMER_CC_CTRL_INSEL_PRS 0x00000001UL /**< Mode PRS for TIMER_CC_CTRL */ |
| Kojto | 98:8ab26030e058 | 589 | #define TIMER_CC_CTRL_INSEL_DEFAULT (_TIMER_CC_CTRL_INSEL_DEFAULT << 20) /**< Shifted mode DEFAULT for TIMER_CC_CTRL */ |
| Kojto | 98:8ab26030e058 | 590 | #define TIMER_CC_CTRL_INSEL_PIN (_TIMER_CC_CTRL_INSEL_PIN << 20) /**< Shifted mode PIN for TIMER_CC_CTRL */ |
| Kojto | 98:8ab26030e058 | 591 | #define TIMER_CC_CTRL_INSEL_PRS (_TIMER_CC_CTRL_INSEL_PRS << 20) /**< Shifted mode PRS for TIMER_CC_CTRL */ |
| Kojto | 98:8ab26030e058 | 592 | #define TIMER_CC_CTRL_FILT (0x1UL << 21) /**< Digital Filter */ |
| Kojto | 98:8ab26030e058 | 593 | #define _TIMER_CC_CTRL_FILT_SHIFT 21 /**< Shift value for TIMER_FILT */ |
| Kojto | 98:8ab26030e058 | 594 | #define _TIMER_CC_CTRL_FILT_MASK 0x200000UL /**< Bit mask for TIMER_FILT */ |
| Kojto | 98:8ab26030e058 | 595 | #define _TIMER_CC_CTRL_FILT_DEFAULT 0x00000000UL /**< Mode DEFAULT for TIMER_CC_CTRL */ |
| Kojto | 98:8ab26030e058 | 596 | #define _TIMER_CC_CTRL_FILT_DISABLE 0x00000000UL /**< Mode DISABLE for TIMER_CC_CTRL */ |
| Kojto | 98:8ab26030e058 | 597 | #define _TIMER_CC_CTRL_FILT_ENABLE 0x00000001UL /**< Mode ENABLE for TIMER_CC_CTRL */ |
| Kojto | 98:8ab26030e058 | 598 | #define TIMER_CC_CTRL_FILT_DEFAULT (_TIMER_CC_CTRL_FILT_DEFAULT << 21) /**< Shifted mode DEFAULT for TIMER_CC_CTRL */ |
| Kojto | 98:8ab26030e058 | 599 | #define TIMER_CC_CTRL_FILT_DISABLE (_TIMER_CC_CTRL_FILT_DISABLE << 21) /**< Shifted mode DISABLE for TIMER_CC_CTRL */ |
| Kojto | 98:8ab26030e058 | 600 | #define TIMER_CC_CTRL_FILT_ENABLE (_TIMER_CC_CTRL_FILT_ENABLE << 21) /**< Shifted mode ENABLE for TIMER_CC_CTRL */ |
| Kojto | 98:8ab26030e058 | 601 | #define _TIMER_CC_CTRL_ICEDGE_SHIFT 24 /**< Shift value for TIMER_ICEDGE */ |
| Kojto | 98:8ab26030e058 | 602 | #define _TIMER_CC_CTRL_ICEDGE_MASK 0x3000000UL /**< Bit mask for TIMER_ICEDGE */ |
| Kojto | 98:8ab26030e058 | 603 | #define _TIMER_CC_CTRL_ICEDGE_DEFAULT 0x00000000UL /**< Mode DEFAULT for TIMER_CC_CTRL */ |
| Kojto | 98:8ab26030e058 | 604 | #define _TIMER_CC_CTRL_ICEDGE_RISING 0x00000000UL /**< Mode RISING for TIMER_CC_CTRL */ |
| Kojto | 98:8ab26030e058 | 605 | #define _TIMER_CC_CTRL_ICEDGE_FALLING 0x00000001UL /**< Mode FALLING for TIMER_CC_CTRL */ |
| Kojto | 98:8ab26030e058 | 606 | #define _TIMER_CC_CTRL_ICEDGE_BOTH 0x00000002UL /**< Mode BOTH for TIMER_CC_CTRL */ |
| Kojto | 98:8ab26030e058 | 607 | #define _TIMER_CC_CTRL_ICEDGE_NONE 0x00000003UL /**< Mode NONE for TIMER_CC_CTRL */ |
| Kojto | 98:8ab26030e058 | 608 | #define TIMER_CC_CTRL_ICEDGE_DEFAULT (_TIMER_CC_CTRL_ICEDGE_DEFAULT << 24) /**< Shifted mode DEFAULT for TIMER_CC_CTRL */ |
| Kojto | 98:8ab26030e058 | 609 | #define TIMER_CC_CTRL_ICEDGE_RISING (_TIMER_CC_CTRL_ICEDGE_RISING << 24) /**< Shifted mode RISING for TIMER_CC_CTRL */ |
| Kojto | 98:8ab26030e058 | 610 | #define TIMER_CC_CTRL_ICEDGE_FALLING (_TIMER_CC_CTRL_ICEDGE_FALLING << 24) /**< Shifted mode FALLING for TIMER_CC_CTRL */ |
| Kojto | 98:8ab26030e058 | 611 | #define TIMER_CC_CTRL_ICEDGE_BOTH (_TIMER_CC_CTRL_ICEDGE_BOTH << 24) /**< Shifted mode BOTH for TIMER_CC_CTRL */ |
| Kojto | 98:8ab26030e058 | 612 | #define TIMER_CC_CTRL_ICEDGE_NONE (_TIMER_CC_CTRL_ICEDGE_NONE << 24) /**< Shifted mode NONE for TIMER_CC_CTRL */ |
| Kojto | 98:8ab26030e058 | 613 | #define _TIMER_CC_CTRL_ICEVCTRL_SHIFT 26 /**< Shift value for TIMER_ICEVCTRL */ |
| Kojto | 98:8ab26030e058 | 614 | #define _TIMER_CC_CTRL_ICEVCTRL_MASK 0xC000000UL /**< Bit mask for TIMER_ICEVCTRL */ |
| Kojto | 98:8ab26030e058 | 615 | #define _TIMER_CC_CTRL_ICEVCTRL_DEFAULT 0x00000000UL /**< Mode DEFAULT for TIMER_CC_CTRL */ |
| Kojto | 98:8ab26030e058 | 616 | #define _TIMER_CC_CTRL_ICEVCTRL_EVERYEDGE 0x00000000UL /**< Mode EVERYEDGE for TIMER_CC_CTRL */ |
| Kojto | 98:8ab26030e058 | 617 | #define _TIMER_CC_CTRL_ICEVCTRL_EVERYSECONDEDGE 0x00000001UL /**< Mode EVERYSECONDEDGE for TIMER_CC_CTRL */ |
| Kojto | 98:8ab26030e058 | 618 | #define _TIMER_CC_CTRL_ICEVCTRL_RISING 0x00000002UL /**< Mode RISING for TIMER_CC_CTRL */ |
| Kojto | 98:8ab26030e058 | 619 | #define _TIMER_CC_CTRL_ICEVCTRL_FALLING 0x00000003UL /**< Mode FALLING for TIMER_CC_CTRL */ |
| Kojto | 98:8ab26030e058 | 620 | #define TIMER_CC_CTRL_ICEVCTRL_DEFAULT (_TIMER_CC_CTRL_ICEVCTRL_DEFAULT << 26) /**< Shifted mode DEFAULT for TIMER_CC_CTRL */ |
| Kojto | 98:8ab26030e058 | 621 | #define TIMER_CC_CTRL_ICEVCTRL_EVERYEDGE (_TIMER_CC_CTRL_ICEVCTRL_EVERYEDGE << 26) /**< Shifted mode EVERYEDGE for TIMER_CC_CTRL */ |
| Kojto | 98:8ab26030e058 | 622 | #define TIMER_CC_CTRL_ICEVCTRL_EVERYSECONDEDGE (_TIMER_CC_CTRL_ICEVCTRL_EVERYSECONDEDGE << 26) /**< Shifted mode EVERYSECONDEDGE for TIMER_CC_CTRL */ |
| Kojto | 98:8ab26030e058 | 623 | #define TIMER_CC_CTRL_ICEVCTRL_RISING (_TIMER_CC_CTRL_ICEVCTRL_RISING << 26) /**< Shifted mode RISING for TIMER_CC_CTRL */ |
| Kojto | 98:8ab26030e058 | 624 | #define TIMER_CC_CTRL_ICEVCTRL_FALLING (_TIMER_CC_CTRL_ICEVCTRL_FALLING << 26) /**< Shifted mode FALLING for TIMER_CC_CTRL */ |
| Kojto | 98:8ab26030e058 | 625 | #define TIMER_CC_CTRL_PRSCONF (0x1UL << 28) /**< PRS Configuration */ |
| Kojto | 98:8ab26030e058 | 626 | #define _TIMER_CC_CTRL_PRSCONF_SHIFT 28 /**< Shift value for TIMER_PRSCONF */ |
| Kojto | 98:8ab26030e058 | 627 | #define _TIMER_CC_CTRL_PRSCONF_MASK 0x10000000UL /**< Bit mask for TIMER_PRSCONF */ |
| Kojto | 98:8ab26030e058 | 628 | #define _TIMER_CC_CTRL_PRSCONF_DEFAULT 0x00000000UL /**< Mode DEFAULT for TIMER_CC_CTRL */ |
| Kojto | 98:8ab26030e058 | 629 | #define _TIMER_CC_CTRL_PRSCONF_PULSE 0x00000000UL /**< Mode PULSE for TIMER_CC_CTRL */ |
| Kojto | 98:8ab26030e058 | 630 | #define _TIMER_CC_CTRL_PRSCONF_LEVEL 0x00000001UL /**< Mode LEVEL for TIMER_CC_CTRL */ |
| Kojto | 98:8ab26030e058 | 631 | #define TIMER_CC_CTRL_PRSCONF_DEFAULT (_TIMER_CC_CTRL_PRSCONF_DEFAULT << 28) /**< Shifted mode DEFAULT for TIMER_CC_CTRL */ |
| Kojto | 98:8ab26030e058 | 632 | #define TIMER_CC_CTRL_PRSCONF_PULSE (_TIMER_CC_CTRL_PRSCONF_PULSE << 28) /**< Shifted mode PULSE for TIMER_CC_CTRL */ |
| Kojto | 98:8ab26030e058 | 633 | #define TIMER_CC_CTRL_PRSCONF_LEVEL (_TIMER_CC_CTRL_PRSCONF_LEVEL << 28) /**< Shifted mode LEVEL for TIMER_CC_CTRL */ |
| Kojto | 98:8ab26030e058 | 634 | |
| Kojto | 98:8ab26030e058 | 635 | /* Bit fields for TIMER CC_CCV */ |
| Kojto | 98:8ab26030e058 | 636 | #define _TIMER_CC_CCV_RESETVALUE 0x00000000UL /**< Default value for TIMER_CC_CCV */ |
| Kojto | 98:8ab26030e058 | 637 | #define _TIMER_CC_CCV_MASK 0x0000FFFFUL /**< Mask for TIMER_CC_CCV */ |
| Kojto | 98:8ab26030e058 | 638 | #define _TIMER_CC_CCV_CCV_SHIFT 0 /**< Shift value for TIMER_CCV */ |
| Kojto | 98:8ab26030e058 | 639 | #define _TIMER_CC_CCV_CCV_MASK 0xFFFFUL /**< Bit mask for TIMER_CCV */ |
| Kojto | 98:8ab26030e058 | 640 | #define _TIMER_CC_CCV_CCV_DEFAULT 0x00000000UL /**< Mode DEFAULT for TIMER_CC_CCV */ |
| Kojto | 98:8ab26030e058 | 641 | #define TIMER_CC_CCV_CCV_DEFAULT (_TIMER_CC_CCV_CCV_DEFAULT << 0) /**< Shifted mode DEFAULT for TIMER_CC_CCV */ |
| Kojto | 98:8ab26030e058 | 642 | |
| Kojto | 98:8ab26030e058 | 643 | /* Bit fields for TIMER CC_CCVP */ |
| Kojto | 98:8ab26030e058 | 644 | #define _TIMER_CC_CCVP_RESETVALUE 0x00000000UL /**< Default value for TIMER_CC_CCVP */ |
| Kojto | 98:8ab26030e058 | 645 | #define _TIMER_CC_CCVP_MASK 0x0000FFFFUL /**< Mask for TIMER_CC_CCVP */ |
| Kojto | 98:8ab26030e058 | 646 | #define _TIMER_CC_CCVP_CCVP_SHIFT 0 /**< Shift value for TIMER_CCVP */ |
| Kojto | 98:8ab26030e058 | 647 | #define _TIMER_CC_CCVP_CCVP_MASK 0xFFFFUL /**< Bit mask for TIMER_CCVP */ |
| Kojto | 98:8ab26030e058 | 648 | #define _TIMER_CC_CCVP_CCVP_DEFAULT 0x00000000UL /**< Mode DEFAULT for TIMER_CC_CCVP */ |
| Kojto | 98:8ab26030e058 | 649 | #define TIMER_CC_CCVP_CCVP_DEFAULT (_TIMER_CC_CCVP_CCVP_DEFAULT << 0) /**< Shifted mode DEFAULT for TIMER_CC_CCVP */ |
| Kojto | 98:8ab26030e058 | 650 | |
| Kojto | 98:8ab26030e058 | 651 | /* Bit fields for TIMER CC_CCVB */ |
| Kojto | 98:8ab26030e058 | 652 | #define _TIMER_CC_CCVB_RESETVALUE 0x00000000UL /**< Default value for TIMER_CC_CCVB */ |
| Kojto | 98:8ab26030e058 | 653 | #define _TIMER_CC_CCVB_MASK 0x0000FFFFUL /**< Mask for TIMER_CC_CCVB */ |
| Kojto | 98:8ab26030e058 | 654 | #define _TIMER_CC_CCVB_CCVB_SHIFT 0 /**< Shift value for TIMER_CCVB */ |
| Kojto | 98:8ab26030e058 | 655 | #define _TIMER_CC_CCVB_CCVB_MASK 0xFFFFUL /**< Bit mask for TIMER_CCVB */ |
| Kojto | 98:8ab26030e058 | 656 | #define _TIMER_CC_CCVB_CCVB_DEFAULT 0x00000000UL /**< Mode DEFAULT for TIMER_CC_CCVB */ |
| Kojto | 98:8ab26030e058 | 657 | #define TIMER_CC_CCVB_CCVB_DEFAULT (_TIMER_CC_CCVB_CCVB_DEFAULT << 0) /**< Shifted mode DEFAULT for TIMER_CC_CCVB */ |
| Kojto | 98:8ab26030e058 | 658 | |
| Kojto | 98:8ab26030e058 | 659 | /** @} End of group EFM32ZG_TIMER */ |
| Kojto | 98:8ab26030e058 | 660 | |
| Kojto | 98:8ab26030e058 | 661 |