不韋 呂 / UIT_ADDA

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Dependents:   UIT2_MovingAverage UIT2_AllpassReverb UIT2_CombReverb UIT2_FIR_LPF_Symmetry ... more

ADC_Interrupt.hpp@21:3731753ebf24, 2015-02-02 (annotated)

Committer:
MikamiUitOpen
Date:
Mon Feb 02 23:33:01 2015 +0000
Revision:
21:3731753ebf24
Parent:
16:0001d3e93bee 
22

Who changed what in which revision?

UserRevisionLine numberNew contents of line
MikamiUitOpen 0:6e0ed5adfe47 1 //------------------------------------------------------
MikamiUitOpen 0:6e0ed5adfe47 2 // Derived class of ADC_Base for use interrupt
MikamiUitOpen 0:6e0ed5adfe47 3 //
MikamiUitOpen 0:6e0ed5adfe47 4 // 2014/10/04, Copyright (c) 2014 MIKAMI, Naoki
MikamiUitOpen 0:6e0ed5adfe47 5 //------------------------------------------------------
MikamiUitOpen 0:6e0ed5adfe47 6
MikamiUitOpen 16:0001d3e93bee 7 #ifndef ADC_INTERRUPT_HPP
MikamiUitOpen 16:0001d3e93bee 8 #define ADC_INTERRUPT_HPP
MikamiUitOpen 0:6e0ed5adfe47 9
MikamiUitOpen 0:6e0ed5adfe47 10 #include "ADC_Base.hpp"
MikamiUitOpen 0:6e0ed5adfe47 11
MikamiUitOpen 0:6e0ed5adfe47 12 namespace Mikami
MikamiUitOpen 0:6e0ed5adfe47 13 {
MikamiUitOpen 0:6e0ed5adfe47 14 class ADC_Intr : public ADC_Base
MikamiUitOpen 0:6e0ed5adfe47 15 {
MikamiUitOpen 0:6e0ed5adfe47 16 private:
MikamiUitOpen 0:6e0ed5adfe47 17 // for inhibition of copy constructor
MikamiUitOpen 0:6e0ed5adfe47 18 ADC_Intr(const ADC_Intr&);
MikamiUitOpen 0:6e0ed5adfe47 19 // for inhibition of substitute operator
MikamiUitOpen 0:6e0ed5adfe47 20 ADC_Intr& operator=(const ADC_Intr&);
MikamiUitOpen 0:6e0ed5adfe47 21
MikamiUitOpen 0:6e0ed5adfe47 22 public:
MikamiUitOpen 0:6e0ed5adfe47 23 ADC_Intr(PinName pin1, int frequency,
MikamiUitOpen 0:6e0ed5adfe47 24 PinName pin2 = NC, PinName pin3 = NC)
MikamiUitOpen 0:6e0ed5adfe47 25 : ADC_Base(pin1, frequency, pin2, pin3)
MikamiUitOpen 0:6e0ed5adfe47 26 { myAdc_->CR1 |= ADC_CR1_EOCIE; } // Interrupt enable
MikamiUitOpen 0:6e0ed5adfe47 27
MikamiUitOpen 0:6e0ed5adfe47 28 // Set interrupt vector and enable IRQ of ADC
MikamiUitOpen 0:6e0ed5adfe47 29 void SetIntrVec(void (*Func)())
MikamiUitOpen 0:6e0ed5adfe47 30 {
MikamiUitOpen 0:6e0ed5adfe47 31 NVIC_SetVector(ADC_IRQn, (uint32_t)Func); // See "cmsis_nvic.h"
MikamiUitOpen 0:6e0ed5adfe47 32 NVIC_EnableIRQ(ADC_IRQn); // See "core_cm4.h"
MikamiUitOpen 0:6e0ed5adfe47 33 }
MikamiUitOpen 0:6e0ed5adfe47 34
MikamiUitOpen 0:6e0ed5adfe47 35 // Read ADC, range: [0, 0x0FFF]
MikamiUitOpen 0:6e0ed5adfe47 36 virtual uint16_t Read_u16()
MikamiUitOpen 0:6e0ed5adfe47 37 { return myAdc_->DR; }
MikamiUitOpen 0:6e0ed5adfe47 38
MikamiUitOpen 0:6e0ed5adfe47 39 // Read ADC, range: [0, 0x0FFF]
MikamiUitOpen 0:6e0ed5adfe47 40 virtual uint16_t ReadWait_u16()
MikamiUitOpen 0:6e0ed5adfe47 41 {
MikamiUitOpen 0:6e0ed5adfe47 42 WaitDone();
MikamiUitOpen 0:6e0ed5adfe47 43 return myAdc_->DR;
MikamiUitOpen 0:6e0ed5adfe47 44 }
MikamiUitOpen 0:6e0ed5adfe47 45
MikamiUitOpen 0:6e0ed5adfe47 46 // Read ADC, range: [-1.0f, 1.0f]
MikamiUitOpen 0:6e0ed5adfe47 47 virtual float Read()
MikamiUitOpen 0:6e0ed5adfe47 48 { return AMP_*((int16_t)myAdc_->DR - 2048); }
MikamiUitOpen 0:6e0ed5adfe47 49
MikamiUitOpen 0:6e0ed5adfe47 50 // Clear pending IRQ and enable IRQ
MikamiUitOpen 0:6e0ed5adfe47 51 void ClearPending_EnableIRQ()
MikamiUitOpen 0:6e0ed5adfe47 52 {
MikamiUitOpen 0:6e0ed5adfe47 53 NVIC_ClearPendingIRQ(ADC_IRQn);
MikamiUitOpen 0:6e0ed5adfe47 54 NVIC_EnableIRQ(ADC_IRQn);
MikamiUitOpen 0:6e0ed5adfe47 55 }
MikamiUitOpen 0:6e0ed5adfe47 56
MikamiUitOpen 0:6e0ed5adfe47 57 // Software start with disable IRQ
MikamiUitOpen 0:6e0ed5adfe47 58 virtual void SoftStart()
MikamiUitOpen 0:6e0ed5adfe47 59 {
MikamiUitOpen 0:6e0ed5adfe47 60 NVIC_DisableIRQ(ADC_IRQn);
MikamiUitOpen 0:6e0ed5adfe47 61 myAdc_->CR2 |= ADC_CR2_SWSTART;
MikamiUitOpen 0:6e0ed5adfe47 62 }
MikamiUitOpen 0:6e0ed5adfe47 63 };
MikamiUitOpen 0:6e0ed5adfe47 64 }
MikamiUitOpen 16:0001d3e93bee 65 #endif // ADC_INTERRUPT_HPP