不韋 呂 / F746_SD_VarableFilter

SD card player with variable cotoff frequency lowpass and highpass IIR filter. SD カードの *.wav ファイルのオーディオ信号を，遮断周波数可変 IIR 低域通過および高域通過フィルタを通して，ボードに搭載されているCODEC で出力する．このプログラムについては，CQ出版社インターフェース誌 2018年8月号で解説している．

Dependencies:   F746_GUI F746_SAI_IO FrequencyResponseDrawer SD_PlayerSkeleton

mbed_src_STM32F7/targets/cmsis/core_cm4_simd.h@11:399670d24ed9, 2017-04-10 (annotated)

Committer:
MikamiUitOpen
Date:
Mon Apr 10 01:44:22 2017 +0000
Revision:
11:399670d24ed9
Parent:
2:dcaee06f6ccb 
12

Who changed what in which revision?

UserRevisionLine numberNew contents of line
MikamiUitOpen 2:dcaee06f6ccb 1 /**************************************************************************//**
MikamiUitOpen 2:dcaee06f6ccb 2 * @file core_cm4_simd.h
MikamiUitOpen 2:dcaee06f6ccb 3 * @brief CMSIS Cortex-M4 SIMD Header File
MikamiUitOpen 2:dcaee06f6ccb 4 * @version V3.20
MikamiUitOpen 2:dcaee06f6ccb 5 * @date 25. February 2013
MikamiUitOpen 2:dcaee06f6ccb 6 *
MikamiUitOpen 2:dcaee06f6ccb 7 * @note
MikamiUitOpen 2:dcaee06f6ccb 8 *
MikamiUitOpen 2:dcaee06f6ccb 9 ******************************************************************************/
MikamiUitOpen 2:dcaee06f6ccb 10 /* Copyright (c) 2009 - 2013 ARM LIMITED
MikamiUitOpen 2:dcaee06f6ccb 11
MikamiUitOpen 2:dcaee06f6ccb 12 All rights reserved.
MikamiUitOpen 2:dcaee06f6ccb 13 Redistribution and use in source and binary forms, with or without
MikamiUitOpen 2:dcaee06f6ccb 14 modification, are permitted provided that the following conditions are met:
MikamiUitOpen 2:dcaee06f6ccb 15 - Redistributions of source code must retain the above copyright
MikamiUitOpen 2:dcaee06f6ccb 16 notice, this list of conditions and the following disclaimer.
MikamiUitOpen 2:dcaee06f6ccb 17 - Redistributions in binary form must reproduce the above copyright
MikamiUitOpen 2:dcaee06f6ccb 18 notice, this list of conditions and the following disclaimer in the
MikamiUitOpen 2:dcaee06f6ccb 19 documentation and/or other materials provided with the distribution.
MikamiUitOpen 2:dcaee06f6ccb 20 - Neither the name of ARM nor the names of its contributors may be used
MikamiUitOpen 2:dcaee06f6ccb 21 to endorse or promote products derived from this software without
MikamiUitOpen 2:dcaee06f6ccb 22 specific prior written permission.
MikamiUitOpen 2:dcaee06f6ccb 23 *
MikamiUitOpen 2:dcaee06f6ccb 24 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
MikamiUitOpen 2:dcaee06f6ccb 25 AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
MikamiUitOpen 2:dcaee06f6ccb 26 IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
MikamiUitOpen 2:dcaee06f6ccb 27 ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
MikamiUitOpen 2:dcaee06f6ccb 28 LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
MikamiUitOpen 2:dcaee06f6ccb 29 CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
MikamiUitOpen 2:dcaee06f6ccb 30 SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
MikamiUitOpen 2:dcaee06f6ccb 31 INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
MikamiUitOpen 2:dcaee06f6ccb 32 CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
MikamiUitOpen 2:dcaee06f6ccb 33 ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
MikamiUitOpen 2:dcaee06f6ccb 34 POSSIBILITY OF SUCH DAMAGE.
MikamiUitOpen 2:dcaee06f6ccb 35 ---------------------------------------------------------------------------*/
MikamiUitOpen 2:dcaee06f6ccb 36
MikamiUitOpen 2:dcaee06f6ccb 37
MikamiUitOpen 2:dcaee06f6ccb 38 #ifdef __cplusplus
MikamiUitOpen 2:dcaee06f6ccb 39 extern "C" {
MikamiUitOpen 2:dcaee06f6ccb 40 #endif
MikamiUitOpen 2:dcaee06f6ccb 41
MikamiUitOpen 2:dcaee06f6ccb 42 #ifndef __CORE_CM4_SIMD_H
MikamiUitOpen 2:dcaee06f6ccb 43 #define __CORE_CM4_SIMD_H
MikamiUitOpen 2:dcaee06f6ccb 44
MikamiUitOpen 2:dcaee06f6ccb 45
MikamiUitOpen 2:dcaee06f6ccb 46 /*******************************************************************************
MikamiUitOpen 2:dcaee06f6ccb 47 * Hardware Abstraction Layer
MikamiUitOpen 2:dcaee06f6ccb 48 ******************************************************************************/
MikamiUitOpen 2:dcaee06f6ccb 49
MikamiUitOpen 2:dcaee06f6ccb 50
MikamiUitOpen 2:dcaee06f6ccb 51 /* ################### Compiler specific Intrinsics ########################### */
MikamiUitOpen 2:dcaee06f6ccb 52 /** \defgroup CMSIS_SIMD_intrinsics CMSIS SIMD Intrinsics
MikamiUitOpen 2:dcaee06f6ccb 53 Access to dedicated SIMD instructions
MikamiUitOpen 2:dcaee06f6ccb 54 @{
MikamiUitOpen 2:dcaee06f6ccb 55 */
MikamiUitOpen 2:dcaee06f6ccb 56
MikamiUitOpen 2:dcaee06f6ccb 57 #if defined ( __CC_ARM ) /*------------------RealView Compiler -----------------*/
MikamiUitOpen 2:dcaee06f6ccb 58 /* ARM armcc specific functions */
MikamiUitOpen 2:dcaee06f6ccb 59
MikamiUitOpen 2:dcaee06f6ccb 60 /*------ CM4 SIMD Intrinsics -----------------------------------------------------*/
MikamiUitOpen 2:dcaee06f6ccb 61 #define __SADD8 __sadd8
MikamiUitOpen 2:dcaee06f6ccb 62 #define __QADD8 __qadd8
MikamiUitOpen 2:dcaee06f6ccb 63 #define __SHADD8 __shadd8
MikamiUitOpen 2:dcaee06f6ccb 64 #define __UADD8 __uadd8
MikamiUitOpen 2:dcaee06f6ccb 65 #define __UQADD8 __uqadd8
MikamiUitOpen 2:dcaee06f6ccb 66 #define __UHADD8 __uhadd8
MikamiUitOpen 2:dcaee06f6ccb 67 #define __SSUB8 __ssub8
MikamiUitOpen 2:dcaee06f6ccb 68 #define __QSUB8 __qsub8
MikamiUitOpen 2:dcaee06f6ccb 69 #define __SHSUB8 __shsub8
MikamiUitOpen 2:dcaee06f6ccb 70 #define __USUB8 __usub8
MikamiUitOpen 2:dcaee06f6ccb 71 #define __UQSUB8 __uqsub8
MikamiUitOpen 2:dcaee06f6ccb 72 #define __UHSUB8 __uhsub8
MikamiUitOpen 2:dcaee06f6ccb 73 #define __SADD16 __sadd16
MikamiUitOpen 2:dcaee06f6ccb 74 #define __QADD16 __qadd16
MikamiUitOpen 2:dcaee06f6ccb 75 #define __SHADD16 __shadd16
MikamiUitOpen 2:dcaee06f6ccb 76 #define __UADD16 __uadd16
MikamiUitOpen 2:dcaee06f6ccb 77 #define __UQADD16 __uqadd16
MikamiUitOpen 2:dcaee06f6ccb 78 #define __UHADD16 __uhadd16
MikamiUitOpen 2:dcaee06f6ccb 79 #define __SSUB16 __ssub16
MikamiUitOpen 2:dcaee06f6ccb 80 #define __QSUB16 __qsub16
MikamiUitOpen 2:dcaee06f6ccb 81 #define __SHSUB16 __shsub16
MikamiUitOpen 2:dcaee06f6ccb 82 #define __USUB16 __usub16
MikamiUitOpen 2:dcaee06f6ccb 83 #define __UQSUB16 __uqsub16
MikamiUitOpen 2:dcaee06f6ccb 84 #define __UHSUB16 __uhsub16
MikamiUitOpen 2:dcaee06f6ccb 85 #define __SASX __sasx
MikamiUitOpen 2:dcaee06f6ccb 86 #define __QASX __qasx
MikamiUitOpen 2:dcaee06f6ccb 87 #define __SHASX __shasx
MikamiUitOpen 2:dcaee06f6ccb 88 #define __UASX __uasx
MikamiUitOpen 2:dcaee06f6ccb 89 #define __UQASX __uqasx
MikamiUitOpen 2:dcaee06f6ccb 90 #define __UHASX __uhasx
MikamiUitOpen 2:dcaee06f6ccb 91 #define __SSAX __ssax
MikamiUitOpen 2:dcaee06f6ccb 92 #define __QSAX __qsax
MikamiUitOpen 2:dcaee06f6ccb 93 #define __SHSAX __shsax
MikamiUitOpen 2:dcaee06f6ccb 94 #define __USAX __usax
MikamiUitOpen 2:dcaee06f6ccb 95 #define __UQSAX __uqsax
MikamiUitOpen 2:dcaee06f6ccb 96 #define __UHSAX __uhsax
MikamiUitOpen 2:dcaee06f6ccb 97 #define __USAD8 __usad8
MikamiUitOpen 2:dcaee06f6ccb 98 #define __USADA8 __usada8
MikamiUitOpen 2:dcaee06f6ccb 99 #define __SSAT16 __ssat16
MikamiUitOpen 2:dcaee06f6ccb 100 #define __USAT16 __usat16
MikamiUitOpen 2:dcaee06f6ccb 101 #define __UXTB16 __uxtb16
MikamiUitOpen 2:dcaee06f6ccb 102 #define __UXTAB16 __uxtab16
MikamiUitOpen 2:dcaee06f6ccb 103 #define __SXTB16 __sxtb16
MikamiUitOpen 2:dcaee06f6ccb 104 #define __SXTAB16 __sxtab16
MikamiUitOpen 2:dcaee06f6ccb 105 #define __SMUAD __smuad
MikamiUitOpen 2:dcaee06f6ccb 106 #define __SMUADX __smuadx
MikamiUitOpen 2:dcaee06f6ccb 107 #define __SMLAD __smlad
MikamiUitOpen 2:dcaee06f6ccb 108 #define __SMLADX __smladx
MikamiUitOpen 2:dcaee06f6ccb 109 #define __SMLALD __smlald
MikamiUitOpen 2:dcaee06f6ccb 110 #define __SMLALDX __smlaldx
MikamiUitOpen 2:dcaee06f6ccb 111 #define __SMUSD __smusd
MikamiUitOpen 2:dcaee06f6ccb 112 #define __SMUSDX __smusdx
MikamiUitOpen 2:dcaee06f6ccb 113 #define __SMLSD __smlsd
MikamiUitOpen 2:dcaee06f6ccb 114 #define __SMLSDX __smlsdx
MikamiUitOpen 2:dcaee06f6ccb 115 #define __SMLSLD __smlsld
MikamiUitOpen 2:dcaee06f6ccb 116 #define __SMLSLDX __smlsldx
MikamiUitOpen 2:dcaee06f6ccb 117 #define __SEL __sel
MikamiUitOpen 2:dcaee06f6ccb 118 #define __QADD __qadd
MikamiUitOpen 2:dcaee06f6ccb 119 #define __QSUB __qsub
MikamiUitOpen 2:dcaee06f6ccb 120
MikamiUitOpen 2:dcaee06f6ccb 121 #define __PKHBT(ARG1,ARG2,ARG3) ( ((((uint32_t)(ARG1)) ) & 0x0000FFFFUL) | \
MikamiUitOpen 2:dcaee06f6ccb 122 ((((uint32_t)(ARG2)) << (ARG3)) & 0xFFFF0000UL) )
MikamiUitOpen 2:dcaee06f6ccb 123
MikamiUitOpen 2:dcaee06f6ccb 124 #define __PKHTB(ARG1,ARG2,ARG3) ( ((((uint32_t)(ARG1)) ) & 0xFFFF0000UL) | \
MikamiUitOpen 2:dcaee06f6ccb 125 ((((uint32_t)(ARG2)) >> (ARG3)) & 0x0000FFFFUL) )
MikamiUitOpen 2:dcaee06f6ccb 126
MikamiUitOpen 2:dcaee06f6ccb 127 #define __SMMLA(ARG1,ARG2,ARG3) ( (int32_t)((((int64_t)(ARG1) * (ARG2)) + \
MikamiUitOpen 2:dcaee06f6ccb 128 ((int64_t)(ARG3) << 32) ) >> 32))
MikamiUitOpen 2:dcaee06f6ccb 129
MikamiUitOpen 2:dcaee06f6ccb 130 /*-- End CM4 SIMD Intrinsics -----------------------------------------------------*/
MikamiUitOpen 2:dcaee06f6ccb 131
MikamiUitOpen 2:dcaee06f6ccb 132
MikamiUitOpen 2:dcaee06f6ccb 133
MikamiUitOpen 2:dcaee06f6ccb 134 #elif defined ( __ICCARM__ ) /*------------------ ICC Compiler -------------------*/
MikamiUitOpen 2:dcaee06f6ccb 135 /* IAR iccarm specific functions */
MikamiUitOpen 2:dcaee06f6ccb 136
MikamiUitOpen 2:dcaee06f6ccb 137 /*------ CM4 SIMD Intrinsics -----------------------------------------------------*/
MikamiUitOpen 2:dcaee06f6ccb 138 #include <cmsis_iar.h>
MikamiUitOpen 2:dcaee06f6ccb 139
MikamiUitOpen 2:dcaee06f6ccb 140 /*-- End CM4 SIMD Intrinsics -----------------------------------------------------*/
MikamiUitOpen 2:dcaee06f6ccb 141
MikamiUitOpen 2:dcaee06f6ccb 142
MikamiUitOpen 2:dcaee06f6ccb 143
MikamiUitOpen 2:dcaee06f6ccb 144 #elif defined ( __TMS470__ ) /*---------------- TI CCS Compiler ------------------*/
MikamiUitOpen 2:dcaee06f6ccb 145 /* TI CCS specific functions */
MikamiUitOpen 2:dcaee06f6ccb 146
MikamiUitOpen 2:dcaee06f6ccb 147 /*------ CM4 SIMD Intrinsics -----------------------------------------------------*/
MikamiUitOpen 2:dcaee06f6ccb 148 #include <cmsis_ccs.h>
MikamiUitOpen 2:dcaee06f6ccb 149
MikamiUitOpen 2:dcaee06f6ccb 150 /*-- End CM4 SIMD Intrinsics -----------------------------------------------------*/
MikamiUitOpen 2:dcaee06f6ccb 151
MikamiUitOpen 2:dcaee06f6ccb 152
MikamiUitOpen 2:dcaee06f6ccb 153
MikamiUitOpen 2:dcaee06f6ccb 154 #elif defined ( __GNUC__ ) /*------------------ GNU Compiler ---------------------*/
MikamiUitOpen 2:dcaee06f6ccb 155 /* GNU gcc specific functions */
MikamiUitOpen 2:dcaee06f6ccb 156
MikamiUitOpen 2:dcaee06f6ccb 157 /*------ CM4 SIMD Intrinsics -----------------------------------------------------*/
MikamiUitOpen 2:dcaee06f6ccb 158 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SADD8(uint32_t op1, uint32_t op2)
MikamiUitOpen 2:dcaee06f6ccb 159 {
MikamiUitOpen 2:dcaee06f6ccb 160 uint32_t result;
MikamiUitOpen 2:dcaee06f6ccb 161
MikamiUitOpen 2:dcaee06f6ccb 162 __ASM volatile ("sadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
MikamiUitOpen 2:dcaee06f6ccb 163 return(result);
MikamiUitOpen 2:dcaee06f6ccb 164 }
MikamiUitOpen 2:dcaee06f6ccb 165
MikamiUitOpen 2:dcaee06f6ccb 166 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __QADD8(uint32_t op1, uint32_t op2)
MikamiUitOpen 2:dcaee06f6ccb 167 {
MikamiUitOpen 2:dcaee06f6ccb 168 uint32_t result;
MikamiUitOpen 2:dcaee06f6ccb 169
MikamiUitOpen 2:dcaee06f6ccb 170 __ASM volatile ("qadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
MikamiUitOpen 2:dcaee06f6ccb 171 return(result);
MikamiUitOpen 2:dcaee06f6ccb 172 }
MikamiUitOpen 2:dcaee06f6ccb 173
MikamiUitOpen 2:dcaee06f6ccb 174 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SHADD8(uint32_t op1, uint32_t op2)
MikamiUitOpen 2:dcaee06f6ccb 175 {
MikamiUitOpen 2:dcaee06f6ccb 176 uint32_t result;
MikamiUitOpen 2:dcaee06f6ccb 177
MikamiUitOpen 2:dcaee06f6ccb 178 __ASM volatile ("shadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
MikamiUitOpen 2:dcaee06f6ccb 179 return(result);
MikamiUitOpen 2:dcaee06f6ccb 180 }
MikamiUitOpen 2:dcaee06f6ccb 181
MikamiUitOpen 2:dcaee06f6ccb 182 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UADD8(uint32_t op1, uint32_t op2)
MikamiUitOpen 2:dcaee06f6ccb 183 {
MikamiUitOpen 2:dcaee06f6ccb 184 uint32_t result;
MikamiUitOpen 2:dcaee06f6ccb 185
MikamiUitOpen 2:dcaee06f6ccb 186 __ASM volatile ("uadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
MikamiUitOpen 2:dcaee06f6ccb 187 return(result);
MikamiUitOpen 2:dcaee06f6ccb 188 }
MikamiUitOpen 2:dcaee06f6ccb 189
MikamiUitOpen 2:dcaee06f6ccb 190 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UQADD8(uint32_t op1, uint32_t op2)
MikamiUitOpen 2:dcaee06f6ccb 191 {
MikamiUitOpen 2:dcaee06f6ccb 192 uint32_t result;
MikamiUitOpen 2:dcaee06f6ccb 193
MikamiUitOpen 2:dcaee06f6ccb 194 __ASM volatile ("uqadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
MikamiUitOpen 2:dcaee06f6ccb 195 return(result);
MikamiUitOpen 2:dcaee06f6ccb 196 }
MikamiUitOpen 2:dcaee06f6ccb 197
MikamiUitOpen 2:dcaee06f6ccb 198 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UHADD8(uint32_t op1, uint32_t op2)
MikamiUitOpen 2:dcaee06f6ccb 199 {
MikamiUitOpen 2:dcaee06f6ccb 200 uint32_t result;
MikamiUitOpen 2:dcaee06f6ccb 201
MikamiUitOpen 2:dcaee06f6ccb 202 __ASM volatile ("uhadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
MikamiUitOpen 2:dcaee06f6ccb 203 return(result);
MikamiUitOpen 2:dcaee06f6ccb 204 }
MikamiUitOpen 2:dcaee06f6ccb 205
MikamiUitOpen 2:dcaee06f6ccb 206
MikamiUitOpen 2:dcaee06f6ccb 207 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SSUB8(uint32_t op1, uint32_t op2)
MikamiUitOpen 2:dcaee06f6ccb 208 {
MikamiUitOpen 2:dcaee06f6ccb 209 uint32_t result;
MikamiUitOpen 2:dcaee06f6ccb 210
MikamiUitOpen 2:dcaee06f6ccb 211 __ASM volatile ("ssub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
MikamiUitOpen 2:dcaee06f6ccb 212 return(result);
MikamiUitOpen 2:dcaee06f6ccb 213 }
MikamiUitOpen 2:dcaee06f6ccb 214
MikamiUitOpen 2:dcaee06f6ccb 215 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __QSUB8(uint32_t op1, uint32_t op2)
MikamiUitOpen 2:dcaee06f6ccb 216 {
MikamiUitOpen 2:dcaee06f6ccb 217 uint32_t result;
MikamiUitOpen 2:dcaee06f6ccb 218
MikamiUitOpen 2:dcaee06f6ccb 219 __ASM volatile ("qsub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
MikamiUitOpen 2:dcaee06f6ccb 220 return(result);
MikamiUitOpen 2:dcaee06f6ccb 221 }
MikamiUitOpen 2:dcaee06f6ccb 222
MikamiUitOpen 2:dcaee06f6ccb 223 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SHSUB8(uint32_t op1, uint32_t op2)
MikamiUitOpen 2:dcaee06f6ccb 224 {
MikamiUitOpen 2:dcaee06f6ccb 225 uint32_t result;
MikamiUitOpen 2:dcaee06f6ccb 226
MikamiUitOpen 2:dcaee06f6ccb 227 __ASM volatile ("shsub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
MikamiUitOpen 2:dcaee06f6ccb 228 return(result);
MikamiUitOpen 2:dcaee06f6ccb 229 }
MikamiUitOpen 2:dcaee06f6ccb 230
MikamiUitOpen 2:dcaee06f6ccb 231 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __USUB8(uint32_t op1, uint32_t op2)
MikamiUitOpen 2:dcaee06f6ccb 232 {
MikamiUitOpen 2:dcaee06f6ccb 233 uint32_t result;
MikamiUitOpen 2:dcaee06f6ccb 234
MikamiUitOpen 2:dcaee06f6ccb 235 __ASM volatile ("usub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
MikamiUitOpen 2:dcaee06f6ccb 236 return(result);
MikamiUitOpen 2:dcaee06f6ccb 237 }
MikamiUitOpen 2:dcaee06f6ccb 238
MikamiUitOpen 2:dcaee06f6ccb 239 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UQSUB8(uint32_t op1, uint32_t op2)
MikamiUitOpen 2:dcaee06f6ccb 240 {
MikamiUitOpen 2:dcaee06f6ccb 241 uint32_t result;
MikamiUitOpen 2:dcaee06f6ccb 242
MikamiUitOpen 2:dcaee06f6ccb 243 __ASM volatile ("uqsub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
MikamiUitOpen 2:dcaee06f6ccb 244 return(result);
MikamiUitOpen 2:dcaee06f6ccb 245 }
MikamiUitOpen 2:dcaee06f6ccb 246
MikamiUitOpen 2:dcaee06f6ccb 247 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UHSUB8(uint32_t op1, uint32_t op2)
MikamiUitOpen 2:dcaee06f6ccb 248 {
MikamiUitOpen 2:dcaee06f6ccb 249 uint32_t result;
MikamiUitOpen 2:dcaee06f6ccb 250
MikamiUitOpen 2:dcaee06f6ccb 251 __ASM volatile ("uhsub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
MikamiUitOpen 2:dcaee06f6ccb 252 return(result);
MikamiUitOpen 2:dcaee06f6ccb 253 }
MikamiUitOpen 2:dcaee06f6ccb 254
MikamiUitOpen 2:dcaee06f6ccb 255
MikamiUitOpen 2:dcaee06f6ccb 256 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SADD16(uint32_t op1, uint32_t op2)
MikamiUitOpen 2:dcaee06f6ccb 257 {
MikamiUitOpen 2:dcaee06f6ccb 258 uint32_t result;
MikamiUitOpen 2:dcaee06f6ccb 259
MikamiUitOpen 2:dcaee06f6ccb 260 __ASM volatile ("sadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
MikamiUitOpen 2:dcaee06f6ccb 261 return(result);
MikamiUitOpen 2:dcaee06f6ccb 262 }
MikamiUitOpen 2:dcaee06f6ccb 263
MikamiUitOpen 2:dcaee06f6ccb 264 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __QADD16(uint32_t op1, uint32_t op2)
MikamiUitOpen 2:dcaee06f6ccb 265 {
MikamiUitOpen 2:dcaee06f6ccb 266 uint32_t result;
MikamiUitOpen 2:dcaee06f6ccb 267
MikamiUitOpen 2:dcaee06f6ccb 268 __ASM volatile ("qadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
MikamiUitOpen 2:dcaee06f6ccb 269 return(result);
MikamiUitOpen 2:dcaee06f6ccb 270 }
MikamiUitOpen 2:dcaee06f6ccb 271
MikamiUitOpen 2:dcaee06f6ccb 272 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SHADD16(uint32_t op1, uint32_t op2)
MikamiUitOpen 2:dcaee06f6ccb 273 {
MikamiUitOpen 2:dcaee06f6ccb 274 uint32_t result;
MikamiUitOpen 2:dcaee06f6ccb 275
MikamiUitOpen 2:dcaee06f6ccb 276 __ASM volatile ("shadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
MikamiUitOpen 2:dcaee06f6ccb 277 return(result);
MikamiUitOpen 2:dcaee06f6ccb 278 }
MikamiUitOpen 2:dcaee06f6ccb 279
MikamiUitOpen 2:dcaee06f6ccb 280 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UADD16(uint32_t op1, uint32_t op2)
MikamiUitOpen 2:dcaee06f6ccb 281 {
MikamiUitOpen 2:dcaee06f6ccb 282 uint32_t result;
MikamiUitOpen 2:dcaee06f6ccb 283
MikamiUitOpen 2:dcaee06f6ccb 284 __ASM volatile ("uadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
MikamiUitOpen 2:dcaee06f6ccb 285 return(result);
MikamiUitOpen 2:dcaee06f6ccb 286 }
MikamiUitOpen 2:dcaee06f6ccb 287
MikamiUitOpen 2:dcaee06f6ccb 288 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UQADD16(uint32_t op1, uint32_t op2)
MikamiUitOpen 2:dcaee06f6ccb 289 {
MikamiUitOpen 2:dcaee06f6ccb 290 uint32_t result;
MikamiUitOpen 2:dcaee06f6ccb 291
MikamiUitOpen 2:dcaee06f6ccb 292 __ASM volatile ("uqadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
MikamiUitOpen 2:dcaee06f6ccb 293 return(result);
MikamiUitOpen 2:dcaee06f6ccb 294 }
MikamiUitOpen 2:dcaee06f6ccb 295
MikamiUitOpen 2:dcaee06f6ccb 296 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UHADD16(uint32_t op1, uint32_t op2)
MikamiUitOpen 2:dcaee06f6ccb 297 {
MikamiUitOpen 2:dcaee06f6ccb 298 uint32_t result;
MikamiUitOpen 2:dcaee06f6ccb 299
MikamiUitOpen 2:dcaee06f6ccb 300 __ASM volatile ("uhadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
MikamiUitOpen 2:dcaee06f6ccb 301 return(result);
MikamiUitOpen 2:dcaee06f6ccb 302 }
MikamiUitOpen 2:dcaee06f6ccb 303
MikamiUitOpen 2:dcaee06f6ccb 304 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SSUB16(uint32_t op1, uint32_t op2)
MikamiUitOpen 2:dcaee06f6ccb 305 {
MikamiUitOpen 2:dcaee06f6ccb 306 uint32_t result;
MikamiUitOpen 2:dcaee06f6ccb 307
MikamiUitOpen 2:dcaee06f6ccb 308 __ASM volatile ("ssub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
MikamiUitOpen 2:dcaee06f6ccb 309 return(result);
MikamiUitOpen 2:dcaee06f6ccb 310 }
MikamiUitOpen 2:dcaee06f6ccb 311
MikamiUitOpen 2:dcaee06f6ccb 312 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __QSUB16(uint32_t op1, uint32_t op2)
MikamiUitOpen 2:dcaee06f6ccb 313 {
MikamiUitOpen 2:dcaee06f6ccb 314 uint32_t result;
MikamiUitOpen 2:dcaee06f6ccb 315
MikamiUitOpen 2:dcaee06f6ccb 316 __ASM volatile ("qsub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
MikamiUitOpen 2:dcaee06f6ccb 317 return(result);
MikamiUitOpen 2:dcaee06f6ccb 318 }
MikamiUitOpen 2:dcaee06f6ccb 319
MikamiUitOpen 2:dcaee06f6ccb 320 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SHSUB16(uint32_t op1, uint32_t op2)
MikamiUitOpen 2:dcaee06f6ccb 321 {
MikamiUitOpen 2:dcaee06f6ccb 322 uint32_t result;
MikamiUitOpen 2:dcaee06f6ccb 323
MikamiUitOpen 2:dcaee06f6ccb 324 __ASM volatile ("shsub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
MikamiUitOpen 2:dcaee06f6ccb 325 return(result);
MikamiUitOpen 2:dcaee06f6ccb 326 }
MikamiUitOpen 2:dcaee06f6ccb 327
MikamiUitOpen 2:dcaee06f6ccb 328 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __USUB16(uint32_t op1, uint32_t op2)
MikamiUitOpen 2:dcaee06f6ccb 329 {
MikamiUitOpen 2:dcaee06f6ccb 330 uint32_t result;
MikamiUitOpen 2:dcaee06f6ccb 331
MikamiUitOpen 2:dcaee06f6ccb 332 __ASM volatile ("usub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
MikamiUitOpen 2:dcaee06f6ccb 333 return(result);
MikamiUitOpen 2:dcaee06f6ccb 334 }
MikamiUitOpen 2:dcaee06f6ccb 335
MikamiUitOpen 2:dcaee06f6ccb 336 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UQSUB16(uint32_t op1, uint32_t op2)
MikamiUitOpen 2:dcaee06f6ccb 337 {
MikamiUitOpen 2:dcaee06f6ccb 338 uint32_t result;
MikamiUitOpen 2:dcaee06f6ccb 339
MikamiUitOpen 2:dcaee06f6ccb 340 __ASM volatile ("uqsub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
MikamiUitOpen 2:dcaee06f6ccb 341 return(result);
MikamiUitOpen 2:dcaee06f6ccb 342 }
MikamiUitOpen 2:dcaee06f6ccb 343
MikamiUitOpen 2:dcaee06f6ccb 344 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UHSUB16(uint32_t op1, uint32_t op2)
MikamiUitOpen 2:dcaee06f6ccb 345 {
MikamiUitOpen 2:dcaee06f6ccb 346 uint32_t result;
MikamiUitOpen 2:dcaee06f6ccb 347
MikamiUitOpen 2:dcaee06f6ccb 348 __ASM volatile ("uhsub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
MikamiUitOpen 2:dcaee06f6ccb 349 return(result);
MikamiUitOpen 2:dcaee06f6ccb 350 }
MikamiUitOpen 2:dcaee06f6ccb 351
MikamiUitOpen 2:dcaee06f6ccb 352 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SASX(uint32_t op1, uint32_t op2)
MikamiUitOpen 2:dcaee06f6ccb 353 {
MikamiUitOpen 2:dcaee06f6ccb 354 uint32_t result;
MikamiUitOpen 2:dcaee06f6ccb 355
MikamiUitOpen 2:dcaee06f6ccb 356 __ASM volatile ("sasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
MikamiUitOpen 2:dcaee06f6ccb 357 return(result);
MikamiUitOpen 2:dcaee06f6ccb 358 }
MikamiUitOpen 2:dcaee06f6ccb 359
MikamiUitOpen 2:dcaee06f6ccb 360 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __QASX(uint32_t op1, uint32_t op2)
MikamiUitOpen 2:dcaee06f6ccb 361 {
MikamiUitOpen 2:dcaee06f6ccb 362 uint32_t result;
MikamiUitOpen 2:dcaee06f6ccb 363
MikamiUitOpen 2:dcaee06f6ccb 364 __ASM volatile ("qasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
MikamiUitOpen 2:dcaee06f6ccb 365 return(result);
MikamiUitOpen 2:dcaee06f6ccb 366 }
MikamiUitOpen 2:dcaee06f6ccb 367
MikamiUitOpen 2:dcaee06f6ccb 368 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SHASX(uint32_t op1, uint32_t op2)
MikamiUitOpen 2:dcaee06f6ccb 369 {
MikamiUitOpen 2:dcaee06f6ccb 370 uint32_t result;
MikamiUitOpen 2:dcaee06f6ccb 371
MikamiUitOpen 2:dcaee06f6ccb 372 __ASM volatile ("shasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
MikamiUitOpen 2:dcaee06f6ccb 373 return(result);
MikamiUitOpen 2:dcaee06f6ccb 374 }
MikamiUitOpen 2:dcaee06f6ccb 375
MikamiUitOpen 2:dcaee06f6ccb 376 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UASX(uint32_t op1, uint32_t op2)
MikamiUitOpen 2:dcaee06f6ccb 377 {
MikamiUitOpen 2:dcaee06f6ccb 378 uint32_t result;
MikamiUitOpen 2:dcaee06f6ccb 379
MikamiUitOpen 2:dcaee06f6ccb 380 __ASM volatile ("uasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
MikamiUitOpen 2:dcaee06f6ccb 381 return(result);
MikamiUitOpen 2:dcaee06f6ccb 382 }
MikamiUitOpen 2:dcaee06f6ccb 383
MikamiUitOpen 2:dcaee06f6ccb 384 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UQASX(uint32_t op1, uint32_t op2)
MikamiUitOpen 2:dcaee06f6ccb 385 {
MikamiUitOpen 2:dcaee06f6ccb 386 uint32_t result;
MikamiUitOpen 2:dcaee06f6ccb 387
MikamiUitOpen 2:dcaee06f6ccb 388 __ASM volatile ("uqasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
MikamiUitOpen 2:dcaee06f6ccb 389 return(result);
MikamiUitOpen 2:dcaee06f6ccb 390 }
MikamiUitOpen 2:dcaee06f6ccb 391
MikamiUitOpen 2:dcaee06f6ccb 392 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UHASX(uint32_t op1, uint32_t op2)
MikamiUitOpen 2:dcaee06f6ccb 393 {
MikamiUitOpen 2:dcaee06f6ccb 394 uint32_t result;
MikamiUitOpen 2:dcaee06f6ccb 395
MikamiUitOpen 2:dcaee06f6ccb 396 __ASM volatile ("uhasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
MikamiUitOpen 2:dcaee06f6ccb 397 return(result);
MikamiUitOpen 2:dcaee06f6ccb 398 }
MikamiUitOpen 2:dcaee06f6ccb 399
MikamiUitOpen 2:dcaee06f6ccb 400 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SSAX(uint32_t op1, uint32_t op2)
MikamiUitOpen 2:dcaee06f6ccb 401 {
MikamiUitOpen 2:dcaee06f6ccb 402 uint32_t result;
MikamiUitOpen 2:dcaee06f6ccb 403
MikamiUitOpen 2:dcaee06f6ccb 404 __ASM volatile ("ssax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
MikamiUitOpen 2:dcaee06f6ccb 405 return(result);
MikamiUitOpen 2:dcaee06f6ccb 406 }
MikamiUitOpen 2:dcaee06f6ccb 407
MikamiUitOpen 2:dcaee06f6ccb 408 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __QSAX(uint32_t op1, uint32_t op2)
MikamiUitOpen 2:dcaee06f6ccb 409 {
MikamiUitOpen 2:dcaee06f6ccb 410 uint32_t result;
MikamiUitOpen 2:dcaee06f6ccb 411
MikamiUitOpen 2:dcaee06f6ccb 412 __ASM volatile ("qsax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
MikamiUitOpen 2:dcaee06f6ccb 413 return(result);
MikamiUitOpen 2:dcaee06f6ccb 414 }
MikamiUitOpen 2:dcaee06f6ccb 415
MikamiUitOpen 2:dcaee06f6ccb 416 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SHSAX(uint32_t op1, uint32_t op2)
MikamiUitOpen 2:dcaee06f6ccb 417 {
MikamiUitOpen 2:dcaee06f6ccb 418 uint32_t result;
MikamiUitOpen 2:dcaee06f6ccb 419
MikamiUitOpen 2:dcaee06f6ccb 420 __ASM volatile ("shsax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
MikamiUitOpen 2:dcaee06f6ccb 421 return(result);
MikamiUitOpen 2:dcaee06f6ccb 422 }
MikamiUitOpen 2:dcaee06f6ccb 423
MikamiUitOpen 2:dcaee06f6ccb 424 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __USAX(uint32_t op1, uint32_t op2)
MikamiUitOpen 2:dcaee06f6ccb 425 {
MikamiUitOpen 2:dcaee06f6ccb 426 uint32_t result;
MikamiUitOpen 2:dcaee06f6ccb 427
MikamiUitOpen 2:dcaee06f6ccb 428 __ASM volatile ("usax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
MikamiUitOpen 2:dcaee06f6ccb 429 return(result);
MikamiUitOpen 2:dcaee06f6ccb 430 }
MikamiUitOpen 2:dcaee06f6ccb 431
MikamiUitOpen 2:dcaee06f6ccb 432 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UQSAX(uint32_t op1, uint32_t op2)
MikamiUitOpen 2:dcaee06f6ccb 433 {
MikamiUitOpen 2:dcaee06f6ccb 434 uint32_t result;
MikamiUitOpen 2:dcaee06f6ccb 435
MikamiUitOpen 2:dcaee06f6ccb 436 __ASM volatile ("uqsax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
MikamiUitOpen 2:dcaee06f6ccb 437 return(result);
MikamiUitOpen 2:dcaee06f6ccb 438 }
MikamiUitOpen 2:dcaee06f6ccb 439
MikamiUitOpen 2:dcaee06f6ccb 440 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UHSAX(uint32_t op1, uint32_t op2)
MikamiUitOpen 2:dcaee06f6ccb 441 {
MikamiUitOpen 2:dcaee06f6ccb 442 uint32_t result;
MikamiUitOpen 2:dcaee06f6ccb 443
MikamiUitOpen 2:dcaee06f6ccb 444 __ASM volatile ("uhsax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
MikamiUitOpen 2:dcaee06f6ccb 445 return(result);
MikamiUitOpen 2:dcaee06f6ccb 446 }
MikamiUitOpen 2:dcaee06f6ccb 447
MikamiUitOpen 2:dcaee06f6ccb 448 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __USAD8(uint32_t op1, uint32_t op2)
MikamiUitOpen 2:dcaee06f6ccb 449 {
MikamiUitOpen 2:dcaee06f6ccb 450 uint32_t result;
MikamiUitOpen 2:dcaee06f6ccb 451
MikamiUitOpen 2:dcaee06f6ccb 452 __ASM volatile ("usad8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
MikamiUitOpen 2:dcaee06f6ccb 453 return(result);
MikamiUitOpen 2:dcaee06f6ccb 454 }
MikamiUitOpen 2:dcaee06f6ccb 455
MikamiUitOpen 2:dcaee06f6ccb 456 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __USADA8(uint32_t op1, uint32_t op2, uint32_t op3)
MikamiUitOpen 2:dcaee06f6ccb 457 {
MikamiUitOpen 2:dcaee06f6ccb 458 uint32_t result;
MikamiUitOpen 2:dcaee06f6ccb 459
MikamiUitOpen 2:dcaee06f6ccb 460 __ASM volatile ("usada8 %0, %1, %2, %3" : "=r" (result) : "r" (op1), "r" (op2), "r" (op3) );
MikamiUitOpen 2:dcaee06f6ccb 461 return(result);
MikamiUitOpen 2:dcaee06f6ccb 462 }
MikamiUitOpen 2:dcaee06f6ccb 463
MikamiUitOpen 2:dcaee06f6ccb 464 #define __SSAT16(ARG1,ARG2) \
MikamiUitOpen 2:dcaee06f6ccb 465 ({ \
MikamiUitOpen 2:dcaee06f6ccb 466 uint32_t __RES, __ARG1 = (ARG1); \
MikamiUitOpen 2:dcaee06f6ccb 467 __ASM ("ssat16 %0, %1, %2" : "=r" (__RES) : "I" (ARG2), "r" (__ARG1) ); \
MikamiUitOpen 2:dcaee06f6ccb 468 __RES; \
MikamiUitOpen 2:dcaee06f6ccb 469 })
MikamiUitOpen 2:dcaee06f6ccb 470
MikamiUitOpen 2:dcaee06f6ccb 471 #define __USAT16(ARG1,ARG2) \
MikamiUitOpen 2:dcaee06f6ccb 472 ({ \
MikamiUitOpen 2:dcaee06f6ccb 473 uint32_t __RES, __ARG1 = (ARG1); \
MikamiUitOpen 2:dcaee06f6ccb 474 __ASM ("usat16 %0, %1, %2" : "=r" (__RES) : "I" (ARG2), "r" (__ARG1) ); \
MikamiUitOpen 2:dcaee06f6ccb 475 __RES; \
MikamiUitOpen 2:dcaee06f6ccb 476 })
MikamiUitOpen 2:dcaee06f6ccb 477
MikamiUitOpen 2:dcaee06f6ccb 478 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UXTB16(uint32_t op1)
MikamiUitOpen 2:dcaee06f6ccb 479 {
MikamiUitOpen 2:dcaee06f6ccb 480 uint32_t result;
MikamiUitOpen 2:dcaee06f6ccb 481
MikamiUitOpen 2:dcaee06f6ccb 482 __ASM volatile ("uxtb16 %0, %1" : "=r" (result) : "r" (op1));
MikamiUitOpen 2:dcaee06f6ccb 483 return(result);
MikamiUitOpen 2:dcaee06f6ccb 484 }
MikamiUitOpen 2:dcaee06f6ccb 485
MikamiUitOpen 2:dcaee06f6ccb 486 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UXTAB16(uint32_t op1, uint32_t op2)
MikamiUitOpen 2:dcaee06f6ccb 487 {
MikamiUitOpen 2:dcaee06f6ccb 488 uint32_t result;
MikamiUitOpen 2:dcaee06f6ccb 489
MikamiUitOpen 2:dcaee06f6ccb 490 __ASM volatile ("uxtab16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
MikamiUitOpen 2:dcaee06f6ccb 491 return(result);
MikamiUitOpen 2:dcaee06f6ccb 492 }
MikamiUitOpen 2:dcaee06f6ccb 493
MikamiUitOpen 2:dcaee06f6ccb 494 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SXTB16(uint32_t op1)
MikamiUitOpen 2:dcaee06f6ccb 495 {
MikamiUitOpen 2:dcaee06f6ccb 496 uint32_t result;
MikamiUitOpen 2:dcaee06f6ccb 497
MikamiUitOpen 2:dcaee06f6ccb 498 __ASM volatile ("sxtb16 %0, %1" : "=r" (result) : "r" (op1));
MikamiUitOpen 2:dcaee06f6ccb 499 return(result);
MikamiUitOpen 2:dcaee06f6ccb 500 }
MikamiUitOpen 2:dcaee06f6ccb 501
MikamiUitOpen 2:dcaee06f6ccb 502 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SXTAB16(uint32_t op1, uint32_t op2)
MikamiUitOpen 2:dcaee06f6ccb 503 {
MikamiUitOpen 2:dcaee06f6ccb 504 uint32_t result;
MikamiUitOpen 2:dcaee06f6ccb 505
MikamiUitOpen 2:dcaee06f6ccb 506 __ASM volatile ("sxtab16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
MikamiUitOpen 2:dcaee06f6ccb 507 return(result);
MikamiUitOpen 2:dcaee06f6ccb 508 }
MikamiUitOpen 2:dcaee06f6ccb 509
MikamiUitOpen 2:dcaee06f6ccb 510 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SMUAD (uint32_t op1, uint32_t op2)
MikamiUitOpen 2:dcaee06f6ccb 511 {
MikamiUitOpen 2:dcaee06f6ccb 512 uint32_t result;
MikamiUitOpen 2:dcaee06f6ccb 513
MikamiUitOpen 2:dcaee06f6ccb 514 __ASM volatile ("smuad %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
MikamiUitOpen 2:dcaee06f6ccb 515 return(result);
MikamiUitOpen 2:dcaee06f6ccb 516 }
MikamiUitOpen 2:dcaee06f6ccb 517
MikamiUitOpen 2:dcaee06f6ccb 518 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SMUADX (uint32_t op1, uint32_t op2)
MikamiUitOpen 2:dcaee06f6ccb 519 {
MikamiUitOpen 2:dcaee06f6ccb 520 uint32_t result;
MikamiUitOpen 2:dcaee06f6ccb 521
MikamiUitOpen 2:dcaee06f6ccb 522 __ASM volatile ("smuadx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
MikamiUitOpen 2:dcaee06f6ccb 523 return(result);
MikamiUitOpen 2:dcaee06f6ccb 524 }
MikamiUitOpen 2:dcaee06f6ccb 525
MikamiUitOpen 2:dcaee06f6ccb 526 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SMLAD (uint32_t op1, uint32_t op2, uint32_t op3)
MikamiUitOpen 2:dcaee06f6ccb 527 {
MikamiUitOpen 2:dcaee06f6ccb 528 uint32_t result;
MikamiUitOpen 2:dcaee06f6ccb 529
MikamiUitOpen 2:dcaee06f6ccb 530 __ASM volatile ("smlad %0, %1, %2, %3" : "=r" (result) : "r" (op1), "r" (op2), "r" (op3) );
MikamiUitOpen 2:dcaee06f6ccb 531 return(result);
MikamiUitOpen 2:dcaee06f6ccb 532 }
MikamiUitOpen 2:dcaee06f6ccb 533
MikamiUitOpen 2:dcaee06f6ccb 534 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SMLADX (uint32_t op1, uint32_t op2, uint32_t op3)
MikamiUitOpen 2:dcaee06f6ccb 535 {
MikamiUitOpen 2:dcaee06f6ccb 536 uint32_t result;
MikamiUitOpen 2:dcaee06f6ccb 537
MikamiUitOpen 2:dcaee06f6ccb 538 __ASM volatile ("smladx %0, %1, %2, %3" : "=r" (result) : "r" (op1), "r" (op2), "r" (op3) );
MikamiUitOpen 2:dcaee06f6ccb 539 return(result);
MikamiUitOpen 2:dcaee06f6ccb 540 }
MikamiUitOpen 2:dcaee06f6ccb 541
MikamiUitOpen 2:dcaee06f6ccb 542 #define __SMLALD(ARG1,ARG2,ARG3) \
MikamiUitOpen 2:dcaee06f6ccb 543 ({ \
MikamiUitOpen 2:dcaee06f6ccb 544 uint32_t __ARG1 = (ARG1), __ARG2 = (ARG2), __ARG3_H = (uint32_t)((uint64_t)(ARG3) >> 32), __ARG3_L = (uint32_t)((uint64_t)(ARG3) & 0xFFFFFFFFUL); \
MikamiUitOpen 2:dcaee06f6ccb 545 __ASM volatile ("smlald %0, %1, %2, %3" : "=r" (__ARG3_L), "=r" (__ARG3_H) : "r" (__ARG1), "r" (__ARG2), "0" (__ARG3_L), "1" (__ARG3_H) ); \
MikamiUitOpen 2:dcaee06f6ccb 546 (uint64_t)(((uint64_t)__ARG3_H << 32) | __ARG3_L); \
MikamiUitOpen 2:dcaee06f6ccb 547 })
MikamiUitOpen 2:dcaee06f6ccb 548
MikamiUitOpen 2:dcaee06f6ccb 549 #define __SMLALDX(ARG1,ARG2,ARG3) \
MikamiUitOpen 2:dcaee06f6ccb 550 ({ \
MikamiUitOpen 2:dcaee06f6ccb 551 uint32_t __ARG1 = (ARG1), __ARG2 = (ARG2), __ARG3_H = (uint32_t)((uint64_t)(ARG3) >> 32), __ARG3_L = (uint32_t)((uint64_t)(ARG3) & 0xFFFFFFFFUL); \
MikamiUitOpen 2:dcaee06f6ccb 552 __ASM volatile ("smlaldx %0, %1, %2, %3" : "=r" (__ARG3_L), "=r" (__ARG3_H) : "r" (__ARG1), "r" (__ARG2), "0" (__ARG3_L), "1" (__ARG3_H) ); \
MikamiUitOpen 2:dcaee06f6ccb 553 (uint64_t)(((uint64_t)__ARG3_H << 32) | __ARG3_L); \
MikamiUitOpen 2:dcaee06f6ccb 554 })
MikamiUitOpen 2:dcaee06f6ccb 555
MikamiUitOpen 2:dcaee06f6ccb 556 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SMUSD (uint32_t op1, uint32_t op2)
MikamiUitOpen 2:dcaee06f6ccb 557 {
MikamiUitOpen 2:dcaee06f6ccb 558 uint32_t result;
MikamiUitOpen 2:dcaee06f6ccb 559
MikamiUitOpen 2:dcaee06f6ccb 560 __ASM volatile ("smusd %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
MikamiUitOpen 2:dcaee06f6ccb 561 return(result);
MikamiUitOpen 2:dcaee06f6ccb 562 }
MikamiUitOpen 2:dcaee06f6ccb 563
MikamiUitOpen 2:dcaee06f6ccb 564 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SMUSDX (uint32_t op1, uint32_t op2)
MikamiUitOpen 2:dcaee06f6ccb 565 {
MikamiUitOpen 2:dcaee06f6ccb 566 uint32_t result;
MikamiUitOpen 2:dcaee06f6ccb 567
MikamiUitOpen 2:dcaee06f6ccb 568 __ASM volatile ("smusdx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
MikamiUitOpen 2:dcaee06f6ccb 569 return(result);
MikamiUitOpen 2:dcaee06f6ccb 570 }
MikamiUitOpen 2:dcaee06f6ccb 571
MikamiUitOpen 2:dcaee06f6ccb 572 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SMLSD (uint32_t op1, uint32_t op2, uint32_t op3)
MikamiUitOpen 2:dcaee06f6ccb 573 {
MikamiUitOpen 2:dcaee06f6ccb 574 uint32_t result;
MikamiUitOpen 2:dcaee06f6ccb 575
MikamiUitOpen 2:dcaee06f6ccb 576 __ASM volatile ("smlsd %0, %1, %2, %3" : "=r" (result) : "r" (op1), "r" (op2), "r" (op3) );
MikamiUitOpen 2:dcaee06f6ccb 577 return(result);
MikamiUitOpen 2:dcaee06f6ccb 578 }
MikamiUitOpen 2:dcaee06f6ccb 579
MikamiUitOpen 2:dcaee06f6ccb 580 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SMLSDX (uint32_t op1, uint32_t op2, uint32_t op3)
MikamiUitOpen 2:dcaee06f6ccb 581 {
MikamiUitOpen 2:dcaee06f6ccb 582 uint32_t result;
MikamiUitOpen 2:dcaee06f6ccb 583
MikamiUitOpen 2:dcaee06f6ccb 584 __ASM volatile ("smlsdx %0, %1, %2, %3" : "=r" (result) : "r" (op1), "r" (op2), "r" (op3) );
MikamiUitOpen 2:dcaee06f6ccb 585 return(result);
MikamiUitOpen 2:dcaee06f6ccb 586 }
MikamiUitOpen 2:dcaee06f6ccb 587
MikamiUitOpen 2:dcaee06f6ccb 588 #define __SMLSLD(ARG1,ARG2,ARG3) \
MikamiUitOpen 2:dcaee06f6ccb 589 ({ \
MikamiUitOpen 2:dcaee06f6ccb 590 uint32_t __ARG1 = (ARG1), __ARG2 = (ARG2), __ARG3_H = (uint32_t)((ARG3) >> 32), __ARG3_L = (uint32_t)((ARG3) & 0xFFFFFFFFUL); \
MikamiUitOpen 2:dcaee06f6ccb 591 __ASM volatile ("smlsld %0, %1, %2, %3" : "=r" (__ARG3_L), "=r" (__ARG3_H) : "r" (__ARG1), "r" (__ARG2), "0" (__ARG3_L), "1" (__ARG3_H) ); \
MikamiUitOpen 2:dcaee06f6ccb 592 (uint64_t)(((uint64_t)__ARG3_H << 32) | __ARG3_L); \
MikamiUitOpen 2:dcaee06f6ccb 593 })
MikamiUitOpen 2:dcaee06f6ccb 594
MikamiUitOpen 2:dcaee06f6ccb 595 #define __SMLSLDX(ARG1,ARG2,ARG3) \
MikamiUitOpen 2:dcaee06f6ccb 596 ({ \
MikamiUitOpen 2:dcaee06f6ccb 597 uint32_t __ARG1 = (ARG1), __ARG2 = (ARG2), __ARG3_H = (uint32_t)((ARG3) >> 32), __ARG3_L = (uint32_t)((ARG3) & 0xFFFFFFFFUL); \
MikamiUitOpen 2:dcaee06f6ccb 598 __ASM volatile ("smlsldx %0, %1, %2, %3" : "=r" (__ARG3_L), "=r" (__ARG3_H) : "r" (__ARG1), "r" (__ARG2), "0" (__ARG3_L), "1" (__ARG3_H) ); \
MikamiUitOpen 2:dcaee06f6ccb 599 (uint64_t)(((uint64_t)__ARG3_H << 32) | __ARG3_L); \
MikamiUitOpen 2:dcaee06f6ccb 600 })
MikamiUitOpen 2:dcaee06f6ccb 601
MikamiUitOpen 2:dcaee06f6ccb 602 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SEL (uint32_t op1, uint32_t op2)
MikamiUitOpen 2:dcaee06f6ccb 603 {
MikamiUitOpen 2:dcaee06f6ccb 604 uint32_t result;
MikamiUitOpen 2:dcaee06f6ccb 605
MikamiUitOpen 2:dcaee06f6ccb 606 __ASM volatile ("sel %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
MikamiUitOpen 2:dcaee06f6ccb 607 return(result);
MikamiUitOpen 2:dcaee06f6ccb 608 }
MikamiUitOpen 2:dcaee06f6ccb 609
MikamiUitOpen 2:dcaee06f6ccb 610 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __QADD(uint32_t op1, uint32_t op2)
MikamiUitOpen 2:dcaee06f6ccb 611 {
MikamiUitOpen 2:dcaee06f6ccb 612 uint32_t result;
MikamiUitOpen 2:dcaee06f6ccb 613
MikamiUitOpen 2:dcaee06f6ccb 614 __ASM volatile ("qadd %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
MikamiUitOpen 2:dcaee06f6ccb 615 return(result);
MikamiUitOpen 2:dcaee06f6ccb 616 }
MikamiUitOpen 2:dcaee06f6ccb 617
MikamiUitOpen 2:dcaee06f6ccb 618 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __QSUB(uint32_t op1, uint32_t op2)
MikamiUitOpen 2:dcaee06f6ccb 619 {
MikamiUitOpen 2:dcaee06f6ccb 620 uint32_t result;
MikamiUitOpen 2:dcaee06f6ccb 621
MikamiUitOpen 2:dcaee06f6ccb 622 __ASM volatile ("qsub %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
MikamiUitOpen 2:dcaee06f6ccb 623 return(result);
MikamiUitOpen 2:dcaee06f6ccb 624 }
MikamiUitOpen 2:dcaee06f6ccb 625
MikamiUitOpen 2:dcaee06f6ccb 626 #define __PKHBT(ARG1,ARG2,ARG3) \
MikamiUitOpen 2:dcaee06f6ccb 627 ({ \
MikamiUitOpen 2:dcaee06f6ccb 628 uint32_t __RES, __ARG1 = (ARG1), __ARG2 = (ARG2); \
MikamiUitOpen 2:dcaee06f6ccb 629 __ASM ("pkhbt %0, %1, %2, lsl %3" : "=r" (__RES) : "r" (__ARG1), "r" (__ARG2), "I" (ARG3) ); \
MikamiUitOpen 2:dcaee06f6ccb 630 __RES; \
MikamiUitOpen 2:dcaee06f6ccb 631 })
MikamiUitOpen 2:dcaee06f6ccb 632
MikamiUitOpen 2:dcaee06f6ccb 633 #define __PKHTB(ARG1,ARG2,ARG3) \
MikamiUitOpen 2:dcaee06f6ccb 634 ({ \
MikamiUitOpen 2:dcaee06f6ccb 635 uint32_t __RES, __ARG1 = (ARG1), __ARG2 = (ARG2); \
MikamiUitOpen 2:dcaee06f6ccb 636 if (ARG3 == 0) \
MikamiUitOpen 2:dcaee06f6ccb 637 __ASM ("pkhtb %0, %1, %2" : "=r" (__RES) : "r" (__ARG1), "r" (__ARG2) ); \
MikamiUitOpen 2:dcaee06f6ccb 638 else \
MikamiUitOpen 2:dcaee06f6ccb 639 __ASM ("pkhtb %0, %1, %2, asr %3" : "=r" (__RES) : "r" (__ARG1), "r" (__ARG2), "I" (ARG3) ); \
MikamiUitOpen 2:dcaee06f6ccb 640 __RES; \
MikamiUitOpen 2:dcaee06f6ccb 641 })
MikamiUitOpen 2:dcaee06f6ccb 642
MikamiUitOpen 2:dcaee06f6ccb 643 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SMMLA (int32_t op1, int32_t op2, int32_t op3)
MikamiUitOpen 2:dcaee06f6ccb 644 {
MikamiUitOpen 2:dcaee06f6ccb 645 int32_t result;
MikamiUitOpen 2:dcaee06f6ccb 646
MikamiUitOpen 2:dcaee06f6ccb 647 __ASM volatile ("smmla %0, %1, %2, %3" : "=r" (result): "r" (op1), "r" (op2), "r" (op3) );
MikamiUitOpen 2:dcaee06f6ccb 648 return(result);
MikamiUitOpen 2:dcaee06f6ccb 649 }
MikamiUitOpen 2:dcaee06f6ccb 650
MikamiUitOpen 2:dcaee06f6ccb 651 /*-- End CM4 SIMD Intrinsics -----------------------------------------------------*/
MikamiUitOpen 2:dcaee06f6ccb 652
MikamiUitOpen 2:dcaee06f6ccb 653
MikamiUitOpen 2:dcaee06f6ccb 654
MikamiUitOpen 2:dcaee06f6ccb 655 #elif defined ( __TASKING__ ) /*------------------ TASKING Compiler --------------*/
MikamiUitOpen 2:dcaee06f6ccb 656 /* TASKING carm specific functions */
MikamiUitOpen 2:dcaee06f6ccb 657
MikamiUitOpen 2:dcaee06f6ccb 658
MikamiUitOpen 2:dcaee06f6ccb 659 /*------ CM4 SIMD Intrinsics -----------------------------------------------------*/
MikamiUitOpen 2:dcaee06f6ccb 660 /* not yet supported */
MikamiUitOpen 2:dcaee06f6ccb 661 /*-- End CM4 SIMD Intrinsics -----------------------------------------------------*/
MikamiUitOpen 2:dcaee06f6ccb 662
MikamiUitOpen 2:dcaee06f6ccb 663
MikamiUitOpen 2:dcaee06f6ccb 664 #endif
MikamiUitOpen 2:dcaee06f6ccb 665
MikamiUitOpen 2:dcaee06f6ccb 666 /*@} end of group CMSIS_SIMD_intrinsics */
MikamiUitOpen 2:dcaee06f6ccb 667
MikamiUitOpen 2:dcaee06f6ccb 668
MikamiUitOpen 2:dcaee06f6ccb 669 #endif /* __CORE_CM4_SIMD_H */
MikamiUitOpen 2:dcaee06f6ccb 670
MikamiUitOpen 2:dcaee06f6ccb 671 #ifdef __cplusplus
MikamiUitOpen 2:dcaee06f6ccb 672 }
MikamiUitOpen 2:dcaee06f6ccb 673 #endif