不韋 呂 / F746_SD_Player_Demo

Demo program for library named SD_PlayerSkeleton of SD card player skeleton. SD カードプレーヤのための骨組みとして使うためのライブラリ SD_PlayerSkeleton の使用例．このプログラムについては，CQ出版社インターフェース誌 2018年7月号で解説している．

Dependencies:   F746_GUI F746_SAI_IO SD_PlayerSkeleton

mbed_src_STM32F7/hal/i2c_api.h@19:3c3833ec00d2, 2017-04-09 (annotated)

Committer:
MikamiUitOpen
Date:
Sun Apr 09 12:44:17 2017 +0000
Revision:
19:3c3833ec00d2
Parent:
2:cf42e62a97dc 
20

Who changed what in which revision?

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MikamiUitOpen 2:cf42e62a97dc 1 /* mbed Microcontroller Library
MikamiUitOpen 2:cf42e62a97dc 2 * Copyright (c) 2006-2015 ARM Limited
MikamiUitOpen 2:cf42e62a97dc 3 *
MikamiUitOpen 2:cf42e62a97dc 4 * Licensed under the Apache License, Version 2.0 (the "License");
MikamiUitOpen 2:cf42e62a97dc 5 * you may not use this file except in compliance with the License.
MikamiUitOpen 2:cf42e62a97dc 6 * You may obtain a copy of the License at
MikamiUitOpen 2:cf42e62a97dc 7 *
MikamiUitOpen 2:cf42e62a97dc 8 * http://www.apache.org/licenses/LICENSE-2.0
MikamiUitOpen 2:cf42e62a97dc 9 *
MikamiUitOpen 2:cf42e62a97dc 10 * Unless required by applicable law or agreed to in writing, software
MikamiUitOpen 2:cf42e62a97dc 11 * distributed under the License is distributed on an "AS IS" BASIS,
MikamiUitOpen 2:cf42e62a97dc 12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
MikamiUitOpen 2:cf42e62a97dc 13 * See the License for the specific language governing permissions and
MikamiUitOpen 2:cf42e62a97dc 14 * limitations under the License.
MikamiUitOpen 2:cf42e62a97dc 15 */
MikamiUitOpen 2:cf42e62a97dc 16 #ifndef MBED_I2C_API_H
MikamiUitOpen 2:cf42e62a97dc 17 #define MBED_I2C_API_H
MikamiUitOpen 2:cf42e62a97dc 18
MikamiUitOpen 2:cf42e62a97dc 19 #include "device.h"
MikamiUitOpen 2:cf42e62a97dc 20 #include "buffer.h"
MikamiUitOpen 2:cf42e62a97dc 21 #include "dma_api.h"
MikamiUitOpen 2:cf42e62a97dc 22
MikamiUitOpen 2:cf42e62a97dc 23 #if DEVICE_I2C
MikamiUitOpen 2:cf42e62a97dc 24
MikamiUitOpen 2:cf42e62a97dc 25 /**
MikamiUitOpen 2:cf42e62a97dc 26 * @defgroup I2CEvents I2C Events Macros
MikamiUitOpen 2:cf42e62a97dc 27 *
MikamiUitOpen 2:cf42e62a97dc 28 * @{
MikamiUitOpen 2:cf42e62a97dc 29 */
MikamiUitOpen 2:cf42e62a97dc 30 #define I2C_EVENT_ERROR (1 << 1)
MikamiUitOpen 2:cf42e62a97dc 31 #define I2C_EVENT_ERROR_NO_SLAVE (1 << 2)
MikamiUitOpen 2:cf42e62a97dc 32 #define I2C_EVENT_TRANSFER_COMPLETE (1 << 3)
MikamiUitOpen 2:cf42e62a97dc 33 #define I2C_EVENT_TRANSFER_EARLY_NACK (1 << 4)
MikamiUitOpen 2:cf42e62a97dc 34 #define I2C_EVENT_ALL (I2C_EVENT_ERROR | I2C_EVENT_TRANSFER_COMPLETE | I2C_EVENT_ERROR_NO_SLAVE | I2C_EVENT_TRANSFER_EARLY_NACK)
MikamiUitOpen 2:cf42e62a97dc 35
MikamiUitOpen 2:cf42e62a97dc 36 /**@}*/
MikamiUitOpen 2:cf42e62a97dc 37
MikamiUitOpen 2:cf42e62a97dc 38 #if DEVICE_I2C_ASYNCH
MikamiUitOpen 2:cf42e62a97dc 39 /** Asynch i2c hal structure
MikamiUitOpen 2:cf42e62a97dc 40 */
MikamiUitOpen 2:cf42e62a97dc 41 typedef struct {
MikamiUitOpen 2:cf42e62a97dc 42 struct i2c_s i2c; /**< Target specific i2c structure */
MikamiUitOpen 2:cf42e62a97dc 43 struct buffer_s tx_buff; /**< Tx buffer */
MikamiUitOpen 2:cf42e62a97dc 44 struct buffer_s rx_buff; /**< Rx buffer */
MikamiUitOpen 2:cf42e62a97dc 45 } i2c_t;
MikamiUitOpen 2:cf42e62a97dc 46
MikamiUitOpen 2:cf42e62a97dc 47 #else
MikamiUitOpen 2:cf42e62a97dc 48 /** Non-asynch i2c hal structure
MikamiUitOpen 2:cf42e62a97dc 49 */
MikamiUitOpen 2:cf42e62a97dc 50 typedef struct i2c_s i2c_t;
MikamiUitOpen 2:cf42e62a97dc 51
MikamiUitOpen 2:cf42e62a97dc 52 #endif
MikamiUitOpen 2:cf42e62a97dc 53
MikamiUitOpen 2:cf42e62a97dc 54 enum {
MikamiUitOpen 2:cf42e62a97dc 55 I2C_ERROR_NO_SLAVE = -1,
MikamiUitOpen 2:cf42e62a97dc 56 I2C_ERROR_BUS_BUSY = -2
MikamiUitOpen 2:cf42e62a97dc 57 };
MikamiUitOpen 2:cf42e62a97dc 58
MikamiUitOpen 2:cf42e62a97dc 59 #ifdef __cplusplus
MikamiUitOpen 2:cf42e62a97dc 60 extern "C" {
MikamiUitOpen 2:cf42e62a97dc 61 #endif
MikamiUitOpen 2:cf42e62a97dc 62
MikamiUitOpen 2:cf42e62a97dc 63 /**
MikamiUitOpen 2:cf42e62a97dc 64 * \defgroup GeneralI2C I2C Configuration Functions
MikamiUitOpen 2:cf42e62a97dc 65 * @{
MikamiUitOpen 2:cf42e62a97dc 66 */
MikamiUitOpen 2:cf42e62a97dc 67
MikamiUitOpen 2:cf42e62a97dc 68 /** Initialize the I2C peripheral. It sets the default parameters for I2C
MikamiUitOpen 2:cf42e62a97dc 69 * peripheral, and configure its specifieds pins.
MikamiUitOpen 2:cf42e62a97dc 70 * @param obj The i2c object
MikamiUitOpen 2:cf42e62a97dc 71 * @param sda The sda pin
MikamiUitOpen 2:cf42e62a97dc 72 * @param scl The scl pin
MikamiUitOpen 2:cf42e62a97dc 73 */
MikamiUitOpen 2:cf42e62a97dc 74 void i2c_init(i2c_t *obj, PinName sda, PinName scl);
MikamiUitOpen 2:cf42e62a97dc 75
MikamiUitOpen 2:cf42e62a97dc 76 /** Configure the I2C frequency.
MikamiUitOpen 2:cf42e62a97dc 77 * @param obj The i2c object
MikamiUitOpen 2:cf42e62a97dc 78 * @param hz Frequency in Hz
MikamiUitOpen 2:cf42e62a97dc 79 */
MikamiUitOpen 2:cf42e62a97dc 80 void i2c_frequency(i2c_t *obj, int hz);
MikamiUitOpen 2:cf42e62a97dc 81
MikamiUitOpen 2:cf42e62a97dc 82 /** Send START command.
MikamiUitOpen 2:cf42e62a97dc 83 * @param obj The i2c object
MikamiUitOpen 2:cf42e62a97dc 84 */
MikamiUitOpen 2:cf42e62a97dc 85 int i2c_start(i2c_t *obj);
MikamiUitOpen 2:cf42e62a97dc 86
MikamiUitOpen 2:cf42e62a97dc 87 /** Send STOP command.
MikamiUitOpen 2:cf42e62a97dc 88 * @param obj The i2c object
MikamiUitOpen 2:cf42e62a97dc 89 */
MikamiUitOpen 2:cf42e62a97dc 90 int i2c_stop(i2c_t *obj);
MikamiUitOpen 2:cf42e62a97dc 91
MikamiUitOpen 2:cf42e62a97dc 92 /** Blocking reading data.
MikamiUitOpen 2:cf42e62a97dc 93 * @param obj The i2c object
MikamiUitOpen 2:cf42e62a97dc 94 * @param address 7-bit address (last bit is 1)
MikamiUitOpen 2:cf42e62a97dc 95 * @param data The buffer for receiving
MikamiUitOpen 2:cf42e62a97dc 96 * @param length Number of bytes to read
MikamiUitOpen 2:cf42e62a97dc 97 * @param stop Stop to be generated after the transfer is done
MikamiUitOpen 2:cf42e62a97dc 98 * @return Number of read bytes
MikamiUitOpen 2:cf42e62a97dc 99 */
MikamiUitOpen 2:cf42e62a97dc 100 int i2c_read(i2c_t *obj, int address, char *data, int length, int stop);
MikamiUitOpen 2:cf42e62a97dc 101
MikamiUitOpen 2:cf42e62a97dc 102 /** Blocking sending data.
MikamiUitOpen 2:cf42e62a97dc 103 * @param obj The i2c object
MikamiUitOpen 2:cf42e62a97dc 104 * @param address 7-bit address (last bit is 0)
MikamiUitOpen 2:cf42e62a97dc 105 * @param data The buffer for sending
MikamiUitOpen 2:cf42e62a97dc 106 * @param length Number of bytes to wrte
MikamiUitOpen 2:cf42e62a97dc 107 * @param stop Stop to be generated after the transfer is done
MikamiUitOpen 2:cf42e62a97dc 108 * @return Number of written bytes
MikamiUitOpen 2:cf42e62a97dc 109 */
MikamiUitOpen 2:cf42e62a97dc 110 int i2c_write(i2c_t *obj, int address, const char *data, int length, int stop);
MikamiUitOpen 2:cf42e62a97dc 111
MikamiUitOpen 2:cf42e62a97dc 112 /** Reset I2C peripheral. TODO: The action here. Most of the implementation sends stop().
MikamiUitOpen 2:cf42e62a97dc 113 * @param obj The i2c object
MikamiUitOpen 2:cf42e62a97dc 114 */
MikamiUitOpen 2:cf42e62a97dc 115 void i2c_reset(i2c_t *obj);
MikamiUitOpen 2:cf42e62a97dc 116
MikamiUitOpen 2:cf42e62a97dc 117 /** Read one byte.
MikamiUitOpen 2:cf42e62a97dc 118 * @param obj The i2c object
MikamiUitOpen 2:cf42e62a97dc 119 * @param last Acknoledge
MikamiUitOpen 2:cf42e62a97dc 120 * @return The read byte
MikamiUitOpen 2:cf42e62a97dc 121 */
MikamiUitOpen 2:cf42e62a97dc 122 int i2c_byte_read(i2c_t *obj, int last);
MikamiUitOpen 2:cf42e62a97dc 123
MikamiUitOpen 2:cf42e62a97dc 124 /** Write one byte.
MikamiUitOpen 2:cf42e62a97dc 125 * @param obj The i2c object
MikamiUitOpen 2:cf42e62a97dc 126 * @param data Byte to be written
MikamiUitOpen 2:cf42e62a97dc 127 * @return 0 if NAK was received, 1 if ACK was received, 2 for timeout.
MikamiUitOpen 2:cf42e62a97dc 128 */
MikamiUitOpen 2:cf42e62a97dc 129 int i2c_byte_write(i2c_t *obj, int data);
MikamiUitOpen 2:cf42e62a97dc 130
MikamiUitOpen 2:cf42e62a97dc 131 /**@}*/
MikamiUitOpen 2:cf42e62a97dc 132
MikamiUitOpen 2:cf42e62a97dc 133 #if DEVICE_I2CSLAVE
MikamiUitOpen 2:cf42e62a97dc 134
MikamiUitOpen 2:cf42e62a97dc 135 /**
MikamiUitOpen 2:cf42e62a97dc 136 * \defgroup SynchI2C Synchronous I2C Hardware Abstraction Layer for slave
MikamiUitOpen 2:cf42e62a97dc 137 * @{
MikamiUitOpen 2:cf42e62a97dc 138 */
MikamiUitOpen 2:cf42e62a97dc 139
MikamiUitOpen 2:cf42e62a97dc 140 /** Configure I2C as slave or master.
MikamiUitOpen 2:cf42e62a97dc 141 * @param obj The I2C object
MikamiUitOpen 2:cf42e62a97dc 142 * @return non-zero if a value is available
MikamiUitOpen 2:cf42e62a97dc 143 */
MikamiUitOpen 2:cf42e62a97dc 144 void i2c_slave_mode(i2c_t *obj, int enable_slave);
MikamiUitOpen 2:cf42e62a97dc 145
MikamiUitOpen 2:cf42e62a97dc 146 /** Check to see if the I2C slave has been addressed.
MikamiUitOpen 2:cf42e62a97dc 147 * @param obj The I2C object
MikamiUitOpen 2:cf42e62a97dc 148 * @return The status - 1 - read addresses, 2 - write to all slaves,
MikamiUitOpen 2:cf42e62a97dc 149 * 3 write addressed, 0 - the slave has not been addressed
MikamiUitOpen 2:cf42e62a97dc 150 */
MikamiUitOpen 2:cf42e62a97dc 151 int i2c_slave_receive(i2c_t *obj);
MikamiUitOpen 2:cf42e62a97dc 152
MikamiUitOpen 2:cf42e62a97dc 153 /** Configure I2C as slave or master.
MikamiUitOpen 2:cf42e62a97dc 154 * @param obj The I2C object
MikamiUitOpen 2:cf42e62a97dc 155 * @return non-zero if a value is available
MikamiUitOpen 2:cf42e62a97dc 156 */
MikamiUitOpen 2:cf42e62a97dc 157 int i2c_slave_read(i2c_t *obj, char *data, int length);
MikamiUitOpen 2:cf42e62a97dc 158
MikamiUitOpen 2:cf42e62a97dc 159 /** Configure I2C as slave or master.
MikamiUitOpen 2:cf42e62a97dc 160 * @param obj The I2C object
MikamiUitOpen 2:cf42e62a97dc 161 * @return non-zero if a value is available
MikamiUitOpen 2:cf42e62a97dc 162 */
MikamiUitOpen 2:cf42e62a97dc 163 int i2c_slave_write(i2c_t *obj, const char *data, int length);
MikamiUitOpen 2:cf42e62a97dc 164
MikamiUitOpen 2:cf42e62a97dc 165 /** Configure I2C address.
MikamiUitOpen 2:cf42e62a97dc 166 * @param obj The I2C object
MikamiUitOpen 2:cf42e62a97dc 167 * @param idx Currently not used
MikamiUitOpen 2:cf42e62a97dc 168 * @param address The address to be set
MikamiUitOpen 2:cf42e62a97dc 169 * @param mask Currently not used
MikamiUitOpen 2:cf42e62a97dc 170 */
MikamiUitOpen 2:cf42e62a97dc 171 void i2c_slave_address(i2c_t *obj, int idx, uint32_t address, uint32_t mask);
MikamiUitOpen 2:cf42e62a97dc 172
MikamiUitOpen 2:cf42e62a97dc 173 #endif
MikamiUitOpen 2:cf42e62a97dc 174
MikamiUitOpen 2:cf42e62a97dc 175 /**@}*/
MikamiUitOpen 2:cf42e62a97dc 176
MikamiUitOpen 2:cf42e62a97dc 177 #if DEVICE_I2C_ASYNCH
MikamiUitOpen 2:cf42e62a97dc 178
MikamiUitOpen 2:cf42e62a97dc 179 /**
MikamiUitOpen 2:cf42e62a97dc 180 * \defgroup AsynchI2C Asynchronous I2C Hardware Abstraction Layer
MikamiUitOpen 2:cf42e62a97dc 181 * @{
MikamiUitOpen 2:cf42e62a97dc 182 */
MikamiUitOpen 2:cf42e62a97dc 183
MikamiUitOpen 2:cf42e62a97dc 184 /** Start i2c asynchronous transfer.
MikamiUitOpen 2:cf42e62a97dc 185 * @param obj The I2C object
MikamiUitOpen 2:cf42e62a97dc 186 * @param tx The buffer to send
MikamiUitOpen 2:cf42e62a97dc 187 * @param tx_length The number of words to transmit
MikamiUitOpen 2:cf42e62a97dc 188 * @param rx The buffer to receive
MikamiUitOpen 2:cf42e62a97dc 189 * @param rx_length The number of words to receive
MikamiUitOpen 2:cf42e62a97dc 190 * @param address The address to be set - 7bit or 9 bit
MikamiUitOpen 2:cf42e62a97dc 191 * @param stop If true, stop will be generated after the transfer is done
MikamiUitOpen 2:cf42e62a97dc 192 * @param handler The I2C IRQ handler to be set
MikamiUitOpen 2:cf42e62a97dc 193 * @param hint DMA hint usage
MikamiUitOpen 2:cf42e62a97dc 194 */
MikamiUitOpen 2:cf42e62a97dc 195 void i2c_transfer_asynch(i2c_t *obj, const void *tx, size_t tx_length, void *rx, size_t rx_length, uint32_t address, uint32_t stop, uint32_t handler, uint32_t event, DMAUsage hint);
MikamiUitOpen 2:cf42e62a97dc 196
MikamiUitOpen 2:cf42e62a97dc 197 /** The asynchronous IRQ handler
MikamiUitOpen 2:cf42e62a97dc 198 * @param obj The I2C object which holds the transfer information
MikamiUitOpen 2:cf42e62a97dc 199 * @return event flags if a transfer termination condition was met or 0 otherwise.
MikamiUitOpen 2:cf42e62a97dc 200 */
MikamiUitOpen 2:cf42e62a97dc 201 uint32_t i2c_irq_handler_asynch(i2c_t *obj);
MikamiUitOpen 2:cf42e62a97dc 202
MikamiUitOpen 2:cf42e62a97dc 203 /** Attempts to determine if I2C peripheral is already in use.
MikamiUitOpen 2:cf42e62a97dc 204 * @param obj The I2C object
MikamiUitOpen 2:cf42e62a97dc 205 * @return non-zero if the I2C module is active or zero if it is not
MikamiUitOpen 2:cf42e62a97dc 206 */
MikamiUitOpen 2:cf42e62a97dc 207 uint8_t i2c_active(i2c_t *obj);
MikamiUitOpen 2:cf42e62a97dc 208
MikamiUitOpen 2:cf42e62a97dc 209 /** Abort ongoing asynchronous transaction.
MikamiUitOpen 2:cf42e62a97dc 210 * @param obj The I2C object
MikamiUitOpen 2:cf42e62a97dc 211 */
MikamiUitOpen 2:cf42e62a97dc 212 void i2c_abort_asynch(i2c_t *obj);
MikamiUitOpen 2:cf42e62a97dc 213
MikamiUitOpen 2:cf42e62a97dc 214 #endif
MikamiUitOpen 2:cf42e62a97dc 215
MikamiUitOpen 2:cf42e62a97dc 216 /**@}*/
MikamiUitOpen 2:cf42e62a97dc 217
MikamiUitOpen 2:cf42e62a97dc 218 #ifdef __cplusplus
MikamiUitOpen 2:cf42e62a97dc 219 }
MikamiUitOpen 2:cf42e62a97dc 220 #endif
MikamiUitOpen 2:cf42e62a97dc 221
MikamiUitOpen 2:cf42e62a97dc 222 #endif
MikamiUitOpen 2:cf42e62a97dc 223
MikamiUitOpen 2:cf42e62a97dc 224 #endif