不韋 呂 / F746_SD_GraphicEqualizer

Output the audio signal with filtering by graphic equalizer in the *.wav file on the SD card using onboard CODEC. SD カードの *.wav ファイルのオーディオ信号をグラフィック･イコライザを通して，ボードに搭載されているCODEC で出力する．

Dependencies:   F746_GUI F746_SAI_IO SD_PlayerSkeleton FrequencyResponseDrawer

mbed_src_STM32F7/targets/cmsis/core_cmSimd.h@24:f78f9d0ac262, 2017-04-10 (annotated)

Committer:
MikamiUitOpen
Date:
Mon Apr 10 04:07:35 2017 +0000
Revision:
24:f78f9d0ac262
Parent:
16:cbb726ac20d8 
25

Who changed what in which revision?

UserRevisionLine numberNew contents of line
MikamiUitOpen 16:cbb726ac20d8 1 /**************************************************************************//**
MikamiUitOpen 16:cbb726ac20d8 2 * @file core_cmSimd.h
MikamiUitOpen 16:cbb726ac20d8 3 * @brief CMSIS Cortex-M SIMD Header File
MikamiUitOpen 16:cbb726ac20d8 4 * @version V4.10
MikamiUitOpen 16:cbb726ac20d8 5 * @date 18. March 2015
MikamiUitOpen 16:cbb726ac20d8 6 *
MikamiUitOpen 16:cbb726ac20d8 7 * @note
MikamiUitOpen 16:cbb726ac20d8 8 *
MikamiUitOpen 16:cbb726ac20d8 9 ******************************************************************************/
MikamiUitOpen 16:cbb726ac20d8 10 /* Copyright (c) 2009 - 2014 ARM LIMITED
MikamiUitOpen 16:cbb726ac20d8 11
MikamiUitOpen 16:cbb726ac20d8 12 All rights reserved.
MikamiUitOpen 16:cbb726ac20d8 13 Redistribution and use in source and binary forms, with or without
MikamiUitOpen 16:cbb726ac20d8 14 modification, are permitted provided that the following conditions are met:
MikamiUitOpen 16:cbb726ac20d8 15 - Redistributions of source code must retain the above copyright
MikamiUitOpen 16:cbb726ac20d8 16 notice, this list of conditions and the following disclaimer.
MikamiUitOpen 16:cbb726ac20d8 17 - Redistributions in binary form must reproduce the above copyright
MikamiUitOpen 16:cbb726ac20d8 18 notice, this list of conditions and the following disclaimer in the
MikamiUitOpen 16:cbb726ac20d8 19 documentation and/or other materials provided with the distribution.
MikamiUitOpen 16:cbb726ac20d8 20 - Neither the name of ARM nor the names of its contributors may be used
MikamiUitOpen 16:cbb726ac20d8 21 to endorse or promote products derived from this software without
MikamiUitOpen 16:cbb726ac20d8 22 specific prior written permission.
MikamiUitOpen 16:cbb726ac20d8 23 *
MikamiUitOpen 16:cbb726ac20d8 24 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
MikamiUitOpen 16:cbb726ac20d8 25 AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
MikamiUitOpen 16:cbb726ac20d8 26 IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
MikamiUitOpen 16:cbb726ac20d8 27 ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
MikamiUitOpen 16:cbb726ac20d8 28 LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
MikamiUitOpen 16:cbb726ac20d8 29 CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
MikamiUitOpen 16:cbb726ac20d8 30 SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
MikamiUitOpen 16:cbb726ac20d8 31 INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
MikamiUitOpen 16:cbb726ac20d8 32 CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
MikamiUitOpen 16:cbb726ac20d8 33 ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
MikamiUitOpen 16:cbb726ac20d8 34 POSSIBILITY OF SUCH DAMAGE.
MikamiUitOpen 16:cbb726ac20d8 35 ---------------------------------------------------------------------------*/
MikamiUitOpen 16:cbb726ac20d8 36
MikamiUitOpen 16:cbb726ac20d8 37
MikamiUitOpen 16:cbb726ac20d8 38 #if defined ( __ICCARM__ )
MikamiUitOpen 16:cbb726ac20d8 39 #pragma system_include /* treat file as system include file for MISRA check */
MikamiUitOpen 16:cbb726ac20d8 40 #endif
MikamiUitOpen 16:cbb726ac20d8 41
MikamiUitOpen 16:cbb726ac20d8 42 #ifndef __CORE_CMSIMD_H
MikamiUitOpen 16:cbb726ac20d8 43 #define __CORE_CMSIMD_H
MikamiUitOpen 16:cbb726ac20d8 44
MikamiUitOpen 16:cbb726ac20d8 45 #ifdef __cplusplus
MikamiUitOpen 16:cbb726ac20d8 46 extern "C" {
MikamiUitOpen 16:cbb726ac20d8 47 #endif
MikamiUitOpen 16:cbb726ac20d8 48
MikamiUitOpen 16:cbb726ac20d8 49
MikamiUitOpen 16:cbb726ac20d8 50 /*******************************************************************************
MikamiUitOpen 16:cbb726ac20d8 51 * Hardware Abstraction Layer
MikamiUitOpen 16:cbb726ac20d8 52 ******************************************************************************/
MikamiUitOpen 16:cbb726ac20d8 53
MikamiUitOpen 16:cbb726ac20d8 54
MikamiUitOpen 16:cbb726ac20d8 55 /* ################### Compiler specific Intrinsics ########################### */
MikamiUitOpen 16:cbb726ac20d8 56 /** \defgroup CMSIS_SIMD_intrinsics CMSIS SIMD Intrinsics
MikamiUitOpen 16:cbb726ac20d8 57 Access to dedicated SIMD instructions
MikamiUitOpen 16:cbb726ac20d8 58 @{
MikamiUitOpen 16:cbb726ac20d8 59 */
MikamiUitOpen 16:cbb726ac20d8 60
MikamiUitOpen 16:cbb726ac20d8 61 #if defined ( __CC_ARM ) /*------------------RealView Compiler -----------------*/
MikamiUitOpen 16:cbb726ac20d8 62 /* ARM armcc specific functions */
MikamiUitOpen 16:cbb726ac20d8 63 #define __SADD8 __sadd8
MikamiUitOpen 16:cbb726ac20d8 64 #define __QADD8 __qadd8
MikamiUitOpen 16:cbb726ac20d8 65 #define __SHADD8 __shadd8
MikamiUitOpen 16:cbb726ac20d8 66 #define __UADD8 __uadd8
MikamiUitOpen 16:cbb726ac20d8 67 #define __UQADD8 __uqadd8
MikamiUitOpen 16:cbb726ac20d8 68 #define __UHADD8 __uhadd8
MikamiUitOpen 16:cbb726ac20d8 69 #define __SSUB8 __ssub8
MikamiUitOpen 16:cbb726ac20d8 70 #define __QSUB8 __qsub8
MikamiUitOpen 16:cbb726ac20d8 71 #define __SHSUB8 __shsub8
MikamiUitOpen 16:cbb726ac20d8 72 #define __USUB8 __usub8
MikamiUitOpen 16:cbb726ac20d8 73 #define __UQSUB8 __uqsub8
MikamiUitOpen 16:cbb726ac20d8 74 #define __UHSUB8 __uhsub8
MikamiUitOpen 16:cbb726ac20d8 75 #define __SADD16 __sadd16
MikamiUitOpen 16:cbb726ac20d8 76 #define __QADD16 __qadd16
MikamiUitOpen 16:cbb726ac20d8 77 #define __SHADD16 __shadd16
MikamiUitOpen 16:cbb726ac20d8 78 #define __UADD16 __uadd16
MikamiUitOpen 16:cbb726ac20d8 79 #define __UQADD16 __uqadd16
MikamiUitOpen 16:cbb726ac20d8 80 #define __UHADD16 __uhadd16
MikamiUitOpen 16:cbb726ac20d8 81 #define __SSUB16 __ssub16
MikamiUitOpen 16:cbb726ac20d8 82 #define __QSUB16 __qsub16
MikamiUitOpen 16:cbb726ac20d8 83 #define __SHSUB16 __shsub16
MikamiUitOpen 16:cbb726ac20d8 84 #define __USUB16 __usub16
MikamiUitOpen 16:cbb726ac20d8 85 #define __UQSUB16 __uqsub16
MikamiUitOpen 16:cbb726ac20d8 86 #define __UHSUB16 __uhsub16
MikamiUitOpen 16:cbb726ac20d8 87 #define __SASX __sasx
MikamiUitOpen 16:cbb726ac20d8 88 #define __QASX __qasx
MikamiUitOpen 16:cbb726ac20d8 89 #define __SHASX __shasx
MikamiUitOpen 16:cbb726ac20d8 90 #define __UASX __uasx
MikamiUitOpen 16:cbb726ac20d8 91 #define __UQASX __uqasx
MikamiUitOpen 16:cbb726ac20d8 92 #define __UHASX __uhasx
MikamiUitOpen 16:cbb726ac20d8 93 #define __SSAX __ssax
MikamiUitOpen 16:cbb726ac20d8 94 #define __QSAX __qsax
MikamiUitOpen 16:cbb726ac20d8 95 #define __SHSAX __shsax
MikamiUitOpen 16:cbb726ac20d8 96 #define __USAX __usax
MikamiUitOpen 16:cbb726ac20d8 97 #define __UQSAX __uqsax
MikamiUitOpen 16:cbb726ac20d8 98 #define __UHSAX __uhsax
MikamiUitOpen 16:cbb726ac20d8 99 #define __USAD8 __usad8
MikamiUitOpen 16:cbb726ac20d8 100 #define __USADA8 __usada8
MikamiUitOpen 16:cbb726ac20d8 101 #define __SSAT16 __ssat16
MikamiUitOpen 16:cbb726ac20d8 102 #define __USAT16 __usat16
MikamiUitOpen 16:cbb726ac20d8 103 #define __UXTB16 __uxtb16
MikamiUitOpen 16:cbb726ac20d8 104 #define __UXTAB16 __uxtab16
MikamiUitOpen 16:cbb726ac20d8 105 #define __SXTB16 __sxtb16
MikamiUitOpen 16:cbb726ac20d8 106 #define __SXTAB16 __sxtab16
MikamiUitOpen 16:cbb726ac20d8 107 #define __SMUAD __smuad
MikamiUitOpen 16:cbb726ac20d8 108 #define __SMUADX __smuadx
MikamiUitOpen 16:cbb726ac20d8 109 #define __SMLAD __smlad
MikamiUitOpen 16:cbb726ac20d8 110 #define __SMLADX __smladx
MikamiUitOpen 16:cbb726ac20d8 111 #define __SMLALD __smlald
MikamiUitOpen 16:cbb726ac20d8 112 #define __SMLALDX __smlaldx
MikamiUitOpen 16:cbb726ac20d8 113 #define __SMUSD __smusd
MikamiUitOpen 16:cbb726ac20d8 114 #define __SMUSDX __smusdx
MikamiUitOpen 16:cbb726ac20d8 115 #define __SMLSD __smlsd
MikamiUitOpen 16:cbb726ac20d8 116 #define __SMLSDX __smlsdx
MikamiUitOpen 16:cbb726ac20d8 117 #define __SMLSLD __smlsld
MikamiUitOpen 16:cbb726ac20d8 118 #define __SMLSLDX __smlsldx
MikamiUitOpen 16:cbb726ac20d8 119 #define __SEL __sel
MikamiUitOpen 16:cbb726ac20d8 120 #define __QADD __qadd
MikamiUitOpen 16:cbb726ac20d8 121 #define __QSUB __qsub
MikamiUitOpen 16:cbb726ac20d8 122
MikamiUitOpen 16:cbb726ac20d8 123 #define __PKHBT(ARG1,ARG2,ARG3) ( ((((uint32_t)(ARG1)) ) & 0x0000FFFFUL) | \
MikamiUitOpen 16:cbb726ac20d8 124 ((((uint32_t)(ARG2)) << (ARG3)) & 0xFFFF0000UL) )
MikamiUitOpen 16:cbb726ac20d8 125
MikamiUitOpen 16:cbb726ac20d8 126 #define __PKHTB(ARG1,ARG2,ARG3) ( ((((uint32_t)(ARG1)) ) & 0xFFFF0000UL) | \
MikamiUitOpen 16:cbb726ac20d8 127 ((((uint32_t)(ARG2)) >> (ARG3)) & 0x0000FFFFUL) )
MikamiUitOpen 16:cbb726ac20d8 128
MikamiUitOpen 16:cbb726ac20d8 129 #define __SMMLA(ARG1,ARG2,ARG3) ( (int32_t)((((int64_t)(ARG1) * (ARG2)) + \
MikamiUitOpen 16:cbb726ac20d8 130 ((int64_t)(ARG3) << 32) ) >> 32))
MikamiUitOpen 16:cbb726ac20d8 131
MikamiUitOpen 16:cbb726ac20d8 132
MikamiUitOpen 16:cbb726ac20d8 133 #elif defined ( __GNUC__ ) /*------------------ GNU Compiler ---------------------*/
MikamiUitOpen 16:cbb726ac20d8 134 /* GNU gcc specific functions */
MikamiUitOpen 16:cbb726ac20d8 135 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SADD8(uint32_t op1, uint32_t op2)
MikamiUitOpen 16:cbb726ac20d8 136 {
MikamiUitOpen 16:cbb726ac20d8 137 uint32_t result;
MikamiUitOpen 16:cbb726ac20d8 138
MikamiUitOpen 16:cbb726ac20d8 139 __ASM volatile ("sadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
MikamiUitOpen 16:cbb726ac20d8 140 return(result);
MikamiUitOpen 16:cbb726ac20d8 141 }
MikamiUitOpen 16:cbb726ac20d8 142
MikamiUitOpen 16:cbb726ac20d8 143 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __QADD8(uint32_t op1, uint32_t op2)
MikamiUitOpen 16:cbb726ac20d8 144 {
MikamiUitOpen 16:cbb726ac20d8 145 uint32_t result;
MikamiUitOpen 16:cbb726ac20d8 146
MikamiUitOpen 16:cbb726ac20d8 147 __ASM volatile ("qadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
MikamiUitOpen 16:cbb726ac20d8 148 return(result);
MikamiUitOpen 16:cbb726ac20d8 149 }
MikamiUitOpen 16:cbb726ac20d8 150
MikamiUitOpen 16:cbb726ac20d8 151 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SHADD8(uint32_t op1, uint32_t op2)
MikamiUitOpen 16:cbb726ac20d8 152 {
MikamiUitOpen 16:cbb726ac20d8 153 uint32_t result;
MikamiUitOpen 16:cbb726ac20d8 154
MikamiUitOpen 16:cbb726ac20d8 155 __ASM volatile ("shadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
MikamiUitOpen 16:cbb726ac20d8 156 return(result);
MikamiUitOpen 16:cbb726ac20d8 157 }
MikamiUitOpen 16:cbb726ac20d8 158
MikamiUitOpen 16:cbb726ac20d8 159 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UADD8(uint32_t op1, uint32_t op2)
MikamiUitOpen 16:cbb726ac20d8 160 {
MikamiUitOpen 16:cbb726ac20d8 161 uint32_t result;
MikamiUitOpen 16:cbb726ac20d8 162
MikamiUitOpen 16:cbb726ac20d8 163 __ASM volatile ("uadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
MikamiUitOpen 16:cbb726ac20d8 164 return(result);
MikamiUitOpen 16:cbb726ac20d8 165 }
MikamiUitOpen 16:cbb726ac20d8 166
MikamiUitOpen 16:cbb726ac20d8 167 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UQADD8(uint32_t op1, uint32_t op2)
MikamiUitOpen 16:cbb726ac20d8 168 {
MikamiUitOpen 16:cbb726ac20d8 169 uint32_t result;
MikamiUitOpen 16:cbb726ac20d8 170
MikamiUitOpen 16:cbb726ac20d8 171 __ASM volatile ("uqadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
MikamiUitOpen 16:cbb726ac20d8 172 return(result);
MikamiUitOpen 16:cbb726ac20d8 173 }
MikamiUitOpen 16:cbb726ac20d8 174
MikamiUitOpen 16:cbb726ac20d8 175 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UHADD8(uint32_t op1, uint32_t op2)
MikamiUitOpen 16:cbb726ac20d8 176 {
MikamiUitOpen 16:cbb726ac20d8 177 uint32_t result;
MikamiUitOpen 16:cbb726ac20d8 178
MikamiUitOpen 16:cbb726ac20d8 179 __ASM volatile ("uhadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
MikamiUitOpen 16:cbb726ac20d8 180 return(result);
MikamiUitOpen 16:cbb726ac20d8 181 }
MikamiUitOpen 16:cbb726ac20d8 182
MikamiUitOpen 16:cbb726ac20d8 183
MikamiUitOpen 16:cbb726ac20d8 184 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SSUB8(uint32_t op1, uint32_t op2)
MikamiUitOpen 16:cbb726ac20d8 185 {
MikamiUitOpen 16:cbb726ac20d8 186 uint32_t result;
MikamiUitOpen 16:cbb726ac20d8 187
MikamiUitOpen 16:cbb726ac20d8 188 __ASM volatile ("ssub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
MikamiUitOpen 16:cbb726ac20d8 189 return(result);
MikamiUitOpen 16:cbb726ac20d8 190 }
MikamiUitOpen 16:cbb726ac20d8 191
MikamiUitOpen 16:cbb726ac20d8 192 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __QSUB8(uint32_t op1, uint32_t op2)
MikamiUitOpen 16:cbb726ac20d8 193 {
MikamiUitOpen 16:cbb726ac20d8 194 uint32_t result;
MikamiUitOpen 16:cbb726ac20d8 195
MikamiUitOpen 16:cbb726ac20d8 196 __ASM volatile ("qsub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
MikamiUitOpen 16:cbb726ac20d8 197 return(result);
MikamiUitOpen 16:cbb726ac20d8 198 }
MikamiUitOpen 16:cbb726ac20d8 199
MikamiUitOpen 16:cbb726ac20d8 200 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SHSUB8(uint32_t op1, uint32_t op2)
MikamiUitOpen 16:cbb726ac20d8 201 {
MikamiUitOpen 16:cbb726ac20d8 202 uint32_t result;
MikamiUitOpen 16:cbb726ac20d8 203
MikamiUitOpen 16:cbb726ac20d8 204 __ASM volatile ("shsub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
MikamiUitOpen 16:cbb726ac20d8 205 return(result);
MikamiUitOpen 16:cbb726ac20d8 206 }
MikamiUitOpen 16:cbb726ac20d8 207
MikamiUitOpen 16:cbb726ac20d8 208 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __USUB8(uint32_t op1, uint32_t op2)
MikamiUitOpen 16:cbb726ac20d8 209 {
MikamiUitOpen 16:cbb726ac20d8 210 uint32_t result;
MikamiUitOpen 16:cbb726ac20d8 211
MikamiUitOpen 16:cbb726ac20d8 212 __ASM volatile ("usub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
MikamiUitOpen 16:cbb726ac20d8 213 return(result);
MikamiUitOpen 16:cbb726ac20d8 214 }
MikamiUitOpen 16:cbb726ac20d8 215
MikamiUitOpen 16:cbb726ac20d8 216 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UQSUB8(uint32_t op1, uint32_t op2)
MikamiUitOpen 16:cbb726ac20d8 217 {
MikamiUitOpen 16:cbb726ac20d8 218 uint32_t result;
MikamiUitOpen 16:cbb726ac20d8 219
MikamiUitOpen 16:cbb726ac20d8 220 __ASM volatile ("uqsub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
MikamiUitOpen 16:cbb726ac20d8 221 return(result);
MikamiUitOpen 16:cbb726ac20d8 222 }
MikamiUitOpen 16:cbb726ac20d8 223
MikamiUitOpen 16:cbb726ac20d8 224 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UHSUB8(uint32_t op1, uint32_t op2)
MikamiUitOpen 16:cbb726ac20d8 225 {
MikamiUitOpen 16:cbb726ac20d8 226 uint32_t result;
MikamiUitOpen 16:cbb726ac20d8 227
MikamiUitOpen 16:cbb726ac20d8 228 __ASM volatile ("uhsub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
MikamiUitOpen 16:cbb726ac20d8 229 return(result);
MikamiUitOpen 16:cbb726ac20d8 230 }
MikamiUitOpen 16:cbb726ac20d8 231
MikamiUitOpen 16:cbb726ac20d8 232
MikamiUitOpen 16:cbb726ac20d8 233 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SADD16(uint32_t op1, uint32_t op2)
MikamiUitOpen 16:cbb726ac20d8 234 {
MikamiUitOpen 16:cbb726ac20d8 235 uint32_t result;
MikamiUitOpen 16:cbb726ac20d8 236
MikamiUitOpen 16:cbb726ac20d8 237 __ASM volatile ("sadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
MikamiUitOpen 16:cbb726ac20d8 238 return(result);
MikamiUitOpen 16:cbb726ac20d8 239 }
MikamiUitOpen 16:cbb726ac20d8 240
MikamiUitOpen 16:cbb726ac20d8 241 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __QADD16(uint32_t op1, uint32_t op2)
MikamiUitOpen 16:cbb726ac20d8 242 {
MikamiUitOpen 16:cbb726ac20d8 243 uint32_t result;
MikamiUitOpen 16:cbb726ac20d8 244
MikamiUitOpen 16:cbb726ac20d8 245 __ASM volatile ("qadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
MikamiUitOpen 16:cbb726ac20d8 246 return(result);
MikamiUitOpen 16:cbb726ac20d8 247 }
MikamiUitOpen 16:cbb726ac20d8 248
MikamiUitOpen 16:cbb726ac20d8 249 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SHADD16(uint32_t op1, uint32_t op2)
MikamiUitOpen 16:cbb726ac20d8 250 {
MikamiUitOpen 16:cbb726ac20d8 251 uint32_t result;
MikamiUitOpen 16:cbb726ac20d8 252
MikamiUitOpen 16:cbb726ac20d8 253 __ASM volatile ("shadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
MikamiUitOpen 16:cbb726ac20d8 254 return(result);
MikamiUitOpen 16:cbb726ac20d8 255 }
MikamiUitOpen 16:cbb726ac20d8 256
MikamiUitOpen 16:cbb726ac20d8 257 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UADD16(uint32_t op1, uint32_t op2)
MikamiUitOpen 16:cbb726ac20d8 258 {
MikamiUitOpen 16:cbb726ac20d8 259 uint32_t result;
MikamiUitOpen 16:cbb726ac20d8 260
MikamiUitOpen 16:cbb726ac20d8 261 __ASM volatile ("uadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
MikamiUitOpen 16:cbb726ac20d8 262 return(result);
MikamiUitOpen 16:cbb726ac20d8 263 }
MikamiUitOpen 16:cbb726ac20d8 264
MikamiUitOpen 16:cbb726ac20d8 265 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UQADD16(uint32_t op1, uint32_t op2)
MikamiUitOpen 16:cbb726ac20d8 266 {
MikamiUitOpen 16:cbb726ac20d8 267 uint32_t result;
MikamiUitOpen 16:cbb726ac20d8 268
MikamiUitOpen 16:cbb726ac20d8 269 __ASM volatile ("uqadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
MikamiUitOpen 16:cbb726ac20d8 270 return(result);
MikamiUitOpen 16:cbb726ac20d8 271 }
MikamiUitOpen 16:cbb726ac20d8 272
MikamiUitOpen 16:cbb726ac20d8 273 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UHADD16(uint32_t op1, uint32_t op2)
MikamiUitOpen 16:cbb726ac20d8 274 {
MikamiUitOpen 16:cbb726ac20d8 275 uint32_t result;
MikamiUitOpen 16:cbb726ac20d8 276
MikamiUitOpen 16:cbb726ac20d8 277 __ASM volatile ("uhadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
MikamiUitOpen 16:cbb726ac20d8 278 return(result);
MikamiUitOpen 16:cbb726ac20d8 279 }
MikamiUitOpen 16:cbb726ac20d8 280
MikamiUitOpen 16:cbb726ac20d8 281 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SSUB16(uint32_t op1, uint32_t op2)
MikamiUitOpen 16:cbb726ac20d8 282 {
MikamiUitOpen 16:cbb726ac20d8 283 uint32_t result;
MikamiUitOpen 16:cbb726ac20d8 284
MikamiUitOpen 16:cbb726ac20d8 285 __ASM volatile ("ssub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
MikamiUitOpen 16:cbb726ac20d8 286 return(result);
MikamiUitOpen 16:cbb726ac20d8 287 }
MikamiUitOpen 16:cbb726ac20d8 288
MikamiUitOpen 16:cbb726ac20d8 289 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __QSUB16(uint32_t op1, uint32_t op2)
MikamiUitOpen 16:cbb726ac20d8 290 {
MikamiUitOpen 16:cbb726ac20d8 291 uint32_t result;
MikamiUitOpen 16:cbb726ac20d8 292
MikamiUitOpen 16:cbb726ac20d8 293 __ASM volatile ("qsub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
MikamiUitOpen 16:cbb726ac20d8 294 return(result);
MikamiUitOpen 16:cbb726ac20d8 295 }
MikamiUitOpen 16:cbb726ac20d8 296
MikamiUitOpen 16:cbb726ac20d8 297 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SHSUB16(uint32_t op1, uint32_t op2)
MikamiUitOpen 16:cbb726ac20d8 298 {
MikamiUitOpen 16:cbb726ac20d8 299 uint32_t result;
MikamiUitOpen 16:cbb726ac20d8 300
MikamiUitOpen 16:cbb726ac20d8 301 __ASM volatile ("shsub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
MikamiUitOpen 16:cbb726ac20d8 302 return(result);
MikamiUitOpen 16:cbb726ac20d8 303 }
MikamiUitOpen 16:cbb726ac20d8 304
MikamiUitOpen 16:cbb726ac20d8 305 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __USUB16(uint32_t op1, uint32_t op2)
MikamiUitOpen 16:cbb726ac20d8 306 {
MikamiUitOpen 16:cbb726ac20d8 307 uint32_t result;
MikamiUitOpen 16:cbb726ac20d8 308
MikamiUitOpen 16:cbb726ac20d8 309 __ASM volatile ("usub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
MikamiUitOpen 16:cbb726ac20d8 310 return(result);
MikamiUitOpen 16:cbb726ac20d8 311 }
MikamiUitOpen 16:cbb726ac20d8 312
MikamiUitOpen 16:cbb726ac20d8 313 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UQSUB16(uint32_t op1, uint32_t op2)
MikamiUitOpen 16:cbb726ac20d8 314 {
MikamiUitOpen 16:cbb726ac20d8 315 uint32_t result;
MikamiUitOpen 16:cbb726ac20d8 316
MikamiUitOpen 16:cbb726ac20d8 317 __ASM volatile ("uqsub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
MikamiUitOpen 16:cbb726ac20d8 318 return(result);
MikamiUitOpen 16:cbb726ac20d8 319 }
MikamiUitOpen 16:cbb726ac20d8 320
MikamiUitOpen 16:cbb726ac20d8 321 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UHSUB16(uint32_t op1, uint32_t op2)
MikamiUitOpen 16:cbb726ac20d8 322 {
MikamiUitOpen 16:cbb726ac20d8 323 uint32_t result;
MikamiUitOpen 16:cbb726ac20d8 324
MikamiUitOpen 16:cbb726ac20d8 325 __ASM volatile ("uhsub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
MikamiUitOpen 16:cbb726ac20d8 326 return(result);
MikamiUitOpen 16:cbb726ac20d8 327 }
MikamiUitOpen 16:cbb726ac20d8 328
MikamiUitOpen 16:cbb726ac20d8 329 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SASX(uint32_t op1, uint32_t op2)
MikamiUitOpen 16:cbb726ac20d8 330 {
MikamiUitOpen 16:cbb726ac20d8 331 uint32_t result;
MikamiUitOpen 16:cbb726ac20d8 332
MikamiUitOpen 16:cbb726ac20d8 333 __ASM volatile ("sasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
MikamiUitOpen 16:cbb726ac20d8 334 return(result);
MikamiUitOpen 16:cbb726ac20d8 335 }
MikamiUitOpen 16:cbb726ac20d8 336
MikamiUitOpen 16:cbb726ac20d8 337 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __QASX(uint32_t op1, uint32_t op2)
MikamiUitOpen 16:cbb726ac20d8 338 {
MikamiUitOpen 16:cbb726ac20d8 339 uint32_t result;
MikamiUitOpen 16:cbb726ac20d8 340
MikamiUitOpen 16:cbb726ac20d8 341 __ASM volatile ("qasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
MikamiUitOpen 16:cbb726ac20d8 342 return(result);
MikamiUitOpen 16:cbb726ac20d8 343 }
MikamiUitOpen 16:cbb726ac20d8 344
MikamiUitOpen 16:cbb726ac20d8 345 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SHASX(uint32_t op1, uint32_t op2)
MikamiUitOpen 16:cbb726ac20d8 346 {
MikamiUitOpen 16:cbb726ac20d8 347 uint32_t result;
MikamiUitOpen 16:cbb726ac20d8 348
MikamiUitOpen 16:cbb726ac20d8 349 __ASM volatile ("shasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
MikamiUitOpen 16:cbb726ac20d8 350 return(result);
MikamiUitOpen 16:cbb726ac20d8 351 }
MikamiUitOpen 16:cbb726ac20d8 352
MikamiUitOpen 16:cbb726ac20d8 353 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UASX(uint32_t op1, uint32_t op2)
MikamiUitOpen 16:cbb726ac20d8 354 {
MikamiUitOpen 16:cbb726ac20d8 355 uint32_t result;
MikamiUitOpen 16:cbb726ac20d8 356
MikamiUitOpen 16:cbb726ac20d8 357 __ASM volatile ("uasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
MikamiUitOpen 16:cbb726ac20d8 358 return(result);
MikamiUitOpen 16:cbb726ac20d8 359 }
MikamiUitOpen 16:cbb726ac20d8 360
MikamiUitOpen 16:cbb726ac20d8 361 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UQASX(uint32_t op1, uint32_t op2)
MikamiUitOpen 16:cbb726ac20d8 362 {
MikamiUitOpen 16:cbb726ac20d8 363 uint32_t result;
MikamiUitOpen 16:cbb726ac20d8 364
MikamiUitOpen 16:cbb726ac20d8 365 __ASM volatile ("uqasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
MikamiUitOpen 16:cbb726ac20d8 366 return(result);
MikamiUitOpen 16:cbb726ac20d8 367 }
MikamiUitOpen 16:cbb726ac20d8 368
MikamiUitOpen 16:cbb726ac20d8 369 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UHASX(uint32_t op1, uint32_t op2)
MikamiUitOpen 16:cbb726ac20d8 370 {
MikamiUitOpen 16:cbb726ac20d8 371 uint32_t result;
MikamiUitOpen 16:cbb726ac20d8 372
MikamiUitOpen 16:cbb726ac20d8 373 __ASM volatile ("uhasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
MikamiUitOpen 16:cbb726ac20d8 374 return(result);
MikamiUitOpen 16:cbb726ac20d8 375 }
MikamiUitOpen 16:cbb726ac20d8 376
MikamiUitOpen 16:cbb726ac20d8 377 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SSAX(uint32_t op1, uint32_t op2)
MikamiUitOpen 16:cbb726ac20d8 378 {
MikamiUitOpen 16:cbb726ac20d8 379 uint32_t result;
MikamiUitOpen 16:cbb726ac20d8 380
MikamiUitOpen 16:cbb726ac20d8 381 __ASM volatile ("ssax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
MikamiUitOpen 16:cbb726ac20d8 382 return(result);
MikamiUitOpen 16:cbb726ac20d8 383 }
MikamiUitOpen 16:cbb726ac20d8 384
MikamiUitOpen 16:cbb726ac20d8 385 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __QSAX(uint32_t op1, uint32_t op2)
MikamiUitOpen 16:cbb726ac20d8 386 {
MikamiUitOpen 16:cbb726ac20d8 387 uint32_t result;
MikamiUitOpen 16:cbb726ac20d8 388
MikamiUitOpen 16:cbb726ac20d8 389 __ASM volatile ("qsax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
MikamiUitOpen 16:cbb726ac20d8 390 return(result);
MikamiUitOpen 16:cbb726ac20d8 391 }
MikamiUitOpen 16:cbb726ac20d8 392
MikamiUitOpen 16:cbb726ac20d8 393 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SHSAX(uint32_t op1, uint32_t op2)
MikamiUitOpen 16:cbb726ac20d8 394 {
MikamiUitOpen 16:cbb726ac20d8 395 uint32_t result;
MikamiUitOpen 16:cbb726ac20d8 396
MikamiUitOpen 16:cbb726ac20d8 397 __ASM volatile ("shsax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
MikamiUitOpen 16:cbb726ac20d8 398 return(result);
MikamiUitOpen 16:cbb726ac20d8 399 }
MikamiUitOpen 16:cbb726ac20d8 400
MikamiUitOpen 16:cbb726ac20d8 401 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __USAX(uint32_t op1, uint32_t op2)
MikamiUitOpen 16:cbb726ac20d8 402 {
MikamiUitOpen 16:cbb726ac20d8 403 uint32_t result;
MikamiUitOpen 16:cbb726ac20d8 404
MikamiUitOpen 16:cbb726ac20d8 405 __ASM volatile ("usax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
MikamiUitOpen 16:cbb726ac20d8 406 return(result);
MikamiUitOpen 16:cbb726ac20d8 407 }
MikamiUitOpen 16:cbb726ac20d8 408
MikamiUitOpen 16:cbb726ac20d8 409 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UQSAX(uint32_t op1, uint32_t op2)
MikamiUitOpen 16:cbb726ac20d8 410 {
MikamiUitOpen 16:cbb726ac20d8 411 uint32_t result;
MikamiUitOpen 16:cbb726ac20d8 412
MikamiUitOpen 16:cbb726ac20d8 413 __ASM volatile ("uqsax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
MikamiUitOpen 16:cbb726ac20d8 414 return(result);
MikamiUitOpen 16:cbb726ac20d8 415 }
MikamiUitOpen 16:cbb726ac20d8 416
MikamiUitOpen 16:cbb726ac20d8 417 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UHSAX(uint32_t op1, uint32_t op2)
MikamiUitOpen 16:cbb726ac20d8 418 {
MikamiUitOpen 16:cbb726ac20d8 419 uint32_t result;
MikamiUitOpen 16:cbb726ac20d8 420
MikamiUitOpen 16:cbb726ac20d8 421 __ASM volatile ("uhsax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
MikamiUitOpen 16:cbb726ac20d8 422 return(result);
MikamiUitOpen 16:cbb726ac20d8 423 }
MikamiUitOpen 16:cbb726ac20d8 424
MikamiUitOpen 16:cbb726ac20d8 425 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __USAD8(uint32_t op1, uint32_t op2)
MikamiUitOpen 16:cbb726ac20d8 426 {
MikamiUitOpen 16:cbb726ac20d8 427 uint32_t result;
MikamiUitOpen 16:cbb726ac20d8 428
MikamiUitOpen 16:cbb726ac20d8 429 __ASM volatile ("usad8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
MikamiUitOpen 16:cbb726ac20d8 430 return(result);
MikamiUitOpen 16:cbb726ac20d8 431 }
MikamiUitOpen 16:cbb726ac20d8 432
MikamiUitOpen 16:cbb726ac20d8 433 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __USADA8(uint32_t op1, uint32_t op2, uint32_t op3)
MikamiUitOpen 16:cbb726ac20d8 434 {
MikamiUitOpen 16:cbb726ac20d8 435 uint32_t result;
MikamiUitOpen 16:cbb726ac20d8 436
MikamiUitOpen 16:cbb726ac20d8 437 __ASM volatile ("usada8 %0, %1, %2, %3" : "=r" (result) : "r" (op1), "r" (op2), "r" (op3) );
MikamiUitOpen 16:cbb726ac20d8 438 return(result);
MikamiUitOpen 16:cbb726ac20d8 439 }
MikamiUitOpen 16:cbb726ac20d8 440
MikamiUitOpen 16:cbb726ac20d8 441 #define __SSAT16(ARG1,ARG2) \
MikamiUitOpen 16:cbb726ac20d8 442 ({ \
MikamiUitOpen 16:cbb726ac20d8 443 uint32_t __RES, __ARG1 = (ARG1); \
MikamiUitOpen 16:cbb726ac20d8 444 __ASM ("ssat16 %0, %1, %2" : "=r" (__RES) : "I" (ARG2), "r" (__ARG1) ); \
MikamiUitOpen 16:cbb726ac20d8 445 __RES; \
MikamiUitOpen 16:cbb726ac20d8 446 })
MikamiUitOpen 16:cbb726ac20d8 447
MikamiUitOpen 16:cbb726ac20d8 448 #define __USAT16(ARG1,ARG2) \
MikamiUitOpen 16:cbb726ac20d8 449 ({ \
MikamiUitOpen 16:cbb726ac20d8 450 uint32_t __RES, __ARG1 = (ARG1); \
MikamiUitOpen 16:cbb726ac20d8 451 __ASM ("usat16 %0, %1, %2" : "=r" (__RES) : "I" (ARG2), "r" (__ARG1) ); \
MikamiUitOpen 16:cbb726ac20d8 452 __RES; \
MikamiUitOpen 16:cbb726ac20d8 453 })
MikamiUitOpen 16:cbb726ac20d8 454
MikamiUitOpen 16:cbb726ac20d8 455 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UXTB16(uint32_t op1)
MikamiUitOpen 16:cbb726ac20d8 456 {
MikamiUitOpen 16:cbb726ac20d8 457 uint32_t result;
MikamiUitOpen 16:cbb726ac20d8 458
MikamiUitOpen 16:cbb726ac20d8 459 __ASM volatile ("uxtb16 %0, %1" : "=r" (result) : "r" (op1));
MikamiUitOpen 16:cbb726ac20d8 460 return(result);
MikamiUitOpen 16:cbb726ac20d8 461 }
MikamiUitOpen 16:cbb726ac20d8 462
MikamiUitOpen 16:cbb726ac20d8 463 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UXTAB16(uint32_t op1, uint32_t op2)
MikamiUitOpen 16:cbb726ac20d8 464 {
MikamiUitOpen 16:cbb726ac20d8 465 uint32_t result;
MikamiUitOpen 16:cbb726ac20d8 466
MikamiUitOpen 16:cbb726ac20d8 467 __ASM volatile ("uxtab16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
MikamiUitOpen 16:cbb726ac20d8 468 return(result);
MikamiUitOpen 16:cbb726ac20d8 469 }
MikamiUitOpen 16:cbb726ac20d8 470
MikamiUitOpen 16:cbb726ac20d8 471 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SXTB16(uint32_t op1)
MikamiUitOpen 16:cbb726ac20d8 472 {
MikamiUitOpen 16:cbb726ac20d8 473 uint32_t result;
MikamiUitOpen 16:cbb726ac20d8 474
MikamiUitOpen 16:cbb726ac20d8 475 __ASM volatile ("sxtb16 %0, %1" : "=r" (result) : "r" (op1));
MikamiUitOpen 16:cbb726ac20d8 476 return(result);
MikamiUitOpen 16:cbb726ac20d8 477 }
MikamiUitOpen 16:cbb726ac20d8 478
MikamiUitOpen 16:cbb726ac20d8 479 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SXTAB16(uint32_t op1, uint32_t op2)
MikamiUitOpen 16:cbb726ac20d8 480 {
MikamiUitOpen 16:cbb726ac20d8 481 uint32_t result;
MikamiUitOpen 16:cbb726ac20d8 482
MikamiUitOpen 16:cbb726ac20d8 483 __ASM volatile ("sxtab16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
MikamiUitOpen 16:cbb726ac20d8 484 return(result);
MikamiUitOpen 16:cbb726ac20d8 485 }
MikamiUitOpen 16:cbb726ac20d8 486
MikamiUitOpen 16:cbb726ac20d8 487 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SMUAD (uint32_t op1, uint32_t op2)
MikamiUitOpen 16:cbb726ac20d8 488 {
MikamiUitOpen 16:cbb726ac20d8 489 uint32_t result;
MikamiUitOpen 16:cbb726ac20d8 490
MikamiUitOpen 16:cbb726ac20d8 491 __ASM volatile ("smuad %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
MikamiUitOpen 16:cbb726ac20d8 492 return(result);
MikamiUitOpen 16:cbb726ac20d8 493 }
MikamiUitOpen 16:cbb726ac20d8 494
MikamiUitOpen 16:cbb726ac20d8 495 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SMUADX (uint32_t op1, uint32_t op2)
MikamiUitOpen 16:cbb726ac20d8 496 {
MikamiUitOpen 16:cbb726ac20d8 497 uint32_t result;
MikamiUitOpen 16:cbb726ac20d8 498
MikamiUitOpen 16:cbb726ac20d8 499 __ASM volatile ("smuadx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
MikamiUitOpen 16:cbb726ac20d8 500 return(result);
MikamiUitOpen 16:cbb726ac20d8 501 }
MikamiUitOpen 16:cbb726ac20d8 502
MikamiUitOpen 16:cbb726ac20d8 503 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SMLAD (uint32_t op1, uint32_t op2, uint32_t op3)
MikamiUitOpen 16:cbb726ac20d8 504 {
MikamiUitOpen 16:cbb726ac20d8 505 uint32_t result;
MikamiUitOpen 16:cbb726ac20d8 506
MikamiUitOpen 16:cbb726ac20d8 507 __ASM volatile ("smlad %0, %1, %2, %3" : "=r" (result) : "r" (op1), "r" (op2), "r" (op3) );
MikamiUitOpen 16:cbb726ac20d8 508 return(result);
MikamiUitOpen 16:cbb726ac20d8 509 }
MikamiUitOpen 16:cbb726ac20d8 510
MikamiUitOpen 16:cbb726ac20d8 511 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SMLADX (uint32_t op1, uint32_t op2, uint32_t op3)
MikamiUitOpen 16:cbb726ac20d8 512 {
MikamiUitOpen 16:cbb726ac20d8 513 uint32_t result;
MikamiUitOpen 16:cbb726ac20d8 514
MikamiUitOpen 16:cbb726ac20d8 515 __ASM volatile ("smladx %0, %1, %2, %3" : "=r" (result) : "r" (op1), "r" (op2), "r" (op3) );
MikamiUitOpen 16:cbb726ac20d8 516 return(result);
MikamiUitOpen 16:cbb726ac20d8 517 }
MikamiUitOpen 16:cbb726ac20d8 518
MikamiUitOpen 16:cbb726ac20d8 519 __attribute__( ( always_inline ) ) __STATIC_INLINE uint64_t __SMLALD (uint32_t op1, uint32_t op2, uint64_t acc)
MikamiUitOpen 16:cbb726ac20d8 520 {
MikamiUitOpen 16:cbb726ac20d8 521 union llreg_u{
MikamiUitOpen 16:cbb726ac20d8 522 uint32_t w32[2];
MikamiUitOpen 16:cbb726ac20d8 523 uint64_t w64;
MikamiUitOpen 16:cbb726ac20d8 524 } llr;
MikamiUitOpen 16:cbb726ac20d8 525 llr.w64 = acc;
MikamiUitOpen 16:cbb726ac20d8 526
MikamiUitOpen 16:cbb726ac20d8 527 #ifndef __ARMEB__ // Little endian
MikamiUitOpen 16:cbb726ac20d8 528 __ASM volatile ("smlald %0, %1, %2, %3" : "=r" (llr.w32[0]), "=r" (llr.w32[1]): "r" (op1), "r" (op2) , "0" (llr.w32[0]), "1" (llr.w32[1]) );
MikamiUitOpen 16:cbb726ac20d8 529 #else // Big endian
MikamiUitOpen 16:cbb726ac20d8 530 __ASM volatile ("smlald %0, %1, %2, %3" : "=r" (llr.w32[1]), "=r" (llr.w32[0]): "r" (op1), "r" (op2) , "0" (llr.w32[1]), "1" (llr.w32[0]) );
MikamiUitOpen 16:cbb726ac20d8 531 #endif
MikamiUitOpen 16:cbb726ac20d8 532
MikamiUitOpen 16:cbb726ac20d8 533 return(llr.w64);
MikamiUitOpen 16:cbb726ac20d8 534 }
MikamiUitOpen 16:cbb726ac20d8 535
MikamiUitOpen 16:cbb726ac20d8 536 __attribute__( ( always_inline ) ) __STATIC_INLINE uint64_t __SMLALDX (uint32_t op1, uint32_t op2, uint64_t acc)
MikamiUitOpen 16:cbb726ac20d8 537 {
MikamiUitOpen 16:cbb726ac20d8 538 union llreg_u{
MikamiUitOpen 16:cbb726ac20d8 539 uint32_t w32[2];
MikamiUitOpen 16:cbb726ac20d8 540 uint64_t w64;
MikamiUitOpen 16:cbb726ac20d8 541 } llr;
MikamiUitOpen 16:cbb726ac20d8 542 llr.w64 = acc;
MikamiUitOpen 16:cbb726ac20d8 543
MikamiUitOpen 16:cbb726ac20d8 544 #ifndef __ARMEB__ // Little endian
MikamiUitOpen 16:cbb726ac20d8 545 __ASM volatile ("smlaldx %0, %1, %2, %3" : "=r" (llr.w32[0]), "=r" (llr.w32[1]): "r" (op1), "r" (op2) , "0" (llr.w32[0]), "1" (llr.w32[1]) );
MikamiUitOpen 16:cbb726ac20d8 546 #else // Big endian
MikamiUitOpen 16:cbb726ac20d8 547 __ASM volatile ("smlaldx %0, %1, %2, %3" : "=r" (llr.w32[1]), "=r" (llr.w32[0]): "r" (op1), "r" (op2) , "0" (llr.w32[1]), "1" (llr.w32[0]) );
MikamiUitOpen 16:cbb726ac20d8 548 #endif
MikamiUitOpen 16:cbb726ac20d8 549
MikamiUitOpen 16:cbb726ac20d8 550 return(llr.w64);
MikamiUitOpen 16:cbb726ac20d8 551 }
MikamiUitOpen 16:cbb726ac20d8 552
MikamiUitOpen 16:cbb726ac20d8 553 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SMUSD (uint32_t op1, uint32_t op2)
MikamiUitOpen 16:cbb726ac20d8 554 {
MikamiUitOpen 16:cbb726ac20d8 555 uint32_t result;
MikamiUitOpen 16:cbb726ac20d8 556
MikamiUitOpen 16:cbb726ac20d8 557 __ASM volatile ("smusd %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
MikamiUitOpen 16:cbb726ac20d8 558 return(result);
MikamiUitOpen 16:cbb726ac20d8 559 }
MikamiUitOpen 16:cbb726ac20d8 560
MikamiUitOpen 16:cbb726ac20d8 561 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SMUSDX (uint32_t op1, uint32_t op2)
MikamiUitOpen 16:cbb726ac20d8 562 {
MikamiUitOpen 16:cbb726ac20d8 563 uint32_t result;
MikamiUitOpen 16:cbb726ac20d8 564
MikamiUitOpen 16:cbb726ac20d8 565 __ASM volatile ("smusdx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
MikamiUitOpen 16:cbb726ac20d8 566 return(result);
MikamiUitOpen 16:cbb726ac20d8 567 }
MikamiUitOpen 16:cbb726ac20d8 568
MikamiUitOpen 16:cbb726ac20d8 569 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SMLSD (uint32_t op1, uint32_t op2, uint32_t op3)
MikamiUitOpen 16:cbb726ac20d8 570 {
MikamiUitOpen 16:cbb726ac20d8 571 uint32_t result;
MikamiUitOpen 16:cbb726ac20d8 572
MikamiUitOpen 16:cbb726ac20d8 573 __ASM volatile ("smlsd %0, %1, %2, %3" : "=r" (result) : "r" (op1), "r" (op2), "r" (op3) );
MikamiUitOpen 16:cbb726ac20d8 574 return(result);
MikamiUitOpen 16:cbb726ac20d8 575 }
MikamiUitOpen 16:cbb726ac20d8 576
MikamiUitOpen 16:cbb726ac20d8 577 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SMLSDX (uint32_t op1, uint32_t op2, uint32_t op3)
MikamiUitOpen 16:cbb726ac20d8 578 {
MikamiUitOpen 16:cbb726ac20d8 579 uint32_t result;
MikamiUitOpen 16:cbb726ac20d8 580
MikamiUitOpen 16:cbb726ac20d8 581 __ASM volatile ("smlsdx %0, %1, %2, %3" : "=r" (result) : "r" (op1), "r" (op2), "r" (op3) );
MikamiUitOpen 16:cbb726ac20d8 582 return(result);
MikamiUitOpen 16:cbb726ac20d8 583 }
MikamiUitOpen 16:cbb726ac20d8 584
MikamiUitOpen 16:cbb726ac20d8 585 __attribute__( ( always_inline ) ) __STATIC_INLINE uint64_t __SMLSLD (uint32_t op1, uint32_t op2, uint64_t acc)
MikamiUitOpen 16:cbb726ac20d8 586 {
MikamiUitOpen 16:cbb726ac20d8 587 union llreg_u{
MikamiUitOpen 16:cbb726ac20d8 588 uint32_t w32[2];
MikamiUitOpen 16:cbb726ac20d8 589 uint64_t w64;
MikamiUitOpen 16:cbb726ac20d8 590 } llr;
MikamiUitOpen 16:cbb726ac20d8 591 llr.w64 = acc;
MikamiUitOpen 16:cbb726ac20d8 592
MikamiUitOpen 16:cbb726ac20d8 593 #ifndef __ARMEB__ // Little endian
MikamiUitOpen 16:cbb726ac20d8 594 __ASM volatile ("smlsld %0, %1, %2, %3" : "=r" (llr.w32[0]), "=r" (llr.w32[1]): "r" (op1), "r" (op2) , "0" (llr.w32[0]), "1" (llr.w32[1]) );
MikamiUitOpen 16:cbb726ac20d8 595 #else // Big endian
MikamiUitOpen 16:cbb726ac20d8 596 __ASM volatile ("smlsld %0, %1, %2, %3" : "=r" (llr.w32[1]), "=r" (llr.w32[0]): "r" (op1), "r" (op2) , "0" (llr.w32[1]), "1" (llr.w32[0]) );
MikamiUitOpen 16:cbb726ac20d8 597 #endif
MikamiUitOpen 16:cbb726ac20d8 598
MikamiUitOpen 16:cbb726ac20d8 599 return(llr.w64);
MikamiUitOpen 16:cbb726ac20d8 600 }
MikamiUitOpen 16:cbb726ac20d8 601
MikamiUitOpen 16:cbb726ac20d8 602 __attribute__( ( always_inline ) ) __STATIC_INLINE uint64_t __SMLSLDX (uint32_t op1, uint32_t op2, uint64_t acc)
MikamiUitOpen 16:cbb726ac20d8 603 {
MikamiUitOpen 16:cbb726ac20d8 604 union llreg_u{
MikamiUitOpen 16:cbb726ac20d8 605 uint32_t w32[2];
MikamiUitOpen 16:cbb726ac20d8 606 uint64_t w64;
MikamiUitOpen 16:cbb726ac20d8 607 } llr;
MikamiUitOpen 16:cbb726ac20d8 608 llr.w64 = acc;
MikamiUitOpen 16:cbb726ac20d8 609
MikamiUitOpen 16:cbb726ac20d8 610 #ifndef __ARMEB__ // Little endian
MikamiUitOpen 16:cbb726ac20d8 611 __ASM volatile ("smlsldx %0, %1, %2, %3" : "=r" (llr.w32[0]), "=r" (llr.w32[1]): "r" (op1), "r" (op2) , "0" (llr.w32[0]), "1" (llr.w32[1]) );
MikamiUitOpen 16:cbb726ac20d8 612 #else // Big endian
MikamiUitOpen 16:cbb726ac20d8 613 __ASM volatile ("smlsldx %0, %1, %2, %3" : "=r" (llr.w32[1]), "=r" (llr.w32[0]): "r" (op1), "r" (op2) , "0" (llr.w32[1]), "1" (llr.w32[0]) );
MikamiUitOpen 16:cbb726ac20d8 614 #endif
MikamiUitOpen 16:cbb726ac20d8 615
MikamiUitOpen 16:cbb726ac20d8 616 return(llr.w64);
MikamiUitOpen 16:cbb726ac20d8 617 }
MikamiUitOpen 16:cbb726ac20d8 618
MikamiUitOpen 16:cbb726ac20d8 619 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SEL (uint32_t op1, uint32_t op2)
MikamiUitOpen 16:cbb726ac20d8 620 {
MikamiUitOpen 16:cbb726ac20d8 621 uint32_t result;
MikamiUitOpen 16:cbb726ac20d8 622
MikamiUitOpen 16:cbb726ac20d8 623 __ASM volatile ("sel %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
MikamiUitOpen 16:cbb726ac20d8 624 return(result);
MikamiUitOpen 16:cbb726ac20d8 625 }
MikamiUitOpen 16:cbb726ac20d8 626
MikamiUitOpen 16:cbb726ac20d8 627 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __QADD(uint32_t op1, uint32_t op2)
MikamiUitOpen 16:cbb726ac20d8 628 {
MikamiUitOpen 16:cbb726ac20d8 629 uint32_t result;
MikamiUitOpen 16:cbb726ac20d8 630
MikamiUitOpen 16:cbb726ac20d8 631 __ASM volatile ("qadd %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
MikamiUitOpen 16:cbb726ac20d8 632 return(result);
MikamiUitOpen 16:cbb726ac20d8 633 }
MikamiUitOpen 16:cbb726ac20d8 634
MikamiUitOpen 16:cbb726ac20d8 635 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __QSUB(uint32_t op1, uint32_t op2)
MikamiUitOpen 16:cbb726ac20d8 636 {
MikamiUitOpen 16:cbb726ac20d8 637 uint32_t result;
MikamiUitOpen 16:cbb726ac20d8 638
MikamiUitOpen 16:cbb726ac20d8 639 __ASM volatile ("qsub %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
MikamiUitOpen 16:cbb726ac20d8 640 return(result);
MikamiUitOpen 16:cbb726ac20d8 641 }
MikamiUitOpen 16:cbb726ac20d8 642
MikamiUitOpen 16:cbb726ac20d8 643 #define __PKHBT(ARG1,ARG2,ARG3) \
MikamiUitOpen 16:cbb726ac20d8 644 ({ \
MikamiUitOpen 16:cbb726ac20d8 645 uint32_t __RES, __ARG1 = (ARG1), __ARG2 = (ARG2); \
MikamiUitOpen 16:cbb726ac20d8 646 __ASM ("pkhbt %0, %1, %2, lsl %3" : "=r" (__RES) : "r" (__ARG1), "r" (__ARG2), "I" (ARG3) ); \
MikamiUitOpen 16:cbb726ac20d8 647 __RES; \
MikamiUitOpen 16:cbb726ac20d8 648 })
MikamiUitOpen 16:cbb726ac20d8 649
MikamiUitOpen 16:cbb726ac20d8 650 #define __PKHTB(ARG1,ARG2,ARG3) \
MikamiUitOpen 16:cbb726ac20d8 651 ({ \
MikamiUitOpen 16:cbb726ac20d8 652 uint32_t __RES, __ARG1 = (ARG1), __ARG2 = (ARG2); \
MikamiUitOpen 16:cbb726ac20d8 653 if (ARG3 == 0) \
MikamiUitOpen 16:cbb726ac20d8 654 __ASM ("pkhtb %0, %1, %2" : "=r" (__RES) : "r" (__ARG1), "r" (__ARG2) ); \
MikamiUitOpen 16:cbb726ac20d8 655 else \
MikamiUitOpen 16:cbb726ac20d8 656 __ASM ("pkhtb %0, %1, %2, asr %3" : "=r" (__RES) : "r" (__ARG1), "r" (__ARG2), "I" (ARG3) ); \
MikamiUitOpen 16:cbb726ac20d8 657 __RES; \
MikamiUitOpen 16:cbb726ac20d8 658 })
MikamiUitOpen 16:cbb726ac20d8 659
MikamiUitOpen 16:cbb726ac20d8 660 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SMMLA (int32_t op1, int32_t op2, int32_t op3)
MikamiUitOpen 16:cbb726ac20d8 661 {
MikamiUitOpen 16:cbb726ac20d8 662 int32_t result;
MikamiUitOpen 16:cbb726ac20d8 663
MikamiUitOpen 16:cbb726ac20d8 664 __ASM volatile ("smmla %0, %1, %2, %3" : "=r" (result): "r" (op1), "r" (op2), "r" (op3) );
MikamiUitOpen 16:cbb726ac20d8 665 return(result);
MikamiUitOpen 16:cbb726ac20d8 666 }
MikamiUitOpen 16:cbb726ac20d8 667
MikamiUitOpen 16:cbb726ac20d8 668
MikamiUitOpen 16:cbb726ac20d8 669 #elif defined ( __ICCARM__ ) /*------------------ ICC Compiler -------------------*/
MikamiUitOpen 16:cbb726ac20d8 670 /* IAR iccarm specific functions */
MikamiUitOpen 16:cbb726ac20d8 671 #include <cmsis_iar.h>
MikamiUitOpen 16:cbb726ac20d8 672
MikamiUitOpen 16:cbb726ac20d8 673
MikamiUitOpen 16:cbb726ac20d8 674 #elif defined ( __TMS470__ ) /*---------------- TI CCS Compiler ------------------*/
MikamiUitOpen 16:cbb726ac20d8 675 /* TI CCS specific functions */
MikamiUitOpen 16:cbb726ac20d8 676 #include <cmsis_ccs.h>
MikamiUitOpen 16:cbb726ac20d8 677
MikamiUitOpen 16:cbb726ac20d8 678
MikamiUitOpen 16:cbb726ac20d8 679 #elif defined ( __TASKING__ ) /*------------------ TASKING Compiler --------------*/
MikamiUitOpen 16:cbb726ac20d8 680 /* TASKING carm specific functions */
MikamiUitOpen 16:cbb726ac20d8 681 /* not yet supported */
MikamiUitOpen 16:cbb726ac20d8 682
MikamiUitOpen 16:cbb726ac20d8 683
MikamiUitOpen 16:cbb726ac20d8 684 #elif defined ( __CSMC__ ) /*------------------ COSMIC Compiler -------------------*/
MikamiUitOpen 16:cbb726ac20d8 685 /* Cosmic specific functions */
MikamiUitOpen 16:cbb726ac20d8 686 #include <cmsis_csm.h>
MikamiUitOpen 16:cbb726ac20d8 687
MikamiUitOpen 16:cbb726ac20d8 688 #endif
MikamiUitOpen 16:cbb726ac20d8 689
MikamiUitOpen 16:cbb726ac20d8 690 /*@} end of group CMSIS_SIMD_intrinsics */
MikamiUitOpen 16:cbb726ac20d8 691
MikamiUitOpen 16:cbb726ac20d8 692
MikamiUitOpen 16:cbb726ac20d8 693 #ifdef __cplusplus
MikamiUitOpen 16:cbb726ac20d8 694 }
MikamiUitOpen 16:cbb726ac20d8 695 #endif
MikamiUitOpen 16:cbb726ac20d8 696
MikamiUitOpen 16:cbb726ac20d8 697 #endif /* __CORE_CMSIMD_H */