不韋 呂 / F746_SD_GraphicEqualizer

Output the audio signal with filtering by graphic equalizer in the *.wav file on the SD card using onboard CODEC. SD カードの *.wav ファイルのオーディオ信号をグラフィック･イコライザを通して，ボードに搭載されているCODEC で出力する．

Dependencies:   F746_GUI F746_SAI_IO SD_PlayerSkeleton FrequencyResponseDrawer

mbed_src_STM32F7/targets/cmsis/core_cmInstr.h@24:f78f9d0ac262, 2017-04-10 (annotated)

Committer:
MikamiUitOpen
Date:
Mon Apr 10 04:07:35 2017 +0000
Revision:
24:f78f9d0ac262
Parent:
16:cbb726ac20d8 
25

Who changed what in which revision?

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MikamiUitOpen 16:cbb726ac20d8 1 /**************************************************************************//**
MikamiUitOpen 16:cbb726ac20d8 2 * @file core_cmInstr.h
MikamiUitOpen 16:cbb726ac20d8 3 * @brief CMSIS Cortex-M Core Instruction Access Header File
MikamiUitOpen 16:cbb726ac20d8 4 * @version V4.10
MikamiUitOpen 16:cbb726ac20d8 5 * @date 18. March 2015
MikamiUitOpen 16:cbb726ac20d8 6 *
MikamiUitOpen 16:cbb726ac20d8 7 * @note
MikamiUitOpen 16:cbb726ac20d8 8 *
MikamiUitOpen 16:cbb726ac20d8 9 ******************************************************************************/
MikamiUitOpen 16:cbb726ac20d8 10 /* Copyright (c) 2009 - 2014 ARM LIMITED
MikamiUitOpen 16:cbb726ac20d8 11
MikamiUitOpen 16:cbb726ac20d8 12 All rights reserved.
MikamiUitOpen 16:cbb726ac20d8 13 Redistribution and use in source and binary forms, with or without
MikamiUitOpen 16:cbb726ac20d8 14 modification, are permitted provided that the following conditions are met:
MikamiUitOpen 16:cbb726ac20d8 15 - Redistributions of source code must retain the above copyright
MikamiUitOpen 16:cbb726ac20d8 16 notice, this list of conditions and the following disclaimer.
MikamiUitOpen 16:cbb726ac20d8 17 - Redistributions in binary form must reproduce the above copyright
MikamiUitOpen 16:cbb726ac20d8 18 notice, this list of conditions and the following disclaimer in the
MikamiUitOpen 16:cbb726ac20d8 19 documentation and/or other materials provided with the distribution.
MikamiUitOpen 16:cbb726ac20d8 20 - Neither the name of ARM nor the names of its contributors may be used
MikamiUitOpen 16:cbb726ac20d8 21 to endorse or promote products derived from this software without
MikamiUitOpen 16:cbb726ac20d8 22 specific prior written permission.
MikamiUitOpen 16:cbb726ac20d8 23 *
MikamiUitOpen 16:cbb726ac20d8 24 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
MikamiUitOpen 16:cbb726ac20d8 25 AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
MikamiUitOpen 16:cbb726ac20d8 26 IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
MikamiUitOpen 16:cbb726ac20d8 27 ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
MikamiUitOpen 16:cbb726ac20d8 28 LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
MikamiUitOpen 16:cbb726ac20d8 29 CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
MikamiUitOpen 16:cbb726ac20d8 30 SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
MikamiUitOpen 16:cbb726ac20d8 31 INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
MikamiUitOpen 16:cbb726ac20d8 32 CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
MikamiUitOpen 16:cbb726ac20d8 33 ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
MikamiUitOpen 16:cbb726ac20d8 34 POSSIBILITY OF SUCH DAMAGE.
MikamiUitOpen 16:cbb726ac20d8 35 ---------------------------------------------------------------------------*/
MikamiUitOpen 16:cbb726ac20d8 36
MikamiUitOpen 16:cbb726ac20d8 37
MikamiUitOpen 16:cbb726ac20d8 38 #ifndef __CORE_CMINSTR_H
MikamiUitOpen 16:cbb726ac20d8 39 #define __CORE_CMINSTR_H
MikamiUitOpen 16:cbb726ac20d8 40
MikamiUitOpen 16:cbb726ac20d8 41
MikamiUitOpen 16:cbb726ac20d8 42 /* ########################## Core Instruction Access ######################### */
MikamiUitOpen 16:cbb726ac20d8 43 /** \defgroup CMSIS_Core_InstructionInterface CMSIS Core Instruction Interface
MikamiUitOpen 16:cbb726ac20d8 44 Access to dedicated instructions
MikamiUitOpen 16:cbb726ac20d8 45 @{
MikamiUitOpen 16:cbb726ac20d8 46 */
MikamiUitOpen 16:cbb726ac20d8 47
MikamiUitOpen 16:cbb726ac20d8 48 #if defined ( __CC_ARM ) /*------------------RealView Compiler -----------------*/
MikamiUitOpen 16:cbb726ac20d8 49 /* ARM armcc specific functions */
MikamiUitOpen 16:cbb726ac20d8 50
MikamiUitOpen 16:cbb726ac20d8 51 #if (__ARMCC_VERSION < 400677)
MikamiUitOpen 16:cbb726ac20d8 52 #error "Please use ARM Compiler Toolchain V4.0.677 or later!"
MikamiUitOpen 16:cbb726ac20d8 53 #endif
MikamiUitOpen 16:cbb726ac20d8 54
MikamiUitOpen 16:cbb726ac20d8 55
MikamiUitOpen 16:cbb726ac20d8 56 /** \brief No Operation
MikamiUitOpen 16:cbb726ac20d8 57
MikamiUitOpen 16:cbb726ac20d8 58 No Operation does nothing. This instruction can be used for code alignment purposes.
MikamiUitOpen 16:cbb726ac20d8 59 */
MikamiUitOpen 16:cbb726ac20d8 60 #define __NOP __nop
MikamiUitOpen 16:cbb726ac20d8 61
MikamiUitOpen 16:cbb726ac20d8 62
MikamiUitOpen 16:cbb726ac20d8 63 /** \brief Wait For Interrupt
MikamiUitOpen 16:cbb726ac20d8 64
MikamiUitOpen 16:cbb726ac20d8 65 Wait For Interrupt is a hint instruction that suspends execution
MikamiUitOpen 16:cbb726ac20d8 66 until one of a number of events occurs.
MikamiUitOpen 16:cbb726ac20d8 67 */
MikamiUitOpen 16:cbb726ac20d8 68 #define __WFI __wfi
MikamiUitOpen 16:cbb726ac20d8 69
MikamiUitOpen 16:cbb726ac20d8 70
MikamiUitOpen 16:cbb726ac20d8 71 /** \brief Wait For Event
MikamiUitOpen 16:cbb726ac20d8 72
MikamiUitOpen 16:cbb726ac20d8 73 Wait For Event is a hint instruction that permits the processor to enter
MikamiUitOpen 16:cbb726ac20d8 74 a low-power state until one of a number of events occurs.
MikamiUitOpen 16:cbb726ac20d8 75 */
MikamiUitOpen 16:cbb726ac20d8 76 #define __WFE __wfe
MikamiUitOpen 16:cbb726ac20d8 77
MikamiUitOpen 16:cbb726ac20d8 78
MikamiUitOpen 16:cbb726ac20d8 79 /** \brief Send Event
MikamiUitOpen 16:cbb726ac20d8 80
MikamiUitOpen 16:cbb726ac20d8 81 Send Event is a hint instruction. It causes an event to be signaled to the CPU.
MikamiUitOpen 16:cbb726ac20d8 82 */
MikamiUitOpen 16:cbb726ac20d8 83 #define __SEV __sev
MikamiUitOpen 16:cbb726ac20d8 84
MikamiUitOpen 16:cbb726ac20d8 85
MikamiUitOpen 16:cbb726ac20d8 86 /** \brief Instruction Synchronization Barrier
MikamiUitOpen 16:cbb726ac20d8 87
MikamiUitOpen 16:cbb726ac20d8 88 Instruction Synchronization Barrier flushes the pipeline in the processor,
MikamiUitOpen 16:cbb726ac20d8 89 so that all instructions following the ISB are fetched from cache or
MikamiUitOpen 16:cbb726ac20d8 90 memory, after the instruction has been completed.
MikamiUitOpen 16:cbb726ac20d8 91 */
MikamiUitOpen 16:cbb726ac20d8 92 #define __ISB() do {\
MikamiUitOpen 16:cbb726ac20d8 93 __schedule_barrier();\
MikamiUitOpen 16:cbb726ac20d8 94 __isb(0xF);\
MikamiUitOpen 16:cbb726ac20d8 95 __schedule_barrier();\
MikamiUitOpen 16:cbb726ac20d8 96 } while (0)
MikamiUitOpen 16:cbb726ac20d8 97
MikamiUitOpen 16:cbb726ac20d8 98 /** \brief Data Synchronization Barrier
MikamiUitOpen 16:cbb726ac20d8 99
MikamiUitOpen 16:cbb726ac20d8 100 This function acts as a special kind of Data Memory Barrier.
MikamiUitOpen 16:cbb726ac20d8 101 It completes when all explicit memory accesses before this instruction complete.
MikamiUitOpen 16:cbb726ac20d8 102 */
MikamiUitOpen 16:cbb726ac20d8 103 #define __DSB() do {\
MikamiUitOpen 16:cbb726ac20d8 104 __schedule_barrier();\
MikamiUitOpen 16:cbb726ac20d8 105 __dsb(0xF);\
MikamiUitOpen 16:cbb726ac20d8 106 __schedule_barrier();\
MikamiUitOpen 16:cbb726ac20d8 107 } while (0)
MikamiUitOpen 16:cbb726ac20d8 108
MikamiUitOpen 16:cbb726ac20d8 109 /** \brief Data Memory Barrier
MikamiUitOpen 16:cbb726ac20d8 110
MikamiUitOpen 16:cbb726ac20d8 111 This function ensures the apparent order of the explicit memory operations before
MikamiUitOpen 16:cbb726ac20d8 112 and after the instruction, without ensuring their completion.
MikamiUitOpen 16:cbb726ac20d8 113 */
MikamiUitOpen 16:cbb726ac20d8 114 #define __DMB() do {\
MikamiUitOpen 16:cbb726ac20d8 115 __schedule_barrier();\
MikamiUitOpen 16:cbb726ac20d8 116 __dmb(0xF);\
MikamiUitOpen 16:cbb726ac20d8 117 __schedule_barrier();\
MikamiUitOpen 16:cbb726ac20d8 118 } while (0)
MikamiUitOpen 16:cbb726ac20d8 119
MikamiUitOpen 16:cbb726ac20d8 120 /** \brief Reverse byte order (32 bit)
MikamiUitOpen 16:cbb726ac20d8 121
MikamiUitOpen 16:cbb726ac20d8 122 This function reverses the byte order in integer value.
MikamiUitOpen 16:cbb726ac20d8 123
MikamiUitOpen 16:cbb726ac20d8 124 \param [in] value Value to reverse
MikamiUitOpen 16:cbb726ac20d8 125 \return Reversed value
MikamiUitOpen 16:cbb726ac20d8 126 */
MikamiUitOpen 16:cbb726ac20d8 127 #define __REV __rev
MikamiUitOpen 16:cbb726ac20d8 128
MikamiUitOpen 16:cbb726ac20d8 129
MikamiUitOpen 16:cbb726ac20d8 130 /** \brief Reverse byte order (16 bit)
MikamiUitOpen 16:cbb726ac20d8 131
MikamiUitOpen 16:cbb726ac20d8 132 This function reverses the byte order in two unsigned short values.
MikamiUitOpen 16:cbb726ac20d8 133
MikamiUitOpen 16:cbb726ac20d8 134 \param [in] value Value to reverse
MikamiUitOpen 16:cbb726ac20d8 135 \return Reversed value
MikamiUitOpen 16:cbb726ac20d8 136 */
MikamiUitOpen 16:cbb726ac20d8 137 #ifndef __NO_EMBEDDED_ASM
MikamiUitOpen 16:cbb726ac20d8 138 __attribute__((section(".rev16_text"))) __STATIC_INLINE __ASM uint32_t __REV16(uint32_t value)
MikamiUitOpen 16:cbb726ac20d8 139 {
MikamiUitOpen 16:cbb726ac20d8 140 rev16 r0, r0
MikamiUitOpen 16:cbb726ac20d8 141 bx lr
MikamiUitOpen 16:cbb726ac20d8 142 }
MikamiUitOpen 16:cbb726ac20d8 143 #endif
MikamiUitOpen 16:cbb726ac20d8 144
MikamiUitOpen 16:cbb726ac20d8 145 /** \brief Reverse byte order in signed short value
MikamiUitOpen 16:cbb726ac20d8 146
MikamiUitOpen 16:cbb726ac20d8 147 This function reverses the byte order in a signed short value with sign extension to integer.
MikamiUitOpen 16:cbb726ac20d8 148
MikamiUitOpen 16:cbb726ac20d8 149 \param [in] value Value to reverse
MikamiUitOpen 16:cbb726ac20d8 150 \return Reversed value
MikamiUitOpen 16:cbb726ac20d8 151 */
MikamiUitOpen 16:cbb726ac20d8 152 #ifndef __NO_EMBEDDED_ASM
MikamiUitOpen 16:cbb726ac20d8 153 __attribute__((section(".revsh_text"))) __STATIC_INLINE __ASM int32_t __REVSH(int32_t value)
MikamiUitOpen 16:cbb726ac20d8 154 {
MikamiUitOpen 16:cbb726ac20d8 155 revsh r0, r0
MikamiUitOpen 16:cbb726ac20d8 156 bx lr
MikamiUitOpen 16:cbb726ac20d8 157 }
MikamiUitOpen 16:cbb726ac20d8 158 #endif
MikamiUitOpen 16:cbb726ac20d8 159
MikamiUitOpen 16:cbb726ac20d8 160
MikamiUitOpen 16:cbb726ac20d8 161 /** \brief Rotate Right in unsigned value (32 bit)
MikamiUitOpen 16:cbb726ac20d8 162
MikamiUitOpen 16:cbb726ac20d8 163 This function Rotate Right (immediate) provides the value of the contents of a register rotated by a variable number of bits.
MikamiUitOpen 16:cbb726ac20d8 164
MikamiUitOpen 16:cbb726ac20d8 165 \param [in] value Value to rotate
MikamiUitOpen 16:cbb726ac20d8 166 \param [in] value Number of Bits to rotate
MikamiUitOpen 16:cbb726ac20d8 167 \return Rotated value
MikamiUitOpen 16:cbb726ac20d8 168 */
MikamiUitOpen 16:cbb726ac20d8 169 #define __ROR __ror
MikamiUitOpen 16:cbb726ac20d8 170
MikamiUitOpen 16:cbb726ac20d8 171
MikamiUitOpen 16:cbb726ac20d8 172 /** \brief Breakpoint
MikamiUitOpen 16:cbb726ac20d8 173
MikamiUitOpen 16:cbb726ac20d8 174 This function causes the processor to enter Debug state.
MikamiUitOpen 16:cbb726ac20d8 175 Debug tools can use this to investigate system state when the instruction at a particular address is reached.
MikamiUitOpen 16:cbb726ac20d8 176
MikamiUitOpen 16:cbb726ac20d8 177 \param [in] value is ignored by the processor.
MikamiUitOpen 16:cbb726ac20d8 178 If required, a debugger can use it to store additional information about the breakpoint.
MikamiUitOpen 16:cbb726ac20d8 179 */
MikamiUitOpen 16:cbb726ac20d8 180 #define __BKPT(value) __breakpoint(value)
MikamiUitOpen 16:cbb726ac20d8 181
MikamiUitOpen 16:cbb726ac20d8 182
MikamiUitOpen 16:cbb726ac20d8 183 /** \brief Reverse bit order of value
MikamiUitOpen 16:cbb726ac20d8 184
MikamiUitOpen 16:cbb726ac20d8 185 This function reverses the bit order of the given value.
MikamiUitOpen 16:cbb726ac20d8 186
MikamiUitOpen 16:cbb726ac20d8 187 \param [in] value Value to reverse
MikamiUitOpen 16:cbb726ac20d8 188 \return Reversed value
MikamiUitOpen 16:cbb726ac20d8 189 */
MikamiUitOpen 16:cbb726ac20d8 190 #if (__CORTEX_M >= 0x03) || (__CORTEX_SC >= 300)
MikamiUitOpen 16:cbb726ac20d8 191 #define __RBIT __rbit
MikamiUitOpen 16:cbb726ac20d8 192 #else
MikamiUitOpen 16:cbb726ac20d8 193 __attribute__((always_inline)) __STATIC_INLINE uint32_t __RBIT(uint32_t value)
MikamiUitOpen 16:cbb726ac20d8 194 {
MikamiUitOpen 16:cbb726ac20d8 195 uint32_t result;
MikamiUitOpen 16:cbb726ac20d8 196 int32_t s = 4 /*sizeof(v)*/ * 8 - 1; // extra shift needed at end
MikamiUitOpen 16:cbb726ac20d8 197
MikamiUitOpen 16:cbb726ac20d8 198 result = value; // r will be reversed bits of v; first get LSB of v
MikamiUitOpen 16:cbb726ac20d8 199 for (value >>= 1; value; value >>= 1)
MikamiUitOpen 16:cbb726ac20d8 200 {
MikamiUitOpen 16:cbb726ac20d8 201 result <<= 1;
MikamiUitOpen 16:cbb726ac20d8 202 result |= value & 1;
MikamiUitOpen 16:cbb726ac20d8 203 s--;
MikamiUitOpen 16:cbb726ac20d8 204 }
MikamiUitOpen 16:cbb726ac20d8 205 result <<= s; // shift when v's highest bits are zero
MikamiUitOpen 16:cbb726ac20d8 206 return(result);
MikamiUitOpen 16:cbb726ac20d8 207 }
MikamiUitOpen 16:cbb726ac20d8 208 #endif
MikamiUitOpen 16:cbb726ac20d8 209
MikamiUitOpen 16:cbb726ac20d8 210
MikamiUitOpen 16:cbb726ac20d8 211 /** \brief Count leading zeros
MikamiUitOpen 16:cbb726ac20d8 212
MikamiUitOpen 16:cbb726ac20d8 213 This function counts the number of leading zeros of a data value.
MikamiUitOpen 16:cbb726ac20d8 214
MikamiUitOpen 16:cbb726ac20d8 215 \param [in] value Value to count the leading zeros
MikamiUitOpen 16:cbb726ac20d8 216 \return number of leading zeros in value
MikamiUitOpen 16:cbb726ac20d8 217 */
MikamiUitOpen 16:cbb726ac20d8 218 #define __CLZ __clz
MikamiUitOpen 16:cbb726ac20d8 219
MikamiUitOpen 16:cbb726ac20d8 220
MikamiUitOpen 16:cbb726ac20d8 221 #if (__CORTEX_M >= 0x03) || (__CORTEX_SC >= 300)
MikamiUitOpen 16:cbb726ac20d8 222
MikamiUitOpen 16:cbb726ac20d8 223 /** \brief LDR Exclusive (8 bit)
MikamiUitOpen 16:cbb726ac20d8 224
MikamiUitOpen 16:cbb726ac20d8 225 This function executes a exclusive LDR instruction for 8 bit value.
MikamiUitOpen 16:cbb726ac20d8 226
MikamiUitOpen 16:cbb726ac20d8 227 \param [in] ptr Pointer to data
MikamiUitOpen 16:cbb726ac20d8 228 \return value of type uint8_t at (*ptr)
MikamiUitOpen 16:cbb726ac20d8 229 */
MikamiUitOpen 16:cbb726ac20d8 230 #define __LDREXB(ptr) ((uint8_t ) __ldrex(ptr))
MikamiUitOpen 16:cbb726ac20d8 231
MikamiUitOpen 16:cbb726ac20d8 232
MikamiUitOpen 16:cbb726ac20d8 233 /** \brief LDR Exclusive (16 bit)
MikamiUitOpen 16:cbb726ac20d8 234
MikamiUitOpen 16:cbb726ac20d8 235 This function executes a exclusive LDR instruction for 16 bit values.
MikamiUitOpen 16:cbb726ac20d8 236
MikamiUitOpen 16:cbb726ac20d8 237 \param [in] ptr Pointer to data
MikamiUitOpen 16:cbb726ac20d8 238 \return value of type uint16_t at (*ptr)
MikamiUitOpen 16:cbb726ac20d8 239 */
MikamiUitOpen 16:cbb726ac20d8 240 #define __LDREXH(ptr) ((uint16_t) __ldrex(ptr))
MikamiUitOpen 16:cbb726ac20d8 241
MikamiUitOpen 16:cbb726ac20d8 242
MikamiUitOpen 16:cbb726ac20d8 243 /** \brief LDR Exclusive (32 bit)
MikamiUitOpen 16:cbb726ac20d8 244
MikamiUitOpen 16:cbb726ac20d8 245 This function executes a exclusive LDR instruction for 32 bit values.
MikamiUitOpen 16:cbb726ac20d8 246
MikamiUitOpen 16:cbb726ac20d8 247 \param [in] ptr Pointer to data
MikamiUitOpen 16:cbb726ac20d8 248 \return value of type uint32_t at (*ptr)
MikamiUitOpen 16:cbb726ac20d8 249 */
MikamiUitOpen 16:cbb726ac20d8 250 #define __LDREXW(ptr) ((uint32_t ) __ldrex(ptr))
MikamiUitOpen 16:cbb726ac20d8 251
MikamiUitOpen 16:cbb726ac20d8 252
MikamiUitOpen 16:cbb726ac20d8 253 /** \brief STR Exclusive (8 bit)
MikamiUitOpen 16:cbb726ac20d8 254
MikamiUitOpen 16:cbb726ac20d8 255 This function executes a exclusive STR instruction for 8 bit values.
MikamiUitOpen 16:cbb726ac20d8 256
MikamiUitOpen 16:cbb726ac20d8 257 \param [in] value Value to store
MikamiUitOpen 16:cbb726ac20d8 258 \param [in] ptr Pointer to location
MikamiUitOpen 16:cbb726ac20d8 259 \return 0 Function succeeded
MikamiUitOpen 16:cbb726ac20d8 260 \return 1 Function failed
MikamiUitOpen 16:cbb726ac20d8 261 */
MikamiUitOpen 16:cbb726ac20d8 262 #define __STREXB(value, ptr) __strex(value, ptr)
MikamiUitOpen 16:cbb726ac20d8 263
MikamiUitOpen 16:cbb726ac20d8 264
MikamiUitOpen 16:cbb726ac20d8 265 /** \brief STR Exclusive (16 bit)
MikamiUitOpen 16:cbb726ac20d8 266
MikamiUitOpen 16:cbb726ac20d8 267 This function executes a exclusive STR instruction for 16 bit values.
MikamiUitOpen 16:cbb726ac20d8 268
MikamiUitOpen 16:cbb726ac20d8 269 \param [in] value Value to store
MikamiUitOpen 16:cbb726ac20d8 270 \param [in] ptr Pointer to location
MikamiUitOpen 16:cbb726ac20d8 271 \return 0 Function succeeded
MikamiUitOpen 16:cbb726ac20d8 272 \return 1 Function failed
MikamiUitOpen 16:cbb726ac20d8 273 */
MikamiUitOpen 16:cbb726ac20d8 274 #define __STREXH(value, ptr) __strex(value, ptr)
MikamiUitOpen 16:cbb726ac20d8 275
MikamiUitOpen 16:cbb726ac20d8 276
MikamiUitOpen 16:cbb726ac20d8 277 /** \brief STR Exclusive (32 bit)
MikamiUitOpen 16:cbb726ac20d8 278
MikamiUitOpen 16:cbb726ac20d8 279 This function executes a exclusive STR instruction for 32 bit values.
MikamiUitOpen 16:cbb726ac20d8 280
MikamiUitOpen 16:cbb726ac20d8 281 \param [in] value Value to store
MikamiUitOpen 16:cbb726ac20d8 282 \param [in] ptr Pointer to location
MikamiUitOpen 16:cbb726ac20d8 283 \return 0 Function succeeded
MikamiUitOpen 16:cbb726ac20d8 284 \return 1 Function failed
MikamiUitOpen 16:cbb726ac20d8 285 */
MikamiUitOpen 16:cbb726ac20d8 286 #define __STREXW(value, ptr) __strex(value, ptr)
MikamiUitOpen 16:cbb726ac20d8 287
MikamiUitOpen 16:cbb726ac20d8 288
MikamiUitOpen 16:cbb726ac20d8 289 /** \brief Remove the exclusive lock
MikamiUitOpen 16:cbb726ac20d8 290
MikamiUitOpen 16:cbb726ac20d8 291 This function removes the exclusive lock which is created by LDREX.
MikamiUitOpen 16:cbb726ac20d8 292
MikamiUitOpen 16:cbb726ac20d8 293 */
MikamiUitOpen 16:cbb726ac20d8 294 #define __CLREX __clrex
MikamiUitOpen 16:cbb726ac20d8 295
MikamiUitOpen 16:cbb726ac20d8 296
MikamiUitOpen 16:cbb726ac20d8 297 /** \brief Signed Saturate
MikamiUitOpen 16:cbb726ac20d8 298
MikamiUitOpen 16:cbb726ac20d8 299 This function saturates a signed value.
MikamiUitOpen 16:cbb726ac20d8 300
MikamiUitOpen 16:cbb726ac20d8 301 \param [in] value Value to be saturated
MikamiUitOpen 16:cbb726ac20d8 302 \param [in] sat Bit position to saturate to (1..32)
MikamiUitOpen 16:cbb726ac20d8 303 \return Saturated value
MikamiUitOpen 16:cbb726ac20d8 304 */
MikamiUitOpen 16:cbb726ac20d8 305 #define __SSAT __ssat
MikamiUitOpen 16:cbb726ac20d8 306
MikamiUitOpen 16:cbb726ac20d8 307
MikamiUitOpen 16:cbb726ac20d8 308 /** \brief Unsigned Saturate
MikamiUitOpen 16:cbb726ac20d8 309
MikamiUitOpen 16:cbb726ac20d8 310 This function saturates an unsigned value.
MikamiUitOpen 16:cbb726ac20d8 311
MikamiUitOpen 16:cbb726ac20d8 312 \param [in] value Value to be saturated
MikamiUitOpen 16:cbb726ac20d8 313 \param [in] sat Bit position to saturate to (0..31)
MikamiUitOpen 16:cbb726ac20d8 314 \return Saturated value
MikamiUitOpen 16:cbb726ac20d8 315 */
MikamiUitOpen 16:cbb726ac20d8 316 #define __USAT __usat
MikamiUitOpen 16:cbb726ac20d8 317
MikamiUitOpen 16:cbb726ac20d8 318
MikamiUitOpen 16:cbb726ac20d8 319 /** \brief Rotate Right with Extend (32 bit)
MikamiUitOpen 16:cbb726ac20d8 320
MikamiUitOpen 16:cbb726ac20d8 321 This function moves each bit of a bitstring right by one bit.
MikamiUitOpen 16:cbb726ac20d8 322 The carry input is shifted in at the left end of the bitstring.
MikamiUitOpen 16:cbb726ac20d8 323
MikamiUitOpen 16:cbb726ac20d8 324 \param [in] value Value to rotate
MikamiUitOpen 16:cbb726ac20d8 325 \return Rotated value
MikamiUitOpen 16:cbb726ac20d8 326 */
MikamiUitOpen 16:cbb726ac20d8 327 #ifndef __NO_EMBEDDED_ASM
MikamiUitOpen 16:cbb726ac20d8 328 __attribute__((section(".rrx_text"))) __STATIC_INLINE __ASM uint32_t __RRX(uint32_t value)
MikamiUitOpen 16:cbb726ac20d8 329 {
MikamiUitOpen 16:cbb726ac20d8 330 rrx r0, r0
MikamiUitOpen 16:cbb726ac20d8 331 bx lr
MikamiUitOpen 16:cbb726ac20d8 332 }
MikamiUitOpen 16:cbb726ac20d8 333 #endif
MikamiUitOpen 16:cbb726ac20d8 334
MikamiUitOpen 16:cbb726ac20d8 335
MikamiUitOpen 16:cbb726ac20d8 336 /** \brief LDRT Unprivileged (8 bit)
MikamiUitOpen 16:cbb726ac20d8 337
MikamiUitOpen 16:cbb726ac20d8 338 This function executes a Unprivileged LDRT instruction for 8 bit value.
MikamiUitOpen 16:cbb726ac20d8 339
MikamiUitOpen 16:cbb726ac20d8 340 \param [in] ptr Pointer to data
MikamiUitOpen 16:cbb726ac20d8 341 \return value of type uint8_t at (*ptr)
MikamiUitOpen 16:cbb726ac20d8 342 */
MikamiUitOpen 16:cbb726ac20d8 343 #define __LDRBT(ptr) ((uint8_t ) __ldrt(ptr))
MikamiUitOpen 16:cbb726ac20d8 344
MikamiUitOpen 16:cbb726ac20d8 345
MikamiUitOpen 16:cbb726ac20d8 346 /** \brief LDRT Unprivileged (16 bit)
MikamiUitOpen 16:cbb726ac20d8 347
MikamiUitOpen 16:cbb726ac20d8 348 This function executes a Unprivileged LDRT instruction for 16 bit values.
MikamiUitOpen 16:cbb726ac20d8 349
MikamiUitOpen 16:cbb726ac20d8 350 \param [in] ptr Pointer to data
MikamiUitOpen 16:cbb726ac20d8 351 \return value of type uint16_t at (*ptr)
MikamiUitOpen 16:cbb726ac20d8 352 */
MikamiUitOpen 16:cbb726ac20d8 353 #define __LDRHT(ptr) ((uint16_t) __ldrt(ptr))
MikamiUitOpen 16:cbb726ac20d8 354
MikamiUitOpen 16:cbb726ac20d8 355
MikamiUitOpen 16:cbb726ac20d8 356 /** \brief LDRT Unprivileged (32 bit)
MikamiUitOpen 16:cbb726ac20d8 357
MikamiUitOpen 16:cbb726ac20d8 358 This function executes a Unprivileged LDRT instruction for 32 bit values.
MikamiUitOpen 16:cbb726ac20d8 359
MikamiUitOpen 16:cbb726ac20d8 360 \param [in] ptr Pointer to data
MikamiUitOpen 16:cbb726ac20d8 361 \return value of type uint32_t at (*ptr)
MikamiUitOpen 16:cbb726ac20d8 362 */
MikamiUitOpen 16:cbb726ac20d8 363 #define __LDRT(ptr) ((uint32_t ) __ldrt(ptr))
MikamiUitOpen 16:cbb726ac20d8 364
MikamiUitOpen 16:cbb726ac20d8 365
MikamiUitOpen 16:cbb726ac20d8 366 /** \brief STRT Unprivileged (8 bit)
MikamiUitOpen 16:cbb726ac20d8 367
MikamiUitOpen 16:cbb726ac20d8 368 This function executes a Unprivileged STRT instruction for 8 bit values.
MikamiUitOpen 16:cbb726ac20d8 369
MikamiUitOpen 16:cbb726ac20d8 370 \param [in] value Value to store
MikamiUitOpen 16:cbb726ac20d8 371 \param [in] ptr Pointer to location
MikamiUitOpen 16:cbb726ac20d8 372 */
MikamiUitOpen 16:cbb726ac20d8 373 #define __STRBT(value, ptr) __strt(value, ptr)
MikamiUitOpen 16:cbb726ac20d8 374
MikamiUitOpen 16:cbb726ac20d8 375
MikamiUitOpen 16:cbb726ac20d8 376 /** \brief STRT Unprivileged (16 bit)
MikamiUitOpen 16:cbb726ac20d8 377
MikamiUitOpen 16:cbb726ac20d8 378 This function executes a Unprivileged STRT instruction for 16 bit values.
MikamiUitOpen 16:cbb726ac20d8 379
MikamiUitOpen 16:cbb726ac20d8 380 \param [in] value Value to store
MikamiUitOpen 16:cbb726ac20d8 381 \param [in] ptr Pointer to location
MikamiUitOpen 16:cbb726ac20d8 382 */
MikamiUitOpen 16:cbb726ac20d8 383 #define __STRHT(value, ptr) __strt(value, ptr)
MikamiUitOpen 16:cbb726ac20d8 384
MikamiUitOpen 16:cbb726ac20d8 385
MikamiUitOpen 16:cbb726ac20d8 386 /** \brief STRT Unprivileged (32 bit)
MikamiUitOpen 16:cbb726ac20d8 387
MikamiUitOpen 16:cbb726ac20d8 388 This function executes a Unprivileged STRT instruction for 32 bit values.
MikamiUitOpen 16:cbb726ac20d8 389
MikamiUitOpen 16:cbb726ac20d8 390 \param [in] value Value to store
MikamiUitOpen 16:cbb726ac20d8 391 \param [in] ptr Pointer to location
MikamiUitOpen 16:cbb726ac20d8 392 */
MikamiUitOpen 16:cbb726ac20d8 393 #define __STRT(value, ptr) __strt(value, ptr)
MikamiUitOpen 16:cbb726ac20d8 394
MikamiUitOpen 16:cbb726ac20d8 395 #endif /* (__CORTEX_M >= 0x03) || (__CORTEX_SC >= 300) */
MikamiUitOpen 16:cbb726ac20d8 396
MikamiUitOpen 16:cbb726ac20d8 397
MikamiUitOpen 16:cbb726ac20d8 398 #elif defined ( __GNUC__ ) /*------------------ GNU Compiler ---------------------*/
MikamiUitOpen 16:cbb726ac20d8 399 /* GNU gcc specific functions */
MikamiUitOpen 16:cbb726ac20d8 400
MikamiUitOpen 16:cbb726ac20d8 401 /* Define macros for porting to both thumb1 and thumb2.
MikamiUitOpen 16:cbb726ac20d8 402 * For thumb1, use low register (r0-r7), specified by constrant "l"
MikamiUitOpen 16:cbb726ac20d8 403 * Otherwise, use general registers, specified by constrant "r" */
MikamiUitOpen 16:cbb726ac20d8 404 #if defined (__thumb__) && !defined (__thumb2__)
MikamiUitOpen 16:cbb726ac20d8 405 #define __CMSIS_GCC_OUT_REG(r) "=l" (r)
MikamiUitOpen 16:cbb726ac20d8 406 #define __CMSIS_GCC_USE_REG(r) "l" (r)
MikamiUitOpen 16:cbb726ac20d8 407 #else
MikamiUitOpen 16:cbb726ac20d8 408 #define __CMSIS_GCC_OUT_REG(r) "=r" (r)
MikamiUitOpen 16:cbb726ac20d8 409 #define __CMSIS_GCC_USE_REG(r) "r" (r)
MikamiUitOpen 16:cbb726ac20d8 410 #endif
MikamiUitOpen 16:cbb726ac20d8 411
MikamiUitOpen 16:cbb726ac20d8 412 /** \brief No Operation
MikamiUitOpen 16:cbb726ac20d8 413
MikamiUitOpen 16:cbb726ac20d8 414 No Operation does nothing. This instruction can be used for code alignment purposes.
MikamiUitOpen 16:cbb726ac20d8 415 */
MikamiUitOpen 16:cbb726ac20d8 416 __attribute__((always_inline)) __STATIC_INLINE void __NOP(void)
MikamiUitOpen 16:cbb726ac20d8 417 {
MikamiUitOpen 16:cbb726ac20d8 418 __ASM volatile ("nop");
MikamiUitOpen 16:cbb726ac20d8 419 }
MikamiUitOpen 16:cbb726ac20d8 420
MikamiUitOpen 16:cbb726ac20d8 421
MikamiUitOpen 16:cbb726ac20d8 422 /** \brief Wait For Interrupt
MikamiUitOpen 16:cbb726ac20d8 423
MikamiUitOpen 16:cbb726ac20d8 424 Wait For Interrupt is a hint instruction that suspends execution
MikamiUitOpen 16:cbb726ac20d8 425 until one of a number of events occurs.
MikamiUitOpen 16:cbb726ac20d8 426 */
MikamiUitOpen 16:cbb726ac20d8 427 __attribute__((always_inline)) __STATIC_INLINE void __WFI(void)
MikamiUitOpen 16:cbb726ac20d8 428 {
MikamiUitOpen 16:cbb726ac20d8 429 __ASM volatile ("wfi");
MikamiUitOpen 16:cbb726ac20d8 430 }
MikamiUitOpen 16:cbb726ac20d8 431
MikamiUitOpen 16:cbb726ac20d8 432
MikamiUitOpen 16:cbb726ac20d8 433 /** \brief Wait For Event
MikamiUitOpen 16:cbb726ac20d8 434
MikamiUitOpen 16:cbb726ac20d8 435 Wait For Event is a hint instruction that permits the processor to enter
MikamiUitOpen 16:cbb726ac20d8 436 a low-power state until one of a number of events occurs.
MikamiUitOpen 16:cbb726ac20d8 437 */
MikamiUitOpen 16:cbb726ac20d8 438 __attribute__((always_inline)) __STATIC_INLINE void __WFE(void)
MikamiUitOpen 16:cbb726ac20d8 439 {
MikamiUitOpen 16:cbb726ac20d8 440 __ASM volatile ("wfe");
MikamiUitOpen 16:cbb726ac20d8 441 }
MikamiUitOpen 16:cbb726ac20d8 442
MikamiUitOpen 16:cbb726ac20d8 443
MikamiUitOpen 16:cbb726ac20d8 444 /** \brief Send Event
MikamiUitOpen 16:cbb726ac20d8 445
MikamiUitOpen 16:cbb726ac20d8 446 Send Event is a hint instruction. It causes an event to be signaled to the CPU.
MikamiUitOpen 16:cbb726ac20d8 447 */
MikamiUitOpen 16:cbb726ac20d8 448 __attribute__((always_inline)) __STATIC_INLINE void __SEV(void)
MikamiUitOpen 16:cbb726ac20d8 449 {
MikamiUitOpen 16:cbb726ac20d8 450 __ASM volatile ("sev");
MikamiUitOpen 16:cbb726ac20d8 451 }
MikamiUitOpen 16:cbb726ac20d8 452
MikamiUitOpen 16:cbb726ac20d8 453
MikamiUitOpen 16:cbb726ac20d8 454 /** \brief Instruction Synchronization Barrier
MikamiUitOpen 16:cbb726ac20d8 455
MikamiUitOpen 16:cbb726ac20d8 456 Instruction Synchronization Barrier flushes the pipeline in the processor,
MikamiUitOpen 16:cbb726ac20d8 457 so that all instructions following the ISB are fetched from cache or
MikamiUitOpen 16:cbb726ac20d8 458 memory, after the instruction has been completed.
MikamiUitOpen 16:cbb726ac20d8 459 */
MikamiUitOpen 16:cbb726ac20d8 460 __attribute__((always_inline)) __STATIC_INLINE void __ISB(void)
MikamiUitOpen 16:cbb726ac20d8 461 {
MikamiUitOpen 16:cbb726ac20d8 462 __ASM volatile ("isb 0xF":::"memory");
MikamiUitOpen 16:cbb726ac20d8 463 }
MikamiUitOpen 16:cbb726ac20d8 464
MikamiUitOpen 16:cbb726ac20d8 465
MikamiUitOpen 16:cbb726ac20d8 466 /** \brief Data Synchronization Barrier
MikamiUitOpen 16:cbb726ac20d8 467
MikamiUitOpen 16:cbb726ac20d8 468 This function acts as a special kind of Data Memory Barrier.
MikamiUitOpen 16:cbb726ac20d8 469 It completes when all explicit memory accesses before this instruction complete.
MikamiUitOpen 16:cbb726ac20d8 470 */
MikamiUitOpen 16:cbb726ac20d8 471 __attribute__((always_inline)) __STATIC_INLINE void __DSB(void)
MikamiUitOpen 16:cbb726ac20d8 472 {
MikamiUitOpen 16:cbb726ac20d8 473 __ASM volatile ("dsb 0xF":::"memory");
MikamiUitOpen 16:cbb726ac20d8 474 }
MikamiUitOpen 16:cbb726ac20d8 475
MikamiUitOpen 16:cbb726ac20d8 476
MikamiUitOpen 16:cbb726ac20d8 477 /** \brief Data Memory Barrier
MikamiUitOpen 16:cbb726ac20d8 478
MikamiUitOpen 16:cbb726ac20d8 479 This function ensures the apparent order of the explicit memory operations before
MikamiUitOpen 16:cbb726ac20d8 480 and after the instruction, without ensuring their completion.
MikamiUitOpen 16:cbb726ac20d8 481 */
MikamiUitOpen 16:cbb726ac20d8 482 __attribute__((always_inline)) __STATIC_INLINE void __DMB(void)
MikamiUitOpen 16:cbb726ac20d8 483 {
MikamiUitOpen 16:cbb726ac20d8 484 __ASM volatile ("dmb 0xF":::"memory");
MikamiUitOpen 16:cbb726ac20d8 485 }
MikamiUitOpen 16:cbb726ac20d8 486
MikamiUitOpen 16:cbb726ac20d8 487
MikamiUitOpen 16:cbb726ac20d8 488 /** \brief Reverse byte order (32 bit)
MikamiUitOpen 16:cbb726ac20d8 489
MikamiUitOpen 16:cbb726ac20d8 490 This function reverses the byte order in integer value.
MikamiUitOpen 16:cbb726ac20d8 491
MikamiUitOpen 16:cbb726ac20d8 492 \param [in] value Value to reverse
MikamiUitOpen 16:cbb726ac20d8 493 \return Reversed value
MikamiUitOpen 16:cbb726ac20d8 494 */
MikamiUitOpen 16:cbb726ac20d8 495 __attribute__((always_inline)) __STATIC_INLINE uint32_t __REV(uint32_t value)
MikamiUitOpen 16:cbb726ac20d8 496 {
MikamiUitOpen 16:cbb726ac20d8 497 #if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 5)
MikamiUitOpen 16:cbb726ac20d8 498 return __builtin_bswap32(value);
MikamiUitOpen 16:cbb726ac20d8 499 #else
MikamiUitOpen 16:cbb726ac20d8 500 uint32_t result;
MikamiUitOpen 16:cbb726ac20d8 501
MikamiUitOpen 16:cbb726ac20d8 502 __ASM volatile ("rev %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) );
MikamiUitOpen 16:cbb726ac20d8 503 return(result);
MikamiUitOpen 16:cbb726ac20d8 504 #endif
MikamiUitOpen 16:cbb726ac20d8 505 }
MikamiUitOpen 16:cbb726ac20d8 506
MikamiUitOpen 16:cbb726ac20d8 507
MikamiUitOpen 16:cbb726ac20d8 508 /** \brief Reverse byte order (16 bit)
MikamiUitOpen 16:cbb726ac20d8 509
MikamiUitOpen 16:cbb726ac20d8 510 This function reverses the byte order in two unsigned short values.
MikamiUitOpen 16:cbb726ac20d8 511
MikamiUitOpen 16:cbb726ac20d8 512 \param [in] value Value to reverse
MikamiUitOpen 16:cbb726ac20d8 513 \return Reversed value
MikamiUitOpen 16:cbb726ac20d8 514 */
MikamiUitOpen 16:cbb726ac20d8 515 __attribute__((always_inline)) __STATIC_INLINE uint32_t __REV16(uint32_t value)
MikamiUitOpen 16:cbb726ac20d8 516 {
MikamiUitOpen 16:cbb726ac20d8 517 uint32_t result;
MikamiUitOpen 16:cbb726ac20d8 518
MikamiUitOpen 16:cbb726ac20d8 519 __ASM volatile ("rev16 %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) );
MikamiUitOpen 16:cbb726ac20d8 520 return(result);
MikamiUitOpen 16:cbb726ac20d8 521 }
MikamiUitOpen 16:cbb726ac20d8 522
MikamiUitOpen 16:cbb726ac20d8 523
MikamiUitOpen 16:cbb726ac20d8 524 /** \brief Reverse byte order in signed short value
MikamiUitOpen 16:cbb726ac20d8 525
MikamiUitOpen 16:cbb726ac20d8 526 This function reverses the byte order in a signed short value with sign extension to integer.
MikamiUitOpen 16:cbb726ac20d8 527
MikamiUitOpen 16:cbb726ac20d8 528 \param [in] value Value to reverse
MikamiUitOpen 16:cbb726ac20d8 529 \return Reversed value
MikamiUitOpen 16:cbb726ac20d8 530 */
MikamiUitOpen 16:cbb726ac20d8 531 __attribute__((always_inline)) __STATIC_INLINE int32_t __REVSH(int32_t value)
MikamiUitOpen 16:cbb726ac20d8 532 {
MikamiUitOpen 16:cbb726ac20d8 533 #if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 8)
MikamiUitOpen 16:cbb726ac20d8 534 return (short)__builtin_bswap16(value);
MikamiUitOpen 16:cbb726ac20d8 535 #else
MikamiUitOpen 16:cbb726ac20d8 536 uint32_t result;
MikamiUitOpen 16:cbb726ac20d8 537
MikamiUitOpen 16:cbb726ac20d8 538 __ASM volatile ("revsh %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) );
MikamiUitOpen 16:cbb726ac20d8 539 return(result);
MikamiUitOpen 16:cbb726ac20d8 540 #endif
MikamiUitOpen 16:cbb726ac20d8 541 }
MikamiUitOpen 16:cbb726ac20d8 542
MikamiUitOpen 16:cbb726ac20d8 543
MikamiUitOpen 16:cbb726ac20d8 544 /** \brief Rotate Right in unsigned value (32 bit)
MikamiUitOpen 16:cbb726ac20d8 545
MikamiUitOpen 16:cbb726ac20d8 546 This function Rotate Right (immediate) provides the value of the contents of a register rotated by a variable number of bits.
MikamiUitOpen 16:cbb726ac20d8 547
MikamiUitOpen 16:cbb726ac20d8 548 \param [in] value Value to rotate
MikamiUitOpen 16:cbb726ac20d8 549 \param [in] value Number of Bits to rotate
MikamiUitOpen 16:cbb726ac20d8 550 \return Rotated value
MikamiUitOpen 16:cbb726ac20d8 551 */
MikamiUitOpen 16:cbb726ac20d8 552 __attribute__((always_inline)) __STATIC_INLINE uint32_t __ROR(uint32_t op1, uint32_t op2)
MikamiUitOpen 16:cbb726ac20d8 553 {
MikamiUitOpen 16:cbb726ac20d8 554 return (op1 >> op2) | (op1 << (32 - op2));
MikamiUitOpen 16:cbb726ac20d8 555 }
MikamiUitOpen 16:cbb726ac20d8 556
MikamiUitOpen 16:cbb726ac20d8 557
MikamiUitOpen 16:cbb726ac20d8 558 /** \brief Breakpoint
MikamiUitOpen 16:cbb726ac20d8 559
MikamiUitOpen 16:cbb726ac20d8 560 This function causes the processor to enter Debug state.
MikamiUitOpen 16:cbb726ac20d8 561 Debug tools can use this to investigate system state when the instruction at a particular address is reached.
MikamiUitOpen 16:cbb726ac20d8 562
MikamiUitOpen 16:cbb726ac20d8 563 \param [in] value is ignored by the processor.
MikamiUitOpen 16:cbb726ac20d8 564 If required, a debugger can use it to store additional information about the breakpoint.
MikamiUitOpen 16:cbb726ac20d8 565 */
MikamiUitOpen 16:cbb726ac20d8 566 #define __BKPT(value) __ASM volatile ("bkpt "#value)
MikamiUitOpen 16:cbb726ac20d8 567
MikamiUitOpen 16:cbb726ac20d8 568
MikamiUitOpen 16:cbb726ac20d8 569 /** \brief Reverse bit order of value
MikamiUitOpen 16:cbb726ac20d8 570
MikamiUitOpen 16:cbb726ac20d8 571 This function reverses the bit order of the given value.
MikamiUitOpen 16:cbb726ac20d8 572
MikamiUitOpen 16:cbb726ac20d8 573 \param [in] value Value to reverse
MikamiUitOpen 16:cbb726ac20d8 574 \return Reversed value
MikamiUitOpen 16:cbb726ac20d8 575 */
MikamiUitOpen 16:cbb726ac20d8 576 __attribute__((always_inline)) __STATIC_INLINE uint32_t __RBIT(uint32_t value)
MikamiUitOpen 16:cbb726ac20d8 577 {
MikamiUitOpen 16:cbb726ac20d8 578 uint32_t result;
MikamiUitOpen 16:cbb726ac20d8 579
MikamiUitOpen 16:cbb726ac20d8 580 #if (__CORTEX_M >= 0x03) || (__CORTEX_SC >= 300)
MikamiUitOpen 16:cbb726ac20d8 581 __ASM volatile ("rbit %0, %1" : "=r" (result) : "r" (value) );
MikamiUitOpen 16:cbb726ac20d8 582 #else
MikamiUitOpen 16:cbb726ac20d8 583 int32_t s = 4 /*sizeof(v)*/ * 8 - 1; // extra shift needed at end
MikamiUitOpen 16:cbb726ac20d8 584
MikamiUitOpen 16:cbb726ac20d8 585 result = value; // r will be reversed bits of v; first get LSB of v
MikamiUitOpen 16:cbb726ac20d8 586 for (value >>= 1; value; value >>= 1)
MikamiUitOpen 16:cbb726ac20d8 587 {
MikamiUitOpen 16:cbb726ac20d8 588 result <<= 1;
MikamiUitOpen 16:cbb726ac20d8 589 result |= value & 1;
MikamiUitOpen 16:cbb726ac20d8 590 s--;
MikamiUitOpen 16:cbb726ac20d8 591 }
MikamiUitOpen 16:cbb726ac20d8 592 result <<= s; // shift when v's highest bits are zero
MikamiUitOpen 16:cbb726ac20d8 593 #endif
MikamiUitOpen 16:cbb726ac20d8 594 return(result);
MikamiUitOpen 16:cbb726ac20d8 595 }
MikamiUitOpen 16:cbb726ac20d8 596
MikamiUitOpen 16:cbb726ac20d8 597
MikamiUitOpen 16:cbb726ac20d8 598 /** \brief Count leading zeros
MikamiUitOpen 16:cbb726ac20d8 599
MikamiUitOpen 16:cbb726ac20d8 600 This function counts the number of leading zeros of a data value.
MikamiUitOpen 16:cbb726ac20d8 601
MikamiUitOpen 16:cbb726ac20d8 602 \param [in] value Value to count the leading zeros
MikamiUitOpen 16:cbb726ac20d8 603 \return number of leading zeros in value
MikamiUitOpen 16:cbb726ac20d8 604 */
MikamiUitOpen 16:cbb726ac20d8 605 #define __CLZ __builtin_clz
MikamiUitOpen 16:cbb726ac20d8 606
MikamiUitOpen 16:cbb726ac20d8 607
MikamiUitOpen 16:cbb726ac20d8 608 #if (__CORTEX_M >= 0x03) || (__CORTEX_SC >= 300)
MikamiUitOpen 16:cbb726ac20d8 609
MikamiUitOpen 16:cbb726ac20d8 610 /** \brief LDR Exclusive (8 bit)
MikamiUitOpen 16:cbb726ac20d8 611
MikamiUitOpen 16:cbb726ac20d8 612 This function executes a exclusive LDR instruction for 8 bit value.
MikamiUitOpen 16:cbb726ac20d8 613
MikamiUitOpen 16:cbb726ac20d8 614 \param [in] ptr Pointer to data
MikamiUitOpen 16:cbb726ac20d8 615 \return value of type uint8_t at (*ptr)
MikamiUitOpen 16:cbb726ac20d8 616 */
MikamiUitOpen 16:cbb726ac20d8 617 __attribute__((always_inline)) __STATIC_INLINE uint8_t __LDREXB(volatile uint8_t *addr)
MikamiUitOpen 16:cbb726ac20d8 618 {
MikamiUitOpen 16:cbb726ac20d8 619 uint32_t result;
MikamiUitOpen 16:cbb726ac20d8 620
MikamiUitOpen 16:cbb726ac20d8 621 #if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 8)
MikamiUitOpen 16:cbb726ac20d8 622 __ASM volatile ("ldrexb %0, %1" : "=r" (result) : "Q" (*addr) );
MikamiUitOpen 16:cbb726ac20d8 623 #else
MikamiUitOpen 16:cbb726ac20d8 624 /* Prior to GCC 4.8, "Q" will be expanded to [rx, #0] which is not
MikamiUitOpen 16:cbb726ac20d8 625 accepted by assembler. So has to use following less efficient pattern.
MikamiUitOpen 16:cbb726ac20d8 626 */
MikamiUitOpen 16:cbb726ac20d8 627 __ASM volatile ("ldrexb %0, [%1]" : "=r" (result) : "r" (addr) : "memory" );
MikamiUitOpen 16:cbb726ac20d8 628 #endif
MikamiUitOpen 16:cbb726ac20d8 629 return ((uint8_t) result); /* Add explicit type cast here */
MikamiUitOpen 16:cbb726ac20d8 630 }
MikamiUitOpen 16:cbb726ac20d8 631
MikamiUitOpen 16:cbb726ac20d8 632
MikamiUitOpen 16:cbb726ac20d8 633 /** \brief LDR Exclusive (16 bit)
MikamiUitOpen 16:cbb726ac20d8 634
MikamiUitOpen 16:cbb726ac20d8 635 This function executes a exclusive LDR instruction for 16 bit values.
MikamiUitOpen 16:cbb726ac20d8 636
MikamiUitOpen 16:cbb726ac20d8 637 \param [in] ptr Pointer to data
MikamiUitOpen 16:cbb726ac20d8 638 \return value of type uint16_t at (*ptr)
MikamiUitOpen 16:cbb726ac20d8 639 */
MikamiUitOpen 16:cbb726ac20d8 640 __attribute__((always_inline)) __STATIC_INLINE uint16_t __LDREXH(volatile uint16_t *addr)
MikamiUitOpen 16:cbb726ac20d8 641 {
MikamiUitOpen 16:cbb726ac20d8 642 uint32_t result;
MikamiUitOpen 16:cbb726ac20d8 643
MikamiUitOpen 16:cbb726ac20d8 644 #if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 8)
MikamiUitOpen 16:cbb726ac20d8 645 __ASM volatile ("ldrexh %0, %1" : "=r" (result) : "Q" (*addr) );
MikamiUitOpen 16:cbb726ac20d8 646 #else
MikamiUitOpen 16:cbb726ac20d8 647 /* Prior to GCC 4.8, "Q" will be expanded to [rx, #0] which is not
MikamiUitOpen 16:cbb726ac20d8 648 accepted by assembler. So has to use following less efficient pattern.
MikamiUitOpen 16:cbb726ac20d8 649 */
MikamiUitOpen 16:cbb726ac20d8 650 __ASM volatile ("ldrexh %0, [%1]" : "=r" (result) : "r" (addr) : "memory" );
MikamiUitOpen 16:cbb726ac20d8 651 #endif
MikamiUitOpen 16:cbb726ac20d8 652 return ((uint16_t) result); /* Add explicit type cast here */
MikamiUitOpen 16:cbb726ac20d8 653 }
MikamiUitOpen 16:cbb726ac20d8 654
MikamiUitOpen 16:cbb726ac20d8 655
MikamiUitOpen 16:cbb726ac20d8 656 /** \brief LDR Exclusive (32 bit)
MikamiUitOpen 16:cbb726ac20d8 657
MikamiUitOpen 16:cbb726ac20d8 658 This function executes a exclusive LDR instruction for 32 bit values.
MikamiUitOpen 16:cbb726ac20d8 659
MikamiUitOpen 16:cbb726ac20d8 660 \param [in] ptr Pointer to data
MikamiUitOpen 16:cbb726ac20d8 661 \return value of type uint32_t at (*ptr)
MikamiUitOpen 16:cbb726ac20d8 662 */
MikamiUitOpen 16:cbb726ac20d8 663 __attribute__((always_inline)) __STATIC_INLINE uint32_t __LDREXW(volatile uint32_t *addr)
MikamiUitOpen 16:cbb726ac20d8 664 {
MikamiUitOpen 16:cbb726ac20d8 665 uint32_t result;
MikamiUitOpen 16:cbb726ac20d8 666
MikamiUitOpen 16:cbb726ac20d8 667 __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
MikamiUitOpen 16:cbb726ac20d8 668 return(result);
MikamiUitOpen 16:cbb726ac20d8 669 }
MikamiUitOpen 16:cbb726ac20d8 670
MikamiUitOpen 16:cbb726ac20d8 671
MikamiUitOpen 16:cbb726ac20d8 672 /** \brief STR Exclusive (8 bit)
MikamiUitOpen 16:cbb726ac20d8 673
MikamiUitOpen 16:cbb726ac20d8 674 This function executes a exclusive STR instruction for 8 bit values.
MikamiUitOpen 16:cbb726ac20d8 675
MikamiUitOpen 16:cbb726ac20d8 676 \param [in] value Value to store
MikamiUitOpen 16:cbb726ac20d8 677 \param [in] ptr Pointer to location
MikamiUitOpen 16:cbb726ac20d8 678 \return 0 Function succeeded
MikamiUitOpen 16:cbb726ac20d8 679 \return 1 Function failed
MikamiUitOpen 16:cbb726ac20d8 680 */
MikamiUitOpen 16:cbb726ac20d8 681 __attribute__((always_inline)) __STATIC_INLINE uint32_t __STREXB(uint8_t value, volatile uint8_t *addr)
MikamiUitOpen 16:cbb726ac20d8 682 {
MikamiUitOpen 16:cbb726ac20d8 683 uint32_t result;
MikamiUitOpen 16:cbb726ac20d8 684
MikamiUitOpen 16:cbb726ac20d8 685 __ASM volatile ("strexb %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" ((uint32_t)value) );
MikamiUitOpen 16:cbb726ac20d8 686 return(result);
MikamiUitOpen 16:cbb726ac20d8 687 }
MikamiUitOpen 16:cbb726ac20d8 688
MikamiUitOpen 16:cbb726ac20d8 689
MikamiUitOpen 16:cbb726ac20d8 690 /** \brief STR Exclusive (16 bit)
MikamiUitOpen 16:cbb726ac20d8 691
MikamiUitOpen 16:cbb726ac20d8 692 This function executes a exclusive STR instruction for 16 bit values.
MikamiUitOpen 16:cbb726ac20d8 693
MikamiUitOpen 16:cbb726ac20d8 694 \param [in] value Value to store
MikamiUitOpen 16:cbb726ac20d8 695 \param [in] ptr Pointer to location
MikamiUitOpen 16:cbb726ac20d8 696 \return 0 Function succeeded
MikamiUitOpen 16:cbb726ac20d8 697 \return 1 Function failed
MikamiUitOpen 16:cbb726ac20d8 698 */
MikamiUitOpen 16:cbb726ac20d8 699 __attribute__((always_inline)) __STATIC_INLINE uint32_t __STREXH(uint16_t value, volatile uint16_t *addr)
MikamiUitOpen 16:cbb726ac20d8 700 {
MikamiUitOpen 16:cbb726ac20d8 701 uint32_t result;
MikamiUitOpen 16:cbb726ac20d8 702
MikamiUitOpen 16:cbb726ac20d8 703 __ASM volatile ("strexh %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" ((uint32_t)value) );
MikamiUitOpen 16:cbb726ac20d8 704 return(result);
MikamiUitOpen 16:cbb726ac20d8 705 }
MikamiUitOpen 16:cbb726ac20d8 706
MikamiUitOpen 16:cbb726ac20d8 707
MikamiUitOpen 16:cbb726ac20d8 708 /** \brief STR Exclusive (32 bit)
MikamiUitOpen 16:cbb726ac20d8 709
MikamiUitOpen 16:cbb726ac20d8 710 This function executes a exclusive STR instruction for 32 bit values.
MikamiUitOpen 16:cbb726ac20d8 711
MikamiUitOpen 16:cbb726ac20d8 712 \param [in] value Value to store
MikamiUitOpen 16:cbb726ac20d8 713 \param [in] ptr Pointer to location
MikamiUitOpen 16:cbb726ac20d8 714 \return 0 Function succeeded
MikamiUitOpen 16:cbb726ac20d8 715 \return 1 Function failed
MikamiUitOpen 16:cbb726ac20d8 716 */
MikamiUitOpen 16:cbb726ac20d8 717 __attribute__((always_inline)) __STATIC_INLINE uint32_t __STREXW(uint32_t value, volatile uint32_t *addr)
MikamiUitOpen 16:cbb726ac20d8 718 {
MikamiUitOpen 16:cbb726ac20d8 719 uint32_t result;
MikamiUitOpen 16:cbb726ac20d8 720
MikamiUitOpen 16:cbb726ac20d8 721 __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
MikamiUitOpen 16:cbb726ac20d8 722 return(result);
MikamiUitOpen 16:cbb726ac20d8 723 }
MikamiUitOpen 16:cbb726ac20d8 724
MikamiUitOpen 16:cbb726ac20d8 725
MikamiUitOpen 16:cbb726ac20d8 726 /** \brief Remove the exclusive lock
MikamiUitOpen 16:cbb726ac20d8 727
MikamiUitOpen 16:cbb726ac20d8 728 This function removes the exclusive lock which is created by LDREX.
MikamiUitOpen 16:cbb726ac20d8 729
MikamiUitOpen 16:cbb726ac20d8 730 */
MikamiUitOpen 16:cbb726ac20d8 731 __attribute__((always_inline)) __STATIC_INLINE void __CLREX(void)
MikamiUitOpen 16:cbb726ac20d8 732 {
MikamiUitOpen 16:cbb726ac20d8 733 __ASM volatile ("clrex" ::: "memory");
MikamiUitOpen 16:cbb726ac20d8 734 }
MikamiUitOpen 16:cbb726ac20d8 735
MikamiUitOpen 16:cbb726ac20d8 736
MikamiUitOpen 16:cbb726ac20d8 737 /** \brief Signed Saturate
MikamiUitOpen 16:cbb726ac20d8 738
MikamiUitOpen 16:cbb726ac20d8 739 This function saturates a signed value.
MikamiUitOpen 16:cbb726ac20d8 740
MikamiUitOpen 16:cbb726ac20d8 741 \param [in] value Value to be saturated
MikamiUitOpen 16:cbb726ac20d8 742 \param [in] sat Bit position to saturate to (1..32)
MikamiUitOpen 16:cbb726ac20d8 743 \return Saturated value
MikamiUitOpen 16:cbb726ac20d8 744 */
MikamiUitOpen 16:cbb726ac20d8 745 #define __SSAT(ARG1,ARG2) \
MikamiUitOpen 16:cbb726ac20d8 746 ({ \
MikamiUitOpen 16:cbb726ac20d8 747 uint32_t __RES, __ARG1 = (ARG1); \
MikamiUitOpen 16:cbb726ac20d8 748 __ASM ("ssat %0, %1, %2" : "=r" (__RES) : "I" (ARG2), "r" (__ARG1) ); \
MikamiUitOpen 16:cbb726ac20d8 749 __RES; \
MikamiUitOpen 16:cbb726ac20d8 750 })
MikamiUitOpen 16:cbb726ac20d8 751
MikamiUitOpen 16:cbb726ac20d8 752
MikamiUitOpen 16:cbb726ac20d8 753 /** \brief Unsigned Saturate
MikamiUitOpen 16:cbb726ac20d8 754
MikamiUitOpen 16:cbb726ac20d8 755 This function saturates an unsigned value.
MikamiUitOpen 16:cbb726ac20d8 756
MikamiUitOpen 16:cbb726ac20d8 757 \param [in] value Value to be saturated
MikamiUitOpen 16:cbb726ac20d8 758 \param [in] sat Bit position to saturate to (0..31)
MikamiUitOpen 16:cbb726ac20d8 759 \return Saturated value
MikamiUitOpen 16:cbb726ac20d8 760 */
MikamiUitOpen 16:cbb726ac20d8 761 #define __USAT(ARG1,ARG2) \
MikamiUitOpen 16:cbb726ac20d8 762 ({ \
MikamiUitOpen 16:cbb726ac20d8 763 uint32_t __RES, __ARG1 = (ARG1); \
MikamiUitOpen 16:cbb726ac20d8 764 __ASM ("usat %0, %1, %2" : "=r" (__RES) : "I" (ARG2), "r" (__ARG1) ); \
MikamiUitOpen 16:cbb726ac20d8 765 __RES; \
MikamiUitOpen 16:cbb726ac20d8 766 })
MikamiUitOpen 16:cbb726ac20d8 767
MikamiUitOpen 16:cbb726ac20d8 768
MikamiUitOpen 16:cbb726ac20d8 769 /** \brief Rotate Right with Extend (32 bit)
MikamiUitOpen 16:cbb726ac20d8 770
MikamiUitOpen 16:cbb726ac20d8 771 This function moves each bit of a bitstring right by one bit.
MikamiUitOpen 16:cbb726ac20d8 772 The carry input is shifted in at the left end of the bitstring.
MikamiUitOpen 16:cbb726ac20d8 773
MikamiUitOpen 16:cbb726ac20d8 774 \param [in] value Value to rotate
MikamiUitOpen 16:cbb726ac20d8 775 \return Rotated value
MikamiUitOpen 16:cbb726ac20d8 776 */
MikamiUitOpen 16:cbb726ac20d8 777 __attribute__((always_inline)) __STATIC_INLINE uint32_t __RRX(uint32_t value)
MikamiUitOpen 16:cbb726ac20d8 778 {
MikamiUitOpen 16:cbb726ac20d8 779 uint32_t result;
MikamiUitOpen 16:cbb726ac20d8 780
MikamiUitOpen 16:cbb726ac20d8 781 __ASM volatile ("rrx %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) );
MikamiUitOpen 16:cbb726ac20d8 782 return(result);
MikamiUitOpen 16:cbb726ac20d8 783 }
MikamiUitOpen 16:cbb726ac20d8 784
MikamiUitOpen 16:cbb726ac20d8 785
MikamiUitOpen 16:cbb726ac20d8 786 /** \brief LDRT Unprivileged (8 bit)
MikamiUitOpen 16:cbb726ac20d8 787
MikamiUitOpen 16:cbb726ac20d8 788 This function executes a Unprivileged LDRT instruction for 8 bit value.
MikamiUitOpen 16:cbb726ac20d8 789
MikamiUitOpen 16:cbb726ac20d8 790 \param [in] ptr Pointer to data
MikamiUitOpen 16:cbb726ac20d8 791 \return value of type uint8_t at (*ptr)
MikamiUitOpen 16:cbb726ac20d8 792 */
MikamiUitOpen 16:cbb726ac20d8 793 __attribute__((always_inline)) __STATIC_INLINE uint8_t __LDRBT(volatile uint8_t *addr)
MikamiUitOpen 16:cbb726ac20d8 794 {
MikamiUitOpen 16:cbb726ac20d8 795 uint32_t result;
MikamiUitOpen 16:cbb726ac20d8 796
MikamiUitOpen 16:cbb726ac20d8 797 #if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 8)
MikamiUitOpen 16:cbb726ac20d8 798 __ASM volatile ("ldrbt %0, %1" : "=r" (result) : "Q" (*addr) );
MikamiUitOpen 16:cbb726ac20d8 799 #else
MikamiUitOpen 16:cbb726ac20d8 800 /* Prior to GCC 4.8, "Q" will be expanded to [rx, #0] which is not
MikamiUitOpen 16:cbb726ac20d8 801 accepted by assembler. So has to use following less efficient pattern.
MikamiUitOpen 16:cbb726ac20d8 802 */
MikamiUitOpen 16:cbb726ac20d8 803 __ASM volatile ("ldrbt %0, [%1]" : "=r" (result) : "r" (addr) : "memory" );
MikamiUitOpen 16:cbb726ac20d8 804 #endif
MikamiUitOpen 16:cbb726ac20d8 805 return ((uint8_t) result); /* Add explicit type cast here */
MikamiUitOpen 16:cbb726ac20d8 806 }
MikamiUitOpen 16:cbb726ac20d8 807
MikamiUitOpen 16:cbb726ac20d8 808
MikamiUitOpen 16:cbb726ac20d8 809 /** \brief LDRT Unprivileged (16 bit)
MikamiUitOpen 16:cbb726ac20d8 810
MikamiUitOpen 16:cbb726ac20d8 811 This function executes a Unprivileged LDRT instruction for 16 bit values.
MikamiUitOpen 16:cbb726ac20d8 812
MikamiUitOpen 16:cbb726ac20d8 813 \param [in] ptr Pointer to data
MikamiUitOpen 16:cbb726ac20d8 814 \return value of type uint16_t at (*ptr)
MikamiUitOpen 16:cbb726ac20d8 815 */
MikamiUitOpen 16:cbb726ac20d8 816 __attribute__((always_inline)) __STATIC_INLINE uint16_t __LDRHT(volatile uint16_t *addr)
MikamiUitOpen 16:cbb726ac20d8 817 {
MikamiUitOpen 16:cbb726ac20d8 818 uint32_t result;
MikamiUitOpen 16:cbb726ac20d8 819
MikamiUitOpen 16:cbb726ac20d8 820 #if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 8)
MikamiUitOpen 16:cbb726ac20d8 821 __ASM volatile ("ldrht %0, %1" : "=r" (result) : "Q" (*addr) );
MikamiUitOpen 16:cbb726ac20d8 822 #else
MikamiUitOpen 16:cbb726ac20d8 823 /* Prior to GCC 4.8, "Q" will be expanded to [rx, #0] which is not
MikamiUitOpen 16:cbb726ac20d8 824 accepted by assembler. So has to use following less efficient pattern.
MikamiUitOpen 16:cbb726ac20d8 825 */
MikamiUitOpen 16:cbb726ac20d8 826 __ASM volatile ("ldrht %0, [%1]" : "=r" (result) : "r" (addr) : "memory" );
MikamiUitOpen 16:cbb726ac20d8 827 #endif
MikamiUitOpen 16:cbb726ac20d8 828 return ((uint16_t) result); /* Add explicit type cast here */
MikamiUitOpen 16:cbb726ac20d8 829 }
MikamiUitOpen 16:cbb726ac20d8 830
MikamiUitOpen 16:cbb726ac20d8 831
MikamiUitOpen 16:cbb726ac20d8 832 /** \brief LDRT Unprivileged (32 bit)
MikamiUitOpen 16:cbb726ac20d8 833
MikamiUitOpen 16:cbb726ac20d8 834 This function executes a Unprivileged LDRT instruction for 32 bit values.
MikamiUitOpen 16:cbb726ac20d8 835
MikamiUitOpen 16:cbb726ac20d8 836 \param [in] ptr Pointer to data
MikamiUitOpen 16:cbb726ac20d8 837 \return value of type uint32_t at (*ptr)
MikamiUitOpen 16:cbb726ac20d8 838 */
MikamiUitOpen 16:cbb726ac20d8 839 __attribute__((always_inline)) __STATIC_INLINE uint32_t __LDRT(volatile uint32_t *addr)
MikamiUitOpen 16:cbb726ac20d8 840 {
MikamiUitOpen 16:cbb726ac20d8 841 uint32_t result;
MikamiUitOpen 16:cbb726ac20d8 842
MikamiUitOpen 16:cbb726ac20d8 843 __ASM volatile ("ldrt %0, %1" : "=r" (result) : "Q" (*addr) );
MikamiUitOpen 16:cbb726ac20d8 844 return(result);
MikamiUitOpen 16:cbb726ac20d8 845 }
MikamiUitOpen 16:cbb726ac20d8 846
MikamiUitOpen 16:cbb726ac20d8 847
MikamiUitOpen 16:cbb726ac20d8 848 /** \brief STRT Unprivileged (8 bit)
MikamiUitOpen 16:cbb726ac20d8 849
MikamiUitOpen 16:cbb726ac20d8 850 This function executes a Unprivileged STRT instruction for 8 bit values.
MikamiUitOpen 16:cbb726ac20d8 851
MikamiUitOpen 16:cbb726ac20d8 852 \param [in] value Value to store
MikamiUitOpen 16:cbb726ac20d8 853 \param [in] ptr Pointer to location
MikamiUitOpen 16:cbb726ac20d8 854 */
MikamiUitOpen 16:cbb726ac20d8 855 __attribute__((always_inline)) __STATIC_INLINE void __STRBT(uint8_t value, volatile uint8_t *addr)
MikamiUitOpen 16:cbb726ac20d8 856 {
MikamiUitOpen 16:cbb726ac20d8 857 __ASM volatile ("strbt %1, %0" : "=Q" (*addr) : "r" ((uint32_t)value) );
MikamiUitOpen 16:cbb726ac20d8 858 }
MikamiUitOpen 16:cbb726ac20d8 859
MikamiUitOpen 16:cbb726ac20d8 860
MikamiUitOpen 16:cbb726ac20d8 861 /** \brief STRT Unprivileged (16 bit)
MikamiUitOpen 16:cbb726ac20d8 862
MikamiUitOpen 16:cbb726ac20d8 863 This function executes a Unprivileged STRT instruction for 16 bit values.
MikamiUitOpen 16:cbb726ac20d8 864
MikamiUitOpen 16:cbb726ac20d8 865 \param [in] value Value to store
MikamiUitOpen 16:cbb726ac20d8 866 \param [in] ptr Pointer to location
MikamiUitOpen 16:cbb726ac20d8 867 */
MikamiUitOpen 16:cbb726ac20d8 868 __attribute__((always_inline)) __STATIC_INLINE void __STRHT(uint16_t value, volatile uint16_t *addr)
MikamiUitOpen 16:cbb726ac20d8 869 {
MikamiUitOpen 16:cbb726ac20d8 870 __ASM volatile ("strht %1, %0" : "=Q" (*addr) : "r" ((uint32_t)value) );
MikamiUitOpen 16:cbb726ac20d8 871 }
MikamiUitOpen 16:cbb726ac20d8 872
MikamiUitOpen 16:cbb726ac20d8 873
MikamiUitOpen 16:cbb726ac20d8 874 /** \brief STRT Unprivileged (32 bit)
MikamiUitOpen 16:cbb726ac20d8 875
MikamiUitOpen 16:cbb726ac20d8 876 This function executes a Unprivileged STRT instruction for 32 bit values.
MikamiUitOpen 16:cbb726ac20d8 877
MikamiUitOpen 16:cbb726ac20d8 878 \param [in] value Value to store
MikamiUitOpen 16:cbb726ac20d8 879 \param [in] ptr Pointer to location
MikamiUitOpen 16:cbb726ac20d8 880 */
MikamiUitOpen 16:cbb726ac20d8 881 __attribute__((always_inline)) __STATIC_INLINE void __STRT(uint32_t value, volatile uint32_t *addr)
MikamiUitOpen 16:cbb726ac20d8 882 {
MikamiUitOpen 16:cbb726ac20d8 883 __ASM volatile ("strt %1, %0" : "=Q" (*addr) : "r" (value) );
MikamiUitOpen 16:cbb726ac20d8 884 }
MikamiUitOpen 16:cbb726ac20d8 885
MikamiUitOpen 16:cbb726ac20d8 886 #endif /* (__CORTEX_M >= 0x03) || (__CORTEX_SC >= 300) */
MikamiUitOpen 16:cbb726ac20d8 887
MikamiUitOpen 16:cbb726ac20d8 888
MikamiUitOpen 16:cbb726ac20d8 889 #elif defined ( __ICCARM__ ) /*------------------ ICC Compiler -------------------*/
MikamiUitOpen 16:cbb726ac20d8 890 /* IAR iccarm specific functions */
MikamiUitOpen 16:cbb726ac20d8 891 #include <cmsis_iar.h>
MikamiUitOpen 16:cbb726ac20d8 892
MikamiUitOpen 16:cbb726ac20d8 893
MikamiUitOpen 16:cbb726ac20d8 894 #elif defined ( __TMS470__ ) /*---------------- TI CCS Compiler ------------------*/
MikamiUitOpen 16:cbb726ac20d8 895 /* TI CCS specific functions */
MikamiUitOpen 16:cbb726ac20d8 896 #include <cmsis_ccs.h>
MikamiUitOpen 16:cbb726ac20d8 897
MikamiUitOpen 16:cbb726ac20d8 898
MikamiUitOpen 16:cbb726ac20d8 899 #elif defined ( __TASKING__ ) /*------------------ TASKING Compiler --------------*/
MikamiUitOpen 16:cbb726ac20d8 900 /* TASKING carm specific functions */
MikamiUitOpen 16:cbb726ac20d8 901 /*
MikamiUitOpen 16:cbb726ac20d8 902 * The CMSIS functions have been implemented as intrinsics in the compiler.
MikamiUitOpen 16:cbb726ac20d8 903 * Please use "carm -?i" to get an up to date list of all intrinsics,
MikamiUitOpen 16:cbb726ac20d8 904 * Including the CMSIS ones.
MikamiUitOpen 16:cbb726ac20d8 905 */
MikamiUitOpen 16:cbb726ac20d8 906
MikamiUitOpen 16:cbb726ac20d8 907
MikamiUitOpen 16:cbb726ac20d8 908 #elif defined ( __CSMC__ ) /*------------------ COSMIC Compiler -------------------*/
MikamiUitOpen 16:cbb726ac20d8 909 /* Cosmic specific functions */
MikamiUitOpen 16:cbb726ac20d8 910 #include <cmsis_csm.h>
MikamiUitOpen 16:cbb726ac20d8 911
MikamiUitOpen 16:cbb726ac20d8 912 #endif
MikamiUitOpen 16:cbb726ac20d8 913
MikamiUitOpen 16:cbb726ac20d8 914 /*@}*/ /* end of group CMSIS_Core_InstructionInterface */
MikamiUitOpen 16:cbb726ac20d8 915
MikamiUitOpen 16:cbb726ac20d8 916 #endif /* __CORE_CMINSTR_H */