不韋 呂 / F746_SD_GraphicEqualizer

Output the audio signal with filtering by graphic equalizer in the *.wav file on the SD card using onboard CODEC. SD カードの *.wav ファイルのオーディオ信号をグラフィック･イコライザを通して，ボードに搭載されているCODEC で出力する．

Dependencies:   F746_GUI F746_SAI_IO SD_PlayerSkeleton FrequencyResponseDrawer

mbed_src_STM32F7/targets/cmsis/core_ca_mmu.h@24:f78f9d0ac262, 2017-04-10 (annotated)

Committer:
MikamiUitOpen
Date:
Mon Apr 10 04:07:35 2017 +0000
Revision:
24:f78f9d0ac262
Parent:
16:cbb726ac20d8 
25

Who changed what in which revision?

UserRevisionLine numberNew contents of line
MikamiUitOpen 16:cbb726ac20d8 1 ;/**************************************************************************//**
MikamiUitOpen 16:cbb726ac20d8 2 ; * @file core_ca_mmu.h
MikamiUitOpen 16:cbb726ac20d8 3 ; * @brief MMU Startup File for A9_MP Device Series
MikamiUitOpen 16:cbb726ac20d8 4 ; * @version V1.01
MikamiUitOpen 16:cbb726ac20d8 5 ; * @date 10 Sept 2014
MikamiUitOpen 16:cbb726ac20d8 6 ; *
MikamiUitOpen 16:cbb726ac20d8 7 ; * @note
MikamiUitOpen 16:cbb726ac20d8 8 ; *
MikamiUitOpen 16:cbb726ac20d8 9 ; ******************************************************************************/
MikamiUitOpen 16:cbb726ac20d8 10 ;/* Copyright (c) 2012-2014 ARM LIMITED
MikamiUitOpen 16:cbb726ac20d8 11 ;
MikamiUitOpen 16:cbb726ac20d8 12 ; All rights reserved.
MikamiUitOpen 16:cbb726ac20d8 13 ; Redistribution and use in source and binary forms, with or without
MikamiUitOpen 16:cbb726ac20d8 14 ; modification, are permitted provided that the following conditions are met:
MikamiUitOpen 16:cbb726ac20d8 15 ; - Redistributions of source code must retain the above copyright
MikamiUitOpen 16:cbb726ac20d8 16 ; notice, this list of conditions and the following disclaimer.
MikamiUitOpen 16:cbb726ac20d8 17 ; - Redistributions in binary form must reproduce the above copyright
MikamiUitOpen 16:cbb726ac20d8 18 ; notice, this list of conditions and the following disclaimer in the
MikamiUitOpen 16:cbb726ac20d8 19 ; documentation and/or other materials provided with the distribution.
MikamiUitOpen 16:cbb726ac20d8 20 ; - Neither the name of ARM nor the names of its contributors may be used
MikamiUitOpen 16:cbb726ac20d8 21 ; to endorse or promote products derived from this software without
MikamiUitOpen 16:cbb726ac20d8 22 ; specific prior written permission.
MikamiUitOpen 16:cbb726ac20d8 23 ; *
MikamiUitOpen 16:cbb726ac20d8 24 ; THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
MikamiUitOpen 16:cbb726ac20d8 25 ; AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
MikamiUitOpen 16:cbb726ac20d8 26 ; IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
MikamiUitOpen 16:cbb726ac20d8 27 ; ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
MikamiUitOpen 16:cbb726ac20d8 28 ; LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
MikamiUitOpen 16:cbb726ac20d8 29 ; CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
MikamiUitOpen 16:cbb726ac20d8 30 ; SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
MikamiUitOpen 16:cbb726ac20d8 31 ; INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
MikamiUitOpen 16:cbb726ac20d8 32 ; CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
MikamiUitOpen 16:cbb726ac20d8 33 ; ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
MikamiUitOpen 16:cbb726ac20d8 34 ; POSSIBILITY OF SUCH DAMAGE.
MikamiUitOpen 16:cbb726ac20d8 35 ; ---------------------------------------------------------------------------*/
MikamiUitOpen 16:cbb726ac20d8 36
MikamiUitOpen 16:cbb726ac20d8 37 #ifdef __cplusplus
MikamiUitOpen 16:cbb726ac20d8 38 extern "C" {
MikamiUitOpen 16:cbb726ac20d8 39 #endif
MikamiUitOpen 16:cbb726ac20d8 40
MikamiUitOpen 16:cbb726ac20d8 41 #ifndef _MMU_FUNC_H
MikamiUitOpen 16:cbb726ac20d8 42 #define _MMU_FUNC_H
MikamiUitOpen 16:cbb726ac20d8 43
MikamiUitOpen 16:cbb726ac20d8 44 #define SECTION_DESCRIPTOR (0x2)
MikamiUitOpen 16:cbb726ac20d8 45 #define SECTION_MASK (0xFFFFFFFC)
MikamiUitOpen 16:cbb726ac20d8 46
MikamiUitOpen 16:cbb726ac20d8 47 #define SECTION_TEXCB_MASK (0xFFFF8FF3)
MikamiUitOpen 16:cbb726ac20d8 48 #define SECTION_B_SHIFT (2)
MikamiUitOpen 16:cbb726ac20d8 49 #define SECTION_C_SHIFT (3)
MikamiUitOpen 16:cbb726ac20d8 50 #define SECTION_TEX0_SHIFT (12)
MikamiUitOpen 16:cbb726ac20d8 51 #define SECTION_TEX1_SHIFT (13)
MikamiUitOpen 16:cbb726ac20d8 52 #define SECTION_TEX2_SHIFT (14)
MikamiUitOpen 16:cbb726ac20d8 53
MikamiUitOpen 16:cbb726ac20d8 54 #define SECTION_XN_MASK (0xFFFFFFEF)
MikamiUitOpen 16:cbb726ac20d8 55 #define SECTION_XN_SHIFT (4)
MikamiUitOpen 16:cbb726ac20d8 56
MikamiUitOpen 16:cbb726ac20d8 57 #define SECTION_DOMAIN_MASK (0xFFFFFE1F)
MikamiUitOpen 16:cbb726ac20d8 58 #define SECTION_DOMAIN_SHIFT (5)
MikamiUitOpen 16:cbb726ac20d8 59
MikamiUitOpen 16:cbb726ac20d8 60 #define SECTION_P_MASK (0xFFFFFDFF)
MikamiUitOpen 16:cbb726ac20d8 61 #define SECTION_P_SHIFT (9)
MikamiUitOpen 16:cbb726ac20d8 62
MikamiUitOpen 16:cbb726ac20d8 63 #define SECTION_AP_MASK (0xFFFF73FF)
MikamiUitOpen 16:cbb726ac20d8 64 #define SECTION_AP_SHIFT (10)
MikamiUitOpen 16:cbb726ac20d8 65 #define SECTION_AP2_SHIFT (15)
MikamiUitOpen 16:cbb726ac20d8 66
MikamiUitOpen 16:cbb726ac20d8 67 #define SECTION_S_MASK (0xFFFEFFFF)
MikamiUitOpen 16:cbb726ac20d8 68 #define SECTION_S_SHIFT (16)
MikamiUitOpen 16:cbb726ac20d8 69
MikamiUitOpen 16:cbb726ac20d8 70 #define SECTION_NG_MASK (0xFFFDFFFF)
MikamiUitOpen 16:cbb726ac20d8 71 #define SECTION_NG_SHIFT (17)
MikamiUitOpen 16:cbb726ac20d8 72
MikamiUitOpen 16:cbb726ac20d8 73 #define SECTION_NS_MASK (0xFFF7FFFF)
MikamiUitOpen 16:cbb726ac20d8 74 #define SECTION_NS_SHIFT (19)
MikamiUitOpen 16:cbb726ac20d8 75
MikamiUitOpen 16:cbb726ac20d8 76
MikamiUitOpen 16:cbb726ac20d8 77 #define PAGE_L1_DESCRIPTOR (0x1)
MikamiUitOpen 16:cbb726ac20d8 78 #define PAGE_L1_MASK (0xFFFFFFFC)
MikamiUitOpen 16:cbb726ac20d8 79
MikamiUitOpen 16:cbb726ac20d8 80 #define PAGE_L2_4K_DESC (0x2)
MikamiUitOpen 16:cbb726ac20d8 81 #define PAGE_L2_4K_MASK (0xFFFFFFFD)
MikamiUitOpen 16:cbb726ac20d8 82
MikamiUitOpen 16:cbb726ac20d8 83 #define PAGE_L2_64K_DESC (0x1)
MikamiUitOpen 16:cbb726ac20d8 84 #define PAGE_L2_64K_MASK (0xFFFFFFFC)
MikamiUitOpen 16:cbb726ac20d8 85
MikamiUitOpen 16:cbb726ac20d8 86 #define PAGE_4K_TEXCB_MASK (0xFFFFFE33)
MikamiUitOpen 16:cbb726ac20d8 87 #define PAGE_4K_B_SHIFT (2)
MikamiUitOpen 16:cbb726ac20d8 88 #define PAGE_4K_C_SHIFT (3)
MikamiUitOpen 16:cbb726ac20d8 89 #define PAGE_4K_TEX0_SHIFT (6)
MikamiUitOpen 16:cbb726ac20d8 90 #define PAGE_4K_TEX1_SHIFT (7)
MikamiUitOpen 16:cbb726ac20d8 91 #define PAGE_4K_TEX2_SHIFT (8)
MikamiUitOpen 16:cbb726ac20d8 92
MikamiUitOpen 16:cbb726ac20d8 93 #define PAGE_64K_TEXCB_MASK (0xFFFF8FF3)
MikamiUitOpen 16:cbb726ac20d8 94 #define PAGE_64K_B_SHIFT (2)
MikamiUitOpen 16:cbb726ac20d8 95 #define PAGE_64K_C_SHIFT (3)
MikamiUitOpen 16:cbb726ac20d8 96 #define PAGE_64K_TEX0_SHIFT (12)
MikamiUitOpen 16:cbb726ac20d8 97 #define PAGE_64K_TEX1_SHIFT (13)
MikamiUitOpen 16:cbb726ac20d8 98 #define PAGE_64K_TEX2_SHIFT (14)
MikamiUitOpen 16:cbb726ac20d8 99
MikamiUitOpen 16:cbb726ac20d8 100 #define PAGE_TEXCB_MASK (0xFFFF8FF3)
MikamiUitOpen 16:cbb726ac20d8 101 #define PAGE_B_SHIFT (2)
MikamiUitOpen 16:cbb726ac20d8 102 #define PAGE_C_SHIFT (3)
MikamiUitOpen 16:cbb726ac20d8 103 #define PAGE_TEX_SHIFT (12)
MikamiUitOpen 16:cbb726ac20d8 104
MikamiUitOpen 16:cbb726ac20d8 105 #define PAGE_XN_4K_MASK (0xFFFFFFFE)
MikamiUitOpen 16:cbb726ac20d8 106 #define PAGE_XN_4K_SHIFT (0)
MikamiUitOpen 16:cbb726ac20d8 107 #define PAGE_XN_64K_MASK (0xFFFF7FFF)
MikamiUitOpen 16:cbb726ac20d8 108 #define PAGE_XN_64K_SHIFT (15)
MikamiUitOpen 16:cbb726ac20d8 109
MikamiUitOpen 16:cbb726ac20d8 110
MikamiUitOpen 16:cbb726ac20d8 111 #define PAGE_DOMAIN_MASK (0xFFFFFE1F)
MikamiUitOpen 16:cbb726ac20d8 112 #define PAGE_DOMAIN_SHIFT (5)
MikamiUitOpen 16:cbb726ac20d8 113
MikamiUitOpen 16:cbb726ac20d8 114 #define PAGE_P_MASK (0xFFFFFDFF)
MikamiUitOpen 16:cbb726ac20d8 115 #define PAGE_P_SHIFT (9)
MikamiUitOpen 16:cbb726ac20d8 116
MikamiUitOpen 16:cbb726ac20d8 117 #define PAGE_AP_MASK (0xFFFFFDCF)
MikamiUitOpen 16:cbb726ac20d8 118 #define PAGE_AP_SHIFT (4)
MikamiUitOpen 16:cbb726ac20d8 119 #define PAGE_AP2_SHIFT (9)
MikamiUitOpen 16:cbb726ac20d8 120
MikamiUitOpen 16:cbb726ac20d8 121 #define PAGE_S_MASK (0xFFFFFBFF)
MikamiUitOpen 16:cbb726ac20d8 122 #define PAGE_S_SHIFT (10)
MikamiUitOpen 16:cbb726ac20d8 123
MikamiUitOpen 16:cbb726ac20d8 124 #define PAGE_NG_MASK (0xFFFFF7FF)
MikamiUitOpen 16:cbb726ac20d8 125 #define PAGE_NG_SHIFT (11)
MikamiUitOpen 16:cbb726ac20d8 126
MikamiUitOpen 16:cbb726ac20d8 127 #define PAGE_NS_MASK (0xFFFFFFF7)
MikamiUitOpen 16:cbb726ac20d8 128 #define PAGE_NS_SHIFT (3)
MikamiUitOpen 16:cbb726ac20d8 129
MikamiUitOpen 16:cbb726ac20d8 130 #define OFFSET_1M (0x00100000)
MikamiUitOpen 16:cbb726ac20d8 131 #define OFFSET_64K (0x00010000)
MikamiUitOpen 16:cbb726ac20d8 132 #define OFFSET_4K (0x00001000)
MikamiUitOpen 16:cbb726ac20d8 133
MikamiUitOpen 16:cbb726ac20d8 134 #define DESCRIPTOR_FAULT (0x00000000)
MikamiUitOpen 16:cbb726ac20d8 135
MikamiUitOpen 16:cbb726ac20d8 136 /* ########################### MMU Function Access ########################### */
MikamiUitOpen 16:cbb726ac20d8 137 /** \ingroup MMU_FunctionInterface
MikamiUitOpen 16:cbb726ac20d8 138 \defgroup MMU_Functions MMU Functions Interface
MikamiUitOpen 16:cbb726ac20d8 139 @{
MikamiUitOpen 16:cbb726ac20d8 140 */
MikamiUitOpen 16:cbb726ac20d8 141
MikamiUitOpen 16:cbb726ac20d8 142 /* Attributes enumerations */
MikamiUitOpen 16:cbb726ac20d8 143
MikamiUitOpen 16:cbb726ac20d8 144 /* Region size attributes */
MikamiUitOpen 16:cbb726ac20d8 145 typedef enum
MikamiUitOpen 16:cbb726ac20d8 146 {
MikamiUitOpen 16:cbb726ac20d8 147 SECTION,
MikamiUitOpen 16:cbb726ac20d8 148 PAGE_4k,
MikamiUitOpen 16:cbb726ac20d8 149 PAGE_64k,
MikamiUitOpen 16:cbb726ac20d8 150 } mmu_region_size_Type;
MikamiUitOpen 16:cbb726ac20d8 151
MikamiUitOpen 16:cbb726ac20d8 152 /* Region type attributes */
MikamiUitOpen 16:cbb726ac20d8 153 typedef enum
MikamiUitOpen 16:cbb726ac20d8 154 {
MikamiUitOpen 16:cbb726ac20d8 155 NORMAL,
MikamiUitOpen 16:cbb726ac20d8 156 DEVICE,
MikamiUitOpen 16:cbb726ac20d8 157 SHARED_DEVICE,
MikamiUitOpen 16:cbb726ac20d8 158 NON_SHARED_DEVICE,
MikamiUitOpen 16:cbb726ac20d8 159 STRONGLY_ORDERED
MikamiUitOpen 16:cbb726ac20d8 160 } mmu_memory_Type;
MikamiUitOpen 16:cbb726ac20d8 161
MikamiUitOpen 16:cbb726ac20d8 162 /* Region cacheability attributes */
MikamiUitOpen 16:cbb726ac20d8 163 typedef enum
MikamiUitOpen 16:cbb726ac20d8 164 {
MikamiUitOpen 16:cbb726ac20d8 165 NON_CACHEABLE,
MikamiUitOpen 16:cbb726ac20d8 166 WB_WA,
MikamiUitOpen 16:cbb726ac20d8 167 WT,
MikamiUitOpen 16:cbb726ac20d8 168 WB_NO_WA,
MikamiUitOpen 16:cbb726ac20d8 169 } mmu_cacheability_Type;
MikamiUitOpen 16:cbb726ac20d8 170
MikamiUitOpen 16:cbb726ac20d8 171 /* Region parity check attributes */
MikamiUitOpen 16:cbb726ac20d8 172 typedef enum
MikamiUitOpen 16:cbb726ac20d8 173 {
MikamiUitOpen 16:cbb726ac20d8 174 ECC_DISABLED,
MikamiUitOpen 16:cbb726ac20d8 175 ECC_ENABLED,
MikamiUitOpen 16:cbb726ac20d8 176 } mmu_ecc_check_Type;
MikamiUitOpen 16:cbb726ac20d8 177
MikamiUitOpen 16:cbb726ac20d8 178 /* Region execution attributes */
MikamiUitOpen 16:cbb726ac20d8 179 typedef enum
MikamiUitOpen 16:cbb726ac20d8 180 {
MikamiUitOpen 16:cbb726ac20d8 181 EXECUTE,
MikamiUitOpen 16:cbb726ac20d8 182 NON_EXECUTE,
MikamiUitOpen 16:cbb726ac20d8 183 } mmu_execute_Type;
MikamiUitOpen 16:cbb726ac20d8 184
MikamiUitOpen 16:cbb726ac20d8 185 /* Region global attributes */
MikamiUitOpen 16:cbb726ac20d8 186 typedef enum
MikamiUitOpen 16:cbb726ac20d8 187 {
MikamiUitOpen 16:cbb726ac20d8 188 GLOBAL,
MikamiUitOpen 16:cbb726ac20d8 189 NON_GLOBAL,
MikamiUitOpen 16:cbb726ac20d8 190 } mmu_global_Type;
MikamiUitOpen 16:cbb726ac20d8 191
MikamiUitOpen 16:cbb726ac20d8 192 /* Region shareability attributes */
MikamiUitOpen 16:cbb726ac20d8 193 typedef enum
MikamiUitOpen 16:cbb726ac20d8 194 {
MikamiUitOpen 16:cbb726ac20d8 195 NON_SHARED,
MikamiUitOpen 16:cbb726ac20d8 196 SHARED,
MikamiUitOpen 16:cbb726ac20d8 197 } mmu_shared_Type;
MikamiUitOpen 16:cbb726ac20d8 198
MikamiUitOpen 16:cbb726ac20d8 199 /* Region security attributes */
MikamiUitOpen 16:cbb726ac20d8 200 typedef enum
MikamiUitOpen 16:cbb726ac20d8 201 {
MikamiUitOpen 16:cbb726ac20d8 202 SECURE,
MikamiUitOpen 16:cbb726ac20d8 203 NON_SECURE,
MikamiUitOpen 16:cbb726ac20d8 204 } mmu_secure_Type;
MikamiUitOpen 16:cbb726ac20d8 205
MikamiUitOpen 16:cbb726ac20d8 206 /* Region access attributes */
MikamiUitOpen 16:cbb726ac20d8 207 typedef enum
MikamiUitOpen 16:cbb726ac20d8 208 {
MikamiUitOpen 16:cbb726ac20d8 209 NO_ACCESS,
MikamiUitOpen 16:cbb726ac20d8 210 RW,
MikamiUitOpen 16:cbb726ac20d8 211 READ,
MikamiUitOpen 16:cbb726ac20d8 212 } mmu_access_Type;
MikamiUitOpen 16:cbb726ac20d8 213
MikamiUitOpen 16:cbb726ac20d8 214 /* Memory Region definition */
MikamiUitOpen 16:cbb726ac20d8 215 typedef struct RegionStruct {
MikamiUitOpen 16:cbb726ac20d8 216 mmu_region_size_Type rg_t;
MikamiUitOpen 16:cbb726ac20d8 217 mmu_memory_Type mem_t;
MikamiUitOpen 16:cbb726ac20d8 218 uint8_t domain;
MikamiUitOpen 16:cbb726ac20d8 219 mmu_cacheability_Type inner_norm_t;
MikamiUitOpen 16:cbb726ac20d8 220 mmu_cacheability_Type outer_norm_t;
MikamiUitOpen 16:cbb726ac20d8 221 mmu_ecc_check_Type e_t;
MikamiUitOpen 16:cbb726ac20d8 222 mmu_execute_Type xn_t;
MikamiUitOpen 16:cbb726ac20d8 223 mmu_global_Type g_t;
MikamiUitOpen 16:cbb726ac20d8 224 mmu_secure_Type sec_t;
MikamiUitOpen 16:cbb726ac20d8 225 mmu_access_Type priv_t;
MikamiUitOpen 16:cbb726ac20d8 226 mmu_access_Type user_t;
MikamiUitOpen 16:cbb726ac20d8 227 mmu_shared_Type sh_t;
MikamiUitOpen 16:cbb726ac20d8 228
MikamiUitOpen 16:cbb726ac20d8 229 } mmu_region_attributes_Type;
MikamiUitOpen 16:cbb726ac20d8 230
MikamiUitOpen 16:cbb726ac20d8 231 /** \brief Set section execution-never attribute
MikamiUitOpen 16:cbb726ac20d8 232
MikamiUitOpen 16:cbb726ac20d8 233 The function sets section execution-never attribute
MikamiUitOpen 16:cbb726ac20d8 234
MikamiUitOpen 16:cbb726ac20d8 235 \param [out] descriptor_l1 L1 descriptor.
MikamiUitOpen 16:cbb726ac20d8 236 \param [in] xn Section execution-never attribute : EXECUTE , NON_EXECUTE.
MikamiUitOpen 16:cbb726ac20d8 237
MikamiUitOpen 16:cbb726ac20d8 238 \return 0
MikamiUitOpen 16:cbb726ac20d8 239 */
MikamiUitOpen 16:cbb726ac20d8 240 __STATIC_INLINE int __xn_section(uint32_t *descriptor_l1, mmu_execute_Type xn)
MikamiUitOpen 16:cbb726ac20d8 241 {
MikamiUitOpen 16:cbb726ac20d8 242 *descriptor_l1 &= SECTION_XN_MASK;
MikamiUitOpen 16:cbb726ac20d8 243 *descriptor_l1 |= ((xn & 0x1) << SECTION_XN_SHIFT);
MikamiUitOpen 16:cbb726ac20d8 244 return 0;
MikamiUitOpen 16:cbb726ac20d8 245 }
MikamiUitOpen 16:cbb726ac20d8 246
MikamiUitOpen 16:cbb726ac20d8 247 /** \brief Set section domain
MikamiUitOpen 16:cbb726ac20d8 248
MikamiUitOpen 16:cbb726ac20d8 249 The function sets section domain
MikamiUitOpen 16:cbb726ac20d8 250
MikamiUitOpen 16:cbb726ac20d8 251 \param [out] descriptor_l1 L1 descriptor.
MikamiUitOpen 16:cbb726ac20d8 252 \param [in] domain Section domain
MikamiUitOpen 16:cbb726ac20d8 253
MikamiUitOpen 16:cbb726ac20d8 254 \return 0
MikamiUitOpen 16:cbb726ac20d8 255 */
MikamiUitOpen 16:cbb726ac20d8 256 __STATIC_INLINE int __domain_section(uint32_t *descriptor_l1, uint8_t domain)
MikamiUitOpen 16:cbb726ac20d8 257 {
MikamiUitOpen 16:cbb726ac20d8 258 *descriptor_l1 &= SECTION_DOMAIN_MASK;
MikamiUitOpen 16:cbb726ac20d8 259 *descriptor_l1 |= ((domain & 0xF) << SECTION_DOMAIN_SHIFT);
MikamiUitOpen 16:cbb726ac20d8 260 return 0;
MikamiUitOpen 16:cbb726ac20d8 261 }
MikamiUitOpen 16:cbb726ac20d8 262
MikamiUitOpen 16:cbb726ac20d8 263 /** \brief Set section parity check
MikamiUitOpen 16:cbb726ac20d8 264
MikamiUitOpen 16:cbb726ac20d8 265 The function sets section parity check
MikamiUitOpen 16:cbb726ac20d8 266
MikamiUitOpen 16:cbb726ac20d8 267 \param [out] descriptor_l1 L1 descriptor.
MikamiUitOpen 16:cbb726ac20d8 268 \param [in] p_bit Parity check: ECC_DISABLED, ECC_ENABLED
MikamiUitOpen 16:cbb726ac20d8 269
MikamiUitOpen 16:cbb726ac20d8 270 \return 0
MikamiUitOpen 16:cbb726ac20d8 271 */
MikamiUitOpen 16:cbb726ac20d8 272 __STATIC_INLINE int __p_section(uint32_t *descriptor_l1, mmu_ecc_check_Type p_bit)
MikamiUitOpen 16:cbb726ac20d8 273 {
MikamiUitOpen 16:cbb726ac20d8 274 *descriptor_l1 &= SECTION_P_MASK;
MikamiUitOpen 16:cbb726ac20d8 275 *descriptor_l1 |= ((p_bit & 0x1) << SECTION_P_SHIFT);
MikamiUitOpen 16:cbb726ac20d8 276 return 0;
MikamiUitOpen 16:cbb726ac20d8 277 }
MikamiUitOpen 16:cbb726ac20d8 278
MikamiUitOpen 16:cbb726ac20d8 279 /** \brief Set section access privileges
MikamiUitOpen 16:cbb726ac20d8 280
MikamiUitOpen 16:cbb726ac20d8 281 The function sets section access privileges
MikamiUitOpen 16:cbb726ac20d8 282
MikamiUitOpen 16:cbb726ac20d8 283 \param [out] descriptor_l1 L1 descriptor.
MikamiUitOpen 16:cbb726ac20d8 284 \param [in] user User Level Access: NO_ACCESS, RW, READ
MikamiUitOpen 16:cbb726ac20d8 285 \param [in] priv Privilege Level Access: NO_ACCESS, RW, READ
MikamiUitOpen 16:cbb726ac20d8 286 \param [in] afe Access flag enable
MikamiUitOpen 16:cbb726ac20d8 287
MikamiUitOpen 16:cbb726ac20d8 288 \return 0
MikamiUitOpen 16:cbb726ac20d8 289 */
MikamiUitOpen 16:cbb726ac20d8 290 __STATIC_INLINE int __ap_section(uint32_t *descriptor_l1, mmu_access_Type user, mmu_access_Type priv, uint32_t afe)
MikamiUitOpen 16:cbb726ac20d8 291 {
MikamiUitOpen 16:cbb726ac20d8 292 uint32_t ap = 0;
MikamiUitOpen 16:cbb726ac20d8 293
MikamiUitOpen 16:cbb726ac20d8 294 if (afe == 0) { //full access
MikamiUitOpen 16:cbb726ac20d8 295 if ((priv == NO_ACCESS) && (user == NO_ACCESS)) { ap = 0x0; }
MikamiUitOpen 16:cbb726ac20d8 296 else if ((priv == RW) && (user == NO_ACCESS)) { ap = 0x1; }
MikamiUitOpen 16:cbb726ac20d8 297 else if ((priv == RW) && (user == READ)) { ap = 0x2; }
MikamiUitOpen 16:cbb726ac20d8 298 else if ((priv == RW) && (user == RW)) { ap = 0x3; }
MikamiUitOpen 16:cbb726ac20d8 299 else if ((priv == READ) && (user == NO_ACCESS)) { ap = 0x5; }
MikamiUitOpen 16:cbb726ac20d8 300 else if ((priv == READ) && (user == READ)) { ap = 0x7; }
MikamiUitOpen 16:cbb726ac20d8 301 }
MikamiUitOpen 16:cbb726ac20d8 302
MikamiUitOpen 16:cbb726ac20d8 303 else { //Simplified access
MikamiUitOpen 16:cbb726ac20d8 304 if ((priv == RW) && (user == NO_ACCESS)) { ap = 0x1; }
MikamiUitOpen 16:cbb726ac20d8 305 else if ((priv == RW) && (user == RW)) { ap = 0x3; }
MikamiUitOpen 16:cbb726ac20d8 306 else if ((priv == READ) && (user == NO_ACCESS)) { ap = 0x5; }
MikamiUitOpen 16:cbb726ac20d8 307 else if ((priv == READ) && (user == READ)) { ap = 0x7; }
MikamiUitOpen 16:cbb726ac20d8 308 }
MikamiUitOpen 16:cbb726ac20d8 309
MikamiUitOpen 16:cbb726ac20d8 310 *descriptor_l1 &= SECTION_AP_MASK;
MikamiUitOpen 16:cbb726ac20d8 311 *descriptor_l1 |= (ap & 0x3) << SECTION_AP_SHIFT;
MikamiUitOpen 16:cbb726ac20d8 312 *descriptor_l1 |= ((ap & 0x4)>>2) << SECTION_AP2_SHIFT;
MikamiUitOpen 16:cbb726ac20d8 313
MikamiUitOpen 16:cbb726ac20d8 314 return 0;
MikamiUitOpen 16:cbb726ac20d8 315 }
MikamiUitOpen 16:cbb726ac20d8 316
MikamiUitOpen 16:cbb726ac20d8 317 /** \brief Set section shareability
MikamiUitOpen 16:cbb726ac20d8 318
MikamiUitOpen 16:cbb726ac20d8 319 The function sets section shareability
MikamiUitOpen 16:cbb726ac20d8 320
MikamiUitOpen 16:cbb726ac20d8 321 \param [out] descriptor_l1 L1 descriptor.
MikamiUitOpen 16:cbb726ac20d8 322 \param [in] s_bit Section shareability: NON_SHARED, SHARED
MikamiUitOpen 16:cbb726ac20d8 323
MikamiUitOpen 16:cbb726ac20d8 324 \return 0
MikamiUitOpen 16:cbb726ac20d8 325 */
MikamiUitOpen 16:cbb726ac20d8 326 __STATIC_INLINE int __shared_section(uint32_t *descriptor_l1, mmu_shared_Type s_bit)
MikamiUitOpen 16:cbb726ac20d8 327 {
MikamiUitOpen 16:cbb726ac20d8 328 *descriptor_l1 &= SECTION_S_MASK;
MikamiUitOpen 16:cbb726ac20d8 329 *descriptor_l1 |= ((s_bit & 0x1) << SECTION_S_SHIFT);
MikamiUitOpen 16:cbb726ac20d8 330 return 0;
MikamiUitOpen 16:cbb726ac20d8 331 }
MikamiUitOpen 16:cbb726ac20d8 332
MikamiUitOpen 16:cbb726ac20d8 333 /** \brief Set section Global attribute
MikamiUitOpen 16:cbb726ac20d8 334
MikamiUitOpen 16:cbb726ac20d8 335 The function sets section Global attribute
MikamiUitOpen 16:cbb726ac20d8 336
MikamiUitOpen 16:cbb726ac20d8 337 \param [out] descriptor_l1 L1 descriptor.
MikamiUitOpen 16:cbb726ac20d8 338 \param [in] g_bit Section attribute: GLOBAL, NON_GLOBAL
MikamiUitOpen 16:cbb726ac20d8 339
MikamiUitOpen 16:cbb726ac20d8 340 \return 0
MikamiUitOpen 16:cbb726ac20d8 341 */
MikamiUitOpen 16:cbb726ac20d8 342 __STATIC_INLINE int __global_section(uint32_t *descriptor_l1, mmu_global_Type g_bit)
MikamiUitOpen 16:cbb726ac20d8 343 {
MikamiUitOpen 16:cbb726ac20d8 344 *descriptor_l1 &= SECTION_NG_MASK;
MikamiUitOpen 16:cbb726ac20d8 345 *descriptor_l1 |= ((g_bit & 0x1) << SECTION_NG_SHIFT);
MikamiUitOpen 16:cbb726ac20d8 346 return 0;
MikamiUitOpen 16:cbb726ac20d8 347 }
MikamiUitOpen 16:cbb726ac20d8 348
MikamiUitOpen 16:cbb726ac20d8 349 /** \brief Set section Security attribute
MikamiUitOpen 16:cbb726ac20d8 350
MikamiUitOpen 16:cbb726ac20d8 351 The function sets section Global attribute
MikamiUitOpen 16:cbb726ac20d8 352
MikamiUitOpen 16:cbb726ac20d8 353 \param [out] descriptor_l1 L1 descriptor.
MikamiUitOpen 16:cbb726ac20d8 354 \param [in] s_bit Section Security attribute: SECURE, NON_SECURE
MikamiUitOpen 16:cbb726ac20d8 355
MikamiUitOpen 16:cbb726ac20d8 356 \return 0
MikamiUitOpen 16:cbb726ac20d8 357 */
MikamiUitOpen 16:cbb726ac20d8 358 __STATIC_INLINE int __secure_section(uint32_t *descriptor_l1, mmu_secure_Type s_bit)
MikamiUitOpen 16:cbb726ac20d8 359 {
MikamiUitOpen 16:cbb726ac20d8 360 *descriptor_l1 &= SECTION_NS_MASK;
MikamiUitOpen 16:cbb726ac20d8 361 *descriptor_l1 |= ((s_bit & 0x1) << SECTION_NS_SHIFT);
MikamiUitOpen 16:cbb726ac20d8 362 return 0;
MikamiUitOpen 16:cbb726ac20d8 363 }
MikamiUitOpen 16:cbb726ac20d8 364
MikamiUitOpen 16:cbb726ac20d8 365 /* Page 4k or 64k */
MikamiUitOpen 16:cbb726ac20d8 366 /** \brief Set 4k/64k page execution-never attribute
MikamiUitOpen 16:cbb726ac20d8 367
MikamiUitOpen 16:cbb726ac20d8 368 The function sets 4k/64k page execution-never attribute
MikamiUitOpen 16:cbb726ac20d8 369
MikamiUitOpen 16:cbb726ac20d8 370 \param [out] descriptor_l2 L2 descriptor.
MikamiUitOpen 16:cbb726ac20d8 371 \param [in] xn Page execution-never attribute : EXECUTE , NON_EXECUTE.
MikamiUitOpen 16:cbb726ac20d8 372 \param [in] page Page size: PAGE_4k, PAGE_64k,
MikamiUitOpen 16:cbb726ac20d8 373
MikamiUitOpen 16:cbb726ac20d8 374 \return 0
MikamiUitOpen 16:cbb726ac20d8 375 */
MikamiUitOpen 16:cbb726ac20d8 376 __STATIC_INLINE int __xn_page(uint32_t *descriptor_l2, mmu_execute_Type xn, mmu_region_size_Type page)
MikamiUitOpen 16:cbb726ac20d8 377 {
MikamiUitOpen 16:cbb726ac20d8 378 if (page == PAGE_4k)
MikamiUitOpen 16:cbb726ac20d8 379 {
MikamiUitOpen 16:cbb726ac20d8 380 *descriptor_l2 &= PAGE_XN_4K_MASK;
MikamiUitOpen 16:cbb726ac20d8 381 *descriptor_l2 |= ((xn & 0x1) << PAGE_XN_4K_SHIFT);
MikamiUitOpen 16:cbb726ac20d8 382 }
MikamiUitOpen 16:cbb726ac20d8 383 else
MikamiUitOpen 16:cbb726ac20d8 384 {
MikamiUitOpen 16:cbb726ac20d8 385 *descriptor_l2 &= PAGE_XN_64K_MASK;
MikamiUitOpen 16:cbb726ac20d8 386 *descriptor_l2 |= ((xn & 0x1) << PAGE_XN_64K_SHIFT);
MikamiUitOpen 16:cbb726ac20d8 387 }
MikamiUitOpen 16:cbb726ac20d8 388 return 0;
MikamiUitOpen 16:cbb726ac20d8 389 }
MikamiUitOpen 16:cbb726ac20d8 390
MikamiUitOpen 16:cbb726ac20d8 391 /** \brief Set 4k/64k page domain
MikamiUitOpen 16:cbb726ac20d8 392
MikamiUitOpen 16:cbb726ac20d8 393 The function sets 4k/64k page domain
MikamiUitOpen 16:cbb726ac20d8 394
MikamiUitOpen 16:cbb726ac20d8 395 \param [out] descriptor_l1 L1 descriptor.
MikamiUitOpen 16:cbb726ac20d8 396 \param [in] domain Page domain
MikamiUitOpen 16:cbb726ac20d8 397
MikamiUitOpen 16:cbb726ac20d8 398 \return 0
MikamiUitOpen 16:cbb726ac20d8 399 */
MikamiUitOpen 16:cbb726ac20d8 400 __STATIC_INLINE int __domain_page(uint32_t *descriptor_l1, uint8_t domain)
MikamiUitOpen 16:cbb726ac20d8 401 {
MikamiUitOpen 16:cbb726ac20d8 402 *descriptor_l1 &= PAGE_DOMAIN_MASK;
MikamiUitOpen 16:cbb726ac20d8 403 *descriptor_l1 |= ((domain & 0xf) << PAGE_DOMAIN_SHIFT);
MikamiUitOpen 16:cbb726ac20d8 404 return 0;
MikamiUitOpen 16:cbb726ac20d8 405 }
MikamiUitOpen 16:cbb726ac20d8 406
MikamiUitOpen 16:cbb726ac20d8 407 /** \brief Set 4k/64k page parity check
MikamiUitOpen 16:cbb726ac20d8 408
MikamiUitOpen 16:cbb726ac20d8 409 The function sets 4k/64k page parity check
MikamiUitOpen 16:cbb726ac20d8 410
MikamiUitOpen 16:cbb726ac20d8 411 \param [out] descriptor_l1 L1 descriptor.
MikamiUitOpen 16:cbb726ac20d8 412 \param [in] p_bit Parity check: ECC_DISABLED, ECC_ENABLED
MikamiUitOpen 16:cbb726ac20d8 413
MikamiUitOpen 16:cbb726ac20d8 414 \return 0
MikamiUitOpen 16:cbb726ac20d8 415 */
MikamiUitOpen 16:cbb726ac20d8 416 __STATIC_INLINE int __p_page(uint32_t *descriptor_l1, mmu_ecc_check_Type p_bit)
MikamiUitOpen 16:cbb726ac20d8 417 {
MikamiUitOpen 16:cbb726ac20d8 418 *descriptor_l1 &= SECTION_P_MASK;
MikamiUitOpen 16:cbb726ac20d8 419 *descriptor_l1 |= ((p_bit & 0x1) << SECTION_P_SHIFT);
MikamiUitOpen 16:cbb726ac20d8 420 return 0;
MikamiUitOpen 16:cbb726ac20d8 421 }
MikamiUitOpen 16:cbb726ac20d8 422
MikamiUitOpen 16:cbb726ac20d8 423 /** \brief Set 4k/64k page access privileges
MikamiUitOpen 16:cbb726ac20d8 424
MikamiUitOpen 16:cbb726ac20d8 425 The function sets 4k/64k page access privileges
MikamiUitOpen 16:cbb726ac20d8 426
MikamiUitOpen 16:cbb726ac20d8 427 \param [out] descriptor_l2 L2 descriptor.
MikamiUitOpen 16:cbb726ac20d8 428 \param [in] user User Level Access: NO_ACCESS, RW, READ
MikamiUitOpen 16:cbb726ac20d8 429 \param [in] priv Privilege Level Access: NO_ACCESS, RW, READ
MikamiUitOpen 16:cbb726ac20d8 430 \param [in] afe Access flag enable
MikamiUitOpen 16:cbb726ac20d8 431
MikamiUitOpen 16:cbb726ac20d8 432 \return 0
MikamiUitOpen 16:cbb726ac20d8 433 */
MikamiUitOpen 16:cbb726ac20d8 434 __STATIC_INLINE int __ap_page(uint32_t *descriptor_l2, mmu_access_Type user, mmu_access_Type priv, uint32_t afe)
MikamiUitOpen 16:cbb726ac20d8 435 {
MikamiUitOpen 16:cbb726ac20d8 436 uint32_t ap = 0;
MikamiUitOpen 16:cbb726ac20d8 437
MikamiUitOpen 16:cbb726ac20d8 438 if (afe == 0) { //full access
MikamiUitOpen 16:cbb726ac20d8 439 if ((priv == NO_ACCESS) && (user == NO_ACCESS)) { ap = 0x0; }
MikamiUitOpen 16:cbb726ac20d8 440 else if ((priv == RW) && (user == NO_ACCESS)) { ap = 0x1; }
MikamiUitOpen 16:cbb726ac20d8 441 else if ((priv == RW) && (user == READ)) { ap = 0x2; }
MikamiUitOpen 16:cbb726ac20d8 442 else if ((priv == RW) && (user == RW)) { ap = 0x3; }
MikamiUitOpen 16:cbb726ac20d8 443 else if ((priv == READ) && (user == NO_ACCESS)) { ap = 0x5; }
MikamiUitOpen 16:cbb726ac20d8 444 else if ((priv == READ) && (user == READ)) { ap = 0x6; }
MikamiUitOpen 16:cbb726ac20d8 445 }
MikamiUitOpen 16:cbb726ac20d8 446
MikamiUitOpen 16:cbb726ac20d8 447 else { //Simplified access
MikamiUitOpen 16:cbb726ac20d8 448 if ((priv == RW) && (user == NO_ACCESS)) { ap = 0x1; }
MikamiUitOpen 16:cbb726ac20d8 449 else if ((priv == RW) && (user == RW)) { ap = 0x3; }
MikamiUitOpen 16:cbb726ac20d8 450 else if ((priv == READ) && (user == NO_ACCESS)) { ap = 0x5; }
MikamiUitOpen 16:cbb726ac20d8 451 else if ((priv == READ) && (user == READ)) { ap = 0x7; }
MikamiUitOpen 16:cbb726ac20d8 452 }
MikamiUitOpen 16:cbb726ac20d8 453
MikamiUitOpen 16:cbb726ac20d8 454 *descriptor_l2 &= PAGE_AP_MASK;
MikamiUitOpen 16:cbb726ac20d8 455 *descriptor_l2 |= (ap & 0x3) << PAGE_AP_SHIFT;
MikamiUitOpen 16:cbb726ac20d8 456 *descriptor_l2 |= ((ap & 0x4)>>2) << PAGE_AP2_SHIFT;
MikamiUitOpen 16:cbb726ac20d8 457
MikamiUitOpen 16:cbb726ac20d8 458 return 0;
MikamiUitOpen 16:cbb726ac20d8 459 }
MikamiUitOpen 16:cbb726ac20d8 460
MikamiUitOpen 16:cbb726ac20d8 461 /** \brief Set 4k/64k page shareability
MikamiUitOpen 16:cbb726ac20d8 462
MikamiUitOpen 16:cbb726ac20d8 463 The function sets 4k/64k page shareability
MikamiUitOpen 16:cbb726ac20d8 464
MikamiUitOpen 16:cbb726ac20d8 465 \param [out] descriptor_l2 L2 descriptor.
MikamiUitOpen 16:cbb726ac20d8 466 \param [in] s_bit 4k/64k page shareability: NON_SHARED, SHARED
MikamiUitOpen 16:cbb726ac20d8 467
MikamiUitOpen 16:cbb726ac20d8 468 \return 0
MikamiUitOpen 16:cbb726ac20d8 469 */
MikamiUitOpen 16:cbb726ac20d8 470 __STATIC_INLINE int __shared_page(uint32_t *descriptor_l2, mmu_shared_Type s_bit)
MikamiUitOpen 16:cbb726ac20d8 471 {
MikamiUitOpen 16:cbb726ac20d8 472 *descriptor_l2 &= PAGE_S_MASK;
MikamiUitOpen 16:cbb726ac20d8 473 *descriptor_l2 |= ((s_bit & 0x1) << PAGE_S_SHIFT);
MikamiUitOpen 16:cbb726ac20d8 474 return 0;
MikamiUitOpen 16:cbb726ac20d8 475 }
MikamiUitOpen 16:cbb726ac20d8 476
MikamiUitOpen 16:cbb726ac20d8 477 /** \brief Set 4k/64k page Global attribute
MikamiUitOpen 16:cbb726ac20d8 478
MikamiUitOpen 16:cbb726ac20d8 479 The function sets 4k/64k page Global attribute
MikamiUitOpen 16:cbb726ac20d8 480
MikamiUitOpen 16:cbb726ac20d8 481 \param [out] descriptor_l2 L2 descriptor.
MikamiUitOpen 16:cbb726ac20d8 482 \param [in] g_bit 4k/64k page attribute: GLOBAL, NON_GLOBAL
MikamiUitOpen 16:cbb726ac20d8 483
MikamiUitOpen 16:cbb726ac20d8 484 \return 0
MikamiUitOpen 16:cbb726ac20d8 485 */
MikamiUitOpen 16:cbb726ac20d8 486 __STATIC_INLINE int __global_page(uint32_t *descriptor_l2, mmu_global_Type g_bit)
MikamiUitOpen 16:cbb726ac20d8 487 {
MikamiUitOpen 16:cbb726ac20d8 488 *descriptor_l2 &= PAGE_NG_MASK;
MikamiUitOpen 16:cbb726ac20d8 489 *descriptor_l2 |= ((g_bit & 0x1) << PAGE_NG_SHIFT);
MikamiUitOpen 16:cbb726ac20d8 490 return 0;
MikamiUitOpen 16:cbb726ac20d8 491 }
MikamiUitOpen 16:cbb726ac20d8 492
MikamiUitOpen 16:cbb726ac20d8 493 /** \brief Set 4k/64k page Security attribute
MikamiUitOpen 16:cbb726ac20d8 494
MikamiUitOpen 16:cbb726ac20d8 495 The function sets 4k/64k page Global attribute
MikamiUitOpen 16:cbb726ac20d8 496
MikamiUitOpen 16:cbb726ac20d8 497 \param [out] descriptor_l1 L1 descriptor.
MikamiUitOpen 16:cbb726ac20d8 498 \param [in] s_bit 4k/64k page Security attribute: SECURE, NON_SECURE
MikamiUitOpen 16:cbb726ac20d8 499
MikamiUitOpen 16:cbb726ac20d8 500 \return 0
MikamiUitOpen 16:cbb726ac20d8 501 */
MikamiUitOpen 16:cbb726ac20d8 502 __STATIC_INLINE int __secure_page(uint32_t *descriptor_l1, mmu_secure_Type s_bit)
MikamiUitOpen 16:cbb726ac20d8 503 {
MikamiUitOpen 16:cbb726ac20d8 504 *descriptor_l1 &= PAGE_NS_MASK;
MikamiUitOpen 16:cbb726ac20d8 505 *descriptor_l1 |= ((s_bit & 0x1) << PAGE_NS_SHIFT);
MikamiUitOpen 16:cbb726ac20d8 506 return 0;
MikamiUitOpen 16:cbb726ac20d8 507 }
MikamiUitOpen 16:cbb726ac20d8 508
MikamiUitOpen 16:cbb726ac20d8 509
MikamiUitOpen 16:cbb726ac20d8 510 /** \brief Set Section memory attributes
MikamiUitOpen 16:cbb726ac20d8 511
MikamiUitOpen 16:cbb726ac20d8 512 The function sets section memory attributes
MikamiUitOpen 16:cbb726ac20d8 513
MikamiUitOpen 16:cbb726ac20d8 514 \param [out] descriptor_l1 L1 descriptor.
MikamiUitOpen 16:cbb726ac20d8 515 \param [in] mem Section memory type: NORMAL, DEVICE, SHARED_DEVICE, NON_SHARED_DEVICE, STRONGLY_ORDERED
MikamiUitOpen 16:cbb726ac20d8 516 \param [in] outer Outer cacheability: NON_CACHEABLE, WB_WA, WT, WB_NO_WA,
MikamiUitOpen 16:cbb726ac20d8 517 \param [in] inner Inner cacheability: NON_CACHEABLE, WB_WA, WT, WB_NO_WA,
MikamiUitOpen 16:cbb726ac20d8 518
MikamiUitOpen 16:cbb726ac20d8 519 \return 0
MikamiUitOpen 16:cbb726ac20d8 520 */
MikamiUitOpen 16:cbb726ac20d8 521 __STATIC_INLINE int __memory_section(uint32_t *descriptor_l1, mmu_memory_Type mem, mmu_cacheability_Type outer, mmu_cacheability_Type inner)
MikamiUitOpen 16:cbb726ac20d8 522 {
MikamiUitOpen 16:cbb726ac20d8 523 *descriptor_l1 &= SECTION_TEXCB_MASK;
MikamiUitOpen 16:cbb726ac20d8 524
MikamiUitOpen 16:cbb726ac20d8 525 if (STRONGLY_ORDERED == mem)
MikamiUitOpen 16:cbb726ac20d8 526 {
MikamiUitOpen 16:cbb726ac20d8 527 return 0;
MikamiUitOpen 16:cbb726ac20d8 528 }
MikamiUitOpen 16:cbb726ac20d8 529 else if (SHARED_DEVICE == mem)
MikamiUitOpen 16:cbb726ac20d8 530 {
MikamiUitOpen 16:cbb726ac20d8 531 *descriptor_l1 |= (1 << SECTION_B_SHIFT);
MikamiUitOpen 16:cbb726ac20d8 532 }
MikamiUitOpen 16:cbb726ac20d8 533 else if (NON_SHARED_DEVICE == mem)
MikamiUitOpen 16:cbb726ac20d8 534 {
MikamiUitOpen 16:cbb726ac20d8 535 *descriptor_l1 |= (1 << SECTION_TEX1_SHIFT);
MikamiUitOpen 16:cbb726ac20d8 536 }
MikamiUitOpen 16:cbb726ac20d8 537 else if (NORMAL == mem)
MikamiUitOpen 16:cbb726ac20d8 538 {
MikamiUitOpen 16:cbb726ac20d8 539 *descriptor_l1 |= 1 << SECTION_TEX2_SHIFT;
MikamiUitOpen 16:cbb726ac20d8 540 switch(inner)
MikamiUitOpen 16:cbb726ac20d8 541 {
MikamiUitOpen 16:cbb726ac20d8 542 case NON_CACHEABLE:
MikamiUitOpen 16:cbb726ac20d8 543 break;
MikamiUitOpen 16:cbb726ac20d8 544 case WB_WA:
MikamiUitOpen 16:cbb726ac20d8 545 *descriptor_l1 |= (1 << SECTION_B_SHIFT);
MikamiUitOpen 16:cbb726ac20d8 546 break;
MikamiUitOpen 16:cbb726ac20d8 547 case WT:
MikamiUitOpen 16:cbb726ac20d8 548 *descriptor_l1 |= 1 << SECTION_C_SHIFT;
MikamiUitOpen 16:cbb726ac20d8 549 break;
MikamiUitOpen 16:cbb726ac20d8 550 case WB_NO_WA:
MikamiUitOpen 16:cbb726ac20d8 551 *descriptor_l1 |= (1 << SECTION_B_SHIFT) | (1 << SECTION_C_SHIFT);
MikamiUitOpen 16:cbb726ac20d8 552 break;
MikamiUitOpen 16:cbb726ac20d8 553 }
MikamiUitOpen 16:cbb726ac20d8 554 switch(outer)
MikamiUitOpen 16:cbb726ac20d8 555 {
MikamiUitOpen 16:cbb726ac20d8 556 case NON_CACHEABLE:
MikamiUitOpen 16:cbb726ac20d8 557 break;
MikamiUitOpen 16:cbb726ac20d8 558 case WB_WA:
MikamiUitOpen 16:cbb726ac20d8 559 *descriptor_l1 |= (1 << SECTION_TEX0_SHIFT);
MikamiUitOpen 16:cbb726ac20d8 560 break;
MikamiUitOpen 16:cbb726ac20d8 561 case WT:
MikamiUitOpen 16:cbb726ac20d8 562 *descriptor_l1 |= 1 << SECTION_TEX1_SHIFT;
MikamiUitOpen 16:cbb726ac20d8 563 break;
MikamiUitOpen 16:cbb726ac20d8 564 case WB_NO_WA:
MikamiUitOpen 16:cbb726ac20d8 565 *descriptor_l1 |= (1 << SECTION_TEX0_SHIFT) | (1 << SECTION_TEX0_SHIFT);
MikamiUitOpen 16:cbb726ac20d8 566 break;
MikamiUitOpen 16:cbb726ac20d8 567 }
MikamiUitOpen 16:cbb726ac20d8 568 }
MikamiUitOpen 16:cbb726ac20d8 569
MikamiUitOpen 16:cbb726ac20d8 570 return 0;
MikamiUitOpen 16:cbb726ac20d8 571 }
MikamiUitOpen 16:cbb726ac20d8 572
MikamiUitOpen 16:cbb726ac20d8 573 /** \brief Set 4k/64k page memory attributes
MikamiUitOpen 16:cbb726ac20d8 574
MikamiUitOpen 16:cbb726ac20d8 575 The function sets 4k/64k page memory attributes
MikamiUitOpen 16:cbb726ac20d8 576
MikamiUitOpen 16:cbb726ac20d8 577 \param [out] descriptor_l2 L2 descriptor.
MikamiUitOpen 16:cbb726ac20d8 578 \param [in] mem 4k/64k page memory type: NORMAL, DEVICE, SHARED_DEVICE, NON_SHARED_DEVICE, STRONGLY_ORDERED
MikamiUitOpen 16:cbb726ac20d8 579 \param [in] outer Outer cacheability: NON_CACHEABLE, WB_WA, WT, WB_NO_WA,
MikamiUitOpen 16:cbb726ac20d8 580 \param [in] inner Inner cacheability: NON_CACHEABLE, WB_WA, WT, WB_NO_WA,
MikamiUitOpen 16:cbb726ac20d8 581
MikamiUitOpen 16:cbb726ac20d8 582 \return 0
MikamiUitOpen 16:cbb726ac20d8 583 */
MikamiUitOpen 16:cbb726ac20d8 584 __STATIC_INLINE int __memory_page(uint32_t *descriptor_l2, mmu_memory_Type mem, mmu_cacheability_Type outer, mmu_cacheability_Type inner, mmu_region_size_Type page)
MikamiUitOpen 16:cbb726ac20d8 585 {
MikamiUitOpen 16:cbb726ac20d8 586 *descriptor_l2 &= PAGE_4K_TEXCB_MASK;
MikamiUitOpen 16:cbb726ac20d8 587
MikamiUitOpen 16:cbb726ac20d8 588 if (page == PAGE_64k)
MikamiUitOpen 16:cbb726ac20d8 589 {
MikamiUitOpen 16:cbb726ac20d8 590 //same as section
MikamiUitOpen 16:cbb726ac20d8 591 __memory_section(descriptor_l2, mem, outer, inner);
MikamiUitOpen 16:cbb726ac20d8 592 }
MikamiUitOpen 16:cbb726ac20d8 593 else
MikamiUitOpen 16:cbb726ac20d8 594 {
MikamiUitOpen 16:cbb726ac20d8 595 if (STRONGLY_ORDERED == mem)
MikamiUitOpen 16:cbb726ac20d8 596 {
MikamiUitOpen 16:cbb726ac20d8 597 return 0;
MikamiUitOpen 16:cbb726ac20d8 598 }
MikamiUitOpen 16:cbb726ac20d8 599 else if (SHARED_DEVICE == mem)
MikamiUitOpen 16:cbb726ac20d8 600 {
MikamiUitOpen 16:cbb726ac20d8 601 *descriptor_l2 |= (1 << PAGE_4K_B_SHIFT);
MikamiUitOpen 16:cbb726ac20d8 602 }
MikamiUitOpen 16:cbb726ac20d8 603 else if (NON_SHARED_DEVICE == mem)
MikamiUitOpen 16:cbb726ac20d8 604 {
MikamiUitOpen 16:cbb726ac20d8 605 *descriptor_l2 |= (1 << PAGE_4K_TEX1_SHIFT);
MikamiUitOpen 16:cbb726ac20d8 606 }
MikamiUitOpen 16:cbb726ac20d8 607 else if (NORMAL == mem)
MikamiUitOpen 16:cbb726ac20d8 608 {
MikamiUitOpen 16:cbb726ac20d8 609 *descriptor_l2 |= 1 << PAGE_4K_TEX2_SHIFT;
MikamiUitOpen 16:cbb726ac20d8 610 switch(inner)
MikamiUitOpen 16:cbb726ac20d8 611 {
MikamiUitOpen 16:cbb726ac20d8 612 case NON_CACHEABLE:
MikamiUitOpen 16:cbb726ac20d8 613 break;
MikamiUitOpen 16:cbb726ac20d8 614 case WB_WA:
MikamiUitOpen 16:cbb726ac20d8 615 *descriptor_l2 |= (1 << PAGE_4K_B_SHIFT);
MikamiUitOpen 16:cbb726ac20d8 616 break;
MikamiUitOpen 16:cbb726ac20d8 617 case WT:
MikamiUitOpen 16:cbb726ac20d8 618 *descriptor_l2 |= 1 << PAGE_4K_C_SHIFT;
MikamiUitOpen 16:cbb726ac20d8 619 break;
MikamiUitOpen 16:cbb726ac20d8 620 case WB_NO_WA:
MikamiUitOpen 16:cbb726ac20d8 621 *descriptor_l2 |= (1 << PAGE_4K_B_SHIFT) | (1 << PAGE_4K_C_SHIFT);
MikamiUitOpen 16:cbb726ac20d8 622 break;
MikamiUitOpen 16:cbb726ac20d8 623 }
MikamiUitOpen 16:cbb726ac20d8 624 switch(outer)
MikamiUitOpen 16:cbb726ac20d8 625 {
MikamiUitOpen 16:cbb726ac20d8 626 case NON_CACHEABLE:
MikamiUitOpen 16:cbb726ac20d8 627 break;
MikamiUitOpen 16:cbb726ac20d8 628 case WB_WA:
MikamiUitOpen 16:cbb726ac20d8 629 *descriptor_l2 |= (1 << PAGE_4K_TEX0_SHIFT);
MikamiUitOpen 16:cbb726ac20d8 630 break;
MikamiUitOpen 16:cbb726ac20d8 631 case WT:
MikamiUitOpen 16:cbb726ac20d8 632 *descriptor_l2 |= 1 << PAGE_4K_TEX1_SHIFT;
MikamiUitOpen 16:cbb726ac20d8 633 break;
MikamiUitOpen 16:cbb726ac20d8 634 case WB_NO_WA:
MikamiUitOpen 16:cbb726ac20d8 635 *descriptor_l2 |= (1 << PAGE_4K_TEX0_SHIFT) | (1 << PAGE_4K_TEX0_SHIFT);
MikamiUitOpen 16:cbb726ac20d8 636 break;
MikamiUitOpen 16:cbb726ac20d8 637 }
MikamiUitOpen 16:cbb726ac20d8 638 }
MikamiUitOpen 16:cbb726ac20d8 639 }
MikamiUitOpen 16:cbb726ac20d8 640
MikamiUitOpen 16:cbb726ac20d8 641 return 0;
MikamiUitOpen 16:cbb726ac20d8 642 }
MikamiUitOpen 16:cbb726ac20d8 643
MikamiUitOpen 16:cbb726ac20d8 644 /** \brief Create a L1 section descriptor
MikamiUitOpen 16:cbb726ac20d8 645
MikamiUitOpen 16:cbb726ac20d8 646 The function creates a section descriptor.
MikamiUitOpen 16:cbb726ac20d8 647
MikamiUitOpen 16:cbb726ac20d8 648 Assumptions:
MikamiUitOpen 16:cbb726ac20d8 649 - 16MB super sections not supported
MikamiUitOpen 16:cbb726ac20d8 650 - TEX remap disabled, so memory type and attributes are described directly by bits in the descriptor
MikamiUitOpen 16:cbb726ac20d8 651 - Functions always return 0
MikamiUitOpen 16:cbb726ac20d8 652
MikamiUitOpen 16:cbb726ac20d8 653 \param [out] descriptor L1 descriptor
MikamiUitOpen 16:cbb726ac20d8 654 \param [out] descriptor2 L2 descriptor
MikamiUitOpen 16:cbb726ac20d8 655 \param [in] reg Section attributes
MikamiUitOpen 16:cbb726ac20d8 656
MikamiUitOpen 16:cbb726ac20d8 657 \return 0
MikamiUitOpen 16:cbb726ac20d8 658 */
MikamiUitOpen 16:cbb726ac20d8 659 __STATIC_INLINE int __get_section_descriptor(uint32_t *descriptor, mmu_region_attributes_Type reg)
MikamiUitOpen 16:cbb726ac20d8 660 {
MikamiUitOpen 16:cbb726ac20d8 661 *descriptor = 0;
MikamiUitOpen 16:cbb726ac20d8 662
MikamiUitOpen 16:cbb726ac20d8 663 __memory_section(descriptor, reg.mem_t, reg.outer_norm_t, reg.inner_norm_t);
MikamiUitOpen 16:cbb726ac20d8 664 __xn_section(descriptor,reg.xn_t);
MikamiUitOpen 16:cbb726ac20d8 665 __domain_section(descriptor, reg.domain);
MikamiUitOpen 16:cbb726ac20d8 666 __p_section(descriptor, reg.e_t);
MikamiUitOpen 16:cbb726ac20d8 667 __ap_section(descriptor, reg.priv_t, reg.user_t, 1);
MikamiUitOpen 16:cbb726ac20d8 668 __shared_section(descriptor,reg.sh_t);
MikamiUitOpen 16:cbb726ac20d8 669 __global_section(descriptor,reg.g_t);
MikamiUitOpen 16:cbb726ac20d8 670 __secure_section(descriptor,reg.sec_t);
MikamiUitOpen 16:cbb726ac20d8 671 *descriptor &= SECTION_MASK;
MikamiUitOpen 16:cbb726ac20d8 672 *descriptor |= SECTION_DESCRIPTOR;
MikamiUitOpen 16:cbb726ac20d8 673
MikamiUitOpen 16:cbb726ac20d8 674 return 0;
MikamiUitOpen 16:cbb726ac20d8 675
MikamiUitOpen 16:cbb726ac20d8 676 }
MikamiUitOpen 16:cbb726ac20d8 677
MikamiUitOpen 16:cbb726ac20d8 678
MikamiUitOpen 16:cbb726ac20d8 679 /** \brief Create a L1 and L2 4k/64k page descriptor
MikamiUitOpen 16:cbb726ac20d8 680
MikamiUitOpen 16:cbb726ac20d8 681 The function creates a 4k/64k page descriptor.
MikamiUitOpen 16:cbb726ac20d8 682 Assumptions:
MikamiUitOpen 16:cbb726ac20d8 683 - TEX remap disabled, so memory type and attributes are described directly by bits in the descriptor
MikamiUitOpen 16:cbb726ac20d8 684 - Functions always return 0
MikamiUitOpen 16:cbb726ac20d8 685
MikamiUitOpen 16:cbb726ac20d8 686 \param [out] descriptor L1 descriptor
MikamiUitOpen 16:cbb726ac20d8 687 \param [out] descriptor2 L2 descriptor
MikamiUitOpen 16:cbb726ac20d8 688 \param [in] reg 4k/64k page attributes
MikamiUitOpen 16:cbb726ac20d8 689
MikamiUitOpen 16:cbb726ac20d8 690 \return 0
MikamiUitOpen 16:cbb726ac20d8 691 */
MikamiUitOpen 16:cbb726ac20d8 692 __STATIC_INLINE int __get_page_descriptor(uint32_t *descriptor, uint32_t *descriptor2, mmu_region_attributes_Type reg)
MikamiUitOpen 16:cbb726ac20d8 693 {
MikamiUitOpen 16:cbb726ac20d8 694 *descriptor = 0;
MikamiUitOpen 16:cbb726ac20d8 695 *descriptor2 = 0;
MikamiUitOpen 16:cbb726ac20d8 696
MikamiUitOpen 16:cbb726ac20d8 697 switch (reg.rg_t)
MikamiUitOpen 16:cbb726ac20d8 698 {
MikamiUitOpen 16:cbb726ac20d8 699 case PAGE_4k:
MikamiUitOpen 16:cbb726ac20d8 700 __memory_page(descriptor2, reg.mem_t, reg.outer_norm_t, reg.inner_norm_t, PAGE_4k);
MikamiUitOpen 16:cbb726ac20d8 701 __xn_page(descriptor2, reg.xn_t, PAGE_4k);
MikamiUitOpen 16:cbb726ac20d8 702 __domain_page(descriptor, reg.domain);
MikamiUitOpen 16:cbb726ac20d8 703 __p_page(descriptor, reg.e_t);
MikamiUitOpen 16:cbb726ac20d8 704 __ap_page(descriptor2, reg.priv_t, reg.user_t, 1);
MikamiUitOpen 16:cbb726ac20d8 705 __shared_page(descriptor2,reg.sh_t);
MikamiUitOpen 16:cbb726ac20d8 706 __global_page(descriptor2,reg.g_t);
MikamiUitOpen 16:cbb726ac20d8 707 __secure_page(descriptor,reg.sec_t);
MikamiUitOpen 16:cbb726ac20d8 708 *descriptor &= PAGE_L1_MASK;
MikamiUitOpen 16:cbb726ac20d8 709 *descriptor |= PAGE_L1_DESCRIPTOR;
MikamiUitOpen 16:cbb726ac20d8 710 *descriptor2 &= PAGE_L2_4K_MASK;
MikamiUitOpen 16:cbb726ac20d8 711 *descriptor2 |= PAGE_L2_4K_DESC;
MikamiUitOpen 16:cbb726ac20d8 712 break;
MikamiUitOpen 16:cbb726ac20d8 713
MikamiUitOpen 16:cbb726ac20d8 714 case PAGE_64k:
MikamiUitOpen 16:cbb726ac20d8 715 __memory_page(descriptor2, reg.mem_t, reg.outer_norm_t, reg.inner_norm_t, PAGE_64k);
MikamiUitOpen 16:cbb726ac20d8 716 __xn_page(descriptor2, reg.xn_t, PAGE_64k);
MikamiUitOpen 16:cbb726ac20d8 717 __domain_page(descriptor, reg.domain);
MikamiUitOpen 16:cbb726ac20d8 718 __p_page(descriptor, reg.e_t);
MikamiUitOpen 16:cbb726ac20d8 719 __ap_page(descriptor2, reg.priv_t, reg.user_t, 1);
MikamiUitOpen 16:cbb726ac20d8 720 __shared_page(descriptor2,reg.sh_t);
MikamiUitOpen 16:cbb726ac20d8 721 __global_page(descriptor2,reg.g_t);
MikamiUitOpen 16:cbb726ac20d8 722 __secure_page(descriptor,reg.sec_t);
MikamiUitOpen 16:cbb726ac20d8 723 *descriptor &= PAGE_L1_MASK;
MikamiUitOpen 16:cbb726ac20d8 724 *descriptor |= PAGE_L1_DESCRIPTOR;
MikamiUitOpen 16:cbb726ac20d8 725 *descriptor2 &= PAGE_L2_64K_MASK;
MikamiUitOpen 16:cbb726ac20d8 726 *descriptor2 |= PAGE_L2_64K_DESC;
MikamiUitOpen 16:cbb726ac20d8 727 break;
MikamiUitOpen 16:cbb726ac20d8 728
MikamiUitOpen 16:cbb726ac20d8 729 case SECTION:
MikamiUitOpen 16:cbb726ac20d8 730 //error
MikamiUitOpen 16:cbb726ac20d8 731 break;
MikamiUitOpen 16:cbb726ac20d8 732
MikamiUitOpen 16:cbb726ac20d8 733 }
MikamiUitOpen 16:cbb726ac20d8 734
MikamiUitOpen 16:cbb726ac20d8 735 return 0;
MikamiUitOpen 16:cbb726ac20d8 736
MikamiUitOpen 16:cbb726ac20d8 737 }
MikamiUitOpen 16:cbb726ac20d8 738
MikamiUitOpen 16:cbb726ac20d8 739 /** \brief Create a 1MB Section
MikamiUitOpen 16:cbb726ac20d8 740
MikamiUitOpen 16:cbb726ac20d8 741 \param [in] ttb Translation table base address
MikamiUitOpen 16:cbb726ac20d8 742 \param [in] base_address Section base address
MikamiUitOpen 16:cbb726ac20d8 743 \param [in] count Number of sections to create
MikamiUitOpen 16:cbb726ac20d8 744 \param [in] descriptor_l1 L1 descriptor (region attributes)
MikamiUitOpen 16:cbb726ac20d8 745
MikamiUitOpen 16:cbb726ac20d8 746 */
MikamiUitOpen 16:cbb726ac20d8 747 __STATIC_INLINE void __TTSection(uint32_t *ttb, uint32_t base_address, uint32_t count, uint32_t descriptor_l1)
MikamiUitOpen 16:cbb726ac20d8 748 {
MikamiUitOpen 16:cbb726ac20d8 749 uint32_t offset;
MikamiUitOpen 16:cbb726ac20d8 750 uint32_t entry;
MikamiUitOpen 16:cbb726ac20d8 751 uint32_t i;
MikamiUitOpen 16:cbb726ac20d8 752
MikamiUitOpen 16:cbb726ac20d8 753 offset = base_address >> 20;
MikamiUitOpen 16:cbb726ac20d8 754 entry = (base_address & 0xFFF00000) | descriptor_l1;
MikamiUitOpen 16:cbb726ac20d8 755
MikamiUitOpen 16:cbb726ac20d8 756 //4 bytes aligned
MikamiUitOpen 16:cbb726ac20d8 757 ttb = ttb + offset;
MikamiUitOpen 16:cbb726ac20d8 758
MikamiUitOpen 16:cbb726ac20d8 759 for (i = 0; i < count; i++ )
MikamiUitOpen 16:cbb726ac20d8 760 {
MikamiUitOpen 16:cbb726ac20d8 761 //4 bytes aligned
MikamiUitOpen 16:cbb726ac20d8 762 *ttb++ = entry;
MikamiUitOpen 16:cbb726ac20d8 763 entry += OFFSET_1M;
MikamiUitOpen 16:cbb726ac20d8 764 }
MikamiUitOpen 16:cbb726ac20d8 765 }
MikamiUitOpen 16:cbb726ac20d8 766
MikamiUitOpen 16:cbb726ac20d8 767 /** \brief Create a 4k page entry
MikamiUitOpen 16:cbb726ac20d8 768
MikamiUitOpen 16:cbb726ac20d8 769 \param [in] ttb L1 table base address
MikamiUitOpen 16:cbb726ac20d8 770 \param [in] base_address 4k base address
MikamiUitOpen 16:cbb726ac20d8 771 \param [in] count Number of 4k pages to create
MikamiUitOpen 16:cbb726ac20d8 772 \param [in] descriptor_l1 L1 descriptor (region attributes)
MikamiUitOpen 16:cbb726ac20d8 773 \param [in] ttb_l2 L2 table base address
MikamiUitOpen 16:cbb726ac20d8 774 \param [in] descriptor_l2 L2 descriptor (region attributes)
MikamiUitOpen 16:cbb726ac20d8 775
MikamiUitOpen 16:cbb726ac20d8 776 */
MikamiUitOpen 16:cbb726ac20d8 777 __STATIC_INLINE void __TTPage_4k(uint32_t *ttb, uint32_t base_address, uint32_t count, uint32_t descriptor_l1, uint32_t *ttb_l2, uint32_t descriptor_l2 )
MikamiUitOpen 16:cbb726ac20d8 778 {
MikamiUitOpen 16:cbb726ac20d8 779
MikamiUitOpen 16:cbb726ac20d8 780 uint32_t offset, offset2;
MikamiUitOpen 16:cbb726ac20d8 781 uint32_t entry, entry2;
MikamiUitOpen 16:cbb726ac20d8 782 uint32_t i;
MikamiUitOpen 16:cbb726ac20d8 783
MikamiUitOpen 16:cbb726ac20d8 784
MikamiUitOpen 16:cbb726ac20d8 785 offset = base_address >> 20;
MikamiUitOpen 16:cbb726ac20d8 786 entry = ((int)ttb_l2 & 0xFFFFFC00) | descriptor_l1;
MikamiUitOpen 16:cbb726ac20d8 787
MikamiUitOpen 16:cbb726ac20d8 788 //4 bytes aligned
MikamiUitOpen 16:cbb726ac20d8 789 ttb += offset;
MikamiUitOpen 16:cbb726ac20d8 790 //create l1_entry
MikamiUitOpen 16:cbb726ac20d8 791 *ttb = entry;
MikamiUitOpen 16:cbb726ac20d8 792
MikamiUitOpen 16:cbb726ac20d8 793 offset2 = (base_address & 0xff000) >> 12;
MikamiUitOpen 16:cbb726ac20d8 794 ttb_l2 += offset2;
MikamiUitOpen 16:cbb726ac20d8 795 entry2 = (base_address & 0xFFFFF000) | descriptor_l2;
MikamiUitOpen 16:cbb726ac20d8 796 for (i = 0; i < count; i++ )
MikamiUitOpen 16:cbb726ac20d8 797 {
MikamiUitOpen 16:cbb726ac20d8 798 //4 bytes aligned
MikamiUitOpen 16:cbb726ac20d8 799 *ttb_l2++ = entry2;
MikamiUitOpen 16:cbb726ac20d8 800 entry2 += OFFSET_4K;
MikamiUitOpen 16:cbb726ac20d8 801 }
MikamiUitOpen 16:cbb726ac20d8 802 }
MikamiUitOpen 16:cbb726ac20d8 803
MikamiUitOpen 16:cbb726ac20d8 804 /** \brief Create a 64k page entry
MikamiUitOpen 16:cbb726ac20d8 805
MikamiUitOpen 16:cbb726ac20d8 806 \param [in] ttb L1 table base address
MikamiUitOpen 16:cbb726ac20d8 807 \param [in] base_address 64k base address
MikamiUitOpen 16:cbb726ac20d8 808 \param [in] count Number of 64k pages to create
MikamiUitOpen 16:cbb726ac20d8 809 \param [in] descriptor_l1 L1 descriptor (region attributes)
MikamiUitOpen 16:cbb726ac20d8 810 \param [in] ttb_l2 L2 table base address
MikamiUitOpen 16:cbb726ac20d8 811 \param [in] descriptor_l2 L2 descriptor (region attributes)
MikamiUitOpen 16:cbb726ac20d8 812
MikamiUitOpen 16:cbb726ac20d8 813 */
MikamiUitOpen 16:cbb726ac20d8 814 __STATIC_INLINE void __TTPage_64k(uint32_t *ttb, uint32_t base_address, uint32_t count, uint32_t descriptor_l1, uint32_t *ttb_l2, uint32_t descriptor_l2 )
MikamiUitOpen 16:cbb726ac20d8 815 {
MikamiUitOpen 16:cbb726ac20d8 816 uint32_t offset, offset2;
MikamiUitOpen 16:cbb726ac20d8 817 uint32_t entry, entry2;
MikamiUitOpen 16:cbb726ac20d8 818 uint32_t i,j;
MikamiUitOpen 16:cbb726ac20d8 819
MikamiUitOpen 16:cbb726ac20d8 820
MikamiUitOpen 16:cbb726ac20d8 821 offset = base_address >> 20;
MikamiUitOpen 16:cbb726ac20d8 822 entry = ((int)ttb_l2 & 0xFFFFFC00) | descriptor_l1;
MikamiUitOpen 16:cbb726ac20d8 823
MikamiUitOpen 16:cbb726ac20d8 824 //4 bytes aligned
MikamiUitOpen 16:cbb726ac20d8 825 ttb += offset;
MikamiUitOpen 16:cbb726ac20d8 826 //create l1_entry
MikamiUitOpen 16:cbb726ac20d8 827 *ttb = entry;
MikamiUitOpen 16:cbb726ac20d8 828
MikamiUitOpen 16:cbb726ac20d8 829 offset2 = (base_address & 0xff000) >> 12;
MikamiUitOpen 16:cbb726ac20d8 830 ttb_l2 += offset2;
MikamiUitOpen 16:cbb726ac20d8 831 entry2 = (base_address & 0xFFFF0000) | descriptor_l2;
MikamiUitOpen 16:cbb726ac20d8 832 for (i = 0; i < count; i++ )
MikamiUitOpen 16:cbb726ac20d8 833 {
MikamiUitOpen 16:cbb726ac20d8 834 //create 16 entries
MikamiUitOpen 16:cbb726ac20d8 835 for (j = 0; j < 16; j++)
MikamiUitOpen 16:cbb726ac20d8 836 //4 bytes aligned
MikamiUitOpen 16:cbb726ac20d8 837 *ttb_l2++ = entry2;
MikamiUitOpen 16:cbb726ac20d8 838 entry2 += OFFSET_64K;
MikamiUitOpen 16:cbb726ac20d8 839 }
MikamiUitOpen 16:cbb726ac20d8 840 }
MikamiUitOpen 16:cbb726ac20d8 841
MikamiUitOpen 16:cbb726ac20d8 842 /*@} end of MMU_Functions */
MikamiUitOpen 16:cbb726ac20d8 843 #endif
MikamiUitOpen 16:cbb726ac20d8 844
MikamiUitOpen 16:cbb726ac20d8 845 #ifdef __cplusplus
MikamiUitOpen 16:cbb726ac20d8 846 }
MikamiUitOpen 16:cbb726ac20d8 847 #endif