不韋 呂 / F746_SD_GraphicEqualizer

Output the audio signal with filtering by graphic equalizer in the *.wav file on the SD card using onboard CODEC. SD カードの *.wav ファイルのオーディオ信号をグラフィック･イコライザを通して，ボードに搭載されているCODEC で出力する．

Dependencies:   F746_GUI F746_SAI_IO SD_PlayerSkeleton FrequencyResponseDrawer

mbed_src_STM32F7/targets/cmsis/core_ca9.h@24:f78f9d0ac262, 2017-04-10 (annotated)

Committer:
MikamiUitOpen
Date:
Mon Apr 10 04:07:35 2017 +0000
Revision:
24:f78f9d0ac262
Parent:
16:cbb726ac20d8 
25

Who changed what in which revision?

UserRevisionLine numberNew contents of line
MikamiUitOpen 16:cbb726ac20d8 1 /**************************************************************************//**
MikamiUitOpen 16:cbb726ac20d8 2 * @file core_ca9.h
MikamiUitOpen 16:cbb726ac20d8 3 * @brief CMSIS Cortex-A9 Core Peripheral Access Layer Header File
MikamiUitOpen 16:cbb726ac20d8 4 * @version
MikamiUitOpen 16:cbb726ac20d8 5 * @date 25 March 2013
MikamiUitOpen 16:cbb726ac20d8 6 *
MikamiUitOpen 16:cbb726ac20d8 7 * @note
MikamiUitOpen 16:cbb726ac20d8 8 *
MikamiUitOpen 16:cbb726ac20d8 9 ******************************************************************************/
MikamiUitOpen 16:cbb726ac20d8 10 /* Copyright (c) 2009 - 2012 ARM LIMITED
MikamiUitOpen 16:cbb726ac20d8 11
MikamiUitOpen 16:cbb726ac20d8 12 All rights reserved.
MikamiUitOpen 16:cbb726ac20d8 13 Redistribution and use in source and binary forms, with or without
MikamiUitOpen 16:cbb726ac20d8 14 modification, are permitted provided that the following conditions are met:
MikamiUitOpen 16:cbb726ac20d8 15 - Redistributions of source code must retain the above copyright
MikamiUitOpen 16:cbb726ac20d8 16 notice, this list of conditions and the following disclaimer.
MikamiUitOpen 16:cbb726ac20d8 17 - Redistributions in binary form must reproduce the above copyright
MikamiUitOpen 16:cbb726ac20d8 18 notice, this list of conditions and the following disclaimer in the
MikamiUitOpen 16:cbb726ac20d8 19 documentation and/or other materials provided with the distribution.
MikamiUitOpen 16:cbb726ac20d8 20 - Neither the name of ARM nor the names of its contributors may be used
MikamiUitOpen 16:cbb726ac20d8 21 to endorse or promote products derived from this software without
MikamiUitOpen 16:cbb726ac20d8 22 specific prior written permission.
MikamiUitOpen 16:cbb726ac20d8 23 *
MikamiUitOpen 16:cbb726ac20d8 24 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
MikamiUitOpen 16:cbb726ac20d8 25 AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
MikamiUitOpen 16:cbb726ac20d8 26 IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
MikamiUitOpen 16:cbb726ac20d8 27 ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
MikamiUitOpen 16:cbb726ac20d8 28 LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
MikamiUitOpen 16:cbb726ac20d8 29 CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
MikamiUitOpen 16:cbb726ac20d8 30 SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
MikamiUitOpen 16:cbb726ac20d8 31 INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
MikamiUitOpen 16:cbb726ac20d8 32 CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
MikamiUitOpen 16:cbb726ac20d8 33 ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
MikamiUitOpen 16:cbb726ac20d8 34 POSSIBILITY OF SUCH DAMAGE.
MikamiUitOpen 16:cbb726ac20d8 35 ---------------------------------------------------------------------------*/
MikamiUitOpen 16:cbb726ac20d8 36
MikamiUitOpen 16:cbb726ac20d8 37
MikamiUitOpen 16:cbb726ac20d8 38 #if defined ( __ICCARM__ )
MikamiUitOpen 16:cbb726ac20d8 39 #pragma system_include /* treat file as system include file for MISRA check */
MikamiUitOpen 16:cbb726ac20d8 40 #endif
MikamiUitOpen 16:cbb726ac20d8 41
MikamiUitOpen 16:cbb726ac20d8 42 #ifdef __cplusplus
MikamiUitOpen 16:cbb726ac20d8 43 extern "C" {
MikamiUitOpen 16:cbb726ac20d8 44 #endif
MikamiUitOpen 16:cbb726ac20d8 45
MikamiUitOpen 16:cbb726ac20d8 46 #ifndef __CORE_CA9_H_GENERIC
MikamiUitOpen 16:cbb726ac20d8 47 #define __CORE_CA9_H_GENERIC
MikamiUitOpen 16:cbb726ac20d8 48
MikamiUitOpen 16:cbb726ac20d8 49
MikamiUitOpen 16:cbb726ac20d8 50 /** \page CMSIS_MISRA_Exceptions MISRA-C:2004 Compliance Exceptions
MikamiUitOpen 16:cbb726ac20d8 51 CMSIS violates the following MISRA-C:2004 rules:
MikamiUitOpen 16:cbb726ac20d8 52
MikamiUitOpen 16:cbb726ac20d8 53 \li Required Rule 8.5, object/function definition in header file.<br>
MikamiUitOpen 16:cbb726ac20d8 54 Function definitions in header files are used to allow 'inlining'.
MikamiUitOpen 16:cbb726ac20d8 55
MikamiUitOpen 16:cbb726ac20d8 56 \li Required Rule 18.4, declaration of union type or object of union type: '{...}'.<br>
MikamiUitOpen 16:cbb726ac20d8 57 Unions are used for effective representation of core registers.
MikamiUitOpen 16:cbb726ac20d8 58
MikamiUitOpen 16:cbb726ac20d8 59 \li Advisory Rule 19.7, Function-like macro defined.<br>
MikamiUitOpen 16:cbb726ac20d8 60 Function-like macros are used to allow more efficient code.
MikamiUitOpen 16:cbb726ac20d8 61 */
MikamiUitOpen 16:cbb726ac20d8 62
MikamiUitOpen 16:cbb726ac20d8 63
MikamiUitOpen 16:cbb726ac20d8 64 /*******************************************************************************
MikamiUitOpen 16:cbb726ac20d8 65 * CMSIS definitions
MikamiUitOpen 16:cbb726ac20d8 66 ******************************************************************************/
MikamiUitOpen 16:cbb726ac20d8 67 /** \ingroup Cortex_A9
MikamiUitOpen 16:cbb726ac20d8 68 @{
MikamiUitOpen 16:cbb726ac20d8 69 */
MikamiUitOpen 16:cbb726ac20d8 70
MikamiUitOpen 16:cbb726ac20d8 71 /* CMSIS CA9 definitions */
MikamiUitOpen 16:cbb726ac20d8 72 #define __CA9_CMSIS_VERSION_MAIN (0x03) /*!< [31:16] CMSIS HAL main version */
MikamiUitOpen 16:cbb726ac20d8 73 #define __CA9_CMSIS_VERSION_SUB (0x10) /*!< [15:0] CMSIS HAL sub version */
MikamiUitOpen 16:cbb726ac20d8 74 #define __CA9_CMSIS_VERSION ((__CA9_CMSIS_VERSION_MAIN << 16) | \
MikamiUitOpen 16:cbb726ac20d8 75 __CA9_CMSIS_VERSION_SUB ) /*!< CMSIS HAL version number */
MikamiUitOpen 16:cbb726ac20d8 76
MikamiUitOpen 16:cbb726ac20d8 77 #define __CORTEX_A (0x09) /*!< Cortex-A Core */
MikamiUitOpen 16:cbb726ac20d8 78
MikamiUitOpen 16:cbb726ac20d8 79
MikamiUitOpen 16:cbb726ac20d8 80 #if defined ( __CC_ARM )
MikamiUitOpen 16:cbb726ac20d8 81 #define __ASM __asm /*!< asm keyword for ARM Compiler */
MikamiUitOpen 16:cbb726ac20d8 82 #define __INLINE __inline /*!< inline keyword for ARM Compiler */
MikamiUitOpen 16:cbb726ac20d8 83 #define __STATIC_INLINE static __inline
MikamiUitOpen 16:cbb726ac20d8 84 #define __STATIC_ASM static __asm
MikamiUitOpen 16:cbb726ac20d8 85
MikamiUitOpen 16:cbb726ac20d8 86 #elif defined ( __ICCARM__ )
MikamiUitOpen 16:cbb726ac20d8 87 #define __ASM __asm /*!< asm keyword for IAR Compiler */
MikamiUitOpen 16:cbb726ac20d8 88 #define __INLINE inline /*!< inline keyword for IAR Compiler. Only available in High optimization mode! */
MikamiUitOpen 16:cbb726ac20d8 89 #define __STATIC_INLINE static inline
MikamiUitOpen 16:cbb726ac20d8 90 #define __STATIC_ASM static __asm
MikamiUitOpen 16:cbb726ac20d8 91
MikamiUitOpen 16:cbb726ac20d8 92 #include <stdint.h>
MikamiUitOpen 16:cbb726ac20d8 93 inline uint32_t __get_PSR(void) {
MikamiUitOpen 16:cbb726ac20d8 94 __ASM("mrs r0, cpsr");
MikamiUitOpen 16:cbb726ac20d8 95 }
MikamiUitOpen 16:cbb726ac20d8 96
MikamiUitOpen 16:cbb726ac20d8 97 #elif defined ( __TMS470__ )
MikamiUitOpen 16:cbb726ac20d8 98 #define __ASM __asm /*!< asm keyword for TI CCS Compiler */
MikamiUitOpen 16:cbb726ac20d8 99 #define __STATIC_INLINE static inline
MikamiUitOpen 16:cbb726ac20d8 100 #define __STATIC_ASM static __asm
MikamiUitOpen 16:cbb726ac20d8 101
MikamiUitOpen 16:cbb726ac20d8 102 #elif defined ( __GNUC__ )
MikamiUitOpen 16:cbb726ac20d8 103 #define __ASM __asm /*!< asm keyword for GNU Compiler */
MikamiUitOpen 16:cbb726ac20d8 104 #define __INLINE inline /*!< inline keyword for GNU Compiler */
MikamiUitOpen 16:cbb726ac20d8 105 #define __STATIC_INLINE static inline
MikamiUitOpen 16:cbb726ac20d8 106 #define __STATIC_ASM static __asm
MikamiUitOpen 16:cbb726ac20d8 107
MikamiUitOpen 16:cbb726ac20d8 108 #elif defined ( __TASKING__ )
MikamiUitOpen 16:cbb726ac20d8 109 #define __ASM __asm /*!< asm keyword for TASKING Compiler */
MikamiUitOpen 16:cbb726ac20d8 110 #define __INLINE inline /*!< inline keyword for TASKING Compiler */
MikamiUitOpen 16:cbb726ac20d8 111 #define __STATIC_INLINE static inline
MikamiUitOpen 16:cbb726ac20d8 112 #define __STATIC_ASM static __asm
MikamiUitOpen 16:cbb726ac20d8 113
MikamiUitOpen 16:cbb726ac20d8 114 #endif
MikamiUitOpen 16:cbb726ac20d8 115
MikamiUitOpen 16:cbb726ac20d8 116 /** __FPU_USED indicates whether an FPU is used or not. For this, __FPU_PRESENT has to be checked prior to making use of FPU specific registers and functions.
MikamiUitOpen 16:cbb726ac20d8 117 */
MikamiUitOpen 16:cbb726ac20d8 118 #if defined ( __CC_ARM )
MikamiUitOpen 16:cbb726ac20d8 119 #if defined __TARGET_FPU_VFP
MikamiUitOpen 16:cbb726ac20d8 120 #if (__FPU_PRESENT == 1)
MikamiUitOpen 16:cbb726ac20d8 121 #define __FPU_USED 1
MikamiUitOpen 16:cbb726ac20d8 122 #else
MikamiUitOpen 16:cbb726ac20d8 123 #warning "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
MikamiUitOpen 16:cbb726ac20d8 124 #define __FPU_USED 0
MikamiUitOpen 16:cbb726ac20d8 125 #endif
MikamiUitOpen 16:cbb726ac20d8 126 #else
MikamiUitOpen 16:cbb726ac20d8 127 #define __FPU_USED 0
MikamiUitOpen 16:cbb726ac20d8 128 #endif
MikamiUitOpen 16:cbb726ac20d8 129
MikamiUitOpen 16:cbb726ac20d8 130 #elif defined ( __ICCARM__ )
MikamiUitOpen 16:cbb726ac20d8 131 #if defined __ARMVFP__
MikamiUitOpen 16:cbb726ac20d8 132 #if (__FPU_PRESENT == 1)
MikamiUitOpen 16:cbb726ac20d8 133 #define __FPU_USED 1
MikamiUitOpen 16:cbb726ac20d8 134 #else
MikamiUitOpen 16:cbb726ac20d8 135 #warning "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
MikamiUitOpen 16:cbb726ac20d8 136 #define __FPU_USED 0
MikamiUitOpen 16:cbb726ac20d8 137 #endif
MikamiUitOpen 16:cbb726ac20d8 138 #else
MikamiUitOpen 16:cbb726ac20d8 139 #define __FPU_USED 0
MikamiUitOpen 16:cbb726ac20d8 140 #endif
MikamiUitOpen 16:cbb726ac20d8 141
MikamiUitOpen 16:cbb726ac20d8 142 #elif defined ( __TMS470__ )
MikamiUitOpen 16:cbb726ac20d8 143 #if defined __TI_VFP_SUPPORT__
MikamiUitOpen 16:cbb726ac20d8 144 #if (__FPU_PRESENT == 1)
MikamiUitOpen 16:cbb726ac20d8 145 #define __FPU_USED 1
MikamiUitOpen 16:cbb726ac20d8 146 #else
MikamiUitOpen 16:cbb726ac20d8 147 #warning "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
MikamiUitOpen 16:cbb726ac20d8 148 #define __FPU_USED 0
MikamiUitOpen 16:cbb726ac20d8 149 #endif
MikamiUitOpen 16:cbb726ac20d8 150 #else
MikamiUitOpen 16:cbb726ac20d8 151 #define __FPU_USED 0
MikamiUitOpen 16:cbb726ac20d8 152 #endif
MikamiUitOpen 16:cbb726ac20d8 153
MikamiUitOpen 16:cbb726ac20d8 154 #elif defined ( __GNUC__ )
MikamiUitOpen 16:cbb726ac20d8 155 #if defined (__VFP_FP__) && !defined(__SOFTFP__)
MikamiUitOpen 16:cbb726ac20d8 156 #if (__FPU_PRESENT == 1)
MikamiUitOpen 16:cbb726ac20d8 157 #define __FPU_USED 1
MikamiUitOpen 16:cbb726ac20d8 158 #else
MikamiUitOpen 16:cbb726ac20d8 159 #warning "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
MikamiUitOpen 16:cbb726ac20d8 160 #define __FPU_USED 0
MikamiUitOpen 16:cbb726ac20d8 161 #endif
MikamiUitOpen 16:cbb726ac20d8 162 #else
MikamiUitOpen 16:cbb726ac20d8 163 #define __FPU_USED 0
MikamiUitOpen 16:cbb726ac20d8 164 #endif
MikamiUitOpen 16:cbb726ac20d8 165
MikamiUitOpen 16:cbb726ac20d8 166 #elif defined ( __TASKING__ )
MikamiUitOpen 16:cbb726ac20d8 167 #if defined __FPU_VFP__
MikamiUitOpen 16:cbb726ac20d8 168 #if (__FPU_PRESENT == 1)
MikamiUitOpen 16:cbb726ac20d8 169 #define __FPU_USED 1
MikamiUitOpen 16:cbb726ac20d8 170 #else
MikamiUitOpen 16:cbb726ac20d8 171 #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
MikamiUitOpen 16:cbb726ac20d8 172 #define __FPU_USED 0
MikamiUitOpen 16:cbb726ac20d8 173 #endif
MikamiUitOpen 16:cbb726ac20d8 174 #else
MikamiUitOpen 16:cbb726ac20d8 175 #define __FPU_USED 0
MikamiUitOpen 16:cbb726ac20d8 176 #endif
MikamiUitOpen 16:cbb726ac20d8 177 #endif
MikamiUitOpen 16:cbb726ac20d8 178
MikamiUitOpen 16:cbb726ac20d8 179 #include <stdint.h> /*!< standard types definitions */
MikamiUitOpen 16:cbb726ac20d8 180 #include "core_caInstr.h" /*!< Core Instruction Access */
MikamiUitOpen 16:cbb726ac20d8 181 #include "core_caFunc.h" /*!< Core Function Access */
MikamiUitOpen 16:cbb726ac20d8 182 #include "core_cm4_simd.h" /*!< Compiler specific SIMD Intrinsics */
MikamiUitOpen 16:cbb726ac20d8 183
MikamiUitOpen 16:cbb726ac20d8 184 #endif /* __CORE_CA9_H_GENERIC */
MikamiUitOpen 16:cbb726ac20d8 185
MikamiUitOpen 16:cbb726ac20d8 186 #ifndef __CMSIS_GENERIC
MikamiUitOpen 16:cbb726ac20d8 187
MikamiUitOpen 16:cbb726ac20d8 188 #ifndef __CORE_CA9_H_DEPENDANT
MikamiUitOpen 16:cbb726ac20d8 189 #define __CORE_CA9_H_DEPENDANT
MikamiUitOpen 16:cbb726ac20d8 190
MikamiUitOpen 16:cbb726ac20d8 191 /* check device defines and use defaults */
MikamiUitOpen 16:cbb726ac20d8 192 #if defined __CHECK_DEVICE_DEFINES
MikamiUitOpen 16:cbb726ac20d8 193 #ifndef __CA9_REV
MikamiUitOpen 16:cbb726ac20d8 194 #define __CA9_REV 0x0000
MikamiUitOpen 16:cbb726ac20d8 195 #warning "__CA9_REV not defined in device header file; using default!"
MikamiUitOpen 16:cbb726ac20d8 196 #endif
MikamiUitOpen 16:cbb726ac20d8 197
MikamiUitOpen 16:cbb726ac20d8 198 #ifndef __FPU_PRESENT
MikamiUitOpen 16:cbb726ac20d8 199 #define __FPU_PRESENT 1
MikamiUitOpen 16:cbb726ac20d8 200 #warning "__FPU_PRESENT not defined in device header file; using default!"
MikamiUitOpen 16:cbb726ac20d8 201 #endif
MikamiUitOpen 16:cbb726ac20d8 202
MikamiUitOpen 16:cbb726ac20d8 203 #ifndef __Vendor_SysTickConfig
MikamiUitOpen 16:cbb726ac20d8 204 #define __Vendor_SysTickConfig 1
MikamiUitOpen 16:cbb726ac20d8 205 #endif
MikamiUitOpen 16:cbb726ac20d8 206
MikamiUitOpen 16:cbb726ac20d8 207 #if __Vendor_SysTickConfig == 0
MikamiUitOpen 16:cbb726ac20d8 208 #error "__Vendor_SysTickConfig set to 0, but vendor systick timer must be supplied for Cortex-A9"
MikamiUitOpen 16:cbb726ac20d8 209 #endif
MikamiUitOpen 16:cbb726ac20d8 210 #endif
MikamiUitOpen 16:cbb726ac20d8 211
MikamiUitOpen 16:cbb726ac20d8 212 /* IO definitions (access restrictions to peripheral registers) */
MikamiUitOpen 16:cbb726ac20d8 213 /**
MikamiUitOpen 16:cbb726ac20d8 214 \defgroup CMSIS_glob_defs CMSIS Global Defines
MikamiUitOpen 16:cbb726ac20d8 215
MikamiUitOpen 16:cbb726ac20d8 216 <strong>IO Type Qualifiers</strong> are used
MikamiUitOpen 16:cbb726ac20d8 217 \li to specify the access to peripheral variables.
MikamiUitOpen 16:cbb726ac20d8 218 \li for automatic generation of peripheral register debug information.
MikamiUitOpen 16:cbb726ac20d8 219 */
MikamiUitOpen 16:cbb726ac20d8 220 #ifdef __cplusplus
MikamiUitOpen 16:cbb726ac20d8 221 #define __I volatile /*!< Defines 'read only' permissions */
MikamiUitOpen 16:cbb726ac20d8 222 #else
MikamiUitOpen 16:cbb726ac20d8 223 #define __I volatile const /*!< Defines 'read only' permissions */
MikamiUitOpen 16:cbb726ac20d8 224 #endif
MikamiUitOpen 16:cbb726ac20d8 225 #define __O volatile /*!< Defines 'write only' permissions */
MikamiUitOpen 16:cbb726ac20d8 226 #define __IO volatile /*!< Defines 'read / write' permissions */
MikamiUitOpen 16:cbb726ac20d8 227
MikamiUitOpen 16:cbb726ac20d8 228 /*@} end of group Cortex_A9 */
MikamiUitOpen 16:cbb726ac20d8 229
MikamiUitOpen 16:cbb726ac20d8 230
MikamiUitOpen 16:cbb726ac20d8 231 /*******************************************************************************
MikamiUitOpen 16:cbb726ac20d8 232 * Register Abstraction
MikamiUitOpen 16:cbb726ac20d8 233 ******************************************************************************/
MikamiUitOpen 16:cbb726ac20d8 234 /** \defgroup CMSIS_core_register Defines and Type Definitions
MikamiUitOpen 16:cbb726ac20d8 235 \brief Type definitions and defines for Cortex-A processor based devices.
MikamiUitOpen 16:cbb726ac20d8 236 */
MikamiUitOpen 16:cbb726ac20d8 237
MikamiUitOpen 16:cbb726ac20d8 238 /** \ingroup CMSIS_core_register
MikamiUitOpen 16:cbb726ac20d8 239 \defgroup CMSIS_CORE Status and Control Registers
MikamiUitOpen 16:cbb726ac20d8 240 \brief Core Register type definitions.
MikamiUitOpen 16:cbb726ac20d8 241 @{
MikamiUitOpen 16:cbb726ac20d8 242 */
MikamiUitOpen 16:cbb726ac20d8 243
MikamiUitOpen 16:cbb726ac20d8 244 /** \brief Union type to access the Application Program Status Register (APSR).
MikamiUitOpen 16:cbb726ac20d8 245 */
MikamiUitOpen 16:cbb726ac20d8 246 typedef union
MikamiUitOpen 16:cbb726ac20d8 247 {
MikamiUitOpen 16:cbb726ac20d8 248 struct
MikamiUitOpen 16:cbb726ac20d8 249 {
MikamiUitOpen 16:cbb726ac20d8 250 uint32_t _reserved0:16; /*!< bit: 0..15 Reserved */
MikamiUitOpen 16:cbb726ac20d8 251 uint32_t GE:4; /*!< bit: 16..19 Greater than or Equal flags */
MikamiUitOpen 16:cbb726ac20d8 252 uint32_t reserved1:7; /*!< bit: 20..23 Reserved */
MikamiUitOpen 16:cbb726ac20d8 253 uint32_t Q:1; /*!< bit: 27 Saturation condition flag */
MikamiUitOpen 16:cbb726ac20d8 254 uint32_t V:1; /*!< bit: 28 Overflow condition code flag */
MikamiUitOpen 16:cbb726ac20d8 255 uint32_t C:1; /*!< bit: 29 Carry condition code flag */
MikamiUitOpen 16:cbb726ac20d8 256 uint32_t Z:1; /*!< bit: 30 Zero condition code flag */
MikamiUitOpen 16:cbb726ac20d8 257 uint32_t N:1; /*!< bit: 31 Negative condition code flag */
MikamiUitOpen 16:cbb726ac20d8 258 } b; /*!< Structure used for bit access */
MikamiUitOpen 16:cbb726ac20d8 259 uint32_t w; /*!< Type used for word access */
MikamiUitOpen 16:cbb726ac20d8 260 } APSR_Type;
MikamiUitOpen 16:cbb726ac20d8 261
MikamiUitOpen 16:cbb726ac20d8 262
MikamiUitOpen 16:cbb726ac20d8 263 /*@} end of group CMSIS_CORE */
MikamiUitOpen 16:cbb726ac20d8 264
MikamiUitOpen 16:cbb726ac20d8 265 /*@} end of CMSIS_Core_FPUFunctions */
MikamiUitOpen 16:cbb726ac20d8 266
MikamiUitOpen 16:cbb726ac20d8 267
MikamiUitOpen 16:cbb726ac20d8 268 #endif /* __CORE_CA9_H_GENERIC */
MikamiUitOpen 16:cbb726ac20d8 269
MikamiUitOpen 16:cbb726ac20d8 270 #endif /* __CMSIS_GENERIC */
MikamiUitOpen 16:cbb726ac20d8 271
MikamiUitOpen 16:cbb726ac20d8 272 #ifdef __cplusplus
MikamiUitOpen 16:cbb726ac20d8 273 }
MikamiUitOpen 16:cbb726ac20d8 274
MikamiUitOpen 16:cbb726ac20d8 275
MikamiUitOpen 16:cbb726ac20d8 276 #endif