不韋 呂 / Mbed 2 deprecated F746_AudioOutQSPI

Output the audio signal with filtering by IIR filter in the Quad-SPI flash memory using onboard CODEC. QSPI フラッシュメモリのオーディオデータを遮断周波数可変の IIR フィルタを通してボードに搭載されているCODEC で出力するプログラム．

Dependencies:   BSP_DISCO_F746NG_patch_fixed F746_GUI LCD_DISCO_F746NG QSPI_DISCO_F746NG TS_DISCO_F746NG mbed

MyClasses_Functions/BSP_AudioOut_Overwrite.cpp@1:a1be09c2533a, 2016-04-07 (annotated)

Committer:
MikamiUitOpen
Date:
Thu Apr 07 00:32:00 2016 +0000
Revision:
1:a1be09c2533a
Parent:
0:2eb96a7cf9b9 
2

Who changed what in which revision?

UserRevisionLine numberNew contents of line
MikamiUitOpen 0:2eb96a7cf9b9 1 //--------------------------------------------------------------
MikamiUitOpen 0:2eb96a7cf9b9 2 // Overwrite functuions and define calback functions
MikamiUitOpen 0:2eb96a7cf9b9 3 // for functions in stm32746g_discovery_audio.cpp
MikamiUitOpen 0:2eb96a7cf9b9 4 //--------------------------------------------------------------
MikamiUitOpen 0:2eb96a7cf9b9 5 #include "BSP_AudioOut_Overwrite.hpp"
MikamiUitOpen 0:2eb96a7cf9b9 6
MikamiUitOpen 0:2eb96a7cf9b9 7 // These three callback functions are modyfied by Mikami
MikamiUitOpen 0:2eb96a7cf9b9 8 void BSP_AUDIO_OUT_HalfTransfer_CallBack()
MikamiUitOpen 0:2eb96a7cf9b9 9 {
MikamiUitOpen 0:2eb96a7cf9b9 10 Mikami::SaiIO_O::FillBuffer1st();
MikamiUitOpen 0:2eb96a7cf9b9 11 }
MikamiUitOpen 0:2eb96a7cf9b9 12
MikamiUitOpen 0:2eb96a7cf9b9 13 void BSP_AUDIO_OUT_TransferComplete_CallBack()
MikamiUitOpen 0:2eb96a7cf9b9 14 {
MikamiUitOpen 0:2eb96a7cf9b9 15 Mikami::SaiIO_O::FillBuffer2nd();
MikamiUitOpen 0:2eb96a7cf9b9 16 }
MikamiUitOpen 0:2eb96a7cf9b9 17
MikamiUitOpen 0:2eb96a7cf9b9 18 void BSP_AUDIO_OUT_Error_CallBack()
MikamiUitOpen 0:2eb96a7cf9b9 19 {
MikamiUitOpen 0:2eb96a7cf9b9 20 Mikami::SaiIO_O::ErrorTrap();
MikamiUitOpen 0:2eb96a7cf9b9 21 }
MikamiUitOpen 0:2eb96a7cf9b9 22
MikamiUitOpen 0:2eb96a7cf9b9 23 //--------------------------------------------------------------
MikamiUitOpen 0:2eb96a7cf9b9 24 // Followings are original by Nanase
MikamiUitOpen 0:2eb96a7cf9b9 25 //--------------------------------------------------------------
MikamiUitOpen 0:2eb96a7cf9b9 26
MikamiUitOpen 0:2eb96a7cf9b9 27 DMA_HandleTypeDef hdma_sai_tx;
MikamiUitOpen 0:2eb96a7cf9b9 28
MikamiUitOpen 0:2eb96a7cf9b9 29 void AUDIO_OUT_SAIx_DMAx_IRQHandler()
MikamiUitOpen 0:2eb96a7cf9b9 30 {
MikamiUitOpen 0:2eb96a7cf9b9 31 HAL_DMA_IRQHandler(&hdma_sai_tx);
MikamiUitOpen 0:2eb96a7cf9b9 32 }
MikamiUitOpen 0:2eb96a7cf9b9 33
MikamiUitOpen 0:2eb96a7cf9b9 34 void BSP_AUDIO_OUT_MspInit(SAI_HandleTypeDef *hsai, void *Params)
MikamiUitOpen 0:2eb96a7cf9b9 35 {
MikamiUitOpen 0:2eb96a7cf9b9 36 //static DMA_HandleTypeDef hdma_sai_tx;
MikamiUitOpen 0:2eb96a7cf9b9 37 GPIO_InitTypeDef gpio_init_structure;
MikamiUitOpen 0:2eb96a7cf9b9 38
MikamiUitOpen 0:2eb96a7cf9b9 39 /* Enable SAI clock */
MikamiUitOpen 0:2eb96a7cf9b9 40 AUDIO_OUT_SAIx_CLK_ENABLE();
MikamiUitOpen 0:2eb96a7cf9b9 41
MikamiUitOpen 0:2eb96a7cf9b9 42 /* Enable GPIO clock */
MikamiUitOpen 0:2eb96a7cf9b9 43 AUDIO_OUT_SAIx_MCLK_ENABLE();
MikamiUitOpen 0:2eb96a7cf9b9 44 AUDIO_OUT_SAIx_SCK_SD_ENABLE();
MikamiUitOpen 0:2eb96a7cf9b9 45 AUDIO_OUT_SAIx_FS_ENABLE();
MikamiUitOpen 0:2eb96a7cf9b9 46
MikamiUitOpen 0:2eb96a7cf9b9 47 /* CODEC_SAI pins configuration: FS, SCK, MCK and SD pins ------------------*/
MikamiUitOpen 0:2eb96a7cf9b9 48 gpio_init_structure.Pin = AUDIO_OUT_SAIx_FS_PIN;
MikamiUitOpen 0:2eb96a7cf9b9 49 gpio_init_structure.Mode = GPIO_MODE_AF_PP;
MikamiUitOpen 0:2eb96a7cf9b9 50 gpio_init_structure.Pull = GPIO_NOPULL;
MikamiUitOpen 0:2eb96a7cf9b9 51 gpio_init_structure.Speed = GPIO_SPEED_HIGH;
MikamiUitOpen 0:2eb96a7cf9b9 52 gpio_init_structure.Alternate = AUDIO_OUT_SAIx_FS_SD_MCLK_AF;
MikamiUitOpen 0:2eb96a7cf9b9 53 HAL_GPIO_Init(AUDIO_OUT_SAIx_FS_GPIO_PORT, &gpio_init_structure);
MikamiUitOpen 0:2eb96a7cf9b9 54
MikamiUitOpen 0:2eb96a7cf9b9 55 gpio_init_structure.Pin = AUDIO_OUT_SAIx_SCK_PIN;
MikamiUitOpen 0:2eb96a7cf9b9 56 gpio_init_structure.Mode = GPIO_MODE_AF_PP;
MikamiUitOpen 0:2eb96a7cf9b9 57 gpio_init_structure.Pull = GPIO_NOPULL;
MikamiUitOpen 0:2eb96a7cf9b9 58 gpio_init_structure.Speed = GPIO_SPEED_HIGH;
MikamiUitOpen 0:2eb96a7cf9b9 59 gpio_init_structure.Alternate = AUDIO_OUT_SAIx_SCK_AF;
MikamiUitOpen 0:2eb96a7cf9b9 60 HAL_GPIO_Init(AUDIO_OUT_SAIx_SCK_SD_GPIO_PORT, &gpio_init_structure);
MikamiUitOpen 0:2eb96a7cf9b9 61
MikamiUitOpen 0:2eb96a7cf9b9 62 gpio_init_structure.Pin = AUDIO_OUT_SAIx_SD_PIN;
MikamiUitOpen 0:2eb96a7cf9b9 63 gpio_init_structure.Mode = GPIO_MODE_AF_PP;
MikamiUitOpen 0:2eb96a7cf9b9 64 gpio_init_structure.Pull = GPIO_NOPULL;
MikamiUitOpen 0:2eb96a7cf9b9 65 gpio_init_structure.Speed = GPIO_SPEED_HIGH;
MikamiUitOpen 0:2eb96a7cf9b9 66 gpio_init_structure.Alternate = AUDIO_OUT_SAIx_FS_SD_MCLK_AF;
MikamiUitOpen 0:2eb96a7cf9b9 67 HAL_GPIO_Init(AUDIO_OUT_SAIx_SCK_SD_GPIO_PORT, &gpio_init_structure);
MikamiUitOpen 0:2eb96a7cf9b9 68
MikamiUitOpen 0:2eb96a7cf9b9 69 gpio_init_structure.Pin = AUDIO_OUT_SAIx_MCLK_PIN;
MikamiUitOpen 0:2eb96a7cf9b9 70 gpio_init_structure.Mode = GPIO_MODE_AF_PP;
MikamiUitOpen 0:2eb96a7cf9b9 71 gpio_init_structure.Pull = GPIO_NOPULL;
MikamiUitOpen 0:2eb96a7cf9b9 72 gpio_init_structure.Speed = GPIO_SPEED_HIGH;
MikamiUitOpen 0:2eb96a7cf9b9 73 gpio_init_structure.Alternate = AUDIO_OUT_SAIx_FS_SD_MCLK_AF;
MikamiUitOpen 0:2eb96a7cf9b9 74 HAL_GPIO_Init(AUDIO_OUT_SAIx_MCLK_GPIO_PORT, &gpio_init_structure);
MikamiUitOpen 0:2eb96a7cf9b9 75
MikamiUitOpen 0:2eb96a7cf9b9 76 /* Enable the DMA clock */
MikamiUitOpen 0:2eb96a7cf9b9 77 AUDIO_OUT_SAIx_DMAx_CLK_ENABLE();
MikamiUitOpen 0:2eb96a7cf9b9 78
MikamiUitOpen 0:2eb96a7cf9b9 79 if(hsai->Instance == AUDIO_OUT_SAIx)
MikamiUitOpen 0:2eb96a7cf9b9 80 {
MikamiUitOpen 0:2eb96a7cf9b9 81 /* Configure the hdma_saiTx handle parameters */
MikamiUitOpen 0:2eb96a7cf9b9 82 hdma_sai_tx.Init.Channel = AUDIO_OUT_SAIx_DMAx_CHANNEL;
MikamiUitOpen 0:2eb96a7cf9b9 83 hdma_sai_tx.Init.Direction = DMA_MEMORY_TO_PERIPH;
MikamiUitOpen 0:2eb96a7cf9b9 84 hdma_sai_tx.Init.PeriphInc = DMA_PINC_DISABLE;
MikamiUitOpen 0:2eb96a7cf9b9 85 hdma_sai_tx.Init.MemInc = DMA_MINC_ENABLE;
MikamiUitOpen 0:2eb96a7cf9b9 86 hdma_sai_tx.Init.PeriphDataAlignment = AUDIO_OUT_SAIx_DMAx_PERIPH_DATA_SIZE;
MikamiUitOpen 0:2eb96a7cf9b9 87 hdma_sai_tx.Init.MemDataAlignment = AUDIO_OUT_SAIx_DMAx_MEM_DATA_SIZE;
MikamiUitOpen 0:2eb96a7cf9b9 88 hdma_sai_tx.Init.Mode = DMA_CIRCULAR;
MikamiUitOpen 0:2eb96a7cf9b9 89 hdma_sai_tx.Init.Priority = DMA_PRIORITY_HIGH;
MikamiUitOpen 0:2eb96a7cf9b9 90 hdma_sai_tx.Init.FIFOMode = DMA_FIFOMODE_ENABLE;
MikamiUitOpen 0:2eb96a7cf9b9 91 hdma_sai_tx.Init.FIFOThreshold = DMA_FIFO_THRESHOLD_FULL;
MikamiUitOpen 0:2eb96a7cf9b9 92 hdma_sai_tx.Init.MemBurst = DMA_MBURST_SINGLE;
MikamiUitOpen 0:2eb96a7cf9b9 93 hdma_sai_tx.Init.PeriphBurst = DMA_PBURST_SINGLE;
MikamiUitOpen 0:2eb96a7cf9b9 94
MikamiUitOpen 0:2eb96a7cf9b9 95 hdma_sai_tx.Instance = AUDIO_OUT_SAIx_DMAx_STREAM;
MikamiUitOpen 0:2eb96a7cf9b9 96
MikamiUitOpen 0:2eb96a7cf9b9 97 /* Associate the DMA handle */
MikamiUitOpen 0:2eb96a7cf9b9 98 __HAL_LINKDMA(hsai, hdmatx, hdma_sai_tx);
MikamiUitOpen 0:2eb96a7cf9b9 99
MikamiUitOpen 0:2eb96a7cf9b9 100 /* Deinitialize the Stream for new transfer */
MikamiUitOpen 0:2eb96a7cf9b9 101 HAL_DMA_DeInit(&hdma_sai_tx);
MikamiUitOpen 0:2eb96a7cf9b9 102
MikamiUitOpen 0:2eb96a7cf9b9 103 /* Configure the DMA Stream */
MikamiUitOpen 0:2eb96a7cf9b9 104 HAL_DMA_Init(&hdma_sai_tx);
MikamiUitOpen 0:2eb96a7cf9b9 105 }
MikamiUitOpen 0:2eb96a7cf9b9 106
MikamiUitOpen 0:2eb96a7cf9b9 107 /* SAI DMA IRQ Channel configuration */
MikamiUitOpen 0:2eb96a7cf9b9 108 HAL_NVIC_SetPriority(AUDIO_OUT_SAIx_DMAx_IRQ, AUDIO_OUT_IRQ_PREPRIO, 0);
MikamiUitOpen 0:2eb96a7cf9b9 109 HAL_NVIC_EnableIRQ(AUDIO_OUT_SAIx_DMAx_IRQ);
MikamiUitOpen 0:2eb96a7cf9b9 110 }
MikamiUitOpen 0:2eb96a7cf9b9 111