不韋 呂 / F746_AcousticEffector_MIC

Audio singal input and output example for DISCO-F746. Input: MEMS mic, Output: CN10 OUT, Acoustic effect: echo and frequency shift. DISCO-F746 によるオーディオ信号入出力．入力：MEMS マイク，出力：CN10 OUT，音響効果：エコー，周波数変換．

Dependencies:   F746_GUI F746_SAI_IO

mbed_src_STM32F7/hal/gpio_irq_api.h@10:56f2f01df983, 2017-04-10 (annotated)

Committer:
MikamiUitOpen
Date:
Mon Apr 10 13:44:13 2017 +0000
Revision:
10:56f2f01df983
Parent:
6:38f7dce055d0 
11

Who changed what in which revision?

UserRevisionLine numberNew contents of line
MikamiUitOpen 6:38f7dce055d0 1 /* mbed Microcontroller Library
MikamiUitOpen 6:38f7dce055d0 2 * Copyright (c) 2006-2013 ARM Limited
MikamiUitOpen 6:38f7dce055d0 3 *
MikamiUitOpen 6:38f7dce055d0 4 * Licensed under the Apache License, Version 2.0 (the "License");
MikamiUitOpen 6:38f7dce055d0 5 * you may not use this file except in compliance with the License.
MikamiUitOpen 6:38f7dce055d0 6 * You may obtain a copy of the License at
MikamiUitOpen 6:38f7dce055d0 7 *
MikamiUitOpen 6:38f7dce055d0 8 * http://www.apache.org/licenses/LICENSE-2.0
MikamiUitOpen 6:38f7dce055d0 9 *
MikamiUitOpen 6:38f7dce055d0 10 * Unless required by applicable law or agreed to in writing, software
MikamiUitOpen 6:38f7dce055d0 11 * distributed under the License is distributed on an "AS IS" BASIS,
MikamiUitOpen 6:38f7dce055d0 12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
MikamiUitOpen 6:38f7dce055d0 13 * See the License for the specific language governing permissions and
MikamiUitOpen 6:38f7dce055d0 14 * limitations under the License.
MikamiUitOpen 6:38f7dce055d0 15 */
MikamiUitOpen 6:38f7dce055d0 16 #ifndef MBED_GPIO_IRQ_API_H
MikamiUitOpen 6:38f7dce055d0 17 #define MBED_GPIO_IRQ_API_H
MikamiUitOpen 6:38f7dce055d0 18
MikamiUitOpen 6:38f7dce055d0 19 #include "device.h"
MikamiUitOpen 6:38f7dce055d0 20
MikamiUitOpen 6:38f7dce055d0 21 #if DEVICE_INTERRUPTIN
MikamiUitOpen 6:38f7dce055d0 22
MikamiUitOpen 6:38f7dce055d0 23 #ifdef __cplusplus
MikamiUitOpen 6:38f7dce055d0 24 extern "C" {
MikamiUitOpen 6:38f7dce055d0 25 #endif
MikamiUitOpen 6:38f7dce055d0 26
MikamiUitOpen 6:38f7dce055d0 27 typedef enum {
MikamiUitOpen 6:38f7dce055d0 28 IRQ_NONE,
MikamiUitOpen 6:38f7dce055d0 29 IRQ_RISE,
MikamiUitOpen 6:38f7dce055d0 30 IRQ_FALL
MikamiUitOpen 6:38f7dce055d0 31 } gpio_irq_event;
MikamiUitOpen 6:38f7dce055d0 32
MikamiUitOpen 6:38f7dce055d0 33 typedef struct gpio_irq_s gpio_irq_t;
MikamiUitOpen 6:38f7dce055d0 34
MikamiUitOpen 6:38f7dce055d0 35 typedef void (*gpio_irq_handler)(uint32_t id, gpio_irq_event event);
MikamiUitOpen 6:38f7dce055d0 36
MikamiUitOpen 6:38f7dce055d0 37 int gpio_irq_init(gpio_irq_t *obj, PinName pin, gpio_irq_handler handler, uint32_t id);
MikamiUitOpen 6:38f7dce055d0 38 void gpio_irq_free(gpio_irq_t *obj);
MikamiUitOpen 6:38f7dce055d0 39 void gpio_irq_set (gpio_irq_t *obj, gpio_irq_event event, uint32_t enable);
MikamiUitOpen 6:38f7dce055d0 40 void gpio_irq_enable(gpio_irq_t *obj);
MikamiUitOpen 6:38f7dce055d0 41 void gpio_irq_disable(gpio_irq_t *obj);
MikamiUitOpen 6:38f7dce055d0 42
MikamiUitOpen 6:38f7dce055d0 43 #ifdef __cplusplus
MikamiUitOpen 6:38f7dce055d0 44 }
MikamiUitOpen 6:38f7dce055d0 45 #endif
MikamiUitOpen 6:38f7dce055d0 46
MikamiUitOpen 6:38f7dce055d0 47 #endif
MikamiUitOpen 6:38f7dce055d0 48
MikamiUitOpen 6:38f7dce055d0 49 #endif