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src/stm32f30x_pwr.c@0:404f5a4f1385, 2016-05-09 (annotated)
- Committer:
- MartinJohnson
- Date:
- Mon May 09 04:00:25 2016 +0000
- Revision:
- 0:404f5a4f1385
Initial library for STM32F3 discovery board
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
MartinJohnson | 0:404f5a4f1385 | 1 | /** |
MartinJohnson | 0:404f5a4f1385 | 2 | ****************************************************************************** |
MartinJohnson | 0:404f5a4f1385 | 3 | * @file stm32f30x_pwr.c |
MartinJohnson | 0:404f5a4f1385 | 4 | * @author MCD Application Team |
MartinJohnson | 0:404f5a4f1385 | 5 | * @version V1.2.3 |
MartinJohnson | 0:404f5a4f1385 | 6 | * @date 10-July-2015 |
MartinJohnson | 0:404f5a4f1385 | 7 | * @brief This file provides firmware functions to manage the following |
MartinJohnson | 0:404f5a4f1385 | 8 | * functionalities of the Power Controller (PWR) peripheral: |
MartinJohnson | 0:404f5a4f1385 | 9 | * + Backup Domain Access |
MartinJohnson | 0:404f5a4f1385 | 10 | * + PVD configuration |
MartinJohnson | 0:404f5a4f1385 | 11 | * + WakeUp pins configuration |
MartinJohnson | 0:404f5a4f1385 | 12 | * + Low Power modes configuration |
MartinJohnson | 0:404f5a4f1385 | 13 | * + Flags management |
MartinJohnson | 0:404f5a4f1385 | 14 | * |
MartinJohnson | 0:404f5a4f1385 | 15 | ****************************************************************************** |
MartinJohnson | 0:404f5a4f1385 | 16 | * @attention |
MartinJohnson | 0:404f5a4f1385 | 17 | * |
MartinJohnson | 0:404f5a4f1385 | 18 | * <h2><center>© COPYRIGHT 2015 STMicroelectronics</center></h2> |
MartinJohnson | 0:404f5a4f1385 | 19 | * |
MartinJohnson | 0:404f5a4f1385 | 20 | * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); |
MartinJohnson | 0:404f5a4f1385 | 21 | * You may not use this file except in compliance with the License. |
MartinJohnson | 0:404f5a4f1385 | 22 | * You may obtain a copy of the License at: |
MartinJohnson | 0:404f5a4f1385 | 23 | * |
MartinJohnson | 0:404f5a4f1385 | 24 | * http://www.st.com/software_license_agreement_liberty_v2 |
MartinJohnson | 0:404f5a4f1385 | 25 | * |
MartinJohnson | 0:404f5a4f1385 | 26 | * Unless required by applicable law or agreed to in writing, software |
MartinJohnson | 0:404f5a4f1385 | 27 | * distributed under the License is distributed on an "AS IS" BASIS, |
MartinJohnson | 0:404f5a4f1385 | 28 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. |
MartinJohnson | 0:404f5a4f1385 | 29 | * See the License for the specific language governing permissions and |
MartinJohnson | 0:404f5a4f1385 | 30 | * limitations under the License. |
MartinJohnson | 0:404f5a4f1385 | 31 | * |
MartinJohnson | 0:404f5a4f1385 | 32 | ****************************************************************************** |
MartinJohnson | 0:404f5a4f1385 | 33 | */ |
MartinJohnson | 0:404f5a4f1385 | 34 | |
MartinJohnson | 0:404f5a4f1385 | 35 | /* Includes ------------------------------------------------------------------*/ |
MartinJohnson | 0:404f5a4f1385 | 36 | #include "stm32f30x_pwr.h" |
MartinJohnson | 0:404f5a4f1385 | 37 | #include "stm32f30x_rcc.h" |
MartinJohnson | 0:404f5a4f1385 | 38 | |
MartinJohnson | 0:404f5a4f1385 | 39 | /** @addtogroup STM32F30x_StdPeriph_Driver |
MartinJohnson | 0:404f5a4f1385 | 40 | * @{ |
MartinJohnson | 0:404f5a4f1385 | 41 | */ |
MartinJohnson | 0:404f5a4f1385 | 42 | |
MartinJohnson | 0:404f5a4f1385 | 43 | /** @defgroup PWR |
MartinJohnson | 0:404f5a4f1385 | 44 | * @brief PWR driver modules |
MartinJohnson | 0:404f5a4f1385 | 45 | * @{ |
MartinJohnson | 0:404f5a4f1385 | 46 | */ |
MartinJohnson | 0:404f5a4f1385 | 47 | |
MartinJohnson | 0:404f5a4f1385 | 48 | /* Private typedef -----------------------------------------------------------*/ |
MartinJohnson | 0:404f5a4f1385 | 49 | /* Private define ------------------------------------------------------------*/ |
MartinJohnson | 0:404f5a4f1385 | 50 | /* --------- PWR registers bit address in the alias region ---------- */ |
MartinJohnson | 0:404f5a4f1385 | 51 | #define PWR_OFFSET (PWR_BASE - PERIPH_BASE) |
MartinJohnson | 0:404f5a4f1385 | 52 | |
MartinJohnson | 0:404f5a4f1385 | 53 | /* --- CR Register ---*/ |
MartinJohnson | 0:404f5a4f1385 | 54 | |
MartinJohnson | 0:404f5a4f1385 | 55 | /* Alias word address of DBP bit */ |
MartinJohnson | 0:404f5a4f1385 | 56 | #define CR_OFFSET (PWR_OFFSET + 0x00) |
MartinJohnson | 0:404f5a4f1385 | 57 | #define DBP_BitNumber 0x08 |
MartinJohnson | 0:404f5a4f1385 | 58 | #define CR_DBP_BB (PERIPH_BB_BASE + (CR_OFFSET * 32) + (DBP_BitNumber * 4)) |
MartinJohnson | 0:404f5a4f1385 | 59 | |
MartinJohnson | 0:404f5a4f1385 | 60 | /* Alias word address of PVDE bit */ |
MartinJohnson | 0:404f5a4f1385 | 61 | #define PVDE_BitNumber 0x04 |
MartinJohnson | 0:404f5a4f1385 | 62 | #define CR_PVDE_BB (PERIPH_BB_BASE + (CR_OFFSET * 32) + (PVDE_BitNumber * 4)) |
MartinJohnson | 0:404f5a4f1385 | 63 | |
MartinJohnson | 0:404f5a4f1385 | 64 | /* ------------------ PWR registers bit mask ------------------------ */ |
MartinJohnson | 0:404f5a4f1385 | 65 | |
MartinJohnson | 0:404f5a4f1385 | 66 | /* CR register bit mask */ |
MartinJohnson | 0:404f5a4f1385 | 67 | #define CR_DS_MASK ((uint32_t)0xFFFFFFFC) |
MartinJohnson | 0:404f5a4f1385 | 68 | #define CR_PLS_MASK ((uint32_t)0xFFFFFF1F) |
MartinJohnson | 0:404f5a4f1385 | 69 | |
MartinJohnson | 0:404f5a4f1385 | 70 | /* Private macro -------------------------------------------------------------*/ |
MartinJohnson | 0:404f5a4f1385 | 71 | /* Private variables ---------------------------------------------------------*/ |
MartinJohnson | 0:404f5a4f1385 | 72 | /* Private function prototypes -----------------------------------------------*/ |
MartinJohnson | 0:404f5a4f1385 | 73 | /* Private functions ---------------------------------------------------------*/ |
MartinJohnson | 0:404f5a4f1385 | 74 | |
MartinJohnson | 0:404f5a4f1385 | 75 | /** @defgroup PWR_Private_Functions |
MartinJohnson | 0:404f5a4f1385 | 76 | * @{ |
MartinJohnson | 0:404f5a4f1385 | 77 | */ |
MartinJohnson | 0:404f5a4f1385 | 78 | |
MartinJohnson | 0:404f5a4f1385 | 79 | /** @defgroup PWR_Group1 Backup Domain Access function |
MartinJohnson | 0:404f5a4f1385 | 80 | * @brief Backup Domain Access function |
MartinJohnson | 0:404f5a4f1385 | 81 | * |
MartinJohnson | 0:404f5a4f1385 | 82 | @verbatim |
MartinJohnson | 0:404f5a4f1385 | 83 | ============================================================================== |
MartinJohnson | 0:404f5a4f1385 | 84 | ##### Backup Domain Access function ##### |
MartinJohnson | 0:404f5a4f1385 | 85 | ============================================================================== |
MartinJohnson | 0:404f5a4f1385 | 86 | |
MartinJohnson | 0:404f5a4f1385 | 87 | [..] After reset, the Backup Domain Registers (RCC BDCR Register, RTC registers |
MartinJohnson | 0:404f5a4f1385 | 88 | and RTC backup registers) are protected against possible stray write accesses. |
MartinJohnson | 0:404f5a4f1385 | 89 | [..] To enable access to Backup domain use the PWR_BackupAccessCmd(ENABLE) function. |
MartinJohnson | 0:404f5a4f1385 | 90 | |
MartinJohnson | 0:404f5a4f1385 | 91 | @endverbatim |
MartinJohnson | 0:404f5a4f1385 | 92 | * @{ |
MartinJohnson | 0:404f5a4f1385 | 93 | */ |
MartinJohnson | 0:404f5a4f1385 | 94 | |
MartinJohnson | 0:404f5a4f1385 | 95 | /** |
MartinJohnson | 0:404f5a4f1385 | 96 | * @brief Deinitializes the PWR peripheral registers to their default reset values. |
MartinJohnson | 0:404f5a4f1385 | 97 | * @param None |
MartinJohnson | 0:404f5a4f1385 | 98 | * @retval None |
MartinJohnson | 0:404f5a4f1385 | 99 | */ |
MartinJohnson | 0:404f5a4f1385 | 100 | void PWR_DeInit(void) |
MartinJohnson | 0:404f5a4f1385 | 101 | { |
MartinJohnson | 0:404f5a4f1385 | 102 | RCC_APB1PeriphResetCmd(RCC_APB1Periph_PWR, ENABLE); |
MartinJohnson | 0:404f5a4f1385 | 103 | RCC_APB1PeriphResetCmd(RCC_APB1Periph_PWR, DISABLE); |
MartinJohnson | 0:404f5a4f1385 | 104 | } |
MartinJohnson | 0:404f5a4f1385 | 105 | |
MartinJohnson | 0:404f5a4f1385 | 106 | /** |
MartinJohnson | 0:404f5a4f1385 | 107 | * @brief Enables or disables access to the RTC and backup registers. |
MartinJohnson | 0:404f5a4f1385 | 108 | * @note If the HSE divided by 32 is used as the RTC clock, the |
MartinJohnson | 0:404f5a4f1385 | 109 | * Backup Domain Access should be kept enabled. |
MartinJohnson | 0:404f5a4f1385 | 110 | * @param NewState: new state of the access to the RTC and backup registers. |
MartinJohnson | 0:404f5a4f1385 | 111 | * This parameter can be: ENABLE or DISABLE. |
MartinJohnson | 0:404f5a4f1385 | 112 | * @retval None |
MartinJohnson | 0:404f5a4f1385 | 113 | */ |
MartinJohnson | 0:404f5a4f1385 | 114 | void PWR_BackupAccessCmd(FunctionalState NewState) |
MartinJohnson | 0:404f5a4f1385 | 115 | { |
MartinJohnson | 0:404f5a4f1385 | 116 | /* Check the parameters */ |
MartinJohnson | 0:404f5a4f1385 | 117 | assert_param(IS_FUNCTIONAL_STATE(NewState)); |
MartinJohnson | 0:404f5a4f1385 | 118 | *(__IO uint32_t *) CR_DBP_BB = (uint32_t)NewState; |
MartinJohnson | 0:404f5a4f1385 | 119 | } |
MartinJohnson | 0:404f5a4f1385 | 120 | |
MartinJohnson | 0:404f5a4f1385 | 121 | /** |
MartinJohnson | 0:404f5a4f1385 | 122 | * @} |
MartinJohnson | 0:404f5a4f1385 | 123 | */ |
MartinJohnson | 0:404f5a4f1385 | 124 | |
MartinJohnson | 0:404f5a4f1385 | 125 | /** @defgroup PWR_Group2 PVD configuration functions |
MartinJohnson | 0:404f5a4f1385 | 126 | * @brief PVD configuration functions |
MartinJohnson | 0:404f5a4f1385 | 127 | * |
MartinJohnson | 0:404f5a4f1385 | 128 | @verbatim |
MartinJohnson | 0:404f5a4f1385 | 129 | =============================================================================== |
MartinJohnson | 0:404f5a4f1385 | 130 | ##### PVD configuration functions ##### |
MartinJohnson | 0:404f5a4f1385 | 131 | ============================================================================== |
MartinJohnson | 0:404f5a4f1385 | 132 | [..] |
MartinJohnson | 0:404f5a4f1385 | 133 | (+) The PVD is used to monitor the VDD power supply by comparing it to a threshold |
MartinJohnson | 0:404f5a4f1385 | 134 | selected by the PVD Level (PLS[2:0] bits in the PWR_CR). |
MartinJohnson | 0:404f5a4f1385 | 135 | (+) A PVDO flag is available to indicate if VDD/VDDA is higher or lower than the |
MartinJohnson | 0:404f5a4f1385 | 136 | PVD threshold. This event is internally connected to the EXTI line16 |
MartinJohnson | 0:404f5a4f1385 | 137 | and can generate an interrupt if enabled through the EXTI registers. |
MartinJohnson | 0:404f5a4f1385 | 138 | (+) The PVD is stopped in Standby mode. |
MartinJohnson | 0:404f5a4f1385 | 139 | |
MartinJohnson | 0:404f5a4f1385 | 140 | @endverbatim |
MartinJohnson | 0:404f5a4f1385 | 141 | * @{ |
MartinJohnson | 0:404f5a4f1385 | 142 | */ |
MartinJohnson | 0:404f5a4f1385 | 143 | |
MartinJohnson | 0:404f5a4f1385 | 144 | /** |
MartinJohnson | 0:404f5a4f1385 | 145 | * @brief Configures the voltage threshold detected by the Power Voltage Detector(PVD). |
MartinJohnson | 0:404f5a4f1385 | 146 | * @param PWR_PVDLevel: specifies the PVD detection level |
MartinJohnson | 0:404f5a4f1385 | 147 | * This parameter can be one of the following values: |
MartinJohnson | 0:404f5a4f1385 | 148 | * @arg PWR_PVDLevel_0: PVD detection level set to 2.18V |
MartinJohnson | 0:404f5a4f1385 | 149 | * @arg PWR_PVDLevel_1: PVD detection level set to 2.28V |
MartinJohnson | 0:404f5a4f1385 | 150 | * @arg PWR_PVDLevel_2: PVD detection level set to 2.38V |
MartinJohnson | 0:404f5a4f1385 | 151 | * @arg PWR_PVDLevel_3: PVD detection level set to 2.48V |
MartinJohnson | 0:404f5a4f1385 | 152 | * @arg PWR_PVDLevel_4: PVD detection level set to 2.58V |
MartinJohnson | 0:404f5a4f1385 | 153 | * @arg PWR_PVDLevel_5: PVD detection level set to 2.68V |
MartinJohnson | 0:404f5a4f1385 | 154 | * @arg PWR_PVDLevel_6: PVD detection level set to 2.78V |
MartinJohnson | 0:404f5a4f1385 | 155 | * @arg PWR_PVDLevel_7: PVD detection level set to 2.88V |
MartinJohnson | 0:404f5a4f1385 | 156 | * @retval None |
MartinJohnson | 0:404f5a4f1385 | 157 | */ |
MartinJohnson | 0:404f5a4f1385 | 158 | void PWR_PVDLevelConfig(uint32_t PWR_PVDLevel) |
MartinJohnson | 0:404f5a4f1385 | 159 | { |
MartinJohnson | 0:404f5a4f1385 | 160 | uint32_t tmpreg = 0; |
MartinJohnson | 0:404f5a4f1385 | 161 | |
MartinJohnson | 0:404f5a4f1385 | 162 | /* Check the parameters */ |
MartinJohnson | 0:404f5a4f1385 | 163 | assert_param(IS_PWR_PVD_LEVEL(PWR_PVDLevel)); |
MartinJohnson | 0:404f5a4f1385 | 164 | |
MartinJohnson | 0:404f5a4f1385 | 165 | tmpreg = PWR->CR; |
MartinJohnson | 0:404f5a4f1385 | 166 | |
MartinJohnson | 0:404f5a4f1385 | 167 | /* Clear PLS[7:5] bits */ |
MartinJohnson | 0:404f5a4f1385 | 168 | tmpreg &= CR_PLS_MASK; |
MartinJohnson | 0:404f5a4f1385 | 169 | |
MartinJohnson | 0:404f5a4f1385 | 170 | /* Set PLS[7:5] bits according to PWR_PVDLevel value */ |
MartinJohnson | 0:404f5a4f1385 | 171 | tmpreg |= PWR_PVDLevel; |
MartinJohnson | 0:404f5a4f1385 | 172 | |
MartinJohnson | 0:404f5a4f1385 | 173 | /* Store the new value */ |
MartinJohnson | 0:404f5a4f1385 | 174 | PWR->CR = tmpreg; |
MartinJohnson | 0:404f5a4f1385 | 175 | } |
MartinJohnson | 0:404f5a4f1385 | 176 | |
MartinJohnson | 0:404f5a4f1385 | 177 | /** |
MartinJohnson | 0:404f5a4f1385 | 178 | * @brief Enables or disables the Power Voltage Detector(PVD). |
MartinJohnson | 0:404f5a4f1385 | 179 | * @param NewState: new state of the PVD. |
MartinJohnson | 0:404f5a4f1385 | 180 | * This parameter can be: ENABLE or DISABLE. |
MartinJohnson | 0:404f5a4f1385 | 181 | * @retval None |
MartinJohnson | 0:404f5a4f1385 | 182 | */ |
MartinJohnson | 0:404f5a4f1385 | 183 | void PWR_PVDCmd(FunctionalState NewState) |
MartinJohnson | 0:404f5a4f1385 | 184 | { |
MartinJohnson | 0:404f5a4f1385 | 185 | /* Check the parameters */ |
MartinJohnson | 0:404f5a4f1385 | 186 | assert_param(IS_FUNCTIONAL_STATE(NewState)); |
MartinJohnson | 0:404f5a4f1385 | 187 | *(__IO uint32_t *) CR_PVDE_BB = (uint32_t)NewState; |
MartinJohnson | 0:404f5a4f1385 | 188 | } |
MartinJohnson | 0:404f5a4f1385 | 189 | |
MartinJohnson | 0:404f5a4f1385 | 190 | /** |
MartinJohnson | 0:404f5a4f1385 | 191 | * @} |
MartinJohnson | 0:404f5a4f1385 | 192 | */ |
MartinJohnson | 0:404f5a4f1385 | 193 | |
MartinJohnson | 0:404f5a4f1385 | 194 | /** @defgroup PWR_Group3 WakeUp pins configuration functions |
MartinJohnson | 0:404f5a4f1385 | 195 | * @brief WakeUp pins configuration functions |
MartinJohnson | 0:404f5a4f1385 | 196 | * |
MartinJohnson | 0:404f5a4f1385 | 197 | @verbatim |
MartinJohnson | 0:404f5a4f1385 | 198 | =============================================================================== |
MartinJohnson | 0:404f5a4f1385 | 199 | ##### WakeUp pins configuration functions ##### |
MartinJohnson | 0:404f5a4f1385 | 200 | =============================================================================== |
MartinJohnson | 0:404f5a4f1385 | 201 | [..] |
MartinJohnson | 0:404f5a4f1385 | 202 | (+) WakeUp pins are used to wakeup the system from Standby mode. These pins are |
MartinJohnson | 0:404f5a4f1385 | 203 | forced in input pull down configuration and are active on rising edges. |
MartinJohnson | 0:404f5a4f1385 | 204 | (+) There are three WakeUp pins: WakeUp Pin 1 on PA.00, WakeUp Pin 2 on PC.13 and |
MartinJohnson | 0:404f5a4f1385 | 205 | WakeUp Pin 3 on PE.06. |
MartinJohnson | 0:404f5a4f1385 | 206 | |
MartinJohnson | 0:404f5a4f1385 | 207 | @endverbatim |
MartinJohnson | 0:404f5a4f1385 | 208 | * @{ |
MartinJohnson | 0:404f5a4f1385 | 209 | */ |
MartinJohnson | 0:404f5a4f1385 | 210 | |
MartinJohnson | 0:404f5a4f1385 | 211 | /** |
MartinJohnson | 0:404f5a4f1385 | 212 | * @brief Enables or disables the WakeUp Pin functionality. |
MartinJohnson | 0:404f5a4f1385 | 213 | * @param PWR_WakeUpPin: specifies the WakeUpPin. |
MartinJohnson | 0:404f5a4f1385 | 214 | * This parameter can be: PWR_WakeUpPin_1, PWR_WakeUpPin_2 or PWR_WakeUpPin_3. |
MartinJohnson | 0:404f5a4f1385 | 215 | * @param NewState: new state of the WakeUp Pin functionality. |
MartinJohnson | 0:404f5a4f1385 | 216 | * This parameter can be: ENABLE or DISABLE. |
MartinJohnson | 0:404f5a4f1385 | 217 | * @retval None |
MartinJohnson | 0:404f5a4f1385 | 218 | */ |
MartinJohnson | 0:404f5a4f1385 | 219 | void PWR_WakeUpPinCmd(uint32_t PWR_WakeUpPin, FunctionalState NewState) |
MartinJohnson | 0:404f5a4f1385 | 220 | { |
MartinJohnson | 0:404f5a4f1385 | 221 | /* Check the parameters */ |
MartinJohnson | 0:404f5a4f1385 | 222 | assert_param(IS_PWR_WAKEUP_PIN(PWR_WakeUpPin)); |
MartinJohnson | 0:404f5a4f1385 | 223 | assert_param(IS_FUNCTIONAL_STATE(NewState)); |
MartinJohnson | 0:404f5a4f1385 | 224 | |
MartinJohnson | 0:404f5a4f1385 | 225 | if (NewState != DISABLE) |
MartinJohnson | 0:404f5a4f1385 | 226 | { |
MartinJohnson | 0:404f5a4f1385 | 227 | /* Enable the EWUPx pin */ |
MartinJohnson | 0:404f5a4f1385 | 228 | PWR->CSR |= PWR_WakeUpPin; |
MartinJohnson | 0:404f5a4f1385 | 229 | } |
MartinJohnson | 0:404f5a4f1385 | 230 | else |
MartinJohnson | 0:404f5a4f1385 | 231 | { |
MartinJohnson | 0:404f5a4f1385 | 232 | /* Disable the EWUPx pin */ |
MartinJohnson | 0:404f5a4f1385 | 233 | PWR->CSR &= ~PWR_WakeUpPin; |
MartinJohnson | 0:404f5a4f1385 | 234 | } |
MartinJohnson | 0:404f5a4f1385 | 235 | } |
MartinJohnson | 0:404f5a4f1385 | 236 | |
MartinJohnson | 0:404f5a4f1385 | 237 | /** |
MartinJohnson | 0:404f5a4f1385 | 238 | * @} |
MartinJohnson | 0:404f5a4f1385 | 239 | */ |
MartinJohnson | 0:404f5a4f1385 | 240 | |
MartinJohnson | 0:404f5a4f1385 | 241 | |
MartinJohnson | 0:404f5a4f1385 | 242 | /** @defgroup PWR_Group4 Low Power modes configuration functions |
MartinJohnson | 0:404f5a4f1385 | 243 | * @brief Low Power modes configuration functions |
MartinJohnson | 0:404f5a4f1385 | 244 | * |
MartinJohnson | 0:404f5a4f1385 | 245 | @verbatim |
MartinJohnson | 0:404f5a4f1385 | 246 | =============================================================================== |
MartinJohnson | 0:404f5a4f1385 | 247 | ##### Low Power modes configuration functions ##### |
MartinJohnson | 0:404f5a4f1385 | 248 | ============================================================================== |
MartinJohnson | 0:404f5a4f1385 | 249 | |
MartinJohnson | 0:404f5a4f1385 | 250 | [..] The devices feature three low-power modes: |
MartinJohnson | 0:404f5a4f1385 | 251 | (+) Sleep mode: Cortex-M4 core stopped, peripherals kept running. |
MartinJohnson | 0:404f5a4f1385 | 252 | (+) Stop mode: all clocks are stopped, regulator running, regulator in low power mode |
MartinJohnson | 0:404f5a4f1385 | 253 | (+) Standby mode: VCORE domain powered off |
MartinJohnson | 0:404f5a4f1385 | 254 | |
MartinJohnson | 0:404f5a4f1385 | 255 | *** Sleep mode *** |
MartinJohnson | 0:404f5a4f1385 | 256 | ================== |
MartinJohnson | 0:404f5a4f1385 | 257 | [..] |
MartinJohnson | 0:404f5a4f1385 | 258 | (+) Entry: |
MartinJohnson | 0:404f5a4f1385 | 259 | (++) The Sleep mode is entered by executing the WFE() or WFI() instructions. |
MartinJohnson | 0:404f5a4f1385 | 260 | (+) Exit: |
MartinJohnson | 0:404f5a4f1385 | 261 | (++) Any peripheral interrupt acknowledged by the nested vectored interrupt |
MartinJohnson | 0:404f5a4f1385 | 262 | controller (NVIC) can wake up the device from Sleep mode. |
MartinJohnson | 0:404f5a4f1385 | 263 | |
MartinJohnson | 0:404f5a4f1385 | 264 | *** Stop mode *** |
MartinJohnson | 0:404f5a4f1385 | 265 | ================= |
MartinJohnson | 0:404f5a4f1385 | 266 | [..] In Stop mode, all clocks in the VCORE domain are stopped, the PLL, the HSI, |
MartinJohnson | 0:404f5a4f1385 | 267 | and the HSE RC oscillators are disabled. Internal SRAM and register |
MartinJohnson | 0:404f5a4f1385 | 268 | contents are preserved. |
MartinJohnson | 0:404f5a4f1385 | 269 | The voltage regulator can be configured either in normal or low-power mode. |
MartinJohnson | 0:404f5a4f1385 | 270 | |
MartinJohnson | 0:404f5a4f1385 | 271 | (+) Entry: |
MartinJohnson | 0:404f5a4f1385 | 272 | (++) The Stop mode is entered using the PWR_EnterSTOPMode(PWR_Regulator_LowPower,) |
MartinJohnson | 0:404f5a4f1385 | 273 | function with regulator in LowPower or with Regulator ON. |
MartinJohnson | 0:404f5a4f1385 | 274 | (+) Exit: |
MartinJohnson | 0:404f5a4f1385 | 275 | (++) Any EXTI Line (Internal or External) configured in Interrupt/Event mode |
MartinJohnson | 0:404f5a4f1385 | 276 | or any internal IPs (I2C or UASRT) wakeup event. |
MartinJohnson | 0:404f5a4f1385 | 277 | |
MartinJohnson | 0:404f5a4f1385 | 278 | *** Standby mode *** |
MartinJohnson | 0:404f5a4f1385 | 279 | ==================== |
MartinJohnson | 0:404f5a4f1385 | 280 | [..] The Standby mode allows to achieve the lowest power consumption. It is based |
MartinJohnson | 0:404f5a4f1385 | 281 | on the Cortex-M4 deepsleep mode, with the voltage regulator disabled. |
MartinJohnson | 0:404f5a4f1385 | 282 | The VCORE domain is consequently powered off. The PLL, the HSI, and the HSE |
MartinJohnson | 0:404f5a4f1385 | 283 | oscillator are also switched off. SRAM and register |
MartinJohnson | 0:404f5a4f1385 | 284 | contents are lost except for the Backup domain (RTC registers, RTC backup |
MartinJohnson | 0:404f5a4f1385 | 285 | registers and Standby circuitry). |
MartinJohnson | 0:404f5a4f1385 | 286 | |
MartinJohnson | 0:404f5a4f1385 | 287 | [..] The voltage regulator is OFF. |
MartinJohnson | 0:404f5a4f1385 | 288 | |
MartinJohnson | 0:404f5a4f1385 | 289 | (+) Entry: |
MartinJohnson | 0:404f5a4f1385 | 290 | (++) The Standby mode is entered using the PWR_EnterSTANDBYMode() function. |
MartinJohnson | 0:404f5a4f1385 | 291 | (+) Exit: |
MartinJohnson | 0:404f5a4f1385 | 292 | (++) WKUP pin rising edge, RTC alarm (Alarm A and Alarm B), RTC wakeup, |
MartinJohnson | 0:404f5a4f1385 | 293 | tamper event, time-stamp event, external reset in NRST pin, IWDG reset. |
MartinJohnson | 0:404f5a4f1385 | 294 | |
MartinJohnson | 0:404f5a4f1385 | 295 | *** Auto-wakeup (AWU) from low-power mode *** |
MartinJohnson | 0:404f5a4f1385 | 296 | ============================================= |
MartinJohnson | 0:404f5a4f1385 | 297 | [..] The MCU can be woken up from low-power mode by an RTC Alarm event, a tamper |
MartinJohnson | 0:404f5a4f1385 | 298 | event, a time-stamp event, or a comparator event, without depending on an |
MartinJohnson | 0:404f5a4f1385 | 299 | external interrupt (Auto-wakeup mode). |
MartinJohnson | 0:404f5a4f1385 | 300 | |
MartinJohnson | 0:404f5a4f1385 | 301 | (+) RTC auto-wakeup (AWU) from the Stop mode |
MartinJohnson | 0:404f5a4f1385 | 302 | (++) To wake up from the Stop mode with an RTC alarm event, it is necessary to: |
MartinJohnson | 0:404f5a4f1385 | 303 | (+++) Configure the EXTI Line 17 to be sensitive to rising edges (Interrupt |
MartinJohnson | 0:404f5a4f1385 | 304 | or Event modes) using the EXTI_Init() function. |
MartinJohnson | 0:404f5a4f1385 | 305 | (+++) Enable the RTC Alarm Interrupt using the RTC_ITConfig() function |
MartinJohnson | 0:404f5a4f1385 | 306 | (+++) Configure the RTC to generate the RTC alarm using the RTC_SetAlarm() |
MartinJohnson | 0:404f5a4f1385 | 307 | and RTC_AlarmCmd() functions. |
MartinJohnson | 0:404f5a4f1385 | 308 | (++) To wake up from the Stop mode with an RTC Tamper or time stamp event, it |
MartinJohnson | 0:404f5a4f1385 | 309 | is necessary to: |
MartinJohnson | 0:404f5a4f1385 | 310 | (+++) Configure the EXTI Line 19 to be sensitive to rising edges (Interrupt |
MartinJohnson | 0:404f5a4f1385 | 311 | or Event modes) using the EXTI_Init() function. |
MartinJohnson | 0:404f5a4f1385 | 312 | (+++) Enable the RTC Tamper or time stamp Interrupt using the RTC_ITConfig() |
MartinJohnson | 0:404f5a4f1385 | 313 | function. |
MartinJohnson | 0:404f5a4f1385 | 314 | (+++) Configure the RTC to detect the tamper or time stamp event using the |
MartinJohnson | 0:404f5a4f1385 | 315 | RTC_TimeStampConfig(), RTC_TamperTriggerConfig() and RTC_TamperCmd() |
MartinJohnson | 0:404f5a4f1385 | 316 | functions. |
MartinJohnson | 0:404f5a4f1385 | 317 | |
MartinJohnson | 0:404f5a4f1385 | 318 | (+) RTC auto-wakeup (AWU) from the Standby mode |
MartinJohnson | 0:404f5a4f1385 | 319 | (++) To wake up from the Standby mode with an RTC alarm event, it is necessary to: |
MartinJohnson | 0:404f5a4f1385 | 320 | (+++) Enable the RTC Alarm Interrupt using the RTC_ITConfig() function. |
MartinJohnson | 0:404f5a4f1385 | 321 | (+++) Configure the RTC to generate the RTC alarm using the RTC_SetAlarm() |
MartinJohnson | 0:404f5a4f1385 | 322 | and RTC_AlarmCmd() functions. |
MartinJohnson | 0:404f5a4f1385 | 323 | (++) To wake up from the Standby mode with an RTC Tamper or time stamp event, it |
MartinJohnson | 0:404f5a4f1385 | 324 | is necessary to: |
MartinJohnson | 0:404f5a4f1385 | 325 | (+++) Enable the RTC Tamper or time stamp Interrupt using the RTC_ITConfig() |
MartinJohnson | 0:404f5a4f1385 | 326 | function. |
MartinJohnson | 0:404f5a4f1385 | 327 | (+++) Configure the RTC to detect the tamper or time stamp event using the |
MartinJohnson | 0:404f5a4f1385 | 328 | RTC_TimeStampConfig(), RTC_TamperTriggerConfig() and RTC_TamperCmd() |
MartinJohnson | 0:404f5a4f1385 | 329 | functions. |
MartinJohnson | 0:404f5a4f1385 | 330 | |
MartinJohnson | 0:404f5a4f1385 | 331 | (+) Comparator auto-wakeup (AWU) from the Stop mode |
MartinJohnson | 0:404f5a4f1385 | 332 | (++) To wake up from the Stop mode with a comparator wakeup event, it is necessary to: |
MartinJohnson | 0:404f5a4f1385 | 333 | (+++) Configure the correspondent comparator EXTI Line to be sensitive to |
MartinJohnson | 0:404f5a4f1385 | 334 | the selected edges (falling, rising or falling and rising) |
MartinJohnson | 0:404f5a4f1385 | 335 | (Interrupt or Event modes) using the EXTI_Init() function. |
MartinJohnson | 0:404f5a4f1385 | 336 | (+++) Configure the comparator to generate the event. |
MartinJohnson | 0:404f5a4f1385 | 337 | |
MartinJohnson | 0:404f5a4f1385 | 338 | @endverbatim |
MartinJohnson | 0:404f5a4f1385 | 339 | * @{ |
MartinJohnson | 0:404f5a4f1385 | 340 | */ |
MartinJohnson | 0:404f5a4f1385 | 341 | |
MartinJohnson | 0:404f5a4f1385 | 342 | /** |
MartinJohnson | 0:404f5a4f1385 | 343 | * @brief Enters Sleep mode. |
MartinJohnson | 0:404f5a4f1385 | 344 | * @note In Sleep mode, all I/O pins keep the same state as in Run mode. |
MartinJohnson | 0:404f5a4f1385 | 345 | * @param PWR_SLEEPEntry: specifies if SLEEP mode in entered with WFI or WFE instruction. |
MartinJohnson | 0:404f5a4f1385 | 346 | * This parameter can be one of the following values: |
MartinJohnson | 0:404f5a4f1385 | 347 | * @arg PWR_SLEEPEntry_WFI: enter SLEEP mode with WFI instruction |
MartinJohnson | 0:404f5a4f1385 | 348 | * @arg PWR_SLEEPEntry_WFE: enter SLEEP mode with WFE instruction |
MartinJohnson | 0:404f5a4f1385 | 349 | * @retval None |
MartinJohnson | 0:404f5a4f1385 | 350 | */ |
MartinJohnson | 0:404f5a4f1385 | 351 | void PWR_EnterSleepMode(uint8_t PWR_SLEEPEntry) |
MartinJohnson | 0:404f5a4f1385 | 352 | { |
MartinJohnson | 0:404f5a4f1385 | 353 | /* Check the parameters */ |
MartinJohnson | 0:404f5a4f1385 | 354 | assert_param(IS_PWR_SLEEP_ENTRY(PWR_SLEEPEntry)); |
MartinJohnson | 0:404f5a4f1385 | 355 | |
MartinJohnson | 0:404f5a4f1385 | 356 | /* Clear SLEEPDEEP bit of Cortex System Control Register */ |
MartinJohnson | 0:404f5a4f1385 | 357 | SCB->SCR &= (uint32_t)~((uint32_t)SCB_SCR_SLEEPDEEP_Msk); |
MartinJohnson | 0:404f5a4f1385 | 358 | |
MartinJohnson | 0:404f5a4f1385 | 359 | /* Select SLEEP mode entry -------------------------------------------------*/ |
MartinJohnson | 0:404f5a4f1385 | 360 | if(PWR_SLEEPEntry == PWR_SLEEPEntry_WFI) |
MartinJohnson | 0:404f5a4f1385 | 361 | { |
MartinJohnson | 0:404f5a4f1385 | 362 | /* Request Wait For Interrupt */ |
MartinJohnson | 0:404f5a4f1385 | 363 | __WFI(); |
MartinJohnson | 0:404f5a4f1385 | 364 | } |
MartinJohnson | 0:404f5a4f1385 | 365 | else |
MartinJohnson | 0:404f5a4f1385 | 366 | { |
MartinJohnson | 0:404f5a4f1385 | 367 | /* Request Wait For Event */ |
MartinJohnson | 0:404f5a4f1385 | 368 | __SEV(); |
MartinJohnson | 0:404f5a4f1385 | 369 | __WFE(); |
MartinJohnson | 0:404f5a4f1385 | 370 | __WFE(); |
MartinJohnson | 0:404f5a4f1385 | 371 | } |
MartinJohnson | 0:404f5a4f1385 | 372 | } |
MartinJohnson | 0:404f5a4f1385 | 373 | |
MartinJohnson | 0:404f5a4f1385 | 374 | /** |
MartinJohnson | 0:404f5a4f1385 | 375 | * @brief Enters STOP mode. |
MartinJohnson | 0:404f5a4f1385 | 376 | * @note In Stop mode, all I/O pins keep the same state as in Run mode. |
MartinJohnson | 0:404f5a4f1385 | 377 | * @note When exiting Stop mode by issuing an interrupt or a wakeup event, |
MartinJohnson | 0:404f5a4f1385 | 378 | * the HSI RC oscillator is selected as system clock. |
MartinJohnson | 0:404f5a4f1385 | 379 | * @note When the voltage regulator operates in low power mode, an additional |
MartinJohnson | 0:404f5a4f1385 | 380 | * startup delay is incurred when waking up from Stop mode. |
MartinJohnson | 0:404f5a4f1385 | 381 | * By keeping the internal regulator ON during Stop mode, the consumption |
MartinJohnson | 0:404f5a4f1385 | 382 | * is higher although the startup time is reduced. |
MartinJohnson | 0:404f5a4f1385 | 383 | * @param PWR_Regulator: specifies the regulator state in STOP mode. |
MartinJohnson | 0:404f5a4f1385 | 384 | * This parameter can be one of the following values: |
MartinJohnson | 0:404f5a4f1385 | 385 | * @arg PWR_Regulator_ON: STOP mode with regulator ON |
MartinJohnson | 0:404f5a4f1385 | 386 | * @arg PWR_Regulator_LowPower: STOP mode with regulator in low power mode |
MartinJohnson | 0:404f5a4f1385 | 387 | * @param PWR_STOPEntry: specifies if STOP mode in entered with WFI or WFE instruction. |
MartinJohnson | 0:404f5a4f1385 | 388 | * This parameter can be one of the following values: |
MartinJohnson | 0:404f5a4f1385 | 389 | * @arg PWR_STOPEntry_WFI: enter STOP mode with WFI instruction |
MartinJohnson | 0:404f5a4f1385 | 390 | * @arg PWR_STOPEntry_WFE: enter STOP mode with WFE instruction |
MartinJohnson | 0:404f5a4f1385 | 391 | * @retval None |
MartinJohnson | 0:404f5a4f1385 | 392 | */ |
MartinJohnson | 0:404f5a4f1385 | 393 | void PWR_EnterSTOPMode(uint32_t PWR_Regulator, uint8_t PWR_STOPEntry) |
MartinJohnson | 0:404f5a4f1385 | 394 | { |
MartinJohnson | 0:404f5a4f1385 | 395 | uint32_t tmpreg = 0; |
MartinJohnson | 0:404f5a4f1385 | 396 | |
MartinJohnson | 0:404f5a4f1385 | 397 | /* Check the parameters */ |
MartinJohnson | 0:404f5a4f1385 | 398 | assert_param(IS_PWR_REGULATOR(PWR_Regulator)); |
MartinJohnson | 0:404f5a4f1385 | 399 | assert_param(IS_PWR_STOP_ENTRY(PWR_STOPEntry)); |
MartinJohnson | 0:404f5a4f1385 | 400 | |
MartinJohnson | 0:404f5a4f1385 | 401 | /* Select the regulator state in STOP mode ---------------------------------*/ |
MartinJohnson | 0:404f5a4f1385 | 402 | tmpreg = PWR->CR; |
MartinJohnson | 0:404f5a4f1385 | 403 | /* Clear PDDS and LPDSR bits */ |
MartinJohnson | 0:404f5a4f1385 | 404 | tmpreg &= CR_DS_MASK; |
MartinJohnson | 0:404f5a4f1385 | 405 | |
MartinJohnson | 0:404f5a4f1385 | 406 | /* Set LPDSR bit according to PWR_Regulator value */ |
MartinJohnson | 0:404f5a4f1385 | 407 | tmpreg |= PWR_Regulator; |
MartinJohnson | 0:404f5a4f1385 | 408 | |
MartinJohnson | 0:404f5a4f1385 | 409 | /* Store the new value */ |
MartinJohnson | 0:404f5a4f1385 | 410 | PWR->CR = tmpreg; |
MartinJohnson | 0:404f5a4f1385 | 411 | |
MartinJohnson | 0:404f5a4f1385 | 412 | /* Set SLEEPDEEP bit of Cortex System Control Register */ |
MartinJohnson | 0:404f5a4f1385 | 413 | SCB->SCR |= SCB_SCR_SLEEPDEEP_Msk; |
MartinJohnson | 0:404f5a4f1385 | 414 | |
MartinJohnson | 0:404f5a4f1385 | 415 | /* Select STOP mode entry --------------------------------------------------*/ |
MartinJohnson | 0:404f5a4f1385 | 416 | if(PWR_STOPEntry == PWR_STOPEntry_WFI) |
MartinJohnson | 0:404f5a4f1385 | 417 | { |
MartinJohnson | 0:404f5a4f1385 | 418 | /* Request Wait For Interrupt */ |
MartinJohnson | 0:404f5a4f1385 | 419 | __WFI(); |
MartinJohnson | 0:404f5a4f1385 | 420 | } |
MartinJohnson | 0:404f5a4f1385 | 421 | else |
MartinJohnson | 0:404f5a4f1385 | 422 | { |
MartinJohnson | 0:404f5a4f1385 | 423 | /* Request Wait For Event */ |
MartinJohnson | 0:404f5a4f1385 | 424 | __WFE(); |
MartinJohnson | 0:404f5a4f1385 | 425 | } |
MartinJohnson | 0:404f5a4f1385 | 426 | /* Reset SLEEPDEEP bit of Cortex System Control Register */ |
MartinJohnson | 0:404f5a4f1385 | 427 | SCB->SCR &= (uint32_t)~((uint32_t)SCB_SCR_SLEEPDEEP_Msk); |
MartinJohnson | 0:404f5a4f1385 | 428 | } |
MartinJohnson | 0:404f5a4f1385 | 429 | |
MartinJohnson | 0:404f5a4f1385 | 430 | /** |
MartinJohnson | 0:404f5a4f1385 | 431 | * @brief Enters STANDBY mode. |
MartinJohnson | 0:404f5a4f1385 | 432 | * @note In Standby mode, all I/O pins are high impedance except for: |
MartinJohnson | 0:404f5a4f1385 | 433 | * @note Reset pad (still available) |
MartinJohnson | 0:404f5a4f1385 | 434 | * @note RTC_AF1 pin (PC13) if configured for Wakeup pin 2 (WKUP2), tamper, |
MartinJohnson | 0:404f5a4f1385 | 435 | * time-stamp, RTC Alarm out, or RTC clock calibration out. |
MartinJohnson | 0:404f5a4f1385 | 436 | * @note WKUP pin 1 (PA0) and WKUP pin 3 (PE6), if enabled. |
MartinJohnson | 0:404f5a4f1385 | 437 | * @note The Wakeup flag (WUF) need to be cleared at application level before to call this function. |
MartinJohnson | 0:404f5a4f1385 | 438 | * @param None |
MartinJohnson | 0:404f5a4f1385 | 439 | * @retval None |
MartinJohnson | 0:404f5a4f1385 | 440 | */ |
MartinJohnson | 0:404f5a4f1385 | 441 | void PWR_EnterSTANDBYMode(void) |
MartinJohnson | 0:404f5a4f1385 | 442 | { |
MartinJohnson | 0:404f5a4f1385 | 443 | /* Select STANDBY mode */ |
MartinJohnson | 0:404f5a4f1385 | 444 | PWR->CR |= PWR_CR_PDDS; |
MartinJohnson | 0:404f5a4f1385 | 445 | |
MartinJohnson | 0:404f5a4f1385 | 446 | /* Set SLEEPDEEP bit of Cortex System Control Register */ |
MartinJohnson | 0:404f5a4f1385 | 447 | SCB->SCR |= SCB_SCR_SLEEPDEEP_Msk; |
MartinJohnson | 0:404f5a4f1385 | 448 | |
MartinJohnson | 0:404f5a4f1385 | 449 | /* This option is used to ensure that store operations are completed */ |
MartinJohnson | 0:404f5a4f1385 | 450 | #if defined ( __CC_ARM ) |
MartinJohnson | 0:404f5a4f1385 | 451 | __force_stores(); |
MartinJohnson | 0:404f5a4f1385 | 452 | #endif |
MartinJohnson | 0:404f5a4f1385 | 453 | /* Request Wait For Interrupt */ |
MartinJohnson | 0:404f5a4f1385 | 454 | __WFI(); |
MartinJohnson | 0:404f5a4f1385 | 455 | } |
MartinJohnson | 0:404f5a4f1385 | 456 | |
MartinJohnson | 0:404f5a4f1385 | 457 | /** |
MartinJohnson | 0:404f5a4f1385 | 458 | * @} |
MartinJohnson | 0:404f5a4f1385 | 459 | */ |
MartinJohnson | 0:404f5a4f1385 | 460 | |
MartinJohnson | 0:404f5a4f1385 | 461 | /** @defgroup PWR_Group5 Flags management functions |
MartinJohnson | 0:404f5a4f1385 | 462 | * @brief Flags management functions |
MartinJohnson | 0:404f5a4f1385 | 463 | * |
MartinJohnson | 0:404f5a4f1385 | 464 | @verbatim |
MartinJohnson | 0:404f5a4f1385 | 465 | =============================================================================== |
MartinJohnson | 0:404f5a4f1385 | 466 | ##### Flags management functions ##### |
MartinJohnson | 0:404f5a4f1385 | 467 | =============================================================================== |
MartinJohnson | 0:404f5a4f1385 | 468 | |
MartinJohnson | 0:404f5a4f1385 | 469 | @endverbatim |
MartinJohnson | 0:404f5a4f1385 | 470 | * @{ |
MartinJohnson | 0:404f5a4f1385 | 471 | */ |
MartinJohnson | 0:404f5a4f1385 | 472 | |
MartinJohnson | 0:404f5a4f1385 | 473 | /** |
MartinJohnson | 0:404f5a4f1385 | 474 | * @brief Checks whether the specified PWR flag is set or not. |
MartinJohnson | 0:404f5a4f1385 | 475 | * @param PWR_FLAG: specifies the flag to check. |
MartinJohnson | 0:404f5a4f1385 | 476 | * This parameter can be one of the following values: |
MartinJohnson | 0:404f5a4f1385 | 477 | * @arg PWR_FLAG_WU: Wake Up flag. This flag indicates that a wakeup event |
MartinJohnson | 0:404f5a4f1385 | 478 | * was received from the WKUP pin or from the RTC alarm (Alarm A or Alarm B), |
MartinJohnson | 0:404f5a4f1385 | 479 | * RTC Tamper event, RTC TimeStamp event or RTC Wakeup. |
MartinJohnson | 0:404f5a4f1385 | 480 | * @arg PWR_FLAG_SB: StandBy flag. This flag indicates that the system was |
MartinJohnson | 0:404f5a4f1385 | 481 | * resumed from StandBy mode. |
MartinJohnson | 0:404f5a4f1385 | 482 | * @arg PWR_FLAG_PVDO: PVD Output. This flag is valid only if PVD is enabled |
MartinJohnson | 0:404f5a4f1385 | 483 | * by the PWR_PVDCmd() function. |
MartinJohnson | 0:404f5a4f1385 | 484 | * @arg PWR_FLAG_VREFINTRDY: Internal Voltage Reference Ready flag. This |
MartinJohnson | 0:404f5a4f1385 | 485 | * flag indicates the state of the internal voltage reference, VREFINT. |
MartinJohnson | 0:404f5a4f1385 | 486 | * @retval The new state of PWR_FLAG (SET or RESET). |
MartinJohnson | 0:404f5a4f1385 | 487 | */ |
MartinJohnson | 0:404f5a4f1385 | 488 | FlagStatus PWR_GetFlagStatus(uint32_t PWR_FLAG) |
MartinJohnson | 0:404f5a4f1385 | 489 | { |
MartinJohnson | 0:404f5a4f1385 | 490 | FlagStatus bitstatus = RESET; |
MartinJohnson | 0:404f5a4f1385 | 491 | /* Check the parameters */ |
MartinJohnson | 0:404f5a4f1385 | 492 | assert_param(IS_PWR_GET_FLAG(PWR_FLAG)); |
MartinJohnson | 0:404f5a4f1385 | 493 | |
MartinJohnson | 0:404f5a4f1385 | 494 | if ((PWR->CSR & PWR_FLAG) != (uint32_t)RESET) |
MartinJohnson | 0:404f5a4f1385 | 495 | { |
MartinJohnson | 0:404f5a4f1385 | 496 | bitstatus = SET; |
MartinJohnson | 0:404f5a4f1385 | 497 | } |
MartinJohnson | 0:404f5a4f1385 | 498 | else |
MartinJohnson | 0:404f5a4f1385 | 499 | { |
MartinJohnson | 0:404f5a4f1385 | 500 | bitstatus = RESET; |
MartinJohnson | 0:404f5a4f1385 | 501 | } |
MartinJohnson | 0:404f5a4f1385 | 502 | /* Return the flag status */ |
MartinJohnson | 0:404f5a4f1385 | 503 | return bitstatus; |
MartinJohnson | 0:404f5a4f1385 | 504 | } |
MartinJohnson | 0:404f5a4f1385 | 505 | |
MartinJohnson | 0:404f5a4f1385 | 506 | /** |
MartinJohnson | 0:404f5a4f1385 | 507 | * @brief Clears the PWR's pending flags. |
MartinJohnson | 0:404f5a4f1385 | 508 | * @param PWR_FLAG: specifies the flag to clear. |
MartinJohnson | 0:404f5a4f1385 | 509 | * This parameter can be one of the following values: |
MartinJohnson | 0:404f5a4f1385 | 510 | * @arg PWR_FLAG_WU: Wake Up flag |
MartinJohnson | 0:404f5a4f1385 | 511 | * @arg PWR_FLAG_SB: StandBy flag |
MartinJohnson | 0:404f5a4f1385 | 512 | * @retval None |
MartinJohnson | 0:404f5a4f1385 | 513 | */ |
MartinJohnson | 0:404f5a4f1385 | 514 | void PWR_ClearFlag(uint32_t PWR_FLAG) |
MartinJohnson | 0:404f5a4f1385 | 515 | { |
MartinJohnson | 0:404f5a4f1385 | 516 | /* Check the parameters */ |
MartinJohnson | 0:404f5a4f1385 | 517 | assert_param(IS_PWR_CLEAR_FLAG(PWR_FLAG)); |
MartinJohnson | 0:404f5a4f1385 | 518 | |
MartinJohnson | 0:404f5a4f1385 | 519 | PWR->CR |= PWR_FLAG << 2; |
MartinJohnson | 0:404f5a4f1385 | 520 | } |
MartinJohnson | 0:404f5a4f1385 | 521 | |
MartinJohnson | 0:404f5a4f1385 | 522 | /** |
MartinJohnson | 0:404f5a4f1385 | 523 | * @} |
MartinJohnson | 0:404f5a4f1385 | 524 | */ |
MartinJohnson | 0:404f5a4f1385 | 525 | |
MartinJohnson | 0:404f5a4f1385 | 526 | /** |
MartinJohnson | 0:404f5a4f1385 | 527 | * @} |
MartinJohnson | 0:404f5a4f1385 | 528 | */ |
MartinJohnson | 0:404f5a4f1385 | 529 | |
MartinJohnson | 0:404f5a4f1385 | 530 | /** |
MartinJohnson | 0:404f5a4f1385 | 531 | * @} |
MartinJohnson | 0:404f5a4f1385 | 532 | */ |
MartinJohnson | 0:404f5a4f1385 | 533 | |
MartinJohnson | 0:404f5a4f1385 | 534 | /** |
MartinJohnson | 0:404f5a4f1385 | 535 | * @} |
MartinJohnson | 0:404f5a4f1385 | 536 | */ |
MartinJohnson | 0:404f5a4f1385 | 537 | |
MartinJohnson | 0:404f5a4f1385 | 538 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |