Martin Johnson
/
STM32F3-Discovery
Important changes to repositories hosted on mbed.com
Mbed hosted mercurial repositories are deprecated and are due to be permanently deleted in July 2026.
To keep a copy of this software download the repository Zip archive or clone locally using Mercurial.
It is also possible to export all your personal repositories from the account settings page.
Dependents: Space_Invaders_Demo neopixels gpio_test_stm32f3_discovery gpio_test_systimer ... more
Embed:
(wiki syntax)
Show/hide line numbers
stm32f30x_syscfg.h
Go to the documentation of this file.
00001 /** 00002 ****************************************************************************** 00003 * @file stm32f30x_syscfg.h 00004 * @author MCD Application Team 00005 * @version V1.2.3 00006 * @date 10-July-2015 00007 * @brief This file contains all the functions prototypes for the SYSCFG firmware 00008 * library. 00009 ****************************************************************************** 00010 * @attention 00011 * 00012 * <h2><center>© COPYRIGHT 2015 STMicroelectronics</center></h2> 00013 * 00014 * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); 00015 * You may not use this file except in compliance with the License. 00016 * You may obtain a copy of the License at: 00017 * 00018 * http://www.st.com/software_license_agreement_liberty_v2 00019 * 00020 * Unless required by applicable law or agreed to in writing, software 00021 * distributed under the License is distributed on an "AS IS" BASIS, 00022 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 00023 * See the License for the specific language governing permissions and 00024 * limitations under the License. 00025 * 00026 ****************************************************************************** 00027 */ 00028 00029 /*!< Define to prevent recursive inclusion -----------------------------------*/ 00030 #ifndef __STM32F30x_SYSCFG_H 00031 #define __STM32F30x_SYSCFG_H 00032 00033 #ifdef __cplusplus 00034 extern "C" { 00035 #endif 00036 00037 /*!< Includes ----------------------------------------------------------------*/ 00038 #include "stm32f30x.h" 00039 00040 /** @addtogroup STM32F30x_StdPeriph_Driver 00041 * @{ 00042 */ 00043 00044 /** @addtogroup SYSCFG 00045 * @{ 00046 */ 00047 00048 /* Exported types ------------------------------------------------------------*/ 00049 /* Exported constants --------------------------------------------------------*/ 00050 00051 /** @defgroup SYSCFG_Exported_Constants 00052 * @{ 00053 */ 00054 00055 /** @defgroup SYSCFG_EXTI_Port_Sources 00056 * @{ 00057 */ 00058 #define EXTI_PortSourceGPIOA ((uint8_t)0x00) 00059 #define EXTI_PortSourceGPIOB ((uint8_t)0x01) 00060 #define EXTI_PortSourceGPIOC ((uint8_t)0x02) 00061 #define EXTI_PortSourceGPIOD ((uint8_t)0x03) 00062 #define EXTI_PortSourceGPIOE ((uint8_t)0x04) 00063 #define EXTI_PortSourceGPIOF ((uint8_t)0x05) 00064 #define EXTI_PortSourceGPIOG ((uint8_t)0x06) 00065 #define EXTI_PortSourceGPIOH ((uint8_t)0x07) 00066 00067 #define IS_EXTI_PORT_SOURCE(PORTSOURCE) (((PORTSOURCE) == EXTI_PortSourceGPIOA) || \ 00068 ((PORTSOURCE) == EXTI_PortSourceGPIOB) || \ 00069 ((PORTSOURCE) == EXTI_PortSourceGPIOC) || \ 00070 ((PORTSOURCE) == EXTI_PortSourceGPIOD) || \ 00071 ((PORTSOURCE) == EXTI_PortSourceGPIOE) || \ 00072 ((PORTSOURCE) == EXTI_PortSourceGPIOF)|| \ 00073 ((PORTSOURCE) == EXTI_PortSourceGPIOG)|| \ 00074 ((PORTSOURCE) == EXTI_PortSourceGPIOH)) 00075 /** 00076 * @} 00077 */ 00078 00079 /** @defgroup SYSCFG_EXTI_Pin_sources 00080 * @{ 00081 */ 00082 #define EXTI_PinSource0 ((uint8_t)0x00) 00083 #define EXTI_PinSource1 ((uint8_t)0x01) 00084 #define EXTI_PinSource2 ((uint8_t)0x02) 00085 #define EXTI_PinSource3 ((uint8_t)0x03) 00086 #define EXTI_PinSource4 ((uint8_t)0x04) 00087 #define EXTI_PinSource5 ((uint8_t)0x05) 00088 #define EXTI_PinSource6 ((uint8_t)0x06) 00089 #define EXTI_PinSource7 ((uint8_t)0x07) 00090 #define EXTI_PinSource8 ((uint8_t)0x08) 00091 #define EXTI_PinSource9 ((uint8_t)0x09) 00092 #define EXTI_PinSource10 ((uint8_t)0x0A) 00093 #define EXTI_PinSource11 ((uint8_t)0x0B) 00094 #define EXTI_PinSource12 ((uint8_t)0x0C) 00095 #define EXTI_PinSource13 ((uint8_t)0x0D) 00096 #define EXTI_PinSource14 ((uint8_t)0x0E) 00097 #define EXTI_PinSource15 ((uint8_t)0x0F) 00098 00099 #define IS_EXTI_PIN_SOURCE(PINSOURCE) (((PINSOURCE) == EXTI_PinSource0) || \ 00100 ((PINSOURCE) == EXTI_PinSource1) || \ 00101 ((PINSOURCE) == EXTI_PinSource2) || \ 00102 ((PINSOURCE) == EXTI_PinSource3) || \ 00103 ((PINSOURCE) == EXTI_PinSource4) || \ 00104 ((PINSOURCE) == EXTI_PinSource5) || \ 00105 ((PINSOURCE) == EXTI_PinSource6) || \ 00106 ((PINSOURCE) == EXTI_PinSource7) || \ 00107 ((PINSOURCE) == EXTI_PinSource8) || \ 00108 ((PINSOURCE) == EXTI_PinSource9) || \ 00109 ((PINSOURCE) == EXTI_PinSource10) || \ 00110 ((PINSOURCE) == EXTI_PinSource11) || \ 00111 ((PINSOURCE) == EXTI_PinSource12) || \ 00112 ((PINSOURCE) == EXTI_PinSource13) || \ 00113 ((PINSOURCE) == EXTI_PinSource14) || \ 00114 ((PINSOURCE) == EXTI_PinSource15)) 00115 /** 00116 * @} 00117 */ 00118 00119 /** @defgroup SYSCFG_Memory_Remap_Config 00120 * @{ 00121 */ 00122 #define SYSCFG_MemoryRemap_Flash ((uint8_t)0x00) 00123 #define SYSCFG_MemoryRemap_SystemMemory ((uint8_t)0x01) 00124 #define SYSCFG_MemoryRemap_SRAM ((uint8_t)0x03) 00125 #define SYSCFG_MemoryRemap_FMC ((uint8_t)0x04) 00126 00127 00128 #define IS_SYSCFG_MEMORY_REMAP(REMAP) (((REMAP) == SYSCFG_MemoryRemap_Flash) || \ 00129 ((REMAP) == SYSCFG_MemoryRemap_SystemMemory) || \ 00130 ((REMAP) == SYSCFG_MemoryRemap_SRAM) || \ 00131 ((REMAP) == SYSCFG_MemoryRemap_FMC)) 00132 00133 /** 00134 * @} 00135 */ 00136 00137 /** @defgroup SYSCFG_DMA_Remap_Config 00138 * @{ 00139 */ 00140 #define SYSCFG_DMARemap_TIM17 SYSCFG_CFGR1_TIM17_DMA_RMP /*!< Remap TIM17 DMA requests from channel1 to channel2 */ 00141 #define SYSCFG_DMARemap_TIM16 SYSCFG_CFGR1_TIM16_DMA_RMP /*!< Remap TIM16 DMA requests from channel3 to channel4 */ 00142 #define SYSCFG_DMARemap_ADC2ADC4 SYSCFG_CFGR1_ADC24_DMA_RMP /*!< Remap ADC2 and ADC4 DMA requests */ 00143 00144 #define SYSCFG_DMARemap_TIM6DAC1Ch1 SYSCFG_CFGR1_TIM6DAC1Ch1_DMA_RMP /* Remap TIM6/DAC1 Ch1 DMA requests */ 00145 #define SYSCFG_DMARemap_TIM7DAC1Ch2 SYSCFG_CFGR1_TIM7DAC1Ch2_DMA_RMP /* Remap TIM7/DAC1 Ch2 DMA requests */ 00146 #define SYSCFG_DMARemap_DAC2Ch1 SYSCFG_CFGR1_DAC2Ch1_DMA_RMP /* Remap DAC2 Ch1 DMA requests */ 00147 00148 #define SYSCFG_DMARemapCh2_SPI1_RX ((uint32_t)0x80000003) /* Remap SPI1 RX DMA CH2 requests */ 00149 #define SYSCFG_DMARemapCh4_SPI1_RX ((uint32_t)0x80000001) /* Remap SPI1 RX DMA CH4 requests */ 00150 #define SYSCFG_DMARemapCh6_SPI1_RX ((uint32_t)0x80000002) /* Remap SPI1 RX DMA CH6 requests */ 00151 00152 #define SYSCFG_DMARemapCh3_SPI1_TX ((uint32_t)0x8000000C) /* Remap SPI1 TX DMA CH2 requests */ 00153 #define SYSCFG_DMARemapCh5_SPI1_TX ((uint32_t)0x80000004) /* Remap SPI1 TX DMA CH5 requests */ 00154 #define SYSCFG_DMARemapCh7_SPI1_TX ((uint32_t)0x80000008) /* Remap SPI1 TX DMA CH7 requests */ 00155 00156 #define SYSCFG_DMARemapCh7_I2C1_RX ((uint32_t)0x80000030) /* Remap I2C1 RX DMA CH7 requests */ 00157 #define SYSCFG_DMARemapCh3_I2C1_RX ((uint32_t)0x80000010) /* Remap I2C1 RX DMA CH3 requests */ 00158 #define SYSCFG_DMARemapCh5_I2C1_RX ((uint32_t)0x80000020) /* Remap I2C1 RX DMA CH5 requests */ 00159 00160 #define SYSCFG_DMARemapCh6_I2C1_TX ((uint32_t)0x800000C0) /* Remap I2C1 TX DMA CH6 requests */ 00161 #define SYSCFG_DMARemapCh2_I2C1_TX ((uint32_t)0x80000040) /* Remap I2C1 TX DMA CH2 requests */ 00162 #define SYSCFG_DMARemapCh4_I2C1_TX ((uint32_t)0x80000080) /* Remap I2C1 TX DMA CH4 requests */ 00163 00164 #define SYSCFG_DMARemapCh4_ADC2 ((uint32_t)0x80000300) /* Remap ADC2 DMA1 Ch4 requests */ 00165 #define SYSCFG_DMARemapCh2_ADC2 ((uint32_t)0x80000200) /* Remap ADC2 DMA1 Ch2 requests */ 00166 00167 /* SYSCFG_DMA_Remap_Legacy */ 00168 #define SYSCFG_DMARemap_TIM6DAC1 SYSCFG_DMARemap_TIM6DAC1Ch1 /*!< Remap TIM6/DAC1 DMA requests */ 00169 #define SYSCFG_DMARemap_TIM7DAC2 SYSCFG_DMARemap_TIM7DAC1Ch2 /*!< Remap TIM7/DAC2 DMA requests */ 00170 00171 #define IS_SYSCFG_DMA_REMAP(REMAP) (((REMAP) == SYSCFG_DMARemap_TIM17) || \ 00172 ((REMAP) == SYSCFG_DMARemap_TIM16) || \ 00173 ((REMAP) == SYSCFG_DMARemap_ADC2ADC4) || \ 00174 ((REMAP) == SYSCFG_DMARemap_TIM6DAC1Ch1) || \ 00175 ((REMAP) == SYSCFG_DMARemap_TIM7DAC1Ch2) || \ 00176 ((REMAP) == SYSCFG_DMARemap_DAC2Ch1) || \ 00177 ((REMAP) == SYSCFG_DMARemapCh2_SPI1_RX) || \ 00178 ((REMAP) == SYSCFG_DMARemapCh4_SPI1_RX) || \ 00179 ((REMAP) == SYSCFG_DMARemapCh6_SPI1_RX) || \ 00180 ((REMAP) == SYSCFG_DMARemapCh5_SPI1_TX) || \ 00181 ((REMAP) == SYSCFG_DMARemapCh5_SPI1_TX) || \ 00182 ((REMAP) == SYSCFG_DMARemapCh7_SPI1_TX) || \ 00183 ((REMAP) == SYSCFG_DMARemapCh7_I2C1_RX) || \ 00184 ((REMAP) == SYSCFG_DMARemapCh3_I2C1_RX) || \ 00185 ((REMAP) == SYSCFG_DMARemapCh5_I2C1_RX) || \ 00186 ((REMAP) == SYSCFG_DMARemapCh6_I2C1_TX) || \ 00187 ((REMAP) == SYSCFG_DMARemapCh2_I2C1_TX) || \ 00188 ((REMAP) == SYSCFG_DMARemapCh4_I2C1_TX) || \ 00189 ((REMAP) == SYSCFG_DMARemapCh4_ADC2) || \ 00190 ((REMAP) == SYSCFG_DMARemapCh2_ADC2)) 00191 00192 /** 00193 * @} 00194 */ 00195 00196 /** @defgroup SYSCFG_Trigger_Remap_Config 00197 * @{ 00198 */ 00199 #define SYSCFG_TriggerRemap_DACTIM3 SYSCFG_CFGR1_DAC1_TRIG1_RMP /*!< Remap DAC trigger to TIM3 */ 00200 #define SYSCFG_TriggerRemap_TIM1TIM17 SYSCFG_CFGR1_TIM1_ITR3_RMP /*!< Remap TIM1 ITR3 to TIM17 OC */ 00201 #define SYSCFG_TriggerRemap_DACHRTIM1_TRIG1 ((uint32_t)0x80010000) /*!< Remap DAC trigger to HRTIM1 TRIG1 */ 00202 #define SYSCFG_TriggerRemap_DACHRTIM1_TRIG2 ((uint32_t)0x80020000) /*!< Remap DAC trigger to HRTIM1 TRIG2 */ 00203 00204 #define IS_SYSCFG_TRIGGER_REMAP(REMAP) (((REMAP) == SYSCFG_TriggerRemap_DACTIM3) || \ 00205 ((REMAP) == SYSCFG_TriggerRemap_DACHRTIM1_TRIG1) || \ 00206 ((REMAP) == SYSCFG_TriggerRemap_DACHRTIM1_TRIG2) || \ 00207 ((REMAP) == SYSCFG_TriggerRemap_TIM1TIM17)) 00208 00209 /** 00210 * @} 00211 */ 00212 00213 /** @defgroup SYSCFG_EncoderRemap_Config 00214 * @{ 00215 */ 00216 #define SYSCFG_EncoderRemap_No ((uint32_t)0x00000000) /*!< No redirection */ 00217 #define SYSCFG_EncoderRemap_TIM2 SYSCFG_CFGR1_ENCODER_MODE_0 /*!< Timer 2 IC1 and IC2 connected to TIM15 IC1 and IC2 */ 00218 #define SYSCFG_EncoderRemap_TIM3 SYSCFG_CFGR1_ENCODER_MODE_1 /*!< Timer 3 IC1 and IC2 connected to TIM15 IC1 and IC2 */ 00219 #define SYSCFG_EncoderRemap_TIM4 SYSCFG_CFGR1_ENCODER_MODE /*!< Timer 4 IC1 and IC2 connected to TIM15 IC1 and IC2 */ 00220 00221 #define IS_SYSCFG_ENCODER_REMAP(REMAP) (((REMAP) == SYSCFG_EncoderRemap_No) || \ 00222 ((REMAP) == SYSCFG_EncoderRemap_TIM2) || \ 00223 ((REMAP) == SYSCFG_EncoderRemap_TIM3) || \ 00224 ((REMAP) == SYSCFG_EncoderRemap_TIM4)) 00225 00226 /** 00227 * @} 00228 */ 00229 00230 /** @defgroup SYSCFG_I2C_FastModePlus_Config 00231 * @{ 00232 */ 00233 #define SYSCFG_I2CFastModePlus_PB6 SYSCFG_CFGR1_I2C_PB6_FMP /*!< Enable Fast Mode Plus on PB6 */ 00234 #define SYSCFG_I2CFastModePlus_PB7 SYSCFG_CFGR1_I2C_PB7_FMP /*!< Enable Fast Mode Plus on PB7 */ 00235 #define SYSCFG_I2CFastModePlus_PB8 SYSCFG_CFGR1_I2C_PB8_FMP /*!< Enable Fast Mode Plus on PB8 */ 00236 #define SYSCFG_I2CFastModePlus_PB9 SYSCFG_CFGR1_I2C_PB9_FMP /*!< Enable Fast Mode Plus on PB9 */ 00237 #define SYSCFG_I2CFastModePlus_I2C1 SYSCFG_CFGR1_I2C1_FMP /*!< Enable Fast Mode Plus on I2C1 pins */ 00238 #define SYSCFG_I2CFastModePlus_I2C2 SYSCFG_CFGR1_I2C2_FMP /*!< Enable Fast Mode Plus on I2C2 pins */ 00239 #define SYSCFG_I2CFastModePlus_I2C3 SYSCFG_CFGR1_I2C3_FMP /*!< Enable Fast Mode Plus on I2C3 pins */ 00240 00241 #define IS_SYSCFG_I2C_FMP(PIN) (((PIN) == SYSCFG_I2CFastModePlus_PB6) || \ 00242 ((PIN) == SYSCFG_I2CFastModePlus_PB7) || \ 00243 ((PIN) == SYSCFG_I2CFastModePlus_PB8) || \ 00244 ((PIN) == SYSCFG_I2CFastModePlus_PB9) || \ 00245 ((PIN) == SYSCFG_I2CFastModePlus_I2C1) || \ 00246 ((PIN) == SYSCFG_I2CFastModePlus_I2C2)|| \ 00247 ((PIN) == SYSCFG_I2CFastModePlus_I2C3)) 00248 00249 /** 00250 * @} 00251 */ 00252 00253 /** @defgroup SYSCFG_FPU_Interrupt_Config 00254 * @{ 00255 */ 00256 #define SYSCFG_IT_IXC SYSCFG_CFGR1_FPU_IE_5 /*!< Inexact Interrupt enable (interrupt disabled by default) */ 00257 #define SYSCFG_IT_IDC SYSCFG_CFGR1_FPU_IE_4 /*!< Input denormal Interrupt enable */ 00258 #define SYSCFG_IT_OFC SYSCFG_CFGR1_FPU_IE_3 /*!< Overflow Interrupt enable */ 00259 #define SYSCFG_IT_UFC SYSCFG_CFGR1_FPU_IE_2 /*!< Underflow Interrupt enable */ 00260 #define SYSCFG_IT_DZC SYSCFG_CFGR1_FPU_IE_1 /*!< Divide-by-zero Interrupt enable */ 00261 #define SYSCFG_IT_IOC SYSCFG_CFGR1_FPU_IE_0 /*!< Invalid operation Interrupt enable */ 00262 00263 #define IS_SYSCFG_IT(IT) ((((IT) & (uint32_t)0x03FFFFFF) == 0) && ((IT) != 0)) 00264 00265 /** 00266 * @} 00267 */ 00268 00269 /** @defgroup SYSCFG_Lock_Config 00270 * @{ 00271 */ 00272 #define SYSCFG_Break_PVD SYSCFG_CFGR2_PVD_LOCK /*!< Enables and locks the PVD connection with TIM1/8/15/16/17 Break Input and also the PVD_EN and PVDSEL[2:0] bits of the Power Control Interface */ 00273 #define SYSCFG_Break_SRAMParity SYSCFG_CFGR2_SRAM_PARITY_LOCK /*!< Enables and locks the SRAM_PARITY error signal with Break Input of TIM1/8/15/16/17 */ 00274 #define SYSCFG_Break_Lockup SYSCFG_CFGR2_LOCKUP_LOCK /*!< Enables and locks the LOCKUP output of CortexM4 with Break Input of TIM1/8/15/16/17 */ 00275 00276 #define IS_SYSCFG_LOCK_CONFIG(CONFIG) (((CONFIG) == SYSCFG_Break_PVD) || \ 00277 ((CONFIG) == SYSCFG_Break_SRAMParity) || \ 00278 ((CONFIG) == SYSCFG_Break_Lockup)) 00279 00280 /** 00281 * @} 00282 */ 00283 00284 /** @defgroup ADC_Trigger_Remapping 00285 * @{ 00286 */ 00287 #define REMAPADCTRIGGER_ADC12_EXT2 SYSCFG_CFGR4_ADC12_EXT2_RMP /*!< Input trigger of ADC12 regular channel EXT2 00288 0: No remap (TIM1_CC3) 00289 1: Remap (TIM20_TRGO) */ 00290 #define REMAPADCTRIGGER_ADC12_EXT3 SYSCFG_CFGR4_ADC12_EXT3_RMP /*!< Input trigger of ADC12 regular channel EXT3 00291 0: No remap (TIM2_CC2) 00292 1: Remap (TIM20_TRGO2) */ 00293 #define REMAPADCTRIGGER_ADC12_EXT5 SYSCFG_CFGR4_ADC12_EXT5_RMP /*!< Input trigger of ADC12 regular channel EXT5 00294 0: No remap (TIM4_CC4) 00295 1: Remap (TIM20_CC1) */ 00296 #define REMAPADCTRIGGER_ADC12_EXT13 SYSCFG_CFGR4_ADC12_EXT13_RMP /*!< Input trigger of ADC12 regular channel EXT13 00297 0: No remap (TIM6_TRGO) 00298 1: Remap (TIM20_CC2) */ 00299 #define REMAPADCTRIGGER_ADC12_EXT15 SYSCFG_CFGR4_ADC12_EXT15_RMP /*!< Input trigger of ADC12 regular channel EXT15 00300 0: No remap (TIM3_CC4) 00301 1: Remap (TIM20_CC3) */ 00302 #define REMAPADCTRIGGER_ADC12_JEXT3 SYSCFG_CFGR4_ADC12_JEXT3_RMP /*!< Input trigger of ADC12 injected channel JEXT3 00303 0: No remap (TIM2_CC1) 00304 1: Remap (TIM20_TRGO) */ 00305 #define REMAPADCTRIGGER_ADC12_JEXT6 SYSCFG_CFGR4_ADC12_JEXT6_RMP /*!< Input trigger of ADC12 injected channel JEXT6 00306 0: No remap (EXTI line 15) 00307 1: Remap (TIM20_TRGO2) */ 00308 #define REMAPADCTRIGGER_ADC12_JEXT13 SYSCFG_CFGR4_ADC12_JEXT13_RMP /*!< Input trigger of ADC12 injected channel JEXT13 00309 0: No remap (TIM3_CC1) 00310 1: Remap (TIM20_CC4) */ 00311 #define REMAPADCTRIGGER_ADC34_EXT5 SYSCFG_CFGR4_ADC34_EXT5_RMP /*!< Input trigger of ADC34 regular channel EXT5 00312 0: No remap (EXTI line 2) 00313 1: Remap (TIM20_TRGO) */ 00314 #define REMAPADCTRIGGER_ADC34_EXT6 SYSCFG_CFGR4_ADC34_EXT6_RMP /*!< Input trigger of ADC34 regular channel EXT6 00315 0: No remap (TIM4_CC1) 00316 1: Remap (TIM20_TRGO2) */ 00317 #define REMAPADCTRIGGER_ADC34_EXT15 SYSCFG_CFGR4_ADC34_EXT15_RMP /*!< Input trigger of ADC34 regular channel EXT15 00318 0: No remap (TIM2_CC1) 00319 1: Remap (TIM20_CC1) */ 00320 #define REMAPADCTRIGGER_ADC34_JEXT5 SYSCFG_CFGR4_ADC34_JEXT5_RMP /*!< Input trigger of ADC34 injected channel JEXT5 00321 0: No remap (TIM4_CC3) 00322 1: Remap (TIM20_TRGO) */ 00323 #define REMAPADCTRIGGER_ADC34_JEXT11 SYSCFG_CFGR4_ADC34_JEXT11_RMP /*!< Input trigger of ADC34 injected channel JEXT11 00324 0: No remap (TIM1_CC3) 00325 1: Remap (TIM20_TRGO2) */ 00326 #define REMAPADCTRIGGER_ADC34_JEXT14 SYSCFG_CFGR4_ADC34_JEXT14_RMP /*!< Input trigger of ADC34 injected channel JEXT14 00327 0: No remap (TIM7_TRGO) 00328 1: Remap (TIM20_CC2) */ 00329 00330 #define IS_SYSCFG_ADC_TRIGGER_REMAP(RMP) (((RMP) == REMAPADCTRIGGER_ADC12_EXT2) || \ 00331 ((RMP) == REMAPADCTRIGGER_ADC12_EXT3) || \ 00332 ((RMP) == REMAPADCTRIGGER_ADC12_EXT5) || \ 00333 ((RMP) == REMAPADCTRIGGER_ADC12_EXT13) || \ 00334 ((RMP) == REMAPADCTRIGGER_ADC12_EXT15) || \ 00335 ((RMP) == REMAPADCTRIGGER_ADC12_JEXT3) || \ 00336 ((RMP) == REMAPADCTRIGGER_ADC12_JEXT6) || \ 00337 ((RMP) == REMAPADCTRIGGER_ADC12_JEXT13) || \ 00338 ((RMP) == REMAPADCTRIGGER_ADC34_EXT5) || \ 00339 ((RMP) == REMAPADCTRIGGER_ADC34_EXT6) || \ 00340 ((RMP) == REMAPADCTRIGGER_ADC34_EXT15) || \ 00341 ((RMP) == REMAPADCTRIGGER_ADC34_JEXT5) || \ 00342 ((RMP) == REMAPADCTRIGGER_ADC34_JEXT11) || \ 00343 ((RMP) == REMAPADCTRIGGER_ADC34_JEXT14)) 00344 00345 /** 00346 * @} 00347 */ 00348 00349 /** @defgroup SYSCFG_SRAMWRP_Config 00350 * @{ 00351 */ 00352 #define SYSCFG_SRAMWRP_Page0 SYSCFG_RCR_PAGE0 /*!< ICODE SRAM Write protection page 0 */ 00353 #define SYSCFG_SRAMWRP_Page1 SYSCFG_RCR_PAGE1 /*!< ICODE SRAM Write protection page 1 */ 00354 #define SYSCFG_SRAMWRP_Page2 SYSCFG_RCR_PAGE2 /*!< ICODE SRAM Write protection page 2 */ 00355 #define SYSCFG_SRAMWRP_Page3 SYSCFG_RCR_PAGE3 /*!< ICODE SRAM Write protection page 3 */ 00356 #define SYSCFG_SRAMWRP_Page4 SYSCFG_RCR_PAGE4 /*!< ICODE SRAM Write protection page 4 */ 00357 #define SYSCFG_SRAMWRP_Page5 SYSCFG_RCR_PAGE5 /*!< ICODE SRAM Write protection page 5 */ 00358 #define SYSCFG_SRAMWRP_Page6 SYSCFG_RCR_PAGE6 /*!< ICODE SRAM Write protection page 6 */ 00359 #define SYSCFG_SRAMWRP_Page7 SYSCFG_RCR_PAGE7 /*!< ICODE SRAM Write protection page 7 */ 00360 #define SYSCFG_SRAMWRP_Page8 SYSCFG_RCR_PAGE8 /*!< ICODE SRAM Write protection page 8 */ 00361 #define SYSCFG_SRAMWRP_Page9 SYSCFG_RCR_PAGE9 /*!< ICODE SRAM Write protection page 9 */ 00362 #define SYSCFG_SRAMWRP_Page10 SYSCFG_RCR_PAGE10 /*!< ICODE SRAM Write protection page 10 */ 00363 #define SYSCFG_SRAMWRP_Page11 SYSCFG_RCR_PAGE11 /*!< ICODE SRAM Write protection page 11 */ 00364 #define SYSCFG_SRAMWRP_Page12 SYSCFG_RCR_PAGE12 /*!< ICODE SRAM Write protection page 12 */ 00365 #define SYSCFG_SRAMWRP_Page13 SYSCFG_RCR_PAGE13 /*!< ICODE SRAM Write protection page 13 */ 00366 #define SYSCFG_SRAMWRP_Page14 SYSCFG_RCR_PAGE14 /*!< ICODE SRAM Write protection page 14 */ 00367 #define SYSCFG_SRAMWRP_Page15 SYSCFG_RCR_PAGE15 /*!< ICODE SRAM Write protection page 15 */ 00368 00369 #define IS_SYSCFG_PAGE(PAGE)((((PAGE) & (uint32_t)0xFFFF0000) == 0x00000000) && ((PAGE) != 0x00000000)) 00370 00371 /** 00372 * @} 00373 */ 00374 00375 /** @defgroup SYSCFG_flags_definition 00376 * @{ 00377 */ 00378 00379 #define SYSCFG_FLAG_PE SYSCFG_CFGR2_SRAM_PE 00380 00381 #define IS_SYSCFG_FLAG(FLAG) (((FLAG) == SYSCFG_FLAG_PE)) 00382 00383 /** 00384 * @} 00385 */ 00386 00387 /** 00388 * @} 00389 */ 00390 00391 /* Exported macro ------------------------------------------------------------*/ 00392 /* Exported functions ------------------------------------------------------- */ 00393 00394 /* Function used to set the SYSCFG configuration to the default reset state **/ 00395 void SYSCFG_DeInit(void); 00396 00397 /* SYSCFG configuration functions *********************************************/ 00398 void SYSCFG_MemoryRemapConfig(uint32_t SYSCFG_MemoryRemap); 00399 void SYSCFG_DMAChannelRemapConfig(uint32_t SYSCFG_DMARemap, FunctionalState NewState); 00400 void SYSCFG_TriggerRemapConfig(uint32_t SYSCFG_TriggerRemap, FunctionalState NewState); 00401 void SYSCFG_EncoderRemapConfig(uint32_t SYSCFG_EncoderRemap); 00402 void SYSCFG_USBInterruptLineRemapCmd(FunctionalState NewState); 00403 void SYSCFG_I2CFastModePlusConfig(uint32_t SYSCFG_I2CFastModePlus, FunctionalState NewState); 00404 void SYSCFG_ITConfig(uint32_t SYSCFG_IT, FunctionalState NewState); 00405 void SYSCFG_EXTILineConfig(uint8_t EXTI_PortSourceGPIOx, uint8_t EXTI_PinSourcex); 00406 void SYSCFG_BreakConfig(uint32_t SYSCFG_Break); 00407 void SYSCFG_BypassParityCheckDisable(void); 00408 void SYSCFG_ADCTriggerRemapConfig(uint32_t SYSCFG_ADCTriggerRemap, FunctionalState NewState); 00409 void SYSCFG_SRAMWRPEnable(uint32_t SYSCFG_SRAMWRP); 00410 FlagStatus SYSCFG_GetFlagStatus(uint32_t SYSCFG_Flag); 00411 void SYSCFG_ClearFlag(uint32_t SYSCFG_Flag); 00412 00413 #ifdef __cplusplus 00414 } 00415 #endif 00416 00417 #endif /*__STM32F30x_SYSCFG_H */ 00418 00419 /** 00420 * @} 00421 */ 00422 00423 /** 00424 * @} 00425 */ 00426 00427 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
Generated on Tue Jul 12 2022 17:34:44 by
1.7.2